Jia Liu | bb481f8 | 2012-02-28 07:46:26 +0000 | [diff] [blame] | 1 | //===-- MipsISelLowering.cpp - Mips DAG Lowering Implementation -----------===// |
Bruno Cardoso Lopes | 972f589 | 2007-06-06 07:42:06 +0000 | [diff] [blame] | 2 | // |
| 3 | // The LLVM Compiler Infrastructure |
| 4 | // |
Chris Lattner | 4ee451d | 2007-12-29 20:36:04 +0000 | [diff] [blame] | 5 | // This file is distributed under the University of Illinois Open Source |
| 6 | // License. See LICENSE.TXT for details. |
Bruno Cardoso Lopes | 972f589 | 2007-06-06 07:42:06 +0000 | [diff] [blame] | 7 | // |
Akira Hatanaka | 4552c9a | 2011-04-15 21:51:11 +0000 | [diff] [blame] | 8 | //===----------------------------------------------------------------------===// |
Bruno Cardoso Lopes | 972f589 | 2007-06-06 07:42:06 +0000 | [diff] [blame] | 9 | // |
| 10 | // This file defines the interfaces that Mips uses to lower LLVM code into a |
| 11 | // selection DAG. |
| 12 | // |
Akira Hatanaka | 4552c9a | 2011-04-15 21:51:11 +0000 | [diff] [blame] | 13 | //===----------------------------------------------------------------------===// |
Bruno Cardoso Lopes | 972f589 | 2007-06-06 07:42:06 +0000 | [diff] [blame] | 14 | |
| 15 | #define DEBUG_TYPE "mips-lower" |
Bruno Cardoso Lopes | 972f589 | 2007-06-06 07:42:06 +0000 | [diff] [blame] | 16 | #include "MipsISelLowering.h" |
Bruno Cardoso Lopes | a2b1bb5 | 2007-08-28 05:08:16 +0000 | [diff] [blame] | 17 | #include "MipsMachineFunction.h" |
Bruno Cardoso Lopes | 972f589 | 2007-06-06 07:42:06 +0000 | [diff] [blame] | 18 | #include "MipsTargetMachine.h" |
Chris Lattner | b71b909 | 2009-08-13 06:28:06 +0000 | [diff] [blame] | 19 | #include "MipsTargetObjectFile.h" |
Bruno Cardoso Lopes | 225ca9c | 2008-07-05 19:05:21 +0000 | [diff] [blame] | 20 | #include "MipsSubtarget.h" |
Craig Topper | 79aa341 | 2012-03-17 18:46:09 +0000 | [diff] [blame] | 21 | #include "InstPrinter/MipsInstPrinter.h" |
| 22 | #include "MCTargetDesc/MipsBaseInfo.h" |
Bruno Cardoso Lopes | 972f589 | 2007-06-06 07:42:06 +0000 | [diff] [blame] | 23 | #include "llvm/DerivedTypes.h" |
| 24 | #include "llvm/Function.h" |
Bruno Cardoso Lopes | 91fd532 | 2008-07-21 18:52:34 +0000 | [diff] [blame] | 25 | #include "llvm/GlobalVariable.h" |
Bruno Cardoso Lopes | 972f589 | 2007-06-06 07:42:06 +0000 | [diff] [blame] | 26 | #include "llvm/Intrinsics.h" |
| 27 | #include "llvm/CallingConv.h" |
Akira Hatanaka | 2b861be | 2012-10-19 21:47:33 +0000 | [diff] [blame] | 28 | #include "llvm/ADT/Statistic.h" |
Bruno Cardoso Lopes | 972f589 | 2007-06-06 07:42:06 +0000 | [diff] [blame] | 29 | #include "llvm/CodeGen/CallingConvLower.h" |
| 30 | #include "llvm/CodeGen/MachineFrameInfo.h" |
| 31 | #include "llvm/CodeGen/MachineFunction.h" |
| 32 | #include "llvm/CodeGen/MachineInstrBuilder.h" |
Chris Lattner | 84bc542 | 2007-12-31 04:13:23 +0000 | [diff] [blame] | 33 | #include "llvm/CodeGen/MachineRegisterInfo.h" |
Bruno Cardoso Lopes | 972f589 | 2007-06-06 07:42:06 +0000 | [diff] [blame] | 34 | #include "llvm/CodeGen/SelectionDAGISel.h" |
Bruno Cardoso Lopes | 972f589 | 2007-06-06 07:42:06 +0000 | [diff] [blame] | 35 | #include "llvm/CodeGen/ValueTypes.h" |
Akira Hatanaka | 2b861be | 2012-10-19 21:47:33 +0000 | [diff] [blame] | 36 | #include "llvm/Support/CommandLine.h" |
Bruno Cardoso Lopes | 972f589 | 2007-06-06 07:42:06 +0000 | [diff] [blame] | 37 | #include "llvm/Support/Debug.h" |
Torok Edwin | c25e758 | 2009-07-11 20:10:48 +0000 | [diff] [blame] | 38 | #include "llvm/Support/ErrorHandling.h" |
NAKAMURA Takumi | 8959393 | 2012-04-21 15:31:45 +0000 | [diff] [blame] | 39 | #include "llvm/Support/raw_ostream.h" |
| 40 | |
Bruno Cardoso Lopes | 972f589 | 2007-06-06 07:42:06 +0000 | [diff] [blame] | 41 | using namespace llvm; |
| 42 | |
Akira Hatanaka | 2b861be | 2012-10-19 21:47:33 +0000 | [diff] [blame] | 43 | STATISTIC(NumTailCalls, "Number of tail calls"); |
| 44 | |
| 45 | static cl::opt<bool> |
| 46 | EnableMipsTailCalls("enable-mips-tail-calls", cl::Hidden, |
| 47 | cl::desc("MIPS: Enable tail calls."), cl::init(false)); |
| 48 | |
Akira Hatanaka | fe30a9b | 2012-10-27 00:29:43 +0000 | [diff] [blame] | 49 | static const uint16_t O32IntRegs[4] = { |
| 50 | Mips::A0, Mips::A1, Mips::A2, Mips::A3 |
| 51 | }; |
| 52 | |
| 53 | static const uint16_t Mips64IntRegs[8] = { |
| 54 | Mips::A0_64, Mips::A1_64, Mips::A2_64, Mips::A3_64, |
| 55 | Mips::T0_64, Mips::T1_64, Mips::T2_64, Mips::T3_64 |
| 56 | }; |
| 57 | |
| 58 | static const uint16_t Mips64DPRegs[8] = { |
| 59 | Mips::D12_64, Mips::D13_64, Mips::D14_64, Mips::D15_64, |
| 60 | Mips::D16_64, Mips::D17_64, Mips::D18_64, Mips::D19_64 |
| 61 | }; |
| 62 | |
Jia Liu | bb481f8 | 2012-02-28 07:46:26 +0000 | [diff] [blame] | 63 | // If I is a shifted mask, set the size (Size) and the first bit of the |
Akira Hatanaka | dbe9a31 | 2011-08-18 20:07:42 +0000 | [diff] [blame] | 64 | // mask (Pos), and return true. |
Jia Liu | bb481f8 | 2012-02-28 07:46:26 +0000 | [diff] [blame] | 65 | // For example, if I is 0x003ff800, (Pos, Size) = (11, 11). |
Akira Hatanaka | 854a7db | 2011-08-19 22:59:00 +0000 | [diff] [blame] | 66 | static bool IsShiftedMask(uint64_t I, uint64_t &Pos, uint64_t &Size) { |
Akira Hatanaka | d6bc523 | 2011-12-05 21:26:34 +0000 | [diff] [blame] | 67 | if (!isShiftedMask_64(I)) |
Akira Hatanaka | 854a7db | 2011-08-19 22:59:00 +0000 | [diff] [blame] | 68 | return false; |
Akira Hatanaka | bb15e11 | 2011-08-17 02:05:42 +0000 | [diff] [blame] | 69 | |
Akira Hatanaka | d6bc523 | 2011-12-05 21:26:34 +0000 | [diff] [blame] | 70 | Size = CountPopulation_64(I); |
| 71 | Pos = CountTrailingZeros_64(I); |
Akira Hatanaka | dbe9a31 | 2011-08-18 20:07:42 +0000 | [diff] [blame] | 72 | return true; |
Akira Hatanaka | bb15e11 | 2011-08-17 02:05:42 +0000 | [diff] [blame] | 73 | } |
| 74 | |
Akira Hatanaka | 648f00c | 2012-02-24 22:34:47 +0000 | [diff] [blame] | 75 | static SDValue GetGlobalReg(SelectionDAG &DAG, EVT Ty) { |
| 76 | MipsFunctionInfo *FI = DAG.getMachineFunction().getInfo<MipsFunctionInfo>(); |
| 77 | return DAG.getRegister(FI->getGlobalBaseReg(), Ty); |
| 78 | } |
| 79 | |
Chris Lattner | f014412 | 2009-07-28 03:13:23 +0000 | [diff] [blame] | 80 | const char *MipsTargetLowering::getTargetNodeName(unsigned Opcode) const { |
| 81 | switch (Opcode) { |
Akira Hatanaka | bdd2ce9 | 2011-05-23 21:13:59 +0000 | [diff] [blame] | 82 | case MipsISD::JmpLink: return "MipsISD::JmpLink"; |
Akira Hatanaka | 58d1e3f | 2012-10-19 20:59:39 +0000 | [diff] [blame] | 83 | case MipsISD::TailCall: return "MipsISD::TailCall"; |
Akira Hatanaka | bdd2ce9 | 2011-05-23 21:13:59 +0000 | [diff] [blame] | 84 | case MipsISD::Hi: return "MipsISD::Hi"; |
| 85 | case MipsISD::Lo: return "MipsISD::Lo"; |
| 86 | case MipsISD::GPRel: return "MipsISD::GPRel"; |
Bruno Cardoso Lopes | d979686 | 2011-05-31 02:53:58 +0000 | [diff] [blame] | 87 | case MipsISD::ThreadPointer: return "MipsISD::ThreadPointer"; |
Akira Hatanaka | bdd2ce9 | 2011-05-23 21:13:59 +0000 | [diff] [blame] | 88 | case MipsISD::Ret: return "MipsISD::Ret"; |
| 89 | case MipsISD::FPBrcond: return "MipsISD::FPBrcond"; |
| 90 | case MipsISD::FPCmp: return "MipsISD::FPCmp"; |
| 91 | case MipsISD::CMovFP_T: return "MipsISD::CMovFP_T"; |
| 92 | case MipsISD::CMovFP_F: return "MipsISD::CMovFP_F"; |
| 93 | case MipsISD::FPRound: return "MipsISD::FPRound"; |
| 94 | case MipsISD::MAdd: return "MipsISD::MAdd"; |
| 95 | case MipsISD::MAddu: return "MipsISD::MAddu"; |
| 96 | case MipsISD::MSub: return "MipsISD::MSub"; |
| 97 | case MipsISD::MSubu: return "MipsISD::MSubu"; |
| 98 | case MipsISD::DivRem: return "MipsISD::DivRem"; |
| 99 | case MipsISD::DivRemU: return "MipsISD::DivRemU"; |
| 100 | case MipsISD::BuildPairF64: return "MipsISD::BuildPairF64"; |
| 101 | case MipsISD::ExtractElementF64: return "MipsISD::ExtractElementF64"; |
Akira Hatanaka | bfcb83f | 2011-12-12 22:38:19 +0000 | [diff] [blame] | 102 | case MipsISD::Wrapper: return "MipsISD::Wrapper"; |
Akira Hatanaka | 21afc63 | 2011-06-21 00:40:49 +0000 | [diff] [blame] | 103 | case MipsISD::DynAlloc: return "MipsISD::DynAlloc"; |
Akira Hatanaka | db54826 | 2011-07-19 23:30:50 +0000 | [diff] [blame] | 104 | case MipsISD::Sync: return "MipsISD::Sync"; |
Akira Hatanaka | bb15e11 | 2011-08-17 02:05:42 +0000 | [diff] [blame] | 105 | case MipsISD::Ext: return "MipsISD::Ext"; |
| 106 | case MipsISD::Ins: return "MipsISD::Ins"; |
Akira Hatanaka | b6f1dc2 | 2012-06-02 00:03:12 +0000 | [diff] [blame] | 107 | case MipsISD::LWL: return "MipsISD::LWL"; |
| 108 | case MipsISD::LWR: return "MipsISD::LWR"; |
| 109 | case MipsISD::SWL: return "MipsISD::SWL"; |
| 110 | case MipsISD::SWR: return "MipsISD::SWR"; |
| 111 | case MipsISD::LDL: return "MipsISD::LDL"; |
| 112 | case MipsISD::LDR: return "MipsISD::LDR"; |
| 113 | case MipsISD::SDL: return "MipsISD::SDL"; |
| 114 | case MipsISD::SDR: return "MipsISD::SDR"; |
Akira Hatanaka | 6fad5e7 | 2012-09-21 23:52:47 +0000 | [diff] [blame] | 115 | case MipsISD::EXTP: return "MipsISD::EXTP"; |
| 116 | case MipsISD::EXTPDP: return "MipsISD::EXTPDP"; |
| 117 | case MipsISD::EXTR_S_H: return "MipsISD::EXTR_S_H"; |
| 118 | case MipsISD::EXTR_W: return "MipsISD::EXTR_W"; |
| 119 | case MipsISD::EXTR_R_W: return "MipsISD::EXTR_R_W"; |
| 120 | case MipsISD::EXTR_RS_W: return "MipsISD::EXTR_RS_W"; |
| 121 | case MipsISD::SHILO: return "MipsISD::SHILO"; |
| 122 | case MipsISD::MTHLIP: return "MipsISD::MTHLIP"; |
| 123 | case MipsISD::MULT: return "MipsISD::MULT"; |
| 124 | case MipsISD::MULTU: return "MipsISD::MULTU"; |
| 125 | case MipsISD::MADD_DSP: return "MipsISD::MADD_DSPDSP"; |
| 126 | case MipsISD::MADDU_DSP: return "MipsISD::MADDU_DSP"; |
| 127 | case MipsISD::MSUB_DSP: return "MipsISD::MSUB_DSP"; |
| 128 | case MipsISD::MSUBU_DSP: return "MipsISD::MSUBU_DSP"; |
Akira Hatanaka | 0f84382 | 2011-06-07 18:58:42 +0000 | [diff] [blame] | 129 | default: return NULL; |
Bruno Cardoso Lopes | 972f589 | 2007-06-06 07:42:06 +0000 | [diff] [blame] | 130 | } |
| 131 | } |
| 132 | |
| 133 | MipsTargetLowering:: |
Chris Lattner | f014412 | 2009-07-28 03:13:23 +0000 | [diff] [blame] | 134 | MipsTargetLowering(MipsTargetMachine &TM) |
Akira Hatanaka | 8b4198d | 2011-09-26 21:47:02 +0000 | [diff] [blame] | 135 | : TargetLowering(TM, new MipsTargetObjectFile()), |
| 136 | Subtarget(&TM.getSubtarget<MipsSubtarget>()), |
Akira Hatanaka | 2ec69fa | 2011-10-28 18:47:24 +0000 | [diff] [blame] | 137 | HasMips64(Subtarget->hasMips64()), IsN64(Subtarget->isABI_N64()), |
| 138 | IsO32(Subtarget->isABI_O32()) { |
Bruno Cardoso Lopes | 225ca9c | 2008-07-05 19:05:21 +0000 | [diff] [blame] | 139 | |
Bruno Cardoso Lopes | 972f589 | 2007-06-06 07:42:06 +0000 | [diff] [blame] | 140 | // Mips does not have i1 type, so use i32 for |
Wesley Peck | bf17cfa | 2010-11-23 03:31:01 +0000 | [diff] [blame] | 141 | // setcc operations results (slt, sgt, ...). |
Duncan Sands | 0322808 | 2008-11-23 15:47:28 +0000 | [diff] [blame] | 142 | setBooleanContents(ZeroOrOneBooleanContent); |
Duncan Sands | 28b77e9 | 2011-09-06 19:07:46 +0000 | [diff] [blame] | 143 | setBooleanVectorContents(ZeroOrOneBooleanContent); // FIXME: Is this correct? |
Bruno Cardoso Lopes | 972f589 | 2007-06-06 07:42:06 +0000 | [diff] [blame] | 144 | |
| 145 | // Set up the register classes |
Craig Topper | 420761a | 2012-04-20 07:30:17 +0000 | [diff] [blame] | 146 | addRegisterClass(MVT::i32, &Mips::CPURegsRegClass); |
Bruno Cardoso Lopes | 972f589 | 2007-06-06 07:42:06 +0000 | [diff] [blame] | 147 | |
Akira Hatanaka | 9593484 | 2011-09-24 01:34:44 +0000 | [diff] [blame] | 148 | if (HasMips64) |
Craig Topper | 420761a | 2012-04-20 07:30:17 +0000 | [diff] [blame] | 149 | addRegisterClass(MVT::i64, &Mips::CPU64RegsRegClass); |
Akira Hatanaka | 9593484 | 2011-09-24 01:34:44 +0000 | [diff] [blame] | 150 | |
Akira Hatanaka | 28ee4fd | 2012-05-31 02:59:44 +0000 | [diff] [blame] | 151 | if (Subtarget->inMips16Mode()) { |
| 152 | addRegisterClass(MVT::i32, &Mips::CPU16RegsRegClass); |
Akira Hatanaka | 28ee4fd | 2012-05-31 02:59:44 +0000 | [diff] [blame] | 153 | } |
| 154 | |
Akira Hatanaka | b430cec | 2012-09-21 23:58:31 +0000 | [diff] [blame] | 155 | if (Subtarget->hasDSP()) { |
| 156 | MVT::SimpleValueType VecTys[2] = {MVT::v2i16, MVT::v4i8}; |
| 157 | |
| 158 | for (unsigned i = 0; i < array_lengthof(VecTys); ++i) { |
| 159 | addRegisterClass(VecTys[i], &Mips::DSPRegsRegClass); |
| 160 | |
| 161 | // Expand all builtin opcodes. |
| 162 | for (unsigned Opc = 0; Opc < ISD::BUILTIN_OP_END; ++Opc) |
| 163 | setOperationAction(Opc, VecTys[i], Expand); |
| 164 | |
| 165 | setOperationAction(ISD::LOAD, VecTys[i], Legal); |
| 166 | setOperationAction(ISD::STORE, VecTys[i], Legal); |
| 167 | setOperationAction(ISD::BITCAST, VecTys[i], Legal); |
| 168 | } |
| 169 | } |
| 170 | |
Akira Hatanaka | b0e7af7 | 2012-01-04 19:29:11 +0000 | [diff] [blame] | 171 | if (!TM.Options.UseSoftFloat) { |
Craig Topper | 420761a | 2012-04-20 07:30:17 +0000 | [diff] [blame] | 172 | addRegisterClass(MVT::f32, &Mips::FGR32RegClass); |
Akira Hatanaka | b0e7af7 | 2012-01-04 19:29:11 +0000 | [diff] [blame] | 173 | |
| 174 | // When dealing with single precision only, use libcalls |
| 175 | if (!Subtarget->isSingleFloat()) { |
| 176 | if (HasMips64) |
Craig Topper | 420761a | 2012-04-20 07:30:17 +0000 | [diff] [blame] | 177 | addRegisterClass(MVT::f64, &Mips::FGR64RegClass); |
Akira Hatanaka | b0e7af7 | 2012-01-04 19:29:11 +0000 | [diff] [blame] | 178 | else |
Craig Topper | 420761a | 2012-04-20 07:30:17 +0000 | [diff] [blame] | 179 | addRegisterClass(MVT::f64, &Mips::AFGR64RegClass); |
Akira Hatanaka | b0e7af7 | 2012-01-04 19:29:11 +0000 | [diff] [blame] | 180 | } |
Akira Hatanaka | 792016b | 2011-09-23 18:28:39 +0000 | [diff] [blame] | 181 | } |
Bruno Cardoso Lopes | 225ca9c | 2008-07-05 19:05:21 +0000 | [diff] [blame] | 182 | |
Wesley Peck | bf17cfa | 2010-11-23 03:31:01 +0000 | [diff] [blame] | 183 | // Load extented operations for i1 types must be promoted |
Owen Anderson | 825b72b | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 184 | setLoadExtAction(ISD::EXTLOAD, MVT::i1, Promote); |
| 185 | setLoadExtAction(ISD::ZEXTLOAD, MVT::i1, Promote); |
| 186 | setLoadExtAction(ISD::SEXTLOAD, MVT::i1, Promote); |
Bruno Cardoso Lopes | 972f589 | 2007-06-06 07:42:06 +0000 | [diff] [blame] | 187 | |
Eli Friedman | 6055a6a | 2009-07-17 04:07:24 +0000 | [diff] [blame] | 188 | // MIPS doesn't have extending float->double load/store |
Owen Anderson | 825b72b | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 189 | setLoadExtAction(ISD::EXTLOAD, MVT::f32, Expand); |
| 190 | setTruncStoreAction(MVT::f64, MVT::f32, Expand); |
Eli Friedman | 10a3659 | 2009-07-17 02:28:12 +0000 | [diff] [blame] | 191 | |
Wesley Peck | bf17cfa | 2010-11-23 03:31:01 +0000 | [diff] [blame] | 192 | // Used by legalize types to correctly generate the setcc result. |
| 193 | // Without this, every float setcc comes with a AND/OR with the result, |
| 194 | // we don't want this, since the fpcmp result goes to a flag register, |
Bruno Cardoso Lopes | 7728377 | 2008-07-31 18:31:28 +0000 | [diff] [blame] | 195 | // which is used implicitly by brcond and select operations. |
Owen Anderson | 825b72b | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 196 | AddPromotedToType(ISD::SETCC, MVT::i1, MVT::i32); |
Bruno Cardoso Lopes | 7728377 | 2008-07-31 18:31:28 +0000 | [diff] [blame] | 197 | |
Bruno Cardoso Lopes | 97c2537 | 2008-07-09 04:15:08 +0000 | [diff] [blame] | 198 | // Mips Custom Operations |
Owen Anderson | 825b72b | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 199 | setOperationAction(ISD::GlobalAddress, MVT::i32, Custom); |
Bruno Cardoso Lopes | ca8a2aa | 2011-03-04 20:01:52 +0000 | [diff] [blame] | 200 | setOperationAction(ISD::BlockAddress, MVT::i32, Custom); |
Owen Anderson | 825b72b | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 201 | setOperationAction(ISD::GlobalTLSAddress, MVT::i32, Custom); |
| 202 | setOperationAction(ISD::JumpTable, MVT::i32, Custom); |
| 203 | setOperationAction(ISD::ConstantPool, MVT::i32, Custom); |
| 204 | setOperationAction(ISD::SELECT, MVT::f32, Custom); |
| 205 | setOperationAction(ISD::SELECT, MVT::f64, Custom); |
| 206 | setOperationAction(ISD::SELECT, MVT::i32, Custom); |
Akira Hatanaka | 3fef29d | 2012-07-11 19:32:27 +0000 | [diff] [blame] | 207 | setOperationAction(ISD::SELECT_CC, MVT::f32, Custom); |
| 208 | setOperationAction(ISD::SELECT_CC, MVT::f64, Custom); |
Akira Hatanaka | 0a40c23 | 2012-03-09 23:46:03 +0000 | [diff] [blame] | 209 | setOperationAction(ISD::SETCC, MVT::f32, Custom); |
| 210 | setOperationAction(ISD::SETCC, MVT::f64, Custom); |
Owen Anderson | 825b72b | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 211 | setOperationAction(ISD::BRCOND, MVT::Other, Custom); |
Bruno Cardoso Lopes | 6059b85 | 2010-02-06 21:00:02 +0000 | [diff] [blame] | 212 | setOperationAction(ISD::VASTART, MVT::Other, Custom); |
Akira Hatanaka | d229b7b | 2012-03-10 00:03:50 +0000 | [diff] [blame] | 213 | setOperationAction(ISD::FCOPYSIGN, MVT::f32, Custom); |
| 214 | setOperationAction(ISD::FCOPYSIGN, MVT::f64, Custom); |
| 215 | setOperationAction(ISD::MEMBARRIER, MVT::Other, Custom); |
| 216 | setOperationAction(ISD::ATOMIC_FENCE, MVT::Other, Custom); |
Akira Hatanaka | f934d15 | 2012-09-15 01:02:03 +0000 | [diff] [blame] | 217 | if (!Subtarget->inMips16Mode()) { |
| 218 | setOperationAction(ISD::LOAD, MVT::i32, Custom); |
| 219 | setOperationAction(ISD::STORE, MVT::i32, Custom); |
| 220 | } |
Akira Hatanaka | d229b7b | 2012-03-10 00:03:50 +0000 | [diff] [blame] | 221 | |
Akira Hatanaka | c12a6e6 | 2012-04-11 22:49:04 +0000 | [diff] [blame] | 222 | if (!TM.Options.NoNaNsFPMath) { |
| 223 | setOperationAction(ISD::FABS, MVT::f32, Custom); |
| 224 | setOperationAction(ISD::FABS, MVT::f64, Custom); |
| 225 | } |
| 226 | |
Akira Hatanaka | d229b7b | 2012-03-10 00:03:50 +0000 | [diff] [blame] | 227 | if (HasMips64) { |
| 228 | setOperationAction(ISD::GlobalAddress, MVT::i64, Custom); |
| 229 | setOperationAction(ISD::BlockAddress, MVT::i64, Custom); |
| 230 | setOperationAction(ISD::GlobalTLSAddress, MVT::i64, Custom); |
| 231 | setOperationAction(ISD::JumpTable, MVT::i64, Custom); |
| 232 | setOperationAction(ISD::ConstantPool, MVT::i64, Custom); |
| 233 | setOperationAction(ISD::SELECT, MVT::i64, Custom); |
Akira Hatanaka | 7664f05 | 2012-06-02 00:04:42 +0000 | [diff] [blame] | 234 | setOperationAction(ISD::LOAD, MVT::i64, Custom); |
| 235 | setOperationAction(ISD::STORE, MVT::i64, Custom); |
Akira Hatanaka | d229b7b | 2012-03-10 00:03:50 +0000 | [diff] [blame] | 236 | } |
Bruno Cardoso Lopes | 6059b85 | 2010-02-06 21:00:02 +0000 | [diff] [blame] | 237 | |
Akira Hatanaka | a284acb | 2012-05-09 00:55:21 +0000 | [diff] [blame] | 238 | if (!HasMips64) { |
| 239 | setOperationAction(ISD::SHL_PARTS, MVT::i32, Custom); |
| 240 | setOperationAction(ISD::SRA_PARTS, MVT::i32, Custom); |
| 241 | setOperationAction(ISD::SRL_PARTS, MVT::i32, Custom); |
| 242 | } |
| 243 | |
Bruno Cardoso Lopes | 38b5e86 | 2011-03-04 21:03:24 +0000 | [diff] [blame] | 244 | setOperationAction(ISD::SDIV, MVT::i32, Expand); |
| 245 | setOperationAction(ISD::SREM, MVT::i32, Expand); |
| 246 | setOperationAction(ISD::UDIV, MVT::i32, Expand); |
| 247 | setOperationAction(ISD::UREM, MVT::i32, Expand); |
Akira Hatanaka | dda4a07 | 2011-10-03 21:06:13 +0000 | [diff] [blame] | 248 | setOperationAction(ISD::SDIV, MVT::i64, Expand); |
| 249 | setOperationAction(ISD::SREM, MVT::i64, Expand); |
| 250 | setOperationAction(ISD::UDIV, MVT::i64, Expand); |
| 251 | setOperationAction(ISD::UREM, MVT::i64, Expand); |
Bruno Cardoso Lopes | 38b5e86 | 2011-03-04 21:03:24 +0000 | [diff] [blame] | 252 | |
Bruno Cardoso Lopes | 97c2537 | 2008-07-09 04:15:08 +0000 | [diff] [blame] | 253 | // Operations not directly supported by Mips. |
Owen Anderson | 825b72b | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 254 | setOperationAction(ISD::BR_JT, MVT::Other, Expand); |
| 255 | setOperationAction(ISD::BR_CC, MVT::Other, Expand); |
| 256 | setOperationAction(ISD::SELECT_CC, MVT::Other, Expand); |
| 257 | setOperationAction(ISD::UINT_TO_FP, MVT::i32, Expand); |
Akira Hatanaka | e1bcd6b | 2011-12-20 23:40:56 +0000 | [diff] [blame] | 258 | setOperationAction(ISD::UINT_TO_FP, MVT::i64, Expand); |
Owen Anderson | 825b72b | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 259 | setOperationAction(ISD::FP_TO_UINT, MVT::i32, Expand); |
Akira Hatanaka | e1bcd6b | 2011-12-20 23:40:56 +0000 | [diff] [blame] | 260 | setOperationAction(ISD::FP_TO_UINT, MVT::i64, Expand); |
Owen Anderson | 825b72b | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 261 | setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i1, Expand); |
| 262 | setOperationAction(ISD::CTPOP, MVT::i32, Expand); |
Akira Hatanaka | 7f16274 | 2011-12-21 00:14:05 +0000 | [diff] [blame] | 263 | setOperationAction(ISD::CTPOP, MVT::i64, Expand); |
Owen Anderson | 825b72b | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 264 | setOperationAction(ISD::CTTZ, MVT::i32, Expand); |
Akira Hatanaka | 7f16274 | 2011-12-21 00:14:05 +0000 | [diff] [blame] | 265 | setOperationAction(ISD::CTTZ, MVT::i64, Expand); |
Chandler Carruth | 63974b2 | 2011-12-13 01:56:10 +0000 | [diff] [blame] | 266 | setOperationAction(ISD::CTTZ_ZERO_UNDEF, MVT::i32, Expand); |
| 267 | setOperationAction(ISD::CTTZ_ZERO_UNDEF, MVT::i64, Expand); |
| 268 | setOperationAction(ISD::CTLZ_ZERO_UNDEF, MVT::i32, Expand); |
| 269 | setOperationAction(ISD::CTLZ_ZERO_UNDEF, MVT::i64, Expand); |
Owen Anderson | 825b72b | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 270 | setOperationAction(ISD::ROTL, MVT::i32, Expand); |
Akira Hatanaka | c7bafe9 | 2011-09-30 18:51:46 +0000 | [diff] [blame] | 271 | setOperationAction(ISD::ROTL, MVT::i64, Expand); |
Akira Hatanaka | 1d165f1 | 2012-07-31 20:54:48 +0000 | [diff] [blame] | 272 | setOperationAction(ISD::DYNAMIC_STACKALLOC, MVT::i32, Expand); |
| 273 | setOperationAction(ISD::DYNAMIC_STACKALLOC, MVT::i64, Expand); |
Bruno Cardoso Lopes | 908b6dd | 2010-12-09 17:32:30 +0000 | [diff] [blame] | 274 | |
Akira Hatanaka | 5663344 | 2011-09-20 23:53:09 +0000 | [diff] [blame] | 275 | if (!Subtarget->hasMips32r2()) |
Bruno Cardoso Lopes | 908b6dd | 2010-12-09 17:32:30 +0000 | [diff] [blame] | 276 | setOperationAction(ISD::ROTR, MVT::i32, Expand); |
| 277 | |
Akira Hatanaka | c7bafe9 | 2011-09-30 18:51:46 +0000 | [diff] [blame] | 278 | if (!Subtarget->hasMips64r2()) |
| 279 | setOperationAction(ISD::ROTR, MVT::i64, Expand); |
| 280 | |
Owen Anderson | 825b72b | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 281 | setOperationAction(ISD::FSIN, MVT::f32, Expand); |
Bruno Cardoso Lopes | 5d6fb5d | 2011-03-04 18:54:14 +0000 | [diff] [blame] | 282 | setOperationAction(ISD::FSIN, MVT::f64, Expand); |
Owen Anderson | 825b72b | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 283 | setOperationAction(ISD::FCOS, MVT::f32, Expand); |
Bruno Cardoso Lopes | 5d6fb5d | 2011-03-04 18:54:14 +0000 | [diff] [blame] | 284 | setOperationAction(ISD::FCOS, MVT::f64, Expand); |
Owen Anderson | 825b72b | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 285 | setOperationAction(ISD::FPOWI, MVT::f32, Expand); |
| 286 | setOperationAction(ISD::FPOW, MVT::f32, Expand); |
Akira Hatanaka | 46da136 | 2011-05-23 22:23:58 +0000 | [diff] [blame] | 287 | setOperationAction(ISD::FPOW, MVT::f64, Expand); |
Owen Anderson | 825b72b | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 288 | setOperationAction(ISD::FLOG, MVT::f32, Expand); |
| 289 | setOperationAction(ISD::FLOG2, MVT::f32, Expand); |
| 290 | setOperationAction(ISD::FLOG10, MVT::f32, Expand); |
| 291 | setOperationAction(ISD::FEXP, MVT::f32, Expand); |
Cameron Zwarich | 3339084 | 2011-07-08 21:39:21 +0000 | [diff] [blame] | 292 | setOperationAction(ISD::FMA, MVT::f32, Expand); |
| 293 | setOperationAction(ISD::FMA, MVT::f64, Expand); |
Akira Hatanaka | 21ecc2f | 2012-03-29 18:43:11 +0000 | [diff] [blame] | 294 | setOperationAction(ISD::FREM, MVT::f32, Expand); |
| 295 | setOperationAction(ISD::FREM, MVT::f64, Expand); |
Bruno Cardoso Lopes | 97c2537 | 2008-07-09 04:15:08 +0000 | [diff] [blame] | 296 | |
Akira Hatanaka | 1cc6333 | 2012-04-11 22:59:08 +0000 | [diff] [blame] | 297 | if (!TM.Options.NoNaNsFPMath) { |
| 298 | setOperationAction(ISD::FNEG, MVT::f32, Expand); |
| 299 | setOperationAction(ISD::FNEG, MVT::f64, Expand); |
| 300 | } |
| 301 | |
Akira Hatanaka | cf0cd80 | 2011-05-26 18:59:03 +0000 | [diff] [blame] | 302 | setOperationAction(ISD::EXCEPTIONADDR, MVT::i32, Expand); |
Akira Hatanaka | 590baca | 2012-02-02 03:13:40 +0000 | [diff] [blame] | 303 | setOperationAction(ISD::EXCEPTIONADDR, MVT::i64, Expand); |
Akira Hatanaka | cf0cd80 | 2011-05-26 18:59:03 +0000 | [diff] [blame] | 304 | setOperationAction(ISD::EHSELECTION, MVT::i32, Expand); |
Akira Hatanaka | 590baca | 2012-02-02 03:13:40 +0000 | [diff] [blame] | 305 | setOperationAction(ISD::EHSELECTION, MVT::i64, Expand); |
Eric Christopher | 471e422 | 2011-06-08 23:55:35 +0000 | [diff] [blame] | 306 | |
Bruno Cardoso Lopes | 954dac0 | 2011-03-09 19:22:22 +0000 | [diff] [blame] | 307 | setOperationAction(ISD::VAARG, MVT::Other, Expand); |
| 308 | setOperationAction(ISD::VACOPY, MVT::Other, Expand); |
| 309 | setOperationAction(ISD::VAEND, MVT::Other, Expand); |
| 310 | |
Akira Hatanaka | b430cec | 2012-09-21 23:58:31 +0000 | [diff] [blame] | 311 | setOperationAction(ISD::INTRINSIC_WO_CHAIN, MVT::i64, Custom); |
| 312 | setOperationAction(ISD::INTRINSIC_W_CHAIN, MVT::i64, Custom); |
| 313 | |
Bruno Cardoso Lopes | 97c2537 | 2008-07-09 04:15:08 +0000 | [diff] [blame] | 314 | // Use the default for now |
Owen Anderson | 825b72b | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 315 | setOperationAction(ISD::STACKSAVE, MVT::Other, Expand); |
| 316 | setOperationAction(ISD::STACKRESTORE, MVT::Other, Expand); |
Eli Friedman | 1464846 | 2011-07-27 22:21:52 +0000 | [diff] [blame] | 317 | |
Jia Liu | bb481f8 | 2012-02-28 07:46:26 +0000 | [diff] [blame] | 318 | setOperationAction(ISD::ATOMIC_LOAD, MVT::i32, Expand); |
| 319 | setOperationAction(ISD::ATOMIC_LOAD, MVT::i64, Expand); |
| 320 | setOperationAction(ISD::ATOMIC_STORE, MVT::i32, Expand); |
| 321 | setOperationAction(ISD::ATOMIC_STORE, MVT::i64, Expand); |
Eli Friedman | 4db5aca | 2011-08-29 18:23:02 +0000 | [diff] [blame] | 322 | |
Eli Friedman | 26689ac | 2011-08-03 21:06:02 +0000 | [diff] [blame] | 323 | setInsertFencesForAtomic(true); |
| 324 | |
Bruno Cardoso Lopes | 7728f7e | 2008-07-09 05:32:22 +0000 | [diff] [blame] | 325 | if (!Subtarget->hasSEInReg()) { |
Owen Anderson | 825b72b | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 326 | setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i8, Expand); |
| 327 | setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i16, Expand); |
Bruno Cardoso Lopes | 225ca9c | 2008-07-05 19:05:21 +0000 | [diff] [blame] | 328 | } |
| 329 | |
Akira Hatanaka | c79507a | 2011-12-21 00:20:27 +0000 | [diff] [blame] | 330 | if (!Subtarget->hasBitCount()) { |
Owen Anderson | 825b72b | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 331 | setOperationAction(ISD::CTLZ, MVT::i32, Expand); |
Akira Hatanaka | c79507a | 2011-12-21 00:20:27 +0000 | [diff] [blame] | 332 | setOperationAction(ISD::CTLZ, MVT::i64, Expand); |
| 333 | } |
Bruno Cardoso Lopes | 65ad452 | 2008-08-08 06:16:31 +0000 | [diff] [blame] | 334 | |
Akira Hatanaka | c0ea043 | 2011-12-20 23:56:43 +0000 | [diff] [blame] | 335 | if (!Subtarget->hasSwap()) { |
Owen Anderson | 825b72b | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 336 | setOperationAction(ISD::BSWAP, MVT::i32, Expand); |
Akira Hatanaka | c0ea043 | 2011-12-20 23:56:43 +0000 | [diff] [blame] | 337 | setOperationAction(ISD::BSWAP, MVT::i64, Expand); |
| 338 | } |
Bruno Cardoso Lopes | 739e441 | 2008-08-13 07:13:40 +0000 | [diff] [blame] | 339 | |
Akira Hatanaka | 7664f05 | 2012-06-02 00:04:42 +0000 | [diff] [blame] | 340 | if (HasMips64) { |
| 341 | setLoadExtAction(ISD::SEXTLOAD, MVT::i32, Custom); |
| 342 | setLoadExtAction(ISD::ZEXTLOAD, MVT::i32, Custom); |
| 343 | setLoadExtAction(ISD::EXTLOAD, MVT::i32, Custom); |
| 344 | setTruncStoreAction(MVT::i64, MVT::i32, Custom); |
| 345 | } |
| 346 | |
Bruno Cardoso Lopes | 8be7611 | 2011-01-18 19:29:17 +0000 | [diff] [blame] | 347 | setTargetDAGCombine(ISD::ADDE); |
| 348 | setTargetDAGCombine(ISD::SUBE); |
Bruno Cardoso Lopes | 38b5e86 | 2011-03-04 21:03:24 +0000 | [diff] [blame] | 349 | setTargetDAGCombine(ISD::SDIVREM); |
| 350 | setTargetDAGCombine(ISD::UDIVREM); |
Akira Hatanaka | ee8c3b0 | 2012-03-08 03:26:37 +0000 | [diff] [blame] | 351 | setTargetDAGCombine(ISD::SELECT); |
Akira Hatanaka | 77b85b6 | 2011-08-17 17:45:08 +0000 | [diff] [blame] | 352 | setTargetDAGCombine(ISD::AND); |
| 353 | setTargetDAGCombine(ISD::OR); |
Akira Hatanaka | 8782707 | 2012-06-13 20:33:18 +0000 | [diff] [blame] | 354 | setTargetDAGCombine(ISD::ADD); |
Bruno Cardoso Lopes | 8be7611 | 2011-01-18 19:29:17 +0000 | [diff] [blame] | 355 | |
Akira Hatanaka | 5fdf500 | 2012-03-08 01:59:33 +0000 | [diff] [blame] | 356 | setMinFunctionAlignment(HasMips64 ? 3 : 2); |
Eli Friedman | fc5d305 | 2011-05-06 20:34:06 +0000 | [diff] [blame] | 357 | |
Akira Hatanaka | 3f5b107 | 2012-02-02 03:17:04 +0000 | [diff] [blame] | 358 | setStackPointerRegisterToSaveRestore(IsN64 ? Mips::SP_64 : Mips::SP); |
Bruno Cardoso Lopes | 972f589 | 2007-06-06 07:42:06 +0000 | [diff] [blame] | 359 | computeRegisterProperties(); |
Akira Hatanaka | cf0cd80 | 2011-05-26 18:59:03 +0000 | [diff] [blame] | 360 | |
Akira Hatanaka | 590baca | 2012-02-02 03:13:40 +0000 | [diff] [blame] | 361 | setExceptionPointerRegister(IsN64 ? Mips::A0_64 : Mips::A0); |
| 362 | setExceptionSelectorRegister(IsN64 ? Mips::A1_64 : Mips::A1); |
Akira Hatanaka | e193b32 | 2012-06-13 19:33:32 +0000 | [diff] [blame] | 363 | |
| 364 | maxStoresPerMemcpy = 16; |
Bruno Cardoso Lopes | 972f589 | 2007-06-06 07:42:06 +0000 | [diff] [blame] | 365 | } |
| 366 | |
Akira Hatanaka | 5c21c9e | 2011-08-12 21:30:06 +0000 | [diff] [blame] | 367 | bool MipsTargetLowering::allowsUnalignedMemoryAccesses(EVT VT) const { |
Akira Hatanaka | 511961a | 2011-08-17 18:49:18 +0000 | [diff] [blame] | 368 | MVT::SimpleValueType SVT = VT.getSimpleVT().SimpleTy; |
Jia Liu | bb481f8 | 2012-02-28 07:46:26 +0000 | [diff] [blame] | 369 | |
Akira Hatanaka | f934d15 | 2012-09-15 01:02:03 +0000 | [diff] [blame] | 370 | if (Subtarget->inMips16Mode()) |
| 371 | return false; |
| 372 | |
Akira Hatanaka | 44b6c71 | 2012-02-28 02:55:02 +0000 | [diff] [blame] | 373 | switch (SVT) { |
| 374 | case MVT::i64: |
| 375 | case MVT::i32: |
Akira Hatanaka | 44b6c71 | 2012-02-28 02:55:02 +0000 | [diff] [blame] | 376 | return true; |
Akira Hatanaka | 44b6c71 | 2012-02-28 02:55:02 +0000 | [diff] [blame] | 377 | default: |
| 378 | return false; |
| 379 | } |
Akira Hatanaka | 5c21c9e | 2011-08-12 21:30:06 +0000 | [diff] [blame] | 380 | } |
| 381 | |
Duncan Sands | 28b77e9 | 2011-09-06 19:07:46 +0000 | [diff] [blame] | 382 | EVT MipsTargetLowering::getSetCCResultType(EVT VT) const { |
Owen Anderson | 825b72b | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 383 | return MVT::i32; |
Scott Michel | 5b8f82e | 2008-03-10 15:42:14 +0000 | [diff] [blame] | 384 | } |
| 385 | |
Bruno Cardoso Lopes | 8be7611 | 2011-01-18 19:29:17 +0000 | [diff] [blame] | 386 | // SelectMadd - |
| 387 | // Transforms a subgraph in CurDAG if the following pattern is found: |
| 388 | // (addc multLo, Lo0), (adde multHi, Hi0), |
| 389 | // where, |
| 390 | // multHi/Lo: product of multiplication |
Bruno Cardoso Lopes | 8e826e6 | 2011-02-10 18:05:10 +0000 | [diff] [blame] | 391 | // Lo0: initial value of Lo register |
| 392 | // Hi0: initial value of Hi register |
Akira Hatanaka | 81bd78b | 2011-03-30 21:15:35 +0000 | [diff] [blame] | 393 | // Return true if pattern matching was successful. |
Akira Hatanaka | 864f660 | 2012-06-14 21:10:56 +0000 | [diff] [blame] | 394 | static bool SelectMadd(SDNode *ADDENode, SelectionDAG *CurDAG) { |
Bruno Cardoso Lopes | 8e826e6 | 2011-02-10 18:05:10 +0000 | [diff] [blame] | 395 | // ADDENode's second operand must be a flag output of an ADDC node in order |
Bruno Cardoso Lopes | 8be7611 | 2011-01-18 19:29:17 +0000 | [diff] [blame] | 396 | // for the matching to be successful. |
Akira Hatanaka | 864f660 | 2012-06-14 21:10:56 +0000 | [diff] [blame] | 397 | SDNode *ADDCNode = ADDENode->getOperand(2).getNode(); |
Bruno Cardoso Lopes | 8be7611 | 2011-01-18 19:29:17 +0000 | [diff] [blame] | 398 | |
| 399 | if (ADDCNode->getOpcode() != ISD::ADDC) |
| 400 | return false; |
| 401 | |
| 402 | SDValue MultHi = ADDENode->getOperand(0); |
| 403 | SDValue MultLo = ADDCNode->getOperand(0); |
Akira Hatanaka | 864f660 | 2012-06-14 21:10:56 +0000 | [diff] [blame] | 404 | SDNode *MultNode = MultHi.getNode(); |
Bruno Cardoso Lopes | 8be7611 | 2011-01-18 19:29:17 +0000 | [diff] [blame] | 405 | unsigned MultOpc = MultHi.getOpcode(); |
| 406 | |
| 407 | // MultHi and MultLo must be generated by the same node, |
| 408 | if (MultLo.getNode() != MultNode) |
| 409 | return false; |
| 410 | |
| 411 | // and it must be a multiplication. |
| 412 | if (MultOpc != ISD::SMUL_LOHI && MultOpc != ISD::UMUL_LOHI) |
| 413 | return false; |
Bruno Cardoso Lopes | 8e826e6 | 2011-02-10 18:05:10 +0000 | [diff] [blame] | 414 | |
| 415 | // MultLo amd MultHi must be the first and second output of MultNode |
| 416 | // respectively. |
Bruno Cardoso Lopes | 8be7611 | 2011-01-18 19:29:17 +0000 | [diff] [blame] | 417 | if (MultHi.getResNo() != 1 || MultLo.getResNo() != 0) |
| 418 | return false; |
| 419 | |
Bruno Cardoso Lopes | 8e826e6 | 2011-02-10 18:05:10 +0000 | [diff] [blame] | 420 | // Transform this to a MADD only if ADDENode and ADDCNode are the only users |
Bruno Cardoso Lopes | 8be7611 | 2011-01-18 19:29:17 +0000 | [diff] [blame] | 421 | // of the values of MultNode, in which case MultNode will be removed in later |
| 422 | // phases. |
Akira Hatanaka | 4552c9a | 2011-04-15 21:51:11 +0000 | [diff] [blame] | 423 | // If there exist users other than ADDENode or ADDCNode, this function returns |
| 424 | // here, which will result in MultNode being mapped to a single MULT |
Bruno Cardoso Lopes | 8e826e6 | 2011-02-10 18:05:10 +0000 | [diff] [blame] | 425 | // instruction node rather than a pair of MULT and MADD instructions being |
Bruno Cardoso Lopes | 8be7611 | 2011-01-18 19:29:17 +0000 | [diff] [blame] | 426 | // produced. |
| 427 | if (!MultHi.hasOneUse() || !MultLo.hasOneUse()) |
| 428 | return false; |
| 429 | |
Bruno Cardoso Lopes | 8e826e6 | 2011-02-10 18:05:10 +0000 | [diff] [blame] | 430 | SDValue Chain = CurDAG->getEntryNode(); |
Bruno Cardoso Lopes | 8be7611 | 2011-01-18 19:29:17 +0000 | [diff] [blame] | 431 | DebugLoc dl = ADDENode->getDebugLoc(); |
| 432 | |
| 433 | // create MipsMAdd(u) node |
| 434 | MultOpc = MultOpc == ISD::UMUL_LOHI ? MipsISD::MAddu : MipsISD::MAdd; |
Bruno Cardoso Lopes | 8e826e6 | 2011-02-10 18:05:10 +0000 | [diff] [blame] | 435 | |
Akira Hatanaka | 8209968 | 2011-12-19 19:52:25 +0000 | [diff] [blame] | 436 | SDValue MAdd = CurDAG->getNode(MultOpc, dl, MVT::Glue, |
Bruno Cardoso Lopes | 8be7611 | 2011-01-18 19:29:17 +0000 | [diff] [blame] | 437 | MultNode->getOperand(0),// Factor 0 |
| 438 | MultNode->getOperand(1),// Factor 1 |
Bruno Cardoso Lopes | 8e826e6 | 2011-02-10 18:05:10 +0000 | [diff] [blame] | 439 | ADDCNode->getOperand(1),// Lo0 |
Bruno Cardoso Lopes | 8be7611 | 2011-01-18 19:29:17 +0000 | [diff] [blame] | 440 | ADDENode->getOperand(1));// Hi0 |
| 441 | |
| 442 | // create CopyFromReg nodes |
| 443 | SDValue CopyFromLo = CurDAG->getCopyFromReg(Chain, dl, Mips::LO, MVT::i32, |
| 444 | MAdd); |
Bruno Cardoso Lopes | 8e826e6 | 2011-02-10 18:05:10 +0000 | [diff] [blame] | 445 | SDValue CopyFromHi = CurDAG->getCopyFromReg(CopyFromLo.getValue(1), dl, |
Bruno Cardoso Lopes | 8be7611 | 2011-01-18 19:29:17 +0000 | [diff] [blame] | 446 | Mips::HI, MVT::i32, |
| 447 | CopyFromLo.getValue(2)); |
| 448 | |
| 449 | // replace uses of adde and addc here |
| 450 | if (!SDValue(ADDCNode, 0).use_empty()) |
| 451 | CurDAG->ReplaceAllUsesOfValueWith(SDValue(ADDCNode, 0), CopyFromLo); |
| 452 | |
| 453 | if (!SDValue(ADDENode, 0).use_empty()) |
| 454 | CurDAG->ReplaceAllUsesOfValueWith(SDValue(ADDENode, 0), CopyFromHi); |
| 455 | |
Bruno Cardoso Lopes | 8e826e6 | 2011-02-10 18:05:10 +0000 | [diff] [blame] | 456 | return true; |
Bruno Cardoso Lopes | 8be7611 | 2011-01-18 19:29:17 +0000 | [diff] [blame] | 457 | } |
| 458 | |
| 459 | // SelectMsub - |
| 460 | // Transforms a subgraph in CurDAG if the following pattern is found: |
| 461 | // (addc Lo0, multLo), (sube Hi0, multHi), |
| 462 | // where, |
| 463 | // multHi/Lo: product of multiplication |
Bruno Cardoso Lopes | 8e826e6 | 2011-02-10 18:05:10 +0000 | [diff] [blame] | 464 | // Lo0: initial value of Lo register |
| 465 | // Hi0: initial value of Hi register |
Akira Hatanaka | 81bd78b | 2011-03-30 21:15:35 +0000 | [diff] [blame] | 466 | // Return true if pattern matching was successful. |
Akira Hatanaka | 864f660 | 2012-06-14 21:10:56 +0000 | [diff] [blame] | 467 | static bool SelectMsub(SDNode *SUBENode, SelectionDAG *CurDAG) { |
Bruno Cardoso Lopes | 8e826e6 | 2011-02-10 18:05:10 +0000 | [diff] [blame] | 468 | // SUBENode's second operand must be a flag output of an SUBC node in order |
Bruno Cardoso Lopes | 8be7611 | 2011-01-18 19:29:17 +0000 | [diff] [blame] | 469 | // for the matching to be successful. |
Akira Hatanaka | 864f660 | 2012-06-14 21:10:56 +0000 | [diff] [blame] | 470 | SDNode *SUBCNode = SUBENode->getOperand(2).getNode(); |
Bruno Cardoso Lopes | 8be7611 | 2011-01-18 19:29:17 +0000 | [diff] [blame] | 471 | |
| 472 | if (SUBCNode->getOpcode() != ISD::SUBC) |
| 473 | return false; |
| 474 | |
| 475 | SDValue MultHi = SUBENode->getOperand(1); |
| 476 | SDValue MultLo = SUBCNode->getOperand(1); |
Akira Hatanaka | 864f660 | 2012-06-14 21:10:56 +0000 | [diff] [blame] | 477 | SDNode *MultNode = MultHi.getNode(); |
Bruno Cardoso Lopes | 8be7611 | 2011-01-18 19:29:17 +0000 | [diff] [blame] | 478 | unsigned MultOpc = MultHi.getOpcode(); |
| 479 | |
| 480 | // MultHi and MultLo must be generated by the same node, |
| 481 | if (MultLo.getNode() != MultNode) |
| 482 | return false; |
| 483 | |
| 484 | // and it must be a multiplication. |
| 485 | if (MultOpc != ISD::SMUL_LOHI && MultOpc != ISD::UMUL_LOHI) |
| 486 | return false; |
| 487 | |
| 488 | // MultLo amd MultHi must be the first and second output of MultNode |
| 489 | // respectively. |
| 490 | if (MultHi.getResNo() != 1 || MultLo.getResNo() != 0) |
| 491 | return false; |
| 492 | |
| 493 | // Transform this to a MSUB only if SUBENode and SUBCNode are the only users |
| 494 | // of the values of MultNode, in which case MultNode will be removed in later |
| 495 | // phases. |
Akira Hatanaka | 4552c9a | 2011-04-15 21:51:11 +0000 | [diff] [blame] | 496 | // If there exist users other than SUBENode or SUBCNode, this function returns |
| 497 | // here, which will result in MultNode being mapped to a single MULT |
Bruno Cardoso Lopes | 8be7611 | 2011-01-18 19:29:17 +0000 | [diff] [blame] | 498 | // instruction node rather than a pair of MULT and MSUB instructions being |
| 499 | // produced. |
| 500 | if (!MultHi.hasOneUse() || !MultLo.hasOneUse()) |
| 501 | return false; |
| 502 | |
| 503 | SDValue Chain = CurDAG->getEntryNode(); |
| 504 | DebugLoc dl = SUBENode->getDebugLoc(); |
| 505 | |
| 506 | // create MipsSub(u) node |
| 507 | MultOpc = MultOpc == ISD::UMUL_LOHI ? MipsISD::MSubu : MipsISD::MSub; |
| 508 | |
Akira Hatanaka | 8209968 | 2011-12-19 19:52:25 +0000 | [diff] [blame] | 509 | SDValue MSub = CurDAG->getNode(MultOpc, dl, MVT::Glue, |
Bruno Cardoso Lopes | 8be7611 | 2011-01-18 19:29:17 +0000 | [diff] [blame] | 510 | MultNode->getOperand(0),// Factor 0 |
| 511 | MultNode->getOperand(1),// Factor 1 |
| 512 | SUBCNode->getOperand(0),// Lo0 |
| 513 | SUBENode->getOperand(0));// Hi0 |
| 514 | |
| 515 | // create CopyFromReg nodes |
| 516 | SDValue CopyFromLo = CurDAG->getCopyFromReg(Chain, dl, Mips::LO, MVT::i32, |
| 517 | MSub); |
| 518 | SDValue CopyFromHi = CurDAG->getCopyFromReg(CopyFromLo.getValue(1), dl, |
| 519 | Mips::HI, MVT::i32, |
| 520 | CopyFromLo.getValue(2)); |
| 521 | |
| 522 | // replace uses of sube and subc here |
| 523 | if (!SDValue(SUBCNode, 0).use_empty()) |
| 524 | CurDAG->ReplaceAllUsesOfValueWith(SDValue(SUBCNode, 0), CopyFromLo); |
| 525 | |
| 526 | if (!SDValue(SUBENode, 0).use_empty()) |
| 527 | CurDAG->ReplaceAllUsesOfValueWith(SDValue(SUBENode, 0), CopyFromHi); |
| 528 | |
| 529 | return true; |
| 530 | } |
| 531 | |
Akira Hatanaka | 864f660 | 2012-06-14 21:10:56 +0000 | [diff] [blame] | 532 | static SDValue PerformADDECombine(SDNode *N, SelectionDAG &DAG, |
Bruno Cardoso Lopes | 8be7611 | 2011-01-18 19:29:17 +0000 | [diff] [blame] | 533 | TargetLowering::DAGCombinerInfo &DCI, |
Akira Hatanaka | 864f660 | 2012-06-14 21:10:56 +0000 | [diff] [blame] | 534 | const MipsSubtarget *Subtarget) { |
Bruno Cardoso Lopes | 8be7611 | 2011-01-18 19:29:17 +0000 | [diff] [blame] | 535 | if (DCI.isBeforeLegalize()) |
| 536 | return SDValue(); |
| 537 | |
Akira Hatanaka | e184fec | 2011-11-11 04:18:21 +0000 | [diff] [blame] | 538 | if (Subtarget->hasMips32() && N->getValueType(0) == MVT::i32 && |
| 539 | SelectMadd(N, &DAG)) |
Bruno Cardoso Lopes | 8be7611 | 2011-01-18 19:29:17 +0000 | [diff] [blame] | 540 | return SDValue(N, 0); |
Bruno Cardoso Lopes | 8e826e6 | 2011-02-10 18:05:10 +0000 | [diff] [blame] | 541 | |
Bruno Cardoso Lopes | 8be7611 | 2011-01-18 19:29:17 +0000 | [diff] [blame] | 542 | return SDValue(); |
Bruno Cardoso Lopes | 8e826e6 | 2011-02-10 18:05:10 +0000 | [diff] [blame] | 543 | } |
Bruno Cardoso Lopes | 8be7611 | 2011-01-18 19:29:17 +0000 | [diff] [blame] | 544 | |
Akira Hatanaka | 864f660 | 2012-06-14 21:10:56 +0000 | [diff] [blame] | 545 | static SDValue PerformSUBECombine(SDNode *N, SelectionDAG &DAG, |
Bruno Cardoso Lopes | 8be7611 | 2011-01-18 19:29:17 +0000 | [diff] [blame] | 546 | TargetLowering::DAGCombinerInfo &DCI, |
Akira Hatanaka | 864f660 | 2012-06-14 21:10:56 +0000 | [diff] [blame] | 547 | const MipsSubtarget *Subtarget) { |
Bruno Cardoso Lopes | 8be7611 | 2011-01-18 19:29:17 +0000 | [diff] [blame] | 548 | if (DCI.isBeforeLegalize()) |
| 549 | return SDValue(); |
| 550 | |
Akira Hatanaka | e184fec | 2011-11-11 04:18:21 +0000 | [diff] [blame] | 551 | if (Subtarget->hasMips32() && N->getValueType(0) == MVT::i32 && |
| 552 | SelectMsub(N, &DAG)) |
Bruno Cardoso Lopes | 8be7611 | 2011-01-18 19:29:17 +0000 | [diff] [blame] | 553 | return SDValue(N, 0); |
Bruno Cardoso Lopes | 8be7611 | 2011-01-18 19:29:17 +0000 | [diff] [blame] | 554 | |
Bruno Cardoso Lopes | 8e826e6 | 2011-02-10 18:05:10 +0000 | [diff] [blame] | 555 | return SDValue(); |
| 556 | } |
| 557 | |
Akira Hatanaka | 864f660 | 2012-06-14 21:10:56 +0000 | [diff] [blame] | 558 | static SDValue PerformDivRemCombine(SDNode *N, SelectionDAG &DAG, |
Bruno Cardoso Lopes | 38b5e86 | 2011-03-04 21:03:24 +0000 | [diff] [blame] | 559 | TargetLowering::DAGCombinerInfo &DCI, |
Akira Hatanaka | 864f660 | 2012-06-14 21:10:56 +0000 | [diff] [blame] | 560 | const MipsSubtarget *Subtarget) { |
Bruno Cardoso Lopes | 38b5e86 | 2011-03-04 21:03:24 +0000 | [diff] [blame] | 561 | if (DCI.isBeforeLegalizeOps()) |
| 562 | return SDValue(); |
| 563 | |
Akira Hatanaka | dda4a07 | 2011-10-03 21:06:13 +0000 | [diff] [blame] | 564 | EVT Ty = N->getValueType(0); |
Jia Liu | bb481f8 | 2012-02-28 07:46:26 +0000 | [diff] [blame] | 565 | unsigned LO = (Ty == MVT::i32) ? Mips::LO : Mips::LO64; |
| 566 | unsigned HI = (Ty == MVT::i32) ? Mips::HI : Mips::HI64; |
Bruno Cardoso Lopes | 38b5e86 | 2011-03-04 21:03:24 +0000 | [diff] [blame] | 567 | unsigned opc = N->getOpcode() == ISD::SDIVREM ? MipsISD::DivRem : |
| 568 | MipsISD::DivRemU; |
| 569 | DebugLoc dl = N->getDebugLoc(); |
| 570 | |
| 571 | SDValue DivRem = DAG.getNode(opc, dl, MVT::Glue, |
| 572 | N->getOperand(0), N->getOperand(1)); |
| 573 | SDValue InChain = DAG.getEntryNode(); |
| 574 | SDValue InGlue = DivRem; |
| 575 | |
| 576 | // insert MFLO |
| 577 | if (N->hasAnyUseOfValue(0)) { |
Akira Hatanaka | dda4a07 | 2011-10-03 21:06:13 +0000 | [diff] [blame] | 578 | SDValue CopyFromLo = DAG.getCopyFromReg(InChain, dl, LO, Ty, |
Bruno Cardoso Lopes | 38b5e86 | 2011-03-04 21:03:24 +0000 | [diff] [blame] | 579 | InGlue); |
| 580 | DAG.ReplaceAllUsesOfValueWith(SDValue(N, 0), CopyFromLo); |
| 581 | InChain = CopyFromLo.getValue(1); |
| 582 | InGlue = CopyFromLo.getValue(2); |
| 583 | } |
| 584 | |
| 585 | // insert MFHI |
| 586 | if (N->hasAnyUseOfValue(1)) { |
| 587 | SDValue CopyFromHi = DAG.getCopyFromReg(InChain, dl, |
Akira Hatanaka | dda4a07 | 2011-10-03 21:06:13 +0000 | [diff] [blame] | 588 | HI, Ty, InGlue); |
Bruno Cardoso Lopes | 38b5e86 | 2011-03-04 21:03:24 +0000 | [diff] [blame] | 589 | DAG.ReplaceAllUsesOfValueWith(SDValue(N, 1), CopyFromHi); |
| 590 | } |
| 591 | |
| 592 | return SDValue(); |
| 593 | } |
| 594 | |
Akira Hatanaka | 1d6b38d | 2011-03-31 18:26:17 +0000 | [diff] [blame] | 595 | static Mips::CondCode FPCondCCodeToFCC(ISD::CondCode CC) { |
| 596 | switch (CC) { |
| 597 | default: llvm_unreachable("Unknown fp condition code!"); |
| 598 | case ISD::SETEQ: |
| 599 | case ISD::SETOEQ: return Mips::FCOND_OEQ; |
| 600 | case ISD::SETUNE: return Mips::FCOND_UNE; |
| 601 | case ISD::SETLT: |
| 602 | case ISD::SETOLT: return Mips::FCOND_OLT; |
| 603 | case ISD::SETGT: |
| 604 | case ISD::SETOGT: return Mips::FCOND_OGT; |
| 605 | case ISD::SETLE: |
| 606 | case ISD::SETOLE: return Mips::FCOND_OLE; |
| 607 | case ISD::SETGE: |
| 608 | case ISD::SETOGE: return Mips::FCOND_OGE; |
| 609 | case ISD::SETULT: return Mips::FCOND_ULT; |
| 610 | case ISD::SETULE: return Mips::FCOND_ULE; |
| 611 | case ISD::SETUGT: return Mips::FCOND_UGT; |
| 612 | case ISD::SETUGE: return Mips::FCOND_UGE; |
| 613 | case ISD::SETUO: return Mips::FCOND_UN; |
| 614 | case ISD::SETO: return Mips::FCOND_OR; |
| 615 | case ISD::SETNE: |
| 616 | case ISD::SETONE: return Mips::FCOND_ONE; |
| 617 | case ISD::SETUEQ: return Mips::FCOND_UEQ; |
| 618 | } |
| 619 | } |
| 620 | |
| 621 | |
| 622 | // Returns true if condition code has to be inverted. |
| 623 | static bool InvertFPCondCode(Mips::CondCode CC) { |
| 624 | if (CC >= Mips::FCOND_F && CC <= Mips::FCOND_NGT) |
| 625 | return false; |
| 626 | |
Akira Hatanaka | 8209968 | 2011-12-19 19:52:25 +0000 | [diff] [blame] | 627 | assert((CC >= Mips::FCOND_T && CC <= Mips::FCOND_GT) && |
| 628 | "Illegal Condition Code"); |
Akira Hatanaka | 1d6b38d | 2011-03-31 18:26:17 +0000 | [diff] [blame] | 629 | |
Akira Hatanaka | 8209968 | 2011-12-19 19:52:25 +0000 | [diff] [blame] | 630 | return true; |
Akira Hatanaka | 1d6b38d | 2011-03-31 18:26:17 +0000 | [diff] [blame] | 631 | } |
| 632 | |
| 633 | // Creates and returns an FPCmp node from a setcc node. |
| 634 | // Returns Op if setcc is not a floating point comparison. |
Akira Hatanaka | 864f660 | 2012-06-14 21:10:56 +0000 | [diff] [blame] | 635 | static SDValue CreateFPCmp(SelectionDAG &DAG, const SDValue &Op) { |
Akira Hatanaka | 1d6b38d | 2011-03-31 18:26:17 +0000 | [diff] [blame] | 636 | // must be a SETCC node |
| 637 | if (Op.getOpcode() != ISD::SETCC) |
| 638 | return Op; |
| 639 | |
| 640 | SDValue LHS = Op.getOperand(0); |
| 641 | |
| 642 | if (!LHS.getValueType().isFloatingPoint()) |
| 643 | return Op; |
| 644 | |
| 645 | SDValue RHS = Op.getOperand(1); |
| 646 | DebugLoc dl = Op.getDebugLoc(); |
| 647 | |
Akira Hatanaka | 0bf3dfb | 2011-04-15 21:00:26 +0000 | [diff] [blame] | 648 | // Assume the 3rd operand is a CondCodeSDNode. Add code to check the type of |
| 649 | // node if necessary. |
Akira Hatanaka | 1d6b38d | 2011-03-31 18:26:17 +0000 | [diff] [blame] | 650 | ISD::CondCode CC = cast<CondCodeSDNode>(Op.getOperand(2))->get(); |
| 651 | |
| 652 | return DAG.getNode(MipsISD::FPCmp, dl, MVT::Glue, LHS, RHS, |
| 653 | DAG.getConstant(FPCondCCodeToFCC(CC), MVT::i32)); |
| 654 | } |
| 655 | |
| 656 | // Creates and returns a CMovFPT/F node. |
Akira Hatanaka | 864f660 | 2012-06-14 21:10:56 +0000 | [diff] [blame] | 657 | static SDValue CreateCMovFP(SelectionDAG &DAG, SDValue Cond, SDValue True, |
Akira Hatanaka | 1d6b38d | 2011-03-31 18:26:17 +0000 | [diff] [blame] | 658 | SDValue False, DebugLoc DL) { |
| 659 | bool invert = InvertFPCondCode((Mips::CondCode) |
| 660 | cast<ConstantSDNode>(Cond.getOperand(2)) |
| 661 | ->getSExtValue()); |
| 662 | |
| 663 | return DAG.getNode((invert ? MipsISD::CMovFP_F : MipsISD::CMovFP_T), DL, |
| 664 | True.getValueType(), True, False, Cond); |
| 665 | } |
| 666 | |
Akira Hatanaka | 864f660 | 2012-06-14 21:10:56 +0000 | [diff] [blame] | 667 | static SDValue PerformSELECTCombine(SDNode *N, SelectionDAG &DAG, |
Akira Hatanaka | e2bdf7f | 2012-03-08 02:14:24 +0000 | [diff] [blame] | 668 | TargetLowering::DAGCombinerInfo &DCI, |
Akira Hatanaka | 864f660 | 2012-06-14 21:10:56 +0000 | [diff] [blame] | 669 | const MipsSubtarget *Subtarget) { |
Akira Hatanaka | e2bdf7f | 2012-03-08 02:14:24 +0000 | [diff] [blame] | 670 | if (DCI.isBeforeLegalizeOps()) |
| 671 | return SDValue(); |
| 672 | |
| 673 | SDValue SetCC = N->getOperand(0); |
| 674 | |
| 675 | if ((SetCC.getOpcode() != ISD::SETCC) || |
| 676 | !SetCC.getOperand(0).getValueType().isInteger()) |
| 677 | return SDValue(); |
| 678 | |
| 679 | SDValue False = N->getOperand(2); |
| 680 | EVT FalseTy = False.getValueType(); |
| 681 | |
| 682 | if (!FalseTy.isInteger()) |
| 683 | return SDValue(); |
| 684 | |
| 685 | ConstantSDNode *CN = dyn_cast<ConstantSDNode>(False); |
| 686 | |
| 687 | if (!CN || CN->getZExtValue()) |
| 688 | return SDValue(); |
| 689 | |
| 690 | const DebugLoc DL = N->getDebugLoc(); |
| 691 | ISD::CondCode CC = cast<CondCodeSDNode>(SetCC.getOperand(2))->get(); |
| 692 | SDValue True = N->getOperand(1); |
Akira Hatanaka | 864f660 | 2012-06-14 21:10:56 +0000 | [diff] [blame] | 693 | |
Akira Hatanaka | e2bdf7f | 2012-03-08 02:14:24 +0000 | [diff] [blame] | 694 | SetCC = DAG.getSetCC(DL, SetCC.getValueType(), SetCC.getOperand(0), |
| 695 | SetCC.getOperand(1), ISD::getSetCCInverse(CC, true)); |
Akira Hatanaka | 864f660 | 2012-06-14 21:10:56 +0000 | [diff] [blame] | 696 | |
Akira Hatanaka | e2bdf7f | 2012-03-08 02:14:24 +0000 | [diff] [blame] | 697 | return DAG.getNode(ISD::SELECT, DL, FalseTy, SetCC, False, True); |
| 698 | } |
| 699 | |
Akira Hatanaka | 864f660 | 2012-06-14 21:10:56 +0000 | [diff] [blame] | 700 | static SDValue PerformANDCombine(SDNode *N, SelectionDAG &DAG, |
Akira Hatanaka | 77b85b6 | 2011-08-17 17:45:08 +0000 | [diff] [blame] | 701 | TargetLowering::DAGCombinerInfo &DCI, |
Akira Hatanaka | 864f660 | 2012-06-14 21:10:56 +0000 | [diff] [blame] | 702 | const MipsSubtarget *Subtarget) { |
Akira Hatanaka | 77b85b6 | 2011-08-17 17:45:08 +0000 | [diff] [blame] | 703 | // Pattern match EXT. |
| 704 | // $dst = and ((sra or srl) $src , pos), (2**size - 1) |
| 705 | // => ext $dst, $src, size, pos |
Akira Hatanaka | 5663344 | 2011-09-20 23:53:09 +0000 | [diff] [blame] | 706 | if (DCI.isBeforeLegalizeOps() || !Subtarget->hasMips32r2()) |
Akira Hatanaka | 77b85b6 | 2011-08-17 17:45:08 +0000 | [diff] [blame] | 707 | return SDValue(); |
| 708 | |
| 709 | SDValue ShiftRight = N->getOperand(0), Mask = N->getOperand(1); |
Akira Hatanaka | d6bc523 | 2011-12-05 21:26:34 +0000 | [diff] [blame] | 710 | unsigned ShiftRightOpc = ShiftRight.getOpcode(); |
| 711 | |
Akira Hatanaka | 77b85b6 | 2011-08-17 17:45:08 +0000 | [diff] [blame] | 712 | // Op's first operand must be a shift right. |
Akira Hatanaka | d6bc523 | 2011-12-05 21:26:34 +0000 | [diff] [blame] | 713 | if (ShiftRightOpc != ISD::SRA && ShiftRightOpc != ISD::SRL) |
Akira Hatanaka | 77b85b6 | 2011-08-17 17:45:08 +0000 | [diff] [blame] | 714 | return SDValue(); |
| 715 | |
| 716 | // The second operand of the shift must be an immediate. |
Akira Hatanaka | 77b85b6 | 2011-08-17 17:45:08 +0000 | [diff] [blame] | 717 | ConstantSDNode *CN; |
| 718 | if (!(CN = dyn_cast<ConstantSDNode>(ShiftRight.getOperand(1)))) |
| 719 | return SDValue(); |
Jia Liu | bb481f8 | 2012-02-28 07:46:26 +0000 | [diff] [blame] | 720 | |
Akira Hatanaka | d6bc523 | 2011-12-05 21:26:34 +0000 | [diff] [blame] | 721 | uint64_t Pos = CN->getZExtValue(); |
Akira Hatanaka | 77b85b6 | 2011-08-17 17:45:08 +0000 | [diff] [blame] | 722 | uint64_t SMPos, SMSize; |
Akira Hatanaka | d6bc523 | 2011-12-05 21:26:34 +0000 | [diff] [blame] | 723 | |
Akira Hatanaka | 77b85b6 | 2011-08-17 17:45:08 +0000 | [diff] [blame] | 724 | // Op's second operand must be a shifted mask. |
| 725 | if (!(CN = dyn_cast<ConstantSDNode>(Mask)) || |
Akira Hatanaka | 854a7db | 2011-08-19 22:59:00 +0000 | [diff] [blame] | 726 | !IsShiftedMask(CN->getZExtValue(), SMPos, SMSize)) |
Akira Hatanaka | 77b85b6 | 2011-08-17 17:45:08 +0000 | [diff] [blame] | 727 | return SDValue(); |
| 728 | |
| 729 | // Return if the shifted mask does not start at bit 0 or the sum of its size |
| 730 | // and Pos exceeds the word's size. |
Akira Hatanaka | d6bc523 | 2011-12-05 21:26:34 +0000 | [diff] [blame] | 731 | EVT ValTy = N->getValueType(0); |
| 732 | if (SMPos != 0 || Pos + SMSize > ValTy.getSizeInBits()) |
Akira Hatanaka | 77b85b6 | 2011-08-17 17:45:08 +0000 | [diff] [blame] | 733 | return SDValue(); |
| 734 | |
Akira Hatanaka | d6bc523 | 2011-12-05 21:26:34 +0000 | [diff] [blame] | 735 | return DAG.getNode(MipsISD::Ext, N->getDebugLoc(), ValTy, |
Akira Hatanaka | 8209968 | 2011-12-19 19:52:25 +0000 | [diff] [blame] | 736 | ShiftRight.getOperand(0), DAG.getConstant(Pos, MVT::i32), |
Akira Hatanaka | 667645f | 2011-08-17 22:59:46 +0000 | [diff] [blame] | 737 | DAG.getConstant(SMSize, MVT::i32)); |
Akira Hatanaka | 77b85b6 | 2011-08-17 17:45:08 +0000 | [diff] [blame] | 738 | } |
Jia Liu | bb481f8 | 2012-02-28 07:46:26 +0000 | [diff] [blame] | 739 | |
Akira Hatanaka | 864f660 | 2012-06-14 21:10:56 +0000 | [diff] [blame] | 740 | static SDValue PerformORCombine(SDNode *N, SelectionDAG &DAG, |
Akira Hatanaka | 77b85b6 | 2011-08-17 17:45:08 +0000 | [diff] [blame] | 741 | TargetLowering::DAGCombinerInfo &DCI, |
Akira Hatanaka | 864f660 | 2012-06-14 21:10:56 +0000 | [diff] [blame] | 742 | const MipsSubtarget *Subtarget) { |
Akira Hatanaka | 77b85b6 | 2011-08-17 17:45:08 +0000 | [diff] [blame] | 743 | // Pattern match INS. |
| 744 | // $dst = or (and $src1 , mask0), (and (shl $src, pos), mask1), |
Jia Liu | bb481f8 | 2012-02-28 07:46:26 +0000 | [diff] [blame] | 745 | // where mask1 = (2**size - 1) << pos, mask0 = ~mask1 |
Akira Hatanaka | 77b85b6 | 2011-08-17 17:45:08 +0000 | [diff] [blame] | 746 | // => ins $dst, $src, size, pos, $src1 |
Akira Hatanaka | 5663344 | 2011-09-20 23:53:09 +0000 | [diff] [blame] | 747 | if (DCI.isBeforeLegalizeOps() || !Subtarget->hasMips32r2()) |
Akira Hatanaka | 77b85b6 | 2011-08-17 17:45:08 +0000 | [diff] [blame] | 748 | return SDValue(); |
| 749 | |
| 750 | SDValue And0 = N->getOperand(0), And1 = N->getOperand(1); |
| 751 | uint64_t SMPos0, SMSize0, SMPos1, SMSize1; |
| 752 | ConstantSDNode *CN; |
| 753 | |
| 754 | // See if Op's first operand matches (and $src1 , mask0). |
| 755 | if (And0.getOpcode() != ISD::AND) |
| 756 | return SDValue(); |
| 757 | |
| 758 | if (!(CN = dyn_cast<ConstantSDNode>(And0.getOperand(1))) || |
Akira Hatanaka | 854a7db | 2011-08-19 22:59:00 +0000 | [diff] [blame] | 759 | !IsShiftedMask(~CN->getSExtValue(), SMPos0, SMSize0)) |
Akira Hatanaka | 77b85b6 | 2011-08-17 17:45:08 +0000 | [diff] [blame] | 760 | return SDValue(); |
| 761 | |
| 762 | // See if Op's second operand matches (and (shl $src, pos), mask1). |
| 763 | if (And1.getOpcode() != ISD::AND) |
| 764 | return SDValue(); |
Jia Liu | bb481f8 | 2012-02-28 07:46:26 +0000 | [diff] [blame] | 765 | |
Akira Hatanaka | 77b85b6 | 2011-08-17 17:45:08 +0000 | [diff] [blame] | 766 | if (!(CN = dyn_cast<ConstantSDNode>(And1.getOperand(1))) || |
Akira Hatanaka | 854a7db | 2011-08-19 22:59:00 +0000 | [diff] [blame] | 767 | !IsShiftedMask(CN->getZExtValue(), SMPos1, SMSize1)) |
Akira Hatanaka | 77b85b6 | 2011-08-17 17:45:08 +0000 | [diff] [blame] | 768 | return SDValue(); |
| 769 | |
| 770 | // The shift masks must have the same position and size. |
| 771 | if (SMPos0 != SMPos1 || SMSize0 != SMSize1) |
| 772 | return SDValue(); |
| 773 | |
| 774 | SDValue Shl = And1.getOperand(0); |
| 775 | if (Shl.getOpcode() != ISD::SHL) |
| 776 | return SDValue(); |
| 777 | |
| 778 | if (!(CN = dyn_cast<ConstantSDNode>(Shl.getOperand(1)))) |
| 779 | return SDValue(); |
| 780 | |
| 781 | unsigned Shamt = CN->getZExtValue(); |
| 782 | |
| 783 | // Return if the shift amount and the first bit position of mask are not the |
Jia Liu | bb481f8 | 2012-02-28 07:46:26 +0000 | [diff] [blame] | 784 | // same. |
Akira Hatanaka | d6bc523 | 2011-12-05 21:26:34 +0000 | [diff] [blame] | 785 | EVT ValTy = N->getValueType(0); |
| 786 | if ((Shamt != SMPos0) || (SMPos0 + SMSize0 > ValTy.getSizeInBits())) |
Akira Hatanaka | 77b85b6 | 2011-08-17 17:45:08 +0000 | [diff] [blame] | 787 | return SDValue(); |
Jia Liu | bb481f8 | 2012-02-28 07:46:26 +0000 | [diff] [blame] | 788 | |
Akira Hatanaka | 8209968 | 2011-12-19 19:52:25 +0000 | [diff] [blame] | 789 | return DAG.getNode(MipsISD::Ins, N->getDebugLoc(), ValTy, Shl.getOperand(0), |
Akira Hatanaka | 77b85b6 | 2011-08-17 17:45:08 +0000 | [diff] [blame] | 790 | DAG.getConstant(SMPos0, MVT::i32), |
Akira Hatanaka | 8209968 | 2011-12-19 19:52:25 +0000 | [diff] [blame] | 791 | DAG.getConstant(SMSize0, MVT::i32), And0.getOperand(0)); |
Akira Hatanaka | 77b85b6 | 2011-08-17 17:45:08 +0000 | [diff] [blame] | 792 | } |
Jia Liu | bb481f8 | 2012-02-28 07:46:26 +0000 | [diff] [blame] | 793 | |
Akira Hatanaka | 864f660 | 2012-06-14 21:10:56 +0000 | [diff] [blame] | 794 | static SDValue PerformADDCombine(SDNode *N, SelectionDAG &DAG, |
Akira Hatanaka | 8782707 | 2012-06-13 20:33:18 +0000 | [diff] [blame] | 795 | TargetLowering::DAGCombinerInfo &DCI, |
Akira Hatanaka | 864f660 | 2012-06-14 21:10:56 +0000 | [diff] [blame] | 796 | const MipsSubtarget *Subtarget) { |
Akira Hatanaka | 8782707 | 2012-06-13 20:33:18 +0000 | [diff] [blame] | 797 | // (add v0, (add v1, abs_lo(tjt))) => (add (add v0, v1), abs_lo(tjt)) |
| 798 | |
| 799 | if (DCI.isBeforeLegalizeOps()) |
| 800 | return SDValue(); |
| 801 | |
| 802 | SDValue Add = N->getOperand(1); |
| 803 | |
| 804 | if (Add.getOpcode() != ISD::ADD) |
| 805 | return SDValue(); |
| 806 | |
| 807 | SDValue Lo = Add.getOperand(1); |
| 808 | |
| 809 | if ((Lo.getOpcode() != MipsISD::Lo) || |
| 810 | (Lo.getOperand(0).getOpcode() != ISD::TargetJumpTable)) |
| 811 | return SDValue(); |
| 812 | |
| 813 | EVT ValTy = N->getValueType(0); |
| 814 | DebugLoc DL = N->getDebugLoc(); |
| 815 | |
| 816 | SDValue Add1 = DAG.getNode(ISD::ADD, DL, ValTy, N->getOperand(0), |
| 817 | Add.getOperand(0)); |
| 818 | return DAG.getNode(ISD::ADD, DL, ValTy, Add1, Lo); |
| 819 | } |
| 820 | |
Bruno Cardoso Lopes | 8e826e6 | 2011-02-10 18:05:10 +0000 | [diff] [blame] | 821 | SDValue MipsTargetLowering::PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) |
Bruno Cardoso Lopes | 8be7611 | 2011-01-18 19:29:17 +0000 | [diff] [blame] | 822 | const { |
| 823 | SelectionDAG &DAG = DCI.DAG; |
| 824 | unsigned opc = N->getOpcode(); |
| 825 | |
| 826 | switch (opc) { |
| 827 | default: break; |
| 828 | case ISD::ADDE: |
| 829 | return PerformADDECombine(N, DAG, DCI, Subtarget); |
| 830 | case ISD::SUBE: |
| 831 | return PerformSUBECombine(N, DAG, DCI, Subtarget); |
Bruno Cardoso Lopes | 38b5e86 | 2011-03-04 21:03:24 +0000 | [diff] [blame] | 832 | case ISD::SDIVREM: |
| 833 | case ISD::UDIVREM: |
| 834 | return PerformDivRemCombine(N, DAG, DCI, Subtarget); |
Akira Hatanaka | e2bdf7f | 2012-03-08 02:14:24 +0000 | [diff] [blame] | 835 | case ISD::SELECT: |
Akira Hatanaka | 864f660 | 2012-06-14 21:10:56 +0000 | [diff] [blame] | 836 | return PerformSELECTCombine(N, DAG, DCI, Subtarget); |
Akira Hatanaka | 77b85b6 | 2011-08-17 17:45:08 +0000 | [diff] [blame] | 837 | case ISD::AND: |
| 838 | return PerformANDCombine(N, DAG, DCI, Subtarget); |
| 839 | case ISD::OR: |
| 840 | return PerformORCombine(N, DAG, DCI, Subtarget); |
Akira Hatanaka | 8782707 | 2012-06-13 20:33:18 +0000 | [diff] [blame] | 841 | case ISD::ADD: |
| 842 | return PerformADDCombine(N, DAG, DCI, Subtarget); |
Bruno Cardoso Lopes | 8be7611 | 2011-01-18 19:29:17 +0000 | [diff] [blame] | 843 | } |
| 844 | |
| 845 | return SDValue(); |
| 846 | } |
| 847 | |
Akira Hatanaka | b430cec | 2012-09-21 23:58:31 +0000 | [diff] [blame] | 848 | void |
| 849 | MipsTargetLowering::LowerOperationWrapper(SDNode *N, |
| 850 | SmallVectorImpl<SDValue> &Results, |
| 851 | SelectionDAG &DAG) const { |
| 852 | SDValue Res = LowerOperation(SDValue(N, 0), DAG); |
| 853 | |
| 854 | for (unsigned I = 0, E = Res->getNumValues(); I != E; ++I) |
| 855 | Results.push_back(Res.getValue(I)); |
| 856 | } |
| 857 | |
| 858 | void |
| 859 | MipsTargetLowering::ReplaceNodeResults(SDNode *N, |
| 860 | SmallVectorImpl<SDValue> &Results, |
| 861 | SelectionDAG &DAG) const { |
| 862 | SDValue Res = LowerOperation(SDValue(N, 0), DAG); |
| 863 | |
| 864 | for (unsigned I = 0, E = Res->getNumValues(); I != E; ++I) |
| 865 | Results.push_back(Res.getValue(I)); |
| 866 | } |
| 867 | |
Dan Gohman | 475871a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 868 | SDValue MipsTargetLowering:: |
Dan Gohman | d858e90 | 2010-04-17 15:26:15 +0000 | [diff] [blame] | 869 | LowerOperation(SDValue Op, SelectionDAG &DAG) const |
Bruno Cardoso Lopes | 972f589 | 2007-06-06 07:42:06 +0000 | [diff] [blame] | 870 | { |
Wesley Peck | bf17cfa | 2010-11-23 03:31:01 +0000 | [diff] [blame] | 871 | switch (Op.getOpcode()) |
Bruno Cardoso Lopes | 972f589 | 2007-06-06 07:42:06 +0000 | [diff] [blame] | 872 | { |
Bruno Cardoso Lopes | 7da151c | 2008-08-07 19:08:11 +0000 | [diff] [blame] | 873 | case ISD::BRCOND: return LowerBRCOND(Op, DAG); |
Bruno Cardoso Lopes | 7da151c | 2008-08-07 19:08:11 +0000 | [diff] [blame] | 874 | case ISD::ConstantPool: return LowerConstantPool(Op, DAG); |
Bruno Cardoso Lopes | 7da151c | 2008-08-07 19:08:11 +0000 | [diff] [blame] | 875 | case ISD::GlobalAddress: return LowerGlobalAddress(Op, DAG); |
Bruno Cardoso Lopes | ca8a2aa | 2011-03-04 20:01:52 +0000 | [diff] [blame] | 876 | case ISD::BlockAddress: return LowerBlockAddress(Op, DAG); |
Bruno Cardoso Lopes | 7da151c | 2008-08-07 19:08:11 +0000 | [diff] [blame] | 877 | case ISD::GlobalTLSAddress: return LowerGlobalTLSAddress(Op, DAG); |
| 878 | case ISD::JumpTable: return LowerJumpTable(Op, DAG); |
Bruno Cardoso Lopes | 7da151c | 2008-08-07 19:08:11 +0000 | [diff] [blame] | 879 | case ISD::SELECT: return LowerSELECT(Op, DAG); |
Akira Hatanaka | 3fef29d | 2012-07-11 19:32:27 +0000 | [diff] [blame] | 880 | case ISD::SELECT_CC: return LowerSELECT_CC(Op, DAG); |
Akira Hatanaka | 0a40c23 | 2012-03-09 23:46:03 +0000 | [diff] [blame] | 881 | case ISD::SETCC: return LowerSETCC(Op, DAG); |
Bruno Cardoso Lopes | 6059b85 | 2010-02-06 21:00:02 +0000 | [diff] [blame] | 882 | case ISD::VASTART: return LowerVASTART(Op, DAG); |
Akira Hatanaka | 9c3d57c | 2011-05-25 19:32:07 +0000 | [diff] [blame] | 883 | case ISD::FCOPYSIGN: return LowerFCOPYSIGN(Op, DAG); |
Akira Hatanaka | c12a6e6 | 2012-04-11 22:49:04 +0000 | [diff] [blame] | 884 | case ISD::FABS: return LowerFABS(Op, DAG); |
Akira Hatanaka | 2e59147 | 2011-06-02 00:24:44 +0000 | [diff] [blame] | 885 | case ISD::FRAMEADDR: return LowerFRAMEADDR(Op, DAG); |
Akira Hatanaka | ba584fe | 2012-07-11 00:53:32 +0000 | [diff] [blame] | 886 | case ISD::RETURNADDR: return LowerRETURNADDR(Op, DAG); |
Akira Hatanaka | db54826 | 2011-07-19 23:30:50 +0000 | [diff] [blame] | 887 | case ISD::MEMBARRIER: return LowerMEMBARRIER(Op, DAG); |
Eli Friedman | 1464846 | 2011-07-27 22:21:52 +0000 | [diff] [blame] | 888 | case ISD::ATOMIC_FENCE: return LowerATOMIC_FENCE(Op, DAG); |
Akira Hatanaka | a284acb | 2012-05-09 00:55:21 +0000 | [diff] [blame] | 889 | case ISD::SHL_PARTS: return LowerShiftLeftParts(Op, DAG); |
| 890 | case ISD::SRA_PARTS: return LowerShiftRightParts(Op, DAG, true); |
| 891 | case ISD::SRL_PARTS: return LowerShiftRightParts(Op, DAG, false); |
Akira Hatanaka | 1cd0ec0 | 2012-06-02 00:03:49 +0000 | [diff] [blame] | 892 | case ISD::LOAD: return LowerLOAD(Op, DAG); |
| 893 | case ISD::STORE: return LowerSTORE(Op, DAG); |
Akira Hatanaka | fd89e6f | 2012-09-27 02:05:42 +0000 | [diff] [blame] | 894 | case ISD::INTRINSIC_WO_CHAIN: return LowerINTRINSIC_WO_CHAIN(Op, DAG); |
| 895 | case ISD::INTRINSIC_W_CHAIN: return LowerINTRINSIC_W_CHAIN(Op, DAG); |
Bruno Cardoso Lopes | 972f589 | 2007-06-06 07:42:06 +0000 | [diff] [blame] | 896 | } |
Dan Gohman | 475871a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 897 | return SDValue(); |
Bruno Cardoso Lopes | 972f589 | 2007-06-06 07:42:06 +0000 | [diff] [blame] | 898 | } |
| 899 | |
Akira Hatanaka | 4552c9a | 2011-04-15 21:51:11 +0000 | [diff] [blame] | 900 | //===----------------------------------------------------------------------===// |
Bruno Cardoso Lopes | 972f589 | 2007-06-06 07:42:06 +0000 | [diff] [blame] | 901 | // Lower helper functions |
Akira Hatanaka | 4552c9a | 2011-04-15 21:51:11 +0000 | [diff] [blame] | 902 | //===----------------------------------------------------------------------===// |
Bruno Cardoso Lopes | 972f589 | 2007-06-06 07:42:06 +0000 | [diff] [blame] | 903 | |
| 904 | // AddLiveIn - This helper function adds the specified physical register to the |
| 905 | // MachineFunction as a live in value. It also creates a corresponding |
| 906 | // virtual register for it. |
| 907 | static unsigned |
Craig Topper | 44d2382 | 2012-02-22 05:59:10 +0000 | [diff] [blame] | 908 | AddLiveIn(MachineFunction &MF, unsigned PReg, const TargetRegisterClass *RC) |
Bruno Cardoso Lopes | 972f589 | 2007-06-06 07:42:06 +0000 | [diff] [blame] | 909 | { |
| 910 | assert(RC->contains(PReg) && "Not the correct regclass!"); |
Chris Lattner | 84bc542 | 2007-12-31 04:13:23 +0000 | [diff] [blame] | 911 | unsigned VReg = MF.getRegInfo().createVirtualRegister(RC); |
| 912 | MF.getRegInfo().addLiveIn(PReg, VReg); |
Bruno Cardoso Lopes | 972f589 | 2007-06-06 07:42:06 +0000 | [diff] [blame] | 913 | return VReg; |
| 914 | } |
| 915 | |
Bruno Cardoso Lopes | 85e31e3 | 2008-07-28 19:11:24 +0000 | [diff] [blame] | 916 | // Get fp branch code (not opcode) from condition code. |
| 917 | static Mips::FPBranchCode GetFPBranchCodeFromCond(Mips::CondCode CC) { |
| 918 | if (CC >= Mips::FCOND_F && CC <= Mips::FCOND_NGT) |
| 919 | return Mips::BRANCH_T; |
| 920 | |
Akira Hatanaka | 8209968 | 2011-12-19 19:52:25 +0000 | [diff] [blame] | 921 | assert((CC >= Mips::FCOND_T && CC <= Mips::FCOND_GT) && |
| 922 | "Invalid CondCode."); |
Bruno Cardoso Lopes | 85e31e3 | 2008-07-28 19:11:24 +0000 | [diff] [blame] | 923 | |
Akira Hatanaka | 8209968 | 2011-12-19 19:52:25 +0000 | [diff] [blame] | 924 | return Mips::BRANCH_F; |
Bruno Cardoso Lopes | 85e31e3 | 2008-07-28 19:11:24 +0000 | [diff] [blame] | 925 | } |
Wesley Peck | bf17cfa | 2010-11-23 03:31:01 +0000 | [diff] [blame] | 926 | |
Akira Hatanaka | 8ae330a | 2011-10-17 18:53:29 +0000 | [diff] [blame] | 927 | /* |
Akira Hatanaka | 14487d4 | 2011-06-07 19:28:39 +0000 | [diff] [blame] | 928 | static MachineBasicBlock* ExpandCondMov(MachineInstr *MI, MachineBasicBlock *BB, |
| 929 | DebugLoc dl, |
Akira Hatanaka | 864f660 | 2012-06-14 21:10:56 +0000 | [diff] [blame] | 930 | const MipsSubtarget *Subtarget, |
Akira Hatanaka | 14487d4 | 2011-06-07 19:28:39 +0000 | [diff] [blame] | 931 | const TargetInstrInfo *TII, |
| 932 | bool isFPCmp, unsigned Opc) { |
| 933 | // There is no need to expand CMov instructions if target has |
| 934 | // conditional moves. |
| 935 | if (Subtarget->hasCondMov()) |
| 936 | return BB; |
| 937 | |
| 938 | // To "insert" a SELECT_CC instruction, we actually have to insert the |
| 939 | // diamond control-flow pattern. The incoming instruction knows the |
| 940 | // destination vreg to set, the condition code register to branch on, the |
| 941 | // true/false values to select between, and a branch opcode to use. |
| 942 | const BasicBlock *LLVM_BB = BB->getBasicBlock(); |
| 943 | MachineFunction::iterator It = BB; |
| 944 | ++It; |
| 945 | |
| 946 | // thisMBB: |
| 947 | // ... |
| 948 | // TrueVal = ... |
| 949 | // setcc r1, r2, r3 |
| 950 | // bNE r1, r0, copy1MBB |
| 951 | // fallthrough --> copy0MBB |
| 952 | MachineBasicBlock *thisMBB = BB; |
| 953 | MachineFunction *F = BB->getParent(); |
| 954 | MachineBasicBlock *copy0MBB = F->CreateMachineBasicBlock(LLVM_BB); |
| 955 | MachineBasicBlock *sinkMBB = F->CreateMachineBasicBlock(LLVM_BB); |
| 956 | F->insert(It, copy0MBB); |
| 957 | F->insert(It, sinkMBB); |
| 958 | |
| 959 | // Transfer the remainder of BB and its successor edges to sinkMBB. |
| 960 | sinkMBB->splice(sinkMBB->begin(), BB, |
| 961 | llvm::next(MachineBasicBlock::iterator(MI)), |
| 962 | BB->end()); |
| 963 | sinkMBB->transferSuccessorsAndUpdatePHIs(BB); |
| 964 | |
| 965 | // Next, add the true and fallthrough blocks as its successors. |
| 966 | BB->addSuccessor(copy0MBB); |
| 967 | BB->addSuccessor(sinkMBB); |
| 968 | |
| 969 | // Emit the right instruction according to the type of the operands compared |
| 970 | if (isFPCmp) |
| 971 | BuildMI(BB, dl, TII->get(Opc)).addMBB(sinkMBB); |
| 972 | else |
| 973 | BuildMI(BB, dl, TII->get(Opc)).addReg(MI->getOperand(2).getReg()) |
| 974 | .addReg(Mips::ZERO).addMBB(sinkMBB); |
| 975 | |
| 976 | // copy0MBB: |
| 977 | // %FalseValue = ... |
| 978 | // # fallthrough to sinkMBB |
| 979 | BB = copy0MBB; |
| 980 | |
| 981 | // Update machine-CFG edges |
| 982 | BB->addSuccessor(sinkMBB); |
| 983 | |
| 984 | // sinkMBB: |
| 985 | // %Result = phi [ %TrueValue, thisMBB ], [ %FalseValue, copy0MBB ] |
| 986 | // ... |
| 987 | BB = sinkMBB; |
| 988 | |
| 989 | if (isFPCmp) |
| 990 | BuildMI(*BB, BB->begin(), dl, |
| 991 | TII->get(Mips::PHI), MI->getOperand(0).getReg()) |
| 992 | .addReg(MI->getOperand(2).getReg()).addMBB(thisMBB) |
| 993 | .addReg(MI->getOperand(1).getReg()).addMBB(copy0MBB); |
| 994 | else |
| 995 | BuildMI(*BB, BB->begin(), dl, |
| 996 | TII->get(Mips::PHI), MI->getOperand(0).getReg()) |
| 997 | .addReg(MI->getOperand(3).getReg()).addMBB(thisMBB) |
| 998 | .addReg(MI->getOperand(1).getReg()).addMBB(copy0MBB); |
| 999 | |
| 1000 | MI->eraseFromParent(); // The pseudo instruction is gone now. |
| 1001 | return BB; |
| 1002 | } |
Akira Hatanaka | 8ae330a | 2011-10-17 18:53:29 +0000 | [diff] [blame] | 1003 | */ |
Akira Hatanaka | 01f7089 | 2012-09-27 02:15:57 +0000 | [diff] [blame] | 1004 | |
| 1005 | MachineBasicBlock * |
| 1006 | MipsTargetLowering::EmitBPOSGE32(MachineInstr *MI, MachineBasicBlock *BB) const{ |
| 1007 | // $bb: |
| 1008 | // bposge32_pseudo $vr0 |
| 1009 | // => |
| 1010 | // $bb: |
| 1011 | // bposge32 $tbb |
| 1012 | // $fbb: |
| 1013 | // li $vr2, 0 |
| 1014 | // b $sink |
| 1015 | // $tbb: |
| 1016 | // li $vr1, 1 |
| 1017 | // $sink: |
| 1018 | // $vr0 = phi($vr2, $fbb, $vr1, $tbb) |
| 1019 | |
| 1020 | MachineRegisterInfo &RegInfo = BB->getParent()->getRegInfo(); |
| 1021 | const TargetInstrInfo *TII = getTargetMachine().getInstrInfo(); |
| 1022 | const TargetRegisterClass *RC = &Mips::CPURegsRegClass; |
| 1023 | DebugLoc DL = MI->getDebugLoc(); |
| 1024 | const BasicBlock *LLVM_BB = BB->getBasicBlock(); |
| 1025 | MachineFunction::iterator It = llvm::next(MachineFunction::iterator(BB)); |
| 1026 | MachineFunction *F = BB->getParent(); |
| 1027 | MachineBasicBlock *FBB = F->CreateMachineBasicBlock(LLVM_BB); |
| 1028 | MachineBasicBlock *TBB = F->CreateMachineBasicBlock(LLVM_BB); |
| 1029 | MachineBasicBlock *Sink = F->CreateMachineBasicBlock(LLVM_BB); |
| 1030 | F->insert(It, FBB); |
| 1031 | F->insert(It, TBB); |
| 1032 | F->insert(It, Sink); |
| 1033 | |
| 1034 | // Transfer the remainder of BB and its successor edges to Sink. |
| 1035 | Sink->splice(Sink->begin(), BB, llvm::next(MachineBasicBlock::iterator(MI)), |
| 1036 | BB->end()); |
| 1037 | Sink->transferSuccessorsAndUpdatePHIs(BB); |
| 1038 | |
| 1039 | // Add successors. |
| 1040 | BB->addSuccessor(FBB); |
| 1041 | BB->addSuccessor(TBB); |
| 1042 | FBB->addSuccessor(Sink); |
| 1043 | TBB->addSuccessor(Sink); |
| 1044 | |
| 1045 | // Insert the real bposge32 instruction to $BB. |
| 1046 | BuildMI(BB, DL, TII->get(Mips::BPOSGE32)).addMBB(TBB); |
| 1047 | |
| 1048 | // Fill $FBB. |
| 1049 | unsigned VR2 = RegInfo.createVirtualRegister(RC); |
| 1050 | BuildMI(*FBB, FBB->end(), DL, TII->get(Mips::ADDiu), VR2) |
| 1051 | .addReg(Mips::ZERO).addImm(0); |
| 1052 | BuildMI(*FBB, FBB->end(), DL, TII->get(Mips::B)).addMBB(Sink); |
| 1053 | |
| 1054 | // Fill $TBB. |
| 1055 | unsigned VR1 = RegInfo.createVirtualRegister(RC); |
| 1056 | BuildMI(*TBB, TBB->end(), DL, TII->get(Mips::ADDiu), VR1) |
| 1057 | .addReg(Mips::ZERO).addImm(1); |
| 1058 | |
| 1059 | // Insert phi function to $Sink. |
| 1060 | BuildMI(*Sink, Sink->begin(), DL, TII->get(Mips::PHI), |
| 1061 | MI->getOperand(0).getReg()) |
| 1062 | .addReg(VR2).addMBB(FBB).addReg(VR1).addMBB(TBB); |
| 1063 | |
| 1064 | MI->eraseFromParent(); // The pseudo instruction is gone now. |
| 1065 | return Sink; |
| 1066 | } |
| 1067 | |
Bruno Cardoso Lopes | 6d399bd | 2008-07-29 19:05:28 +0000 | [diff] [blame] | 1068 | MachineBasicBlock * |
| 1069 | MipsTargetLowering::EmitInstrWithCustomInserter(MachineInstr *MI, |
Dan Gohman | af1d8ca | 2010-05-01 00:01:06 +0000 | [diff] [blame] | 1070 | MachineBasicBlock *BB) const { |
Bruno Cardoso Lopes | 6d399bd | 2008-07-29 19:05:28 +0000 | [diff] [blame] | 1071 | switch (MI->getOpcode()) { |
Craig Topper | bc21981 | 2012-02-07 02:50:20 +0000 | [diff] [blame] | 1072 | default: llvm_unreachable("Unexpected instr type to insert"); |
Bruno Cardoso Lopes | 4e694c9 | 2011-05-31 02:54:07 +0000 | [diff] [blame] | 1073 | case Mips::ATOMIC_LOAD_ADD_I8: |
Akira Hatanaka | 5906806 | 2011-11-11 04:14:30 +0000 | [diff] [blame] | 1074 | case Mips::ATOMIC_LOAD_ADD_I8_P8: |
Bruno Cardoso Lopes | 4e694c9 | 2011-05-31 02:54:07 +0000 | [diff] [blame] | 1075 | return EmitAtomicBinaryPartword(MI, BB, 1, Mips::ADDu); |
| 1076 | case Mips::ATOMIC_LOAD_ADD_I16: |
Akira Hatanaka | 5906806 | 2011-11-11 04:14:30 +0000 | [diff] [blame] | 1077 | case Mips::ATOMIC_LOAD_ADD_I16_P8: |
Bruno Cardoso Lopes | 4e694c9 | 2011-05-31 02:54:07 +0000 | [diff] [blame] | 1078 | return EmitAtomicBinaryPartword(MI, BB, 2, Mips::ADDu); |
| 1079 | case Mips::ATOMIC_LOAD_ADD_I32: |
Akira Hatanaka | 5906806 | 2011-11-11 04:14:30 +0000 | [diff] [blame] | 1080 | case Mips::ATOMIC_LOAD_ADD_I32_P8: |
Bruno Cardoso Lopes | 4e694c9 | 2011-05-31 02:54:07 +0000 | [diff] [blame] | 1081 | return EmitAtomicBinary(MI, BB, 4, Mips::ADDu); |
Akira Hatanaka | 5906806 | 2011-11-11 04:14:30 +0000 | [diff] [blame] | 1082 | case Mips::ATOMIC_LOAD_ADD_I64: |
| 1083 | case Mips::ATOMIC_LOAD_ADD_I64_P8: |
| 1084 | return EmitAtomicBinary(MI, BB, 8, Mips::DADDu); |
Bruno Cardoso Lopes | 4e694c9 | 2011-05-31 02:54:07 +0000 | [diff] [blame] | 1085 | |
| 1086 | case Mips::ATOMIC_LOAD_AND_I8: |
Akira Hatanaka | 5906806 | 2011-11-11 04:14:30 +0000 | [diff] [blame] | 1087 | case Mips::ATOMIC_LOAD_AND_I8_P8: |
Bruno Cardoso Lopes | 4e694c9 | 2011-05-31 02:54:07 +0000 | [diff] [blame] | 1088 | return EmitAtomicBinaryPartword(MI, BB, 1, Mips::AND); |
| 1089 | case Mips::ATOMIC_LOAD_AND_I16: |
Akira Hatanaka | 5906806 | 2011-11-11 04:14:30 +0000 | [diff] [blame] | 1090 | case Mips::ATOMIC_LOAD_AND_I16_P8: |
Bruno Cardoso Lopes | 4e694c9 | 2011-05-31 02:54:07 +0000 | [diff] [blame] | 1091 | return EmitAtomicBinaryPartword(MI, BB, 2, Mips::AND); |
| 1092 | case Mips::ATOMIC_LOAD_AND_I32: |
Akira Hatanaka | 5906806 | 2011-11-11 04:14:30 +0000 | [diff] [blame] | 1093 | case Mips::ATOMIC_LOAD_AND_I32_P8: |
Bruno Cardoso Lopes | 4e694c9 | 2011-05-31 02:54:07 +0000 | [diff] [blame] | 1094 | return EmitAtomicBinary(MI, BB, 4, Mips::AND); |
Akira Hatanaka | 5906806 | 2011-11-11 04:14:30 +0000 | [diff] [blame] | 1095 | case Mips::ATOMIC_LOAD_AND_I64: |
| 1096 | case Mips::ATOMIC_LOAD_AND_I64_P8: |
Akira Hatanaka | 7386612 | 2011-11-12 02:38:12 +0000 | [diff] [blame] | 1097 | return EmitAtomicBinary(MI, BB, 8, Mips::AND64); |
Bruno Cardoso Lopes | 4e694c9 | 2011-05-31 02:54:07 +0000 | [diff] [blame] | 1098 | |
| 1099 | case Mips::ATOMIC_LOAD_OR_I8: |
Akira Hatanaka | 5906806 | 2011-11-11 04:14:30 +0000 | [diff] [blame] | 1100 | case Mips::ATOMIC_LOAD_OR_I8_P8: |
Bruno Cardoso Lopes | 4e694c9 | 2011-05-31 02:54:07 +0000 | [diff] [blame] | 1101 | return EmitAtomicBinaryPartword(MI, BB, 1, Mips::OR); |
| 1102 | case Mips::ATOMIC_LOAD_OR_I16: |
Akira Hatanaka | 5906806 | 2011-11-11 04:14:30 +0000 | [diff] [blame] | 1103 | case Mips::ATOMIC_LOAD_OR_I16_P8: |
Bruno Cardoso Lopes | 4e694c9 | 2011-05-31 02:54:07 +0000 | [diff] [blame] | 1104 | return EmitAtomicBinaryPartword(MI, BB, 2, Mips::OR); |
| 1105 | case Mips::ATOMIC_LOAD_OR_I32: |
Akira Hatanaka | 5906806 | 2011-11-11 04:14:30 +0000 | [diff] [blame] | 1106 | case Mips::ATOMIC_LOAD_OR_I32_P8: |
Bruno Cardoso Lopes | 4e694c9 | 2011-05-31 02:54:07 +0000 | [diff] [blame] | 1107 | return EmitAtomicBinary(MI, BB, 4, Mips::OR); |
Akira Hatanaka | 5906806 | 2011-11-11 04:14:30 +0000 | [diff] [blame] | 1108 | case Mips::ATOMIC_LOAD_OR_I64: |
| 1109 | case Mips::ATOMIC_LOAD_OR_I64_P8: |
| 1110 | return EmitAtomicBinary(MI, BB, 8, Mips::OR64); |
Bruno Cardoso Lopes | 4e694c9 | 2011-05-31 02:54:07 +0000 | [diff] [blame] | 1111 | |
| 1112 | case Mips::ATOMIC_LOAD_XOR_I8: |
Akira Hatanaka | 5906806 | 2011-11-11 04:14:30 +0000 | [diff] [blame] | 1113 | case Mips::ATOMIC_LOAD_XOR_I8_P8: |
Bruno Cardoso Lopes | 4e694c9 | 2011-05-31 02:54:07 +0000 | [diff] [blame] | 1114 | return EmitAtomicBinaryPartword(MI, BB, 1, Mips::XOR); |
| 1115 | case Mips::ATOMIC_LOAD_XOR_I16: |
Akira Hatanaka | 5906806 | 2011-11-11 04:14:30 +0000 | [diff] [blame] | 1116 | case Mips::ATOMIC_LOAD_XOR_I16_P8: |
Bruno Cardoso Lopes | 4e694c9 | 2011-05-31 02:54:07 +0000 | [diff] [blame] | 1117 | return EmitAtomicBinaryPartword(MI, BB, 2, Mips::XOR); |
| 1118 | case Mips::ATOMIC_LOAD_XOR_I32: |
Akira Hatanaka | 5906806 | 2011-11-11 04:14:30 +0000 | [diff] [blame] | 1119 | case Mips::ATOMIC_LOAD_XOR_I32_P8: |
Bruno Cardoso Lopes | 4e694c9 | 2011-05-31 02:54:07 +0000 | [diff] [blame] | 1120 | return EmitAtomicBinary(MI, BB, 4, Mips::XOR); |
Akira Hatanaka | 5906806 | 2011-11-11 04:14:30 +0000 | [diff] [blame] | 1121 | case Mips::ATOMIC_LOAD_XOR_I64: |
| 1122 | case Mips::ATOMIC_LOAD_XOR_I64_P8: |
| 1123 | return EmitAtomicBinary(MI, BB, 8, Mips::XOR64); |
Bruno Cardoso Lopes | 4e694c9 | 2011-05-31 02:54:07 +0000 | [diff] [blame] | 1124 | |
| 1125 | case Mips::ATOMIC_LOAD_NAND_I8: |
Akira Hatanaka | 5906806 | 2011-11-11 04:14:30 +0000 | [diff] [blame] | 1126 | case Mips::ATOMIC_LOAD_NAND_I8_P8: |
Bruno Cardoso Lopes | 4e694c9 | 2011-05-31 02:54:07 +0000 | [diff] [blame] | 1127 | return EmitAtomicBinaryPartword(MI, BB, 1, 0, true); |
| 1128 | case Mips::ATOMIC_LOAD_NAND_I16: |
Akira Hatanaka | 5906806 | 2011-11-11 04:14:30 +0000 | [diff] [blame] | 1129 | case Mips::ATOMIC_LOAD_NAND_I16_P8: |
Bruno Cardoso Lopes | 4e694c9 | 2011-05-31 02:54:07 +0000 | [diff] [blame] | 1130 | return EmitAtomicBinaryPartword(MI, BB, 2, 0, true); |
| 1131 | case Mips::ATOMIC_LOAD_NAND_I32: |
Akira Hatanaka | 5906806 | 2011-11-11 04:14:30 +0000 | [diff] [blame] | 1132 | case Mips::ATOMIC_LOAD_NAND_I32_P8: |
Bruno Cardoso Lopes | 4e694c9 | 2011-05-31 02:54:07 +0000 | [diff] [blame] | 1133 | return EmitAtomicBinary(MI, BB, 4, 0, true); |
Akira Hatanaka | 5906806 | 2011-11-11 04:14:30 +0000 | [diff] [blame] | 1134 | case Mips::ATOMIC_LOAD_NAND_I64: |
| 1135 | case Mips::ATOMIC_LOAD_NAND_I64_P8: |
| 1136 | return EmitAtomicBinary(MI, BB, 8, 0, true); |
Bruno Cardoso Lopes | 4e694c9 | 2011-05-31 02:54:07 +0000 | [diff] [blame] | 1137 | |
| 1138 | case Mips::ATOMIC_LOAD_SUB_I8: |
Akira Hatanaka | 5906806 | 2011-11-11 04:14:30 +0000 | [diff] [blame] | 1139 | case Mips::ATOMIC_LOAD_SUB_I8_P8: |
Bruno Cardoso Lopes | 4e694c9 | 2011-05-31 02:54:07 +0000 | [diff] [blame] | 1140 | return EmitAtomicBinaryPartword(MI, BB, 1, Mips::SUBu); |
| 1141 | case Mips::ATOMIC_LOAD_SUB_I16: |
Akira Hatanaka | 5906806 | 2011-11-11 04:14:30 +0000 | [diff] [blame] | 1142 | case Mips::ATOMIC_LOAD_SUB_I16_P8: |
Bruno Cardoso Lopes | 4e694c9 | 2011-05-31 02:54:07 +0000 | [diff] [blame] | 1143 | return EmitAtomicBinaryPartword(MI, BB, 2, Mips::SUBu); |
| 1144 | case Mips::ATOMIC_LOAD_SUB_I32: |
Akira Hatanaka | 5906806 | 2011-11-11 04:14:30 +0000 | [diff] [blame] | 1145 | case Mips::ATOMIC_LOAD_SUB_I32_P8: |
Bruno Cardoso Lopes | 4e694c9 | 2011-05-31 02:54:07 +0000 | [diff] [blame] | 1146 | return EmitAtomicBinary(MI, BB, 4, Mips::SUBu); |
Akira Hatanaka | 5906806 | 2011-11-11 04:14:30 +0000 | [diff] [blame] | 1147 | case Mips::ATOMIC_LOAD_SUB_I64: |
| 1148 | case Mips::ATOMIC_LOAD_SUB_I64_P8: |
| 1149 | return EmitAtomicBinary(MI, BB, 8, Mips::DSUBu); |
Bruno Cardoso Lopes | 4e694c9 | 2011-05-31 02:54:07 +0000 | [diff] [blame] | 1150 | |
| 1151 | case Mips::ATOMIC_SWAP_I8: |
Akira Hatanaka | 5906806 | 2011-11-11 04:14:30 +0000 | [diff] [blame] | 1152 | case Mips::ATOMIC_SWAP_I8_P8: |
Bruno Cardoso Lopes | 4e694c9 | 2011-05-31 02:54:07 +0000 | [diff] [blame] | 1153 | return EmitAtomicBinaryPartword(MI, BB, 1, 0); |
| 1154 | case Mips::ATOMIC_SWAP_I16: |
Akira Hatanaka | 5906806 | 2011-11-11 04:14:30 +0000 | [diff] [blame] | 1155 | case Mips::ATOMIC_SWAP_I16_P8: |
Bruno Cardoso Lopes | 4e694c9 | 2011-05-31 02:54:07 +0000 | [diff] [blame] | 1156 | return EmitAtomicBinaryPartword(MI, BB, 2, 0); |
| 1157 | case Mips::ATOMIC_SWAP_I32: |
Akira Hatanaka | 5906806 | 2011-11-11 04:14:30 +0000 | [diff] [blame] | 1158 | case Mips::ATOMIC_SWAP_I32_P8: |
Bruno Cardoso Lopes | 4e694c9 | 2011-05-31 02:54:07 +0000 | [diff] [blame] | 1159 | return EmitAtomicBinary(MI, BB, 4, 0); |
Akira Hatanaka | 5906806 | 2011-11-11 04:14:30 +0000 | [diff] [blame] | 1160 | case Mips::ATOMIC_SWAP_I64: |
| 1161 | case Mips::ATOMIC_SWAP_I64_P8: |
| 1162 | return EmitAtomicBinary(MI, BB, 8, 0); |
Bruno Cardoso Lopes | 4e694c9 | 2011-05-31 02:54:07 +0000 | [diff] [blame] | 1163 | |
| 1164 | case Mips::ATOMIC_CMP_SWAP_I8: |
Akira Hatanaka | 5906806 | 2011-11-11 04:14:30 +0000 | [diff] [blame] | 1165 | case Mips::ATOMIC_CMP_SWAP_I8_P8: |
Bruno Cardoso Lopes | 4e694c9 | 2011-05-31 02:54:07 +0000 | [diff] [blame] | 1166 | return EmitAtomicCmpSwapPartword(MI, BB, 1); |
| 1167 | case Mips::ATOMIC_CMP_SWAP_I16: |
Akira Hatanaka | 5906806 | 2011-11-11 04:14:30 +0000 | [diff] [blame] | 1168 | case Mips::ATOMIC_CMP_SWAP_I16_P8: |
Bruno Cardoso Lopes | 4e694c9 | 2011-05-31 02:54:07 +0000 | [diff] [blame] | 1169 | return EmitAtomicCmpSwapPartword(MI, BB, 2); |
| 1170 | case Mips::ATOMIC_CMP_SWAP_I32: |
Akira Hatanaka | 5906806 | 2011-11-11 04:14:30 +0000 | [diff] [blame] | 1171 | case Mips::ATOMIC_CMP_SWAP_I32_P8: |
Bruno Cardoso Lopes | 4e694c9 | 2011-05-31 02:54:07 +0000 | [diff] [blame] | 1172 | return EmitAtomicCmpSwap(MI, BB, 4); |
Akira Hatanaka | 5906806 | 2011-11-11 04:14:30 +0000 | [diff] [blame] | 1173 | case Mips::ATOMIC_CMP_SWAP_I64: |
| 1174 | case Mips::ATOMIC_CMP_SWAP_I64_P8: |
| 1175 | return EmitAtomicCmpSwap(MI, BB, 8); |
Akira Hatanaka | 01f7089 | 2012-09-27 02:15:57 +0000 | [diff] [blame] | 1176 | case Mips::BPOSGE32_PSEUDO: |
| 1177 | return EmitBPOSGE32(MI, BB); |
Akira Hatanaka | 1d6b38d | 2011-03-31 18:26:17 +0000 | [diff] [blame] | 1178 | } |
Bruno Cardoso Lopes | 6d399bd | 2008-07-29 19:05:28 +0000 | [diff] [blame] | 1179 | } |
| 1180 | |
Bruno Cardoso Lopes | 4e694c9 | 2011-05-31 02:54:07 +0000 | [diff] [blame] | 1181 | // This function also handles Mips::ATOMIC_SWAP_I32 (when BinOpcode == 0), and |
| 1182 | // Mips::ATOMIC_LOAD_NAND_I32 (when Nand == true) |
| 1183 | MachineBasicBlock * |
| 1184 | MipsTargetLowering::EmitAtomicBinary(MachineInstr *MI, MachineBasicBlock *BB, |
Eric Christopher | 471e422 | 2011-06-08 23:55:35 +0000 | [diff] [blame] | 1185 | unsigned Size, unsigned BinOpcode, |
Akira Hatanaka | 0f84382 | 2011-06-07 18:58:42 +0000 | [diff] [blame] | 1186 | bool Nand) const { |
Akira Hatanaka | 5906806 | 2011-11-11 04:14:30 +0000 | [diff] [blame] | 1187 | assert((Size == 4 || Size == 8) && "Unsupported size for EmitAtomicBinary."); |
Bruno Cardoso Lopes | 4e694c9 | 2011-05-31 02:54:07 +0000 | [diff] [blame] | 1188 | |
| 1189 | MachineFunction *MF = BB->getParent(); |
| 1190 | MachineRegisterInfo &RegInfo = MF->getRegInfo(); |
Akira Hatanaka | 5906806 | 2011-11-11 04:14:30 +0000 | [diff] [blame] | 1191 | const TargetRegisterClass *RC = getRegClassFor(MVT::getIntegerVT(Size * 8)); |
Bruno Cardoso Lopes | 4e694c9 | 2011-05-31 02:54:07 +0000 | [diff] [blame] | 1192 | const TargetInstrInfo *TII = getTargetMachine().getInstrInfo(); |
| 1193 | DebugLoc dl = MI->getDebugLoc(); |
Akira Hatanaka | 5906806 | 2011-11-11 04:14:30 +0000 | [diff] [blame] | 1194 | unsigned LL, SC, AND, NOR, ZERO, BEQ; |
| 1195 | |
| 1196 | if (Size == 4) { |
| 1197 | LL = IsN64 ? Mips::LL_P8 : Mips::LL; |
| 1198 | SC = IsN64 ? Mips::SC_P8 : Mips::SC; |
| 1199 | AND = Mips::AND; |
| 1200 | NOR = Mips::NOR; |
| 1201 | ZERO = Mips::ZERO; |
| 1202 | BEQ = Mips::BEQ; |
| 1203 | } |
| 1204 | else { |
| 1205 | LL = IsN64 ? Mips::LLD_P8 : Mips::LLD; |
| 1206 | SC = IsN64 ? Mips::SCD_P8 : Mips::SCD; |
| 1207 | AND = Mips::AND64; |
| 1208 | NOR = Mips::NOR64; |
| 1209 | ZERO = Mips::ZERO_64; |
| 1210 | BEQ = Mips::BEQ64; |
| 1211 | } |
Bruno Cardoso Lopes | 4e694c9 | 2011-05-31 02:54:07 +0000 | [diff] [blame] | 1212 | |
Akira Hatanaka | 4061da1 | 2011-07-19 20:11:17 +0000 | [diff] [blame] | 1213 | unsigned OldVal = MI->getOperand(0).getReg(); |
Bruno Cardoso Lopes | 4e694c9 | 2011-05-31 02:54:07 +0000 | [diff] [blame] | 1214 | unsigned Ptr = MI->getOperand(1).getReg(); |
| 1215 | unsigned Incr = MI->getOperand(2).getReg(); |
| 1216 | |
Akira Hatanaka | 4061da1 | 2011-07-19 20:11:17 +0000 | [diff] [blame] | 1217 | unsigned StoreVal = RegInfo.createVirtualRegister(RC); |
| 1218 | unsigned AndRes = RegInfo.createVirtualRegister(RC); |
| 1219 | unsigned Success = RegInfo.createVirtualRegister(RC); |
Bruno Cardoso Lopes | 4e694c9 | 2011-05-31 02:54:07 +0000 | [diff] [blame] | 1220 | |
| 1221 | // insert new blocks after the current block |
| 1222 | const BasicBlock *LLVM_BB = BB->getBasicBlock(); |
| 1223 | MachineBasicBlock *loopMBB = MF->CreateMachineBasicBlock(LLVM_BB); |
| 1224 | MachineBasicBlock *exitMBB = MF->CreateMachineBasicBlock(LLVM_BB); |
| 1225 | MachineFunction::iterator It = BB; |
| 1226 | ++It; |
| 1227 | MF->insert(It, loopMBB); |
| 1228 | MF->insert(It, exitMBB); |
| 1229 | |
| 1230 | // Transfer the remainder of BB and its successor edges to exitMBB. |
| 1231 | exitMBB->splice(exitMBB->begin(), BB, |
| 1232 | llvm::next(MachineBasicBlock::iterator(MI)), |
| 1233 | BB->end()); |
| 1234 | exitMBB->transferSuccessorsAndUpdatePHIs(BB); |
| 1235 | |
| 1236 | // thisMBB: |
| 1237 | // ... |
Bruno Cardoso Lopes | 4e694c9 | 2011-05-31 02:54:07 +0000 | [diff] [blame] | 1238 | // fallthrough --> loopMBB |
Bruno Cardoso Lopes | 4e694c9 | 2011-05-31 02:54:07 +0000 | [diff] [blame] | 1239 | BB->addSuccessor(loopMBB); |
Akira Hatanaka | 81b4411 | 2011-07-19 17:09:53 +0000 | [diff] [blame] | 1240 | loopMBB->addSuccessor(loopMBB); |
| 1241 | loopMBB->addSuccessor(exitMBB); |
Bruno Cardoso Lopes | 4e694c9 | 2011-05-31 02:54:07 +0000 | [diff] [blame] | 1242 | |
| 1243 | // loopMBB: |
| 1244 | // ll oldval, 0(ptr) |
Akira Hatanaka | 4061da1 | 2011-07-19 20:11:17 +0000 | [diff] [blame] | 1245 | // <binop> storeval, oldval, incr |
| 1246 | // sc success, storeval, 0(ptr) |
| 1247 | // beq success, $0, loopMBB |
Bruno Cardoso Lopes | 4e694c9 | 2011-05-31 02:54:07 +0000 | [diff] [blame] | 1248 | BB = loopMBB; |
Akira Hatanaka | 5906806 | 2011-11-11 04:14:30 +0000 | [diff] [blame] | 1249 | BuildMI(BB, dl, TII->get(LL), OldVal).addReg(Ptr).addImm(0); |
Bruno Cardoso Lopes | 4e694c9 | 2011-05-31 02:54:07 +0000 | [diff] [blame] | 1250 | if (Nand) { |
Akira Hatanaka | 4061da1 | 2011-07-19 20:11:17 +0000 | [diff] [blame] | 1251 | // and andres, oldval, incr |
| 1252 | // nor storeval, $0, andres |
Akira Hatanaka | 5906806 | 2011-11-11 04:14:30 +0000 | [diff] [blame] | 1253 | BuildMI(BB, dl, TII->get(AND), AndRes).addReg(OldVal).addReg(Incr); |
| 1254 | BuildMI(BB, dl, TII->get(NOR), StoreVal).addReg(ZERO).addReg(AndRes); |
Bruno Cardoso Lopes | 4e694c9 | 2011-05-31 02:54:07 +0000 | [diff] [blame] | 1255 | } else if (BinOpcode) { |
Akira Hatanaka | 4061da1 | 2011-07-19 20:11:17 +0000 | [diff] [blame] | 1256 | // <binop> storeval, oldval, incr |
| 1257 | BuildMI(BB, dl, TII->get(BinOpcode), StoreVal).addReg(OldVal).addReg(Incr); |
Bruno Cardoso Lopes | 4e694c9 | 2011-05-31 02:54:07 +0000 | [diff] [blame] | 1258 | } else { |
Akira Hatanaka | 4061da1 | 2011-07-19 20:11:17 +0000 | [diff] [blame] | 1259 | StoreVal = Incr; |
Bruno Cardoso Lopes | 4e694c9 | 2011-05-31 02:54:07 +0000 | [diff] [blame] | 1260 | } |
Akira Hatanaka | 5906806 | 2011-11-11 04:14:30 +0000 | [diff] [blame] | 1261 | BuildMI(BB, dl, TII->get(SC), Success).addReg(StoreVal).addReg(Ptr).addImm(0); |
| 1262 | BuildMI(BB, dl, TII->get(BEQ)).addReg(Success).addReg(ZERO).addMBB(loopMBB); |
Bruno Cardoso Lopes | 4e694c9 | 2011-05-31 02:54:07 +0000 | [diff] [blame] | 1263 | |
| 1264 | MI->eraseFromParent(); // The instruction is gone now. |
| 1265 | |
Akira Hatanaka | 939ece1 | 2011-07-19 03:42:13 +0000 | [diff] [blame] | 1266 | return exitMBB; |
Bruno Cardoso Lopes | 4e694c9 | 2011-05-31 02:54:07 +0000 | [diff] [blame] | 1267 | } |
| 1268 | |
| 1269 | MachineBasicBlock * |
| 1270 | MipsTargetLowering::EmitAtomicBinaryPartword(MachineInstr *MI, |
Akira Hatanaka | 0f84382 | 2011-06-07 18:58:42 +0000 | [diff] [blame] | 1271 | MachineBasicBlock *BB, |
| 1272 | unsigned Size, unsigned BinOpcode, |
| 1273 | bool Nand) const { |
Bruno Cardoso Lopes | 4e694c9 | 2011-05-31 02:54:07 +0000 | [diff] [blame] | 1274 | assert((Size == 1 || Size == 2) && |
| 1275 | "Unsupported size for EmitAtomicBinaryPartial."); |
| 1276 | |
| 1277 | MachineFunction *MF = BB->getParent(); |
| 1278 | MachineRegisterInfo &RegInfo = MF->getRegInfo(); |
| 1279 | const TargetRegisterClass *RC = getRegClassFor(MVT::i32); |
| 1280 | const TargetInstrInfo *TII = getTargetMachine().getInstrInfo(); |
| 1281 | DebugLoc dl = MI->getDebugLoc(); |
Akira Hatanaka | 5906806 | 2011-11-11 04:14:30 +0000 | [diff] [blame] | 1282 | unsigned LL = IsN64 ? Mips::LL_P8 : Mips::LL; |
| 1283 | unsigned SC = IsN64 ? Mips::SC_P8 : Mips::SC; |
Bruno Cardoso Lopes | 4e694c9 | 2011-05-31 02:54:07 +0000 | [diff] [blame] | 1284 | |
| 1285 | unsigned Dest = MI->getOperand(0).getReg(); |
| 1286 | unsigned Ptr = MI->getOperand(1).getReg(); |
| 1287 | unsigned Incr = MI->getOperand(2).getReg(); |
| 1288 | |
Akira Hatanaka | 4061da1 | 2011-07-19 20:11:17 +0000 | [diff] [blame] | 1289 | unsigned AlignedAddr = RegInfo.createVirtualRegister(RC); |
| 1290 | unsigned ShiftAmt = RegInfo.createVirtualRegister(RC); |
Bruno Cardoso Lopes | 4e694c9 | 2011-05-31 02:54:07 +0000 | [diff] [blame] | 1291 | unsigned Mask = RegInfo.createVirtualRegister(RC); |
| 1292 | unsigned Mask2 = RegInfo.createVirtualRegister(RC); |
Akira Hatanaka | 4061da1 | 2011-07-19 20:11:17 +0000 | [diff] [blame] | 1293 | unsigned NewVal = RegInfo.createVirtualRegister(RC); |
| 1294 | unsigned OldVal = RegInfo.createVirtualRegister(RC); |
Bruno Cardoso Lopes | 4e694c9 | 2011-05-31 02:54:07 +0000 | [diff] [blame] | 1295 | unsigned Incr2 = RegInfo.createVirtualRegister(RC); |
Akira Hatanaka | 4061da1 | 2011-07-19 20:11:17 +0000 | [diff] [blame] | 1296 | unsigned MaskLSB2 = RegInfo.createVirtualRegister(RC); |
| 1297 | unsigned PtrLSB2 = RegInfo.createVirtualRegister(RC); |
| 1298 | unsigned MaskUpper = RegInfo.createVirtualRegister(RC); |
| 1299 | unsigned AndRes = RegInfo.createVirtualRegister(RC); |
| 1300 | unsigned BinOpRes = RegInfo.createVirtualRegister(RC); |
Akira Hatanaka | bdd83fe | 2011-07-19 20:56:53 +0000 | [diff] [blame] | 1301 | unsigned MaskedOldVal0 = RegInfo.createVirtualRegister(RC); |
Akira Hatanaka | 4061da1 | 2011-07-19 20:11:17 +0000 | [diff] [blame] | 1302 | unsigned StoreVal = RegInfo.createVirtualRegister(RC); |
| 1303 | unsigned MaskedOldVal1 = RegInfo.createVirtualRegister(RC); |
| 1304 | unsigned SrlRes = RegInfo.createVirtualRegister(RC); |
| 1305 | unsigned SllRes = RegInfo.createVirtualRegister(RC); |
| 1306 | unsigned Success = RegInfo.createVirtualRegister(RC); |
Bruno Cardoso Lopes | 4e694c9 | 2011-05-31 02:54:07 +0000 | [diff] [blame] | 1307 | |
| 1308 | // insert new blocks after the current block |
| 1309 | const BasicBlock *LLVM_BB = BB->getBasicBlock(); |
| 1310 | MachineBasicBlock *loopMBB = MF->CreateMachineBasicBlock(LLVM_BB); |
Akira Hatanaka | 939ece1 | 2011-07-19 03:42:13 +0000 | [diff] [blame] | 1311 | MachineBasicBlock *sinkMBB = MF->CreateMachineBasicBlock(LLVM_BB); |
Bruno Cardoso Lopes | 4e694c9 | 2011-05-31 02:54:07 +0000 | [diff] [blame] | 1312 | MachineBasicBlock *exitMBB = MF->CreateMachineBasicBlock(LLVM_BB); |
| 1313 | MachineFunction::iterator It = BB; |
| 1314 | ++It; |
| 1315 | MF->insert(It, loopMBB); |
Akira Hatanaka | 939ece1 | 2011-07-19 03:42:13 +0000 | [diff] [blame] | 1316 | MF->insert(It, sinkMBB); |
Bruno Cardoso Lopes | 4e694c9 | 2011-05-31 02:54:07 +0000 | [diff] [blame] | 1317 | MF->insert(It, exitMBB); |
| 1318 | |
| 1319 | // Transfer the remainder of BB and its successor edges to exitMBB. |
| 1320 | exitMBB->splice(exitMBB->begin(), BB, |
Akira Hatanaka | 8209968 | 2011-12-19 19:52:25 +0000 | [diff] [blame] | 1321 | llvm::next(MachineBasicBlock::iterator(MI)), BB->end()); |
Bruno Cardoso Lopes | 4e694c9 | 2011-05-31 02:54:07 +0000 | [diff] [blame] | 1322 | exitMBB->transferSuccessorsAndUpdatePHIs(BB); |
| 1323 | |
Akira Hatanaka | 81b4411 | 2011-07-19 17:09:53 +0000 | [diff] [blame] | 1324 | BB->addSuccessor(loopMBB); |
| 1325 | loopMBB->addSuccessor(loopMBB); |
| 1326 | loopMBB->addSuccessor(sinkMBB); |
| 1327 | sinkMBB->addSuccessor(exitMBB); |
| 1328 | |
Bruno Cardoso Lopes | 4e694c9 | 2011-05-31 02:54:07 +0000 | [diff] [blame] | 1329 | // thisMBB: |
Akira Hatanaka | 4061da1 | 2011-07-19 20:11:17 +0000 | [diff] [blame] | 1330 | // addiu masklsb2,$0,-4 # 0xfffffffc |
| 1331 | // and alignedaddr,ptr,masklsb2 |
| 1332 | // andi ptrlsb2,ptr,3 |
| 1333 | // sll shiftamt,ptrlsb2,3 |
| 1334 | // ori maskupper,$0,255 # 0xff |
| 1335 | // sll mask,maskupper,shiftamt |
Bruno Cardoso Lopes | 4e694c9 | 2011-05-31 02:54:07 +0000 | [diff] [blame] | 1336 | // nor mask2,$0,mask |
Akira Hatanaka | 4061da1 | 2011-07-19 20:11:17 +0000 | [diff] [blame] | 1337 | // sll incr2,incr,shiftamt |
Bruno Cardoso Lopes | 4e694c9 | 2011-05-31 02:54:07 +0000 | [diff] [blame] | 1338 | |
| 1339 | int64_t MaskImm = (Size == 1) ? 255 : 65535; |
Akira Hatanaka | 4061da1 | 2011-07-19 20:11:17 +0000 | [diff] [blame] | 1340 | BuildMI(BB, dl, TII->get(Mips::ADDiu), MaskLSB2) |
| 1341 | .addReg(Mips::ZERO).addImm(-4); |
| 1342 | BuildMI(BB, dl, TII->get(Mips::AND), AlignedAddr) |
| 1343 | .addReg(Ptr).addReg(MaskLSB2); |
| 1344 | BuildMI(BB, dl, TII->get(Mips::ANDi), PtrLSB2).addReg(Ptr).addImm(3); |
| 1345 | BuildMI(BB, dl, TII->get(Mips::SLL), ShiftAmt).addReg(PtrLSB2).addImm(3); |
| 1346 | BuildMI(BB, dl, TII->get(Mips::ORi), MaskUpper) |
| 1347 | .addReg(Mips::ZERO).addImm(MaskImm); |
Akira Hatanaka | cc7ecc7 | 2011-07-19 20:34:00 +0000 | [diff] [blame] | 1348 | BuildMI(BB, dl, TII->get(Mips::SLLV), Mask) |
| 1349 | .addReg(ShiftAmt).addReg(MaskUpper); |
Bruno Cardoso Lopes | 4e694c9 | 2011-05-31 02:54:07 +0000 | [diff] [blame] | 1350 | BuildMI(BB, dl, TII->get(Mips::NOR), Mask2).addReg(Mips::ZERO).addReg(Mask); |
Akira Hatanaka | cc7ecc7 | 2011-07-19 20:34:00 +0000 | [diff] [blame] | 1351 | BuildMI(BB, dl, TII->get(Mips::SLLV), Incr2).addReg(ShiftAmt).addReg(Incr); |
Bruno Cardoso Lopes | cada2d0 | 2011-05-31 20:25:26 +0000 | [diff] [blame] | 1352 | |
Akira Hatanaka | 0d7d0b5 | 2011-07-18 18:52:12 +0000 | [diff] [blame] | 1353 | // atomic.load.binop |
Bruno Cardoso Lopes | 4e694c9 | 2011-05-31 02:54:07 +0000 | [diff] [blame] | 1354 | // loopMBB: |
Akira Hatanaka | 4061da1 | 2011-07-19 20:11:17 +0000 | [diff] [blame] | 1355 | // ll oldval,0(alignedaddr) |
| 1356 | // binop binopres,oldval,incr2 |
| 1357 | // and newval,binopres,mask |
| 1358 | // and maskedoldval0,oldval,mask2 |
| 1359 | // or storeval,maskedoldval0,newval |
| 1360 | // sc success,storeval,0(alignedaddr) |
| 1361 | // beq success,$0,loopMBB |
| 1362 | |
Akira Hatanaka | 0d7d0b5 | 2011-07-18 18:52:12 +0000 | [diff] [blame] | 1363 | // atomic.swap |
| 1364 | // loopMBB: |
Akira Hatanaka | 4061da1 | 2011-07-19 20:11:17 +0000 | [diff] [blame] | 1365 | // ll oldval,0(alignedaddr) |
Akira Hatanaka | 70564a9 | 2011-07-19 18:14:26 +0000 | [diff] [blame] | 1366 | // and newval,incr2,mask |
Akira Hatanaka | 4061da1 | 2011-07-19 20:11:17 +0000 | [diff] [blame] | 1367 | // and maskedoldval0,oldval,mask2 |
| 1368 | // or storeval,maskedoldval0,newval |
| 1369 | // sc success,storeval,0(alignedaddr) |
| 1370 | // beq success,$0,loopMBB |
Akira Hatanaka | 0d7d0b5 | 2011-07-18 18:52:12 +0000 | [diff] [blame] | 1371 | |
Bruno Cardoso Lopes | 4e694c9 | 2011-05-31 02:54:07 +0000 | [diff] [blame] | 1372 | BB = loopMBB; |
Akira Hatanaka | 5906806 | 2011-11-11 04:14:30 +0000 | [diff] [blame] | 1373 | BuildMI(BB, dl, TII->get(LL), OldVal).addReg(AlignedAddr).addImm(0); |
Bruno Cardoso Lopes | 4e694c9 | 2011-05-31 02:54:07 +0000 | [diff] [blame] | 1374 | if (Nand) { |
Akira Hatanaka | 4061da1 | 2011-07-19 20:11:17 +0000 | [diff] [blame] | 1375 | // and andres, oldval, incr2 |
| 1376 | // nor binopres, $0, andres |
| 1377 | // and newval, binopres, mask |
| 1378 | BuildMI(BB, dl, TII->get(Mips::AND), AndRes).addReg(OldVal).addReg(Incr2); |
| 1379 | BuildMI(BB, dl, TII->get(Mips::NOR), BinOpRes) |
| 1380 | .addReg(Mips::ZERO).addReg(AndRes); |
| 1381 | BuildMI(BB, dl, TII->get(Mips::AND), NewVal).addReg(BinOpRes).addReg(Mask); |
Bruno Cardoso Lopes | 4e694c9 | 2011-05-31 02:54:07 +0000 | [diff] [blame] | 1382 | } else if (BinOpcode) { |
Akira Hatanaka | 4061da1 | 2011-07-19 20:11:17 +0000 | [diff] [blame] | 1383 | // <binop> binopres, oldval, incr2 |
| 1384 | // and newval, binopres, mask |
| 1385 | BuildMI(BB, dl, TII->get(BinOpcode), BinOpRes).addReg(OldVal).addReg(Incr2); |
| 1386 | BuildMI(BB, dl, TII->get(Mips::AND), NewVal).addReg(BinOpRes).addReg(Mask); |
Akira Hatanaka | 70564a9 | 2011-07-19 18:14:26 +0000 | [diff] [blame] | 1387 | } else {// atomic.swap |
Akira Hatanaka | 4061da1 | 2011-07-19 20:11:17 +0000 | [diff] [blame] | 1388 | // and newval, incr2, mask |
Akira Hatanaka | cc7ecc7 | 2011-07-19 20:34:00 +0000 | [diff] [blame] | 1389 | BuildMI(BB, dl, TII->get(Mips::AND), NewVal).addReg(Incr2).addReg(Mask); |
Akira Hatanaka | 70564a9 | 2011-07-19 18:14:26 +0000 | [diff] [blame] | 1390 | } |
Jia Liu | bb481f8 | 2012-02-28 07:46:26 +0000 | [diff] [blame] | 1391 | |
Akira Hatanaka | bdd83fe | 2011-07-19 20:56:53 +0000 | [diff] [blame] | 1392 | BuildMI(BB, dl, TII->get(Mips::AND), MaskedOldVal0) |
Akira Hatanaka | 4061da1 | 2011-07-19 20:11:17 +0000 | [diff] [blame] | 1393 | .addReg(OldVal).addReg(Mask2); |
| 1394 | BuildMI(BB, dl, TII->get(Mips::OR), StoreVal) |
Akira Hatanaka | bdd83fe | 2011-07-19 20:56:53 +0000 | [diff] [blame] | 1395 | .addReg(MaskedOldVal0).addReg(NewVal); |
Akira Hatanaka | 5906806 | 2011-11-11 04:14:30 +0000 | [diff] [blame] | 1396 | BuildMI(BB, dl, TII->get(SC), Success) |
Akira Hatanaka | 4061da1 | 2011-07-19 20:11:17 +0000 | [diff] [blame] | 1397 | .addReg(StoreVal).addReg(AlignedAddr).addImm(0); |
Bruno Cardoso Lopes | 4e694c9 | 2011-05-31 02:54:07 +0000 | [diff] [blame] | 1398 | BuildMI(BB, dl, TII->get(Mips::BEQ)) |
Akira Hatanaka | 4061da1 | 2011-07-19 20:11:17 +0000 | [diff] [blame] | 1399 | .addReg(Success).addReg(Mips::ZERO).addMBB(loopMBB); |
Bruno Cardoso Lopes | 4e694c9 | 2011-05-31 02:54:07 +0000 | [diff] [blame] | 1400 | |
Akira Hatanaka | 939ece1 | 2011-07-19 03:42:13 +0000 | [diff] [blame] | 1401 | // sinkMBB: |
Akira Hatanaka | 4061da1 | 2011-07-19 20:11:17 +0000 | [diff] [blame] | 1402 | // and maskedoldval1,oldval,mask |
| 1403 | // srl srlres,maskedoldval1,shiftamt |
| 1404 | // sll sllres,srlres,24 |
| 1405 | // sra dest,sllres,24 |
Akira Hatanaka | 939ece1 | 2011-07-19 03:42:13 +0000 | [diff] [blame] | 1406 | BB = sinkMBB; |
Bruno Cardoso Lopes | 4e694c9 | 2011-05-31 02:54:07 +0000 | [diff] [blame] | 1407 | int64_t ShiftImm = (Size == 1) ? 24 : 16; |
Akira Hatanaka | a308c67 | 2011-07-19 03:14:58 +0000 | [diff] [blame] | 1408 | |
Akira Hatanaka | 4061da1 | 2011-07-19 20:11:17 +0000 | [diff] [blame] | 1409 | BuildMI(BB, dl, TII->get(Mips::AND), MaskedOldVal1) |
| 1410 | .addReg(OldVal).addReg(Mask); |
Akira Hatanaka | cc7ecc7 | 2011-07-19 20:34:00 +0000 | [diff] [blame] | 1411 | BuildMI(BB, dl, TII->get(Mips::SRLV), SrlRes) |
| 1412 | .addReg(ShiftAmt).addReg(MaskedOldVal1); |
Akira Hatanaka | 4061da1 | 2011-07-19 20:11:17 +0000 | [diff] [blame] | 1413 | BuildMI(BB, dl, TII->get(Mips::SLL), SllRes) |
| 1414 | .addReg(SrlRes).addImm(ShiftImm); |
Akira Hatanaka | 939ece1 | 2011-07-19 03:42:13 +0000 | [diff] [blame] | 1415 | BuildMI(BB, dl, TII->get(Mips::SRA), Dest) |
Akira Hatanaka | 4061da1 | 2011-07-19 20:11:17 +0000 | [diff] [blame] | 1416 | .addReg(SllRes).addImm(ShiftImm); |
Bruno Cardoso Lopes | 4e694c9 | 2011-05-31 02:54:07 +0000 | [diff] [blame] | 1417 | |
| 1418 | MI->eraseFromParent(); // The instruction is gone now. |
| 1419 | |
Akira Hatanaka | 939ece1 | 2011-07-19 03:42:13 +0000 | [diff] [blame] | 1420 | return exitMBB; |
Bruno Cardoso Lopes | 4e694c9 | 2011-05-31 02:54:07 +0000 | [diff] [blame] | 1421 | } |
| 1422 | |
| 1423 | MachineBasicBlock * |
| 1424 | MipsTargetLowering::EmitAtomicCmpSwap(MachineInstr *MI, |
Akira Hatanaka | 0f84382 | 2011-06-07 18:58:42 +0000 | [diff] [blame] | 1425 | MachineBasicBlock *BB, |
| 1426 | unsigned Size) const { |
Akira Hatanaka | 5906806 | 2011-11-11 04:14:30 +0000 | [diff] [blame] | 1427 | assert((Size == 4 || Size == 8) && "Unsupported size for EmitAtomicCmpSwap."); |
Bruno Cardoso Lopes | 4e694c9 | 2011-05-31 02:54:07 +0000 | [diff] [blame] | 1428 | |
| 1429 | MachineFunction *MF = BB->getParent(); |
| 1430 | MachineRegisterInfo &RegInfo = MF->getRegInfo(); |
Akira Hatanaka | 5906806 | 2011-11-11 04:14:30 +0000 | [diff] [blame] | 1431 | const TargetRegisterClass *RC = getRegClassFor(MVT::getIntegerVT(Size * 8)); |
Bruno Cardoso Lopes | 4e694c9 | 2011-05-31 02:54:07 +0000 | [diff] [blame] | 1432 | const TargetInstrInfo *TII = getTargetMachine().getInstrInfo(); |
| 1433 | DebugLoc dl = MI->getDebugLoc(); |
Akira Hatanaka | 5906806 | 2011-11-11 04:14:30 +0000 | [diff] [blame] | 1434 | unsigned LL, SC, ZERO, BNE, BEQ; |
| 1435 | |
| 1436 | if (Size == 4) { |
| 1437 | LL = IsN64 ? Mips::LL_P8 : Mips::LL; |
| 1438 | SC = IsN64 ? Mips::SC_P8 : Mips::SC; |
| 1439 | ZERO = Mips::ZERO; |
| 1440 | BNE = Mips::BNE; |
| 1441 | BEQ = Mips::BEQ; |
| 1442 | } |
| 1443 | else { |
| 1444 | LL = IsN64 ? Mips::LLD_P8 : Mips::LLD; |
| 1445 | SC = IsN64 ? Mips::SCD_P8 : Mips::SCD; |
| 1446 | ZERO = Mips::ZERO_64; |
| 1447 | BNE = Mips::BNE64; |
| 1448 | BEQ = Mips::BEQ64; |
| 1449 | } |
Bruno Cardoso Lopes | 4e694c9 | 2011-05-31 02:54:07 +0000 | [diff] [blame] | 1450 | |
| 1451 | unsigned Dest = MI->getOperand(0).getReg(); |
| 1452 | unsigned Ptr = MI->getOperand(1).getReg(); |
Akira Hatanaka | 4061da1 | 2011-07-19 20:11:17 +0000 | [diff] [blame] | 1453 | unsigned OldVal = MI->getOperand(2).getReg(); |
| 1454 | unsigned NewVal = MI->getOperand(3).getReg(); |
Bruno Cardoso Lopes | 4e694c9 | 2011-05-31 02:54:07 +0000 | [diff] [blame] | 1455 | |
Akira Hatanaka | 4061da1 | 2011-07-19 20:11:17 +0000 | [diff] [blame] | 1456 | unsigned Success = RegInfo.createVirtualRegister(RC); |
Bruno Cardoso Lopes | 4e694c9 | 2011-05-31 02:54:07 +0000 | [diff] [blame] | 1457 | |
| 1458 | // insert new blocks after the current block |
| 1459 | const BasicBlock *LLVM_BB = BB->getBasicBlock(); |
| 1460 | MachineBasicBlock *loop1MBB = MF->CreateMachineBasicBlock(LLVM_BB); |
| 1461 | MachineBasicBlock *loop2MBB = MF->CreateMachineBasicBlock(LLVM_BB); |
| 1462 | MachineBasicBlock *exitMBB = MF->CreateMachineBasicBlock(LLVM_BB); |
| 1463 | MachineFunction::iterator It = BB; |
| 1464 | ++It; |
| 1465 | MF->insert(It, loop1MBB); |
| 1466 | MF->insert(It, loop2MBB); |
| 1467 | MF->insert(It, exitMBB); |
| 1468 | |
| 1469 | // Transfer the remainder of BB and its successor edges to exitMBB. |
| 1470 | exitMBB->splice(exitMBB->begin(), BB, |
Akira Hatanaka | 8209968 | 2011-12-19 19:52:25 +0000 | [diff] [blame] | 1471 | llvm::next(MachineBasicBlock::iterator(MI)), BB->end()); |
Bruno Cardoso Lopes | 4e694c9 | 2011-05-31 02:54:07 +0000 | [diff] [blame] | 1472 | exitMBB->transferSuccessorsAndUpdatePHIs(BB); |
| 1473 | |
Bruno Cardoso Lopes | 4e694c9 | 2011-05-31 02:54:07 +0000 | [diff] [blame] | 1474 | // thisMBB: |
| 1475 | // ... |
Bruno Cardoso Lopes | 4e694c9 | 2011-05-31 02:54:07 +0000 | [diff] [blame] | 1476 | // fallthrough --> loop1MBB |
Bruno Cardoso Lopes | 4e694c9 | 2011-05-31 02:54:07 +0000 | [diff] [blame] | 1477 | BB->addSuccessor(loop1MBB); |
Akira Hatanaka | 81b4411 | 2011-07-19 17:09:53 +0000 | [diff] [blame] | 1478 | loop1MBB->addSuccessor(exitMBB); |
| 1479 | loop1MBB->addSuccessor(loop2MBB); |
| 1480 | loop2MBB->addSuccessor(loop1MBB); |
| 1481 | loop2MBB->addSuccessor(exitMBB); |
Bruno Cardoso Lopes | 4e694c9 | 2011-05-31 02:54:07 +0000 | [diff] [blame] | 1482 | |
| 1483 | // loop1MBB: |
| 1484 | // ll dest, 0(ptr) |
| 1485 | // bne dest, oldval, exitMBB |
| 1486 | BB = loop1MBB; |
Akira Hatanaka | 5906806 | 2011-11-11 04:14:30 +0000 | [diff] [blame] | 1487 | BuildMI(BB, dl, TII->get(LL), Dest).addReg(Ptr).addImm(0); |
| 1488 | BuildMI(BB, dl, TII->get(BNE)) |
Akira Hatanaka | 4061da1 | 2011-07-19 20:11:17 +0000 | [diff] [blame] | 1489 | .addReg(Dest).addReg(OldVal).addMBB(exitMBB); |
Bruno Cardoso Lopes | 4e694c9 | 2011-05-31 02:54:07 +0000 | [diff] [blame] | 1490 | |
| 1491 | // loop2MBB: |
Akira Hatanaka | 4061da1 | 2011-07-19 20:11:17 +0000 | [diff] [blame] | 1492 | // sc success, newval, 0(ptr) |
| 1493 | // beq success, $0, loop1MBB |
Bruno Cardoso Lopes | 4e694c9 | 2011-05-31 02:54:07 +0000 | [diff] [blame] | 1494 | BB = loop2MBB; |
Akira Hatanaka | 5906806 | 2011-11-11 04:14:30 +0000 | [diff] [blame] | 1495 | BuildMI(BB, dl, TII->get(SC), Success) |
Akira Hatanaka | 4061da1 | 2011-07-19 20:11:17 +0000 | [diff] [blame] | 1496 | .addReg(NewVal).addReg(Ptr).addImm(0); |
Akira Hatanaka | 5906806 | 2011-11-11 04:14:30 +0000 | [diff] [blame] | 1497 | BuildMI(BB, dl, TII->get(BEQ)) |
| 1498 | .addReg(Success).addReg(ZERO).addMBB(loop1MBB); |
Bruno Cardoso Lopes | 4e694c9 | 2011-05-31 02:54:07 +0000 | [diff] [blame] | 1499 | |
| 1500 | MI->eraseFromParent(); // The instruction is gone now. |
| 1501 | |
Akira Hatanaka | 939ece1 | 2011-07-19 03:42:13 +0000 | [diff] [blame] | 1502 | return exitMBB; |
Bruno Cardoso Lopes | 4e694c9 | 2011-05-31 02:54:07 +0000 | [diff] [blame] | 1503 | } |
| 1504 | |
| 1505 | MachineBasicBlock * |
| 1506 | MipsTargetLowering::EmitAtomicCmpSwapPartword(MachineInstr *MI, |
Akira Hatanaka | 0f84382 | 2011-06-07 18:58:42 +0000 | [diff] [blame] | 1507 | MachineBasicBlock *BB, |
| 1508 | unsigned Size) const { |
Bruno Cardoso Lopes | 4e694c9 | 2011-05-31 02:54:07 +0000 | [diff] [blame] | 1509 | assert((Size == 1 || Size == 2) && |
| 1510 | "Unsupported size for EmitAtomicCmpSwapPartial."); |
| 1511 | |
| 1512 | MachineFunction *MF = BB->getParent(); |
| 1513 | MachineRegisterInfo &RegInfo = MF->getRegInfo(); |
| 1514 | const TargetRegisterClass *RC = getRegClassFor(MVT::i32); |
| 1515 | const TargetInstrInfo *TII = getTargetMachine().getInstrInfo(); |
| 1516 | DebugLoc dl = MI->getDebugLoc(); |
Akira Hatanaka | 5906806 | 2011-11-11 04:14:30 +0000 | [diff] [blame] | 1517 | unsigned LL = IsN64 ? Mips::LL_P8 : Mips::LL; |
| 1518 | unsigned SC = IsN64 ? Mips::SC_P8 : Mips::SC; |
Bruno Cardoso Lopes | 4e694c9 | 2011-05-31 02:54:07 +0000 | [diff] [blame] | 1519 | |
| 1520 | unsigned Dest = MI->getOperand(0).getReg(); |
| 1521 | unsigned Ptr = MI->getOperand(1).getReg(); |
Akira Hatanaka | 4061da1 | 2011-07-19 20:11:17 +0000 | [diff] [blame] | 1522 | unsigned CmpVal = MI->getOperand(2).getReg(); |
| 1523 | unsigned NewVal = MI->getOperand(3).getReg(); |
Bruno Cardoso Lopes | 4e694c9 | 2011-05-31 02:54:07 +0000 | [diff] [blame] | 1524 | |
Akira Hatanaka | 4061da1 | 2011-07-19 20:11:17 +0000 | [diff] [blame] | 1525 | unsigned AlignedAddr = RegInfo.createVirtualRegister(RC); |
| 1526 | unsigned ShiftAmt = RegInfo.createVirtualRegister(RC); |
Bruno Cardoso Lopes | 4e694c9 | 2011-05-31 02:54:07 +0000 | [diff] [blame] | 1527 | unsigned Mask = RegInfo.createVirtualRegister(RC); |
| 1528 | unsigned Mask2 = RegInfo.createVirtualRegister(RC); |
Akira Hatanaka | 4061da1 | 2011-07-19 20:11:17 +0000 | [diff] [blame] | 1529 | unsigned ShiftedCmpVal = RegInfo.createVirtualRegister(RC); |
| 1530 | unsigned OldVal = RegInfo.createVirtualRegister(RC); |
| 1531 | unsigned MaskedOldVal0 = RegInfo.createVirtualRegister(RC); |
| 1532 | unsigned ShiftedNewVal = RegInfo.createVirtualRegister(RC); |
| 1533 | unsigned MaskLSB2 = RegInfo.createVirtualRegister(RC); |
| 1534 | unsigned PtrLSB2 = RegInfo.createVirtualRegister(RC); |
| 1535 | unsigned MaskUpper = RegInfo.createVirtualRegister(RC); |
| 1536 | unsigned MaskedCmpVal = RegInfo.createVirtualRegister(RC); |
| 1537 | unsigned MaskedNewVal = RegInfo.createVirtualRegister(RC); |
| 1538 | unsigned MaskedOldVal1 = RegInfo.createVirtualRegister(RC); |
| 1539 | unsigned StoreVal = RegInfo.createVirtualRegister(RC); |
| 1540 | unsigned SrlRes = RegInfo.createVirtualRegister(RC); |
| 1541 | unsigned SllRes = RegInfo.createVirtualRegister(RC); |
| 1542 | unsigned Success = RegInfo.createVirtualRegister(RC); |
Bruno Cardoso Lopes | 4e694c9 | 2011-05-31 02:54:07 +0000 | [diff] [blame] | 1543 | |
| 1544 | // insert new blocks after the current block |
| 1545 | const BasicBlock *LLVM_BB = BB->getBasicBlock(); |
| 1546 | MachineBasicBlock *loop1MBB = MF->CreateMachineBasicBlock(LLVM_BB); |
| 1547 | MachineBasicBlock *loop2MBB = MF->CreateMachineBasicBlock(LLVM_BB); |
Akira Hatanaka | 939ece1 | 2011-07-19 03:42:13 +0000 | [diff] [blame] | 1548 | MachineBasicBlock *sinkMBB = MF->CreateMachineBasicBlock(LLVM_BB); |
Bruno Cardoso Lopes | 4e694c9 | 2011-05-31 02:54:07 +0000 | [diff] [blame] | 1549 | MachineBasicBlock *exitMBB = MF->CreateMachineBasicBlock(LLVM_BB); |
| 1550 | MachineFunction::iterator It = BB; |
| 1551 | ++It; |
| 1552 | MF->insert(It, loop1MBB); |
| 1553 | MF->insert(It, loop2MBB); |
Akira Hatanaka | 939ece1 | 2011-07-19 03:42:13 +0000 | [diff] [blame] | 1554 | MF->insert(It, sinkMBB); |
Bruno Cardoso Lopes | 4e694c9 | 2011-05-31 02:54:07 +0000 | [diff] [blame] | 1555 | MF->insert(It, exitMBB); |
| 1556 | |
| 1557 | // Transfer the remainder of BB and its successor edges to exitMBB. |
| 1558 | exitMBB->splice(exitMBB->begin(), BB, |
Akira Hatanaka | 8209968 | 2011-12-19 19:52:25 +0000 | [diff] [blame] | 1559 | llvm::next(MachineBasicBlock::iterator(MI)), BB->end()); |
Bruno Cardoso Lopes | 4e694c9 | 2011-05-31 02:54:07 +0000 | [diff] [blame] | 1560 | exitMBB->transferSuccessorsAndUpdatePHIs(BB); |
| 1561 | |
Akira Hatanaka | 81b4411 | 2011-07-19 17:09:53 +0000 | [diff] [blame] | 1562 | BB->addSuccessor(loop1MBB); |
| 1563 | loop1MBB->addSuccessor(sinkMBB); |
| 1564 | loop1MBB->addSuccessor(loop2MBB); |
| 1565 | loop2MBB->addSuccessor(loop1MBB); |
| 1566 | loop2MBB->addSuccessor(sinkMBB); |
| 1567 | sinkMBB->addSuccessor(exitMBB); |
| 1568 | |
Akira Hatanaka | 70564a9 | 2011-07-19 18:14:26 +0000 | [diff] [blame] | 1569 | // FIXME: computation of newval2 can be moved to loop2MBB. |
Bruno Cardoso Lopes | 4e694c9 | 2011-05-31 02:54:07 +0000 | [diff] [blame] | 1570 | // thisMBB: |
Akira Hatanaka | 4061da1 | 2011-07-19 20:11:17 +0000 | [diff] [blame] | 1571 | // addiu masklsb2,$0,-4 # 0xfffffffc |
| 1572 | // and alignedaddr,ptr,masklsb2 |
| 1573 | // andi ptrlsb2,ptr,3 |
| 1574 | // sll shiftamt,ptrlsb2,3 |
| 1575 | // ori maskupper,$0,255 # 0xff |
| 1576 | // sll mask,maskupper,shiftamt |
Bruno Cardoso Lopes | 4e694c9 | 2011-05-31 02:54:07 +0000 | [diff] [blame] | 1577 | // nor mask2,$0,mask |
Akira Hatanaka | 4061da1 | 2011-07-19 20:11:17 +0000 | [diff] [blame] | 1578 | // andi maskedcmpval,cmpval,255 |
| 1579 | // sll shiftedcmpval,maskedcmpval,shiftamt |
| 1580 | // andi maskednewval,newval,255 |
| 1581 | // sll shiftednewval,maskednewval,shiftamt |
Bruno Cardoso Lopes | 4e694c9 | 2011-05-31 02:54:07 +0000 | [diff] [blame] | 1582 | int64_t MaskImm = (Size == 1) ? 255 : 65535; |
Akira Hatanaka | 4061da1 | 2011-07-19 20:11:17 +0000 | [diff] [blame] | 1583 | BuildMI(BB, dl, TII->get(Mips::ADDiu), MaskLSB2) |
| 1584 | .addReg(Mips::ZERO).addImm(-4); |
| 1585 | BuildMI(BB, dl, TII->get(Mips::AND), AlignedAddr) |
| 1586 | .addReg(Ptr).addReg(MaskLSB2); |
| 1587 | BuildMI(BB, dl, TII->get(Mips::ANDi), PtrLSB2).addReg(Ptr).addImm(3); |
| 1588 | BuildMI(BB, dl, TII->get(Mips::SLL), ShiftAmt).addReg(PtrLSB2).addImm(3); |
| 1589 | BuildMI(BB, dl, TII->get(Mips::ORi), MaskUpper) |
| 1590 | .addReg(Mips::ZERO).addImm(MaskImm); |
Akira Hatanaka | cc7ecc7 | 2011-07-19 20:34:00 +0000 | [diff] [blame] | 1591 | BuildMI(BB, dl, TII->get(Mips::SLLV), Mask) |
| 1592 | .addReg(ShiftAmt).addReg(MaskUpper); |
Bruno Cardoso Lopes | 4e694c9 | 2011-05-31 02:54:07 +0000 | [diff] [blame] | 1593 | BuildMI(BB, dl, TII->get(Mips::NOR), Mask2).addReg(Mips::ZERO).addReg(Mask); |
Akira Hatanaka | 4061da1 | 2011-07-19 20:11:17 +0000 | [diff] [blame] | 1594 | BuildMI(BB, dl, TII->get(Mips::ANDi), MaskedCmpVal) |
| 1595 | .addReg(CmpVal).addImm(MaskImm); |
Akira Hatanaka | cc7ecc7 | 2011-07-19 20:34:00 +0000 | [diff] [blame] | 1596 | BuildMI(BB, dl, TII->get(Mips::SLLV), ShiftedCmpVal) |
| 1597 | .addReg(ShiftAmt).addReg(MaskedCmpVal); |
Akira Hatanaka | 4061da1 | 2011-07-19 20:11:17 +0000 | [diff] [blame] | 1598 | BuildMI(BB, dl, TII->get(Mips::ANDi), MaskedNewVal) |
| 1599 | .addReg(NewVal).addImm(MaskImm); |
Akira Hatanaka | cc7ecc7 | 2011-07-19 20:34:00 +0000 | [diff] [blame] | 1600 | BuildMI(BB, dl, TII->get(Mips::SLLV), ShiftedNewVal) |
| 1601 | .addReg(ShiftAmt).addReg(MaskedNewVal); |
Bruno Cardoso Lopes | 4e694c9 | 2011-05-31 02:54:07 +0000 | [diff] [blame] | 1602 | |
| 1603 | // loop1MBB: |
Akira Hatanaka | 4061da1 | 2011-07-19 20:11:17 +0000 | [diff] [blame] | 1604 | // ll oldval,0(alginedaddr) |
| 1605 | // and maskedoldval0,oldval,mask |
| 1606 | // bne maskedoldval0,shiftedcmpval,sinkMBB |
Bruno Cardoso Lopes | 4e694c9 | 2011-05-31 02:54:07 +0000 | [diff] [blame] | 1607 | BB = loop1MBB; |
Akira Hatanaka | 5906806 | 2011-11-11 04:14:30 +0000 | [diff] [blame] | 1608 | BuildMI(BB, dl, TII->get(LL), OldVal).addReg(AlignedAddr).addImm(0); |
Akira Hatanaka | 4061da1 | 2011-07-19 20:11:17 +0000 | [diff] [blame] | 1609 | BuildMI(BB, dl, TII->get(Mips::AND), MaskedOldVal0) |
| 1610 | .addReg(OldVal).addReg(Mask); |
Bruno Cardoso Lopes | 4e694c9 | 2011-05-31 02:54:07 +0000 | [diff] [blame] | 1611 | BuildMI(BB, dl, TII->get(Mips::BNE)) |
Akira Hatanaka | 4061da1 | 2011-07-19 20:11:17 +0000 | [diff] [blame] | 1612 | .addReg(MaskedOldVal0).addReg(ShiftedCmpVal).addMBB(sinkMBB); |
Bruno Cardoso Lopes | 4e694c9 | 2011-05-31 02:54:07 +0000 | [diff] [blame] | 1613 | |
| 1614 | // loop2MBB: |
Akira Hatanaka | 4061da1 | 2011-07-19 20:11:17 +0000 | [diff] [blame] | 1615 | // and maskedoldval1,oldval,mask2 |
| 1616 | // or storeval,maskedoldval1,shiftednewval |
| 1617 | // sc success,storeval,0(alignedaddr) |
| 1618 | // beq success,$0,loop1MBB |
Bruno Cardoso Lopes | 4e694c9 | 2011-05-31 02:54:07 +0000 | [diff] [blame] | 1619 | BB = loop2MBB; |
Akira Hatanaka | 4061da1 | 2011-07-19 20:11:17 +0000 | [diff] [blame] | 1620 | BuildMI(BB, dl, TII->get(Mips::AND), MaskedOldVal1) |
| 1621 | .addReg(OldVal).addReg(Mask2); |
| 1622 | BuildMI(BB, dl, TII->get(Mips::OR), StoreVal) |
| 1623 | .addReg(MaskedOldVal1).addReg(ShiftedNewVal); |
Akira Hatanaka | 5906806 | 2011-11-11 04:14:30 +0000 | [diff] [blame] | 1624 | BuildMI(BB, dl, TII->get(SC), Success) |
Akira Hatanaka | 4061da1 | 2011-07-19 20:11:17 +0000 | [diff] [blame] | 1625 | .addReg(StoreVal).addReg(AlignedAddr).addImm(0); |
Bruno Cardoso Lopes | 4e694c9 | 2011-05-31 02:54:07 +0000 | [diff] [blame] | 1626 | BuildMI(BB, dl, TII->get(Mips::BEQ)) |
Akira Hatanaka | 4061da1 | 2011-07-19 20:11:17 +0000 | [diff] [blame] | 1627 | .addReg(Success).addReg(Mips::ZERO).addMBB(loop1MBB); |
Bruno Cardoso Lopes | 4e694c9 | 2011-05-31 02:54:07 +0000 | [diff] [blame] | 1628 | |
Akira Hatanaka | 939ece1 | 2011-07-19 03:42:13 +0000 | [diff] [blame] | 1629 | // sinkMBB: |
Akira Hatanaka | 4061da1 | 2011-07-19 20:11:17 +0000 | [diff] [blame] | 1630 | // srl srlres,maskedoldval0,shiftamt |
| 1631 | // sll sllres,srlres,24 |
| 1632 | // sra dest,sllres,24 |
Akira Hatanaka | 939ece1 | 2011-07-19 03:42:13 +0000 | [diff] [blame] | 1633 | BB = sinkMBB; |
Bruno Cardoso Lopes | 4e694c9 | 2011-05-31 02:54:07 +0000 | [diff] [blame] | 1634 | int64_t ShiftImm = (Size == 1) ? 24 : 16; |
Akira Hatanaka | a308c67 | 2011-07-19 03:14:58 +0000 | [diff] [blame] | 1635 | |
Akira Hatanaka | cc7ecc7 | 2011-07-19 20:34:00 +0000 | [diff] [blame] | 1636 | BuildMI(BB, dl, TII->get(Mips::SRLV), SrlRes) |
| 1637 | .addReg(ShiftAmt).addReg(MaskedOldVal0); |
Akira Hatanaka | 4061da1 | 2011-07-19 20:11:17 +0000 | [diff] [blame] | 1638 | BuildMI(BB, dl, TII->get(Mips::SLL), SllRes) |
| 1639 | .addReg(SrlRes).addImm(ShiftImm); |
Akira Hatanaka | 939ece1 | 2011-07-19 03:42:13 +0000 | [diff] [blame] | 1640 | BuildMI(BB, dl, TII->get(Mips::SRA), Dest) |
Akira Hatanaka | 4061da1 | 2011-07-19 20:11:17 +0000 | [diff] [blame] | 1641 | .addReg(SllRes).addImm(ShiftImm); |
Bruno Cardoso Lopes | 4e694c9 | 2011-05-31 02:54:07 +0000 | [diff] [blame] | 1642 | |
| 1643 | MI->eraseFromParent(); // The instruction is gone now. |
| 1644 | |
Akira Hatanaka | 939ece1 | 2011-07-19 03:42:13 +0000 | [diff] [blame] | 1645 | return exitMBB; |
Bruno Cardoso Lopes | 4e694c9 | 2011-05-31 02:54:07 +0000 | [diff] [blame] | 1646 | } |
| 1647 | |
Akira Hatanaka | 4552c9a | 2011-04-15 21:51:11 +0000 | [diff] [blame] | 1648 | //===----------------------------------------------------------------------===// |
Bruno Cardoso Lopes | 972f589 | 2007-06-06 07:42:06 +0000 | [diff] [blame] | 1649 | // Misc Lower Operation implementation |
Akira Hatanaka | 4552c9a | 2011-04-15 21:51:11 +0000 | [diff] [blame] | 1650 | //===----------------------------------------------------------------------===// |
Bruno Cardoso Lopes | d3bdf19 | 2009-05-27 17:23:44 +0000 | [diff] [blame] | 1651 | SDValue MipsTargetLowering:: |
Dan Gohman | d858e90 | 2010-04-17 15:26:15 +0000 | [diff] [blame] | 1652 | LowerBRCOND(SDValue Op, SelectionDAG &DAG) const |
Bruno Cardoso Lopes | 85e31e3 | 2008-07-28 19:11:24 +0000 | [diff] [blame] | 1653 | { |
Wesley Peck | bf17cfa | 2010-11-23 03:31:01 +0000 | [diff] [blame] | 1654 | // The first operand is the chain, the second is the condition, the third is |
Bruno Cardoso Lopes | 85e31e3 | 2008-07-28 19:11:24 +0000 | [diff] [blame] | 1655 | // the block to branch to if the condition is true. |
| 1656 | SDValue Chain = Op.getOperand(0); |
| 1657 | SDValue Dest = Op.getOperand(2); |
Dale Johannesen | de06470 | 2009-02-06 21:50:26 +0000 | [diff] [blame] | 1658 | DebugLoc dl = Op.getDebugLoc(); |
Bruno Cardoso Lopes | 85e31e3 | 2008-07-28 19:11:24 +0000 | [diff] [blame] | 1659 | |
Akira Hatanaka | 1d6b38d | 2011-03-31 18:26:17 +0000 | [diff] [blame] | 1660 | SDValue CondRes = CreateFPCmp(DAG, Op.getOperand(1)); |
| 1661 | |
Chris Lattner | 7a2bdde | 2011-04-15 05:18:47 +0000 | [diff] [blame] | 1662 | // Return if flag is not set by a floating point comparison. |
Akira Hatanaka | 1d6b38d | 2011-03-31 18:26:17 +0000 | [diff] [blame] | 1663 | if (CondRes.getOpcode() != MipsISD::FPCmp) |
Bruno Cardoso Lopes | 4b877ca | 2008-07-30 17:06:13 +0000 | [diff] [blame] | 1664 | return Op; |
Wesley Peck | bf17cfa | 2010-11-23 03:31:01 +0000 | [diff] [blame] | 1665 | |
Bruno Cardoso Lopes | 7728377 | 2008-07-31 18:31:28 +0000 | [diff] [blame] | 1666 | SDValue CCNode = CondRes.getOperand(2); |
Dan Gohman | f5aeb1a | 2008-09-12 16:56:44 +0000 | [diff] [blame] | 1667 | Mips::CondCode CC = |
| 1668 | (Mips::CondCode)cast<ConstantSDNode>(CCNode)->getZExtValue(); |
Wesley Peck | bf17cfa | 2010-11-23 03:31:01 +0000 | [diff] [blame] | 1669 | SDValue BrCode = DAG.getConstant(GetFPBranchCodeFromCond(CC), MVT::i32); |
Bruno Cardoso Lopes | 85e31e3 | 2008-07-28 19:11:24 +0000 | [diff] [blame] | 1670 | |
Wesley Peck | bf17cfa | 2010-11-23 03:31:01 +0000 | [diff] [blame] | 1671 | return DAG.getNode(MipsISD::FPBrcond, dl, Op.getValueType(), Chain, BrCode, |
Akira Hatanaka | 1d6b38d | 2011-03-31 18:26:17 +0000 | [diff] [blame] | 1672 | Dest, CondRes); |
Bruno Cardoso Lopes | 85e31e3 | 2008-07-28 19:11:24 +0000 | [diff] [blame] | 1673 | } |
| 1674 | |
| 1675 | SDValue MipsTargetLowering:: |
Dan Gohman | d858e90 | 2010-04-17 15:26:15 +0000 | [diff] [blame] | 1676 | LowerSELECT(SDValue Op, SelectionDAG &DAG) const |
Bruno Cardoso Lopes | 6d399bd | 2008-07-29 19:05:28 +0000 | [diff] [blame] | 1677 | { |
Akira Hatanaka | 1d6b38d | 2011-03-31 18:26:17 +0000 | [diff] [blame] | 1678 | SDValue Cond = CreateFPCmp(DAG, Op.getOperand(0)); |
Bruno Cardoso Lopes | 6d399bd | 2008-07-29 19:05:28 +0000 | [diff] [blame] | 1679 | |
Chris Lattner | 7a2bdde | 2011-04-15 05:18:47 +0000 | [diff] [blame] | 1680 | // Return if flag is not set by a floating point comparison. |
Akira Hatanaka | 1d6b38d | 2011-03-31 18:26:17 +0000 | [diff] [blame] | 1681 | if (Cond.getOpcode() != MipsISD::FPCmp) |
| 1682 | return Op; |
Bruno Cardoso Lopes | 739e441 | 2008-08-13 07:13:40 +0000 | [diff] [blame] | 1683 | |
Akira Hatanaka | 1d6b38d | 2011-03-31 18:26:17 +0000 | [diff] [blame] | 1684 | return CreateCMovFP(DAG, Cond, Op.getOperand(1), Op.getOperand(2), |
| 1685 | Op.getDebugLoc()); |
Bruno Cardoso Lopes | 6d399bd | 2008-07-29 19:05:28 +0000 | [diff] [blame] | 1686 | } |
| 1687 | |
Akira Hatanaka | 3fef29d | 2012-07-11 19:32:27 +0000 | [diff] [blame] | 1688 | SDValue MipsTargetLowering:: |
| 1689 | LowerSELECT_CC(SDValue Op, SelectionDAG &DAG) const |
| 1690 | { |
| 1691 | DebugLoc DL = Op.getDebugLoc(); |
| 1692 | EVT Ty = Op.getOperand(0).getValueType(); |
| 1693 | SDValue Cond = DAG.getNode(ISD::SETCC, DL, getSetCCResultType(Ty), |
| 1694 | Op.getOperand(0), Op.getOperand(1), |
| 1695 | Op.getOperand(4)); |
| 1696 | |
| 1697 | return DAG.getNode(ISD::SELECT, DL, Op.getValueType(), Cond, Op.getOperand(2), |
| 1698 | Op.getOperand(3)); |
| 1699 | } |
| 1700 | |
Akira Hatanaka | 0a40c23 | 2012-03-09 23:46:03 +0000 | [diff] [blame] | 1701 | SDValue MipsTargetLowering::LowerSETCC(SDValue Op, SelectionDAG &DAG) const { |
| 1702 | SDValue Cond = CreateFPCmp(DAG, Op); |
| 1703 | |
| 1704 | assert(Cond.getOpcode() == MipsISD::FPCmp && |
| 1705 | "Floating point operand expected."); |
| 1706 | |
| 1707 | SDValue True = DAG.getConstant(1, MVT::i32); |
| 1708 | SDValue False = DAG.getConstant(0, MVT::i32); |
| 1709 | |
| 1710 | return CreateCMovFP(DAG, Cond, True, False, Op.getDebugLoc()); |
| 1711 | } |
| 1712 | |
Dan Gohman | d858e90 | 2010-04-17 15:26:15 +0000 | [diff] [blame] | 1713 | SDValue MipsTargetLowering::LowerGlobalAddress(SDValue Op, |
| 1714 | SelectionDAG &DAG) const { |
Dale Johannesen | de06470 | 2009-02-06 21:50:26 +0000 | [diff] [blame] | 1715 | // FIXME there isn't actually debug info here |
Dale Johannesen | 33c960f | 2009-02-04 20:06:27 +0000 | [diff] [blame] | 1716 | DebugLoc dl = Op.getDebugLoc(); |
Jia Liu | bb481f8 | 2012-02-28 07:46:26 +0000 | [diff] [blame] | 1717 | const GlobalValue *GV = cast<GlobalAddressSDNode>(Op)->getGlobal(); |
Bruno Cardoso Lopes | 97843cd | 2008-07-29 19:29:50 +0000 | [diff] [blame] | 1718 | |
Akira Hatanaka | a5903ac | 2011-10-11 00:55:05 +0000 | [diff] [blame] | 1719 | if (getTargetMachine().getRelocationModel() != Reloc::PIC_ && !IsN64) { |
Chris Lattner | e3736f8 | 2009-08-13 05:41:27 +0000 | [diff] [blame] | 1720 | SDVTList VTs = DAG.getVTList(MVT::i32); |
Wesley Peck | bf17cfa | 2010-11-23 03:31:01 +0000 | [diff] [blame] | 1721 | |
Akira Hatanaka | afc945b | 2012-09-12 23:27:55 +0000 | [diff] [blame] | 1722 | const MipsTargetObjectFile &TLOF = |
| 1723 | (const MipsTargetObjectFile&)getObjFileLowering(); |
Wesley Peck | bf17cfa | 2010-11-23 03:31:01 +0000 | [diff] [blame] | 1724 | |
Chris Lattner | e3736f8 | 2009-08-13 05:41:27 +0000 | [diff] [blame] | 1725 | // %gp_rel relocation |
Wesley Peck | bf17cfa | 2010-11-23 03:31:01 +0000 | [diff] [blame] | 1726 | if (TLOF.IsGlobalInSmallSection(GV, getTargetMachine())) { |
| 1727 | SDValue GA = DAG.getTargetGlobalAddress(GV, dl, MVT::i32, 0, |
Bruno Cardoso Lopes | c517cb0 | 2009-09-01 17:27:58 +0000 | [diff] [blame] | 1728 | MipsII::MO_GPREL); |
Chris Lattner | e3736f8 | 2009-08-13 05:41:27 +0000 | [diff] [blame] | 1729 | SDValue GPRelNode = DAG.getNode(MipsISD::GPRel, dl, VTs, &GA, 1); |
Akira Hatanaka | e7338cd | 2012-08-22 03:18:13 +0000 | [diff] [blame] | 1730 | SDValue GPReg = DAG.getRegister(Mips::GP, MVT::i32); |
| 1731 | return DAG.getNode(ISD::ADD, dl, MVT::i32, GPReg, GPRelNode); |
Chris Lattner | e3736f8 | 2009-08-13 05:41:27 +0000 | [diff] [blame] | 1732 | } |
Bruno Cardoso Lopes | 97843cd | 2008-07-29 19:29:50 +0000 | [diff] [blame] | 1733 | // %hi/%lo relocation |
Akira Hatanaka | e2e436a | 2011-04-01 21:41:06 +0000 | [diff] [blame] | 1734 | SDValue GAHi = DAG.getTargetGlobalAddress(GV, dl, MVT::i32, 0, |
| 1735 | MipsII::MO_ABS_HI); |
| 1736 | SDValue GALo = DAG.getTargetGlobalAddress(GV, dl, MVT::i32, 0, |
| 1737 | MipsII::MO_ABS_LO); |
| 1738 | SDValue HiPart = DAG.getNode(MipsISD::Hi, dl, VTs, &GAHi, 1); |
| 1739 | SDValue Lo = DAG.getNode(MipsISD::Lo, dl, MVT::i32, GALo); |
Owen Anderson | 825b72b | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 1740 | return DAG.getNode(ISD::ADD, dl, MVT::i32, HiPart, Lo); |
Bruno Cardoso Lopes | 97843cd | 2008-07-29 19:29:50 +0000 | [diff] [blame] | 1741 | } |
| 1742 | |
Akira Hatanaka | a5903ac | 2011-10-11 00:55:05 +0000 | [diff] [blame] | 1743 | EVT ValTy = Op.getValueType(); |
| 1744 | bool HasGotOfst = (GV->hasInternalLinkage() || |
| 1745 | (GV->hasLocalLinkage() && !isa<Function>(GV))); |
Akira Hatanaka | 56ce6b3 | 2012-04-04 22:16:36 +0000 | [diff] [blame] | 1746 | unsigned GotFlag = HasMips64 ? |
Akira Hatanaka | a5903ac | 2011-10-11 00:55:05 +0000 | [diff] [blame] | 1747 | (HasGotOfst ? MipsII::MO_GOT_PAGE : MipsII::MO_GOT_DISP) : |
Bruno Cardoso Lopes | e3d3572 | 2011-12-07 00:28:57 +0000 | [diff] [blame] | 1748 | (HasGotOfst ? MipsII::MO_GOT : MipsII::MO_GOT16); |
Akira Hatanaka | a5903ac | 2011-10-11 00:55:05 +0000 | [diff] [blame] | 1749 | SDValue GA = DAG.getTargetGlobalAddress(GV, dl, ValTy, 0, GotFlag); |
Akira Hatanaka | 648f00c | 2012-02-24 22:34:47 +0000 | [diff] [blame] | 1750 | GA = DAG.getNode(MipsISD::Wrapper, dl, ValTy, GetGlobalReg(DAG, ValTy), GA); |
Akira Hatanaka | 8209968 | 2011-12-19 19:52:25 +0000 | [diff] [blame] | 1751 | SDValue ResNode = DAG.getLoad(ValTy, dl, DAG.getEntryNode(), GA, |
| 1752 | MachinePointerInfo(), false, false, false, 0); |
Akira Hatanaka | 0f84382 | 2011-06-07 18:58:42 +0000 | [diff] [blame] | 1753 | // On functions and global targets not internal linked only |
| 1754 | // a load from got/GP is necessary for PIC to work. |
Akira Hatanaka | a5903ac | 2011-10-11 00:55:05 +0000 | [diff] [blame] | 1755 | if (!HasGotOfst) |
Akira Hatanaka | 0f84382 | 2011-06-07 18:58:42 +0000 | [diff] [blame] | 1756 | return ResNode; |
Akira Hatanaka | a5903ac | 2011-10-11 00:55:05 +0000 | [diff] [blame] | 1757 | SDValue GALo = DAG.getTargetGlobalAddress(GV, dl, ValTy, 0, |
Akira Hatanaka | 56ce6b3 | 2012-04-04 22:16:36 +0000 | [diff] [blame] | 1758 | HasMips64 ? MipsII::MO_GOT_OFST : |
| 1759 | MipsII::MO_ABS_LO); |
Akira Hatanaka | a5903ac | 2011-10-11 00:55:05 +0000 | [diff] [blame] | 1760 | SDValue Lo = DAG.getNode(MipsISD::Lo, dl, ValTy, GALo); |
| 1761 | return DAG.getNode(ISD::ADD, dl, ValTy, ResNode, Lo); |
Bruno Cardoso Lopes | 97843cd | 2008-07-29 19:29:50 +0000 | [diff] [blame] | 1762 | } |
| 1763 | |
Bruno Cardoso Lopes | ca8a2aa | 2011-03-04 20:01:52 +0000 | [diff] [blame] | 1764 | SDValue MipsTargetLowering::LowerBlockAddress(SDValue Op, |
| 1765 | SelectionDAG &DAG) const { |
Akira Hatanaka | f48eb53 | 2011-04-25 17:10:45 +0000 | [diff] [blame] | 1766 | const BlockAddress *BA = cast<BlockAddressSDNode>(Op)->getBlockAddress(); |
| 1767 | // FIXME there isn't actually debug info here |
| 1768 | DebugLoc dl = Op.getDebugLoc(); |
| 1769 | |
Akira Hatanaka | 9b944a8 | 2011-11-16 22:42:10 +0000 | [diff] [blame] | 1770 | if (getTargetMachine().getRelocationModel() != Reloc::PIC_ && !IsN64) { |
Akira Hatanaka | f48eb53 | 2011-04-25 17:10:45 +0000 | [diff] [blame] | 1771 | // %hi/%lo relocation |
Reed Kotler | dfb8dbb | 2012-10-05 18:27:54 +0000 | [diff] [blame] | 1772 | SDValue BAHi = |
| 1773 | DAG.getTargetBlockAddress(BA, MVT::i32, 0, MipsII::MO_ABS_HI); |
| 1774 | SDValue BALo = |
| 1775 | DAG.getTargetBlockAddress(BA, MVT::i32, 0, MipsII::MO_ABS_LO); |
Akira Hatanaka | f48eb53 | 2011-04-25 17:10:45 +0000 | [diff] [blame] | 1776 | SDValue Hi = DAG.getNode(MipsISD::Hi, dl, MVT::i32, BAHi); |
| 1777 | SDValue Lo = DAG.getNode(MipsISD::Lo, dl, MVT::i32, BALo); |
| 1778 | return DAG.getNode(ISD::ADD, dl, MVT::i32, Hi, Lo); |
Bruno Cardoso Lopes | ca8a2aa | 2011-03-04 20:01:52 +0000 | [diff] [blame] | 1779 | } |
Akira Hatanaka | f48eb53 | 2011-04-25 17:10:45 +0000 | [diff] [blame] | 1780 | |
Akira Hatanaka | 9b944a8 | 2011-11-16 22:42:10 +0000 | [diff] [blame] | 1781 | EVT ValTy = Op.getValueType(); |
Akira Hatanaka | 03d830e | 2012-04-04 18:22:53 +0000 | [diff] [blame] | 1782 | unsigned GOTFlag = HasMips64 ? MipsII::MO_GOT_PAGE : MipsII::MO_GOT; |
| 1783 | unsigned OFSTFlag = HasMips64 ? MipsII::MO_GOT_OFST : MipsII::MO_ABS_LO; |
Michael Liao | 6c7ccaa | 2012-09-12 21:43:09 +0000 | [diff] [blame] | 1784 | SDValue BAGOTOffset = DAG.getTargetBlockAddress(BA, ValTy, 0, GOTFlag); |
Akira Hatanaka | 648f00c | 2012-02-24 22:34:47 +0000 | [diff] [blame] | 1785 | BAGOTOffset = DAG.getNode(MipsISD::Wrapper, dl, ValTy, |
| 1786 | GetGlobalReg(DAG, ValTy), BAGOTOffset); |
Michael Liao | 6c7ccaa | 2012-09-12 21:43:09 +0000 | [diff] [blame] | 1787 | SDValue BALOOffset = DAG.getTargetBlockAddress(BA, ValTy, 0, OFSTFlag); |
Akira Hatanaka | 8209968 | 2011-12-19 19:52:25 +0000 | [diff] [blame] | 1788 | SDValue Load = DAG.getLoad(ValTy, dl, DAG.getEntryNode(), BAGOTOffset, |
Pete Cooper | d752e0f | 2011-11-08 18:42:53 +0000 | [diff] [blame] | 1789 | MachinePointerInfo(), false, false, false, 0); |
Akira Hatanaka | 9b944a8 | 2011-11-16 22:42:10 +0000 | [diff] [blame] | 1790 | SDValue Lo = DAG.getNode(MipsISD::Lo, dl, ValTy, BALOOffset); |
| 1791 | return DAG.getNode(ISD::ADD, dl, ValTy, Load, Lo); |
Bruno Cardoso Lopes | ca8a2aa | 2011-03-04 20:01:52 +0000 | [diff] [blame] | 1792 | } |
| 1793 | |
Bruno Cardoso Lopes | 97843cd | 2008-07-29 19:29:50 +0000 | [diff] [blame] | 1794 | SDValue MipsTargetLowering:: |
Dan Gohman | d858e90 | 2010-04-17 15:26:15 +0000 | [diff] [blame] | 1795 | LowerGlobalTLSAddress(SDValue Op, SelectionDAG &DAG) const |
Bruno Cardoso Lopes | 97843cd | 2008-07-29 19:29:50 +0000 | [diff] [blame] | 1796 | { |
Akira Hatanaka | 3faac0a | 2011-12-14 18:26:41 +0000 | [diff] [blame] | 1797 | // If the relocation model is PIC, use the General Dynamic TLS Model or |
| 1798 | // Local Dynamic TLS model, otherwise use the Initial Exec or |
| 1799 | // Local Exec TLS Model. |
Bruno Cardoso Lopes | d979686 | 2011-05-31 02:53:58 +0000 | [diff] [blame] | 1800 | |
| 1801 | GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(Op); |
| 1802 | DebugLoc dl = GA->getDebugLoc(); |
| 1803 | const GlobalValue *GV = GA->getGlobal(); |
| 1804 | EVT PtrVT = getPointerTy(); |
| 1805 | |
Hans Wennborg | fd5abd5 | 2012-05-04 09:40:39 +0000 | [diff] [blame] | 1806 | TLSModel::Model model = getTargetMachine().getTLSModel(GV); |
| 1807 | |
| 1808 | if (model == TLSModel::GeneralDynamic || model == TLSModel::LocalDynamic) { |
Hans Wennborg | 70a07c7 | 2012-06-04 14:02:08 +0000 | [diff] [blame] | 1809 | // General Dynamic and Local Dynamic TLS Model. |
| 1810 | unsigned Flag = (model == TLSModel::LocalDynamic) ? MipsII::MO_TLSLDM |
| 1811 | : MipsII::MO_TLSGD; |
| 1812 | |
Akira Hatanaka | 3faac0a | 2011-12-14 18:26:41 +0000 | [diff] [blame] | 1813 | SDValue TGA = DAG.getTargetGlobalAddress(GV, dl, PtrVT, 0, Flag); |
Akira Hatanaka | 648f00c | 2012-02-24 22:34:47 +0000 | [diff] [blame] | 1814 | SDValue Argument = DAG.getNode(MipsISD::Wrapper, dl, PtrVT, |
| 1815 | GetGlobalReg(DAG, PtrVT), TGA); |
Akira Hatanaka | 7a7194b | 2011-12-08 21:05:38 +0000 | [diff] [blame] | 1816 | unsigned PtrSize = PtrVT.getSizeInBits(); |
| 1817 | IntegerType *PtrTy = Type::getIntNTy(*DAG.getContext(), PtrSize); |
| 1818 | |
Benjamin Kramer | 5eccf67 | 2011-12-11 12:21:34 +0000 | [diff] [blame] | 1819 | SDValue TlsGetAddr = DAG.getExternalSymbol("__tls_get_addr", PtrVT); |
Bruno Cardoso Lopes | d979686 | 2011-05-31 02:53:58 +0000 | [diff] [blame] | 1820 | |
| 1821 | ArgListTy Args; |
| 1822 | ArgListEntry Entry; |
| 1823 | Entry.Node = Argument; |
Akira Hatanaka | ca07479 | 2011-12-08 20:34:32 +0000 | [diff] [blame] | 1824 | Entry.Ty = PtrTy; |
Bruno Cardoso Lopes | d979686 | 2011-05-31 02:53:58 +0000 | [diff] [blame] | 1825 | Args.push_back(Entry); |
Jia Liu | bb481f8 | 2012-02-28 07:46:26 +0000 | [diff] [blame] | 1826 | |
Justin Holewinski | d2ea0e1 | 2012-05-25 16:35:28 +0000 | [diff] [blame] | 1827 | TargetLowering::CallLoweringInfo CLI(DAG.getEntryNode(), PtrTy, |
Evan Cheng | 4bfcd4a | 2012-02-28 18:51:51 +0000 | [diff] [blame] | 1828 | false, false, false, false, 0, CallingConv::C, |
| 1829 | /*isTailCall=*/false, /*doesNotRet=*/false, |
| 1830 | /*isReturnValueUsed=*/true, |
Akira Hatanaka | 7a7194b | 2011-12-08 21:05:38 +0000 | [diff] [blame] | 1831 | TlsGetAddr, Args, DAG, dl); |
Justin Holewinski | d2ea0e1 | 2012-05-25 16:35:28 +0000 | [diff] [blame] | 1832 | std::pair<SDValue, SDValue> CallResult = LowerCallTo(CLI); |
Bruno Cardoso Lopes | d979686 | 2011-05-31 02:53:58 +0000 | [diff] [blame] | 1833 | |
Akira Hatanaka | 3faac0a | 2011-12-14 18:26:41 +0000 | [diff] [blame] | 1834 | SDValue Ret = CallResult.first; |
| 1835 | |
Hans Wennborg | fd5abd5 | 2012-05-04 09:40:39 +0000 | [diff] [blame] | 1836 | if (model != TLSModel::LocalDynamic) |
Akira Hatanaka | 3faac0a | 2011-12-14 18:26:41 +0000 | [diff] [blame] | 1837 | return Ret; |
| 1838 | |
| 1839 | SDValue TGAHi = DAG.getTargetGlobalAddress(GV, dl, PtrVT, 0, |
| 1840 | MipsII::MO_DTPREL_HI); |
| 1841 | SDValue Hi = DAG.getNode(MipsISD::Hi, dl, PtrVT, TGAHi); |
| 1842 | SDValue TGALo = DAG.getTargetGlobalAddress(GV, dl, PtrVT, 0, |
| 1843 | MipsII::MO_DTPREL_LO); |
| 1844 | SDValue Lo = DAG.getNode(MipsISD::Lo, dl, PtrVT, TGALo); |
| 1845 | SDValue Add = DAG.getNode(ISD::ADD, dl, PtrVT, Hi, Ret); |
| 1846 | return DAG.getNode(ISD::ADD, dl, PtrVT, Add, Lo); |
Bruno Cardoso Lopes | d979686 | 2011-05-31 02:53:58 +0000 | [diff] [blame] | 1847 | } |
Akira Hatanaka | 5f7451f | 2011-06-21 01:02:03 +0000 | [diff] [blame] | 1848 | |
| 1849 | SDValue Offset; |
Hans Wennborg | fd5abd5 | 2012-05-04 09:40:39 +0000 | [diff] [blame] | 1850 | if (model == TLSModel::InitialExec) { |
Akira Hatanaka | 5f7451f | 2011-06-21 01:02:03 +0000 | [diff] [blame] | 1851 | // Initial Exec TLS Model |
Akira Hatanaka | ca07479 | 2011-12-08 20:34:32 +0000 | [diff] [blame] | 1852 | SDValue TGA = DAG.getTargetGlobalAddress(GV, dl, PtrVT, 0, |
Akira Hatanaka | 5f7451f | 2011-06-21 01:02:03 +0000 | [diff] [blame] | 1853 | MipsII::MO_GOTTPREL); |
Akira Hatanaka | 648f00c | 2012-02-24 22:34:47 +0000 | [diff] [blame] | 1854 | TGA = DAG.getNode(MipsISD::Wrapper, dl, PtrVT, GetGlobalReg(DAG, PtrVT), |
| 1855 | TGA); |
Akira Hatanaka | ca07479 | 2011-12-08 20:34:32 +0000 | [diff] [blame] | 1856 | Offset = DAG.getLoad(PtrVT, dl, |
Akira Hatanaka | 5f7451f | 2011-06-21 01:02:03 +0000 | [diff] [blame] | 1857 | DAG.getEntryNode(), TGA, MachinePointerInfo(), |
Pete Cooper | d752e0f | 2011-11-08 18:42:53 +0000 | [diff] [blame] | 1858 | false, false, false, 0); |
Akira Hatanaka | 5f7451f | 2011-06-21 01:02:03 +0000 | [diff] [blame] | 1859 | } else { |
| 1860 | // Local Exec TLS Model |
Hans Wennborg | fd5abd5 | 2012-05-04 09:40:39 +0000 | [diff] [blame] | 1861 | assert(model == TLSModel::LocalExec); |
Akira Hatanaka | ca07479 | 2011-12-08 20:34:32 +0000 | [diff] [blame] | 1862 | SDValue TGAHi = DAG.getTargetGlobalAddress(GV, dl, PtrVT, 0, |
Akira Hatanaka | 5f7451f | 2011-06-21 01:02:03 +0000 | [diff] [blame] | 1863 | MipsII::MO_TPREL_HI); |
Akira Hatanaka | ca07479 | 2011-12-08 20:34:32 +0000 | [diff] [blame] | 1864 | SDValue TGALo = DAG.getTargetGlobalAddress(GV, dl, PtrVT, 0, |
Akira Hatanaka | 5f7451f | 2011-06-21 01:02:03 +0000 | [diff] [blame] | 1865 | MipsII::MO_TPREL_LO); |
Akira Hatanaka | ca07479 | 2011-12-08 20:34:32 +0000 | [diff] [blame] | 1866 | SDValue Hi = DAG.getNode(MipsISD::Hi, dl, PtrVT, TGAHi); |
| 1867 | SDValue Lo = DAG.getNode(MipsISD::Lo, dl, PtrVT, TGALo); |
| 1868 | Offset = DAG.getNode(ISD::ADD, dl, PtrVT, Hi, Lo); |
Akira Hatanaka | 5f7451f | 2011-06-21 01:02:03 +0000 | [diff] [blame] | 1869 | } |
| 1870 | |
| 1871 | SDValue ThreadPointer = DAG.getNode(MipsISD::ThreadPointer, dl, PtrVT); |
| 1872 | return DAG.getNode(ISD::ADD, dl, PtrVT, ThreadPointer, Offset); |
Bruno Cardoso Lopes | 97843cd | 2008-07-29 19:29:50 +0000 | [diff] [blame] | 1873 | } |
| 1874 | |
| 1875 | SDValue MipsTargetLowering:: |
Dan Gohman | d858e90 | 2010-04-17 15:26:15 +0000 | [diff] [blame] | 1876 | LowerJumpTable(SDValue Op, SelectionDAG &DAG) const |
Bruno Cardoso Lopes | 753a987 | 2007-11-12 19:49:57 +0000 | [diff] [blame] | 1877 | { |
Akira Hatanaka | 2bf08ec | 2011-12-05 21:03:03 +0000 | [diff] [blame] | 1878 | SDValue HiPart, JTI, JTILo; |
Dale Johannesen | de06470 | 2009-02-06 21:50:26 +0000 | [diff] [blame] | 1879 | // FIXME there isn't actually debug info here |
Dale Johannesen | 33c960f | 2009-02-04 20:06:27 +0000 | [diff] [blame] | 1880 | DebugLoc dl = Op.getDebugLoc(); |
Bruno Cardoso Lopes | c517cb0 | 2009-09-01 17:27:58 +0000 | [diff] [blame] | 1881 | bool IsPIC = getTargetMachine().getRelocationModel() == Reloc::PIC_; |
Owen Anderson | e50ed30 | 2009-08-10 22:56:29 +0000 | [diff] [blame] | 1882 | EVT PtrVT = Op.getValueType(); |
Akira Hatanaka | 2bf08ec | 2011-12-05 21:03:03 +0000 | [diff] [blame] | 1883 | JumpTableSDNode *JT = cast<JumpTableSDNode>(Op); |
Bruno Cardoso Lopes | 753a987 | 2007-11-12 19:49:57 +0000 | [diff] [blame] | 1884 | |
Akira Hatanaka | 2bf08ec | 2011-12-05 21:03:03 +0000 | [diff] [blame] | 1885 | if (!IsPIC && !IsN64) { |
| 1886 | JTI = DAG.getTargetJumpTable(JT->getIndex(), PtrVT, MipsII::MO_ABS_HI); |
| 1887 | HiPart = DAG.getNode(MipsISD::Hi, dl, PtrVT, JTI); |
| 1888 | JTILo = DAG.getTargetJumpTable(JT->getIndex(), PtrVT, MipsII::MO_ABS_LO); |
Akira Hatanaka | 342837d | 2011-05-28 01:07:07 +0000 | [diff] [blame] | 1889 | } else {// Emit Load from Global Pointer |
Akira Hatanaka | c75ceb7 | 2012-04-04 18:31:32 +0000 | [diff] [blame] | 1890 | unsigned GOTFlag = HasMips64 ? MipsII::MO_GOT_PAGE : MipsII::MO_GOT; |
| 1891 | unsigned OfstFlag = HasMips64 ? MipsII::MO_GOT_OFST : MipsII::MO_ABS_LO; |
Akira Hatanaka | 2bf08ec | 2011-12-05 21:03:03 +0000 | [diff] [blame] | 1892 | JTI = DAG.getTargetJumpTable(JT->getIndex(), PtrVT, GOTFlag); |
Akira Hatanaka | 648f00c | 2012-02-24 22:34:47 +0000 | [diff] [blame] | 1893 | JTI = DAG.getNode(MipsISD::Wrapper, dl, PtrVT, GetGlobalReg(DAG, PtrVT), |
| 1894 | JTI); |
Akira Hatanaka | 2bf08ec | 2011-12-05 21:03:03 +0000 | [diff] [blame] | 1895 | HiPart = DAG.getLoad(PtrVT, dl, DAG.getEntryNode(), JTI, |
| 1896 | MachinePointerInfo(), false, false, false, 0); |
| 1897 | JTILo = DAG.getTargetJumpTable(JT->getIndex(), PtrVT, OfstFlag); |
Akira Hatanaka | 342837d | 2011-05-28 01:07:07 +0000 | [diff] [blame] | 1898 | } |
Bruno Cardoso Lopes | 753a987 | 2007-11-12 19:49:57 +0000 | [diff] [blame] | 1899 | |
Akira Hatanaka | 2bf08ec | 2011-12-05 21:03:03 +0000 | [diff] [blame] | 1900 | SDValue Lo = DAG.getNode(MipsISD::Lo, dl, PtrVT, JTILo); |
| 1901 | return DAG.getNode(ISD::ADD, dl, PtrVT, HiPart, Lo); |
Bruno Cardoso Lopes | 753a987 | 2007-11-12 19:49:57 +0000 | [diff] [blame] | 1902 | } |
| 1903 | |
Dan Gohman | 475871a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 1904 | SDValue MipsTargetLowering:: |
Dan Gohman | d858e90 | 2010-04-17 15:26:15 +0000 | [diff] [blame] | 1905 | LowerConstantPool(SDValue Op, SelectionDAG &DAG) const |
Bruno Cardoso Lopes | 97c2537 | 2008-07-09 04:15:08 +0000 | [diff] [blame] | 1906 | { |
Dan Gohman | 475871a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 1907 | SDValue ResNode; |
Bruno Cardoso Lopes | 92e87f2 | 2008-07-23 16:01:50 +0000 | [diff] [blame] | 1908 | ConstantPoolSDNode *N = cast<ConstantPoolSDNode>(Op); |
Dan Gohman | 46510a7 | 2010-04-15 01:51:59 +0000 | [diff] [blame] | 1909 | const Constant *C = N->getConstVal(); |
Dale Johannesen | de06470 | 2009-02-06 21:50:26 +0000 | [diff] [blame] | 1910 | // FIXME there isn't actually debug info here |
| 1911 | DebugLoc dl = Op.getDebugLoc(); |
Bruno Cardoso Lopes | 92e87f2 | 2008-07-23 16:01:50 +0000 | [diff] [blame] | 1912 | |
| 1913 | // gp_rel relocation |
Wesley Peck | bf17cfa | 2010-11-23 03:31:01 +0000 | [diff] [blame] | 1914 | // FIXME: we should reference the constant pool using small data sections, |
Chris Lattner | 7a2bdde | 2011-04-15 05:18:47 +0000 | [diff] [blame] | 1915 | // but the asm printer currently doesn't support this feature without |
Wesley Peck | bf17cfa | 2010-11-23 03:31:01 +0000 | [diff] [blame] | 1916 | // hacking it. This feature should come soon so we can uncomment the |
Bruno Cardoso Lopes | f33bc43 | 2008-07-28 19:26:25 +0000 | [diff] [blame] | 1917 | // stuff below. |
Eli Friedman | e2c7408 | 2009-08-03 02:22:28 +0000 | [diff] [blame] | 1918 | //if (IsInSmallSection(C->getType())) { |
Owen Anderson | 825b72b | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 1919 | // SDValue GPRelNode = DAG.getNode(MipsISD::GPRel, MVT::i32, CP); |
| 1920 | // SDValue GOT = DAG.getGLOBAL_OFFSET_TABLE(MVT::i32); |
Wesley Peck | bf17cfa | 2010-11-23 03:31:01 +0000 | [diff] [blame] | 1921 | // ResNode = DAG.getNode(ISD::ADD, MVT::i32, GOT, GPRelNode); |
Bruno Cardoso Lopes | d71cebf | 2009-11-25 12:17:58 +0000 | [diff] [blame] | 1922 | |
Akira Hatanaka | 13daee3 | 2012-03-27 02:55:31 +0000 | [diff] [blame] | 1923 | if (getTargetMachine().getRelocationModel() != Reloc::PIC_ && !IsN64) { |
Akira Hatanaka | e2e436a | 2011-04-01 21:41:06 +0000 | [diff] [blame] | 1924 | SDValue CPHi = DAG.getTargetConstantPool(C, MVT::i32, N->getAlignment(), |
Akira Hatanaka | 4552c9a | 2011-04-15 21:51:11 +0000 | [diff] [blame] | 1925 | N->getOffset(), MipsII::MO_ABS_HI); |
Akira Hatanaka | e2e436a | 2011-04-01 21:41:06 +0000 | [diff] [blame] | 1926 | SDValue CPLo = DAG.getTargetConstantPool(C, MVT::i32, N->getAlignment(), |
Akira Hatanaka | 4552c9a | 2011-04-15 21:51:11 +0000 | [diff] [blame] | 1927 | N->getOffset(), MipsII::MO_ABS_LO); |
Akira Hatanaka | e2e436a | 2011-04-01 21:41:06 +0000 | [diff] [blame] | 1928 | SDValue HiPart = DAG.getNode(MipsISD::Hi, dl, MVT::i32, CPHi); |
| 1929 | SDValue Lo = DAG.getNode(MipsISD::Lo, dl, MVT::i32, CPLo); |
Owen Anderson | 825b72b | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 1930 | ResNode = DAG.getNode(ISD::ADD, dl, MVT::i32, HiPart, Lo); |
Bruno Cardoso Lopes | d71cebf | 2009-11-25 12:17:58 +0000 | [diff] [blame] | 1931 | } else { |
Akira Hatanaka | 620db89 | 2011-11-16 22:44:38 +0000 | [diff] [blame] | 1932 | EVT ValTy = Op.getValueType(); |
Akira Hatanaka | 86a2733 | 2012-04-04 18:26:12 +0000 | [diff] [blame] | 1933 | unsigned GOTFlag = HasMips64 ? MipsII::MO_GOT_PAGE : MipsII::MO_GOT; |
| 1934 | unsigned OFSTFlag = HasMips64 ? MipsII::MO_GOT_OFST : MipsII::MO_ABS_LO; |
Akira Hatanaka | 620db89 | 2011-11-16 22:44:38 +0000 | [diff] [blame] | 1935 | SDValue CP = DAG.getTargetConstantPool(C, ValTy, N->getAlignment(), |
| 1936 | N->getOffset(), GOTFlag); |
Akira Hatanaka | 648f00c | 2012-02-24 22:34:47 +0000 | [diff] [blame] | 1937 | CP = DAG.getNode(MipsISD::Wrapper, dl, ValTy, GetGlobalReg(DAG, ValTy), CP); |
Akira Hatanaka | 8209968 | 2011-12-19 19:52:25 +0000 | [diff] [blame] | 1938 | SDValue Load = DAG.getLoad(ValTy, dl, DAG.getEntryNode(), CP, |
| 1939 | MachinePointerInfo::getConstantPool(), false, |
| 1940 | false, false, 0); |
Akira Hatanaka | 620db89 | 2011-11-16 22:44:38 +0000 | [diff] [blame] | 1941 | SDValue CPLo = DAG.getTargetConstantPool(C, ValTy, N->getAlignment(), |
| 1942 | N->getOffset(), OFSTFlag); |
| 1943 | SDValue Lo = DAG.getNode(MipsISD::Lo, dl, ValTy, CPLo); |
| 1944 | ResNode = DAG.getNode(ISD::ADD, dl, ValTy, Load, Lo); |
Bruno Cardoso Lopes | d71cebf | 2009-11-25 12:17:58 +0000 | [diff] [blame] | 1945 | } |
Bruno Cardoso Lopes | 92e87f2 | 2008-07-23 16:01:50 +0000 | [diff] [blame] | 1946 | |
| 1947 | return ResNode; |
Bruno Cardoso Lopes | 97c2537 | 2008-07-09 04:15:08 +0000 | [diff] [blame] | 1948 | } |
| 1949 | |
Dan Gohman | d858e90 | 2010-04-17 15:26:15 +0000 | [diff] [blame] | 1950 | SDValue MipsTargetLowering::LowerVASTART(SDValue Op, SelectionDAG &DAG) const { |
Dan Gohman | 1e93df6 | 2010-04-17 14:41:14 +0000 | [diff] [blame] | 1951 | MachineFunction &MF = DAG.getMachineFunction(); |
| 1952 | MipsFunctionInfo *FuncInfo = MF.getInfo<MipsFunctionInfo>(); |
| 1953 | |
Bruno Cardoso Lopes | 6059b85 | 2010-02-06 21:00:02 +0000 | [diff] [blame] | 1954 | DebugLoc dl = Op.getDebugLoc(); |
Dan Gohman | 1e93df6 | 2010-04-17 14:41:14 +0000 | [diff] [blame] | 1955 | SDValue FI = DAG.getFrameIndex(FuncInfo->getVarArgsFrameIndex(), |
| 1956 | getPointerTy()); |
Bruno Cardoso Lopes | 6059b85 | 2010-02-06 21:00:02 +0000 | [diff] [blame] | 1957 | |
| 1958 | // vastart just stores the address of the VarArgsFrameIndex slot into the |
| 1959 | // memory location argument. |
| 1960 | const Value *SV = cast<SrcValueSDNode>(Op.getOperand(2))->getValue(); |
Chris Lattner | 8026a9d | 2010-09-21 17:50:43 +0000 | [diff] [blame] | 1961 | return DAG.getStore(Op.getOperand(0), dl, FI, Op.getOperand(1), |
Akira Hatanaka | 8209968 | 2011-12-19 19:52:25 +0000 | [diff] [blame] | 1962 | MachinePointerInfo(SV), false, false, 0); |
Bruno Cardoso Lopes | 6059b85 | 2010-02-06 21:00:02 +0000 | [diff] [blame] | 1963 | } |
Jia Liu | bb481f8 | 2012-02-28 07:46:26 +0000 | [diff] [blame] | 1964 | |
Akira Hatanaka | 056c51e | 2012-04-11 22:13:04 +0000 | [diff] [blame] | 1965 | static SDValue LowerFCOPYSIGN32(SDValue Op, SelectionDAG &DAG, bool HasR2) { |
| 1966 | EVT TyX = Op.getOperand(0).getValueType(); |
| 1967 | EVT TyY = Op.getOperand(1).getValueType(); |
| 1968 | SDValue Const1 = DAG.getConstant(1, MVT::i32); |
| 1969 | SDValue Const31 = DAG.getConstant(31, MVT::i32); |
| 1970 | DebugLoc DL = Op.getDebugLoc(); |
| 1971 | SDValue Res; |
| 1972 | |
| 1973 | // If operand is of type f64, extract the upper 32-bit. Otherwise, bitcast it |
| 1974 | // to i32. |
| 1975 | SDValue X = (TyX == MVT::f32) ? |
| 1976 | DAG.getNode(ISD::BITCAST, DL, MVT::i32, Op.getOperand(0)) : |
| 1977 | DAG.getNode(MipsISD::ExtractElementF64, DL, MVT::i32, Op.getOperand(0), |
| 1978 | Const1); |
| 1979 | SDValue Y = (TyY == MVT::f32) ? |
| 1980 | DAG.getNode(ISD::BITCAST, DL, MVT::i32, Op.getOperand(1)) : |
| 1981 | DAG.getNode(MipsISD::ExtractElementF64, DL, MVT::i32, Op.getOperand(1), |
| 1982 | Const1); |
| 1983 | |
| 1984 | if (HasR2) { |
| 1985 | // ext E, Y, 31, 1 ; extract bit31 of Y |
| 1986 | // ins X, E, 31, 1 ; insert extracted bit at bit31 of X |
| 1987 | SDValue E = DAG.getNode(MipsISD::Ext, DL, MVT::i32, Y, Const31, Const1); |
| 1988 | Res = DAG.getNode(MipsISD::Ins, DL, MVT::i32, E, Const31, Const1, X); |
| 1989 | } else { |
| 1990 | // sll SllX, X, 1 |
| 1991 | // srl SrlX, SllX, 1 |
| 1992 | // srl SrlY, Y, 31 |
| 1993 | // sll SllY, SrlX, 31 |
| 1994 | // or Or, SrlX, SllY |
| 1995 | SDValue SllX = DAG.getNode(ISD::SHL, DL, MVT::i32, X, Const1); |
| 1996 | SDValue SrlX = DAG.getNode(ISD::SRL, DL, MVT::i32, SllX, Const1); |
| 1997 | SDValue SrlY = DAG.getNode(ISD::SRL, DL, MVT::i32, Y, Const31); |
| 1998 | SDValue SllY = DAG.getNode(ISD::SHL, DL, MVT::i32, SrlY, Const31); |
| 1999 | Res = DAG.getNode(ISD::OR, DL, MVT::i32, SrlX, SllY); |
| 2000 | } |
| 2001 | |
| 2002 | if (TyX == MVT::f32) |
| 2003 | return DAG.getNode(ISD::BITCAST, DL, Op.getOperand(0).getValueType(), Res); |
| 2004 | |
| 2005 | SDValue LowX = DAG.getNode(MipsISD::ExtractElementF64, DL, MVT::i32, |
| 2006 | Op.getOperand(0), DAG.getConstant(0, MVT::i32)); |
| 2007 | return DAG.getNode(MipsISD::BuildPairF64, DL, MVT::f64, LowX, Res); |
Akira Hatanaka | 9c3d57c | 2011-05-25 19:32:07 +0000 | [diff] [blame] | 2008 | } |
| 2009 | |
Akira Hatanaka | 056c51e | 2012-04-11 22:13:04 +0000 | [diff] [blame] | 2010 | static SDValue LowerFCOPYSIGN64(SDValue Op, SelectionDAG &DAG, bool HasR2) { |
| 2011 | unsigned WidthX = Op.getOperand(0).getValueSizeInBits(); |
| 2012 | unsigned WidthY = Op.getOperand(1).getValueSizeInBits(); |
| 2013 | EVT TyX = MVT::getIntegerVT(WidthX), TyY = MVT::getIntegerVT(WidthY); |
| 2014 | SDValue Const1 = DAG.getConstant(1, MVT::i32); |
| 2015 | DebugLoc DL = Op.getDebugLoc(); |
Eric Christopher | 471e422 | 2011-06-08 23:55:35 +0000 | [diff] [blame] | 2016 | |
Akira Hatanaka | 056c51e | 2012-04-11 22:13:04 +0000 | [diff] [blame] | 2017 | // Bitcast to integer nodes. |
| 2018 | SDValue X = DAG.getNode(ISD::BITCAST, DL, TyX, Op.getOperand(0)); |
| 2019 | SDValue Y = DAG.getNode(ISD::BITCAST, DL, TyY, Op.getOperand(1)); |
Akira Hatanaka | 9c3d57c | 2011-05-25 19:32:07 +0000 | [diff] [blame] | 2020 | |
Akira Hatanaka | 056c51e | 2012-04-11 22:13:04 +0000 | [diff] [blame] | 2021 | if (HasR2) { |
| 2022 | // ext E, Y, width(Y) - 1, 1 ; extract bit width(Y)-1 of Y |
| 2023 | // ins X, E, width(X) - 1, 1 ; insert extracted bit at bit width(X)-1 of X |
| 2024 | SDValue E = DAG.getNode(MipsISD::Ext, DL, TyY, Y, |
| 2025 | DAG.getConstant(WidthY - 1, MVT::i32), Const1); |
Akira Hatanaka | 9c3d57c | 2011-05-25 19:32:07 +0000 | [diff] [blame] | 2026 | |
Akira Hatanaka | 056c51e | 2012-04-11 22:13:04 +0000 | [diff] [blame] | 2027 | if (WidthX > WidthY) |
| 2028 | E = DAG.getNode(ISD::ZERO_EXTEND, DL, TyX, E); |
| 2029 | else if (WidthY > WidthX) |
| 2030 | E = DAG.getNode(ISD::TRUNCATE, DL, TyX, E); |
Akira Hatanaka | 9c3d57c | 2011-05-25 19:32:07 +0000 | [diff] [blame] | 2031 | |
Akira Hatanaka | 056c51e | 2012-04-11 22:13:04 +0000 | [diff] [blame] | 2032 | SDValue I = DAG.getNode(MipsISD::Ins, DL, TyX, E, |
| 2033 | DAG.getConstant(WidthX - 1, MVT::i32), Const1, X); |
| 2034 | return DAG.getNode(ISD::BITCAST, DL, Op.getOperand(0).getValueType(), I); |
| 2035 | } |
| 2036 | |
| 2037 | // (d)sll SllX, X, 1 |
| 2038 | // (d)srl SrlX, SllX, 1 |
| 2039 | // (d)srl SrlY, Y, width(Y)-1 |
| 2040 | // (d)sll SllY, SrlX, width(Y)-1 |
| 2041 | // or Or, SrlX, SllY |
| 2042 | SDValue SllX = DAG.getNode(ISD::SHL, DL, TyX, X, Const1); |
| 2043 | SDValue SrlX = DAG.getNode(ISD::SRL, DL, TyX, SllX, Const1); |
| 2044 | SDValue SrlY = DAG.getNode(ISD::SRL, DL, TyY, Y, |
| 2045 | DAG.getConstant(WidthY - 1, MVT::i32)); |
| 2046 | |
| 2047 | if (WidthX > WidthY) |
| 2048 | SrlY = DAG.getNode(ISD::ZERO_EXTEND, DL, TyX, SrlY); |
| 2049 | else if (WidthY > WidthX) |
| 2050 | SrlY = DAG.getNode(ISD::TRUNCATE, DL, TyX, SrlY); |
| 2051 | |
| 2052 | SDValue SllY = DAG.getNode(ISD::SHL, DL, TyX, SrlY, |
| 2053 | DAG.getConstant(WidthX - 1, MVT::i32)); |
| 2054 | SDValue Or = DAG.getNode(ISD::OR, DL, TyX, SrlX, SllY); |
| 2055 | return DAG.getNode(ISD::BITCAST, DL, Op.getOperand(0).getValueType(), Or); |
Akira Hatanaka | 9c3d57c | 2011-05-25 19:32:07 +0000 | [diff] [blame] | 2056 | } |
| 2057 | |
Akira Hatanaka | 8209968 | 2011-12-19 19:52:25 +0000 | [diff] [blame] | 2058 | SDValue |
| 2059 | MipsTargetLowering::LowerFCOPYSIGN(SDValue Op, SelectionDAG &DAG) const { |
Akira Hatanaka | 056c51e | 2012-04-11 22:13:04 +0000 | [diff] [blame] | 2060 | if (Subtarget->hasMips64()) |
| 2061 | return LowerFCOPYSIGN64(Op, DAG, Subtarget->hasMips32r2()); |
Akira Hatanaka | 9c3d57c | 2011-05-25 19:32:07 +0000 | [diff] [blame] | 2062 | |
Akira Hatanaka | 056c51e | 2012-04-11 22:13:04 +0000 | [diff] [blame] | 2063 | return LowerFCOPYSIGN32(Op, DAG, Subtarget->hasMips32r2()); |
Akira Hatanaka | 9c3d57c | 2011-05-25 19:32:07 +0000 | [diff] [blame] | 2064 | } |
| 2065 | |
Akira Hatanaka | c12a6e6 | 2012-04-11 22:49:04 +0000 | [diff] [blame] | 2066 | static SDValue LowerFABS32(SDValue Op, SelectionDAG &DAG, bool HasR2) { |
| 2067 | SDValue Res, Const1 = DAG.getConstant(1, MVT::i32); |
| 2068 | DebugLoc DL = Op.getDebugLoc(); |
| 2069 | |
| 2070 | // If operand is of type f64, extract the upper 32-bit. Otherwise, bitcast it |
| 2071 | // to i32. |
| 2072 | SDValue X = (Op.getValueType() == MVT::f32) ? |
| 2073 | DAG.getNode(ISD::BITCAST, DL, MVT::i32, Op.getOperand(0)) : |
| 2074 | DAG.getNode(MipsISD::ExtractElementF64, DL, MVT::i32, Op.getOperand(0), |
| 2075 | Const1); |
| 2076 | |
| 2077 | // Clear MSB. |
| 2078 | if (HasR2) |
| 2079 | Res = DAG.getNode(MipsISD::Ins, DL, MVT::i32, |
| 2080 | DAG.getRegister(Mips::ZERO, MVT::i32), |
| 2081 | DAG.getConstant(31, MVT::i32), Const1, X); |
| 2082 | else { |
| 2083 | SDValue SllX = DAG.getNode(ISD::SHL, DL, MVT::i32, X, Const1); |
| 2084 | Res = DAG.getNode(ISD::SRL, DL, MVT::i32, SllX, Const1); |
| 2085 | } |
| 2086 | |
| 2087 | if (Op.getValueType() == MVT::f32) |
| 2088 | return DAG.getNode(ISD::BITCAST, DL, MVT::f32, Res); |
| 2089 | |
| 2090 | SDValue LowX = DAG.getNode(MipsISD::ExtractElementF64, DL, MVT::i32, |
| 2091 | Op.getOperand(0), DAG.getConstant(0, MVT::i32)); |
| 2092 | return DAG.getNode(MipsISD::BuildPairF64, DL, MVT::f64, LowX, Res); |
| 2093 | } |
| 2094 | |
| 2095 | static SDValue LowerFABS64(SDValue Op, SelectionDAG &DAG, bool HasR2) { |
| 2096 | SDValue Res, Const1 = DAG.getConstant(1, MVT::i32); |
| 2097 | DebugLoc DL = Op.getDebugLoc(); |
| 2098 | |
| 2099 | // Bitcast to integer node. |
| 2100 | SDValue X = DAG.getNode(ISD::BITCAST, DL, MVT::i64, Op.getOperand(0)); |
| 2101 | |
| 2102 | // Clear MSB. |
| 2103 | if (HasR2) |
| 2104 | Res = DAG.getNode(MipsISD::Ins, DL, MVT::i64, |
| 2105 | DAG.getRegister(Mips::ZERO_64, MVT::i64), |
| 2106 | DAG.getConstant(63, MVT::i32), Const1, X); |
| 2107 | else { |
| 2108 | SDValue SllX = DAG.getNode(ISD::SHL, DL, MVT::i64, X, Const1); |
| 2109 | Res = DAG.getNode(ISD::SRL, DL, MVT::i64, SllX, Const1); |
| 2110 | } |
| 2111 | |
| 2112 | return DAG.getNode(ISD::BITCAST, DL, MVT::f64, Res); |
| 2113 | } |
| 2114 | |
| 2115 | SDValue |
| 2116 | MipsTargetLowering::LowerFABS(SDValue Op, SelectionDAG &DAG) const { |
| 2117 | if (Subtarget->hasMips64() && (Op.getValueType() == MVT::f64)) |
| 2118 | return LowerFABS64(Op, DAG, Subtarget->hasMips32r2()); |
| 2119 | |
| 2120 | return LowerFABS32(Op, DAG, Subtarget->hasMips32r2()); |
| 2121 | } |
| 2122 | |
Akira Hatanaka | 2e59147 | 2011-06-02 00:24:44 +0000 | [diff] [blame] | 2123 | SDValue MipsTargetLowering:: |
| 2124 | LowerFRAMEADDR(SDValue Op, SelectionDAG &DAG) const { |
Bruno Cardoso Lopes | e0b5cfc | 2011-06-16 00:40:02 +0000 | [diff] [blame] | 2125 | // check the depth |
| 2126 | assert((cast<ConstantSDNode>(Op.getOperand(0))->getZExtValue() == 0) && |
Akira Hatanaka | 0f84382 | 2011-06-07 18:58:42 +0000 | [diff] [blame] | 2127 | "Frame address can only be determined for current frame."); |
Akira Hatanaka | 2e59147 | 2011-06-02 00:24:44 +0000 | [diff] [blame] | 2128 | |
| 2129 | MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo(); |
| 2130 | MFI->setFrameAddressIsTaken(true); |
| 2131 | EVT VT = Op.getValueType(); |
| 2132 | DebugLoc dl = Op.getDebugLoc(); |
Akira Hatanaka | 46ac439 | 2011-11-11 04:11:56 +0000 | [diff] [blame] | 2133 | SDValue FrameAddr = DAG.getCopyFromReg(DAG.getEntryNode(), dl, |
| 2134 | IsN64 ? Mips::FP_64 : Mips::FP, VT); |
Akira Hatanaka | 2e59147 | 2011-06-02 00:24:44 +0000 | [diff] [blame] | 2135 | return FrameAddr; |
| 2136 | } |
| 2137 | |
Akira Hatanaka | ba584fe | 2012-07-11 00:53:32 +0000 | [diff] [blame] | 2138 | SDValue MipsTargetLowering::LowerRETURNADDR(SDValue Op, |
| 2139 | SelectionDAG &DAG) const { |
| 2140 | // check the depth |
| 2141 | assert((cast<ConstantSDNode>(Op.getOperand(0))->getZExtValue() == 0) && |
| 2142 | "Return address can be determined only for current frame."); |
| 2143 | |
| 2144 | MachineFunction &MF = DAG.getMachineFunction(); |
| 2145 | MachineFrameInfo *MFI = MF.getFrameInfo(); |
| 2146 | EVT VT = Op.getValueType(); |
| 2147 | unsigned RA = IsN64 ? Mips::RA_64 : Mips::RA; |
| 2148 | MFI->setReturnAddressIsTaken(true); |
| 2149 | |
| 2150 | // Return RA, which contains the return address. Mark it an implicit live-in. |
| 2151 | unsigned Reg = MF.addLiveIn(RA, getRegClassFor(VT)); |
| 2152 | return DAG.getCopyFromReg(DAG.getEntryNode(), Op.getDebugLoc(), Reg, VT); |
| 2153 | } |
| 2154 | |
Akira Hatanaka | db54826 | 2011-07-19 23:30:50 +0000 | [diff] [blame] | 2155 | // TODO: set SType according to the desired memory barrier behavior. |
Akira Hatanaka | 8209968 | 2011-12-19 19:52:25 +0000 | [diff] [blame] | 2156 | SDValue |
Akira Hatanaka | 864f660 | 2012-06-14 21:10:56 +0000 | [diff] [blame] | 2157 | MipsTargetLowering::LowerMEMBARRIER(SDValue Op, SelectionDAG &DAG) const { |
Akira Hatanaka | db54826 | 2011-07-19 23:30:50 +0000 | [diff] [blame] | 2158 | unsigned SType = 0; |
| 2159 | DebugLoc dl = Op.getDebugLoc(); |
| 2160 | return DAG.getNode(MipsISD::Sync, dl, MVT::Other, Op.getOperand(0), |
| 2161 | DAG.getConstant(SType, MVT::i32)); |
| 2162 | } |
| 2163 | |
Eli Friedman | 1464846 | 2011-07-27 22:21:52 +0000 | [diff] [blame] | 2164 | SDValue MipsTargetLowering::LowerATOMIC_FENCE(SDValue Op, |
Akira Hatanaka | 864f660 | 2012-06-14 21:10:56 +0000 | [diff] [blame] | 2165 | SelectionDAG &DAG) const { |
Eli Friedman | 1464846 | 2011-07-27 22:21:52 +0000 | [diff] [blame] | 2166 | // FIXME: Need pseudo-fence for 'singlethread' fences |
| 2167 | // FIXME: Set SType for weaker fences where supported/appropriate. |
| 2168 | unsigned SType = 0; |
| 2169 | DebugLoc dl = Op.getDebugLoc(); |
| 2170 | return DAG.getNode(MipsISD::Sync, dl, MVT::Other, Op.getOperand(0), |
| 2171 | DAG.getConstant(SType, MVT::i32)); |
| 2172 | } |
| 2173 | |
Akira Hatanaka | a284acb | 2012-05-09 00:55:21 +0000 | [diff] [blame] | 2174 | SDValue MipsTargetLowering::LowerShiftLeftParts(SDValue Op, |
Akira Hatanaka | 864f660 | 2012-06-14 21:10:56 +0000 | [diff] [blame] | 2175 | SelectionDAG &DAG) const { |
Akira Hatanaka | a284acb | 2012-05-09 00:55:21 +0000 | [diff] [blame] | 2176 | DebugLoc DL = Op.getDebugLoc(); |
| 2177 | SDValue Lo = Op.getOperand(0), Hi = Op.getOperand(1); |
| 2178 | SDValue Shamt = Op.getOperand(2); |
| 2179 | |
| 2180 | // if shamt < 32: |
| 2181 | // lo = (shl lo, shamt) |
| 2182 | // hi = (or (shl hi, shamt) (srl (srl lo, 1), ~shamt)) |
| 2183 | // else: |
| 2184 | // lo = 0 |
| 2185 | // hi = (shl lo, shamt[4:0]) |
| 2186 | SDValue Not = DAG.getNode(ISD::XOR, DL, MVT::i32, Shamt, |
| 2187 | DAG.getConstant(-1, MVT::i32)); |
| 2188 | SDValue ShiftRight1Lo = DAG.getNode(ISD::SRL, DL, MVT::i32, Lo, |
| 2189 | DAG.getConstant(1, MVT::i32)); |
| 2190 | SDValue ShiftRightLo = DAG.getNode(ISD::SRL, DL, MVT::i32, ShiftRight1Lo, |
| 2191 | Not); |
| 2192 | SDValue ShiftLeftHi = DAG.getNode(ISD::SHL, DL, MVT::i32, Hi, Shamt); |
| 2193 | SDValue Or = DAG.getNode(ISD::OR, DL, MVT::i32, ShiftLeftHi, ShiftRightLo); |
| 2194 | SDValue ShiftLeftLo = DAG.getNode(ISD::SHL, DL, MVT::i32, Lo, Shamt); |
| 2195 | SDValue Cond = DAG.getNode(ISD::AND, DL, MVT::i32, Shamt, |
| 2196 | DAG.getConstant(0x20, MVT::i32)); |
Akira Hatanaka | 864f660 | 2012-06-14 21:10:56 +0000 | [diff] [blame] | 2197 | Lo = DAG.getNode(ISD::SELECT, DL, MVT::i32, Cond, |
| 2198 | DAG.getConstant(0, MVT::i32), ShiftLeftLo); |
Akira Hatanaka | a284acb | 2012-05-09 00:55:21 +0000 | [diff] [blame] | 2199 | Hi = DAG.getNode(ISD::SELECT, DL, MVT::i32, Cond, ShiftLeftLo, Or); |
| 2200 | |
| 2201 | SDValue Ops[2] = {Lo, Hi}; |
| 2202 | return DAG.getMergeValues(Ops, 2, DL); |
| 2203 | } |
| 2204 | |
Akira Hatanaka | 864f660 | 2012-06-14 21:10:56 +0000 | [diff] [blame] | 2205 | SDValue MipsTargetLowering::LowerShiftRightParts(SDValue Op, SelectionDAG &DAG, |
Akira Hatanaka | a284acb | 2012-05-09 00:55:21 +0000 | [diff] [blame] | 2206 | bool IsSRA) const { |
| 2207 | DebugLoc DL = Op.getDebugLoc(); |
| 2208 | SDValue Lo = Op.getOperand(0), Hi = Op.getOperand(1); |
| 2209 | SDValue Shamt = Op.getOperand(2); |
| 2210 | |
| 2211 | // if shamt < 32: |
| 2212 | // lo = (or (shl (shl hi, 1), ~shamt) (srl lo, shamt)) |
| 2213 | // if isSRA: |
| 2214 | // hi = (sra hi, shamt) |
| 2215 | // else: |
| 2216 | // hi = (srl hi, shamt) |
| 2217 | // else: |
| 2218 | // if isSRA: |
| 2219 | // lo = (sra hi, shamt[4:0]) |
| 2220 | // hi = (sra hi, 31) |
| 2221 | // else: |
| 2222 | // lo = (srl hi, shamt[4:0]) |
| 2223 | // hi = 0 |
| 2224 | SDValue Not = DAG.getNode(ISD::XOR, DL, MVT::i32, Shamt, |
| 2225 | DAG.getConstant(-1, MVT::i32)); |
| 2226 | SDValue ShiftLeft1Hi = DAG.getNode(ISD::SHL, DL, MVT::i32, Hi, |
| 2227 | DAG.getConstant(1, MVT::i32)); |
| 2228 | SDValue ShiftLeftHi = DAG.getNode(ISD::SHL, DL, MVT::i32, ShiftLeft1Hi, Not); |
| 2229 | SDValue ShiftRightLo = DAG.getNode(ISD::SRL, DL, MVT::i32, Lo, Shamt); |
| 2230 | SDValue Or = DAG.getNode(ISD::OR, DL, MVT::i32, ShiftLeftHi, ShiftRightLo); |
| 2231 | SDValue ShiftRightHi = DAG.getNode(IsSRA ? ISD::SRA : ISD::SRL, DL, MVT::i32, |
| 2232 | Hi, Shamt); |
| 2233 | SDValue Cond = DAG.getNode(ISD::AND, DL, MVT::i32, Shamt, |
| 2234 | DAG.getConstant(0x20, MVT::i32)); |
| 2235 | SDValue Shift31 = DAG.getNode(ISD::SRA, DL, MVT::i32, Hi, |
| 2236 | DAG.getConstant(31, MVT::i32)); |
| 2237 | Lo = DAG.getNode(ISD::SELECT, DL, MVT::i32, Cond, ShiftRightHi, Or); |
| 2238 | Hi = DAG.getNode(ISD::SELECT, DL, MVT::i32, Cond, |
| 2239 | IsSRA ? Shift31 : DAG.getConstant(0, MVT::i32), |
| 2240 | ShiftRightHi); |
| 2241 | |
| 2242 | SDValue Ops[2] = {Lo, Hi}; |
| 2243 | return DAG.getMergeValues(Ops, 2, DL); |
| 2244 | } |
| 2245 | |
Akira Hatanaka | 1cd0ec0 | 2012-06-02 00:03:49 +0000 | [diff] [blame] | 2246 | static SDValue CreateLoadLR(unsigned Opc, SelectionDAG &DAG, LoadSDNode *LD, |
| 2247 | SDValue Chain, SDValue Src, unsigned Offset) { |
Akira Hatanaka | 2bd7e53 | 2012-06-13 19:06:08 +0000 | [diff] [blame] | 2248 | SDValue Ptr = LD->getBasePtr(); |
Akira Hatanaka | 1cd0ec0 | 2012-06-02 00:03:49 +0000 | [diff] [blame] | 2249 | EVT VT = LD->getValueType(0), MemVT = LD->getMemoryVT(); |
Akira Hatanaka | 2bd7e53 | 2012-06-13 19:06:08 +0000 | [diff] [blame] | 2250 | EVT BasePtrVT = Ptr.getValueType(); |
Akira Hatanaka | 1cd0ec0 | 2012-06-02 00:03:49 +0000 | [diff] [blame] | 2251 | DebugLoc DL = LD->getDebugLoc(); |
| 2252 | SDVTList VTList = DAG.getVTList(VT, MVT::Other); |
| 2253 | |
| 2254 | if (Offset) |
Akira Hatanaka | 2bd7e53 | 2012-06-13 19:06:08 +0000 | [diff] [blame] | 2255 | Ptr = DAG.getNode(ISD::ADD, DL, BasePtrVT, Ptr, |
Akira Hatanaka | 1cd0ec0 | 2012-06-02 00:03:49 +0000 | [diff] [blame] | 2256 | DAG.getConstant(Offset, BasePtrVT)); |
Akira Hatanaka | 1cd0ec0 | 2012-06-02 00:03:49 +0000 | [diff] [blame] | 2257 | |
| 2258 | SDValue Ops[] = { Chain, Ptr, Src }; |
| 2259 | return DAG.getMemIntrinsicNode(Opc, DL, VTList, Ops, 3, MemVT, |
| 2260 | LD->getMemOperand()); |
| 2261 | } |
| 2262 | |
| 2263 | // Expand an unaligned 32 or 64-bit integer load node. |
| 2264 | SDValue MipsTargetLowering::LowerLOAD(SDValue Op, SelectionDAG &DAG) const { |
| 2265 | LoadSDNode *LD = cast<LoadSDNode>(Op); |
| 2266 | EVT MemVT = LD->getMemoryVT(); |
| 2267 | |
| 2268 | // Return if load is aligned or if MemVT is neither i32 nor i64. |
| 2269 | if ((LD->getAlignment() >= MemVT.getSizeInBits() / 8) || |
| 2270 | ((MemVT != MVT::i32) && (MemVT != MVT::i64))) |
| 2271 | return SDValue(); |
| 2272 | |
| 2273 | bool IsLittle = Subtarget->isLittle(); |
| 2274 | EVT VT = Op.getValueType(); |
| 2275 | ISD::LoadExtType ExtType = LD->getExtensionType(); |
| 2276 | SDValue Chain = LD->getChain(), Undef = DAG.getUNDEF(VT); |
| 2277 | |
| 2278 | assert((VT == MVT::i32) || (VT == MVT::i64)); |
| 2279 | |
| 2280 | // Expand |
| 2281 | // (set dst, (i64 (load baseptr))) |
| 2282 | // to |
| 2283 | // (set tmp, (ldl (add baseptr, 7), undef)) |
| 2284 | // (set dst, (ldr baseptr, tmp)) |
| 2285 | if ((VT == MVT::i64) && (ExtType == ISD::NON_EXTLOAD)) { |
| 2286 | SDValue LDL = CreateLoadLR(MipsISD::LDL, DAG, LD, Chain, Undef, |
| 2287 | IsLittle ? 7 : 0); |
| 2288 | return CreateLoadLR(MipsISD::LDR, DAG, LD, LDL.getValue(1), LDL, |
| 2289 | IsLittle ? 0 : 7); |
| 2290 | } |
| 2291 | |
| 2292 | SDValue LWL = CreateLoadLR(MipsISD::LWL, DAG, LD, Chain, Undef, |
| 2293 | IsLittle ? 3 : 0); |
| 2294 | SDValue LWR = CreateLoadLR(MipsISD::LWR, DAG, LD, LWL.getValue(1), LWL, |
| 2295 | IsLittle ? 0 : 3); |
| 2296 | |
| 2297 | // Expand |
| 2298 | // (set dst, (i32 (load baseptr))) or |
| 2299 | // (set dst, (i64 (sextload baseptr))) or |
| 2300 | // (set dst, (i64 (extload baseptr))) |
| 2301 | // to |
| 2302 | // (set tmp, (lwl (add baseptr, 3), undef)) |
| 2303 | // (set dst, (lwr baseptr, tmp)) |
| 2304 | if ((VT == MVT::i32) || (ExtType == ISD::SEXTLOAD) || |
| 2305 | (ExtType == ISD::EXTLOAD)) |
| 2306 | return LWR; |
| 2307 | |
| 2308 | assert((VT == MVT::i64) && (ExtType == ISD::ZEXTLOAD)); |
| 2309 | |
| 2310 | // Expand |
| 2311 | // (set dst, (i64 (zextload baseptr))) |
| 2312 | // to |
| 2313 | // (set tmp0, (lwl (add baseptr, 3), undef)) |
| 2314 | // (set tmp1, (lwr baseptr, tmp0)) |
| 2315 | // (set tmp2, (shl tmp1, 32)) |
| 2316 | // (set dst, (srl tmp2, 32)) |
| 2317 | DebugLoc DL = LD->getDebugLoc(); |
| 2318 | SDValue Const32 = DAG.getConstant(32, MVT::i32); |
| 2319 | SDValue SLL = DAG.getNode(ISD::SHL, DL, MVT::i64, LWR, Const32); |
Akira Hatanaka | 94ccee2 | 2012-06-04 17:46:29 +0000 | [diff] [blame] | 2320 | SDValue SRL = DAG.getNode(ISD::SRL, DL, MVT::i64, SLL, Const32); |
| 2321 | SDValue Ops[] = { SRL, LWR.getValue(1) }; |
Akira Hatanaka | 1cd0ec0 | 2012-06-02 00:03:49 +0000 | [diff] [blame] | 2322 | return DAG.getMergeValues(Ops, 2, DL); |
| 2323 | } |
| 2324 | |
| 2325 | static SDValue CreateStoreLR(unsigned Opc, SelectionDAG &DAG, StoreSDNode *SD, |
| 2326 | SDValue Chain, unsigned Offset) { |
Akira Hatanaka | 2bd7e53 | 2012-06-13 19:06:08 +0000 | [diff] [blame] | 2327 | SDValue Ptr = SD->getBasePtr(), Value = SD->getValue(); |
| 2328 | EVT MemVT = SD->getMemoryVT(), BasePtrVT = Ptr.getValueType(); |
Akira Hatanaka | 1cd0ec0 | 2012-06-02 00:03:49 +0000 | [diff] [blame] | 2329 | DebugLoc DL = SD->getDebugLoc(); |
| 2330 | SDVTList VTList = DAG.getVTList(MVT::Other); |
| 2331 | |
| 2332 | if (Offset) |
Akira Hatanaka | 2bd7e53 | 2012-06-13 19:06:08 +0000 | [diff] [blame] | 2333 | Ptr = DAG.getNode(ISD::ADD, DL, BasePtrVT, Ptr, |
Akira Hatanaka | 1cd0ec0 | 2012-06-02 00:03:49 +0000 | [diff] [blame] | 2334 | DAG.getConstant(Offset, BasePtrVT)); |
Akira Hatanaka | 1cd0ec0 | 2012-06-02 00:03:49 +0000 | [diff] [blame] | 2335 | |
| 2336 | SDValue Ops[] = { Chain, Value, Ptr }; |
| 2337 | return DAG.getMemIntrinsicNode(Opc, DL, VTList, Ops, 3, MemVT, |
| 2338 | SD->getMemOperand()); |
| 2339 | } |
| 2340 | |
| 2341 | // Expand an unaligned 32 or 64-bit integer store node. |
| 2342 | SDValue MipsTargetLowering::LowerSTORE(SDValue Op, SelectionDAG &DAG) const { |
| 2343 | StoreSDNode *SD = cast<StoreSDNode>(Op); |
| 2344 | EVT MemVT = SD->getMemoryVT(); |
| 2345 | |
| 2346 | // Return if store is aligned or if MemVT is neither i32 nor i64. |
| 2347 | if ((SD->getAlignment() >= MemVT.getSizeInBits() / 8) || |
| 2348 | ((MemVT != MVT::i32) && (MemVT != MVT::i64))) |
| 2349 | return SDValue(); |
| 2350 | |
| 2351 | bool IsLittle = Subtarget->isLittle(); |
| 2352 | SDValue Value = SD->getValue(), Chain = SD->getChain(); |
| 2353 | EVT VT = Value.getValueType(); |
| 2354 | |
| 2355 | // Expand |
| 2356 | // (store val, baseptr) or |
| 2357 | // (truncstore val, baseptr) |
| 2358 | // to |
| 2359 | // (swl val, (add baseptr, 3)) |
| 2360 | // (swr val, baseptr) |
| 2361 | if ((VT == MVT::i32) || SD->isTruncatingStore()) { |
| 2362 | SDValue SWL = CreateStoreLR(MipsISD::SWL, DAG, SD, Chain, |
| 2363 | IsLittle ? 3 : 0); |
| 2364 | return CreateStoreLR(MipsISD::SWR, DAG, SD, SWL, IsLittle ? 0 : 3); |
| 2365 | } |
| 2366 | |
| 2367 | assert(VT == MVT::i64); |
| 2368 | |
| 2369 | // Expand |
| 2370 | // (store val, baseptr) |
| 2371 | // to |
| 2372 | // (sdl val, (add baseptr, 7)) |
| 2373 | // (sdr val, baseptr) |
| 2374 | SDValue SDL = CreateStoreLR(MipsISD::SDL, DAG, SD, Chain, IsLittle ? 7 : 0); |
| 2375 | return CreateStoreLR(MipsISD::SDR, DAG, SD, SDL, IsLittle ? 0 : 7); |
| 2376 | } |
| 2377 | |
Akira Hatanaka | fd89e6f | 2012-09-27 02:05:42 +0000 | [diff] [blame] | 2378 | // This function expands mips intrinsic nodes which have 64-bit input operands |
| 2379 | // or output values. |
| 2380 | // |
| 2381 | // out64 = intrinsic-node in64 |
| 2382 | // => |
| 2383 | // lo = copy (extract-element (in64, 0)) |
| 2384 | // hi = copy (extract-element (in64, 1)) |
| 2385 | // mips-specific-node |
| 2386 | // v0 = copy lo |
| 2387 | // v1 = copy hi |
| 2388 | // out64 = merge-values (v0, v1) |
| 2389 | // |
| 2390 | static SDValue LowerDSPIntr(SDValue Op, SelectionDAG &DAG, |
| 2391 | unsigned Opc, bool HasI64In, bool HasI64Out) { |
| 2392 | DebugLoc DL = Op.getDebugLoc(); |
| 2393 | bool HasChainIn = Op->getOperand(0).getValueType() == MVT::Other; |
| 2394 | SDValue Chain = HasChainIn ? Op->getOperand(0) : DAG.getEntryNode(); |
| 2395 | SmallVector<SDValue, 3> Ops; |
| 2396 | |
| 2397 | if (HasI64In) { |
| 2398 | SDValue InLo = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, MVT::i32, |
| 2399 | Op->getOperand(1 + HasChainIn), |
| 2400 | DAG.getConstant(0, MVT::i32)); |
| 2401 | SDValue InHi = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, MVT::i32, |
| 2402 | Op->getOperand(1 + HasChainIn), |
| 2403 | DAG.getConstant(1, MVT::i32)); |
| 2404 | |
| 2405 | Chain = DAG.getCopyToReg(Chain, DL, Mips::LO, InLo, SDValue()); |
| 2406 | Chain = DAG.getCopyToReg(Chain, DL, Mips::HI, InHi, Chain.getValue(1)); |
| 2407 | |
| 2408 | Ops.push_back(Chain); |
| 2409 | Ops.append(Op->op_begin() + HasChainIn + 2, Op->op_end()); |
| 2410 | Ops.push_back(Chain.getValue(1)); |
| 2411 | } else { |
| 2412 | Ops.push_back(Chain); |
| 2413 | Ops.append(Op->op_begin() + HasChainIn + 1, Op->op_end()); |
| 2414 | } |
| 2415 | |
| 2416 | if (!HasI64Out) |
| 2417 | return DAG.getNode(Opc, DL, Op->value_begin(), Op->getNumValues(), |
| 2418 | Ops.begin(), Ops.size()); |
| 2419 | |
| 2420 | SDValue Intr = DAG.getNode(Opc, DL, DAG.getVTList(MVT::Other, MVT::Glue), |
| 2421 | Ops.begin(), Ops.size()); |
| 2422 | SDValue OutLo = DAG.getCopyFromReg(Intr.getValue(0), DL, Mips::LO, MVT::i32, |
| 2423 | Intr.getValue(1)); |
| 2424 | SDValue OutHi = DAG.getCopyFromReg(OutLo.getValue(1), DL, Mips::HI, MVT::i32, |
| 2425 | OutLo.getValue(2)); |
| 2426 | SDValue Out = DAG.getNode(ISD::BUILD_PAIR, DL, MVT::i64, OutLo, OutHi); |
| 2427 | |
| 2428 | if (!HasChainIn) |
| 2429 | return Out; |
| 2430 | |
| 2431 | SDValue Vals[] = { Out, OutHi.getValue(1) }; |
| 2432 | return DAG.getMergeValues(Vals, 2, DL); |
| 2433 | } |
| 2434 | |
| 2435 | SDValue MipsTargetLowering::LowerINTRINSIC_WO_CHAIN(SDValue Op, |
| 2436 | SelectionDAG &DAG) const { |
| 2437 | switch (cast<ConstantSDNode>(Op->getOperand(0))->getZExtValue()) { |
| 2438 | default: |
| 2439 | return SDValue(); |
Akira Hatanaka | 2df483e | 2012-09-27 02:11:20 +0000 | [diff] [blame] | 2440 | case Intrinsic::mips_shilo: |
| 2441 | return LowerDSPIntr(Op, DAG, MipsISD::SHILO, true, true); |
| 2442 | case Intrinsic::mips_dpau_h_qbl: |
| 2443 | return LowerDSPIntr(Op, DAG, MipsISD::DPAU_H_QBL, true, true); |
| 2444 | case Intrinsic::mips_dpau_h_qbr: |
| 2445 | return LowerDSPIntr(Op, DAG, MipsISD::DPAU_H_QBR, true, true); |
| 2446 | case Intrinsic::mips_dpsu_h_qbl: |
| 2447 | return LowerDSPIntr(Op, DAG, MipsISD::DPSU_H_QBL, true, true); |
| 2448 | case Intrinsic::mips_dpsu_h_qbr: |
| 2449 | return LowerDSPIntr(Op, DAG, MipsISD::DPSU_H_QBR, true, true); |
| 2450 | case Intrinsic::mips_dpa_w_ph: |
| 2451 | return LowerDSPIntr(Op, DAG, MipsISD::DPA_W_PH, true, true); |
| 2452 | case Intrinsic::mips_dps_w_ph: |
| 2453 | return LowerDSPIntr(Op, DAG, MipsISD::DPS_W_PH, true, true); |
| 2454 | case Intrinsic::mips_dpax_w_ph: |
| 2455 | return LowerDSPIntr(Op, DAG, MipsISD::DPAX_W_PH, true, true); |
| 2456 | case Intrinsic::mips_dpsx_w_ph: |
| 2457 | return LowerDSPIntr(Op, DAG, MipsISD::DPSX_W_PH, true, true); |
| 2458 | case Intrinsic::mips_mulsa_w_ph: |
| 2459 | return LowerDSPIntr(Op, DAG, MipsISD::MULSA_W_PH, true, true); |
| 2460 | case Intrinsic::mips_mult: |
| 2461 | return LowerDSPIntr(Op, DAG, MipsISD::MULT, false, true); |
| 2462 | case Intrinsic::mips_multu: |
| 2463 | return LowerDSPIntr(Op, DAG, MipsISD::MULTU, false, true); |
| 2464 | case Intrinsic::mips_madd: |
| 2465 | return LowerDSPIntr(Op, DAG, MipsISD::MADD_DSP, true, true); |
| 2466 | case Intrinsic::mips_maddu: |
| 2467 | return LowerDSPIntr(Op, DAG, MipsISD::MADDU_DSP, true, true); |
| 2468 | case Intrinsic::mips_msub: |
| 2469 | return LowerDSPIntr(Op, DAG, MipsISD::MSUB_DSP, true, true); |
| 2470 | case Intrinsic::mips_msubu: |
| 2471 | return LowerDSPIntr(Op, DAG, MipsISD::MSUBU_DSP, true, true); |
Akira Hatanaka | fd89e6f | 2012-09-27 02:05:42 +0000 | [diff] [blame] | 2472 | } |
| 2473 | } |
| 2474 | |
| 2475 | SDValue MipsTargetLowering::LowerINTRINSIC_W_CHAIN(SDValue Op, |
| 2476 | SelectionDAG &DAG) const { |
| 2477 | switch (cast<ConstantSDNode>(Op->getOperand(1))->getZExtValue()) { |
| 2478 | default: |
| 2479 | return SDValue(); |
| 2480 | case Intrinsic::mips_extp: |
| 2481 | return LowerDSPIntr(Op, DAG, MipsISD::EXTP, true, false); |
| 2482 | case Intrinsic::mips_extpdp: |
| 2483 | return LowerDSPIntr(Op, DAG, MipsISD::EXTPDP, true, false); |
| 2484 | case Intrinsic::mips_extr_w: |
| 2485 | return LowerDSPIntr(Op, DAG, MipsISD::EXTR_W, true, false); |
| 2486 | case Intrinsic::mips_extr_r_w: |
| 2487 | return LowerDSPIntr(Op, DAG, MipsISD::EXTR_R_W, true, false); |
| 2488 | case Intrinsic::mips_extr_rs_w: |
| 2489 | return LowerDSPIntr(Op, DAG, MipsISD::EXTR_RS_W, true, false); |
| 2490 | case Intrinsic::mips_extr_s_h: |
| 2491 | return LowerDSPIntr(Op, DAG, MipsISD::EXTR_S_H, true, false); |
Akira Hatanaka | 2df483e | 2012-09-27 02:11:20 +0000 | [diff] [blame] | 2492 | case Intrinsic::mips_mthlip: |
| 2493 | return LowerDSPIntr(Op, DAG, MipsISD::MTHLIP, true, true); |
| 2494 | case Intrinsic::mips_mulsaq_s_w_ph: |
| 2495 | return LowerDSPIntr(Op, DAG, MipsISD::MULSAQ_S_W_PH, true, true); |
| 2496 | case Intrinsic::mips_maq_s_w_phl: |
| 2497 | return LowerDSPIntr(Op, DAG, MipsISD::MAQ_S_W_PHL, true, true); |
| 2498 | case Intrinsic::mips_maq_s_w_phr: |
| 2499 | return LowerDSPIntr(Op, DAG, MipsISD::MAQ_S_W_PHR, true, true); |
| 2500 | case Intrinsic::mips_maq_sa_w_phl: |
| 2501 | return LowerDSPIntr(Op, DAG, MipsISD::MAQ_SA_W_PHL, true, true); |
| 2502 | case Intrinsic::mips_maq_sa_w_phr: |
| 2503 | return LowerDSPIntr(Op, DAG, MipsISD::MAQ_SA_W_PHR, true, true); |
| 2504 | case Intrinsic::mips_dpaq_s_w_ph: |
| 2505 | return LowerDSPIntr(Op, DAG, MipsISD::DPAQ_S_W_PH, true, true); |
| 2506 | case Intrinsic::mips_dpsq_s_w_ph: |
| 2507 | return LowerDSPIntr(Op, DAG, MipsISD::DPSQ_S_W_PH, true, true); |
| 2508 | case Intrinsic::mips_dpaq_sa_l_w: |
| 2509 | return LowerDSPIntr(Op, DAG, MipsISD::DPAQ_SA_L_W, true, true); |
| 2510 | case Intrinsic::mips_dpsq_sa_l_w: |
| 2511 | return LowerDSPIntr(Op, DAG, MipsISD::DPSQ_SA_L_W, true, true); |
| 2512 | case Intrinsic::mips_dpaqx_s_w_ph: |
| 2513 | return LowerDSPIntr(Op, DAG, MipsISD::DPAQX_S_W_PH, true, true); |
| 2514 | case Intrinsic::mips_dpaqx_sa_w_ph: |
| 2515 | return LowerDSPIntr(Op, DAG, MipsISD::DPAQX_SA_W_PH, true, true); |
| 2516 | case Intrinsic::mips_dpsqx_s_w_ph: |
| 2517 | return LowerDSPIntr(Op, DAG, MipsISD::DPSQX_S_W_PH, true, true); |
| 2518 | case Intrinsic::mips_dpsqx_sa_w_ph: |
| 2519 | return LowerDSPIntr(Op, DAG, MipsISD::DPSQX_SA_W_PH, true, true); |
Akira Hatanaka | fd89e6f | 2012-09-27 02:05:42 +0000 | [diff] [blame] | 2520 | } |
| 2521 | } |
| 2522 | |
Akira Hatanaka | 4552c9a | 2011-04-15 21:51:11 +0000 | [diff] [blame] | 2523 | //===----------------------------------------------------------------------===// |
Bruno Cardoso Lopes | 972f589 | 2007-06-06 07:42:06 +0000 | [diff] [blame] | 2524 | // Calling Convention Implementation |
Akira Hatanaka | 4552c9a | 2011-04-15 21:51:11 +0000 | [diff] [blame] | 2525 | //===----------------------------------------------------------------------===// |
Bruno Cardoso Lopes | 972f589 | 2007-06-06 07:42:06 +0000 | [diff] [blame] | 2526 | |
Akira Hatanaka | 4552c9a | 2011-04-15 21:51:11 +0000 | [diff] [blame] | 2527 | //===----------------------------------------------------------------------===// |
Wesley Peck | bf17cfa | 2010-11-23 03:31:01 +0000 | [diff] [blame] | 2528 | // TODO: Implement a generic logic using tblgen that can support this. |
Bruno Cardoso Lopes | b53db4f | 2009-03-19 02:12:28 +0000 | [diff] [blame] | 2529 | // Mips O32 ABI rules: |
| 2530 | // --- |
| 2531 | // i32 - Passed in A0, A1, A2, A3 and stack |
Wesley Peck | bf17cfa | 2010-11-23 03:31:01 +0000 | [diff] [blame] | 2532 | // f32 - Only passed in f32 registers if no int reg has been used yet to hold |
Bruno Cardoso Lopes | b53db4f | 2009-03-19 02:12:28 +0000 | [diff] [blame] | 2533 | // an argument. Otherwise, passed in A1, A2, A3 and stack. |
Wesley Peck | bf17cfa | 2010-11-23 03:31:01 +0000 | [diff] [blame] | 2534 | // f64 - Only passed in two aliased f32 registers if no int reg has been used |
| 2535 | // yet to hold an argument. Otherwise, use A2, A3 and stack. If A1 is |
Bruno Cardoso Lopes | b53db4f | 2009-03-19 02:12:28 +0000 | [diff] [blame] | 2536 | // not used, it must be shadowed. If only A3 is avaiable, shadow it and |
| 2537 | // go to stack. |
Akira Hatanaka | 95b8ae1 | 2011-05-19 18:06:05 +0000 | [diff] [blame] | 2538 | // |
| 2539 | // For vararg functions, all arguments are passed in A0, A1, A2, A3 and stack. |
Akira Hatanaka | 4552c9a | 2011-04-15 21:51:11 +0000 | [diff] [blame] | 2540 | //===----------------------------------------------------------------------===// |
Bruno Cardoso Lopes | b53db4f | 2009-03-19 02:12:28 +0000 | [diff] [blame] | 2541 | |
Duncan Sands | 1e96bab | 2010-11-04 10:49:57 +0000 | [diff] [blame] | 2542 | static bool CC_MipsO32(unsigned ValNo, MVT ValVT, |
Duncan Sands | 1440e8b | 2010-11-03 11:35:31 +0000 | [diff] [blame] | 2543 | MVT LocVT, CCValAssign::LocInfo LocInfo, |
Bruno Cardoso Lopes | b53db4f | 2009-03-19 02:12:28 +0000 | [diff] [blame] | 2544 | ISD::ArgFlagsTy ArgFlags, CCState &State) { |
| 2545 | |
Wesley Peck | bf17cfa | 2010-11-23 03:31:01 +0000 | [diff] [blame] | 2546 | static const unsigned IntRegsSize=4, FloatRegsSize=2; |
Bruno Cardoso Lopes | b53db4f | 2009-03-19 02:12:28 +0000 | [diff] [blame] | 2547 | |
Craig Topper | c5eaae4 | 2012-03-11 07:57:25 +0000 | [diff] [blame] | 2548 | static const uint16_t IntRegs[] = { |
Bruno Cardoso Lopes | b53db4f | 2009-03-19 02:12:28 +0000 | [diff] [blame] | 2549 | Mips::A0, Mips::A1, Mips::A2, Mips::A3 |
| 2550 | }; |
Craig Topper | c5eaae4 | 2012-03-11 07:57:25 +0000 | [diff] [blame] | 2551 | static const uint16_t F32Regs[] = { |
Bruno Cardoso Lopes | b53db4f | 2009-03-19 02:12:28 +0000 | [diff] [blame] | 2552 | Mips::F12, Mips::F14 |
| 2553 | }; |
Craig Topper | c5eaae4 | 2012-03-11 07:57:25 +0000 | [diff] [blame] | 2554 | static const uint16_t F64Regs[] = { |
Bruno Cardoso Lopes | b53db4f | 2009-03-19 02:12:28 +0000 | [diff] [blame] | 2555 | Mips::D6, Mips::D7 |
| 2556 | }; |
| 2557 | |
Akira Hatanaka | fe30a9b | 2012-10-27 00:29:43 +0000 | [diff] [blame] | 2558 | // Do not process byval args here. |
| 2559 | if (ArgFlags.isByVal()) |
| 2560 | return true; |
Akira Hatanaka | 4231c7e | 2011-05-24 19:18:33 +0000 | [diff] [blame] | 2561 | |
Bruno Cardoso Lopes | b37a742 | 2010-02-06 19:20:49 +0000 | [diff] [blame] | 2562 | // Promote i8 and i16 |
| 2563 | if (LocVT == MVT::i8 || LocVT == MVT::i16) { |
| 2564 | LocVT = MVT::i32; |
| 2565 | if (ArgFlags.isSExt()) |
| 2566 | LocInfo = CCValAssign::SExt; |
| 2567 | else if (ArgFlags.isZExt()) |
| 2568 | LocInfo = CCValAssign::ZExt; |
| 2569 | else |
| 2570 | LocInfo = CCValAssign::AExt; |
| 2571 | } |
| 2572 | |
Bruno Cardoso Lopes | c42fb5f | 2011-03-04 20:27:44 +0000 | [diff] [blame] | 2573 | unsigned Reg; |
| 2574 | |
Akira Hatanaka | 95b8ae1 | 2011-05-19 18:06:05 +0000 | [diff] [blame] | 2575 | // f32 and f64 are allocated in A0, A1, A2, A3 when either of the following |
| 2576 | // is true: function is vararg, argument is 3rd or higher, there is previous |
| 2577 | // argument which is not f32 or f64. |
| 2578 | bool AllocateFloatsInIntReg = State.isVarArg() || ValNo > 1 |
| 2579 | || State.getFirstUnallocated(F32Regs, FloatRegsSize) != ValNo; |
Akira Hatanaka | a1a7ba8 | 2011-05-19 20:29:48 +0000 | [diff] [blame] | 2580 | unsigned OrigAlign = ArgFlags.getOrigAlign(); |
| 2581 | bool isI64 = (ValVT == MVT::i32 && OrigAlign == 8); |
Akira Hatanaka | 95b8ae1 | 2011-05-19 18:06:05 +0000 | [diff] [blame] | 2582 | |
| 2583 | if (ValVT == MVT::i32 || (ValVT == MVT::f32 && AllocateFloatsInIntReg)) { |
Bruno Cardoso Lopes | c42fb5f | 2011-03-04 20:27:44 +0000 | [diff] [blame] | 2584 | Reg = State.AllocateReg(IntRegs, IntRegsSize); |
Akira Hatanaka | a1a7ba8 | 2011-05-19 20:29:48 +0000 | [diff] [blame] | 2585 | // If this is the first part of an i64 arg, |
| 2586 | // the allocated register must be either A0 or A2. |
| 2587 | if (isI64 && (Reg == Mips::A1 || Reg == Mips::A3)) |
| 2588 | Reg = State.AllocateReg(IntRegs, IntRegsSize); |
Bruno Cardoso Lopes | c42fb5f | 2011-03-04 20:27:44 +0000 | [diff] [blame] | 2589 | LocVT = MVT::i32; |
Akira Hatanaka | 95b8ae1 | 2011-05-19 18:06:05 +0000 | [diff] [blame] | 2590 | } else if (ValVT == MVT::f64 && AllocateFloatsInIntReg) { |
| 2591 | // Allocate int register and shadow next int register. If first |
| 2592 | // available register is Mips::A1 or Mips::A3, shadow it too. |
Bruno Cardoso Lopes | c42fb5f | 2011-03-04 20:27:44 +0000 | [diff] [blame] | 2593 | Reg = State.AllocateReg(IntRegs, IntRegsSize); |
| 2594 | if (Reg == Mips::A1 || Reg == Mips::A3) |
| 2595 | Reg = State.AllocateReg(IntRegs, IntRegsSize); |
| 2596 | State.AllocateReg(IntRegs, IntRegsSize); |
| 2597 | LocVT = MVT::i32; |
Akira Hatanaka | 95b8ae1 | 2011-05-19 18:06:05 +0000 | [diff] [blame] | 2598 | } else if (ValVT.isFloatingPoint() && !AllocateFloatsInIntReg) { |
| 2599 | // we are guaranteed to find an available float register |
| 2600 | if (ValVT == MVT::f32) { |
| 2601 | Reg = State.AllocateReg(F32Regs, FloatRegsSize); |
| 2602 | // Shadow int register |
| 2603 | State.AllocateReg(IntRegs, IntRegsSize); |
| 2604 | } else { |
| 2605 | Reg = State.AllocateReg(F64Regs, FloatRegsSize); |
| 2606 | // Shadow int registers |
| 2607 | unsigned Reg2 = State.AllocateReg(IntRegs, IntRegsSize); |
| 2608 | if (Reg2 == Mips::A1 || Reg2 == Mips::A3) |
| 2609 | State.AllocateReg(IntRegs, IntRegsSize); |
| 2610 | State.AllocateReg(IntRegs, IntRegsSize); |
| 2611 | } |
Bruno Cardoso Lopes | c42fb5f | 2011-03-04 20:27:44 +0000 | [diff] [blame] | 2612 | } else |
| 2613 | llvm_unreachable("Cannot handle this ValVT."); |
Bruno Cardoso Lopes | b37a742 | 2010-02-06 19:20:49 +0000 | [diff] [blame] | 2614 | |
Akira Hatanaka | fe30a9b | 2012-10-27 00:29:43 +0000 | [diff] [blame] | 2615 | if (!Reg) { |
| 2616 | unsigned Offset = State.AllocateStack(ValVT.getSizeInBits() >> 3, |
| 2617 | OrigAlign); |
Bruno Cardoso Lopes | c42fb5f | 2011-03-04 20:27:44 +0000 | [diff] [blame] | 2618 | State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset, LocVT, LocInfo)); |
Akira Hatanaka | fe30a9b | 2012-10-27 00:29:43 +0000 | [diff] [blame] | 2619 | } else |
Bruno Cardoso Lopes | c42fb5f | 2011-03-04 20:27:44 +0000 | [diff] [blame] | 2620 | State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo)); |
Bruno Cardoso Lopes | b37a742 | 2010-02-06 19:20:49 +0000 | [diff] [blame] | 2621 | |
Akira Hatanaka | fe30a9b | 2012-10-27 00:29:43 +0000 | [diff] [blame] | 2622 | return false; |
Akira Hatanaka | 2c5d652 | 2011-11-12 02:20:46 +0000 | [diff] [blame] | 2623 | } |
| 2624 | |
| 2625 | #include "MipsGenCallingConv.inc" |
| 2626 | |
Akira Hatanaka | 4552c9a | 2011-04-15 21:51:11 +0000 | [diff] [blame] | 2627 | //===----------------------------------------------------------------------===// |
Dan Gohman | 98ca4f2 | 2009-08-05 01:29:28 +0000 | [diff] [blame] | 2628 | // Call Calling Convention Implementation |
Akira Hatanaka | 4552c9a | 2011-04-15 21:51:11 +0000 | [diff] [blame] | 2629 | //===----------------------------------------------------------------------===// |
Bruno Cardoso Lopes | 972f589 | 2007-06-06 07:42:06 +0000 | [diff] [blame] | 2630 | |
Akira Hatanaka | 4231c7e | 2011-05-24 19:18:33 +0000 | [diff] [blame] | 2631 | static const unsigned O32IntRegsSize = 4; |
| 2632 | |
Akira Hatanaka | 373e3a4 | 2011-09-23 00:58:33 +0000 | [diff] [blame] | 2633 | // Return next O32 integer argument register. |
| 2634 | static unsigned getNextIntArgReg(unsigned Reg) { |
| 2635 | assert((Reg == Mips::A0) || (Reg == Mips::A2)); |
| 2636 | return (Reg == Mips::A0) ? Mips::A1 : Mips::A3; |
| 2637 | } |
| 2638 | |
Akira Hatanaka | 2b861be | 2012-10-19 21:47:33 +0000 | [diff] [blame] | 2639 | /// IsEligibleForTailCallOptimization - Check whether the call is eligible |
| 2640 | /// for tail call optimization. |
| 2641 | bool MipsTargetLowering:: |
| 2642 | IsEligibleForTailCallOptimization(CallingConv::ID CalleeCC, |
| 2643 | unsigned NextStackOffset) const { |
| 2644 | if (!EnableMipsTailCalls) |
| 2645 | return false; |
| 2646 | |
| 2647 | // Do not tail-call optimize if there is an argument passed on stack. |
| 2648 | if (IsO32 && (CalleeCC != CallingConv::Fast)) { |
| 2649 | if (NextStackOffset > 16) |
| 2650 | return false; |
| 2651 | } else if (NextStackOffset) |
| 2652 | return false; |
| 2653 | |
| 2654 | return true; |
| 2655 | } |
| 2656 | |
Dan Gohman | 98ca4f2 | 2009-08-05 01:29:28 +0000 | [diff] [blame] | 2657 | /// LowerCall - functions arguments are copied from virtual regs to |
Nate Begeman | 5bf4b75 | 2009-01-26 03:15:54 +0000 | [diff] [blame] | 2658 | /// (physical regs)/(stack frame), CALLSEQ_START and CALLSEQ_END are emitted. |
Dan Gohman | 98ca4f2 | 2009-08-05 01:29:28 +0000 | [diff] [blame] | 2659 | SDValue |
Justin Holewinski | d2ea0e1 | 2012-05-25 16:35:28 +0000 | [diff] [blame] | 2660 | MipsTargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI, |
Dan Gohman | d858e90 | 2010-04-17 15:26:15 +0000 | [diff] [blame] | 2661 | SmallVectorImpl<SDValue> &InVals) const { |
Justin Holewinski | d2ea0e1 | 2012-05-25 16:35:28 +0000 | [diff] [blame] | 2662 | SelectionDAG &DAG = CLI.DAG; |
| 2663 | DebugLoc &dl = CLI.DL; |
| 2664 | SmallVector<ISD::OutputArg, 32> &Outs = CLI.Outs; |
| 2665 | SmallVector<SDValue, 32> &OutVals = CLI.OutVals; |
| 2666 | SmallVector<ISD::InputArg, 32> &Ins = CLI.Ins; |
Akira Hatanaka | e2d529a | 2012-07-31 18:46:41 +0000 | [diff] [blame] | 2667 | SDValue Chain = CLI.Chain; |
Justin Holewinski | d2ea0e1 | 2012-05-25 16:35:28 +0000 | [diff] [blame] | 2668 | SDValue Callee = CLI.Callee; |
| 2669 | bool &isTailCall = CLI.IsTailCall; |
| 2670 | CallingConv::ID CallConv = CLI.CallConv; |
| 2671 | bool isVarArg = CLI.IsVarArg; |
| 2672 | |
Bruno Cardoso Lopes | 2ab22d1 | 2007-07-11 23:16:16 +0000 | [diff] [blame] | 2673 | MachineFunction &MF = DAG.getMachineFunction(); |
Bruno Cardoso Lopes | 2ab22d1 | 2007-07-11 23:16:16 +0000 | [diff] [blame] | 2674 | MachineFrameInfo *MFI = MF.getFrameInfo(); |
Akira Hatanaka | d37776d | 2011-05-20 21:39:54 +0000 | [diff] [blame] | 2675 | const TargetFrameLowering *TFL = MF.getTarget().getFrameLowering(); |
Bruno Cardoso Lopes | c517cb0 | 2009-09-01 17:27:58 +0000 | [diff] [blame] | 2676 | bool IsPIC = getTargetMachine().getRelocationModel() == Reloc::PIC_; |
Bruno Cardoso Lopes | 972f589 | 2007-06-06 07:42:06 +0000 | [diff] [blame] | 2677 | |
| 2678 | // Analyze operands of the call, assigning locations to each operand. |
| 2679 | SmallVector<CCValAssign, 16> ArgLocs; |
Eric Christopher | 471e422 | 2011-06-08 23:55:35 +0000 | [diff] [blame] | 2680 | CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), |
Akira Hatanaka | 8209968 | 2011-12-19 19:52:25 +0000 | [diff] [blame] | 2681 | getTargetMachine(), ArgLocs, *DAG.getContext()); |
Akira Hatanaka | fe30a9b | 2012-10-27 00:29:43 +0000 | [diff] [blame] | 2682 | MipsCC MipsCCInfo(CallConv, isVarArg, IsO32, CCInfo); |
Bruno Cardoso Lopes | 2ab22d1 | 2007-07-11 23:16:16 +0000 | [diff] [blame] | 2683 | |
Akira Hatanaka | fe30a9b | 2012-10-27 00:29:43 +0000 | [diff] [blame] | 2684 | MipsCCInfo.analyzeCallOperands(Outs); |
Wesley Peck | bf17cfa | 2010-11-23 03:31:01 +0000 | [diff] [blame] | 2685 | |
Bruno Cardoso Lopes | 972f589 | 2007-06-06 07:42:06 +0000 | [diff] [blame] | 2686 | // Get a count of how many bytes are to be pushed on the stack. |
Akira Hatanaka | 3d21c24 | 2011-06-08 17:39:33 +0000 | [diff] [blame] | 2687 | unsigned NextStackOffset = CCInfo.getNextStackOffset(); |
Akira Hatanaka | 480eeb5 | 2012-07-26 23:27:01 +0000 | [diff] [blame] | 2688 | unsigned StackAlignment = TFL->getStackAlignment(); |
| 2689 | NextStackOffset = RoundUpToAlignment(NextStackOffset, StackAlignment); |
| 2690 | |
Akira Hatanaka | 2b861be | 2012-10-19 21:47:33 +0000 | [diff] [blame] | 2691 | // Check if it's really possible to do a tail call. |
| 2692 | if (isTailCall) |
| 2693 | isTailCall = IsEligibleForTailCallOptimization(CallConv, NextStackOffset); |
| 2694 | |
| 2695 | if (isTailCall) |
| 2696 | ++NumTailCalls; |
| 2697 | |
Akira Hatanaka | da7f5f1 | 2011-09-19 20:26:02 +0000 | [diff] [blame] | 2698 | // Chain is the output chain of the last Load/Store or CopyToReg node. |
| 2699 | // ByValChain is the output chain of the last Memcpy node created for copying |
| 2700 | // byval arguments to the stack. |
Akira Hatanaka | da7f5f1 | 2011-09-19 20:26:02 +0000 | [diff] [blame] | 2701 | SDValue NextStackOffsetVal = DAG.getIntPtrConstant(NextStackOffset, true); |
Akira Hatanaka | 2b861be | 2012-10-19 21:47:33 +0000 | [diff] [blame] | 2702 | |
| 2703 | if (!isTailCall) |
| 2704 | Chain = DAG.getCALLSEQ_START(Chain, NextStackOffsetVal); |
Akira Hatanaka | e2d529a | 2012-07-31 18:46:41 +0000 | [diff] [blame] | 2705 | |
| 2706 | SDValue StackPtr = DAG.getCopyFromReg(Chain, dl, |
| 2707 | IsN64 ? Mips::SP_64 : Mips::SP, |
| 2708 | getPointerTy()); |
Akira Hatanaka | 3d21c24 | 2011-06-08 17:39:33 +0000 | [diff] [blame] | 2709 | |
Bruno Cardoso Lopes | 225ca9c | 2008-07-05 19:05:21 +0000 | [diff] [blame] | 2710 | // With EABI is it possible to have 16 args on registers. |
Dan Gohman | 475871a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 2711 | SmallVector<std::pair<unsigned, SDValue>, 16> RegsToPass; |
| 2712 | SmallVector<SDValue, 8> MemOpChains; |
Akira Hatanaka | fe30a9b | 2012-10-27 00:29:43 +0000 | [diff] [blame] | 2713 | MipsCC::byval_iterator ByValArg = MipsCCInfo.byval_begin(); |
Bruno Cardoso Lopes | 972f589 | 2007-06-06 07:42:06 +0000 | [diff] [blame] | 2714 | |
| 2715 | // Walk the register/memloc assignments, inserting copies/loads. |
| 2716 | for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { |
Dan Gohman | c940365 | 2010-07-07 15:54:55 +0000 | [diff] [blame] | 2717 | SDValue Arg = OutVals[i]; |
Bruno Cardoso Lopes | 972f589 | 2007-06-06 07:42:06 +0000 | [diff] [blame] | 2718 | CCValAssign &VA = ArgLocs[i]; |
Akira Hatanaka | e42f33b | 2011-10-28 19:49:00 +0000 | [diff] [blame] | 2719 | MVT ValVT = VA.getValVT(), LocVT = VA.getLocVT(); |
Akira Hatanaka | 6df3e7b | 2011-11-12 02:34:50 +0000 | [diff] [blame] | 2720 | ISD::ArgFlagsTy Flags = Outs[i].Flags; |
| 2721 | |
| 2722 | // ByVal Arg. |
| 2723 | if (Flags.isByVal()) { |
| 2724 | assert(Flags.getByValSize() && |
| 2725 | "ByVal args of size 0 should have been ignored by front-end."); |
Akira Hatanaka | fe30a9b | 2012-10-27 00:29:43 +0000 | [diff] [blame] | 2726 | assert(ByValArg != MipsCCInfo.byval_end()); |
| 2727 | passByValArg(Chain, dl, RegsToPass, MemOpChains, StackPtr, MFI, DAG, Arg, |
| 2728 | MipsCCInfo, *ByValArg, Flags, Subtarget->isLittle()); |
| 2729 | ++ByValArg; |
Akira Hatanaka | 6df3e7b | 2011-11-12 02:34:50 +0000 | [diff] [blame] | 2730 | continue; |
| 2731 | } |
Jia Liu | bb481f8 | 2012-02-28 07:46:26 +0000 | [diff] [blame] | 2732 | |
Bruno Cardoso Lopes | 972f589 | 2007-06-06 07:42:06 +0000 | [diff] [blame] | 2733 | // Promote the value if needed. |
| 2734 | switch (VA.getLocInfo()) { |
Torok Edwin | c23197a | 2009-07-14 16:55:14 +0000 | [diff] [blame] | 2735 | default: llvm_unreachable("Unknown loc info!"); |
Wesley Peck | bf17cfa | 2010-11-23 03:31:01 +0000 | [diff] [blame] | 2736 | case CCValAssign::Full: |
Akira Hatanaka | e42f33b | 2011-10-28 19:49:00 +0000 | [diff] [blame] | 2737 | if (VA.isRegLoc()) { |
| 2738 | if ((ValVT == MVT::f32 && LocVT == MVT::i32) || |
| 2739 | (ValVT == MVT::f64 && LocVT == MVT::i64)) |
| 2740 | Arg = DAG.getNode(ISD::BITCAST, dl, LocVT, Arg); |
| 2741 | else if (ValVT == MVT::f64 && LocVT == MVT::i32) { |
Akira Hatanaka | 4552c9a | 2011-04-15 21:51:11 +0000 | [diff] [blame] | 2742 | SDValue Lo = DAG.getNode(MipsISD::ExtractElementF64, dl, MVT::i32, |
| 2743 | Arg, DAG.getConstant(0, MVT::i32)); |
Akira Hatanaka | 0bf3dfb | 2011-04-15 21:00:26 +0000 | [diff] [blame] | 2744 | SDValue Hi = DAG.getNode(MipsISD::ExtractElementF64, dl, MVT::i32, |
| 2745 | Arg, DAG.getConstant(1, MVT::i32)); |
Akira Hatanaka | 99a2e98 | 2011-04-15 19:52:08 +0000 | [diff] [blame] | 2746 | if (!Subtarget->isLittle()) |
| 2747 | std::swap(Lo, Hi); |
Jia Liu | bb481f8 | 2012-02-28 07:46:26 +0000 | [diff] [blame] | 2748 | unsigned LocRegLo = VA.getLocReg(); |
Akira Hatanaka | 373e3a4 | 2011-09-23 00:58:33 +0000 | [diff] [blame] | 2749 | unsigned LocRegHigh = getNextIntArgReg(LocRegLo); |
| 2750 | RegsToPass.push_back(std::make_pair(LocRegLo, Lo)); |
| 2751 | RegsToPass.push_back(std::make_pair(LocRegHigh, Hi)); |
Bruno Cardoso Lopes | b53db4f | 2009-03-19 02:12:28 +0000 | [diff] [blame] | 2752 | continue; |
Wesley Peck | bf17cfa | 2010-11-23 03:31:01 +0000 | [diff] [blame] | 2753 | } |
Bruno Cardoso Lopes | b53db4f | 2009-03-19 02:12:28 +0000 | [diff] [blame] | 2754 | } |
| 2755 | break; |
Chris Lattner | e0b1215 | 2008-03-17 06:57:02 +0000 | [diff] [blame] | 2756 | case CCValAssign::SExt: |
Akira Hatanaka | e42f33b | 2011-10-28 19:49:00 +0000 | [diff] [blame] | 2757 | Arg = DAG.getNode(ISD::SIGN_EXTEND, dl, LocVT, Arg); |
Chris Lattner | e0b1215 | 2008-03-17 06:57:02 +0000 | [diff] [blame] | 2758 | break; |
| 2759 | case CCValAssign::ZExt: |
Akira Hatanaka | e42f33b | 2011-10-28 19:49:00 +0000 | [diff] [blame] | 2760 | Arg = DAG.getNode(ISD::ZERO_EXTEND, dl, LocVT, Arg); |
Chris Lattner | e0b1215 | 2008-03-17 06:57:02 +0000 | [diff] [blame] | 2761 | break; |
| 2762 | case CCValAssign::AExt: |
Akira Hatanaka | 38bdc57 | 2012-02-17 02:20:26 +0000 | [diff] [blame] | 2763 | Arg = DAG.getNode(ISD::ANY_EXTEND, dl, LocVT, Arg); |
Chris Lattner | e0b1215 | 2008-03-17 06:57:02 +0000 | [diff] [blame] | 2764 | break; |
Bruno Cardoso Lopes | 972f589 | 2007-06-06 07:42:06 +0000 | [diff] [blame] | 2765 | } |
Wesley Peck | bf17cfa | 2010-11-23 03:31:01 +0000 | [diff] [blame] | 2766 | |
| 2767 | // Arguments that can be passed on register must be kept at |
Bruno Cardoso Lopes | c7db561 | 2007-11-05 03:02:32 +0000 | [diff] [blame] | 2768 | // RegsToPass vector |
Bruno Cardoso Lopes | 972f589 | 2007-06-06 07:42:06 +0000 | [diff] [blame] | 2769 | if (VA.isRegLoc()) { |
| 2770 | RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg)); |
Chris Lattner | e0b1215 | 2008-03-17 06:57:02 +0000 | [diff] [blame] | 2771 | continue; |
Bruno Cardoso Lopes | 972f589 | 2007-06-06 07:42:06 +0000 | [diff] [blame] | 2772 | } |
Wesley Peck | bf17cfa | 2010-11-23 03:31:01 +0000 | [diff] [blame] | 2773 | |
Bruno Cardoso Lopes | b53db4f | 2009-03-19 02:12:28 +0000 | [diff] [blame] | 2774 | // Register can't get to this point... |
Chris Lattner | e0b1215 | 2008-03-17 06:57:02 +0000 | [diff] [blame] | 2775 | assert(VA.isMemLoc()); |
Wesley Peck | bf17cfa | 2010-11-23 03:31:01 +0000 | [diff] [blame] | 2776 | |
Wesley Peck | bf17cfa | 2010-11-23 03:31:01 +0000 | [diff] [blame] | 2777 | // emit ISD::STORE whichs stores the |
Chris Lattner | e0b1215 | 2008-03-17 06:57:02 +0000 | [diff] [blame] | 2778 | // parameter value to a stack Location |
Akira Hatanaka | e2d529a | 2012-07-31 18:46:41 +0000 | [diff] [blame] | 2779 | SDValue PtrOff = DAG.getNode(ISD::ADD, dl, getPointerTy(), StackPtr, |
| 2780 | DAG.getIntPtrConstant(VA.getLocMemOffset())); |
Chris Lattner | 8026a9d | 2010-09-21 17:50:43 +0000 | [diff] [blame] | 2781 | MemOpChains.push_back(DAG.getStore(Chain, dl, Arg, PtrOff, |
Akira Hatanaka | 8209968 | 2011-12-19 19:52:25 +0000 | [diff] [blame] | 2782 | MachinePointerInfo(), false, false, 0)); |
Bruno Cardoso Lopes | 972f589 | 2007-06-06 07:42:06 +0000 | [diff] [blame] | 2783 | } |
| 2784 | |
Bruno Cardoso Lopes | 225ca9c | 2008-07-05 19:05:21 +0000 | [diff] [blame] | 2785 | // Transform all store nodes into one single node because all store |
| 2786 | // nodes are independent of each other. |
Wesley Peck | bf17cfa | 2010-11-23 03:31:01 +0000 | [diff] [blame] | 2787 | if (!MemOpChains.empty()) |
| 2788 | Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, |
Bruno Cardoso Lopes | 972f589 | 2007-06-06 07:42:06 +0000 | [diff] [blame] | 2789 | &MemOpChains[0], MemOpChains.size()); |
| 2790 | |
Bill Wendling | 056292f | 2008-09-16 21:48:12 +0000 | [diff] [blame] | 2791 | // If the callee is a GlobalAddress/ExternalSymbol node (quite common, every |
Wesley Peck | bf17cfa | 2010-11-23 03:31:01 +0000 | [diff] [blame] | 2792 | // direct call is) turn it into a TargetGlobalAddress/TargetExternalSymbol |
| 2793 | // node so that legalize doesn't hack it. |
Akira Hatanaka | e42f33b | 2011-10-28 19:49:00 +0000 | [diff] [blame] | 2794 | unsigned char OpFlag; |
| 2795 | bool IsPICCall = (IsN64 || IsPIC); // true if calls are translated to jalr $25 |
Akira Hatanaka | 0dca945 | 2011-12-09 01:45:12 +0000 | [diff] [blame] | 2796 | bool GlobalOrExternal = false; |
Akira Hatanaka | 9777e7a | 2011-04-07 19:51:44 +0000 | [diff] [blame] | 2797 | SDValue CalleeLo; |
Akira Hatanaka | f49fde2 | 2011-04-04 17:11:07 +0000 | [diff] [blame] | 2798 | |
| 2799 | if (GlobalAddressSDNode *G = dyn_cast<GlobalAddressSDNode>(Callee)) { |
Akira Hatanaka | e42f33b | 2011-10-28 19:49:00 +0000 | [diff] [blame] | 2800 | if (IsPICCall && G->getGlobal()->hasInternalLinkage()) { |
| 2801 | OpFlag = IsO32 ? MipsII::MO_GOT : MipsII::MO_GOT_PAGE; |
| 2802 | unsigned char LoFlag = IsO32 ? MipsII::MO_ABS_LO : MipsII::MO_GOT_OFST; |
| 2803 | Callee = DAG.getTargetGlobalAddress(G->getGlobal(), dl, getPointerTy(), 0, |
| 2804 | OpFlag); |
Akira Hatanaka | 9777e7a | 2011-04-07 19:51:44 +0000 | [diff] [blame] | 2805 | CalleeLo = DAG.getTargetGlobalAddress(G->getGlobal(), dl, getPointerTy(), |
Akira Hatanaka | e42f33b | 2011-10-28 19:49:00 +0000 | [diff] [blame] | 2806 | 0, LoFlag); |
Akira Hatanaka | 9777e7a | 2011-04-07 19:51:44 +0000 | [diff] [blame] | 2807 | } else { |
Akira Hatanaka | e42f33b | 2011-10-28 19:49:00 +0000 | [diff] [blame] | 2808 | OpFlag = IsPICCall ? MipsII::MO_GOT_CALL : MipsII::MO_NO_FLAG; |
Akira Hatanaka | 9777e7a | 2011-04-07 19:51:44 +0000 | [diff] [blame] | 2809 | Callee = DAG.getTargetGlobalAddress(G->getGlobal(), dl, |
| 2810 | getPointerTy(), 0, OpFlag); |
| 2811 | } |
| 2812 | |
Akira Hatanaka | 0dca945 | 2011-12-09 01:45:12 +0000 | [diff] [blame] | 2813 | GlobalOrExternal = true; |
Akira Hatanaka | f49fde2 | 2011-04-04 17:11:07 +0000 | [diff] [blame] | 2814 | } |
| 2815 | else if (ExternalSymbolSDNode *S = dyn_cast<ExternalSymbolSDNode>(Callee)) { |
Akira Hatanaka | e42f33b | 2011-10-28 19:49:00 +0000 | [diff] [blame] | 2816 | if (IsN64 || (!IsO32 && IsPIC)) |
| 2817 | OpFlag = MipsII::MO_GOT_DISP; |
| 2818 | else if (!IsPIC) // !N64 && static |
| 2819 | OpFlag = MipsII::MO_NO_FLAG; |
| 2820 | else // O32 & PIC |
| 2821 | OpFlag = MipsII::MO_GOT_CALL; |
Akira Hatanaka | 8209968 | 2011-12-19 19:52:25 +0000 | [diff] [blame] | 2822 | Callee = DAG.getTargetExternalSymbol(S->getSymbol(), getPointerTy(), |
| 2823 | OpFlag); |
Akira Hatanaka | 0dca945 | 2011-12-09 01:45:12 +0000 | [diff] [blame] | 2824 | GlobalOrExternal = true; |
Akira Hatanaka | f49fde2 | 2011-04-04 17:11:07 +0000 | [diff] [blame] | 2825 | } |
| 2826 | |
Akira Hatanaka | cd0f90f | 2011-05-20 02:30:51 +0000 | [diff] [blame] | 2827 | SDValue InFlag; |
| 2828 | |
Akira Hatanaka | f49fde2 | 2011-04-04 17:11:07 +0000 | [diff] [blame] | 2829 | // Create nodes that load address of callee and copy it to T9 |
Akira Hatanaka | e42f33b | 2011-10-28 19:49:00 +0000 | [diff] [blame] | 2830 | if (IsPICCall) { |
Akira Hatanaka | 0dca945 | 2011-12-09 01:45:12 +0000 | [diff] [blame] | 2831 | if (GlobalOrExternal) { |
Akira Hatanaka | 9777e7a | 2011-04-07 19:51:44 +0000 | [diff] [blame] | 2832 | // Load callee address |
Akira Hatanaka | 648f00c | 2012-02-24 22:34:47 +0000 | [diff] [blame] | 2833 | Callee = DAG.getNode(MipsISD::Wrapper, dl, getPointerTy(), |
| 2834 | GetGlobalReg(DAG, getPointerTy()), Callee); |
Akira Hatanaka | e42f33b | 2011-10-28 19:49:00 +0000 | [diff] [blame] | 2835 | SDValue LoadValue = DAG.getLoad(getPointerTy(), dl, DAG.getEntryNode(), |
| 2836 | Callee, MachinePointerInfo::getGOT(), |
Pete Cooper | d752e0f | 2011-11-08 18:42:53 +0000 | [diff] [blame] | 2837 | false, false, false, 0); |
Akira Hatanaka | 9777e7a | 2011-04-07 19:51:44 +0000 | [diff] [blame] | 2838 | |
| 2839 | // Use GOT+LO if callee has internal linkage. |
| 2840 | if (CalleeLo.getNode()) { |
Akira Hatanaka | e42f33b | 2011-10-28 19:49:00 +0000 | [diff] [blame] | 2841 | SDValue Lo = DAG.getNode(MipsISD::Lo, dl, getPointerTy(), CalleeLo); |
| 2842 | Callee = DAG.getNode(ISD::ADD, dl, getPointerTy(), LoadValue, Lo); |
Akira Hatanaka | 9777e7a | 2011-04-07 19:51:44 +0000 | [diff] [blame] | 2843 | } else |
| 2844 | Callee = LoadValue; |
Akira Hatanaka | f49fde2 | 2011-04-04 17:11:07 +0000 | [diff] [blame] | 2845 | } |
Akira Hatanaka | 0dca945 | 2011-12-09 01:45:12 +0000 | [diff] [blame] | 2846 | } |
Akira Hatanaka | f49fde2 | 2011-04-04 17:11:07 +0000 | [diff] [blame] | 2847 | |
Akira Hatanaka | e11246c | 2012-07-26 02:24:43 +0000 | [diff] [blame] | 2848 | // T9 register operand. |
| 2849 | SDValue T9; |
| 2850 | |
Jia Liu | bb481f8 | 2012-02-28 07:46:26 +0000 | [diff] [blame] | 2851 | // T9 should contain the address of the callee function if |
Akira Hatanaka | 0dca945 | 2011-12-09 01:45:12 +0000 | [diff] [blame] | 2852 | // -reloction-model=pic or it is an indirect call. |
| 2853 | if (IsPICCall || !GlobalOrExternal) { |
Akira Hatanaka | f49fde2 | 2011-04-04 17:11:07 +0000 | [diff] [blame] | 2854 | // copy to T9 |
Akira Hatanaka | e42f33b | 2011-10-28 19:49:00 +0000 | [diff] [blame] | 2855 | unsigned T9Reg = IsN64 ? Mips::T9_64 : Mips::T9; |
| 2856 | Chain = DAG.getCopyToReg(Chain, dl, T9Reg, Callee, SDValue(0, 0)); |
Akira Hatanaka | f49fde2 | 2011-04-04 17:11:07 +0000 | [diff] [blame] | 2857 | InFlag = Chain.getValue(1); |
Akira Hatanaka | e11246c | 2012-07-26 02:24:43 +0000 | [diff] [blame] | 2858 | |
| 2859 | if (Subtarget->inMips16Mode()) |
| 2860 | T9 = DAG.getRegister(T9Reg, getPointerTy()); |
| 2861 | else |
| 2862 | Callee = DAG.getRegister(T9Reg, getPointerTy()); |
Akira Hatanaka | f49fde2 | 2011-04-04 17:11:07 +0000 | [diff] [blame] | 2863 | } |
Bill Wendling | 056292f | 2008-09-16 21:48:12 +0000 | [diff] [blame] | 2864 | |
Akira Hatanaka | 92d4aec | 2012-05-12 03:19:04 +0000 | [diff] [blame] | 2865 | // Insert node "GP copy globalreg" before call to function. |
| 2866 | // Lazy-binding stubs require GP to point to the GOT. |
| 2867 | if (IsPICCall) { |
| 2868 | unsigned GPReg = IsN64 ? Mips::GP_64 : Mips::GP; |
| 2869 | EVT Ty = IsN64 ? MVT::i64 : MVT::i32; |
| 2870 | RegsToPass.push_back(std::make_pair(GPReg, GetGlobalReg(DAG, Ty))); |
| 2871 | } |
| 2872 | |
Akira Hatanaka | cd0f90f | 2011-05-20 02:30:51 +0000 | [diff] [blame] | 2873 | // Build a sequence of copy-to-reg nodes chained together with token |
| 2874 | // chain and flag operands which copy the outgoing args into registers. |
| 2875 | // The InFlag in necessary since all emitted instructions must be |
| 2876 | // stuck together. |
| 2877 | for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) { |
| 2878 | Chain = DAG.getCopyToReg(Chain, dl, RegsToPass[i].first, |
| 2879 | RegsToPass[i].second, InFlag); |
| 2880 | InFlag = Chain.getValue(1); |
| 2881 | } |
| 2882 | |
Bruno Cardoso Lopes | 972f589 | 2007-06-06 07:42:06 +0000 | [diff] [blame] | 2883 | // MipsJmpLink = #chain, #target_address, #opt_in_flags... |
Wesley Peck | bf17cfa | 2010-11-23 03:31:01 +0000 | [diff] [blame] | 2884 | // = Chain, Callee, Reg#1, Reg#2, ... |
Bruno Cardoso Lopes | 972f589 | 2007-06-06 07:42:06 +0000 | [diff] [blame] | 2885 | // |
| 2886 | // Returns a chain & a flag for retval copy to use. |
Chris Lattner | f1b4eaf | 2010-12-21 02:38:05 +0000 | [diff] [blame] | 2887 | SDVTList NodeTys = DAG.getVTList(MVT::Other, MVT::Glue); |
Dan Gohman | 475871a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 2888 | SmallVector<SDValue, 8> Ops; |
Bruno Cardoso Lopes | 972f589 | 2007-06-06 07:42:06 +0000 | [diff] [blame] | 2889 | Ops.push_back(Chain); |
Akira Hatanaka | e11246c | 2012-07-26 02:24:43 +0000 | [diff] [blame] | 2890 | Ops.push_back(Callee); |
Bruno Cardoso Lopes | 972f589 | 2007-06-06 07:42:06 +0000 | [diff] [blame] | 2891 | |
Wesley Peck | bf17cfa | 2010-11-23 03:31:01 +0000 | [diff] [blame] | 2892 | // Add argument registers to the end of the list so that they are |
Bruno Cardoso Lopes | 972f589 | 2007-06-06 07:42:06 +0000 | [diff] [blame] | 2893 | // known live into the call. |
| 2894 | for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) |
| 2895 | Ops.push_back(DAG.getRegister(RegsToPass[i].first, |
| 2896 | RegsToPass[i].second.getValueType())); |
| 2897 | |
Akira Hatanaka | e11246c | 2012-07-26 02:24:43 +0000 | [diff] [blame] | 2898 | // Add T9 register operand. |
| 2899 | if (T9.getNode()) |
| 2900 | Ops.push_back(T9); |
| 2901 | |
Akira Hatanaka | b2930b9 | 2012-03-01 22:27:29 +0000 | [diff] [blame] | 2902 | // Add a register mask operand representing the call-preserved registers. |
| 2903 | const TargetRegisterInfo *TRI = getTargetMachine().getRegisterInfo(); |
| 2904 | const uint32_t *Mask = TRI->getCallPreservedMask(CallConv); |
| 2905 | assert(Mask && "Missing call preserved mask for calling convention"); |
| 2906 | Ops.push_back(DAG.getRegisterMask(Mask)); |
| 2907 | |
Gabor Greif | ba36cb5 | 2008-08-28 21:40:38 +0000 | [diff] [blame] | 2908 | if (InFlag.getNode()) |
Bruno Cardoso Lopes | 972f589 | 2007-06-06 07:42:06 +0000 | [diff] [blame] | 2909 | Ops.push_back(InFlag); |
| 2910 | |
Akira Hatanaka | 2b861be | 2012-10-19 21:47:33 +0000 | [diff] [blame] | 2911 | if (isTailCall) |
| 2912 | return DAG.getNode(MipsISD::TailCall, dl, MVT::Other, &Ops[0], Ops.size()); |
| 2913 | |
Dale Johannesen | 33c960f | 2009-02-04 20:06:27 +0000 | [diff] [blame] | 2914 | Chain = DAG.getNode(MipsISD::JmpLink, dl, NodeTys, &Ops[0], Ops.size()); |
Bruno Cardoso Lopes | 972f589 | 2007-06-06 07:42:06 +0000 | [diff] [blame] | 2915 | InFlag = Chain.getValue(1); |
| 2916 | |
Bruno Cardoso Lopes | 3ed6f87 | 2010-01-30 18:32:07 +0000 | [diff] [blame] | 2917 | // Create the CALLSEQ_END node. |
Akira Hatanaka | 480eeb5 | 2012-07-26 23:27:01 +0000 | [diff] [blame] | 2918 | Chain = DAG.getCALLSEQ_END(Chain, NextStackOffsetVal, |
Bruno Cardoso Lopes | 3ed6f87 | 2010-01-30 18:32:07 +0000 | [diff] [blame] | 2919 | DAG.getIntPtrConstant(0, true), InFlag); |
| 2920 | InFlag = Chain.getValue(1); |
| 2921 | |
Bruno Cardoso Lopes | 972f589 | 2007-06-06 07:42:06 +0000 | [diff] [blame] | 2922 | // Handle result values, copying them out of physregs into vregs that we |
| 2923 | // return. |
Dan Gohman | 98ca4f2 | 2009-08-05 01:29:28 +0000 | [diff] [blame] | 2924 | return LowerCallResult(Chain, InFlag, CallConv, isVarArg, |
| 2925 | Ins, dl, DAG, InVals); |
Bruno Cardoso Lopes | 972f589 | 2007-06-06 07:42:06 +0000 | [diff] [blame] | 2926 | } |
| 2927 | |
Dan Gohman | 98ca4f2 | 2009-08-05 01:29:28 +0000 | [diff] [blame] | 2928 | /// LowerCallResult - Lower the result values of a call into the |
| 2929 | /// appropriate copies out of appropriate physical registers. |
| 2930 | SDValue |
| 2931 | MipsTargetLowering::LowerCallResult(SDValue Chain, SDValue InFlag, |
Sandeep Patel | 65c3c8f | 2009-09-02 08:44:58 +0000 | [diff] [blame] | 2932 | CallingConv::ID CallConv, bool isVarArg, |
Dan Gohman | 98ca4f2 | 2009-08-05 01:29:28 +0000 | [diff] [blame] | 2933 | const SmallVectorImpl<ISD::InputArg> &Ins, |
| 2934 | DebugLoc dl, SelectionDAG &DAG, |
Dan Gohman | d858e90 | 2010-04-17 15:26:15 +0000 | [diff] [blame] | 2935 | SmallVectorImpl<SDValue> &InVals) const { |
Bruno Cardoso Lopes | 972f589 | 2007-06-06 07:42:06 +0000 | [diff] [blame] | 2936 | // Assign locations to each value returned by this call. |
| 2937 | SmallVector<CCValAssign, 16> RVLocs; |
Eric Christopher | 471e422 | 2011-06-08 23:55:35 +0000 | [diff] [blame] | 2938 | CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), |
Akira Hatanaka | 864f660 | 2012-06-14 21:10:56 +0000 | [diff] [blame] | 2939 | getTargetMachine(), RVLocs, *DAG.getContext()); |
Bruno Cardoso Lopes | 2ab22d1 | 2007-07-11 23:16:16 +0000 | [diff] [blame] | 2940 | |
Dan Gohman | 98ca4f2 | 2009-08-05 01:29:28 +0000 | [diff] [blame] | 2941 | CCInfo.AnalyzeCallResult(Ins, RetCC_Mips); |
Bruno Cardoso Lopes | 972f589 | 2007-06-06 07:42:06 +0000 | [diff] [blame] | 2942 | |
Bruno Cardoso Lopes | 972f589 | 2007-06-06 07:42:06 +0000 | [diff] [blame] | 2943 | // Copy all of the result registers out of their specified physreg. |
| 2944 | for (unsigned i = 0; i != RVLocs.size(); ++i) { |
Dale Johannesen | 33c960f | 2009-02-04 20:06:27 +0000 | [diff] [blame] | 2945 | Chain = DAG.getCopyFromReg(Chain, dl, RVLocs[i].getLocReg(), |
Dan Gohman | 98ca4f2 | 2009-08-05 01:29:28 +0000 | [diff] [blame] | 2946 | RVLocs[i].getValVT(), InFlag).getValue(1); |
Bruno Cardoso Lopes | 972f589 | 2007-06-06 07:42:06 +0000 | [diff] [blame] | 2947 | InFlag = Chain.getValue(2); |
Dan Gohman | 98ca4f2 | 2009-08-05 01:29:28 +0000 | [diff] [blame] | 2948 | InVals.push_back(Chain.getValue(0)); |
Bruno Cardoso Lopes | 972f589 | 2007-06-06 07:42:06 +0000 | [diff] [blame] | 2949 | } |
Bruno Cardoso Lopes | c7db561 | 2007-11-05 03:02:32 +0000 | [diff] [blame] | 2950 | |
Dan Gohman | 98ca4f2 | 2009-08-05 01:29:28 +0000 | [diff] [blame] | 2951 | return Chain; |
Bruno Cardoso Lopes | 972f589 | 2007-06-06 07:42:06 +0000 | [diff] [blame] | 2952 | } |
| 2953 | |
Akira Hatanaka | 4552c9a | 2011-04-15 21:51:11 +0000 | [diff] [blame] | 2954 | //===----------------------------------------------------------------------===// |
Dan Gohman | 98ca4f2 | 2009-08-05 01:29:28 +0000 | [diff] [blame] | 2955 | // Formal Arguments Calling Convention Implementation |
Akira Hatanaka | 4552c9a | 2011-04-15 21:51:11 +0000 | [diff] [blame] | 2956 | //===----------------------------------------------------------------------===// |
Wesley Peck | bf17cfa | 2010-11-23 03:31:01 +0000 | [diff] [blame] | 2957 | /// LowerFormalArguments - transform physical registers into virtual registers |
Bruno Cardoso Lopes | b37a742 | 2010-02-06 19:20:49 +0000 | [diff] [blame] | 2958 | /// and generate load operations for arguments places on the stack. |
Dan Gohman | 98ca4f2 | 2009-08-05 01:29:28 +0000 | [diff] [blame] | 2959 | SDValue |
| 2960 | MipsTargetLowering::LowerFormalArguments(SDValue Chain, |
Akira Hatanaka | 0bf3dfb | 2011-04-15 21:00:26 +0000 | [diff] [blame] | 2961 | CallingConv::ID CallConv, |
| 2962 | bool isVarArg, |
Akira Hatanaka | 8209968 | 2011-12-19 19:52:25 +0000 | [diff] [blame] | 2963 | const SmallVectorImpl<ISD::InputArg> &Ins, |
Akira Hatanaka | 0bf3dfb | 2011-04-15 21:00:26 +0000 | [diff] [blame] | 2964 | DebugLoc dl, SelectionDAG &DAG, |
| 2965 | SmallVectorImpl<SDValue> &InVals) |
Akira Hatanaka | 4552c9a | 2011-04-15 21:51:11 +0000 | [diff] [blame] | 2966 | const { |
Bruno Cardoso Lopes | f7f3b50 | 2008-08-04 07:12:52 +0000 | [diff] [blame] | 2967 | MachineFunction &MF = DAG.getMachineFunction(); |
Bruno Cardoso Lopes | 972f589 | 2007-06-06 07:42:06 +0000 | [diff] [blame] | 2968 | MachineFrameInfo *MFI = MF.getFrameInfo(); |
Bruno Cardoso Lopes | a2b1bb5 | 2007-08-28 05:08:16 +0000 | [diff] [blame] | 2969 | MipsFunctionInfo *MipsFI = MF.getInfo<MipsFunctionInfo>(); |
Bruno Cardoso Lopes | 2ab22d1 | 2007-07-11 23:16:16 +0000 | [diff] [blame] | 2970 | |
Dan Gohman | 1e93df6 | 2010-04-17 14:41:14 +0000 | [diff] [blame] | 2971 | MipsFI->setVarArgsFrameIndex(0); |
Bruno Cardoso Lopes | 972f589 | 2007-06-06 07:42:06 +0000 | [diff] [blame] | 2972 | |
Bruno Cardoso Lopes | b37a742 | 2010-02-06 19:20:49 +0000 | [diff] [blame] | 2973 | // Used with vargs to acumulate store chains. |
| 2974 | std::vector<SDValue> OutChains; |
| 2975 | |
Bruno Cardoso Lopes | 972f589 | 2007-06-06 07:42:06 +0000 | [diff] [blame] | 2976 | // Assign locations to all of the incoming arguments. |
| 2977 | SmallVector<CCValAssign, 16> ArgLocs; |
Eric Christopher | 471e422 | 2011-06-08 23:55:35 +0000 | [diff] [blame] | 2978 | CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), |
Akira Hatanaka | 8209968 | 2011-12-19 19:52:25 +0000 | [diff] [blame] | 2979 | getTargetMachine(), ArgLocs, *DAG.getContext()); |
Akira Hatanaka | fe30a9b | 2012-10-27 00:29:43 +0000 | [diff] [blame] | 2980 | MipsCC MipsCCInfo(CallConv, isVarArg, IsO32, CCInfo); |
Bruno Cardoso Lopes | 2ab22d1 | 2007-07-11 23:16:16 +0000 | [diff] [blame] | 2981 | |
Akira Hatanaka | fe30a9b | 2012-10-27 00:29:43 +0000 | [diff] [blame] | 2982 | MipsCCInfo.analyzeFormalArguments(Ins); |
Bruno Cardoso Lopes | b53db4f | 2009-03-19 02:12:28 +0000 | [diff] [blame] | 2983 | |
Akira Hatanaka | b4549e1 | 2012-03-27 03:13:56 +0000 | [diff] [blame] | 2984 | Function::const_arg_iterator FuncArg = |
| 2985 | DAG.getMachineFunction().getFunction()->arg_begin(); |
Akira Hatanaka | 4618e0b | 2012-10-27 00:44:39 +0000 | [diff] [blame^] | 2986 | unsigned CurArgIdx = 0; |
Akira Hatanaka | fe30a9b | 2012-10-27 00:29:43 +0000 | [diff] [blame] | 2987 | MipsCC::byval_iterator ByValArg = MipsCCInfo.byval_begin(); |
Bruno Cardoso Lopes | 225ca9c | 2008-07-05 19:05:21 +0000 | [diff] [blame] | 2988 | |
Akira Hatanaka | 4618e0b | 2012-10-27 00:44:39 +0000 | [diff] [blame^] | 2989 | for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { |
Bruno Cardoso Lopes | 972f589 | 2007-06-06 07:42:06 +0000 | [diff] [blame] | 2990 | CCValAssign &VA = ArgLocs[i]; |
Akira Hatanaka | 4618e0b | 2012-10-27 00:44:39 +0000 | [diff] [blame^] | 2991 | std::advance(FuncArg, Ins[i].OrigArgIndex - CurArgIdx); |
| 2992 | CurArgIdx = Ins[i].OrigArgIndex; |
Akira Hatanaka | feaa4c3 | 2011-10-28 19:55:48 +0000 | [diff] [blame] | 2993 | EVT ValVT = VA.getValVT(); |
Akira Hatanaka | 3a5257d | 2011-11-12 02:29:58 +0000 | [diff] [blame] | 2994 | ISD::ArgFlagsTy Flags = Ins[i].Flags; |
| 2995 | bool IsRegLoc = VA.isRegLoc(); |
| 2996 | |
| 2997 | if (Flags.isByVal()) { |
| 2998 | assert(Flags.getByValSize() && |
| 2999 | "ByVal args of size 0 should have been ignored by front-end."); |
Akira Hatanaka | fe30a9b | 2012-10-27 00:29:43 +0000 | [diff] [blame] | 3000 | assert(ByValArg != MipsCCInfo.byval_end()); |
| 3001 | copyByValRegs(Chain, dl, OutChains, DAG, Flags, InVals, &*FuncArg, |
| 3002 | MipsCCInfo, *ByValArg); |
| 3003 | ++ByValArg; |
Akira Hatanaka | 3a5257d | 2011-11-12 02:29:58 +0000 | [diff] [blame] | 3004 | continue; |
| 3005 | } |
Bruno Cardoso Lopes | 972f589 | 2007-06-06 07:42:06 +0000 | [diff] [blame] | 3006 | |
| 3007 | // Arguments stored on registers |
Akira Hatanaka | 3a5257d | 2011-11-12 02:29:58 +0000 | [diff] [blame] | 3008 | if (IsRegLoc) { |
Owen Anderson | e50ed30 | 2009-08-10 22:56:29 +0000 | [diff] [blame] | 3009 | EVT RegVT = VA.getLocVT(); |
Akira Hatanaka | b4d8d31 | 2011-05-24 00:23:52 +0000 | [diff] [blame] | 3010 | unsigned ArgReg = VA.getLocReg(); |
Craig Topper | 44d2382 | 2012-02-22 05:59:10 +0000 | [diff] [blame] | 3011 | const TargetRegisterClass *RC; |
Bruno Cardoso Lopes | b53db4f | 2009-03-19 02:12:28 +0000 | [diff] [blame] | 3012 | |
Owen Anderson | 825b72b | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 3013 | if (RegVT == MVT::i32) |
Craig Topper | 420761a | 2012-04-20 07:30:17 +0000 | [diff] [blame] | 3014 | RC = &Mips::CPURegsRegClass; |
Akira Hatanaka | 9593484 | 2011-09-24 01:34:44 +0000 | [diff] [blame] | 3015 | else if (RegVT == MVT::i64) |
Craig Topper | 420761a | 2012-04-20 07:30:17 +0000 | [diff] [blame] | 3016 | RC = &Mips::CPU64RegsRegClass; |
Wesley Peck | bf17cfa | 2010-11-23 03:31:01 +0000 | [diff] [blame] | 3017 | else if (RegVT == MVT::f32) |
Craig Topper | 420761a | 2012-04-20 07:30:17 +0000 | [diff] [blame] | 3018 | RC = &Mips::FGR32RegClass; |
Akira Hatanaka | 09dd60f | 2011-09-26 21:37:50 +0000 | [diff] [blame] | 3019 | else if (RegVT == MVT::f64) |
Craig Topper | 420761a | 2012-04-20 07:30:17 +0000 | [diff] [blame] | 3020 | RC = HasMips64 ? &Mips::FGR64RegClass : &Mips::AFGR64RegClass; |
Akira Hatanaka | 09dd60f | 2011-09-26 21:37:50 +0000 | [diff] [blame] | 3021 | else |
Bruno Cardoso Lopes | b37a742 | 2010-02-06 19:20:49 +0000 | [diff] [blame] | 3022 | llvm_unreachable("RegVT not supported by FormalArguments Lowering"); |
Bruno Cardoso Lopes | 972f589 | 2007-06-06 07:42:06 +0000 | [diff] [blame] | 3023 | |
Wesley Peck | bf17cfa | 2010-11-23 03:31:01 +0000 | [diff] [blame] | 3024 | // Transform the arguments stored on |
Bruno Cardoso Lopes | 972f589 | 2007-06-06 07:42:06 +0000 | [diff] [blame] | 3025 | // physical registers into virtual ones |
Akira Hatanaka | b4d8d31 | 2011-05-24 00:23:52 +0000 | [diff] [blame] | 3026 | unsigned Reg = AddLiveIn(DAG.getMachineFunction(), ArgReg, RC); |
Dan Gohman | 98ca4f2 | 2009-08-05 01:29:28 +0000 | [diff] [blame] | 3027 | SDValue ArgValue = DAG.getCopyFromReg(Chain, dl, Reg, RegVT); |
Wesley Peck | bf17cfa | 2010-11-23 03:31:01 +0000 | [diff] [blame] | 3028 | |
| 3029 | // If this is an 8 or 16-bit value, it has been passed promoted |
| 3030 | // to 32 bits. Insert an assert[sz]ext to capture this, then |
Bruno Cardoso Lopes | 972f589 | 2007-06-06 07:42:06 +0000 | [diff] [blame] | 3031 | // truncate to the right size. |
Bruno Cardoso Lopes | b53db4f | 2009-03-19 02:12:28 +0000 | [diff] [blame] | 3032 | if (VA.getLocInfo() != CCValAssign::Full) { |
Chris Lattner | d401507 | 2009-03-26 05:28:14 +0000 | [diff] [blame] | 3033 | unsigned Opcode = 0; |
Bruno Cardoso Lopes | b53db4f | 2009-03-19 02:12:28 +0000 | [diff] [blame] | 3034 | if (VA.getLocInfo() == CCValAssign::SExt) |
| 3035 | Opcode = ISD::AssertSext; |
| 3036 | else if (VA.getLocInfo() == CCValAssign::ZExt) |
| 3037 | Opcode = ISD::AssertZext; |
Chris Lattner | d401507 | 2009-03-26 05:28:14 +0000 | [diff] [blame] | 3038 | if (Opcode) |
Wesley Peck | bf17cfa | 2010-11-23 03:31:01 +0000 | [diff] [blame] | 3039 | ArgValue = DAG.getNode(Opcode, dl, RegVT, ArgValue, |
Akira Hatanaka | feaa4c3 | 2011-10-28 19:55:48 +0000 | [diff] [blame] | 3040 | DAG.getValueType(ValVT)); |
| 3041 | ArgValue = DAG.getNode(ISD::TRUNCATE, dl, ValVT, ArgValue); |
Bruno Cardoso Lopes | b53db4f | 2009-03-19 02:12:28 +0000 | [diff] [blame] | 3042 | } |
| 3043 | |
Akira Hatanaka | feaa4c3 | 2011-10-28 19:55:48 +0000 | [diff] [blame] | 3044 | // Handle floating point arguments passed in integer registers. |
| 3045 | if ((RegVT == MVT::i32 && ValVT == MVT::f32) || |
| 3046 | (RegVT == MVT::i64 && ValVT == MVT::f64)) |
| 3047 | ArgValue = DAG.getNode(ISD::BITCAST, dl, ValVT, ArgValue); |
| 3048 | else if (IsO32 && RegVT == MVT::i32 && ValVT == MVT::f64) { |
| 3049 | unsigned Reg2 = AddLiveIn(DAG.getMachineFunction(), |
| 3050 | getNextIntArgReg(ArgReg), RC); |
| 3051 | SDValue ArgValue2 = DAG.getCopyFromReg(Chain, dl, Reg2, RegVT); |
| 3052 | if (!Subtarget->isLittle()) |
| 3053 | std::swap(ArgValue, ArgValue2); |
| 3054 | ArgValue = DAG.getNode(MipsISD::BuildPairF64, dl, MVT::f64, |
| 3055 | ArgValue, ArgValue2); |
Bruno Cardoso Lopes | b53db4f | 2009-03-19 02:12:28 +0000 | [diff] [blame] | 3056 | } |
Bruno Cardoso Lopes | 972f589 | 2007-06-06 07:42:06 +0000 | [diff] [blame] | 3057 | |
Dan Gohman | 98ca4f2 | 2009-08-05 01:29:28 +0000 | [diff] [blame] | 3058 | InVals.push_back(ArgValue); |
Bruno Cardoso Lopes | 225ca9c | 2008-07-05 19:05:21 +0000 | [diff] [blame] | 3059 | } else { // VA.isRegLoc() |
| 3060 | |
Bruno Cardoso Lopes | 972f589 | 2007-06-06 07:42:06 +0000 | [diff] [blame] | 3061 | // sanity check |
| 3062 | assert(VA.isMemLoc()); |
Bruno Cardoso Lopes | b37a742 | 2010-02-06 19:20:49 +0000 | [diff] [blame] | 3063 | |
Wesley Peck | bf17cfa | 2010-11-23 03:31:01 +0000 | [diff] [blame] | 3064 | // The stack pointer offset is relative to the caller stack frame. |
Akira Hatanaka | fe30a9b | 2012-10-27 00:29:43 +0000 | [diff] [blame] | 3065 | int FI = MFI->CreateFixedObject(ValVT.getSizeInBits()/8, |
Akira Hatanaka | b4d8d31 | 2011-05-24 00:23:52 +0000 | [diff] [blame] | 3066 | VA.getLocMemOffset(), true); |
Bruno Cardoso Lopes | 972f589 | 2007-06-06 07:42:06 +0000 | [diff] [blame] | 3067 | |
| 3068 | // Create load nodes to retrieve arguments from the stack |
Akira Hatanaka | fe30a9b | 2012-10-27 00:29:43 +0000 | [diff] [blame] | 3069 | SDValue FIN = DAG.getFrameIndex(FI, getPointerTy()); |
Akira Hatanaka | feaa4c3 | 2011-10-28 19:55:48 +0000 | [diff] [blame] | 3070 | InVals.push_back(DAG.getLoad(ValVT, dl, Chain, FIN, |
Akira Hatanaka | fe30a9b | 2012-10-27 00:29:43 +0000 | [diff] [blame] | 3071 | MachinePointerInfo::getFixedStack(FI), |
Pete Cooper | d752e0f | 2011-11-08 18:42:53 +0000 | [diff] [blame] | 3072 | false, false, false, 0)); |
Bruno Cardoso Lopes | 972f589 | 2007-06-06 07:42:06 +0000 | [diff] [blame] | 3073 | } |
| 3074 | } |
Bruno Cardoso Lopes | 225ca9c | 2008-07-05 19:05:21 +0000 | [diff] [blame] | 3075 | |
| 3076 | // The mips ABIs for returning structs by value requires that we copy |
| 3077 | // the sret argument into $v0 for the return. Save the argument into |
| 3078 | // a virtual register so that we can access it from the return points. |
| 3079 | if (DAG.getMachineFunction().getFunction()->hasStructRetAttr()) { |
| 3080 | unsigned Reg = MipsFI->getSRetReturnReg(); |
| 3081 | if (!Reg) { |
Akira Hatanaka | 30580ce | 2012-10-19 22:11:40 +0000 | [diff] [blame] | 3082 | Reg = MF.getRegInfo(). |
| 3083 | createVirtualRegister(getRegClassFor(IsN64 ? MVT::i64 : MVT::i32)); |
Bruno Cardoso Lopes | 225ca9c | 2008-07-05 19:05:21 +0000 | [diff] [blame] | 3084 | MipsFI->setSRetReturnReg(Reg); |
| 3085 | } |
Dan Gohman | 98ca4f2 | 2009-08-05 01:29:28 +0000 | [diff] [blame] | 3086 | SDValue Copy = DAG.getCopyToReg(DAG.getEntryNode(), dl, Reg, InVals[0]); |
Owen Anderson | 825b72b | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 3087 | Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, Copy, Chain); |
Bruno Cardoso Lopes | 225ca9c | 2008-07-05 19:05:21 +0000 | [diff] [blame] | 3088 | } |
| 3089 | |
Akira Hatanaka | fe30a9b | 2012-10-27 00:29:43 +0000 | [diff] [blame] | 3090 | if (isVarArg) |
| 3091 | writeVarArgRegs(OutChains, MipsCCInfo, Chain, dl, DAG); |
Bruno Cardoso Lopes | b37a742 | 2010-02-06 19:20:49 +0000 | [diff] [blame] | 3092 | |
Wesley Peck | bf17cfa | 2010-11-23 03:31:01 +0000 | [diff] [blame] | 3093 | // All stores are grouped in one node to allow the matching between |
Bruno Cardoso Lopes | b37a742 | 2010-02-06 19:20:49 +0000 | [diff] [blame] | 3094 | // the size of Ins and InVals. This only happens when on varg functions |
| 3095 | if (!OutChains.empty()) { |
| 3096 | OutChains.push_back(Chain); |
| 3097 | Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, |
| 3098 | &OutChains[0], OutChains.size()); |
| 3099 | } |
| 3100 | |
Dan Gohman | 98ca4f2 | 2009-08-05 01:29:28 +0000 | [diff] [blame] | 3101 | return Chain; |
Bruno Cardoso Lopes | 972f589 | 2007-06-06 07:42:06 +0000 | [diff] [blame] | 3102 | } |
| 3103 | |
Akira Hatanaka | 4552c9a | 2011-04-15 21:51:11 +0000 | [diff] [blame] | 3104 | //===----------------------------------------------------------------------===// |
Bruno Cardoso Lopes | 972f589 | 2007-06-06 07:42:06 +0000 | [diff] [blame] | 3105 | // Return Value Calling Convention Implementation |
Akira Hatanaka | 4552c9a | 2011-04-15 21:51:11 +0000 | [diff] [blame] | 3106 | //===----------------------------------------------------------------------===// |
Bruno Cardoso Lopes | 972f589 | 2007-06-06 07:42:06 +0000 | [diff] [blame] | 3107 | |
Akira Hatanaka | 97d9f08 | 2012-10-10 01:27:09 +0000 | [diff] [blame] | 3108 | bool |
| 3109 | MipsTargetLowering::CanLowerReturn(CallingConv::ID CallConv, |
| 3110 | MachineFunction &MF, bool isVarArg, |
| 3111 | const SmallVectorImpl<ISD::OutputArg> &Outs, |
| 3112 | LLVMContext &Context) const { |
| 3113 | SmallVector<CCValAssign, 16> RVLocs; |
| 3114 | CCState CCInfo(CallConv, isVarArg, MF, getTargetMachine(), |
| 3115 | RVLocs, Context); |
| 3116 | return CCInfo.CheckReturn(Outs, RetCC_Mips); |
| 3117 | } |
| 3118 | |
Dan Gohman | 98ca4f2 | 2009-08-05 01:29:28 +0000 | [diff] [blame] | 3119 | SDValue |
| 3120 | MipsTargetLowering::LowerReturn(SDValue Chain, |
Sandeep Patel | 65c3c8f | 2009-09-02 08:44:58 +0000 | [diff] [blame] | 3121 | CallingConv::ID CallConv, bool isVarArg, |
Dan Gohman | 98ca4f2 | 2009-08-05 01:29:28 +0000 | [diff] [blame] | 3122 | const SmallVectorImpl<ISD::OutputArg> &Outs, |
Dan Gohman | c940365 | 2010-07-07 15:54:55 +0000 | [diff] [blame] | 3123 | const SmallVectorImpl<SDValue> &OutVals, |
Dan Gohman | d858e90 | 2010-04-17 15:26:15 +0000 | [diff] [blame] | 3124 | DebugLoc dl, SelectionDAG &DAG) const { |
Dan Gohman | 98ca4f2 | 2009-08-05 01:29:28 +0000 | [diff] [blame] | 3125 | |
Bruno Cardoso Lopes | 972f589 | 2007-06-06 07:42:06 +0000 | [diff] [blame] | 3126 | // CCValAssign - represent the assignment of |
| 3127 | // the return value to a location |
| 3128 | SmallVector<CCValAssign, 16> RVLocs; |
Bruno Cardoso Lopes | 972f589 | 2007-06-06 07:42:06 +0000 | [diff] [blame] | 3129 | |
| 3130 | // CCState - Info about the registers and stack slot. |
Eric Christopher | 471e422 | 2011-06-08 23:55:35 +0000 | [diff] [blame] | 3131 | CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), |
Akira Hatanaka | 864f660 | 2012-06-14 21:10:56 +0000 | [diff] [blame] | 3132 | getTargetMachine(), RVLocs, *DAG.getContext()); |
Bruno Cardoso Lopes | 972f589 | 2007-06-06 07:42:06 +0000 | [diff] [blame] | 3133 | |
Dan Gohman | 98ca4f2 | 2009-08-05 01:29:28 +0000 | [diff] [blame] | 3134 | // Analize return values. |
| 3135 | CCInfo.AnalyzeReturn(Outs, RetCC_Mips); |
Bruno Cardoso Lopes | 972f589 | 2007-06-06 07:42:06 +0000 | [diff] [blame] | 3136 | |
Wesley Peck | bf17cfa | 2010-11-23 03:31:01 +0000 | [diff] [blame] | 3137 | // If this is the first return lowered for this function, add |
Bruno Cardoso Lopes | 972f589 | 2007-06-06 07:42:06 +0000 | [diff] [blame] | 3138 | // the regs to the liveout set for the function. |
Chris Lattner | 84bc542 | 2007-12-31 04:13:23 +0000 | [diff] [blame] | 3139 | if (DAG.getMachineFunction().getRegInfo().liveout_empty()) { |
Bruno Cardoso Lopes | 972f589 | 2007-06-06 07:42:06 +0000 | [diff] [blame] | 3140 | for (unsigned i = 0; i != RVLocs.size(); ++i) |
Bruno Cardoso Lopes | 2ab22d1 | 2007-07-11 23:16:16 +0000 | [diff] [blame] | 3141 | if (RVLocs[i].isRegLoc()) |
Akira Hatanaka | 4552c9a | 2011-04-15 21:51:11 +0000 | [diff] [blame] | 3142 | DAG.getMachineFunction().getRegInfo().addLiveOut(RVLocs[i].getLocReg()); |
Bruno Cardoso Lopes | 972f589 | 2007-06-06 07:42:06 +0000 | [diff] [blame] | 3143 | } |
| 3144 | |
Dan Gohman | 475871a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 3145 | SDValue Flag; |
Bruno Cardoso Lopes | 972f589 | 2007-06-06 07:42:06 +0000 | [diff] [blame] | 3146 | |
| 3147 | // Copy the result values into the output registers. |
| 3148 | for (unsigned i = 0; i != RVLocs.size(); ++i) { |
| 3149 | CCValAssign &VA = RVLocs[i]; |
| 3150 | assert(VA.isRegLoc() && "Can only return in registers!"); |
| 3151 | |
Akira Hatanaka | 8209968 | 2011-12-19 19:52:25 +0000 | [diff] [blame] | 3152 | Chain = DAG.getCopyToReg(Chain, dl, VA.getLocReg(), OutVals[i], Flag); |
Bruno Cardoso Lopes | 972f589 | 2007-06-06 07:42:06 +0000 | [diff] [blame] | 3153 | |
| 3154 | // guarantee that all emitted copies are |
| 3155 | // stuck together, avoiding something bad |
| 3156 | Flag = Chain.getValue(1); |
| 3157 | } |
| 3158 | |
Bruno Cardoso Lopes | 225ca9c | 2008-07-05 19:05:21 +0000 | [diff] [blame] | 3159 | // The mips ABIs for returning structs by value requires that we copy |
| 3160 | // the sret argument into $v0 for the return. We saved the argument into |
| 3161 | // a virtual register in the entry block, so now we copy the value out |
| 3162 | // and into $v0. |
| 3163 | if (DAG.getMachineFunction().getFunction()->hasStructRetAttr()) { |
| 3164 | MachineFunction &MF = DAG.getMachineFunction(); |
| 3165 | MipsFunctionInfo *MipsFI = MF.getInfo<MipsFunctionInfo>(); |
| 3166 | unsigned Reg = MipsFI->getSRetReturnReg(); |
| 3167 | |
Wesley Peck | bf17cfa | 2010-11-23 03:31:01 +0000 | [diff] [blame] | 3168 | if (!Reg) |
Torok Edwin | c23197a | 2009-07-14 16:55:14 +0000 | [diff] [blame] | 3169 | llvm_unreachable("sret virtual register not created in the entry block"); |
Dale Johannesen | a05dca4 | 2009-02-04 23:02:30 +0000 | [diff] [blame] | 3170 | SDValue Val = DAG.getCopyFromReg(Chain, dl, Reg, getPointerTy()); |
Akira Hatanaka | 2ef5bd3 | 2012-10-24 02:10:54 +0000 | [diff] [blame] | 3171 | unsigned V0 = IsN64 ? Mips::V0_64 : Mips::V0; |
Bruno Cardoso Lopes | 225ca9c | 2008-07-05 19:05:21 +0000 | [diff] [blame] | 3172 | |
Akira Hatanaka | 2ef5bd3 | 2012-10-24 02:10:54 +0000 | [diff] [blame] | 3173 | Chain = DAG.getCopyToReg(Chain, dl, V0, Val, Flag); |
Bruno Cardoso Lopes | 225ca9c | 2008-07-05 19:05:21 +0000 | [diff] [blame] | 3174 | Flag = Chain.getValue(1); |
Akira Hatanaka | 2ef5bd3 | 2012-10-24 02:10:54 +0000 | [diff] [blame] | 3175 | MF.getRegInfo().addLiveOut(V0); |
Bruno Cardoso Lopes | 225ca9c | 2008-07-05 19:05:21 +0000 | [diff] [blame] | 3176 | } |
| 3177 | |
Bruno Cardoso Lopes | 972f589 | 2007-06-06 07:42:06 +0000 | [diff] [blame] | 3178 | // Return on Mips is always a "jr $ra" |
Gabor Greif | ba36cb5 | 2008-08-28 21:40:38 +0000 | [diff] [blame] | 3179 | if (Flag.getNode()) |
Akira Hatanaka | 182ef6f | 2012-07-10 00:19:06 +0000 | [diff] [blame] | 3180 | return DAG.getNode(MipsISD::Ret, dl, MVT::Other, Chain, Flag); |
| 3181 | |
| 3182 | // Return Void |
| 3183 | return DAG.getNode(MipsISD::Ret, dl, MVT::Other, Chain); |
Bruno Cardoso Lopes | 972f589 | 2007-06-06 07:42:06 +0000 | [diff] [blame] | 3184 | } |
Bruno Cardoso Lopes | 84f47c5 | 2007-08-21 16:09:25 +0000 | [diff] [blame] | 3185 | |
Akira Hatanaka | 4552c9a | 2011-04-15 21:51:11 +0000 | [diff] [blame] | 3186 | //===----------------------------------------------------------------------===// |
Bruno Cardoso Lopes | 84f47c5 | 2007-08-21 16:09:25 +0000 | [diff] [blame] | 3187 | // Mips Inline Assembly Support |
Akira Hatanaka | 4552c9a | 2011-04-15 21:51:11 +0000 | [diff] [blame] | 3188 | //===----------------------------------------------------------------------===// |
Bruno Cardoso Lopes | 84f47c5 | 2007-08-21 16:09:25 +0000 | [diff] [blame] | 3189 | |
| 3190 | /// getConstraintType - Given a constraint letter, return the type of |
| 3191 | /// constraint it is for this target. |
| 3192 | MipsTargetLowering::ConstraintType MipsTargetLowering:: |
Wesley Peck | bf17cfa | 2010-11-23 03:31:01 +0000 | [diff] [blame] | 3193 | getConstraintType(const std::string &Constraint) const |
Bruno Cardoso Lopes | 84f47c5 | 2007-08-21 16:09:25 +0000 | [diff] [blame] | 3194 | { |
Wesley Peck | bf17cfa | 2010-11-23 03:31:01 +0000 | [diff] [blame] | 3195 | // Mips specific constrainy |
Bruno Cardoso Lopes | 225ca9c | 2008-07-05 19:05:21 +0000 | [diff] [blame] | 3196 | // GCC config/mips/constraints.md |
| 3197 | // |
Wesley Peck | bf17cfa | 2010-11-23 03:31:01 +0000 | [diff] [blame] | 3198 | // 'd' : An address register. Equivalent to r |
| 3199 | // unless generating MIPS16 code. |
| 3200 | // 'y' : Equivalent to r; retained for |
| 3201 | // backwards compatibility. |
Eric Christopher | 1d5a392 | 2012-05-07 06:25:10 +0000 | [diff] [blame] | 3202 | // 'c' : A register suitable for use in an indirect |
| 3203 | // jump. This will always be $25 for -mabicalls. |
Eric Christopher | af97f73 | 2012-05-07 06:25:19 +0000 | [diff] [blame] | 3204 | // 'l' : The lo register. 1 word storage. |
| 3205 | // 'x' : The hilo register pair. Double word storage. |
Bruno Cardoso Lopes | 84f47c5 | 2007-08-21 16:09:25 +0000 | [diff] [blame] | 3206 | if (Constraint.size() == 1) { |
Bruno Cardoso Lopes | 84f47c5 | 2007-08-21 16:09:25 +0000 | [diff] [blame] | 3207 | switch (Constraint[0]) { |
| 3208 | default : break; |
Wesley Peck | bf17cfa | 2010-11-23 03:31:01 +0000 | [diff] [blame] | 3209 | case 'd': |
| 3210 | case 'y': |
Bruno Cardoso Lopes | 225ca9c | 2008-07-05 19:05:21 +0000 | [diff] [blame] | 3211 | case 'f': |
Eric Christopher | 1d5a392 | 2012-05-07 06:25:10 +0000 | [diff] [blame] | 3212 | case 'c': |
Eric Christopher | 4adbefe | 2012-05-07 06:25:15 +0000 | [diff] [blame] | 3213 | case 'l': |
Eric Christopher | af97f73 | 2012-05-07 06:25:19 +0000 | [diff] [blame] | 3214 | case 'x': |
Bruno Cardoso Lopes | 84f47c5 | 2007-08-21 16:09:25 +0000 | [diff] [blame] | 3215 | return C_RegisterClass; |
Bruno Cardoso Lopes | 84f47c5 | 2007-08-21 16:09:25 +0000 | [diff] [blame] | 3216 | } |
| 3217 | } |
| 3218 | return TargetLowering::getConstraintType(Constraint); |
| 3219 | } |
| 3220 | |
John Thompson | 44ab89e | 2010-10-29 17:29:13 +0000 | [diff] [blame] | 3221 | /// Examine constraint type and operand type and determine a weight value. |
| 3222 | /// This object must already have been set up with the operand type |
| 3223 | /// and the current alternative constraint selected. |
| 3224 | TargetLowering::ConstraintWeight |
| 3225 | MipsTargetLowering::getSingleConstraintMatchWeight( |
| 3226 | AsmOperandInfo &info, const char *constraint) const { |
| 3227 | ConstraintWeight weight = CW_Invalid; |
| 3228 | Value *CallOperandVal = info.CallOperandVal; |
| 3229 | // If we don't have a value, we can't do a match, |
| 3230 | // but allow it at the lowest weight. |
| 3231 | if (CallOperandVal == NULL) |
| 3232 | return CW_Default; |
Chris Lattner | db125cf | 2011-07-18 04:54:35 +0000 | [diff] [blame] | 3233 | Type *type = CallOperandVal->getType(); |
John Thompson | 44ab89e | 2010-10-29 17:29:13 +0000 | [diff] [blame] | 3234 | // Look at the constraint type. |
| 3235 | switch (*constraint) { |
| 3236 | default: |
| 3237 | weight = TargetLowering::getSingleConstraintMatchWeight(info, constraint); |
| 3238 | break; |
Wesley Peck | bf17cfa | 2010-11-23 03:31:01 +0000 | [diff] [blame] | 3239 | case 'd': |
| 3240 | case 'y': |
John Thompson | 44ab89e | 2010-10-29 17:29:13 +0000 | [diff] [blame] | 3241 | if (type->isIntegerTy()) |
| 3242 | weight = CW_Register; |
| 3243 | break; |
| 3244 | case 'f': |
| 3245 | if (type->isFloatTy()) |
| 3246 | weight = CW_Register; |
| 3247 | break; |
Eric Christopher | 1d5a392 | 2012-05-07 06:25:10 +0000 | [diff] [blame] | 3248 | case 'c': // $25 for indirect jumps |
Eric Christopher | 4adbefe | 2012-05-07 06:25:15 +0000 | [diff] [blame] | 3249 | case 'l': // lo register |
Eric Christopher | af97f73 | 2012-05-07 06:25:19 +0000 | [diff] [blame] | 3250 | case 'x': // hilo register pair |
Eric Christopher | 1d5a392 | 2012-05-07 06:25:10 +0000 | [diff] [blame] | 3251 | if (type->isIntegerTy()) |
| 3252 | weight = CW_SpecificReg; |
| 3253 | break; |
Eric Christopher | 50ab039 | 2012-05-07 03:13:32 +0000 | [diff] [blame] | 3254 | case 'I': // signed 16 bit immediate |
Eric Christopher | e5076d4 | 2012-05-07 03:13:42 +0000 | [diff] [blame] | 3255 | case 'J': // integer zero |
Eric Christopher | f49f846 | 2012-05-07 05:46:29 +0000 | [diff] [blame] | 3256 | case 'K': // unsigned 16 bit immediate |
Eric Christopher | 5ac47bb | 2012-05-07 05:46:37 +0000 | [diff] [blame] | 3257 | case 'L': // signed 32 bit immediate where lower 16 bits are 0 |
Eric Christopher | 60cfc79 | 2012-05-07 05:46:43 +0000 | [diff] [blame] | 3258 | case 'N': // immediate in the range of -65535 to -1 (inclusive) |
Eric Christopher | 1ce2034 | 2012-05-07 05:46:48 +0000 | [diff] [blame] | 3259 | case 'O': // signed 15 bit immediate (+- 16383) |
Eric Christopher | 54412a7 | 2012-05-07 06:25:02 +0000 | [diff] [blame] | 3260 | case 'P': // immediate in the range of 65535 to 1 (inclusive) |
Eric Christopher | 50ab039 | 2012-05-07 03:13:32 +0000 | [diff] [blame] | 3261 | if (isa<ConstantInt>(CallOperandVal)) |
| 3262 | weight = CW_Constant; |
| 3263 | break; |
John Thompson | 44ab89e | 2010-10-29 17:29:13 +0000 | [diff] [blame] | 3264 | } |
| 3265 | return weight; |
| 3266 | } |
| 3267 | |
Eric Christopher | 38d6426 | 2011-06-29 19:33:04 +0000 | [diff] [blame] | 3268 | /// Given a register class constraint, like 'r', if this corresponds directly |
| 3269 | /// to an LLVM register class, return a register of 0 and the register class |
| 3270 | /// pointer. |
Bruno Cardoso Lopes | 84f47c5 | 2007-08-21 16:09:25 +0000 | [diff] [blame] | 3271 | std::pair<unsigned, const TargetRegisterClass*> MipsTargetLowering:: |
Owen Anderson | e50ed30 | 2009-08-10 22:56:29 +0000 | [diff] [blame] | 3272 | getRegForInlineAsmConstraint(const std::string &Constraint, EVT VT) const |
Bruno Cardoso Lopes | 84f47c5 | 2007-08-21 16:09:25 +0000 | [diff] [blame] | 3273 | { |
| 3274 | if (Constraint.size() == 1) { |
| 3275 | switch (Constraint[0]) { |
Eric Christopher | 314aff1 | 2011-06-29 19:04:31 +0000 | [diff] [blame] | 3276 | case 'd': // Address register. Same as 'r' unless generating MIPS16 code. |
| 3277 | case 'y': // Same as 'r'. Exists for compatibility. |
Bruno Cardoso Lopes | 84f47c5 | 2007-08-21 16:09:25 +0000 | [diff] [blame] | 3278 | case 'r': |
Akira Hatanaka | afc945b | 2012-09-12 23:27:55 +0000 | [diff] [blame] | 3279 | if (VT == MVT::i32 || VT == MVT::i16 || VT == MVT::i8) { |
| 3280 | if (Subtarget->inMips16Mode()) |
| 3281 | return std::make_pair(0U, &Mips::CPU16RegsRegClass); |
Craig Topper | 420761a | 2012-04-20 07:30:17 +0000 | [diff] [blame] | 3282 | return std::make_pair(0U, &Mips::CPURegsRegClass); |
Akira Hatanaka | afc945b | 2012-09-12 23:27:55 +0000 | [diff] [blame] | 3283 | } |
Jack Carter | 10de025 | 2012-07-02 23:35:23 +0000 | [diff] [blame] | 3284 | if (VT == MVT::i64 && !HasMips64) |
| 3285 | return std::make_pair(0U, &Mips::CPURegsRegClass); |
Eric Christopher | 0ed1f76 | 2012-05-07 03:13:22 +0000 | [diff] [blame] | 3286 | if (VT == MVT::i64 && HasMips64) |
| 3287 | return std::make_pair(0U, &Mips::CPU64RegsRegClass); |
| 3288 | // This will generate an error message |
| 3289 | return std::make_pair(0u, static_cast<const TargetRegisterClass*>(0)); |
Bruno Cardoso Lopes | 225ca9c | 2008-07-05 19:05:21 +0000 | [diff] [blame] | 3290 | case 'f': |
Owen Anderson | 825b72b | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 3291 | if (VT == MVT::f32) |
Craig Topper | 420761a | 2012-04-20 07:30:17 +0000 | [diff] [blame] | 3292 | return std::make_pair(0U, &Mips::FGR32RegClass); |
Akira Hatanaka | cb9dd72 | 2012-01-04 02:45:01 +0000 | [diff] [blame] | 3293 | if ((VT == MVT::f64) && (!Subtarget->isSingleFloat())) { |
| 3294 | if (Subtarget->isFP64bit()) |
Craig Topper | 420761a | 2012-04-20 07:30:17 +0000 | [diff] [blame] | 3295 | return std::make_pair(0U, &Mips::FGR64RegClass); |
| 3296 | return std::make_pair(0U, &Mips::AFGR64RegClass); |
Akira Hatanaka | cb9dd72 | 2012-01-04 02:45:01 +0000 | [diff] [blame] | 3297 | } |
Eric Christopher | 1d5a392 | 2012-05-07 06:25:10 +0000 | [diff] [blame] | 3298 | break; |
| 3299 | case 'c': // register suitable for indirect jump |
| 3300 | if (VT == MVT::i32) |
| 3301 | return std::make_pair((unsigned)Mips::T9, &Mips::CPURegsRegClass); |
| 3302 | assert(VT == MVT::i64 && "Unexpected type."); |
| 3303 | return std::make_pair((unsigned)Mips::T9_64, &Mips::CPU64RegsRegClass); |
Eric Christopher | 4adbefe | 2012-05-07 06:25:15 +0000 | [diff] [blame] | 3304 | case 'l': // register suitable for indirect jump |
| 3305 | if (VT == MVT::i32) |
| 3306 | return std::make_pair((unsigned)Mips::LO, &Mips::HILORegClass); |
| 3307 | return std::make_pair((unsigned)Mips::LO64, &Mips::HILO64RegClass); |
Eric Christopher | af97f73 | 2012-05-07 06:25:19 +0000 | [diff] [blame] | 3308 | case 'x': // register suitable for indirect jump |
| 3309 | // Fixme: Not triggering the use of both hi and low |
| 3310 | // This will generate an error message |
| 3311 | return std::make_pair(0u, static_cast<const TargetRegisterClass*>(0)); |
Bruno Cardoso Lopes | 84f47c5 | 2007-08-21 16:09:25 +0000 | [diff] [blame] | 3312 | } |
| 3313 | } |
| 3314 | return TargetLowering::getRegForInlineAsmConstraint(Constraint, VT); |
| 3315 | } |
| 3316 | |
Eric Christopher | 50ab039 | 2012-05-07 03:13:32 +0000 | [diff] [blame] | 3317 | /// LowerAsmOperandForConstraint - Lower the specified operand into the Ops |
| 3318 | /// vector. If it is invalid, don't add anything to Ops. |
| 3319 | void MipsTargetLowering::LowerAsmOperandForConstraint(SDValue Op, |
| 3320 | std::string &Constraint, |
| 3321 | std::vector<SDValue>&Ops, |
| 3322 | SelectionDAG &DAG) const { |
| 3323 | SDValue Result(0, 0); |
| 3324 | |
| 3325 | // Only support length 1 constraints for now. |
| 3326 | if (Constraint.length() > 1) return; |
| 3327 | |
| 3328 | char ConstraintLetter = Constraint[0]; |
| 3329 | switch (ConstraintLetter) { |
| 3330 | default: break; // This will fall through to the generic implementation |
| 3331 | case 'I': // Signed 16 bit constant |
| 3332 | // If this fails, the parent routine will give an error |
| 3333 | if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op)) { |
| 3334 | EVT Type = Op.getValueType(); |
| 3335 | int64_t Val = C->getSExtValue(); |
| 3336 | if (isInt<16>(Val)) { |
| 3337 | Result = DAG.getTargetConstant(Val, Type); |
| 3338 | break; |
| 3339 | } |
| 3340 | } |
| 3341 | return; |
Eric Christopher | e5076d4 | 2012-05-07 03:13:42 +0000 | [diff] [blame] | 3342 | case 'J': // integer zero |
| 3343 | if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op)) { |
| 3344 | EVT Type = Op.getValueType(); |
| 3345 | int64_t Val = C->getZExtValue(); |
| 3346 | if (Val == 0) { |
| 3347 | Result = DAG.getTargetConstant(0, Type); |
| 3348 | break; |
| 3349 | } |
| 3350 | } |
| 3351 | return; |
Eric Christopher | f49f846 | 2012-05-07 05:46:29 +0000 | [diff] [blame] | 3352 | case 'K': // unsigned 16 bit immediate |
| 3353 | if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op)) { |
| 3354 | EVT Type = Op.getValueType(); |
| 3355 | uint64_t Val = (uint64_t)C->getZExtValue(); |
| 3356 | if (isUInt<16>(Val)) { |
| 3357 | Result = DAG.getTargetConstant(Val, Type); |
| 3358 | break; |
| 3359 | } |
| 3360 | } |
| 3361 | return; |
Eric Christopher | 5ac47bb | 2012-05-07 05:46:37 +0000 | [diff] [blame] | 3362 | case 'L': // signed 32 bit immediate where lower 16 bits are 0 |
| 3363 | if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op)) { |
| 3364 | EVT Type = Op.getValueType(); |
| 3365 | int64_t Val = C->getSExtValue(); |
| 3366 | if ((isInt<32>(Val)) && ((Val & 0xffff) == 0)){ |
| 3367 | Result = DAG.getTargetConstant(Val, Type); |
| 3368 | break; |
| 3369 | } |
| 3370 | } |
| 3371 | return; |
Eric Christopher | 60cfc79 | 2012-05-07 05:46:43 +0000 | [diff] [blame] | 3372 | case 'N': // immediate in the range of -65535 to -1 (inclusive) |
| 3373 | if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op)) { |
| 3374 | EVT Type = Op.getValueType(); |
| 3375 | int64_t Val = C->getSExtValue(); |
| 3376 | if ((Val >= -65535) && (Val <= -1)) { |
| 3377 | Result = DAG.getTargetConstant(Val, Type); |
| 3378 | break; |
| 3379 | } |
| 3380 | } |
| 3381 | return; |
Eric Christopher | 1ce2034 | 2012-05-07 05:46:48 +0000 | [diff] [blame] | 3382 | case 'O': // signed 15 bit immediate |
| 3383 | if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op)) { |
| 3384 | EVT Type = Op.getValueType(); |
| 3385 | int64_t Val = C->getSExtValue(); |
| 3386 | if ((isInt<15>(Val))) { |
| 3387 | Result = DAG.getTargetConstant(Val, Type); |
| 3388 | break; |
| 3389 | } |
| 3390 | } |
| 3391 | return; |
Eric Christopher | 54412a7 | 2012-05-07 06:25:02 +0000 | [diff] [blame] | 3392 | case 'P': // immediate in the range of 1 to 65535 (inclusive) |
| 3393 | if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op)) { |
| 3394 | EVT Type = Op.getValueType(); |
| 3395 | int64_t Val = C->getSExtValue(); |
| 3396 | if ((Val <= 65535) && (Val >= 1)) { |
| 3397 | Result = DAG.getTargetConstant(Val, Type); |
| 3398 | break; |
| 3399 | } |
| 3400 | } |
| 3401 | return; |
Eric Christopher | 50ab039 | 2012-05-07 03:13:32 +0000 | [diff] [blame] | 3402 | } |
| 3403 | |
| 3404 | if (Result.getNode()) { |
| 3405 | Ops.push_back(Result); |
| 3406 | return; |
| 3407 | } |
| 3408 | |
| 3409 | TargetLowering::LowerAsmOperandForConstraint(Op, Constraint, Ops, DAG); |
| 3410 | } |
| 3411 | |
Dan Gohman | 6520e20 | 2008-10-18 02:06:02 +0000 | [diff] [blame] | 3412 | bool |
| 3413 | MipsTargetLowering::isOffsetFoldingLegal(const GlobalAddressSDNode *GA) const { |
| 3414 | // The Mips target isn't yet aware of offsets. |
| 3415 | return false; |
| 3416 | } |
Evan Cheng | eb2f969 | 2009-10-27 19:56:55 +0000 | [diff] [blame] | 3417 | |
Akira Hatanaka | e193b32 | 2012-06-13 19:33:32 +0000 | [diff] [blame] | 3418 | EVT MipsTargetLowering::getOptimalMemOpType(uint64_t Size, unsigned DstAlign, |
| 3419 | unsigned SrcAlign, bool IsZeroVal, |
| 3420 | bool MemcpyStrSrc, |
| 3421 | MachineFunction &MF) const { |
| 3422 | if (Subtarget->hasMips64()) |
| 3423 | return MVT::i64; |
| 3424 | |
| 3425 | return MVT::i32; |
| 3426 | } |
| 3427 | |
Evan Cheng | a1eaa3c | 2009-10-28 01:43:28 +0000 | [diff] [blame] | 3428 | bool MipsTargetLowering::isFPImmLegal(const APFloat &Imm, EVT VT) const { |
| 3429 | if (VT != MVT::f32 && VT != MVT::f64) |
| 3430 | return false; |
Bruno Cardoso Lopes | 6b90282 | 2011-01-18 19:41:41 +0000 | [diff] [blame] | 3431 | if (Imm.isNegZero()) |
| 3432 | return false; |
Evan Cheng | eb2f969 | 2009-10-27 19:56:55 +0000 | [diff] [blame] | 3433 | return Imm.isZero(); |
| 3434 | } |
Akira Hatanaka | 6c2cf8b | 2012-02-03 04:33:00 +0000 | [diff] [blame] | 3435 | |
| 3436 | unsigned MipsTargetLowering::getJumpTableEncoding() const { |
| 3437 | if (IsN64) |
| 3438 | return MachineJumpTableInfo::EK_GPRel64BlockAddress; |
Jia Liu | bb481f8 | 2012-02-28 07:46:26 +0000 | [diff] [blame] | 3439 | |
Akira Hatanaka | 6c2cf8b | 2012-02-03 04:33:00 +0000 | [diff] [blame] | 3440 | return TargetLowering::getJumpTableEncoding(); |
| 3441 | } |
Akira Hatanaka | 7887c90 | 2012-10-26 23:56:38 +0000 | [diff] [blame] | 3442 | |
| 3443 | MipsTargetLowering::MipsCC::MipsCC(CallingConv::ID CallConv, bool IsVarArg, |
| 3444 | bool IsO32, CCState &Info) : CCInfo(Info) { |
| 3445 | UseRegsForByval = true; |
| 3446 | |
| 3447 | if (IsO32) { |
| 3448 | RegSize = 4; |
| 3449 | NumIntArgRegs = array_lengthof(O32IntRegs); |
| 3450 | ReservedArgArea = 16; |
| 3451 | IntArgRegs = ShadowRegs = O32IntRegs; |
| 3452 | FixedFn = VarFn = CC_MipsO32; |
| 3453 | } else { |
| 3454 | RegSize = 8; |
| 3455 | NumIntArgRegs = array_lengthof(Mips64IntRegs); |
| 3456 | ReservedArgArea = 0; |
| 3457 | IntArgRegs = Mips64IntRegs; |
| 3458 | ShadowRegs = Mips64DPRegs; |
| 3459 | FixedFn = CC_MipsN; |
| 3460 | VarFn = CC_MipsN_VarArg; |
| 3461 | } |
| 3462 | |
| 3463 | if (CallConv == CallingConv::Fast) { |
| 3464 | assert(!IsVarArg); |
| 3465 | UseRegsForByval = false; |
| 3466 | ReservedArgArea = 0; |
| 3467 | FixedFn = VarFn = CC_Mips_FastCC; |
| 3468 | } |
| 3469 | |
| 3470 | // Pre-allocate reserved argument area. |
| 3471 | CCInfo.AllocateStack(ReservedArgArea, 1); |
| 3472 | } |
| 3473 | |
| 3474 | void MipsTargetLowering::MipsCC:: |
| 3475 | analyzeCallOperands(const SmallVectorImpl<ISD::OutputArg> &Args) { |
| 3476 | unsigned NumOpnds = Args.size(); |
| 3477 | |
| 3478 | for (unsigned I = 0; I != NumOpnds; ++I) { |
| 3479 | MVT ArgVT = Args[I].VT; |
| 3480 | ISD::ArgFlagsTy ArgFlags = Args[I].Flags; |
| 3481 | bool R; |
| 3482 | |
| 3483 | if (ArgFlags.isByVal()) { |
| 3484 | handleByValArg(I, ArgVT, ArgVT, CCValAssign::Full, ArgFlags); |
| 3485 | continue; |
| 3486 | } |
| 3487 | |
| 3488 | if (Args[I].IsFixed) |
| 3489 | R = FixedFn(I, ArgVT, ArgVT, CCValAssign::Full, ArgFlags, CCInfo); |
| 3490 | else |
| 3491 | R = VarFn(I, ArgVT, ArgVT, CCValAssign::Full, ArgFlags, CCInfo); |
| 3492 | |
| 3493 | if (R) { |
| 3494 | #ifndef NDEBUG |
| 3495 | dbgs() << "Call operand #" << I << " has unhandled type " |
| 3496 | << EVT(ArgVT).getEVTString(); |
| 3497 | #endif |
| 3498 | llvm_unreachable(0); |
| 3499 | } |
| 3500 | } |
| 3501 | } |
| 3502 | |
| 3503 | void MipsTargetLowering::MipsCC:: |
| 3504 | analyzeFormalArguments(const SmallVectorImpl<ISD::InputArg> &Args) { |
| 3505 | unsigned NumArgs = Args.size(); |
| 3506 | |
| 3507 | for (unsigned I = 0; I != NumArgs; ++I) { |
| 3508 | MVT ArgVT = Args[I].VT; |
| 3509 | ISD::ArgFlagsTy ArgFlags = Args[I].Flags; |
| 3510 | |
| 3511 | if (ArgFlags.isByVal()) { |
| 3512 | handleByValArg(I, ArgVT, ArgVT, CCValAssign::Full, ArgFlags); |
| 3513 | continue; |
| 3514 | } |
| 3515 | |
| 3516 | if (!FixedFn(I, ArgVT, ArgVT, CCValAssign::Full, ArgFlags, CCInfo)) |
| 3517 | continue; |
| 3518 | |
| 3519 | #ifndef NDEBUG |
| 3520 | dbgs() << "Formal Arg #" << I << " has unhandled type " |
| 3521 | << EVT(ArgVT).getEVTString(); |
| 3522 | #endif |
| 3523 | llvm_unreachable(0); |
| 3524 | } |
| 3525 | } |
| 3526 | |
| 3527 | void |
| 3528 | MipsTargetLowering::MipsCC::handleByValArg(unsigned ValNo, MVT ValVT, |
| 3529 | MVT LocVT, |
| 3530 | CCValAssign::LocInfo LocInfo, |
| 3531 | ISD::ArgFlagsTy ArgFlags) { |
| 3532 | assert(ArgFlags.getByValSize() && "Byval argument's size shouldn't be 0."); |
| 3533 | |
| 3534 | struct ByValArgInfo ByVal; |
| 3535 | unsigned ByValSize = RoundUpToAlignment(ArgFlags.getByValSize(), RegSize); |
| 3536 | unsigned Align = std::min(std::max(ArgFlags.getByValAlign(), RegSize), |
| 3537 | RegSize * 2); |
| 3538 | |
| 3539 | if (UseRegsForByval) |
| 3540 | allocateRegs(ByVal, ByValSize, Align); |
| 3541 | |
| 3542 | // Allocate space on caller's stack. |
| 3543 | ByVal.Address = CCInfo.AllocateStack(ByValSize - RegSize * ByVal.NumRegs, |
| 3544 | Align); |
| 3545 | CCInfo.addLoc(CCValAssign::getMem(ValNo, ValVT, ByVal.Address, LocVT, |
| 3546 | LocInfo)); |
| 3547 | ByValArgs.push_back(ByVal); |
| 3548 | } |
| 3549 | |
| 3550 | void MipsTargetLowering::MipsCC::allocateRegs(ByValArgInfo &ByVal, |
| 3551 | unsigned ByValSize, |
| 3552 | unsigned Align) { |
| 3553 | assert(!(ByValSize % RegSize) && !(Align % RegSize) && |
| 3554 | "Byval argument's size and alignment should be a multiple of" |
| 3555 | "RegSize."); |
| 3556 | |
| 3557 | ByVal.FirstIdx = CCInfo.getFirstUnallocated(IntArgRegs, NumIntArgRegs); |
| 3558 | |
| 3559 | // If Align > RegSize, the first arg register must be even. |
| 3560 | if ((Align > RegSize) && (ByVal.FirstIdx % 2)) { |
| 3561 | CCInfo.AllocateReg(IntArgRegs[ByVal.FirstIdx], ShadowRegs[ByVal.FirstIdx]); |
| 3562 | ++ByVal.FirstIdx; |
| 3563 | } |
| 3564 | |
| 3565 | // Mark the registers allocated. |
| 3566 | for (unsigned I = ByVal.FirstIdx; ByValSize && (I < NumIntArgRegs); |
| 3567 | ByValSize -= RegSize, ++I, ++ByVal.NumRegs) |
| 3568 | CCInfo.AllocateReg(IntArgRegs[I], ShadowRegs[I]); |
| 3569 | } |
Akira Hatanaka | eb98ae4 | 2012-10-27 00:10:18 +0000 | [diff] [blame] | 3570 | |
| 3571 | void MipsTargetLowering:: |
| 3572 | copyByValRegs(SDValue Chain, DebugLoc DL, std::vector<SDValue> &OutChains, |
| 3573 | SelectionDAG &DAG, const ISD::ArgFlagsTy &Flags, |
| 3574 | SmallVectorImpl<SDValue> &InVals, const Argument *FuncArg, |
| 3575 | const MipsCC &CC, const ByValArgInfo &ByVal) const { |
| 3576 | MachineFunction &MF = DAG.getMachineFunction(); |
| 3577 | MachineFrameInfo *MFI = MF.getFrameInfo(); |
| 3578 | unsigned RegAreaSize = ByVal.NumRegs * CC.regSize(); |
| 3579 | unsigned FrameObjSize = std::max(Flags.getByValSize(), RegAreaSize); |
| 3580 | int FrameObjOffset; |
| 3581 | |
| 3582 | if (RegAreaSize) |
| 3583 | FrameObjOffset = (int)CC.reservedArgArea() - |
| 3584 | (int)((CC.numIntArgRegs() - ByVal.FirstIdx) * CC.regSize()); |
| 3585 | else |
| 3586 | FrameObjOffset = ByVal.Address; |
| 3587 | |
| 3588 | // Create frame object. |
| 3589 | EVT PtrTy = getPointerTy(); |
| 3590 | int FI = MFI->CreateFixedObject(FrameObjSize, FrameObjOffset, true); |
| 3591 | SDValue FIN = DAG.getFrameIndex(FI, PtrTy); |
| 3592 | InVals.push_back(FIN); |
| 3593 | |
| 3594 | if (!ByVal.NumRegs) |
| 3595 | return; |
| 3596 | |
| 3597 | // Copy arg registers. |
| 3598 | EVT RegTy = MVT::getIntegerVT(CC.regSize() * 8); |
| 3599 | const TargetRegisterClass *RC = getRegClassFor(RegTy); |
| 3600 | |
| 3601 | for (unsigned I = 0; I < ByVal.NumRegs; ++I) { |
| 3602 | unsigned ArgReg = CC.intArgRegs()[ByVal.FirstIdx + I]; |
| 3603 | unsigned VReg = AddLiveIn(MF, ArgReg, RC); |
| 3604 | unsigned Offset = I * CC.regSize(); |
| 3605 | SDValue StorePtr = DAG.getNode(ISD::ADD, DL, PtrTy, FIN, |
| 3606 | DAG.getConstant(Offset, PtrTy)); |
| 3607 | SDValue Store = DAG.getStore(Chain, DL, DAG.getRegister(VReg, RegTy), |
| 3608 | StorePtr, MachinePointerInfo(FuncArg, Offset), |
| 3609 | false, false, 0); |
| 3610 | OutChains.push_back(Store); |
| 3611 | } |
| 3612 | } |
Akira Hatanaka | db40ede | 2012-10-27 00:16:36 +0000 | [diff] [blame] | 3613 | |
| 3614 | // Copy byVal arg to registers and stack. |
| 3615 | void MipsTargetLowering:: |
| 3616 | passByValArg(SDValue Chain, DebugLoc DL, |
| 3617 | SmallVector<std::pair<unsigned, SDValue>, 16> &RegsToPass, |
| 3618 | SmallVector<SDValue, 8> &MemOpChains, SDValue StackPtr, |
| 3619 | MachineFrameInfo *MFI, SelectionDAG &DAG, SDValue Arg, |
| 3620 | const MipsCC &CC, const ByValArgInfo &ByVal, |
| 3621 | const ISD::ArgFlagsTy &Flags, bool isLittle) const { |
| 3622 | unsigned ByValSize = Flags.getByValSize(); |
| 3623 | unsigned Offset = 0; // Offset in # of bytes from the beginning of struct. |
| 3624 | unsigned RegSize = CC.regSize(); |
| 3625 | unsigned Alignment = std::min(Flags.getByValAlign(), RegSize); |
| 3626 | EVT PtrTy = getPointerTy(), RegTy = MVT::getIntegerVT(RegSize * 8); |
| 3627 | |
| 3628 | if (ByVal.NumRegs) { |
| 3629 | const uint16_t *ArgRegs = CC.intArgRegs(); |
| 3630 | bool LeftoverBytes = (ByVal.NumRegs * RegSize > ByValSize); |
| 3631 | unsigned I = 0; |
| 3632 | |
| 3633 | // Copy words to registers. |
| 3634 | for (; I < ByVal.NumRegs - LeftoverBytes; ++I, Offset += RegSize) { |
| 3635 | SDValue LoadPtr = DAG.getNode(ISD::ADD, DL, PtrTy, Arg, |
| 3636 | DAG.getConstant(Offset, PtrTy)); |
| 3637 | SDValue LoadVal = DAG.getLoad(RegTy, DL, Chain, LoadPtr, |
| 3638 | MachinePointerInfo(), false, false, false, |
| 3639 | Alignment); |
| 3640 | MemOpChains.push_back(LoadVal.getValue(1)); |
| 3641 | unsigned ArgReg = ArgRegs[ByVal.FirstIdx + I]; |
| 3642 | RegsToPass.push_back(std::make_pair(ArgReg, LoadVal)); |
| 3643 | } |
| 3644 | |
| 3645 | // Return if the struct has been fully copied. |
| 3646 | if (ByValSize == Offset) |
| 3647 | return; |
| 3648 | |
| 3649 | // Copy the remainder of the byval argument with sub-word loads and shifts. |
| 3650 | if (LeftoverBytes) { |
| 3651 | assert((ByValSize > Offset) && (ByValSize < Offset + RegSize) && |
| 3652 | "Size of the remainder should be smaller than RegSize."); |
| 3653 | SDValue Val; |
| 3654 | |
| 3655 | for (unsigned LoadSize = RegSize / 2, TotalSizeLoaded = 0; |
| 3656 | Offset < ByValSize; LoadSize /= 2) { |
| 3657 | unsigned RemSize = ByValSize - Offset; |
| 3658 | |
| 3659 | if (RemSize < LoadSize) |
| 3660 | continue; |
| 3661 | |
| 3662 | // Load subword. |
| 3663 | SDValue LoadPtr = DAG.getNode(ISD::ADD, DL, PtrTy, Arg, |
| 3664 | DAG.getConstant(Offset, PtrTy)); |
| 3665 | SDValue LoadVal = |
| 3666 | DAG.getExtLoad(ISD::ZEXTLOAD, DL, RegTy, Chain, LoadPtr, |
| 3667 | MachinePointerInfo(), MVT::getIntegerVT(LoadSize * 8), |
| 3668 | false, false, Alignment); |
| 3669 | MemOpChains.push_back(LoadVal.getValue(1)); |
| 3670 | |
| 3671 | // Shift the loaded value. |
| 3672 | unsigned Shamt; |
| 3673 | |
| 3674 | if (isLittle) |
| 3675 | Shamt = TotalSizeLoaded; |
| 3676 | else |
| 3677 | Shamt = (RegSize - (TotalSizeLoaded + LoadSize)) * 8; |
| 3678 | |
| 3679 | SDValue Shift = DAG.getNode(ISD::SHL, DL, RegTy, LoadVal, |
| 3680 | DAG.getConstant(Shamt, MVT::i32)); |
| 3681 | |
| 3682 | if (Val.getNode()) |
| 3683 | Val = DAG.getNode(ISD::OR, DL, RegTy, Val, Shift); |
| 3684 | else |
| 3685 | Val = Shift; |
| 3686 | |
| 3687 | Offset += LoadSize; |
| 3688 | TotalSizeLoaded += LoadSize; |
| 3689 | Alignment = std::min(Alignment, LoadSize); |
| 3690 | } |
| 3691 | |
| 3692 | unsigned ArgReg = ArgRegs[ByVal.FirstIdx + I]; |
| 3693 | RegsToPass.push_back(std::make_pair(ArgReg, Val)); |
| 3694 | return; |
| 3695 | } |
| 3696 | } |
| 3697 | |
| 3698 | // Copy remainder of byval arg to it with memcpy. |
| 3699 | unsigned MemCpySize = ByValSize - Offset; |
| 3700 | SDValue Src = DAG.getNode(ISD::ADD, DL, PtrTy, Arg, |
| 3701 | DAG.getConstant(Offset, PtrTy)); |
| 3702 | SDValue Dst = DAG.getNode(ISD::ADD, DL, PtrTy, StackPtr, |
| 3703 | DAG.getIntPtrConstant(ByVal.Address)); |
| 3704 | Chain = DAG.getMemcpy(Chain, DL, Dst, Src, |
| 3705 | DAG.getConstant(MemCpySize, PtrTy), Alignment, |
| 3706 | /*isVolatile=*/false, /*AlwaysInline=*/false, |
| 3707 | MachinePointerInfo(0), MachinePointerInfo(0)); |
| 3708 | MemOpChains.push_back(Chain); |
| 3709 | } |
Akira Hatanaka | f084847 | 2012-10-27 00:21:13 +0000 | [diff] [blame] | 3710 | |
| 3711 | void |
| 3712 | MipsTargetLowering::writeVarArgRegs(std::vector<SDValue> &OutChains, |
| 3713 | const MipsCC &CC, SDValue Chain, |
| 3714 | DebugLoc DL, SelectionDAG &DAG) const { |
| 3715 | unsigned NumRegs = CC.numIntArgRegs(); |
| 3716 | const uint16_t *ArgRegs = CC.intArgRegs(); |
| 3717 | const CCState &CCInfo = CC.getCCInfo(); |
| 3718 | unsigned Idx = CCInfo.getFirstUnallocated(ArgRegs, NumRegs); |
| 3719 | unsigned RegSize = CC.regSize(); |
| 3720 | EVT RegTy = MVT::getIntegerVT(RegSize * 8); |
| 3721 | const TargetRegisterClass *RC = getRegClassFor(RegTy); |
| 3722 | MachineFunction &MF = DAG.getMachineFunction(); |
| 3723 | MachineFrameInfo *MFI = MF.getFrameInfo(); |
| 3724 | MipsFunctionInfo *MipsFI = MF.getInfo<MipsFunctionInfo>(); |
| 3725 | |
| 3726 | // Offset of the first variable argument from stack pointer. |
| 3727 | int VaArgOffset; |
| 3728 | |
| 3729 | if (NumRegs == Idx) |
| 3730 | VaArgOffset = RoundUpToAlignment(CCInfo.getNextStackOffset(), RegSize); |
| 3731 | else |
| 3732 | VaArgOffset = |
| 3733 | (int)CC.reservedArgArea() - (int)(RegSize * (NumRegs - Idx)); |
| 3734 | |
| 3735 | // Record the frame index of the first variable argument |
| 3736 | // which is a value necessary to VASTART. |
| 3737 | int FI = MFI->CreateFixedObject(RegSize, VaArgOffset, true); |
| 3738 | MipsFI->setVarArgsFrameIndex(FI); |
| 3739 | |
| 3740 | // Copy the integer registers that have not been used for argument passing |
| 3741 | // to the argument register save area. For O32, the save area is allocated |
| 3742 | // in the caller's stack frame, while for N32/64, it is allocated in the |
| 3743 | // callee's stack frame. |
| 3744 | for (unsigned I = Idx; I < NumRegs; ++I, VaArgOffset += RegSize) { |
| 3745 | unsigned Reg = AddLiveIn(MF, ArgRegs[I], RC); |
| 3746 | SDValue ArgValue = DAG.getCopyFromReg(Chain, DL, Reg, RegTy); |
| 3747 | FI = MFI->CreateFixedObject(RegSize, VaArgOffset, true); |
| 3748 | SDValue PtrOff = DAG.getFrameIndex(FI, getPointerTy()); |
| 3749 | SDValue Store = DAG.getStore(Chain, DL, ArgValue, PtrOff, |
| 3750 | MachinePointerInfo(), false, false, 0); |
| 3751 | cast<StoreSDNode>(Store.getNode())->getMemOperand()->setValue(0); |
| 3752 | OutChains.push_back(Store); |
| 3753 | } |
| 3754 | } |