blob: 4421c4862fa0c1e83286a8d4b208ee4c532a940e [file] [log] [blame]
Akira Hatanaka4552c9a2011-04-15 21:51:11 +00001//===- MipsInstrInfo.h - Mips Instruction Information -----------*- C++ -*-===//
Bruno Cardoso Lopes972f5892007-06-06 07:42:06 +00002//
3// The LLVM Compiler Infrastructure
4//
Chris Lattner4ee451d2007-12-29 20:36:04 +00005// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
Bruno Cardoso Lopes972f5892007-06-06 07:42:06 +00007//
Akira Hatanaka4552c9a2011-04-15 21:51:11 +00008//===----------------------------------------------------------------------===//
Bruno Cardoso Lopes972f5892007-06-06 07:42:06 +00009//
10// This file contains the Mips implementation of the TargetInstrInfo class.
11//
Akira Hatanaka4552c9a2011-04-15 21:51:11 +000012//===----------------------------------------------------------------------===//
Bruno Cardoso Lopes972f5892007-06-06 07:42:06 +000013
14#ifndef MIPSINSTRUCTIONINFO_H
15#define MIPSINSTRUCTIONINFO_H
16
17#include "Mips.h"
Torok Edwinc25e7582009-07-11 20:10:48 +000018#include "llvm/Support/ErrorHandling.h"
Bruno Cardoso Lopes972f5892007-06-06 07:42:06 +000019#include "llvm/Target/TargetInstrInfo.h"
20#include "MipsRegisterInfo.h"
21
Evan Cheng4db3cff2011-07-01 17:57:27 +000022#define GET_INSTRINFO_HEADER
23#include "MipsGenInstrInfo.inc"
24
Bruno Cardoso Lopes972f5892007-06-06 07:42:06 +000025namespace llvm {
26
Bruno Cardoso Lopes0b2cd892007-08-18 01:59:45 +000027namespace Mips {
Akira Hatanaka20ada982011-04-01 17:39:08 +000028 /// GetOppositeBranchOpc - Return the inverse of the specified
29 /// opcode, e.g. turning BEQ to BNE.
30 unsigned GetOppositeBranchOpc(unsigned Opc);
Bruno Cardoso Lopes0b2cd892007-08-18 01:59:45 +000031}
32
Bruno Cardoso Lopesc517cb02009-09-01 17:27:58 +000033/// MipsII - This namespace holds all of the target specific flags that
34/// instruction info tracks.
35///
36namespace MipsII {
37 /// Target Operand Flag enum.
38 enum TOF {
Akira Hatanaka4552c9a2011-04-15 21:51:11 +000039 //===------------------------------------------------------------------===//
Bruno Cardoso Lopesc517cb02009-09-01 17:27:58 +000040 // Mips Specific MachineOperand flags.
Bruno Cardoso Lopes81092dc2011-03-04 17:51:39 +000041
Dan Gohman01a76ce2009-10-05 15:52:08 +000042 MO_NO_FLAG,
Bruno Cardoso Lopesc517cb02009-09-01 17:27:58 +000043
44 /// MO_GOT - Represents the offset into the global offset table at which
45 /// the address the relocation entry symbol resides during execution.
Dan Gohman01a76ce2009-10-05 15:52:08 +000046 MO_GOT,
Bruno Cardoso Lopesc517cb02009-09-01 17:27:58 +000047
Bruno Cardoso Lopes81092dc2011-03-04 17:51:39 +000048 /// MO_GOT_CALL - Represents the offset into the global offset table at
49 /// which the address of a call site relocation entry symbol resides
Bruno Cardoso Lopesc517cb02009-09-01 17:27:58 +000050 /// during execution. This is different from the above since this flag
51 /// can only be present in call instructions.
Dan Gohman01a76ce2009-10-05 15:52:08 +000052 MO_GOT_CALL,
Bruno Cardoso Lopesc517cb02009-09-01 17:27:58 +000053
Bruno Cardoso Lopes81092dc2011-03-04 17:51:39 +000054 /// MO_GPREL - Represents the offset from the current gp value to be used
Bruno Cardoso Lopesc517cb02009-09-01 17:27:58 +000055 /// for the relocatable object file being produced.
Dan Gohman01a76ce2009-10-05 15:52:08 +000056 MO_GPREL,
Bruno Cardoso Lopesc517cb02009-09-01 17:27:58 +000057
Akira Hatanakae2e436a2011-04-01 21:41:06 +000058 /// MO_ABS_HI/LO - Represents the hi or low part of an absolute symbol
Bruno Cardoso Lopes81092dc2011-03-04 17:51:39 +000059 /// address.
Akira Hatanakae2e436a2011-04-01 21:41:06 +000060 MO_ABS_HI,
Bruno Cardoso Lopesd9796862011-05-31 02:53:58 +000061 MO_ABS_LO,
62
63 /// MO_TLSGD - Represents the offset into the global offset table at which
64 // the module ID and TSL block offset reside during execution (General
65 // Dynamic TLS).
66 MO_TLSGD,
67
68 /// MO_GOTTPREL - Represents the offset from the thread pointer (Initial
69 // Exec TLS).
70 MO_GOTTPREL,
71
72 /// MO_TPREL_HI/LO - Represents the hi and low part of the offset from
73 // the thread pointer (Local Exec TLS).
74 MO_TPREL_HI,
75 MO_TPREL_LO
Bruno Cardoso Lopesc517cb02009-09-01 17:27:58 +000076 };
77}
78
Evan Cheng4db3cff2011-07-01 17:57:27 +000079class MipsInstrInfo : public MipsGenInstrInfo {
Bruno Cardoso Lopes972f5892007-06-06 07:42:06 +000080 MipsTargetMachine &TM;
81 const MipsRegisterInfo RI;
82public:
Dan Gohman950a4c42008-03-25 22:06:05 +000083 explicit MipsInstrInfo(MipsTargetMachine &TM);
Bruno Cardoso Lopes972f5892007-06-06 07:42:06 +000084
85 /// getRegisterInfo - TargetInstrInfo is a superset of MRegister info. As
86 /// such, whenever a client has an instance of instruction info, it should
87 /// always be able to get register info as well (through this method).
88 ///
Akira Hatanaka794bf172011-07-07 23:56:50 +000089 virtual const MipsRegisterInfo &getRegisterInfo() const;
Bruno Cardoso Lopes972f5892007-06-06 07:42:06 +000090
Bruno Cardoso Lopes972f5892007-06-06 07:42:06 +000091 /// isLoadFromStackSlot - If the specified machine instruction is a direct
92 /// load from a stack slot, return the virtual or physical register number of
93 /// the destination along with the FrameIndex of the loaded stack slot. If
94 /// not, return 0. This predicate must return 0 if the instruction has
95 /// any side effects other than loading from the stack slot.
Dan Gohmancbad42c2008-11-18 19:49:32 +000096 virtual unsigned isLoadFromStackSlot(const MachineInstr *MI,
97 int &FrameIndex) const;
Bruno Cardoso Lopes81092dc2011-03-04 17:51:39 +000098
Bruno Cardoso Lopes972f5892007-06-06 07:42:06 +000099 /// isStoreToStackSlot - If the specified machine instruction is a direct
100 /// store to a stack slot, return the virtual or physical register number of
101 /// the source reg along with the FrameIndex of the loaded stack slot. If
102 /// not, return 0. This predicate must return 0 if the instruction has
103 /// any side effects other than storing to the stack slot.
Dan Gohmancbad42c2008-11-18 19:49:32 +0000104 virtual unsigned isStoreToStackSlot(const MachineInstr *MI,
105 int &FrameIndex) const;
Bruno Cardoso Lopes81092dc2011-03-04 17:51:39 +0000106
Bruno Cardoso Lopes0b2cd892007-08-18 01:59:45 +0000107 /// Branch Analysis
108 virtual bool AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB,
109 MachineBasicBlock *&FBB,
Evan Chengdc54d312009-02-09 07:14:22 +0000110 SmallVectorImpl<MachineOperand> &Cond,
111 bool AllowModify) const;
Bruno Cardoso Lopes0b2cd892007-08-18 01:59:45 +0000112 virtual unsigned RemoveBranch(MachineBasicBlock &MBB) const;
Akira Hatanaka20ada982011-04-01 17:39:08 +0000113
114private:
115 void BuildCondBr(MachineBasicBlock &MBB, MachineBasicBlock *TBB, DebugLoc DL,
116 const SmallVectorImpl<MachineOperand>& Cond) const;
117
118public:
Bruno Cardoso Lopes972f5892007-06-06 07:42:06 +0000119 virtual unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
Bruno Cardoso Lopes0b2cd892007-08-18 01:59:45 +0000120 MachineBasicBlock *FBB,
Stuart Hastings3bf91252010-06-17 22:43:56 +0000121 const SmallVectorImpl<MachineOperand> &Cond,
122 DebugLoc DL) const;
Jakob Stoklund Olesen273c14f2010-07-11 01:08:31 +0000123 virtual void copyPhysReg(MachineBasicBlock &MBB,
124 MachineBasicBlock::iterator MI, DebugLoc DL,
125 unsigned DestReg, unsigned SrcReg,
126 bool KillSrc) const;
Owen Andersonf6372aa2008-01-01 21:11:32 +0000127 virtual void storeRegToStackSlot(MachineBasicBlock &MBB,
128 MachineBasicBlock::iterator MBBI,
Akira Hatanaka4552c9a2011-04-15 21:51:11 +0000129 unsigned SrcReg, bool isKill, int FrameIndex,
Evan Cheng746ad692010-05-06 19:06:44 +0000130 const TargetRegisterClass *RC,
131 const TargetRegisterInfo *TRI) const;
Owen Andersonf6372aa2008-01-01 21:11:32 +0000132
Owen Andersonf6372aa2008-01-01 21:11:32 +0000133 virtual void loadRegFromStackSlot(MachineBasicBlock &MBB,
134 MachineBasicBlock::iterator MBBI,
135 unsigned DestReg, int FrameIndex,
Evan Cheng746ad692010-05-06 19:06:44 +0000136 const TargetRegisterClass *RC,
137 const TargetRegisterInfo *TRI) const;
Owen Andersonf6372aa2008-01-01 21:11:32 +0000138
Akira Hatanakac4f24eb2011-07-01 01:04:43 +0000139 virtual MachineInstr* emitFrameIndexDebugValue(MachineFunction &MF,
140 int FrameIx, uint64_t Offset,
141 const MDNode *MDPtr,
142 DebugLoc DL) const;
143
Owen Anderson44eb65c2008-08-14 22:49:33 +0000144 virtual
145 bool ReverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const;
Bruno Cardoso Lopes0b2cd892007-08-18 01:59:45 +0000146
147 /// Insert nop instruction when hazard condition is found
Bruno Cardoso Lopes81092dc2011-03-04 17:51:39 +0000148 virtual void insertNoop(MachineBasicBlock &MBB,
Bruno Cardoso Lopes0b2cd892007-08-18 01:59:45 +0000149 MachineBasicBlock::iterator MI) const;
Dan Gohman99114052009-06-03 20:30:14 +0000150
151 /// getGlobalBaseReg - Return a virtual register initialized with the
152 /// the global base register value. Output instructions required to
153 /// initialize the register in the function entry block, if necessary.
154 ///
155 unsigned getGlobalBaseReg(MachineFunction *MF) const;
Bruno Cardoso Lopes972f5892007-06-06 07:42:06 +0000156};
157
158}
159
160#endif