| Eric Christopher | 50ab039 | 2012-05-07 03:13:32 +0000 | [diff] [blame] | 1 | ; Positive test for inline register constraints |
| 2 | ; |
| 3 | ; RUN: llc -march=mipsel < %s | FileCheck %s |
| 4 | |
| 5 | define i32 @main() nounwind { |
| 6 | entry: |
| 7 | |
| 8 | ; r with char |
| 9 | ;CHECK: #APP |
| 10 | ;CHECK: addi ${{[0-9]+}},${{[0-9]+}},23 |
| 11 | ;CHECK: #NO_APP |
| 12 | tail call i8 asm sideeffect "addi $0,$1,$2", "=r,r,n"(i8 27, i8 23) nounwind |
| 13 | |
| 14 | ; r with short |
| 15 | ;CHECK: #APP |
| 16 | ;CHECK: addi ${{[0-9]+}},${{[0-9]+}},13 |
| 17 | ;CHECK: #NO_APP |
| 18 | tail call i16 asm sideeffect "addi $0,$1,$2", "=r,r,n"(i16 17, i16 13) nounwind |
| 19 | |
| 20 | ; r with int |
| 21 | ;CHECK: #APP |
| 22 | ;CHECK: addi ${{[0-9]+}},${{[0-9]+}},3 |
| 23 | ;CHECK: #NO_APP |
| 24 | tail call i32 asm sideeffect "addi $0,$1,$2", "=r,r,n"(i32 7, i32 3) nounwind |
| Eric Christopher | 1d5a392 | 2012-05-07 06:25:10 +0000 | [diff] [blame] | 25 | |
| 26 | ; Now c with 1024: make sure register $25 is picked |
| 27 | ; CHECK: #APP |
| 28 | ; CHECK: addi $25,${{[0-9]+}},1024 |
| 29 | ; CHECK: #NO_APP |
| 30 | tail call i32 asm sideeffect "addi $0,$1,$2", "=c,c,I"(i32 4194304, i32 1024) nounwind |
| 31 | |
| Eric Christopher | 4adbefe | 2012-05-07 06:25:15 +0000 | [diff] [blame^] | 32 | ; Now l with 1024: make sure register lo is picked. We do this by checking the instruction |
| 33 | ; after the inline expression for a mflo to pull the value out of lo. |
| 34 | ; CHECK: #APP |
| 35 | ; CHECK-NEXT: mtlo ${{[0-9]+}} |
| 36 | ; CHECK-NEXT: madd ${{[0-9]+}},${{[0-9]+}} |
| 37 | ; CHECK-NEXT: #NO_APP |
| 38 | ; CHECK-NEXT: mflo ${{[0-9]+}} |
| 39 | %bosco = alloca i32, align 4 |
| 40 | call i32 asm sideeffect "\09mtlo $3 \0A\09\09madd $1,$2 ", "=l,r,r,r"(i32 7, i32 6, i32 44) nounwind |
| 41 | store volatile i32 %4, i32* %bosco, align 4 |
| 42 | |
| Eric Christopher | 50ab039 | 2012-05-07 03:13:32 +0000 | [diff] [blame] | 43 | ret i32 0 |
| 44 | } |