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Andrew Lenharth886470e2005-01-24 18:45:41 +00001//===-- AlphaTargetMachine.cpp - Define TargetMachine for Alpha -----------===//
Misha Brukman4633f1c2005-04-21 23:13:11 +00002//
Andrew Lenharth304d0f32005-01-22 23:41:55 +00003// The LLVM Compiler Infrastructure
4//
Chris Lattner4ee451d2007-12-29 20:36:04 +00005// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
Misha Brukman4633f1c2005-04-21 23:13:11 +00007//
Andrew Lenharth304d0f32005-01-22 23:41:55 +00008//===----------------------------------------------------------------------===//
Misha Brukman4633f1c2005-04-21 23:13:11 +00009//
Andrew Lenharth304d0f32005-01-22 23:41:55 +000010//
11//===----------------------------------------------------------------------===//
12
13#include "Alpha.h"
14#include "AlphaTargetMachine.h"
Chris Lattner1911fd42006-09-04 04:14:57 +000015#include "llvm/PassManager.h"
David Greene71847812009-07-14 20:18:05 +000016#include "llvm/Support/FormattedStream.h"
Daniel Dunbar0c795d62009-07-25 06:49:55 +000017#include "llvm/Target/TargetRegistry.h"
Andrew Lenharth304d0f32005-01-22 23:41:55 +000018using namespace llvm;
19
Daniel Dunbar0c795d62009-07-25 06:49:55 +000020extern "C" void LLVMInitializeAlphaTarget() {
21 // Register the target.
22 RegisterTargetMachine<AlphaTargetMachine> X(TheAlphaTarget);
Jim Laskeyfde1b3b2006-09-07 23:39:26 +000023}
24
Evan Cheng43966132011-07-19 06:37:02 +000025AlphaTargetMachine::AlphaTargetMachine(const Target &T, StringRef TT,
26 StringRef CPU,
27 StringRef FS, Reloc::Model RM)
28 : LLVMTargetMachine(T, TT, CPU, FS, RM),
Chris Lattner59a91782009-11-07 19:07:32 +000029 DataLayout("e-f128:128:128-n64"),
Anton Korobeynikov16c29b52011-01-10 12:39:04 +000030 FrameLowering(Subtarget),
Evan Cheng276365d2011-06-30 01:53:36 +000031 Subtarget(TT, CPU, FS),
Dan Gohmanff7a5622010-05-11 17:31:57 +000032 TLInfo(*this),
33 TSInfo(*this) {
Andrew Lenharth120ab482005-09-29 22:54:56 +000034}
Andrew Lenharth304d0f32005-01-22 23:41:55 +000035
Chris Lattner1911fd42006-09-04 04:14:57 +000036//===----------------------------------------------------------------------===//
37// Pass Pipeline Configuration
38//===----------------------------------------------------------------------===//
Andrew Lenharthe4f161c2005-03-02 17:21:38 +000039
Bill Wendlingbe8cc2a2009-04-29 00:15:41 +000040bool AlphaTargetMachine::addInstSelector(PassManagerBase &PM,
Bill Wendling98a366d2009-04-29 23:29:43 +000041 CodeGenOpt::Level OptLevel) {
Andrew Lenharthfabd5ba2006-01-23 21:56:07 +000042 PM.add(createAlphaISelDag(*this));
Andrew Lenharth304d0f32005-01-22 23:41:55 +000043 return false;
44}
Bill Wendlingbe8cc2a2009-04-29 00:15:41 +000045bool AlphaTargetMachine::addPreEmitPass(PassManagerBase &PM,
Bill Wendling98a366d2009-04-29 23:29:43 +000046 CodeGenOpt::Level OptLevel) {
Andrew Lenharth0934ae02005-07-22 20:52:16 +000047 // Must run branch selection immediately preceding the asm printer
Andrew Lenharthf81173f2006-10-31 16:49:55 +000048 PM.add(createAlphaBranchSelectionPass());
Chris Lattner7add5ff2009-07-15 21:40:24 +000049 PM.add(createAlphaLLRPPass(*this));
Chris Lattner1911fd42006-09-04 04:14:57 +000050 return false;
Andrew Lenharth0934ae02005-07-22 20:52:16 +000051}