blob: f92cdf434bbc510090a700b708e55e8461353e8c [file] [log] [blame]
Scott Michel86c041f2007-12-20 00:44:13 +00001; RUN: llvm-as -o - %s | llc -march=cellspu > %t1.s
Chris Lattner994d6cf2008-01-18 19:53:43 +00002; RUN: grep lqa %t1.s | count 13
Scott Michel53dec472008-03-05 23:00:19 +00003; RUN: grep il %t1.s | count 21
Chris Lattner994d6cf2008-01-18 19:53:43 +00004; RUN: grep shufb %t1.s | count 13
5; RUN: grep 65520 %t1.s | count 1
6; RUN: grep 43981 %t1.s | count 1
7; RUN: grep 13702 %t1.s | count 1
8; RUN: grep 81 %t1.s | count 2
9; RUN: grep 28225 %t1.s | count 1
10; RUN: grep 30720 %t1.s | count 1
11; RUN: grep 192 %t1.s | count 32
12; RUN: grep 128 %t1.s | count 30
Scott Michel86c041f2007-12-20 00:44:13 +000013; RUN: grep 224 %t1.s | count 2
14
Scott Michel9de5d0d2008-01-11 02:53:15 +000015target datalayout = "E-p:32:32:128-f64:64:128-f32:32:128-i64:32:128-i32:32:128-i16:16:128-i8:8:128-i1:8:128-a0:0:128-v128:128:128-s0:128:128"
16target triple = "spu"
17
Scott Michel86c041f2007-12-20 00:44:13 +000018; 1311768467750121234 => 0x 12345678 abcdef12 (4660,22136/43981,61202)
19; 18446744073709551591 => 0x ffffffff ffffffe7 (-25)
20; 18446744073708516742 => 0x ffffffff fff03586 (-1034874)
21; 5308431 => 0x 00000000 0051000F
22; 9223372038704560128 => 0x 80000000 6e417800
23
24define i64 @i64_const_1() {
25 ret i64 1311768467750121234 ;; Constant pool spill
26}
27
28define i64 @i64_const_2() {
29 ret i64 18446744073709551591 ;; IL/SHUFB
30}
31
32define i64 @i64_const_3() {
33 ret i64 18446744073708516742 ;; IHLU/IOHL/SHUFB
34}
35
36define i64 @i64_const_4() {
37 ret i64 5308431 ;; ILHU/IOHL/SHUFB
38}
39
40define i64 @i64_const_5() {
41 ret i64 511 ;; IL/SHUFB
42}
43
44define i64 @i64_const_6() {
45 ret i64 -512 ;; IL/SHUFB
46}
47
48define i64 @i64_const_7() {
49 ret i64 9223372038704560128 ;; IHLU/IOHL/SHUFB
50}
51
52define i64 @i64_const_8() {
53 ret i64 0 ;; IL
54}
55
Scott Michel53dec472008-03-05 23:00:19 +000056define i64 @i64_const_9() {
57 ret i64 -1 ;; IL
58}
59
Scott Michel86c041f2007-12-20 00:44:13 +000060; 0x4005bf0a8b145769 ->
61; (ILHU 0x4005 [16389]/IOHL 0xbf0a [48906])
62; (ILHU 0x8b14 [35604]/IOHL 0x5769 [22377])
63define double @f64_const_1() {
64 ret double 0x4005bf0a8b145769 ;; ILHU/IOHL via pattern
65}
66
67define double @f64_const_2() {
68 ret double 0x0010000000000000
69}
70
71define double @f64_const_3() {
72 ret double 0x7fefffffffffffff
73}
74
75define double @f64_const_4() {
76 ret double 0x400921fb54442d18
77}
78
79define double @f64_const_5() {
80 ret double 0xbff6a09e667f3bcd ;; ILHU/IOHL via pattern
81}
82
83define double @f64_const_6() {
84 ret double 0x3ff6a09e667f3bcd
85}
86
87define double @f64_const_7() {
88 ret double 0.000000e+00
89}