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gerrit-public.fairphone.software / fp2-dev / platform / external / llvm / 5b7a825ec5551fd1dff8c9f280cc203da3fdedd9 / . / test / CodeGen / MBlaze / shift.ll
blob: 186115ec192b3be4385d2a159853f5b02d862ef9 [file] [log] [blame]
Wesley Pecka70f28c2010-02-23 19:15:24 +0000[diff] [blame]1; Ensure that shifts are lowered to loops when the barrel shifter unit is
2; not available in the hardware and that loops are not used when the
3; barrel shifter unit is available in the hardware.
4;
5; RUN: llc < %s -march=mblaze | FileCheck -check-prefix=FUN %s
6; RUN: llc < %s -march=mblaze -mattr=+barrel | FileCheck -check-prefix=SHT %s
7
8define i8 @test_i8(i8 %a, i8 %b) {
9 ; FUN: test_i8:
10 ; SHT: test_i8:
11
12 %tmp.1 = shl i8 %a, %b
Wesley Peck60e71272010-10-21 03:34:22 +0000[diff] [blame]13 ; FUN-NOT: bsll
Wesley Pecka70f28c2010-02-23 19:15:24 +0000[diff] [blame]14 ; FUN: andi
15 ; FUN: add
16 ; FUN: bnei
17 ; SHT-NOT: andi
18 ; SHT-NOT: bnei
Wesley Peck60e71272010-10-21 03:34:22 +0000[diff] [blame]19 ; SHT: bsll
Wesley Pecka70f28c2010-02-23 19:15:24 +0000[diff] [blame]20
21 ret i8 %tmp.1
22 ; FUN: rtsd
23 ; SHT: rtsd
24}
25
26define i8 @testc_i8(i8 %a, i8 %b) {
27 ; FUN: testc_i8:
28 ; SHT: testc_i8:
29
30 %tmp.1 = shl i8 %a, 5
Wesley Peck60e71272010-10-21 03:34:22 +0000[diff] [blame]31 ; FUN-NOT: bsll
Wesley Pecka70f28c2010-02-23 19:15:24 +0000[diff] [blame]32 ; FUN: andi
33 ; FUN: add
34 ; FUN: bnei
35 ; SHT-NOT: andi
36 ; SHT-NOT: add
37 ; SHT-NOT: bnei
Wesley Peck60e71272010-10-21 03:34:22 +0000[diff] [blame]38 ; SHT: bslli
Wesley Pecka70f28c2010-02-23 19:15:24 +0000[diff] [blame]39
40 ret i8 %tmp.1
41 ; FUN: rtsd
42 ; SHT: rtsd
43}
44
45define i16 @test_i16(i16 %a, i16 %b) {
46 ; FUN: test_i16:
47 ; SHT: test_i16:
48
49 %tmp.1 = shl i16 %a, %b
Wesley Peck60e71272010-10-21 03:34:22 +0000[diff] [blame]50 ; FUN-NOT: bsll
Wesley Pecka70f28c2010-02-23 19:15:24 +0000[diff] [blame]51 ; FUN: andi
52 ; FUN: add
53 ; FUN: bnei
54 ; SHT-NOT: andi
55 ; SHT-NOT: bnei
Wesley Peck60e71272010-10-21 03:34:22 +0000[diff] [blame]56 ; SHT: bsll
Wesley Pecka70f28c2010-02-23 19:15:24 +0000[diff] [blame]57
58 ret i16 %tmp.1
59 ; FUN: rtsd
60 ; SHT: rtsd
61}
62
63define i16 @testc_i16(i16 %a, i16 %b) {
64 ; FUN: testc_i16:
65 ; SHT: testc_i16:
66
67 %tmp.1 = shl i16 %a, 5
Wesley Peck60e71272010-10-21 03:34:22 +0000[diff] [blame]68 ; FUN-NOT: bsll
Wesley Pecka70f28c2010-02-23 19:15:24 +0000[diff] [blame]69 ; FUN: andi
70 ; FUN: add
71 ; FUN: bnei
72 ; SHT-NOT: andi
73 ; SHT-NOT: add
74 ; SHT-NOT: bnei
Wesley Peck60e71272010-10-21 03:34:22 +0000[diff] [blame]75 ; SHT: bslli
Wesley Pecka70f28c2010-02-23 19:15:24 +0000[diff] [blame]76
77 ret i16 %tmp.1
78 ; FUN: rtsd
79 ; SHT: rtsd
80}
81
82define i32 @test_i32(i32 %a, i32 %b) {
83 ; FUN: test_i32:
84 ; SHT: test_i32:
85
86 %tmp.1 = shl i32 %a, %b
Wesley Peck60e71272010-10-21 03:34:22 +0000[diff] [blame]87 ; FUN-NOT: bsll
Wesley Pecka70f28c2010-02-23 19:15:24 +0000[diff] [blame]88 ; FUN: andi
89 ; FUN: add
90 ; FUN: bnei
91 ; SHT-NOT: andi
92 ; SHT-NOT: bnei
Wesley Peck60e71272010-10-21 03:34:22 +0000[diff] [blame]93 ; SHT: bsll
Wesley Pecka70f28c2010-02-23 19:15:24 +0000[diff] [blame]94
95 ret i32 %tmp.1
96 ; FUN: rtsd
97 ; SHT: rtsd
98}
99
100define i32 @testc_i32(i32 %a, i32 %b) {
101 ; FUN: testc_i32:
102 ; SHT: testc_i32:
103
104 %tmp.1 = shl i32 %a, 5
Wesley Peck60e71272010-10-21 03:34:22 +0000[diff] [blame]105 ; FUN-NOT: bsll
Wesley Pecka70f28c2010-02-23 19:15:24 +0000[diff] [blame]106 ; FUN: andi
107 ; FUN: add
108 ; FUN: bnei
109 ; SHT-NOT: andi
110 ; SHT-NOT: add
111 ; SHT-NOT: bnei
Wesley Peck60e71272010-10-21 03:34:22 +0000[diff] [blame]112 ; SHT: bslli
Wesley Pecka70f28c2010-02-23 19:15:24 +0000[diff] [blame]113
114 ret i32 %tmp.1
115 ; FUN: rtsd
116 ; SHT: rtsd
Wesley Pecka70f28c2010-02-23 19:15:24 +0000[diff] [blame]117}