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Rafael Espindola7bc59bc2006-05-14 22:18:28 +00001//===-- ARMTargetMachine.cpp - Define TargetMachine for ARM ---------------===//
2//
3// The LLVM Compiler Infrastructure
4//
Chris Lattner4ee451d2007-12-29 20:36:04 +00005// This file is distributed under the University of Illinois Open Source
Rafael Espindola7bc59bc2006-05-14 22:18:28 +00006// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10//
11//===----------------------------------------------------------------------===//
12
13#include "ARMTargetMachine.h"
Evan Chenga8e29892007-01-19 07:51:42 +000014#include "ARMTargetAsmInfo.h"
Rafael Espindolaec46ea32006-08-16 14:43:33 +000015#include "ARMFrameInfo.h"
Rafael Espindola7bc59bc2006-05-14 22:18:28 +000016#include "ARM.h"
Rafael Espindola7bc59bc2006-05-14 22:18:28 +000017#include "llvm/Module.h"
18#include "llvm/PassManager.h"
Evan Cheng93072922007-05-16 02:01:49 +000019#include "llvm/CodeGen/Passes.h"
Evan Chenga8e29892007-01-19 07:51:42 +000020#include "llvm/Support/CommandLine.h"
David Greene71847812009-07-14 20:18:05 +000021#include "llvm/Support/FormattedStream.h"
Rafael Espindola7bc59bc2006-05-14 22:18:28 +000022#include "llvm/Target/TargetMachineRegistry.h"
Evan Chenga8e29892007-01-19 07:51:42 +000023#include "llvm/Target/TargetOptions.h"
Rafael Espindola7bc59bc2006-05-14 22:18:28 +000024using namespace llvm;
25
Evan Chenga8e29892007-01-19 07:51:42 +000026static cl::opt<bool> DisableLdStOpti("disable-arm-loadstore-opti", cl::Hidden,
27 cl::desc("Disable load store optimization pass"));
Evan Cheng17207dd2007-09-20 00:48:22 +000028static cl::opt<bool> DisableIfConversion("disable-arm-if-conversion",cl::Hidden,
29 cl::desc("Disable if-conversion pass"));
Evan Chenga8e29892007-01-19 07:51:42 +000030
Oscar Fuentes92adc192008-11-15 21:36:30 +000031/// ARMTargetMachineModule - Note that this is used on hosts that cannot link
32/// in a library unless there are references into the library. In particular,
33/// it seems that it is not possible to get things to work on Win32 without
34/// this. Though it is unused, do not remove it.
35extern "C" int ARMTargetMachineModule;
36int ARMTargetMachineModule = 0;
37
Dan Gohman844731a2008-05-13 00:00:25 +000038// Register the target.
Daniel Dunbar51b198a2009-07-15 20:24:03 +000039extern Target TheARMTarget;
40static RegisterTarget<ARMTargetMachine> X(TheARMTarget, "arm", "ARM");
41
42extern Target TheThumbTarget;
43static RegisterTarget<ThumbTargetMachine> Y(TheThumbTarget, "thumb", "Thumb");
Rafael Espindola7bc59bc2006-05-14 22:18:28 +000044
Bob Wilsona96751f2009-06-23 23:59:40 +000045// Force static initialization.
46extern "C" void LLVMInitializeARMTarget() { }
Douglas Gregor1555a232009-06-16 20:12:29 +000047
Anton Korobeynikov0bd89712008-08-17 13:55:10 +000048// No assembler printer by default
Anton Korobeynikovd49ea772009-06-26 21:28:53 +000049ARMBaseTargetMachine::AsmPrinterCtorFn ARMBaseTargetMachine::AsmPrinterCtor = 0;
Anton Korobeynikov0bd89712008-08-17 13:55:10 +000050
Evan Cheng04321f72007-02-23 03:14:31 +000051/// TargetMachine ctor - Create an ARM architecture model.
52///
Daniel Dunbar51b198a2009-07-15 20:24:03 +000053ARMBaseTargetMachine::ARMBaseTargetMachine(const Target &T,
54 const Module &M,
Anton Korobeynikovd49ea772009-06-26 21:28:53 +000055 const std::string &FS,
56 bool isThumb)
Daniel Dunbar51b198a2009-07-15 20:24:03 +000057 : LLVMTargetMachine(T),
58 Subtarget(M, FS, isThumb),
Evan Chenge8308df2007-03-13 01:20:42 +000059 FrameInfo(Subtarget),
Evan Cheng3cc82232008-11-08 07:38:22 +000060 JITInfo(),
Evan Cheng8557c2b2009-06-19 01:51:50 +000061 InstrItins(Subtarget.getInstrItineraryData()) {
Evan Cheng65f24422008-10-30 16:10:54 +000062 DefRelocModel = getRelocationModel();
63}
Rafael Espindola7bc59bc2006-05-14 22:18:28 +000064
Daniel Dunbar51b198a2009-07-15 20:24:03 +000065ARMTargetMachine::ARMTargetMachine(const Target &T, const Module &M,
66 const std::string &FS)
67 : ARMBaseTargetMachine(T, M, FS, false), InstrInfo(Subtarget),
Anton Korobeynikovd49ea772009-06-26 21:28:53 +000068 DataLayout(Subtarget.isAPCS_ABI() ?
69 std::string("e-p:32:32-f64:32:32-i64:32:32") :
70 std::string("e-p:32:32-f64:64:64-i64:64:64")),
71 TLInfo(*this) {
72}
73
Daniel Dunbar51b198a2009-07-15 20:24:03 +000074ThumbTargetMachine::ThumbTargetMachine(const Target &T, const Module &M,
75 const std::string &FS)
76 : ARMBaseTargetMachine(T, M, FS, true),
Anton Korobeynikovd49ea772009-06-26 21:28:53 +000077 DataLayout(Subtarget.isAPCS_ABI() ?
78 std::string("e-p:32:32-f64:32:32-i64:32:32-"
79 "i16:16:32-i8:8:32-i1:8:32-a:0:32") :
80 std::string("e-p:32:32-f64:64:64-i64:64:64-"
81 "i16:16:32-i8:8:32-i1:8:32-a:0:32")),
82 TLInfo(*this) {
David Goodwinb50ea5c2009-07-02 22:18:33 +000083 // Create the approriate type of Thumb InstrInfo
84 if (Subtarget.hasThumb2())
85 InstrInfo = new Thumb2InstrInfo(Subtarget);
86 else
87 InstrInfo = new Thumb1InstrInfo(Subtarget);
Anton Korobeynikovd49ea772009-06-26 21:28:53 +000088}
89
Rafael Espindola7bc59bc2006-05-14 22:18:28 +000090
Anton Korobeynikovd49ea772009-06-26 21:28:53 +000091const TargetAsmInfo *ARMBaseTargetMachine::createTargetAsmInfo() const {
Anton Korobeynikov0f3cc652008-08-07 09:54:23 +000092 switch (Subtarget.TargetType) {
93 case ARMSubtarget::isDarwin:
94 return new ARMDarwinTargetAsmInfo(*this);
95 case ARMSubtarget::isELF:
96 return new ARMELFTargetAsmInfo(*this);
97 default:
Anton Korobeynikov32b952a2008-09-25 21:00:33 +000098 return new ARMGenericTargetAsmInfo(*this);
Anton Korobeynikov0f3cc652008-08-07 09:54:23 +000099 }
Evan Chenga8e29892007-01-19 07:51:42 +0000100}
101
102
Chris Lattner1911fd42006-09-04 04:14:57 +0000103// Pass Pipeline Configuration
Anton Korobeynikovd49ea772009-06-26 21:28:53 +0000104bool ARMBaseTargetMachine::addInstSelector(PassManagerBase &PM,
105 CodeGenOpt::Level OptLevel) {
Rafael Espindola7bc59bc2006-05-14 22:18:28 +0000106 PM.add(createARMISelDag(*this));
Chris Lattner1911fd42006-09-04 04:14:57 +0000107 return false;
108}
Rafael Espindola71f3b942006-09-19 15:49:25 +0000109
Anton Korobeynikovd49ea772009-06-26 21:28:53 +0000110bool ARMBaseTargetMachine::addPreRegAlloc(PassManagerBase &PM,
111 CodeGenOpt::Level OptLevel) {
Evan Chenge7d6df72009-06-13 09:12:55 +0000112 // FIXME: temporarily disabling load / store optimization pass for Thumb mode.
113 if (OptLevel != CodeGenOpt::None && !DisableLdStOpti && !Subtarget.isThumb())
114 PM.add(createARMLoadStoreOptimizationPass(true));
115 return true;
116}
117
Anton Korobeynikovd49ea772009-06-26 21:28:53 +0000118bool ARMBaseTargetMachine::addPreEmitPass(PassManagerBase &PM,
119 CodeGenOpt::Level OptLevel) {
Evan Chenga8e29892007-01-19 07:51:42 +0000120 // FIXME: temporarily disabling load / store optimization pass for Thumb mode.
Bill Wendling98a366d2009-04-29 23:29:43 +0000121 if (OptLevel != CodeGenOpt::None && !DisableLdStOpti && !Subtarget.isThumb())
Evan Chenga8e29892007-01-19 07:51:42 +0000122 PM.add(createARMLoadStoreOptimizationPass());
Anton Korobeynikov0f3cc652008-08-07 09:54:23 +0000123
Bill Wendling98a366d2009-04-29 23:29:43 +0000124 if (OptLevel != CodeGenOpt::None &&
125 !DisableIfConversion && !Subtarget.isThumb())
Evan Cheng75604f82007-05-16 20:52:46 +0000126 PM.add(createIfConverterPass());
127
Evan Cheng06e16582009-07-10 01:54:42 +0000128 if (Subtarget.isThumb2())
129 PM.add(createThumb2ITBlockPass());
130
Evan Chenga8e29892007-01-19 07:51:42 +0000131 PM.add(createARMConstantIslandPass());
Rafael Espindola71f3b942006-09-19 15:49:25 +0000132 return true;
133}
134
Anton Korobeynikovd49ea772009-06-26 21:28:53 +0000135bool ARMBaseTargetMachine::addAssemblyEmitter(PassManagerBase &PM,
136 CodeGenOpt::Level OptLevel,
137 bool Verbose,
David Greene71847812009-07-14 20:18:05 +0000138 formatted_raw_ostream &Out) {
Rafael Espindola7bc59bc2006-05-14 22:18:28 +0000139 // Output assembly language.
Anton Korobeynikov0bd89712008-08-17 13:55:10 +0000140 assert(AsmPrinterCtor && "AsmPrinter was not linked in");
141 if (AsmPrinterCtor)
Daniel Dunbar5bcc8bd2009-07-01 01:48:54 +0000142 PM.add(AsmPrinterCtor(Out, *this, Verbose));
Anton Korobeynikov0bd89712008-08-17 13:55:10 +0000143
Rafael Espindola7bc59bc2006-05-14 22:18:28 +0000144 return false;
145}
Evan Cheng148b6a42007-07-05 21:15:40 +0000146
147
Anton Korobeynikovd49ea772009-06-26 21:28:53 +0000148bool ARMBaseTargetMachine::addCodeEmitter(PassManagerBase &PM,
149 CodeGenOpt::Level OptLevel,
150 bool DumpAsm,
151 MachineCodeEmitter &MCE) {
Evan Cheng148b6a42007-07-05 21:15:40 +0000152 // FIXME: Move this to TargetJITInfo!
Evan Cheng65f24422008-10-30 16:10:54 +0000153 if (DefRelocModel == Reloc::Default)
154 setRelocationModel(Reloc::Static);
Evan Cheng148b6a42007-07-05 21:15:40 +0000155
156 // Machine code emitter pass for ARM.
157 PM.add(createARMCodeEmitterPass(*this, MCE));
Daniel Dunbarf3f47152009-07-15 12:49:15 +0000158 if (DumpAsm)
159 addAssemblyEmitter(PM, OptLevel, true, ferrs());
Anton Korobeynikov0bd89712008-08-17 13:55:10 +0000160
Evan Cheng148b6a42007-07-05 21:15:40 +0000161 return false;
162}
163
Anton Korobeynikovd49ea772009-06-26 21:28:53 +0000164bool ARMBaseTargetMachine::addCodeEmitter(PassManagerBase &PM,
165 CodeGenOpt::Level OptLevel,
166 bool DumpAsm,
167 JITCodeEmitter &JCE) {
Bruno Cardoso Lopesa3f99f92009-05-30 20:51:52 +0000168 // FIXME: Move this to TargetJITInfo!
169 if (DefRelocModel == Reloc::Default)
170 setRelocationModel(Reloc::Static);
171
172 // Machine code emitter pass for ARM.
173 PM.add(createARMJITCodeEmitterPass(*this, JCE));
Daniel Dunbarf3f47152009-07-15 12:49:15 +0000174 if (DumpAsm)
175 addAssemblyEmitter(PM, OptLevel, true, ferrs());
Bruno Cardoso Lopesa3f99f92009-05-30 20:51:52 +0000176
177 return false;
178}
179
Bruno Cardoso Lopesac57e6e2009-07-06 05:09:34 +0000180bool ARMBaseTargetMachine::addCodeEmitter(PassManagerBase &PM,
181 CodeGenOpt::Level OptLevel,
182 bool DumpAsm,
183 ObjectCodeEmitter &OCE) {
184 // FIXME: Move this to TargetJITInfo!
185 if (DefRelocModel == Reloc::Default)
186 setRelocationModel(Reloc::Static);
187
188 // Machine code emitter pass for ARM.
189 PM.add(createARMObjectCodeEmitterPass(*this, OCE));
Daniel Dunbarf3f47152009-07-15 12:49:15 +0000190 if (DumpAsm)
191 addAssemblyEmitter(PM, OptLevel, true, ferrs());
Bruno Cardoso Lopesac57e6e2009-07-06 05:09:34 +0000192
193 return false;
194}
195
Anton Korobeynikovd49ea772009-06-26 21:28:53 +0000196bool ARMBaseTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
197 CodeGenOpt::Level OptLevel,
198 bool DumpAsm,
199 MachineCodeEmitter &MCE) {
Evan Cheng148b6a42007-07-05 21:15:40 +0000200 // Machine code emitter pass for ARM.
201 PM.add(createARMCodeEmitterPass(*this, MCE));
Daniel Dunbarf3f47152009-07-15 12:49:15 +0000202 if (DumpAsm)
203 addAssemblyEmitter(PM, OptLevel, true, ferrs());
Anton Korobeynikov0bd89712008-08-17 13:55:10 +0000204
Evan Cheng148b6a42007-07-05 21:15:40 +0000205 return false;
206}
Bruno Cardoso Lopesa3f99f92009-05-30 20:51:52 +0000207
Anton Korobeynikovd49ea772009-06-26 21:28:53 +0000208bool ARMBaseTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
209 CodeGenOpt::Level OptLevel,
210 bool DumpAsm,
211 JITCodeEmitter &JCE) {
Bruno Cardoso Lopesa3f99f92009-05-30 20:51:52 +0000212 // Machine code emitter pass for ARM.
213 PM.add(createARMJITCodeEmitterPass(*this, JCE));
Daniel Dunbarf3f47152009-07-15 12:49:15 +0000214 if (DumpAsm)
215 addAssemblyEmitter(PM, OptLevel, true, ferrs());
Bruno Cardoso Lopesa3f99f92009-05-30 20:51:52 +0000216
217 return false;
218}
219
Bruno Cardoso Lopesac57e6e2009-07-06 05:09:34 +0000220bool ARMBaseTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
221 CodeGenOpt::Level OptLevel,
222 bool DumpAsm,
223 ObjectCodeEmitter &OCE) {
224 // Machine code emitter pass for ARM.
225 PM.add(createARMObjectCodeEmitterPass(*this, OCE));
Daniel Dunbarf3f47152009-07-15 12:49:15 +0000226 if (DumpAsm)
227 addAssemblyEmitter(PM, OptLevel, true, ferrs());
Bruno Cardoso Lopesac57e6e2009-07-06 05:09:34 +0000228
229 return false;
230}
Bruno Cardoso Lopesa3f99f92009-05-30 20:51:52 +0000231