blob: 186072c01aaee173184c374a314e5530538323ac [file] [log] [blame]
Alkis Evlogimenos34d9bc92004-02-23 23:08:11 +00001//===-- llvm/CodeGen/VirtRegMap.cpp - Virtual Register Map ----------------===//
2//
3// The LLVM Compiler Infrastructure
4//
5// This file was developed by the LLVM research group and is distributed under
6// the University of Illinois Open Source License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
Chris Lattner8c4d88d2004-09-30 01:54:45 +000010// This file implements the VirtRegMap class.
11//
12// It also contains implementations of the the Spiller interface, which, given a
13// virtual register map and a machine function, eliminates all virtual
14// references by replacing them with physical register references - adding spill
Alkis Evlogimenos0d6c5b62004-02-24 08:58:30 +000015// code as necessary.
Alkis Evlogimenos34d9bc92004-02-23 23:08:11 +000016//
17//===----------------------------------------------------------------------===//
18
Chris Lattner8c4d88d2004-09-30 01:54:45 +000019#define DEBUG_TYPE "spiller"
Alkis Evlogimenos34d9bc92004-02-23 23:08:11 +000020#include "VirtRegMap.h"
Alkis Evlogimenos0d6c5b62004-02-24 08:58:30 +000021#include "llvm/Function.h"
Alkis Evlogimenos34d9bc92004-02-23 23:08:11 +000022#include "llvm/CodeGen/MachineFrameInfo.h"
Chris Lattner8c4d88d2004-09-30 01:54:45 +000023#include "llvm/CodeGen/MachineFunction.h"
24#include "llvm/CodeGen/SSARegMap.h"
Alkis Evlogimenos34d9bc92004-02-23 23:08:11 +000025#include "llvm/Target/TargetMachine.h"
Alkis Evlogimenos0d6c5b62004-02-24 08:58:30 +000026#include "llvm/Target/TargetInstrInfo.h"
Reid Spencer551ccae2004-09-01 22:55:40 +000027#include "llvm/Support/CommandLine.h"
28#include "llvm/Support/Debug.h"
Chris Lattnera4f0b3a2006-08-27 12:54:02 +000029#include "llvm/Support/Compiler.h"
Reid Spencer551ccae2004-09-01 22:55:40 +000030#include "llvm/ADT/Statistic.h"
31#include "llvm/ADT/STLExtras.h"
Chris Lattner27f29162004-10-26 15:35:58 +000032#include <algorithm>
Alkis Evlogimenos34d9bc92004-02-23 23:08:11 +000033using namespace llvm;
34
35namespace {
Chris Lattnerac0b6ae2006-12-06 17:46:33 +000036 static Statistic NumSpills("spiller", "Number of register spills");
37 static Statistic NumStores("spiller", "Number of stores added");
38 static Statistic NumLoads ("spiller", "Number of loads added");
39 static Statistic NumReused("spiller", "Number of values reused");
40 static Statistic NumDSE ("spiller", "Number of dead stores elided");
41 static Statistic NumDCE ("spiller", "Number of copies elided");
Alkis Evlogimenos0d6c5b62004-02-24 08:58:30 +000042
Chris Lattner8c4d88d2004-09-30 01:54:45 +000043 enum SpillerName { simple, local };
Alkis Evlogimenosdd420e02004-03-01 23:18:15 +000044
Andrew Lenharthed41f1b2006-07-20 17:28:38 +000045 static cl::opt<SpillerName>
Chris Lattner8c4d88d2004-09-30 01:54:45 +000046 SpillerOpt("spiller",
Chris Lattner7fb64342004-10-01 19:04:51 +000047 cl::desc("Spiller to use: (default: local)"),
Chris Lattner8c4d88d2004-09-30 01:54:45 +000048 cl::Prefix,
49 cl::values(clEnumVal(simple, " simple spiller"),
50 clEnumVal(local, " local spiller"),
51 clEnumValEnd),
Chris Lattner7fb64342004-10-01 19:04:51 +000052 cl::init(local));
Alkis Evlogimenos34d9bc92004-02-23 23:08:11 +000053}
54
Chris Lattner8c4d88d2004-09-30 01:54:45 +000055//===----------------------------------------------------------------------===//
56// VirtRegMap implementation
57//===----------------------------------------------------------------------===//
58
Chris Lattner29268692006-09-05 02:12:02 +000059VirtRegMap::VirtRegMap(MachineFunction &mf)
60 : TII(*mf.getTarget().getInstrInfo()), MF(mf),
61 Virt2PhysMap(NO_PHYS_REG), Virt2StackSlotMap(NO_STACK_SLOT) {
62 grow();
63}
64
Chris Lattner8c4d88d2004-09-30 01:54:45 +000065void VirtRegMap::grow() {
Chris Lattner7f690e62004-09-30 02:15:18 +000066 Virt2PhysMap.grow(MF.getSSARegMap()->getLastVirtReg());
67 Virt2StackSlotMap.grow(MF.getSSARegMap()->getLastVirtReg());
Alkis Evlogimenos34d9bc92004-02-23 23:08:11 +000068}
69
Chris Lattner8c4d88d2004-09-30 01:54:45 +000070int VirtRegMap::assignVirt2StackSlot(unsigned virtReg) {
71 assert(MRegisterInfo::isVirtualRegister(virtReg));
Chris Lattner7f690e62004-09-30 02:15:18 +000072 assert(Virt2StackSlotMap[virtReg] == NO_STACK_SLOT &&
Chris Lattner8c4d88d2004-09-30 01:54:45 +000073 "attempt to assign stack slot to already spilled register");
Chris Lattner7f690e62004-09-30 02:15:18 +000074 const TargetRegisterClass* RC = MF.getSSARegMap()->getRegClass(virtReg);
75 int frameIndex = MF.getFrameInfo()->CreateStackObject(RC->getSize(),
76 RC->getAlignment());
77 Virt2StackSlotMap[virtReg] = frameIndex;
Chris Lattner8c4d88d2004-09-30 01:54:45 +000078 ++NumSpills;
79 return frameIndex;
80}
81
82void VirtRegMap::assignVirt2StackSlot(unsigned virtReg, int frameIndex) {
83 assert(MRegisterInfo::isVirtualRegister(virtReg));
Chris Lattner7f690e62004-09-30 02:15:18 +000084 assert(Virt2StackSlotMap[virtReg] == NO_STACK_SLOT &&
Chris Lattner8c4d88d2004-09-30 01:54:45 +000085 "attempt to assign stack slot to already spilled register");
Chris Lattner7f690e62004-09-30 02:15:18 +000086 Virt2StackSlotMap[virtReg] = frameIndex;
Alkis Evlogimenos38af59a2004-05-29 20:38:05 +000087}
88
Chris Lattnerbec6a9e2004-10-01 23:15:36 +000089void VirtRegMap::virtFolded(unsigned VirtReg, MachineInstr *OldMI,
Chris Lattner35f27052006-05-01 21:16:03 +000090 unsigned OpNo, MachineInstr *NewMI) {
Chris Lattnerbec6a9e2004-10-01 23:15:36 +000091 // Move previous memory references folded to new instruction.
92 MI2VirtMapTy::iterator IP = MI2VirtMap.lower_bound(NewMI);
Misha Brukmanedf128a2005-04-21 22:36:52 +000093 for (MI2VirtMapTy::iterator I = MI2VirtMap.lower_bound(OldMI),
Chris Lattnerbec6a9e2004-10-01 23:15:36 +000094 E = MI2VirtMap.end(); I != E && I->first == OldMI; ) {
95 MI2VirtMap.insert(IP, std::make_pair(NewMI, I->second));
Chris Lattnerdbea9732004-09-30 16:35:08 +000096 MI2VirtMap.erase(I++);
Chris Lattner8c4d88d2004-09-30 01:54:45 +000097 }
Chris Lattnerdbea9732004-09-30 16:35:08 +000098
Chris Lattnerbec6a9e2004-10-01 23:15:36 +000099 ModRef MRInfo;
Evan Cheng51cdcd12006-12-07 01:21:59 +0000100 if (OldMI->getInstrDescriptor()->
101 getOperandConstraint(OpNo, TOI::TIED_TO) != -1) {
Chris Lattner29268692006-09-05 02:12:02 +0000102 // Folded a two-address operand.
103 MRInfo = isModRef;
104 } else if (OldMI->getOperand(OpNo).isDef()) {
105 MRInfo = isMod;
Chris Lattnerbec6a9e2004-10-01 23:15:36 +0000106 } else {
Chris Lattner29268692006-09-05 02:12:02 +0000107 MRInfo = isRef;
Chris Lattnerbec6a9e2004-10-01 23:15:36 +0000108 }
Alkis Evlogimenos5f375022004-03-01 20:05:10 +0000109
Chris Lattner8c4d88d2004-09-30 01:54:45 +0000110 // add new memory reference
Chris Lattnerbec6a9e2004-10-01 23:15:36 +0000111 MI2VirtMap.insert(IP, std::make_pair(NewMI, std::make_pair(VirtReg, MRInfo)));
Alkis Evlogimenos5f375022004-03-01 20:05:10 +0000112}
113
Chris Lattner7f690e62004-09-30 02:15:18 +0000114void VirtRegMap::print(std::ostream &OS) const {
Bill Wendlingb2b9c202006-11-17 02:09:07 +0000115 llvm_ostream LOS(OS);
116 print(LOS);
117}
118
119void VirtRegMap::print(llvm_ostream &OS) const {
Chris Lattner7f690e62004-09-30 02:15:18 +0000120 const MRegisterInfo* MRI = MF.getTarget().getRegisterInfo();
Alkis Evlogimenos34d9bc92004-02-23 23:08:11 +0000121
Chris Lattner7f690e62004-09-30 02:15:18 +0000122 OS << "********** REGISTER MAP **********\n";
Chris Lattner8c4d88d2004-09-30 01:54:45 +0000123 for (unsigned i = MRegisterInfo::FirstVirtualRegister,
Chris Lattner7f690e62004-09-30 02:15:18 +0000124 e = MF.getSSARegMap()->getLastVirtReg(); i <= e; ++i) {
125 if (Virt2PhysMap[i] != (unsigned)VirtRegMap::NO_PHYS_REG)
126 OS << "[reg" << i << " -> " << MRI->getName(Virt2PhysMap[i]) << "]\n";
Misha Brukmanedf128a2005-04-21 22:36:52 +0000127
Chris Lattner8c4d88d2004-09-30 01:54:45 +0000128 }
129
130 for (unsigned i = MRegisterInfo::FirstVirtualRegister,
Chris Lattner7f690e62004-09-30 02:15:18 +0000131 e = MF.getSSARegMap()->getLastVirtReg(); i <= e; ++i)
132 if (Virt2StackSlotMap[i] != VirtRegMap::NO_STACK_SLOT)
133 OS << "[reg" << i << " -> fi#" << Virt2StackSlotMap[i] << "]\n";
134 OS << '\n';
Alkis Evlogimenos34d9bc92004-02-23 23:08:11 +0000135}
Alkis Evlogimenos0d6c5b62004-02-24 08:58:30 +0000136
Bill Wendlingb2b9c202006-11-17 02:09:07 +0000137void VirtRegMap::dump() const {
138 llvm_ostream OS = DOUT;
139 print(OS);
140}
Alkis Evlogimenosdd420e02004-03-01 23:18:15 +0000141
Chris Lattner8c4d88d2004-09-30 01:54:45 +0000142
143//===----------------------------------------------------------------------===//
144// Simple Spiller Implementation
145//===----------------------------------------------------------------------===//
146
147Spiller::~Spiller() {}
Alkis Evlogimenosdd420e02004-03-01 23:18:15 +0000148
Alkis Evlogimenos0d6c5b62004-02-24 08:58:30 +0000149namespace {
Chris Lattnerf8c68f62006-06-28 22:17:39 +0000150 struct VISIBILITY_HIDDEN SimpleSpiller : public Spiller {
Chris Lattner35f27052006-05-01 21:16:03 +0000151 bool runOnMachineFunction(MachineFunction& mf, VirtRegMap &VRM);
Chris Lattner8c4d88d2004-09-30 01:54:45 +0000152 };
Alkis Evlogimenos0d6c5b62004-02-24 08:58:30 +0000153}
154
Chris Lattner35f27052006-05-01 21:16:03 +0000155bool SimpleSpiller::runOnMachineFunction(MachineFunction &MF, VirtRegMap &VRM) {
Bill Wendlingb2b9c202006-11-17 02:09:07 +0000156 DOUT << "********** REWRITE MACHINE CODE **********\n";
157 DOUT << "********** Function: " << MF.getFunction()->getName() << '\n';
Chris Lattnerb0f31bf2005-01-23 22:45:13 +0000158 const TargetMachine &TM = MF.getTarget();
159 const MRegisterInfo &MRI = *TM.getRegisterInfo();
160 bool *PhysRegsUsed = MF.getUsedPhysregs();
Chris Lattner8c4d88d2004-09-30 01:54:45 +0000161
Chris Lattner4ea1b822004-09-30 02:33:48 +0000162 // LoadedRegs - Keep track of which vregs are loaded, so that we only load
163 // each vreg once (in the case where a spilled vreg is used by multiple
164 // operands). This is always smaller than the number of operands to the
165 // current machine instr, so it should be small.
166 std::vector<unsigned> LoadedRegs;
Chris Lattner8c4d88d2004-09-30 01:54:45 +0000167
Chris Lattner0fc27cc2004-09-30 02:59:33 +0000168 for (MachineFunction::iterator MBBI = MF.begin(), E = MF.end();
169 MBBI != E; ++MBBI) {
Bill Wendlingb2b9c202006-11-17 02:09:07 +0000170 DOUT << MBBI->getBasicBlock()->getName() << ":\n";
Chris Lattner0fc27cc2004-09-30 02:59:33 +0000171 MachineBasicBlock &MBB = *MBBI;
172 for (MachineBasicBlock::iterator MII = MBB.begin(),
173 E = MBB.end(); MII != E; ++MII) {
174 MachineInstr &MI = *MII;
175 for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) {
Chris Lattner7fb64342004-10-01 19:04:51 +0000176 MachineOperand &MO = MI.getOperand(i);
Chris Lattner886dd912005-04-04 21:35:34 +0000177 if (MO.isRegister() && MO.getReg())
178 if (MRegisterInfo::isVirtualRegister(MO.getReg())) {
179 unsigned VirtReg = MO.getReg();
180 unsigned PhysReg = VRM.getPhys(VirtReg);
181 if (VRM.hasStackSlot(VirtReg)) {
182 int StackSlot = VRM.getStackSlot(VirtReg);
Chris Lattnerbf9716b2005-09-30 01:29:00 +0000183 const TargetRegisterClass* RC =
184 MF.getSSARegMap()->getRegClass(VirtReg);
Misha Brukmanedf128a2005-04-21 22:36:52 +0000185
Chris Lattner886dd912005-04-04 21:35:34 +0000186 if (MO.isUse() &&
187 std::find(LoadedRegs.begin(), LoadedRegs.end(), VirtReg)
188 == LoadedRegs.end()) {
Chris Lattnerbf9716b2005-09-30 01:29:00 +0000189 MRI.loadRegFromStackSlot(MBB, &MI, PhysReg, StackSlot, RC);
Chris Lattner886dd912005-04-04 21:35:34 +0000190 LoadedRegs.push_back(VirtReg);
191 ++NumLoads;
Bill Wendlingb2b9c202006-11-17 02:09:07 +0000192 DOUT << '\t' << *prior(MII);
Chris Lattner886dd912005-04-04 21:35:34 +0000193 }
Misha Brukmanedf128a2005-04-21 22:36:52 +0000194
Chris Lattner886dd912005-04-04 21:35:34 +0000195 if (MO.isDef()) {
Chris Lattnerbf9716b2005-09-30 01:29:00 +0000196 MRI.storeRegToStackSlot(MBB, next(MII), PhysReg, StackSlot, RC);
Chris Lattner886dd912005-04-04 21:35:34 +0000197 ++NumStores;
198 }
Chris Lattner0fc27cc2004-09-30 02:59:33 +0000199 }
Chris Lattner886dd912005-04-04 21:35:34 +0000200 PhysRegsUsed[PhysReg] = true;
Chris Lattnere53f4a02006-05-04 17:52:23 +0000201 MI.getOperand(i).setReg(PhysReg);
Chris Lattner886dd912005-04-04 21:35:34 +0000202 } else {
203 PhysRegsUsed[MO.getReg()] = true;
Chris Lattner8c4d88d2004-09-30 01:54:45 +0000204 }
Chris Lattner8c4d88d2004-09-30 01:54:45 +0000205 }
Chris Lattner886dd912005-04-04 21:35:34 +0000206
Bill Wendlingb2b9c202006-11-17 02:09:07 +0000207 DOUT << '\t' << MI;
Chris Lattner4ea1b822004-09-30 02:33:48 +0000208 LoadedRegs.clear();
Alkis Evlogimenosdd420e02004-03-01 23:18:15 +0000209 }
Chris Lattner8c4d88d2004-09-30 01:54:45 +0000210 }
211 return true;
212}
213
214//===----------------------------------------------------------------------===//
215// Local Spiller Implementation
216//===----------------------------------------------------------------------===//
217
218namespace {
Chris Lattner7fb64342004-10-01 19:04:51 +0000219 /// LocalSpiller - This spiller does a simple pass over the machine basic
220 /// block to attempt to keep spills in registers as much as possible for
221 /// blocks that have low register pressure (the vreg may be spilled due to
222 /// register pressure in other blocks).
Chris Lattnerf8c68f62006-06-28 22:17:39 +0000223 class VISIBILITY_HIDDEN LocalSpiller : public Spiller {
Chris Lattner8c4d88d2004-09-30 01:54:45 +0000224 const MRegisterInfo *MRI;
Chris Lattner7fb64342004-10-01 19:04:51 +0000225 const TargetInstrInfo *TII;
Chris Lattner8c4d88d2004-09-30 01:54:45 +0000226 public:
Chris Lattner35f27052006-05-01 21:16:03 +0000227 bool runOnMachineFunction(MachineFunction &MF, VirtRegMap &VRM) {
Chris Lattner7fb64342004-10-01 19:04:51 +0000228 MRI = MF.getTarget().getRegisterInfo();
229 TII = MF.getTarget().getInstrInfo();
Bill Wendlingb2b9c202006-11-17 02:09:07 +0000230 DOUT << "\n**** Local spiller rewriting function '"
231 << MF.getFunction()->getName() << "':\n";
Chris Lattner8c4d88d2004-09-30 01:54:45 +0000232
Chris Lattner7fb64342004-10-01 19:04:51 +0000233 for (MachineFunction::iterator MBB = MF.begin(), E = MF.end();
234 MBB != E; ++MBB)
235 RewriteMBB(*MBB, VRM);
236 return true;
237 }
Chris Lattner8c4d88d2004-09-30 01:54:45 +0000238 private:
Chris Lattner35f27052006-05-01 21:16:03 +0000239 void RewriteMBB(MachineBasicBlock &MBB, VirtRegMap &VRM);
Chris Lattner7fb64342004-10-01 19:04:51 +0000240 void ClobberPhysReg(unsigned PR, std::map<int, unsigned> &SpillSlots,
Chris Lattner07cf1412006-02-03 00:36:31 +0000241 std::multimap<unsigned, int> &PhysRegs);
Chris Lattner7fb64342004-10-01 19:04:51 +0000242 void ClobberPhysRegOnly(unsigned PR, std::map<int, unsigned> &SpillSlots,
Chris Lattner07cf1412006-02-03 00:36:31 +0000243 std::multimap<unsigned, int> &PhysRegs);
244 void ModifyStackSlot(int Slot, std::map<int, unsigned> &SpillSlots,
245 std::multimap<unsigned, int> &PhysRegs);
Chris Lattner8c4d88d2004-09-30 01:54:45 +0000246 };
247}
248
Chris Lattner66cf80f2006-02-03 23:13:58 +0000249/// AvailableSpills - As the local spiller is scanning and rewriting an MBB from
250/// top down, keep track of which spills slots are available in each register.
Chris Lattner593c9582006-02-03 23:28:46 +0000251///
252/// Note that not all physregs are created equal here. In particular, some
253/// physregs are reloads that we are allowed to clobber or ignore at any time.
254/// Other physregs are values that the register allocated program is using that
255/// we cannot CHANGE, but we can read if we like. We keep track of this on a
256/// per-stack-slot basis as the low bit in the value of the SpillSlotsAvailable
257/// entries. The predicate 'canClobberPhysReg()' checks this bit and
258/// addAvailable sets it if.
Chris Lattnerf8c68f62006-06-28 22:17:39 +0000259namespace {
260class VISIBILITY_HIDDEN AvailableSpills {
Chris Lattner66cf80f2006-02-03 23:13:58 +0000261 const MRegisterInfo *MRI;
262 const TargetInstrInfo *TII;
263
264 // SpillSlotsAvailable - This map keeps track of all of the spilled virtual
265 // register values that are still available, due to being loaded or stored to,
266 // but not invalidated yet.
267 std::map<int, unsigned> SpillSlotsAvailable;
268
269 // PhysRegsAvailable - This is the inverse of SpillSlotsAvailable, indicating
270 // which stack slot values are currently held by a physreg. This is used to
271 // invalidate entries in SpillSlotsAvailable when a physreg is modified.
272 std::multimap<unsigned, int> PhysRegsAvailable;
273
274 void ClobberPhysRegOnly(unsigned PhysReg);
275public:
276 AvailableSpills(const MRegisterInfo *mri, const TargetInstrInfo *tii)
277 : MRI(mri), TII(tii) {
278 }
279
280 /// getSpillSlotPhysReg - If the specified stack slot is available in a
281 /// physical register, return that PhysReg, otherwise return 0.
282 unsigned getSpillSlotPhysReg(int Slot) const {
283 std::map<int, unsigned>::const_iterator I = SpillSlotsAvailable.find(Slot);
284 if (I != SpillSlotsAvailable.end())
Chris Lattner593c9582006-02-03 23:28:46 +0000285 return I->second >> 1; // Remove the CanClobber bit.
Chris Lattner66cf80f2006-02-03 23:13:58 +0000286 return 0;
287 }
Chris Lattner540fec62006-02-25 01:51:33 +0000288
289 const MRegisterInfo *getRegInfo() const { return MRI; }
Chris Lattner66cf80f2006-02-03 23:13:58 +0000290
291 /// addAvailable - Mark that the specified stack slot is available in the
Chris Lattner593c9582006-02-03 23:28:46 +0000292 /// specified physreg. If CanClobber is true, the physreg can be modified at
293 /// any time without changing the semantics of the program.
294 void addAvailable(int Slot, unsigned Reg, bool CanClobber = true) {
Chris Lattner86662492006-02-03 23:50:46 +0000295 // If this stack slot is thought to be available in some other physreg,
296 // remove its record.
297 ModifyStackSlot(Slot);
298
Chris Lattner66cf80f2006-02-03 23:13:58 +0000299 PhysRegsAvailable.insert(std::make_pair(Reg, Slot));
Jeff Cohen003cecb2006-02-04 03:27:39 +0000300 SpillSlotsAvailable[Slot] = (Reg << 1) | (unsigned)CanClobber;
Chris Lattner66cf80f2006-02-03 23:13:58 +0000301
Bill Wendlingb2b9c202006-11-17 02:09:07 +0000302 DOUT << "Remembering SS#" << Slot << " in physreg "
303 << MRI->getName(Reg) << "\n";
Chris Lattner66cf80f2006-02-03 23:13:58 +0000304 }
305
Chris Lattner593c9582006-02-03 23:28:46 +0000306 /// canClobberPhysReg - Return true if the spiller is allowed to change the
307 /// value of the specified stackslot register if it desires. The specified
308 /// stack slot must be available in a physreg for this query to make sense.
309 bool canClobberPhysReg(int Slot) const {
310 assert(SpillSlotsAvailable.count(Slot) && "Slot not available!");
311 return SpillSlotsAvailable.find(Slot)->second & 1;
312 }
Chris Lattner66cf80f2006-02-03 23:13:58 +0000313
314 /// ClobberPhysReg - This is called when the specified physreg changes
315 /// value. We use this to invalidate any info about stuff we thing lives in
316 /// it and any of its aliases.
317 void ClobberPhysReg(unsigned PhysReg);
318
319 /// ModifyStackSlot - This method is called when the value in a stack slot
320 /// changes. This removes information about which register the previous value
321 /// for this slot lives in (as the previous value is dead now).
322 void ModifyStackSlot(int Slot);
323};
Chris Lattnerf8c68f62006-06-28 22:17:39 +0000324}
Chris Lattner66cf80f2006-02-03 23:13:58 +0000325
326/// ClobberPhysRegOnly - This is called when the specified physreg changes
327/// value. We use this to invalidate any info about stuff we thing lives in it.
328void AvailableSpills::ClobberPhysRegOnly(unsigned PhysReg) {
329 std::multimap<unsigned, int>::iterator I =
330 PhysRegsAvailable.lower_bound(PhysReg);
Chris Lattner07cf1412006-02-03 00:36:31 +0000331 while (I != PhysRegsAvailable.end() && I->first == PhysReg) {
Chris Lattner7fb64342004-10-01 19:04:51 +0000332 int Slot = I->second;
Chris Lattner07cf1412006-02-03 00:36:31 +0000333 PhysRegsAvailable.erase(I++);
Chris Lattner593c9582006-02-03 23:28:46 +0000334 assert((SpillSlotsAvailable[Slot] >> 1) == PhysReg &&
Chris Lattner66cf80f2006-02-03 23:13:58 +0000335 "Bidirectional map mismatch!");
336 SpillSlotsAvailable.erase(Slot);
Bill Wendlingb2b9c202006-11-17 02:09:07 +0000337 DOUT << "PhysReg " << MRI->getName(PhysReg)
338 << " clobbered, invalidating SS#" << Slot << "\n";
Chris Lattner8c4d88d2004-09-30 01:54:45 +0000339 }
Chris Lattner8c4d88d2004-09-30 01:54:45 +0000340}
341
Chris Lattner66cf80f2006-02-03 23:13:58 +0000342/// ClobberPhysReg - This is called when the specified physreg changes
343/// value. We use this to invalidate any info about stuff we thing lives in
344/// it and any of its aliases.
345void AvailableSpills::ClobberPhysReg(unsigned PhysReg) {
Chris Lattner7fb64342004-10-01 19:04:51 +0000346 for (const unsigned *AS = MRI->getAliasSet(PhysReg); *AS; ++AS)
Chris Lattner66cf80f2006-02-03 23:13:58 +0000347 ClobberPhysRegOnly(*AS);
348 ClobberPhysRegOnly(PhysReg);
Chris Lattner8c4d88d2004-09-30 01:54:45 +0000349}
350
Chris Lattner07cf1412006-02-03 00:36:31 +0000351/// ModifyStackSlot - This method is called when the value in a stack slot
352/// changes. This removes information about which register the previous value
353/// for this slot lives in (as the previous value is dead now).
Chris Lattner66cf80f2006-02-03 23:13:58 +0000354void AvailableSpills::ModifyStackSlot(int Slot) {
355 std::map<int, unsigned>::iterator It = SpillSlotsAvailable.find(Slot);
356 if (It == SpillSlotsAvailable.end()) return;
Chris Lattner593c9582006-02-03 23:28:46 +0000357 unsigned Reg = It->second >> 1;
Chris Lattner66cf80f2006-02-03 23:13:58 +0000358 SpillSlotsAvailable.erase(It);
Chris Lattner07cf1412006-02-03 00:36:31 +0000359
360 // This register may hold the value of multiple stack slots, only remove this
361 // stack slot from the set of values the register contains.
362 std::multimap<unsigned, int>::iterator I = PhysRegsAvailable.lower_bound(Reg);
363 for (; ; ++I) {
364 assert(I != PhysRegsAvailable.end() && I->first == Reg &&
365 "Map inverse broken!");
366 if (I->second == Slot) break;
367 }
368 PhysRegsAvailable.erase(I);
369}
370
371
Chris Lattner8c4d88d2004-09-30 01:54:45 +0000372
Chris Lattner7fb64342004-10-01 19:04:51 +0000373// ReusedOp - For each reused operand, we keep track of a bit of information, in
374// case we need to rollback upon processing a new operand. See comments below.
375namespace {
376 struct ReusedOp {
377 // The MachineInstr operand that reused an available value.
378 unsigned Operand;
Misha Brukmanedf128a2005-04-21 22:36:52 +0000379
Chris Lattner7fb64342004-10-01 19:04:51 +0000380 // StackSlot - The spill slot of the value being reused.
381 unsigned StackSlot;
Misha Brukmanedf128a2005-04-21 22:36:52 +0000382
Chris Lattner7fb64342004-10-01 19:04:51 +0000383 // PhysRegReused - The physical register the value was available in.
384 unsigned PhysRegReused;
Misha Brukmanedf128a2005-04-21 22:36:52 +0000385
Chris Lattner7fb64342004-10-01 19:04:51 +0000386 // AssignedPhysReg - The physreg that was assigned for use by the reload.
387 unsigned AssignedPhysReg;
Chris Lattner8a61a752005-10-06 17:19:06 +0000388
389 // VirtReg - The virtual register itself.
390 unsigned VirtReg;
Misha Brukmanedf128a2005-04-21 22:36:52 +0000391
Chris Lattner8a61a752005-10-06 17:19:06 +0000392 ReusedOp(unsigned o, unsigned ss, unsigned prr, unsigned apr,
393 unsigned vreg)
394 : Operand(o), StackSlot(ss), PhysRegReused(prr), AssignedPhysReg(apr),
395 VirtReg(vreg) {}
Chris Lattner7fb64342004-10-01 19:04:51 +0000396 };
Chris Lattner540fec62006-02-25 01:51:33 +0000397
398 /// ReuseInfo - This maintains a collection of ReuseOp's for each operand that
399 /// is reused instead of reloaded.
Chris Lattnerf8c68f62006-06-28 22:17:39 +0000400 class VISIBILITY_HIDDEN ReuseInfo {
Chris Lattner540fec62006-02-25 01:51:33 +0000401 MachineInstr &MI;
402 std::vector<ReusedOp> Reuses;
Evan Chenge077ef62006-11-04 00:21:55 +0000403 bool *PhysRegsClobbered;
Chris Lattner540fec62006-02-25 01:51:33 +0000404 public:
Evan Chenge077ef62006-11-04 00:21:55 +0000405 ReuseInfo(MachineInstr &mi, const MRegisterInfo *mri) : MI(mi) {
406 PhysRegsClobbered = new bool[mri->getNumRegs()];
407 std::fill(PhysRegsClobbered, PhysRegsClobbered+mri->getNumRegs(), false);
408 }
409 ~ReuseInfo() {
410 delete[] PhysRegsClobbered;
411 }
Chris Lattner540fec62006-02-25 01:51:33 +0000412
413 bool hasReuses() const {
414 return !Reuses.empty();
415 }
416
417 /// addReuse - If we choose to reuse a virtual register that is already
418 /// available instead of reloading it, remember that we did so.
419 void addReuse(unsigned OpNo, unsigned StackSlot,
420 unsigned PhysRegReused, unsigned AssignedPhysReg,
421 unsigned VirtReg) {
422 // If the reload is to the assigned register anyway, no undo will be
423 // required.
424 if (PhysRegReused == AssignedPhysReg) return;
425
426 // Otherwise, remember this.
427 Reuses.push_back(ReusedOp(OpNo, StackSlot, PhysRegReused,
428 AssignedPhysReg, VirtReg));
429 }
Evan Chenge077ef62006-11-04 00:21:55 +0000430
431 void markClobbered(unsigned PhysReg) {
432 PhysRegsClobbered[PhysReg] = true;
433 }
434
435 bool isClobbered(unsigned PhysReg) const {
436 return PhysRegsClobbered[PhysReg];
437 }
Chris Lattner540fec62006-02-25 01:51:33 +0000438
439 /// GetRegForReload - We are about to emit a reload into PhysReg. If there
440 /// is some other operand that is using the specified register, either pick
441 /// a new register to use, or evict the previous reload and use this reg.
442 unsigned GetRegForReload(unsigned PhysReg, MachineInstr *MI,
443 AvailableSpills &Spills,
444 std::map<int, MachineInstr*> &MaybeDeadStores) {
445 if (Reuses.empty()) return PhysReg; // This is most often empty.
446
447 for (unsigned ro = 0, e = Reuses.size(); ro != e; ++ro) {
448 ReusedOp &Op = Reuses[ro];
449 // If we find some other reuse that was supposed to use this register
450 // exactly for its reload, we can change this reload to use ITS reload
451 // register.
452 if (Op.PhysRegReused == PhysReg) {
453 // Yup, use the reload register that we didn't use before.
Evan Chenge077ef62006-11-04 00:21:55 +0000454 unsigned NewReg = Op.AssignedPhysReg;
Chris Lattner47cb7172006-02-25 02:03:40 +0000455 return GetRegForReload(NewReg, MI, Spills, MaybeDeadStores);
Chris Lattner540fec62006-02-25 01:51:33 +0000456 } else {
457 // Otherwise, we might also have a problem if a previously reused
458 // value aliases the new register. If so, codegen the previous reload
459 // and use this one.
460 unsigned PRRU = Op.PhysRegReused;
461 const MRegisterInfo *MRI = Spills.getRegInfo();
462 if (MRI->areAliases(PRRU, PhysReg)) {
463 // Okay, we found out that an alias of a reused register
464 // was used. This isn't good because it means we have
465 // to undo a previous reuse.
466 MachineBasicBlock *MBB = MI->getParent();
467 const TargetRegisterClass *AliasRC =
Chris Lattner28bad082006-02-25 02:17:31 +0000468 MBB->getParent()->getSSARegMap()->getRegClass(Op.VirtReg);
469
470 // Copy Op out of the vector and remove it, we're going to insert an
471 // explicit load for it.
472 ReusedOp NewOp = Op;
473 Reuses.erase(Reuses.begin()+ro);
474
475 // Ok, we're going to try to reload the assigned physreg into the
476 // slot that we were supposed to in the first place. However, that
477 // register could hold a reuse. Check to see if it conflicts or
478 // would prefer us to use a different register.
479 unsigned NewPhysReg = GetRegForReload(NewOp.AssignedPhysReg,
480 MI, Spills, MaybeDeadStores);
481
482 MRI->loadRegFromStackSlot(*MBB, MI, NewPhysReg,
483 NewOp.StackSlot, AliasRC);
484 Spills.ClobberPhysReg(NewPhysReg);
485 Spills.ClobberPhysReg(NewOp.PhysRegReused);
Chris Lattner540fec62006-02-25 01:51:33 +0000486
487 // Any stores to this stack slot are not dead anymore.
Chris Lattner28bad082006-02-25 02:17:31 +0000488 MaybeDeadStores.erase(NewOp.StackSlot);
Chris Lattner540fec62006-02-25 01:51:33 +0000489
Chris Lattnere53f4a02006-05-04 17:52:23 +0000490 MI->getOperand(NewOp.Operand).setReg(NewPhysReg);
Chris Lattner540fec62006-02-25 01:51:33 +0000491
Chris Lattner28bad082006-02-25 02:17:31 +0000492 Spills.addAvailable(NewOp.StackSlot, NewPhysReg);
Chris Lattner540fec62006-02-25 01:51:33 +0000493 ++NumLoads;
494 DEBUG(MachineBasicBlock::iterator MII = MI;
Bill Wendlingb2b9c202006-11-17 02:09:07 +0000495 DOUT << '\t' << *prior(MII));
Chris Lattner540fec62006-02-25 01:51:33 +0000496
Bill Wendlingb2b9c202006-11-17 02:09:07 +0000497 DOUT << "Reuse undone!\n";
Chris Lattner540fec62006-02-25 01:51:33 +0000498 --NumReused;
Chris Lattner28bad082006-02-25 02:17:31 +0000499
500 // Finally, PhysReg is now available, go ahead and use it.
Chris Lattner540fec62006-02-25 01:51:33 +0000501 return PhysReg;
502 }
503 }
504 }
505 return PhysReg;
506 }
507 };
Chris Lattner7fb64342004-10-01 19:04:51 +0000508}
Chris Lattner8c4d88d2004-09-30 01:54:45 +0000509
Chris Lattner7fb64342004-10-01 19:04:51 +0000510
511/// rewriteMBB - Keep track of which spills are available even after the
512/// register allocator is done with them. If possible, avoid reloading vregs.
Chris Lattner35f27052006-05-01 21:16:03 +0000513void LocalSpiller::RewriteMBB(MachineBasicBlock &MBB, VirtRegMap &VRM) {
Chris Lattner7fb64342004-10-01 19:04:51 +0000514
Bill Wendlingb2b9c202006-11-17 02:09:07 +0000515 DOUT << MBB.getBasicBlock()->getName() << ":\n";
Chris Lattner7fb64342004-10-01 19:04:51 +0000516
Chris Lattner66cf80f2006-02-03 23:13:58 +0000517 // Spills - Keep track of which spilled values are available in physregs so
518 // that we can choose to reuse the physregs instead of emitting reloads.
519 AvailableSpills Spills(MRI, TII);
520
Chris Lattner52b25db2004-10-01 19:47:12 +0000521 // MaybeDeadStores - When we need to write a value back into a stack slot,
522 // keep track of the inserted store. If the stack slot value is never read
523 // (because the value was used from some available register, for example), and
524 // subsequently stored to, the original store is dead. This map keeps track
525 // of inserted stores that are not used. If we see a subsequent store to the
526 // same stack slot, the original store is deleted.
527 std::map<int, MachineInstr*> MaybeDeadStores;
528
Chris Lattnerb0f31bf2005-01-23 22:45:13 +0000529 bool *PhysRegsUsed = MBB.getParent()->getUsedPhysregs();
530
Chris Lattner7fb64342004-10-01 19:04:51 +0000531 for (MachineBasicBlock::iterator MII = MBB.begin(), E = MBB.end();
532 MII != E; ) {
533 MachineInstr &MI = *MII;
534 MachineBasicBlock::iterator NextMII = MII; ++NextMII;
535
Chris Lattner540fec62006-02-25 01:51:33 +0000536 /// ReusedOperands - Keep track of operand reuse in case we need to undo
537 /// reuse.
Evan Chenge077ef62006-11-04 00:21:55 +0000538 ReuseInfo ReusedOperands(MI, MRI);
539
540 // Loop over all of the implicit defs, clearing them from our available
541 // sets.
542 const unsigned *ImpDef = TII->getImplicitDefs(MI.getOpcode());
543 if (ImpDef) {
544 for ( ; *ImpDef; ++ImpDef) {
545 PhysRegsUsed[*ImpDef] = true;
546 ReusedOperands.markClobbered(*ImpDef);
547 Spills.ClobberPhysReg(*ImpDef);
548 }
549 }
550
Chris Lattner7fb64342004-10-01 19:04:51 +0000551 // Process all of the spilled uses and all non spilled reg references.
552 for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) {
553 MachineOperand &MO = MI.getOperand(i);
Chris Lattner50ea01e2005-09-09 20:29:51 +0000554 if (!MO.isRegister() || MO.getReg() == 0)
555 continue; // Ignore non-register operands.
556
557 if (MRegisterInfo::isPhysicalRegister(MO.getReg())) {
558 // Ignore physregs for spilling, but remember that it is used by this
559 // function.
Chris Lattner886dd912005-04-04 21:35:34 +0000560 PhysRegsUsed[MO.getReg()] = true;
Evan Chenge077ef62006-11-04 00:21:55 +0000561 ReusedOperands.markClobbered(MO.getReg());
Chris Lattner50ea01e2005-09-09 20:29:51 +0000562 continue;
563 }
564
565 assert(MRegisterInfo::isVirtualRegister(MO.getReg()) &&
566 "Not a virtual or a physical register?");
567
568 unsigned VirtReg = MO.getReg();
569 if (!VRM.hasStackSlot(VirtReg)) {
570 // This virtual register was assigned a physreg!
571 unsigned Phys = VRM.getPhys(VirtReg);
572 PhysRegsUsed[Phys] = true;
Evan Chenge077ef62006-11-04 00:21:55 +0000573 if (MO.isDef())
574 ReusedOperands.markClobbered(Phys);
Chris Lattnere53f4a02006-05-04 17:52:23 +0000575 MI.getOperand(i).setReg(Phys);
Chris Lattner50ea01e2005-09-09 20:29:51 +0000576 continue;
577 }
578
579 // This virtual register is now known to be a spilled value.
580 if (!MO.isUse())
581 continue; // Handle defs in the loop below (handle use&def here though)
Chris Lattner7fb64342004-10-01 19:04:51 +0000582
Chris Lattner50ea01e2005-09-09 20:29:51 +0000583 int StackSlot = VRM.getStackSlot(VirtReg);
584 unsigned PhysReg;
Chris Lattner7fb64342004-10-01 19:04:51 +0000585
Chris Lattner50ea01e2005-09-09 20:29:51 +0000586 // Check to see if this stack slot is available.
Chris Lattneraddc55a2006-04-28 01:46:50 +0000587 if ((PhysReg = Spills.getSpillSlotPhysReg(StackSlot))) {
Chris Lattner7fb64342004-10-01 19:04:51 +0000588
Chris Lattner29268692006-09-05 02:12:02 +0000589 // This spilled operand might be part of a two-address operand. If this
590 // is the case, then changing it will necessarily require changing the
591 // def part of the instruction as well. However, in some cases, we
592 // aren't allowed to modify the reused register. If none of these cases
593 // apply, reuse it.
594 bool CanReuse = true;
Evan Cheng51cdcd12006-12-07 01:21:59 +0000595 int ti = MI.getInstrDescriptor()->getOperandConstraint(i, TOI::TIED_TO);
Evan Cheng360c2dd2006-11-01 23:06:55 +0000596 if (ti != -1 &&
597 MI.getOperand(ti).isReg() &&
598 MI.getOperand(ti).getReg() == VirtReg) {
Chris Lattner29268692006-09-05 02:12:02 +0000599 // Okay, we have a two address operand. We can reuse this physreg as
Evan Chenge077ef62006-11-04 00:21:55 +0000600 // long as we are allowed to clobber the value and there is an earlier
601 // def that has already clobbered the physreg.
602 CanReuse = Spills.canClobberPhysReg(StackSlot) &&
603 !ReusedOperands.isClobbered(PhysReg);
Chris Lattner29268692006-09-05 02:12:02 +0000604 }
605
606 if (CanReuse) {
Chris Lattneraddc55a2006-04-28 01:46:50 +0000607 // If this stack slot value is already available, reuse it!
Bill Wendlingb2b9c202006-11-17 02:09:07 +0000608 DOUT << "Reusing SS#" << StackSlot << " from physreg "
609 << MRI->getName(PhysReg) << " for vreg"
610 << VirtReg <<" instead of reloading into physreg "
611 << MRI->getName(VRM.getPhys(VirtReg)) << "\n";
Chris Lattnere53f4a02006-05-04 17:52:23 +0000612 MI.getOperand(i).setReg(PhysReg);
Chris Lattneraddc55a2006-04-28 01:46:50 +0000613
614 // The only technical detail we have is that we don't know that
615 // PhysReg won't be clobbered by a reloaded stack slot that occurs
616 // later in the instruction. In particular, consider 'op V1, V2'.
617 // If V1 is available in physreg R0, we would choose to reuse it
618 // here, instead of reloading it into the register the allocator
619 // indicated (say R1). However, V2 might have to be reloaded
620 // later, and it might indicate that it needs to live in R0. When
621 // this occurs, we need to have information available that
622 // indicates it is safe to use R1 for the reload instead of R0.
623 //
624 // To further complicate matters, we might conflict with an alias,
625 // or R0 and R1 might not be compatible with each other. In this
626 // case, we actually insert a reload for V1 in R1, ensuring that
627 // we can get at R0 or its alias.
628 ReusedOperands.addReuse(i, StackSlot, PhysReg,
629 VRM.getPhys(VirtReg), VirtReg);
Evan Chenge077ef62006-11-04 00:21:55 +0000630 if (ti != -1)
631 // Only mark it clobbered if this is a use&def operand.
632 ReusedOperands.markClobbered(PhysReg);
Chris Lattneraddc55a2006-04-28 01:46:50 +0000633 ++NumReused;
634 continue;
635 }
636
637 // Otherwise we have a situation where we have a two-address instruction
638 // whose mod/ref operand needs to be reloaded. This reload is already
639 // available in some register "PhysReg", but if we used PhysReg as the
640 // operand to our 2-addr instruction, the instruction would modify
641 // PhysReg. This isn't cool if something later uses PhysReg and expects
642 // to get its initial value.
Chris Lattner50ea01e2005-09-09 20:29:51 +0000643 //
Chris Lattneraddc55a2006-04-28 01:46:50 +0000644 // To avoid this problem, and to avoid doing a load right after a store,
645 // we emit a copy from PhysReg into the designated register for this
646 // operand.
647 unsigned DesignatedReg = VRM.getPhys(VirtReg);
648 assert(DesignatedReg && "Must map virtreg to physreg!");
649
650 // Note that, if we reused a register for a previous operand, the
651 // register we want to reload into might not actually be
652 // available. If this occurs, use the register indicated by the
653 // reuser.
654 if (ReusedOperands.hasReuses())
655 DesignatedReg = ReusedOperands.GetRegForReload(DesignatedReg, &MI,
656 Spills, MaybeDeadStores);
657
Chris Lattnerba1fc3d2006-04-28 04:43:18 +0000658 // If the mapped designated register is actually the physreg we have
659 // incoming, we don't need to inserted a dead copy.
660 if (DesignatedReg == PhysReg) {
661 // If this stack slot value is already available, reuse it!
Bill Wendlingb2b9c202006-11-17 02:09:07 +0000662 DOUT << "Reusing SS#" << StackSlot << " from physreg "
663 << MRI->getName(PhysReg) << " for vreg"
664 << VirtReg
665 << " instead of reloading into same physreg.\n";
Chris Lattnere53f4a02006-05-04 17:52:23 +0000666 MI.getOperand(i).setReg(PhysReg);
Evan Chenge077ef62006-11-04 00:21:55 +0000667 ReusedOperands.markClobbered(PhysReg);
Chris Lattnerba1fc3d2006-04-28 04:43:18 +0000668 ++NumReused;
669 continue;
670 }
671
Chris Lattneraddc55a2006-04-28 01:46:50 +0000672 const TargetRegisterClass* RC =
673 MBB.getParent()->getSSARegMap()->getRegClass(VirtReg);
674
675 PhysRegsUsed[DesignatedReg] = true;
Evan Chenge077ef62006-11-04 00:21:55 +0000676 ReusedOperands.markClobbered(DesignatedReg);
Chris Lattneraddc55a2006-04-28 01:46:50 +0000677 MRI->copyRegToReg(MBB, &MI, DesignatedReg, PhysReg, RC);
678
679 // This invalidates DesignatedReg.
680 Spills.ClobberPhysReg(DesignatedReg);
681
682 Spills.addAvailable(StackSlot, DesignatedReg);
Chris Lattnere53f4a02006-05-04 17:52:23 +0000683 MI.getOperand(i).setReg(DesignatedReg);
Bill Wendlingb2b9c202006-11-17 02:09:07 +0000684 DOUT << '\t' << *prior(MII);
Chris Lattner50ea01e2005-09-09 20:29:51 +0000685 ++NumReused;
686 continue;
687 }
688
689 // Otherwise, reload it and remember that we have it.
690 PhysReg = VRM.getPhys(VirtReg);
Chris Lattner172c3622006-01-04 06:47:48 +0000691 assert(PhysReg && "Must map virtreg to physreg!");
Chris Lattnerbf9716b2005-09-30 01:29:00 +0000692 const TargetRegisterClass* RC =
693 MBB.getParent()->getSSARegMap()->getRegClass(VirtReg);
Chris Lattner7fb64342004-10-01 19:04:51 +0000694
Chris Lattner50ea01e2005-09-09 20:29:51 +0000695 // Note that, if we reused a register for a previous operand, the
696 // register we want to reload into might not actually be
697 // available. If this occurs, use the register indicated by the
698 // reuser.
Chris Lattner540fec62006-02-25 01:51:33 +0000699 if (ReusedOperands.hasReuses())
700 PhysReg = ReusedOperands.GetRegForReload(PhysReg, &MI,
701 Spills, MaybeDeadStores);
702
Chris Lattner50ea01e2005-09-09 20:29:51 +0000703 PhysRegsUsed[PhysReg] = true;
Evan Chenge077ef62006-11-04 00:21:55 +0000704 ReusedOperands.markClobbered(PhysReg);
Chris Lattnerbf9716b2005-09-30 01:29:00 +0000705 MRI->loadRegFromStackSlot(MBB, &MI, PhysReg, StackSlot, RC);
Chris Lattner50ea01e2005-09-09 20:29:51 +0000706 // This invalidates PhysReg.
Chris Lattner66cf80f2006-02-03 23:13:58 +0000707 Spills.ClobberPhysReg(PhysReg);
Chris Lattner50ea01e2005-09-09 20:29:51 +0000708
709 // Any stores to this stack slot are not dead anymore.
710 MaybeDeadStores.erase(StackSlot);
Chris Lattner66cf80f2006-02-03 23:13:58 +0000711 Spills.addAvailable(StackSlot, PhysReg);
Chris Lattner50ea01e2005-09-09 20:29:51 +0000712 ++NumLoads;
Chris Lattnere53f4a02006-05-04 17:52:23 +0000713 MI.getOperand(i).setReg(PhysReg);
Bill Wendlingb2b9c202006-11-17 02:09:07 +0000714 DOUT << '\t' << *prior(MII);
Chris Lattner8c4d88d2004-09-30 01:54:45 +0000715 }
716
Bill Wendlingb2b9c202006-11-17 02:09:07 +0000717 DOUT << '\t' << MI;
Chris Lattner8c4d88d2004-09-30 01:54:45 +0000718
Chris Lattner7fb64342004-10-01 19:04:51 +0000719 // If we have folded references to memory operands, make sure we clear all
720 // physical registers that may contain the value of the spilled virtual
721 // register
Chris Lattner8f1d6402005-01-14 15:54:24 +0000722 VirtRegMap::MI2VirtMapTy::const_iterator I, End;
723 for (tie(I, End) = VRM.getFoldedVirts(&MI); I != End; ++I) {
Bill Wendlingb2b9c202006-11-17 02:09:07 +0000724 DOUT << "Folded vreg: " << I->second.first << " MR: "
725 << I->second.second;
Chris Lattnerbec6a9e2004-10-01 23:15:36 +0000726 unsigned VirtReg = I->second.first;
727 VirtRegMap::ModRef MR = I->second.second;
Chris Lattnercea86882005-09-19 06:56:21 +0000728 if (!VRM.hasStackSlot(VirtReg)) {
Bill Wendlingb2b9c202006-11-17 02:09:07 +0000729 DOUT << ": No stack slot!\n";
Chris Lattnercea86882005-09-19 06:56:21 +0000730 continue;
731 }
732 int SS = VRM.getStackSlot(VirtReg);
Bill Wendlingb2b9c202006-11-17 02:09:07 +0000733 DOUT << " - StackSlot: " << SS << "\n";
Chris Lattnercea86882005-09-19 06:56:21 +0000734
735 // If this folded instruction is just a use, check to see if it's a
736 // straight load from the virt reg slot.
737 if ((MR & VirtRegMap::isRef) && !(MR & VirtRegMap::isMod)) {
738 int FrameIdx;
Chris Lattner40839602006-02-02 20:12:32 +0000739 if (unsigned DestReg = TII->isLoadFromStackSlot(&MI, FrameIdx)) {
Chris Lattner6ec36262006-10-12 17:45:38 +0000740 if (FrameIdx == SS) {
741 // If this spill slot is available, turn it into a copy (or nothing)
742 // instead of leaving it as a load!
743 if (unsigned InReg = Spills.getSpillSlotPhysReg(SS)) {
Bill Wendlingb2b9c202006-11-17 02:09:07 +0000744 DOUT << "Promoted Load To Copy: " << MI;
Chris Lattner6ec36262006-10-12 17:45:38 +0000745 MachineFunction &MF = *MBB.getParent();
746 if (DestReg != InReg) {
747 MRI->copyRegToReg(MBB, &MI, DestReg, InReg,
748 MF.getSSARegMap()->getRegClass(VirtReg));
749 // Revisit the copy so we make sure to notice the effects of the
750 // operation on the destreg (either needing to RA it if it's
751 // virtual or needing to clobber any values if it's physical).
752 NextMII = &MI;
753 --NextMII; // backtrack to the copy.
754 }
755 VRM.RemoveFromFoldedVirtMap(&MI);
756 MBB.erase(&MI);
757 goto ProcessNextInst;
Chris Lattnercea86882005-09-19 06:56:21 +0000758 }
Chris Lattnercea86882005-09-19 06:56:21 +0000759 }
760 }
761 }
762
763 // If this reference is not a use, any previous store is now dead.
764 // Otherwise, the store to this stack slot is not dead anymore.
765 std::map<int, MachineInstr*>::iterator MDSI = MaybeDeadStores.find(SS);
766 if (MDSI != MaybeDeadStores.end()) {
767 if (MR & VirtRegMap::isRef) // Previous store is not dead.
768 MaybeDeadStores.erase(MDSI);
769 else {
770 // If we get here, the store is dead, nuke it now.
Chris Lattner35f27052006-05-01 21:16:03 +0000771 assert(VirtRegMap::isMod && "Can't be modref!");
Bill Wendlingb2b9c202006-11-17 02:09:07 +0000772 DOUT << "Removed dead store:\t" << *MDSI->second;
Chris Lattner35f27052006-05-01 21:16:03 +0000773 MBB.erase(MDSI->second);
Chris Lattner229924a2006-05-01 22:03:24 +0000774 VRM.RemoveFromFoldedVirtMap(MDSI->second);
Chris Lattner35f27052006-05-01 21:16:03 +0000775 MaybeDeadStores.erase(MDSI);
776 ++NumDSE;
Chris Lattnercea86882005-09-19 06:56:21 +0000777 }
778 }
779
780 // If the spill slot value is available, and this is a new definition of
781 // the value, the value is not available anymore.
782 if (MR & VirtRegMap::isMod) {
Chris Lattner07cf1412006-02-03 00:36:31 +0000783 // Notice that the value in this stack slot has been modified.
Chris Lattner66cf80f2006-02-03 23:13:58 +0000784 Spills.ModifyStackSlot(SS);
Chris Lattnercd816392006-02-02 23:29:36 +0000785
786 // If this is *just* a mod of the value, check to see if this is just a
787 // store to the spill slot (i.e. the spill got merged into the copy). If
788 // so, realize that the vreg is available now, and add the store to the
789 // MaybeDeadStore info.
790 int StackSlot;
791 if (!(MR & VirtRegMap::isRef)) {
792 if (unsigned SrcReg = TII->isStoreToStackSlot(&MI, StackSlot)) {
793 assert(MRegisterInfo::isPhysicalRegister(SrcReg) &&
794 "Src hasn't been allocated yet?");
Chris Lattner07cf1412006-02-03 00:36:31 +0000795 // Okay, this is certainly a store of SrcReg to [StackSlot]. Mark
Chris Lattnercd816392006-02-02 23:29:36 +0000796 // this as a potentially dead store in case there is a subsequent
797 // store into the stack slot without a read from it.
798 MaybeDeadStores[StackSlot] = &MI;
799
Chris Lattnercd816392006-02-02 23:29:36 +0000800 // If the stack slot value was previously available in some other
801 // register, change it now. Otherwise, make the register available,
802 // in PhysReg.
Chris Lattner593c9582006-02-03 23:28:46 +0000803 Spills.addAvailable(StackSlot, SrcReg, false /*don't clobber*/);
Chris Lattnercd816392006-02-02 23:29:36 +0000804 }
805 }
Chris Lattner7fb64342004-10-01 19:04:51 +0000806 }
Chris Lattner8c4d88d2004-09-30 01:54:45 +0000807 }
808
Chris Lattner7fb64342004-10-01 19:04:51 +0000809 // Process all of the spilled defs.
810 for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) {
811 MachineOperand &MO = MI.getOperand(i);
812 if (MO.isRegister() && MO.getReg() && MO.isDef()) {
813 unsigned VirtReg = MO.getReg();
Chris Lattner8c4d88d2004-09-30 01:54:45 +0000814
Chris Lattner7fb64342004-10-01 19:04:51 +0000815 if (!MRegisterInfo::isVirtualRegister(VirtReg)) {
Chris Lattner29268692006-09-05 02:12:02 +0000816 // Check to see if this is a noop copy. If so, eliminate the
817 // instruction before considering the dest reg to be changed.
818 unsigned Src, Dst;
819 if (TII->isMoveInstr(MI, Src, Dst) && Src == Dst) {
820 ++NumDCE;
Bill Wendlingb2b9c202006-11-17 02:09:07 +0000821 DOUT << "Removing now-noop copy: " << MI;
Chris Lattner29268692006-09-05 02:12:02 +0000822 MBB.erase(&MI);
823 VRM.RemoveFromFoldedVirtMap(&MI);
824 goto ProcessNextInst;
Chris Lattner7fb64342004-10-01 19:04:51 +0000825 }
Chris Lattner6ec36262006-10-12 17:45:38 +0000826
827 // If it's not a no-op copy, it clobbers the value in the destreg.
Chris Lattner29268692006-09-05 02:12:02 +0000828 Spills.ClobberPhysReg(VirtReg);
Evan Chenge077ef62006-11-04 00:21:55 +0000829 ReusedOperands.markClobbered(VirtReg);
Chris Lattner6ec36262006-10-12 17:45:38 +0000830
831 // Check to see if this instruction is a load from a stack slot into
832 // a register. If so, this provides the stack slot value in the reg.
833 int FrameIdx;
834 if (unsigned DestReg = TII->isLoadFromStackSlot(&MI, FrameIdx)) {
835 assert(DestReg == VirtReg && "Unknown load situation!");
836
837 // Otherwise, if it wasn't available, remember that it is now!
838 Spills.addAvailable(FrameIdx, DestReg);
839 goto ProcessNextInst;
840 }
841
Chris Lattner29268692006-09-05 02:12:02 +0000842 continue;
Misha Brukmanedf128a2005-04-21 22:36:52 +0000843 }
Chris Lattner7fb64342004-10-01 19:04:51 +0000844
Chris Lattner84e752a2006-02-03 03:06:49 +0000845 // The only vregs left are stack slot definitions.
846 int StackSlot = VRM.getStackSlot(VirtReg);
847 const TargetRegisterClass *RC =
848 MBB.getParent()->getSSARegMap()->getRegClass(VirtReg);
Chris Lattner7fb64342004-10-01 19:04:51 +0000849
Chris Lattner29268692006-09-05 02:12:02 +0000850 // If this def is part of a two-address operand, make sure to execute
851 // the store from the correct physical register.
852 unsigned PhysReg;
Evan Chenge6ae14e2006-11-01 23:18:32 +0000853 int TiedOp = TII->findTiedToSrcOperand(MI.getOpcode(), i);
Evan Cheng360c2dd2006-11-01 23:06:55 +0000854 if (TiedOp != -1)
855 PhysReg = MI.getOperand(TiedOp).getReg();
Evan Chenge077ef62006-11-04 00:21:55 +0000856 else {
Chris Lattner29268692006-09-05 02:12:02 +0000857 PhysReg = VRM.getPhys(VirtReg);
Evan Chenge077ef62006-11-04 00:21:55 +0000858 if (ReusedOperands.isClobbered(PhysReg)) {
859 // Another def has taken the assigned physreg. It must have been a
860 // use&def which got it due to reuse. Undo the reuse!
861 PhysReg = ReusedOperands.GetRegForReload(PhysReg, &MI,
862 Spills, MaybeDeadStores);
863 }
864 }
Chris Lattner7fb64342004-10-01 19:04:51 +0000865
Chris Lattner84e752a2006-02-03 03:06:49 +0000866 PhysRegsUsed[PhysReg] = true;
Evan Chenge077ef62006-11-04 00:21:55 +0000867 ReusedOperands.markClobbered(PhysReg);
Chris Lattner84e752a2006-02-03 03:06:49 +0000868 MRI->storeRegToStackSlot(MBB, next(MII), PhysReg, StackSlot, RC);
Bill Wendlingb2b9c202006-11-17 02:09:07 +0000869 DOUT << "Store:\t" << *next(MII);
Chris Lattnere53f4a02006-05-04 17:52:23 +0000870 MI.getOperand(i).setReg(PhysReg);
Chris Lattner7fb64342004-10-01 19:04:51 +0000871
Chris Lattner109afed2006-02-03 03:16:14 +0000872 // Check to see if this is a noop copy. If so, eliminate the
873 // instruction before considering the dest reg to be changed.
874 {
875 unsigned Src, Dst;
876 if (TII->isMoveInstr(MI, Src, Dst) && Src == Dst) {
877 ++NumDCE;
Bill Wendlingb2b9c202006-11-17 02:09:07 +0000878 DOUT << "Removing now-noop copy: " << MI;
Chris Lattner109afed2006-02-03 03:16:14 +0000879 MBB.erase(&MI);
Chris Lattner229924a2006-05-01 22:03:24 +0000880 VRM.RemoveFromFoldedVirtMap(&MI);
Chris Lattner109afed2006-02-03 03:16:14 +0000881 goto ProcessNextInst;
882 }
883 }
884
Chris Lattner84e752a2006-02-03 03:06:49 +0000885 // If there is a dead store to this stack slot, nuke it now.
886 MachineInstr *&LastStore = MaybeDeadStores[StackSlot];
887 if (LastStore) {
Bill Wendlingb2b9c202006-11-17 02:09:07 +0000888 DOUT << "Removed dead store:\t" << *LastStore;
Chris Lattner84e752a2006-02-03 03:06:49 +0000889 ++NumDSE;
890 MBB.erase(LastStore);
Chris Lattner229924a2006-05-01 22:03:24 +0000891 VRM.RemoveFromFoldedVirtMap(LastStore);
Chris Lattner7fb64342004-10-01 19:04:51 +0000892 }
Chris Lattner84e752a2006-02-03 03:06:49 +0000893 LastStore = next(MII);
894
895 // If the stack slot value was previously available in some other
896 // register, change it now. Otherwise, make the register available,
897 // in PhysReg.
Chris Lattner66cf80f2006-02-03 23:13:58 +0000898 Spills.ModifyStackSlot(StackSlot);
899 Spills.ClobberPhysReg(PhysReg);
Chris Lattner66cf80f2006-02-03 23:13:58 +0000900 Spills.addAvailable(StackSlot, PhysReg);
Chris Lattner84e752a2006-02-03 03:06:49 +0000901 ++NumStores;
Chris Lattner7fb64342004-10-01 19:04:51 +0000902 }
903 }
Chris Lattnercea86882005-09-19 06:56:21 +0000904 ProcessNextInst:
Chris Lattner7fb64342004-10-01 19:04:51 +0000905 MII = NextMII;
906 }
Chris Lattner8c4d88d2004-09-30 01:54:45 +0000907}
908
Chris Lattnerf7da2c72006-08-24 22:43:55 +0000909
910
Chris Lattner8c4d88d2004-09-30 01:54:45 +0000911llvm::Spiller* llvm::createSpiller() {
912 switch (SpillerOpt) {
913 default: assert(0 && "Unreachable!");
914 case local:
915 return new LocalSpiller();
916 case simple:
917 return new SimpleSpiller();
918 }
Alkis Evlogimenos0d6c5b62004-02-24 08:58:30 +0000919}