blob: f02e52d39ce551d8087a7d6cb69069b985e238c5 [file] [log] [blame]
Jim Laskey076866c2005-10-18 16:23:40 +00001//===- PPCSchedule.td - PowerPC Scheduling Definitions -----*- tablegen -*-===//
2//
3// The LLVM Compiler Infrastructure
4//
5// This file was developed by James M. Laskey and is distributed under
6// the University of Illinois Open Source License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9
Jim Laskey0de87962005-10-19 13:34:52 +000010#include "../Target.td"
Jim Laskey076866c2005-10-18 16:23:40 +000011
12//===----------------------------------------------------------------------===//
13// Functional units across PowerPC chips sets
14//
Jim Laskey076866c2005-10-18 16:23:40 +000015def BPU : FuncUnit; // Branch unit
16def SLU : FuncUnit; // Store/load unit
17def SRU : FuncUnit; // special register unit
18def IU1 : FuncUnit; // integer unit 1 (simple)
19def IU2 : FuncUnit; // integer unit 2 (complex)
20def IU3 : FuncUnit; // integer unit 3 (7450 simple)
21def IU4 : FuncUnit; // integer unit 4 (7450 simple)
22def FPU1 : FuncUnit; // floating point unit 1
23def FPU2 : FuncUnit; // floating point unit 2
24def VPU : FuncUnit; // vector permutation unit
25def VIU1 : FuncUnit; // vector integer unit 1 (simple)
26def VIU2 : FuncUnit; // vector integer unit 2 (complex)
27def VFPU : FuncUnit; // vector floating point unit
28
29
30//===----------------------------------------------------------------------===//
31// Instruction Itinerary classes used for PowerPC
32//
33def IntGeneral : InstrItinClass;
34def IntCompare : InstrItinClass;
35def IntDivD : InstrItinClass;
36def IntDivW : InstrItinClass;
37def IntMFFS : InstrItinClass;
38def IntMFVSCR : InstrItinClass;
39def IntMTFSB0 : InstrItinClass;
40def IntMTSRD : InstrItinClass;
41def IntMulHD : InstrItinClass;
42def IntMulHW : InstrItinClass;
43def IntMulHWU : InstrItinClass;
44def IntMulLI : InstrItinClass;
45def IntRFID : InstrItinClass;
46def IntRotateD : InstrItinClass;
47def IntRotate : InstrItinClass;
48def IntShift : InstrItinClass;
49def IntTrapD : InstrItinClass;
50def IntTrapW : InstrItinClass;
51def BrB : InstrItinClass;
52def BrCR : InstrItinClass;
53def BrMCR : InstrItinClass;
54def BrMCRX : InstrItinClass;
55def LdStDCBA : InstrItinClass;
56def LdStDCBF : InstrItinClass;
57def LdStDCBI : InstrItinClass;
58def LdStDCBT : InstrItinClass;
59def LdStDSS : InstrItinClass;
60def LdStICBI : InstrItinClass;
61def LdStLBZUX : InstrItinClass;
62def LdStLD : InstrItinClass;
63def LdStLDARX : InstrItinClass;
64def LdStLFD : InstrItinClass;
65def LdStLFDU : InstrItinClass;
66def LdStLHA : InstrItinClass;
67def LdStLMW : InstrItinClass;
68def LdStLVEBX : InstrItinClass;
69def LdStLWA : InstrItinClass;
70def LdStLWARX : InstrItinClass;
71def LdStSLBIA : InstrItinClass;
72def LdStSLBIE : InstrItinClass;
73def LdStSTD : InstrItinClass;
74def LdStSTDCX : InstrItinClass;
75def LdStSTVEBX : InstrItinClass;
76def LdStSTWCX : InstrItinClass;
77def LdStSync : InstrItinClass;
78def SprISYNC : InstrItinClass;
79def SprMFSR : InstrItinClass;
80def SprMTMSR : InstrItinClass;
81def SprMTSR : InstrItinClass;
82def SprTLBSYNC : InstrItinClass;
83def SprMFCR : InstrItinClass;
84def SprMFMSR : InstrItinClass;
85def SprMFSPR : InstrItinClass;
86def SprMFTB : InstrItinClass;
87def SprMTSPR : InstrItinClass;
88def SprMTSRIN : InstrItinClass;
89def SprRFI : InstrItinClass;
90def SprSC : InstrItinClass;
91def FPGeneral : InstrItinClass;
92def FPCompare : InstrItinClass;
93def FPDivD : InstrItinClass;
94def FPDivS : InstrItinClass;
95def FPFused : InstrItinClass;
96def FPRes : InstrItinClass;
97def FPSqrt : InstrItinClass;
98def VecGeneral : InstrItinClass;
99def VecFP : InstrItinClass;
100def VecFPCompare : InstrItinClass;
101def VecComplex : InstrItinClass;
102def VecPerm : InstrItinClass;
103def VecFPRound : InstrItinClass;
104def VecVSL : InstrItinClass;
105def VecVSR : InstrItinClass;
106
107//===----------------------------------------------------------------------===//
108// Processor instruction itineraries.
109
110#include "PPCScheduleG3.td"
111#include "PPCScheduleG4.td"
112#include "PPCScheduleG4Plus.td"
113#include "PPCScheduleG5.td"
114
115//===----------------------------------------------------------------------===//
116// Instruction to itinerary class map - When add new opcodes to the supported
117// set, refer to the following table to determine which itinerary class the
118// opcode belongs.
119//
120// opcode itinerary class
121// ====== ===============
122// add IntGeneral
123// addc IntGeneral
124// adde IntGeneral
125// addi IntGeneral
126// addic IntGeneral
127// addic. IntGeneral
128// addis IntGeneral
129// addme IntGeneral
130// addze IntGeneral
131// and IntGeneral
132// andc IntGeneral
133// andi. IntGeneral
134// andis. IntGeneral
135// b BrB
136// bc BrB
137// bcctr BrB
138// bclr BrB
139// cmp IntCompare
140// cmpi IntCompare
141// cmpl IntCompare
142// cmpli IntCompare
143// cntlzd IntRotateD
144// cntlzw IntGeneral
145// crand BrCR
146// crandc BrCR
147// creqv BrCR
148// crnand BrCR
149// crnor BrCR
150// cror BrCR
151// crorc BrCR
152// crxor BrCR
153// dcba LdStDCBA
154// dcbf LdStDCBF
155// dcbi LdStDCBI
156// dcbst LdStDCBF
157// dcbt LdStDCBT
158// dcbtst LdStDCBT
159// dcbz LdStDCBF
160// divd IntDivD
161// divdu IntDivD
162// divw IntDivW
163// divwu IntDivW
164// dss LdStDSS
165// dst LdStDSS
166// dstst LdStDSS
167// eciwx LdStDCBT
168// ecowx LdStDCBT
169// eieio LdStDCBT
170// eqv IntGeneral
171// extsb IntGeneral
172// extsh IntGeneral
173// extsw IntRotateD
174// fabs FPGeneral
175// fadd FPGeneral
176// fadds FPGeneral
177// fcfid FPGeneral
178// fcmpo FPCompare
179// fcmpu FPCompare
180// fctid FPGeneral
181// fctidz FPGeneral
182// fctiw FPGeneral
183// fctiwz FPGeneral
184// fdiv FPDivD
185// fdivs FPDivS
186// fmadd FPFused
187// fmadds FPGeneral
188// fmr FPGeneral
189// fmsub FPFused
190// fmsubs FPGeneral
191// fmul FPFused
192// fmuls FPGeneral
193// fnabs FPGeneral
194// fneg FPGeneral
195// fnmadd FPFused
196// fnmadds FPGeneral
197// fnmsub FPFused
198// fnmsubs FPGeneral
199// fres FPRes
200// frsp FPGeneral
201// frsqrte FPGeneral
202// fsel FPGeneral
203// fsqrt FPSqrt
204// fsqrts FPSqrt
205// fsub FPGeneral
206// fsubs FPGeneral
207// icbi LdStICBI
208// isync SprISYNC
209// lbz LdStDCBT
210// lbzu LdStDCBT
211// lbzux LdStLBZUX
212// lbzx LdStDCBT
213// ld LdStLD
214// ldarx LdStLDARX
215// ldu LdStLD
216// ldux LdStLD
217// ldx LdStLD
218// lfd LdStLFD
219// lfdu LdStLFDU
220// lfdux LdStLFDU
221// lfdx LdStLFDU
222// lfs LdStLFDU
223// lfsu LdStLFDU
224// lfsux LdStLFDU
225// lfsx LdStLFDU
226// lha LdStLHA
227// lhau LdStLHA
228// lhaux LdStLHA
229// lhax LdStLHA
230// lhbrx LdStDCBT
231// lhz LdStDCBT
232// lhzu LdStDCBT
233// lhzux LdStLBZUX
234// lhzx LdStDCBT
235// lmw LdStLMW
236// lswi LdStLMW
237// lswx LdStLMW
238// lvebx LdStLVEBX
239// lvehx LdStLVEBX
240// lvewx LdStLVEBX
241// lvsl LdStLVEBX
242// lvsr LdStLVEBX
243// lvx LdStLVEBX
244// lvxl LdStLVEBX
245// lwa LdStLWA
246// lwarx LdStLWARX
247// lwaux LdStLHA
248// lwax LdStLHA
249// lwbrx LdStDCBT
250// lwz LdStDCBT
251// lwzu LdStDCBT
252// lwzux LdStLBZUX
253// lwzx LdStDCBT
254// mcrf BrMCR
255// mcrfs FPGeneral
256// mcrxr BrMCRX
257// mfcr SprMFCR
258// mffs IntMFFS
259// mfmsr SprMFMSR
260// mfspr SprMFSPR
261// mfsr SprMFSR
262// mfsrin SprMFSR
263// mftb SprMFTB
264// mfvscr IntMFVSCR
265// mtcrf BrMCRX
266// mtfsb0 IntMTFSB0
267// mtfsb1 IntMTFSB0
268// mtfsf IntMTFSB0
269// mtfsfi IntMTFSB0
270// mtmsr SprMTMSR
271// mtmsrd LdStLD
272// mtspr SprMTSPR
273// mtsr SprMTSR
274// mtsrd IntMTSRD
275// mtsrdin IntMTSRD
276// mtsrin SprMTSRIN
277// mtvscr IntMFVSCR
278// mulhd IntMulHD
279// mulhdu IntMulHD
280// mulhw IntMulHW
281// mulhwu IntMulHWU
282// mulld IntMulHD
283// mulli IntMulLI
284// mullw IntMulHW
285// nand IntGeneral
286// neg IntGeneral
287// nor IntGeneral
288// or IntGeneral
289// orc IntGeneral
290// ori IntGeneral
291// oris IntGeneral
292// rfi SprRFI
293// rfid IntRFID
294// rldcl IntRotateD
295// rldcr IntRotateD
296// rldic IntRotateD
297// rldicl IntRotateD
298// rldicr IntRotateD
299// rldimi IntRotateD
300// rlwimi IntRotate
301// rlwinm IntGeneral
302// rlwnm IntGeneral
303// sc SprSC
304// slbia LdStSLBIA
305// slbie LdStSLBIE
306// sld IntRotateD
307// slw IntGeneral
308// srad IntRotateD
309// sradi IntRotateD
310// sraw IntShift
311// srawi IntShift
312// srd IntRotateD
313// srw IntGeneral
314// stb LdStDCBT
315// stbu LdStDCBT
316// stbux LdStDCBT
317// stbx LdStDCBT
318// std LdStSTD
319// stdcx. LdStSTDCX
320// stdu LdStSTD
321// stdux LdStSTD
322// stdx LdStSTD
323// stfd LdStLBZUX
324// stfdu LdStLBZUX
325// stfdux LdStLBZUX
326// stfdx LdStLBZUX
327// stfiwx LdStLBZUX
328// stfs LdStLBZUX
329// stfsu LdStLBZUX
330// stfsux LdStLBZUX
331// stfsx LdStLBZUX
332// sth LdStDCBT
333// sthbrx LdStDCBT
334// sthu LdStDCBT
335// sthux LdStDCBT
336// sthx LdStDCBT
337// stmw LdStLMW
338// stswi LdStLMW
339// stswx LdStLMW
340// stvebx LdStSTVEBX
341// stvehx LdStSTVEBX
342// stvewx LdStSTVEBX
343// stvx LdStSTVEBX
344// stvxl LdStSTVEBX
345// stw LdStDCBT
346// stwbrx LdStDCBT
347// stwcx. LdStSTWCX
348// stwu LdStDCBT
349// stwux LdStDCBT
350// stwx LdStDCBT
351// subf IntGeneral
352// subfc IntGeneral
353// subfe IntGeneral
354// subfic IntGeneral
355// subfme IntGeneral
356// subfze IntGeneral
357// sync LdStSync
358// td IntTrapD
359// tdi IntTrapD
360// tlbia LdStSLBIA
361// tlbie LdStDCBF
362// tlbsync SprTLBSYNC
363// tw IntTrapW
364// twi IntTrapW
365// vaddcuw VecGeneral
366// vaddfp VecFP
367// vaddsbs VecGeneral
368// vaddshs VecGeneral
369// vaddsws VecGeneral
370// vaddubm VecGeneral
371// vaddubs VecGeneral
372// vadduhm VecGeneral
373// vadduhs VecGeneral
374// vadduwm VecGeneral
375// vadduws VecGeneral
376// vand VecGeneral
377// vandc VecGeneral
378// vavgsb VecGeneral
379// vavgsh VecGeneral
380// vavgsw VecGeneral
381// vavgub VecGeneral
382// vavguh VecGeneral
383// vavguw VecGeneral
384// vcfsx VecFP
385// vcfux VecFP
386// vcmpbfp VecFPCompare
387// vcmpeqfp VecFPCompare
388// vcmpequb VecGeneral
389// vcmpequh VecGeneral
390// vcmpequw VecGeneral
391// vcmpgefp VecFPCompare
392// vcmpgtfp VecFPCompare
393// vcmpgtsb VecGeneral
394// vcmpgtsh VecGeneral
395// vcmpgtsw VecGeneral
396// vcmpgtub VecGeneral
397// vcmpgtuh VecGeneral
398// vcmpgtuw VecGeneral
399// vctsxs VecFP
400// vctuxs VecFP
401// vexptefp VecFP
402// vlogefp VecFP
403// vmaddfp VecFP
404// vmaxfp VecFPCompare
405// vmaxsb VecGeneral
406// vmaxsh VecGeneral
407// vmaxsw VecGeneral
408// vmaxub VecGeneral
409// vmaxuh VecGeneral
410// vmaxuw VecGeneral
411// vmhaddshs VecComplex
412// vmhraddshs VecComplex
413// vminfp VecFPCompare
414// vminsb VecGeneral
415// vminsh VecGeneral
416// vminsw VecGeneral
417// vminub VecGeneral
418// vminuh VecGeneral
419// vminuw VecGeneral
420// vmladduhm VecComplex
421// vmrghb VecPerm
422// vmrghh VecPerm
423// vmrghw VecPerm
424// vmrglb VecPerm
425// vmrglh VecPerm
426// vmrglw VecPerm
427// vmsubfp VecFP
428// vmsummbm VecComplex
429// vmsumshm VecComplex
430// vmsumshs VecComplex
431// vmsumubm VecComplex
432// vmsumuhm VecComplex
433// vmsumuhs VecComplex
434// vmulesb VecComplex
435// vmulesh VecComplex
436// vmuleub VecComplex
437// vmuleuh VecComplex
438// vmulosb VecComplex
439// vmulosh VecComplex
440// vmuloub VecComplex
441// vmulouh VecComplex
442// vnor VecGeneral
443// vor VecGeneral
444// vperm VecPerm
445// vpkpx VecPerm
446// vpkshss VecPerm
447// vpkshus VecPerm
448// vpkswss VecPerm
449// vpkswus VecPerm
450// vpkuhum VecPerm
451// vpkuhus VecPerm
452// vpkuwum VecPerm
453// vpkuwus VecPerm
454// vrefp VecFPRound
455// vrfim VecFPRound
456// vrfin VecFPRound
457// vrfip VecFPRound
458// vrfiz VecFPRound
459// vrlb VecGeneral
460// vrlh VecGeneral
461// vrlw VecGeneral
462// vrsqrtefp VecFP
463// vsel VecGeneral
464// vsl VecVSL
465// vslb VecGeneral
466// vsldoi VecPerm
467// vslh VecGeneral
468// vslo VecPerm
469// vslw VecGeneral
470// vspltb VecPerm
471// vsplth VecPerm
472// vspltisb VecPerm
473// vspltish VecPerm
474// vspltisw VecPerm
475// vspltw VecPerm
476// vsr VecVSR
477// vsrab VecGeneral
478// vsrah VecGeneral
479// vsraw VecGeneral
480// vsrb VecGeneral
481// vsrh VecGeneral
482// vsro VecPerm
483// vsrw VecGeneral
484// vsubcuw VecGeneral
485// vsubfp VecFP
486// vsubsbs VecGeneral
487// vsubshs VecGeneral
488// vsubsws VecGeneral
489// vsububm VecGeneral
490// vsububs VecGeneral
491// vsubuhm VecGeneral
492// vsubuhs VecGeneral
493// vsubuwm VecGeneral
494// vsubuws VecGeneral
495// vsum2sws VecComplex
496// vsum4sbs VecComplex
497// vsum4shs VecComplex
498// vsum4ubs VecComplex
499// vsumsws VecComplex
500// vupkhpx VecPerm
501// vupkhsb VecPerm
502// vupkhsh VecPerm
503// vupklpx VecPerm
504// vupklsb VecPerm
505// vupklsh VecPerm
506// vxor VecGeneral
507// xor IntGeneral
508// xori IntGeneral
509// xoris IntGeneral
510//
511
Jim Laskey0de87962005-10-19 13:34:52 +0000512
513//===----------------------------------------------------------------------===//
514// PowerPC Subtarget features.
515//
516
517def F64Bit : SubtargetFeature<"64bit",
518 "Should 64 bit instructions be used">;
519def F64BitRegs : SubtargetFeature<"64bitregs",
520 "Should 64 bit registers be used">;
521def FAltivec : SubtargetFeature<"altivec",
522 "Should Altivec instructions be used">;
523def FGPUL : SubtargetFeature<"gpul",
524 "Should GPUL instructions be used">;
525def FFSQRT : SubtargetFeature<"fsqrt",
526 "Should the fsqrt instruction be used">;
527
528//===----------------------------------------------------------------------===//
529// PowerPC chips sets supported
530//
531
532def : Processor<"601", G3Itineraries, []>;
533def : Processor<"602", G3Itineraries, []>;
534def : Processor<"603", G3Itineraries, []>;
535def : Processor<"604", G3Itineraries, []>;
536def : Processor<"750", G3Itineraries, []>;
537def : Processor<"7400", G4Itineraries, [FAltivec]>;
538def : Processor<"g4", G4Itineraries, [FAltivec]>;
539def : Processor<"7450", G4PlusItineraries, [FAltivec]>;
540def : Processor<"g4+", G4PlusItineraries, [FAltivec]>;
541def : Processor<"970", G5Itineraries,
542 [FAltivec, FGPUL, FFSQRT, F64Bit, F64BitRegs]>;
543def : Processor<"g5", G5Itineraries,
544 [FAltivec, FGPUL, FFSQRT, F64Bit, F64BitRegs]>;
545
546