Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 1 | //===- PowerPCInstrInfo.td - Describe the PowerPC Instruction Set -*- C++ -*-=// |
| 2 | // |
| 3 | // The LLVM Compiler Infrastructure |
| 4 | // |
| 5 | // This file was developed by the LLVM research group and is distributed under |
| 6 | // the University of Illinois Open Source License. See LICENSE.TXT for details. |
| 7 | // |
| 8 | //===----------------------------------------------------------------------===// |
| 9 | // |
| 10 | // |
| 11 | //===----------------------------------------------------------------------===// |
| 12 | |
| 13 | class Format<bits<5> val> { |
| 14 | bits<5> Value = val; |
| 15 | } |
| 16 | |
| 17 | class PPC32Inst : Instruction { |
| 18 | field bits<32> Inst; |
| 19 | bits<3> ArgCount; |
| 20 | bits<5> Arg0Type; |
| 21 | bits<5> Arg1Type; |
| 22 | bits<5> Arg2Type; |
| 23 | bits<5> Arg3Type; |
| 24 | bits<5> Arg4Type; |
| 25 | bit PPC64; |
| 26 | bit VMX; |
| 27 | |
| 28 | let Namespace = "PPC32"; |
| 29 | } |
| 30 | |
| 31 | def Pseudo: Format<0>; |
| 32 | def Gpr : Format<1>; |
| 33 | def Gpr0 : Format<2>; |
| 34 | def Simm16 : Format<3>; |
| 35 | def Zimm16 : Format<4>; |
| 36 | def PCRelimm24 : Format<5>; |
| 37 | def Imm24 : Format<6>; |
| 38 | def Imm5 : Format<7>; |
| 39 | def PCRelimm14 : Format<8>; |
| 40 | def Imm14 : Format<9>; |
| 41 | def Imm2 : Format<10>; |
| 42 | def Crf : Format<11>; |
| 43 | def Imm3 : Format<12>; |
| 44 | def Imm1 : Format<13>; |
| 45 | def Fpr : Format<14>; |
| 46 | def Imm4 : Format<15>; |
| 47 | def Imm8 : Format<16>; |
| 48 | def Disimm16 : Format<17>; |
| 49 | def Disimm14 : Format<18>; |
| 50 | def Spr : Format<19>; |
| 51 | def Sgr : Format<20>; |
| 52 | def Imm15 : Format<21>; |
| 53 | def Vpr : Format<22>; |
| 54 | |
| 55 | class PPC32InstPattern0 <string name, Format OperandType0, Format OperandType1, Format OperandType2, bits<6> opconstant0, bit ppc64, bit vmx> : PPC32Inst { |
| 56 | let Name = name; |
| 57 | let ArgCount = 3; |
| 58 | let PPC64 = ppc64; |
| 59 | let VMX =vmx; |
| 60 | |
| 61 | let Arg0Type = OperandType0.Value; |
| 62 | let Arg1Type = OperandType1.Value; |
| 63 | let Arg2Type = OperandType2.Value; |
| 64 | let Arg3Type = 0; |
| 65 | let Arg4Type = 0; |
| 66 | let PPC64 = 0; |
| 67 | let VMX = 0; |
| 68 | bits<5> operand0; |
| 69 | bits<5> operand1; |
| 70 | bits<16> operand2; |
| 71 | |
| 72 | |
| 73 | let Inst {31-26} = opconstant0; |
| 74 | let Inst {25-21} = operand0; |
| 75 | let Inst {20-16} = operand1; |
| 76 | let Inst {15-0} = operand2; |
| 77 | } |
| 78 | |
| 79 | class PPC32InstPattern1 <string name, Format OperandType0, Format OperandType1, bits<6> opconstant0, bits<5> opconstant1, bit ppc64, bit vmx> : PPC32Inst { |
| 80 | let Name = name; |
| 81 | let ArgCount = 2; |
| 82 | let PPC64 = ppc64; |
| 83 | let VMX =vmx; |
| 84 | |
| 85 | let Arg0Type = OperandType0.Value; |
| 86 | let Arg1Type = OperandType1.Value; |
| 87 | let Arg2Type = 0; |
| 88 | let Arg3Type = 0; |
| 89 | let Arg4Type = 0; |
| 90 | let PPC64 = 0; |
| 91 | let VMX = 0; |
| 92 | bits<5> operand0; |
| 93 | bits<16> operand1; |
| 94 | |
| 95 | |
| 96 | let Inst {31-26} = opconstant0; |
| 97 | let Inst {20-16} = opconstant1; |
| 98 | let Inst {25-21} = operand0; |
| 99 | let Inst {15-0} = operand1; |
| 100 | } |
| 101 | |
| 102 | class PPC32InstPattern2 <string name, Format OperandType0, Format OperandType1, Format OperandType2, bits<6> opconstant0, bits<11> opconstant1, bit ppc64, bit vmx> : PPC32Inst { |
| 103 | let Name = name; |
| 104 | let ArgCount = 3; |
| 105 | let PPC64 = ppc64; |
| 106 | let VMX =vmx; |
| 107 | |
| 108 | let Arg0Type = OperandType0.Value; |
| 109 | let Arg1Type = OperandType1.Value; |
| 110 | let Arg2Type = OperandType2.Value; |
| 111 | let Arg3Type = 0; |
| 112 | let Arg4Type = 0; |
| 113 | let PPC64 = 0; |
| 114 | let VMX = 0; |
| 115 | bits<5> operand0; |
| 116 | bits<5> operand1; |
| 117 | bits<5> operand2; |
| 118 | |
| 119 | |
| 120 | let Inst {31-26} = opconstant0; |
| 121 | let Inst {10-0} = opconstant1; |
| 122 | let Inst {25-21} = operand0; |
| 123 | let Inst {20-16} = operand1; |
| 124 | let Inst {15-11} = operand2; |
| 125 | } |
| 126 | |
| 127 | class PPC32InstPattern3 <string name, Format OperandType0, Format OperandType1, bits<6> opconstant0, bits<16> opconstant1, bit ppc64, bit vmx> : PPC32Inst { |
| 128 | let Name = name; |
| 129 | let ArgCount = 2; |
| 130 | let PPC64 = ppc64; |
| 131 | let VMX =vmx; |
| 132 | |
| 133 | let Arg0Type = OperandType0.Value; |
| 134 | let Arg1Type = OperandType1.Value; |
| 135 | let Arg2Type = 0; |
| 136 | let Arg3Type = 0; |
| 137 | let Arg4Type = 0; |
| 138 | let PPC64 = 0; |
| 139 | let VMX = 0; |
| 140 | bits<5> operand0; |
| 141 | bits<5> operand1; |
| 142 | |
| 143 | |
| 144 | let Inst {31-26} = opconstant0; |
| 145 | let Inst {15-0} = opconstant1; |
| 146 | let Inst {25-21} = operand0; |
| 147 | let Inst {20-16} = operand1; |
| 148 | } |
| 149 | |
| 150 | class PPC32InstPattern4 <string name, Format OperandType0, Format OperandType1, Format OperandType2, bits<6> opconstant0, bit ppc64, bit vmx> : PPC32Inst { |
| 151 | let Name = name; |
| 152 | let ArgCount = 3; |
| 153 | let PPC64 = ppc64; |
| 154 | let VMX =vmx; |
| 155 | |
| 156 | let Arg0Type = OperandType0.Value; |
| 157 | let Arg1Type = OperandType1.Value; |
| 158 | let Arg2Type = OperandType2.Value; |
| 159 | let Arg3Type = 0; |
| 160 | let Arg4Type = 0; |
| 161 | let PPC64 = 0; |
| 162 | let VMX = 0; |
| 163 | bits<5> operand0; |
| 164 | bits<5> operand1; |
| 165 | bits<16> operand2; |
| 166 | |
| 167 | |
| 168 | let Inst {31-26} = opconstant0; |
| 169 | let Inst {20-16} = operand0; |
| 170 | let Inst {25-21} = operand1; |
| 171 | let Inst {15-0} = operand2; |
| 172 | } |
| 173 | |
| 174 | class PPC32InstPattern5 <string name, Format OperandType0, Format OperandType1, Format OperandType2, bits<6> opconstant0, bits<11> opconstant1, bit ppc64, bit vmx> : PPC32Inst { |
| 175 | let Name = name; |
| 176 | let ArgCount = 3; |
| 177 | let PPC64 = ppc64; |
| 178 | let VMX =vmx; |
| 179 | |
| 180 | let Arg0Type = OperandType0.Value; |
| 181 | let Arg1Type = OperandType1.Value; |
| 182 | let Arg2Type = OperandType2.Value; |
| 183 | let Arg3Type = 0; |
| 184 | let Arg4Type = 0; |
| 185 | let PPC64 = 0; |
| 186 | let VMX = 0; |
| 187 | bits<5> operand0; |
| 188 | bits<5> operand1; |
| 189 | bits<5> operand2; |
| 190 | |
| 191 | |
| 192 | let Inst {31-26} = opconstant0; |
| 193 | let Inst {10-0} = opconstant1; |
| 194 | let Inst {20-16} = operand0; |
| 195 | let Inst {25-21} = operand1; |
| 196 | let Inst {15-11} = operand2; |
| 197 | } |
| 198 | |
| 199 | class PPC32InstPattern6 <string name, Format OperandType0, bits<6> opconstant0, bits<2> opconstant1, bit ppc64, bit vmx> : PPC32Inst { |
| 200 | let Name = name; |
| 201 | let ArgCount = 1; |
| 202 | let PPC64 = ppc64; |
| 203 | let VMX =vmx; |
| 204 | |
| 205 | let Arg0Type = OperandType0.Value; |
| 206 | let Arg1Type = 0; |
| 207 | let Arg2Type = 0; |
| 208 | let Arg3Type = 0; |
| 209 | let Arg4Type = 0; |
| 210 | let PPC64 = 0; |
| 211 | let VMX = 0; |
| 212 | bits<24> operand0; |
| 213 | |
| 214 | |
| 215 | let Inst {31-26} = opconstant0; |
| 216 | let Inst {1-0} = opconstant1; |
| 217 | let Inst {25-2} = operand0; |
| 218 | } |
| 219 | |
| 220 | class PPC32InstPattern7 <string name, Format OperandType0, Format OperandType1, Format OperandType2, bits<6> opconstant0, bits<2> opconstant1, bit ppc64, bit vmx> : PPC32Inst { |
| 221 | let Name = name; |
| 222 | let ArgCount = 3; |
| 223 | let PPC64 = ppc64; |
| 224 | let VMX =vmx; |
| 225 | |
| 226 | let Arg0Type = OperandType0.Value; |
| 227 | let Arg1Type = OperandType1.Value; |
| 228 | let Arg2Type = OperandType2.Value; |
| 229 | let Arg3Type = 0; |
| 230 | let Arg4Type = 0; |
| 231 | let PPC64 = 0; |
| 232 | let VMX = 0; |
| 233 | bits<5> operand0; |
| 234 | bits<5> operand1; |
| 235 | bits<14> operand2; |
| 236 | |
| 237 | |
| 238 | let Inst {31-26} = opconstant0; |
| 239 | let Inst {1-0} = opconstant1; |
| 240 | let Inst {25-21} = operand0; |
| 241 | let Inst {20-16} = operand1; |
| 242 | let Inst {15-2} = operand2; |
| 243 | } |
| 244 | |
| 245 | class PPC32InstPattern8 <string name, Format OperandType0, Format OperandType1, Format OperandType2, bits<6> opconstant0, bits<3> opconstant1, bits<11> opconstant2, bit ppc64, bit vmx> : PPC32Inst { |
| 246 | let Name = name; |
| 247 | let ArgCount = 3; |
| 248 | let PPC64 = ppc64; |
| 249 | let VMX =vmx; |
| 250 | |
| 251 | let Arg0Type = OperandType0.Value; |
| 252 | let Arg1Type = OperandType1.Value; |
| 253 | let Arg2Type = OperandType2.Value; |
| 254 | let Arg3Type = 0; |
| 255 | let Arg4Type = 0; |
| 256 | let PPC64 = 0; |
| 257 | let VMX = 0; |
| 258 | bits<5> operand0; |
| 259 | bits<5> operand1; |
| 260 | bits<2> operand2; |
| 261 | |
| 262 | |
| 263 | let Inst {31-26} = opconstant0; |
| 264 | let Inst {15-13} = opconstant1; |
| 265 | let Inst {10-0} = opconstant2; |
| 266 | let Inst {25-21} = operand0; |
| 267 | let Inst {20-16} = operand1; |
| 268 | let Inst {12-11} = operand2; |
| 269 | } |
| 270 | |
| 271 | class PPC32InstPattern9 <string name, Format OperandType0, Format OperandType1, bits<11> opconstant0, bits<2> opconstant1, bit ppc64, bit vmx> : PPC32Inst { |
| 272 | let Name = name; |
| 273 | let ArgCount = 2; |
| 274 | let PPC64 = ppc64; |
| 275 | let VMX =vmx; |
| 276 | |
| 277 | let Arg0Type = OperandType0.Value; |
| 278 | let Arg1Type = OperandType1.Value; |
| 279 | let Arg2Type = 0; |
| 280 | let Arg3Type = 0; |
| 281 | let Arg4Type = 0; |
| 282 | let PPC64 = 0; |
| 283 | let VMX = 0; |
| 284 | bits<5> operand0; |
| 285 | bits<14> operand1; |
| 286 | |
| 287 | |
| 288 | let Inst {31-21} = opconstant0; |
| 289 | let Inst {1-0} = opconstant1; |
| 290 | let Inst {20-16} = operand0; |
| 291 | let Inst {15-2} = operand1; |
| 292 | } |
| 293 | |
| 294 | class PPC32InstPattern10 <string name, Format OperandType0, bits<16> opconstant0, bits<2> opconstant1, bit ppc64, bit vmx> : PPC32Inst { |
| 295 | let Name = name; |
| 296 | let ArgCount = 1; |
| 297 | let PPC64 = ppc64; |
| 298 | let VMX =vmx; |
| 299 | |
| 300 | let Arg0Type = OperandType0.Value; |
| 301 | let Arg1Type = 0; |
| 302 | let Arg2Type = 0; |
| 303 | let Arg3Type = 0; |
| 304 | let Arg4Type = 0; |
| 305 | let PPC64 = 0; |
| 306 | let VMX = 0; |
| 307 | bits<14> operand0; |
| 308 | |
| 309 | |
| 310 | let Inst {31-16} = opconstant0; |
| 311 | let Inst {1-0} = opconstant1; |
| 312 | let Inst {15-2} = operand0; |
| 313 | } |
| 314 | |
| 315 | class PPC32InstPattern11 <string name, Format OperandType0, bits<19> opconstant0, bits<11> opconstant1, bit ppc64, bit vmx> : PPC32Inst { |
| 316 | let Name = name; |
| 317 | let ArgCount = 1; |
| 318 | let PPC64 = ppc64; |
| 319 | let VMX =vmx; |
| 320 | |
| 321 | let Arg0Type = OperandType0.Value; |
| 322 | let Arg1Type = 0; |
| 323 | let Arg2Type = 0; |
| 324 | let Arg3Type = 0; |
| 325 | let Arg4Type = 0; |
| 326 | let PPC64 = 0; |
| 327 | let VMX = 0; |
| 328 | bits<2> operand0; |
| 329 | |
| 330 | |
| 331 | let Inst {31-13} = opconstant0; |
| 332 | let Inst {10-0} = opconstant1; |
| 333 | let Inst {12-11} = operand0; |
| 334 | } |
| 335 | |
| 336 | class PPC32InstPattern12 <string name, Format OperandType0, Format OperandType1, bits<11> opconstant0, bits<3> opconstant1, bits<11> opconstant2, bit ppc64, bit vmx> : PPC32Inst { |
| 337 | let Name = name; |
| 338 | let ArgCount = 2; |
| 339 | let PPC64 = ppc64; |
| 340 | let VMX =vmx; |
| 341 | |
| 342 | let Arg0Type = OperandType0.Value; |
| 343 | let Arg1Type = OperandType1.Value; |
| 344 | let Arg2Type = 0; |
| 345 | let Arg3Type = 0; |
| 346 | let Arg4Type = 0; |
| 347 | let PPC64 = 0; |
| 348 | let VMX = 0; |
| 349 | bits<5> operand0; |
| 350 | bits<2> operand1; |
| 351 | |
| 352 | |
| 353 | let Inst {31-21} = opconstant0; |
| 354 | let Inst {15-13} = opconstant1; |
| 355 | let Inst {10-0} = opconstant2; |
| 356 | let Inst {20-16} = operand0; |
| 357 | let Inst {12-11} = operand1; |
| 358 | } |
| 359 | |
| 360 | class PPC32InstPattern13 <string name, Format OperandType0, Format OperandType1, Format OperandType2, Format OperandType3, bits<6> opconstant0, bits<1> opconstant1, bit ppc64, bit vmx> : PPC32Inst { |
| 361 | let Name = name; |
| 362 | let ArgCount = 4; |
| 363 | let PPC64 = ppc64; |
| 364 | let VMX =vmx; |
| 365 | |
| 366 | let Arg0Type = OperandType0.Value; |
| 367 | let Arg1Type = OperandType1.Value; |
| 368 | let Arg2Type = OperandType2.Value; |
| 369 | let Arg3Type = OperandType3.Value; |
| 370 | let Arg4Type = 0; |
| 371 | let PPC64 = 0; |
| 372 | let VMX = 0; |
| 373 | bits<3> operand0; |
| 374 | bits<1> operand1; |
| 375 | bits<5> operand2; |
| 376 | bits<16> operand3; |
| 377 | |
| 378 | |
| 379 | let Inst {31-26} = opconstant0; |
| 380 | let Inst {22} = opconstant1; |
| 381 | let Inst {25-23} = operand0; |
| 382 | let Inst {21} = operand1; |
| 383 | let Inst {20-16} = operand2; |
| 384 | let Inst {15-0} = operand3; |
| 385 | } |
| 386 | |
| 387 | class PPC32InstPattern14 <string name, Format OperandType0, Format OperandType1, Format OperandType2, bits<6> opconstant0, bits<2> opconstant1, bit ppc64, bit vmx> : PPC32Inst { |
| 388 | let Name = name; |
| 389 | let ArgCount = 3; |
| 390 | let PPC64 = ppc64; |
| 391 | let VMX =vmx; |
| 392 | |
| 393 | let Arg0Type = OperandType0.Value; |
| 394 | let Arg1Type = OperandType1.Value; |
| 395 | let Arg2Type = OperandType2.Value; |
| 396 | let Arg3Type = 0; |
| 397 | let Arg4Type = 0; |
| 398 | let PPC64 = 0; |
| 399 | let VMX = 0; |
| 400 | bits<3> operand0; |
| 401 | bits<5> operand1; |
| 402 | bits<16> operand2; |
| 403 | |
| 404 | |
| 405 | let Inst {31-26} = opconstant0; |
| 406 | let Inst {22-21} = opconstant1; |
| 407 | let Inst {25-23} = operand0; |
| 408 | let Inst {20-16} = operand1; |
| 409 | let Inst {15-0} = operand2; |
| 410 | } |
| 411 | |
| 412 | class PPC32InstPattern15 <string name, Format OperandType0, Format OperandType1, Format OperandType2, Format OperandType3, bits<6> opconstant0, bits<1> opconstant1, bits<11> opconstant2, bit ppc64, bit vmx> : PPC32Inst { |
| 413 | let Name = name; |
| 414 | let ArgCount = 4; |
| 415 | let PPC64 = ppc64; |
| 416 | let VMX =vmx; |
| 417 | |
| 418 | let Arg0Type = OperandType0.Value; |
| 419 | let Arg1Type = OperandType1.Value; |
| 420 | let Arg2Type = OperandType2.Value; |
| 421 | let Arg3Type = OperandType3.Value; |
| 422 | let Arg4Type = 0; |
| 423 | let PPC64 = 0; |
| 424 | let VMX = 0; |
| 425 | bits<3> operand0; |
| 426 | bits<1> operand1; |
| 427 | bits<5> operand2; |
| 428 | bits<5> operand3; |
| 429 | |
| 430 | |
| 431 | let Inst {31-26} = opconstant0; |
| 432 | let Inst {22} = opconstant1; |
| 433 | let Inst {10-0} = opconstant2; |
| 434 | let Inst {25-23} = operand0; |
| 435 | let Inst {21} = operand1; |
| 436 | let Inst {20-16} = operand2; |
| 437 | let Inst {15-11} = operand3; |
| 438 | } |
| 439 | |
| 440 | class PPC32InstPattern16 <string name, Format OperandType0, Format OperandType1, Format OperandType2, bits<6> opconstant0, bits<2> opconstant1, bits<11> opconstant2, bit ppc64, bit vmx> : PPC32Inst { |
| 441 | let Name = name; |
| 442 | let ArgCount = 3; |
| 443 | let PPC64 = ppc64; |
| 444 | let VMX =vmx; |
| 445 | |
| 446 | let Arg0Type = OperandType0.Value; |
| 447 | let Arg1Type = OperandType1.Value; |
| 448 | let Arg2Type = OperandType2.Value; |
| 449 | let Arg3Type = 0; |
| 450 | let Arg4Type = 0; |
| 451 | let PPC64 = 0; |
| 452 | let VMX = 0; |
| 453 | bits<3> operand0; |
| 454 | bits<5> operand1; |
| 455 | bits<5> operand2; |
| 456 | |
| 457 | |
| 458 | let Inst {31-26} = opconstant0; |
| 459 | let Inst {22-21} = opconstant1; |
| 460 | let Inst {10-0} = opconstant2; |
| 461 | let Inst {25-23} = operand0; |
| 462 | let Inst {20-16} = operand1; |
| 463 | let Inst {15-11} = operand2; |
| 464 | } |
| 465 | |
| 466 | class PPC32InstPattern17 <string name, Format OperandType0, Format OperandType1, bits<6> opconstant0, bits<16> opconstant1, bit ppc64, bit vmx> : PPC32Inst { |
| 467 | let Name = name; |
| 468 | let ArgCount = 2; |
| 469 | let PPC64 = ppc64; |
| 470 | let VMX =vmx; |
| 471 | |
| 472 | let Arg0Type = OperandType0.Value; |
| 473 | let Arg1Type = OperandType1.Value; |
| 474 | let Arg2Type = 0; |
| 475 | let Arg3Type = 0; |
| 476 | let Arg4Type = 0; |
| 477 | let PPC64 = 0; |
| 478 | let VMX = 0; |
| 479 | bits<5> operand0; |
| 480 | bits<5> operand1; |
| 481 | |
| 482 | |
| 483 | let Inst {31-26} = opconstant0; |
| 484 | let Inst {15-0} = opconstant1; |
| 485 | let Inst {20-16} = operand0; |
| 486 | let Inst {25-21} = operand1; |
| 487 | } |
| 488 | |
| 489 | class PPC32InstPattern18 <string name, Format OperandType0, Format OperandType1, Format OperandType2, bits<6> opconstant0, bits<5> opconstant1, bits<6> opconstant2, bit ppc64, bit vmx> : PPC32Inst { |
| 490 | let Name = name; |
| 491 | let ArgCount = 3; |
| 492 | let PPC64 = ppc64; |
| 493 | let VMX =vmx; |
| 494 | |
| 495 | let Arg0Type = OperandType0.Value; |
| 496 | let Arg1Type = OperandType1.Value; |
| 497 | let Arg2Type = OperandType2.Value; |
| 498 | let Arg3Type = 0; |
| 499 | let Arg4Type = 0; |
| 500 | let PPC64 = 0; |
| 501 | let VMX = 0; |
| 502 | bits<5> operand0; |
| 503 | bits<5> operand1; |
| 504 | bits<5> operand2; |
| 505 | |
| 506 | |
| 507 | let Inst {31-26} = opconstant0; |
| 508 | let Inst {15-11} = opconstant1; |
| 509 | let Inst {5-0} = opconstant2; |
| 510 | let Inst {25-21} = operand0; |
| 511 | let Inst {20-16} = operand1; |
| 512 | let Inst {10-6} = operand2; |
| 513 | } |
| 514 | |
| 515 | class PPC32InstPattern19 <string name, Format OperandType0, Format OperandType1, Format OperandType2, Format OperandType3, bits<6> opconstant0, bits<6> opconstant1, bit ppc64, bit vmx> : PPC32Inst { |
| 516 | let Name = name; |
| 517 | let ArgCount = 4; |
| 518 | let PPC64 = ppc64; |
| 519 | let VMX =vmx; |
| 520 | |
| 521 | let Arg0Type = OperandType0.Value; |
| 522 | let Arg1Type = OperandType1.Value; |
| 523 | let Arg2Type = OperandType2.Value; |
| 524 | let Arg3Type = OperandType3.Value; |
| 525 | let Arg4Type = 0; |
| 526 | let PPC64 = 0; |
| 527 | let VMX = 0; |
| 528 | bits<5> operand0; |
| 529 | bits<5> operand1; |
| 530 | bits<5> operand2; |
| 531 | bits<5> operand3; |
| 532 | |
| 533 | |
| 534 | let Inst {31-26} = opconstant0; |
| 535 | let Inst {5-0} = opconstant1; |
| 536 | let Inst {25-21} = operand0; |
| 537 | let Inst {20-16} = operand1; |
| 538 | let Inst {10-6} = operand2; |
| 539 | let Inst {15-11} = operand3; |
| 540 | } |
| 541 | |
| 542 | class PPC32InstPattern20 <string name, Format OperandType0, Format OperandType1, bits<6> opconstant0, bits<5> opconstant1, bits<11> opconstant2, bit ppc64, bit vmx> : PPC32Inst { |
| 543 | let Name = name; |
| 544 | let ArgCount = 2; |
| 545 | let PPC64 = ppc64; |
| 546 | let VMX =vmx; |
| 547 | |
| 548 | let Arg0Type = OperandType0.Value; |
| 549 | let Arg1Type = OperandType1.Value; |
| 550 | let Arg2Type = 0; |
| 551 | let Arg3Type = 0; |
| 552 | let Arg4Type = 0; |
| 553 | let PPC64 = 0; |
| 554 | let VMX = 0; |
| 555 | bits<5> operand0; |
| 556 | bits<5> operand1; |
| 557 | |
| 558 | |
| 559 | let Inst {31-26} = opconstant0; |
| 560 | let Inst {20-16} = opconstant1; |
| 561 | let Inst {10-0} = opconstant2; |
| 562 | let Inst {25-21} = operand0; |
| 563 | let Inst {15-11} = operand1; |
| 564 | } |
| 565 | |
| 566 | class PPC32InstPattern21 <string name, Format OperandType0, bits<6> opconstant0, bits<21> opconstant1, bit ppc64, bit vmx> : PPC32Inst { |
| 567 | let Name = name; |
| 568 | let ArgCount = 1; |
| 569 | let PPC64 = ppc64; |
| 570 | let VMX =vmx; |
| 571 | |
| 572 | let Arg0Type = OperandType0.Value; |
| 573 | let Arg1Type = 0; |
| 574 | let Arg2Type = 0; |
| 575 | let Arg3Type = 0; |
| 576 | let Arg4Type = 0; |
| 577 | let PPC64 = 0; |
| 578 | let VMX = 0; |
| 579 | bits<5> operand0; |
| 580 | |
| 581 | |
| 582 | let Inst {31-26} = opconstant0; |
| 583 | let Inst {20-0} = opconstant1; |
| 584 | let Inst {25-21} = operand0; |
| 585 | } |
| 586 | |
| 587 | class PPC32InstPattern22 <string name, Format OperandType0, Format OperandType1, bits<6> opconstant0, bits<18> opconstant1, bit ppc64, bit vmx> : PPC32Inst { |
| 588 | let Name = name; |
| 589 | let ArgCount = 2; |
| 590 | let PPC64 = ppc64; |
| 591 | let VMX =vmx; |
| 592 | |
| 593 | let Arg0Type = OperandType0.Value; |
| 594 | let Arg1Type = OperandType1.Value; |
| 595 | let Arg2Type = 0; |
| 596 | let Arg3Type = 0; |
| 597 | let Arg4Type = 0; |
| 598 | let PPC64 = 0; |
| 599 | let VMX = 0; |
| 600 | bits<3> operand0; |
| 601 | bits<5> operand1; |
| 602 | |
| 603 | |
| 604 | let Inst {31-26} = opconstant0; |
| 605 | let Inst {17-0} = opconstant1; |
| 606 | let Inst {25-23} = operand0; |
| 607 | let Inst {22-18} = operand1; |
| 608 | } |
| 609 | |
| 610 | class PPC32InstPattern23 <string name, Format OperandType0, Format OperandType1, bits<6> opconstant0, bits<7> opconstant1, bits<12> opconstant2, bit ppc64, bit vmx> : PPC32Inst { |
| 611 | let Name = name; |
| 612 | let ArgCount = 2; |
| 613 | let PPC64 = ppc64; |
| 614 | let VMX =vmx; |
| 615 | |
| 616 | let Arg0Type = OperandType0.Value; |
| 617 | let Arg1Type = OperandType1.Value; |
| 618 | let Arg2Type = 0; |
| 619 | let Arg3Type = 0; |
| 620 | let Arg4Type = 0; |
| 621 | let PPC64 = 0; |
| 622 | let VMX = 0; |
| 623 | bits<3> operand0; |
| 624 | bits<4> operand1; |
| 625 | |
| 626 | |
| 627 | let Inst {31-26} = opconstant0; |
| 628 | let Inst {22-16} = opconstant1; |
| 629 | let Inst {11-0} = opconstant2; |
| 630 | let Inst {25-23} = operand0; |
| 631 | let Inst {15-12} = operand1; |
| 632 | } |
| 633 | |
| 634 | class PPC32InstPattern24 <string name, Format OperandType0, Format OperandType1, bits<7> opconstant0, bits<1> opconstant1, bits<11> opconstant2, bit ppc64, bit vmx> : PPC32Inst { |
| 635 | let Name = name; |
| 636 | let ArgCount = 2; |
| 637 | let PPC64 = ppc64; |
| 638 | let VMX =vmx; |
| 639 | |
| 640 | let Arg0Type = OperandType0.Value; |
| 641 | let Arg1Type = OperandType1.Value; |
| 642 | let Arg2Type = 0; |
| 643 | let Arg3Type = 0; |
| 644 | let Arg4Type = 0; |
| 645 | let PPC64 = 0; |
| 646 | let VMX = 0; |
| 647 | bits<8> operand0; |
| 648 | bits<5> operand1; |
| 649 | |
| 650 | |
| 651 | let Inst {31-25} = opconstant0; |
| 652 | let Inst {16} = opconstant1; |
| 653 | let Inst {10-0} = opconstant2; |
| 654 | let Inst {24-17} = operand0; |
| 655 | let Inst {15-11} = operand1; |
| 656 | } |
| 657 | |
| 658 | class PPC32InstPattern25 <string name, Format OperandType0, Format OperandType1, Format OperandType2, bits<6> opconstant0, bit ppc64, bit vmx> : PPC32Inst { |
| 659 | let Name = name; |
| 660 | let ArgCount = 3; |
| 661 | let PPC64 = ppc64; |
| 662 | let VMX =vmx; |
| 663 | |
| 664 | let Arg0Type = OperandType0.Value; |
| 665 | let Arg1Type = OperandType1.Value; |
| 666 | let Arg2Type = OperandType2.Value; |
| 667 | let Arg3Type = 0; |
| 668 | let Arg4Type = 0; |
| 669 | let PPC64 = 0; |
| 670 | let VMX = 0; |
| 671 | bits<5> operand0; |
| 672 | bits<16> operand1; |
| 673 | bits<5> operand2; |
| 674 | |
| 675 | |
| 676 | let Inst {31-26} = opconstant0; |
| 677 | let Inst {25-21} = operand0; |
| 678 | let Inst {15-0} = operand1; |
| 679 | let Inst {20-16} = operand2; |
| 680 | } |
| 681 | |
| 682 | class PPC32InstPattern26 <string name, Format OperandType0, Format OperandType1, Format OperandType2, bits<6> opconstant0, bits<2> opconstant1, bit ppc64, bit vmx> : PPC32Inst { |
| 683 | let Name = name; |
| 684 | let ArgCount = 3; |
| 685 | let PPC64 = ppc64; |
| 686 | let VMX =vmx; |
| 687 | |
| 688 | let Arg0Type = OperandType0.Value; |
| 689 | let Arg1Type = OperandType1.Value; |
| 690 | let Arg2Type = OperandType2.Value; |
| 691 | let Arg3Type = 0; |
| 692 | let Arg4Type = 0; |
| 693 | let PPC64 = 0; |
| 694 | let VMX = 0; |
| 695 | bits<5> operand0; |
| 696 | bits<14> operand1; |
| 697 | bits<5> operand2; |
| 698 | |
| 699 | |
| 700 | let Inst {31-26} = opconstant0; |
| 701 | let Inst {1-0} = opconstant1; |
| 702 | let Inst {25-21} = operand0; |
| 703 | let Inst {15-2} = operand1; |
| 704 | let Inst {20-16} = operand2; |
| 705 | } |
| 706 | |
| 707 | class PPC32InstPattern27 <string name, Format OperandType0, Format OperandType1, bits<6> opconstant0, bits<2> opconstant1, bits<18> opconstant2, bit ppc64, bit vmx> : PPC32Inst { |
| 708 | let Name = name; |
| 709 | let ArgCount = 2; |
| 710 | let PPC64 = ppc64; |
| 711 | let VMX =vmx; |
| 712 | |
| 713 | let Arg0Type = OperandType0.Value; |
| 714 | let Arg1Type = OperandType1.Value; |
| 715 | let Arg2Type = 0; |
| 716 | let Arg3Type = 0; |
| 717 | let Arg4Type = 0; |
| 718 | let PPC64 = 0; |
| 719 | let VMX = 0; |
| 720 | bits<3> operand0; |
| 721 | bits<3> operand1; |
| 722 | |
| 723 | |
| 724 | let Inst {31-26} = opconstant0; |
| 725 | let Inst {22-21} = opconstant1; |
| 726 | let Inst {17-0} = opconstant2; |
| 727 | let Inst {25-23} = operand0; |
| 728 | let Inst {20-18} = operand1; |
| 729 | } |
| 730 | |
| 731 | class PPC32InstPattern28 <string name, Format OperandType0, Format OperandType1, bits<6> opconstant0, bits<11> opconstant1, bit ppc64, bit vmx> : PPC32Inst { |
| 732 | let Name = name; |
| 733 | let ArgCount = 2; |
| 734 | let PPC64 = ppc64; |
| 735 | let VMX =vmx; |
| 736 | |
| 737 | let Arg0Type = OperandType0.Value; |
| 738 | let Arg1Type = OperandType1.Value; |
| 739 | let Arg2Type = 0; |
| 740 | let Arg3Type = 0; |
| 741 | let Arg4Type = 0; |
| 742 | let PPC64 = 0; |
| 743 | let VMX = 0; |
| 744 | bits<5> operand0; |
| 745 | bits<10> operand1; |
| 746 | |
| 747 | |
| 748 | let Inst {31-26} = opconstant0; |
| 749 | let Inst {10-0} = opconstant1; |
| 750 | let Inst {25-21} = operand0; |
| 751 | let Inst {20-11} = operand1; |
| 752 | } |
| 753 | |
| 754 | class PPC32InstPattern29 <string name, Format OperandType0, Format OperandType1, bits<6> opconstant0, bits<11> opconstant1, bit ppc64, bit vmx> : PPC32Inst { |
| 755 | let Name = name; |
| 756 | let ArgCount = 2; |
| 757 | let PPC64 = ppc64; |
| 758 | let VMX =vmx; |
| 759 | |
| 760 | let Arg0Type = OperandType0.Value; |
| 761 | let Arg1Type = OperandType1.Value; |
| 762 | let Arg2Type = 0; |
| 763 | let Arg3Type = 0; |
| 764 | let Arg4Type = 0; |
| 765 | let PPC64 = 0; |
| 766 | let VMX = 0; |
| 767 | bits<10> operand0; |
| 768 | bits<5> operand1; |
| 769 | |
| 770 | |
| 771 | let Inst {31-26} = opconstant0; |
| 772 | let Inst {10-0} = opconstant1; |
| 773 | let Inst {20-11} = operand0; |
| 774 | let Inst {25-21} = operand1; |
| 775 | } |
| 776 | |
| 777 | class PPC32InstPattern30 <string name, Format OperandType0, Format OperandType1, bits<6> opconstant0, bits<1> opconstant1, bits<12> opconstant2, bit ppc64, bit vmx> : PPC32Inst { |
| 778 | let Name = name; |
| 779 | let ArgCount = 2; |
| 780 | let PPC64 = ppc64; |
| 781 | let VMX =vmx; |
| 782 | |
| 783 | let Arg0Type = OperandType0.Value; |
| 784 | let Arg1Type = OperandType1.Value; |
| 785 | let Arg2Type = 0; |
| 786 | let Arg3Type = 0; |
| 787 | let Arg4Type = 0; |
| 788 | let PPC64 = 0; |
| 789 | let VMX = 0; |
| 790 | bits<8> operand0; |
| 791 | bits<5> operand1; |
| 792 | |
| 793 | |
| 794 | let Inst {31-26} = opconstant0; |
| 795 | let Inst {20} = opconstant1; |
| 796 | let Inst {11-0} = opconstant2; |
| 797 | let Inst {19-12} = operand0; |
| 798 | let Inst {25-21} = operand1; |
| 799 | } |
| 800 | |
| 801 | class PPC32InstPattern31 <string name, Format OperandType0, bits<6> opconstant0, bits<23> opconstant1, bit ppc64, bit vmx> : PPC32Inst { |
| 802 | let Name = name; |
| 803 | let ArgCount = 1; |
| 804 | let PPC64 = ppc64; |
| 805 | let VMX =vmx; |
| 806 | |
| 807 | let Arg0Type = OperandType0.Value; |
| 808 | let Arg1Type = 0; |
| 809 | let Arg2Type = 0; |
| 810 | let Arg3Type = 0; |
| 811 | let Arg4Type = 0; |
| 812 | let PPC64 = 0; |
| 813 | let VMX = 0; |
| 814 | bits<3> operand0; |
| 815 | |
| 816 | |
| 817 | let Inst {31-26} = opconstant0; |
| 818 | let Inst {22-0} = opconstant1; |
| 819 | let Inst {25-23} = operand0; |
| 820 | } |
| 821 | |
| 822 | class PPC32InstPattern32 <string name, Format OperandType0, Format OperandType1, bits<6> opconstant0, bits<1> opconstant1, bits<12> opconstant2, bit ppc64, bit vmx> : PPC32Inst { |
| 823 | let Name = name; |
| 824 | let ArgCount = 2; |
| 825 | let PPC64 = ppc64; |
| 826 | let VMX =vmx; |
| 827 | |
| 828 | let Arg0Type = OperandType0.Value; |
| 829 | let Arg1Type = OperandType1.Value; |
| 830 | let Arg2Type = 0; |
| 831 | let Arg3Type = 0; |
| 832 | let Arg4Type = 0; |
| 833 | let PPC64 = 0; |
| 834 | let VMX = 0; |
| 835 | bits<5> operand0; |
| 836 | bits<8> operand1; |
| 837 | |
| 838 | |
| 839 | let Inst {31-26} = opconstant0; |
| 840 | let Inst {20} = opconstant1; |
| 841 | let Inst {11-0} = opconstant2; |
| 842 | let Inst {25-21} = operand0; |
| 843 | let Inst {19-12} = operand1; |
| 844 | } |
| 845 | |
| 846 | class PPC32InstPattern33 <string name, bits<32> opconstant0, bit ppc64, bit vmx> : PPC32Inst { |
| 847 | let Name = name; |
| 848 | let ArgCount = 0; |
| 849 | let PPC64 = ppc64; |
| 850 | let VMX =vmx; |
| 851 | |
| 852 | let Arg0Type = 0; |
| 853 | let Arg1Type = 0; |
| 854 | let Arg2Type = 0; |
| 855 | let Arg3Type = 0; |
| 856 | let Arg4Type = 0; |
| 857 | let PPC64 = 0; |
| 858 | let VMX = 0; |
| 859 | |
| 860 | |
| 861 | let Inst {31-0} = opconstant0; |
| 862 | } |
| 863 | |
| 864 | class PPC32InstPattern34 <string name, Format OperandType0, Format OperandType1, Format OperandType2, Format OperandType3, Format OperandType4, bits<6> opconstant0, bits<1> opconstant1, bit ppc64, bit vmx> : PPC32Inst { |
| 865 | let Name = name; |
| 866 | let ArgCount = 5; |
| 867 | let PPC64 = ppc64; |
| 868 | let VMX =vmx; |
| 869 | |
| 870 | let Arg0Type = OperandType0.Value; |
| 871 | let Arg1Type = OperandType1.Value; |
| 872 | let Arg2Type = OperandType2.Value; |
| 873 | let Arg3Type = OperandType3.Value; |
| 874 | let Arg4Type = OperandType4.Value; |
| 875 | let PPC64 = 0; |
| 876 | let VMX = 0; |
| 877 | bits<5> operand0; |
| 878 | bits<5> operand1; |
| 879 | bits<5> operand2; |
| 880 | bits<5> operand3; |
| 881 | bits<5> operand4; |
| 882 | |
| 883 | |
| 884 | let Inst {31-26} = opconstant0; |
| 885 | let Inst {0} = opconstant1; |
| 886 | let Inst {20-16} = operand0; |
| 887 | let Inst {25-21} = operand1; |
| 888 | let Inst {15-11} = operand2; |
| 889 | let Inst {10-6} = operand3; |
| 890 | let Inst {5-1} = operand4; |
| 891 | } |
| 892 | |
| 893 | class PPC32InstPattern35 <string name, Format OperandType0, Format OperandType1, Format OperandType2, bits<6> opconstant0, bits<11> opconstant1, bit ppc64, bit vmx> : PPC32Inst { |
| 894 | let Name = name; |
| 895 | let ArgCount = 3; |
| 896 | let PPC64 = ppc64; |
| 897 | let VMX =vmx; |
| 898 | |
| 899 | let Arg0Type = OperandType0.Value; |
| 900 | let Arg1Type = OperandType1.Value; |
| 901 | let Arg2Type = OperandType2.Value; |
| 902 | let Arg3Type = 0; |
| 903 | let Arg4Type = 0; |
| 904 | let PPC64 = 0; |
| 905 | let VMX = 0; |
| 906 | bits<5> operand0; |
| 907 | bits<5> operand1; |
| 908 | bits<5> operand2; |
| 909 | |
| 910 | |
| 911 | let Inst {31-26} = opconstant0; |
| 912 | let Inst {10-0} = opconstant1; |
| 913 | let Inst {25-21} = operand0; |
| 914 | let Inst {15-11} = operand1; |
| 915 | let Inst {20-16} = operand2; |
| 916 | } |
| 917 | |
| 918 | class PPC32InstPattern36 <string name, Format OperandType0, bits<9> opconstant0, bits<21> opconstant1, bit ppc64, bit vmx> : PPC32Inst { |
| 919 | let Name = name; |
| 920 | let ArgCount = 1; |
| 921 | let PPC64 = ppc64; |
| 922 | let VMX =vmx; |
| 923 | |
| 924 | let Arg0Type = OperandType0.Value; |
| 925 | let Arg1Type = 0; |
| 926 | let Arg2Type = 0; |
| 927 | let Arg3Type = 0; |
| 928 | let Arg4Type = 0; |
| 929 | let PPC64 = 0; |
| 930 | let VMX = 0; |
| 931 | bits<2> operand0; |
| 932 | |
| 933 | |
| 934 | let Inst {31-23} = opconstant0; |
| 935 | let Inst {20-0} = opconstant1; |
| 936 | let Inst {22-21} = operand0; |
| 937 | } |
| 938 | |
| 939 | class PPC32InstPattern37 <string name, Format OperandType0, Format OperandType1, bits<11> opconstant0, bit ppc64, bit vmx> : PPC32Inst { |
| 940 | let Name = name; |
| 941 | let ArgCount = 2; |
| 942 | let PPC64 = ppc64; |
| 943 | let VMX =vmx; |
| 944 | |
| 945 | let Arg0Type = OperandType0.Value; |
| 946 | let Arg1Type = OperandType1.Value; |
| 947 | let Arg2Type = 0; |
| 948 | let Arg3Type = 0; |
| 949 | let Arg4Type = 0; |
| 950 | let PPC64 = 0; |
| 951 | let VMX = 0; |
| 952 | bits<5> operand0; |
| 953 | bits<16> operand1; |
| 954 | |
| 955 | |
| 956 | let Inst {31-21} = opconstant0; |
| 957 | let Inst {20-16} = operand0; |
| 958 | let Inst {15-0} = operand1; |
| 959 | } |
| 960 | |
| 961 | class PPC32InstPattern38 <string name, Format OperandType0, Format OperandType1, bits<11> opconstant0, bits<11> opconstant1, bit ppc64, bit vmx> : PPC32Inst { |
| 962 | let Name = name; |
| 963 | let ArgCount = 2; |
| 964 | let PPC64 = ppc64; |
| 965 | let VMX =vmx; |
| 966 | |
| 967 | let Arg0Type = OperandType0.Value; |
| 968 | let Arg1Type = OperandType1.Value; |
| 969 | let Arg2Type = 0; |
| 970 | let Arg3Type = 0; |
| 971 | let Arg4Type = 0; |
| 972 | let PPC64 = 0; |
| 973 | let VMX = 0; |
| 974 | bits<5> operand0; |
| 975 | bits<5> operand1; |
| 976 | |
| 977 | |
| 978 | let Inst {31-21} = opconstant0; |
| 979 | let Inst {10-0} = opconstant1; |
| 980 | let Inst {20-16} = operand0; |
| 981 | let Inst {15-11} = operand1; |
| 982 | } |
| 983 | |
| 984 | class PPC32InstPattern39 <string name, Format OperandType0, Format OperandType1, Format OperandType2, bits<7> opconstant0, bits<11> opconstant1, bit ppc64, bit vmx> : PPC32Inst { |
| 985 | let Name = name; |
| 986 | let ArgCount = 3; |
| 987 | let PPC64 = ppc64; |
| 988 | let VMX =vmx; |
| 989 | |
| 990 | let Arg0Type = OperandType0.Value; |
| 991 | let Arg1Type = OperandType1.Value; |
| 992 | let Arg2Type = OperandType2.Value; |
| 993 | let Arg3Type = 0; |
| 994 | let Arg4Type = 0; |
| 995 | let PPC64 = 0; |
| 996 | let VMX = 0; |
| 997 | bits<5> operand0; |
| 998 | bits<5> operand1; |
| 999 | bits<4> operand2; |
| 1000 | |
| 1001 | |
| 1002 | let Inst {31-25} = opconstant0; |
| 1003 | let Inst {10-0} = opconstant1; |
| 1004 | let Inst {20-16} = operand0; |
| 1005 | let Inst {15-11} = operand1; |
| 1006 | let Inst {24-21} = operand2; |
| 1007 | } |
| 1008 | |
| 1009 | class PPC32InstPattern40 <string name, Format OperandType0, Format OperandType1, bits<6> opconstant0, bits<4> opconstant1, bits<16> opconstant2, bit ppc64, bit vmx> : PPC32Inst { |
| 1010 | let Name = name; |
| 1011 | let ArgCount = 2; |
| 1012 | let PPC64 = ppc64; |
| 1013 | let VMX =vmx; |
| 1014 | |
| 1015 | let Arg0Type = OperandType0.Value; |
| 1016 | let Arg1Type = OperandType1.Value; |
| 1017 | let Arg2Type = 0; |
| 1018 | let Arg3Type = 0; |
| 1019 | let Arg4Type = 0; |
| 1020 | let PPC64 = 0; |
| 1021 | let VMX = 0; |
| 1022 | bits<5> operand0; |
| 1023 | bits<1> operand1; |
| 1024 | |
| 1025 | |
| 1026 | let Inst {31-26} = opconstant0; |
| 1027 | let Inst {20-17} = opconstant1; |
| 1028 | let Inst {15-0} = opconstant2; |
| 1029 | let Inst {25-21} = operand0; |
| 1030 | let Inst {16} = operand1; |
| 1031 | } |
| 1032 | |
| 1033 | class PPC32InstPattern41 <string name, Format OperandType0, Format OperandType1, bits<6> opconstant0, bits<1> opconstant1, bits<16> opconstant2, bit ppc64, bit vmx> : PPC32Inst { |
| 1034 | let Name = name; |
| 1035 | let ArgCount = 2; |
| 1036 | let PPC64 = ppc64; |
| 1037 | let VMX =vmx; |
| 1038 | |
| 1039 | let Arg0Type = OperandType0.Value; |
| 1040 | let Arg1Type = OperandType1.Value; |
| 1041 | let Arg2Type = 0; |
| 1042 | let Arg3Type = 0; |
| 1043 | let Arg4Type = 0; |
| 1044 | let PPC64 = 0; |
| 1045 | let VMX = 0; |
| 1046 | bits<4> operand0; |
| 1047 | bits<5> operand1; |
| 1048 | |
| 1049 | |
| 1050 | let Inst {31-26} = opconstant0; |
| 1051 | let Inst {20} = opconstant1; |
| 1052 | let Inst {15-0} = opconstant2; |
| 1053 | let Inst {19-16} = operand0; |
| 1054 | let Inst {25-21} = operand1; |
| 1055 | } |
| 1056 | |
| 1057 | class PPC32InstPattern42 <string name, Format OperandType0, Format OperandType1, bits<6> opconstant0, bits<1> opconstant1, bits<16> opconstant2, bit ppc64, bit vmx> : PPC32Inst { |
| 1058 | let Name = name; |
| 1059 | let ArgCount = 2; |
| 1060 | let PPC64 = ppc64; |
| 1061 | let VMX =vmx; |
| 1062 | |
| 1063 | let Arg0Type = OperandType0.Value; |
| 1064 | let Arg1Type = OperandType1.Value; |
| 1065 | let Arg2Type = 0; |
| 1066 | let Arg3Type = 0; |
| 1067 | let Arg4Type = 0; |
| 1068 | let PPC64 = 0; |
| 1069 | let VMX = 0; |
| 1070 | bits<5> operand0; |
| 1071 | bits<4> operand1; |
| 1072 | |
| 1073 | |
| 1074 | let Inst {31-26} = opconstant0; |
| 1075 | let Inst {20} = opconstant1; |
| 1076 | let Inst {15-0} = opconstant2; |
| 1077 | let Inst {25-21} = operand0; |
| 1078 | let Inst {19-16} = operand1; |
| 1079 | } |
| 1080 | |
| 1081 | class PPC32InstPattern43 <string name, Format OperandType0, bits<16> opconstant0, bits<11> opconstant1, bit ppc64, bit vmx> : PPC32Inst { |
| 1082 | let Name = name; |
| 1083 | let ArgCount = 1; |
| 1084 | let PPC64 = ppc64; |
| 1085 | let VMX =vmx; |
| 1086 | |
| 1087 | let Arg0Type = OperandType0.Value; |
| 1088 | let Arg1Type = 0; |
| 1089 | let Arg2Type = 0; |
| 1090 | let Arg3Type = 0; |
| 1091 | let Arg4Type = 0; |
| 1092 | let PPC64 = 0; |
| 1093 | let VMX = 0; |
| 1094 | bits<5> operand0; |
| 1095 | |
| 1096 | |
| 1097 | let Inst {31-16} = opconstant0; |
| 1098 | let Inst {10-0} = opconstant1; |
| 1099 | let Inst {15-11} = operand0; |
| 1100 | } |
| 1101 | |
| 1102 | class PPC32InstPattern44 <string name, Format OperandType0, Format OperandType1, bits<10> opconstant0, bits<5> opconstant1, bits<11> opconstant2, bit ppc64, bit vmx> : PPC32Inst { |
| 1103 | let Name = name; |
| 1104 | let ArgCount = 2; |
| 1105 | let PPC64 = ppc64; |
| 1106 | let VMX =vmx; |
| 1107 | |
| 1108 | let Arg0Type = OperandType0.Value; |
| 1109 | let Arg1Type = OperandType1.Value; |
| 1110 | let Arg2Type = 0; |
| 1111 | let Arg3Type = 0; |
| 1112 | let Arg4Type = 0; |
| 1113 | let PPC64 = 0; |
| 1114 | let VMX = 0; |
| 1115 | bits<5> operand0; |
| 1116 | bits<1> operand1; |
| 1117 | |
| 1118 | |
| 1119 | let Inst {31-22} = opconstant0; |
| 1120 | let Inst {20-16} = opconstant1; |
| 1121 | let Inst {10-0} = opconstant2; |
| 1122 | let Inst {15-11} = operand0; |
| 1123 | let Inst {21} = operand1; |
| 1124 | } |
| 1125 | |
| 1126 | class PPC32InstPattern45 <string name, Format OperandType0, bits<6> opconstant0, bits<11> opconstant1, bit ppc64, bit vmx> : PPC32Inst { |
| 1127 | let Name = name; |
| 1128 | let ArgCount = 1; |
| 1129 | let PPC64 = ppc64; |
| 1130 | let VMX =vmx; |
| 1131 | |
| 1132 | let Arg0Type = OperandType0.Value; |
| 1133 | let Arg1Type = 0; |
| 1134 | let Arg2Type = 0; |
| 1135 | let Arg3Type = 0; |
| 1136 | let Arg4Type = 0; |
| 1137 | let PPC64 = 0; |
| 1138 | let VMX = 0; |
| 1139 | bits<15> operand0; |
| 1140 | |
| 1141 | |
| 1142 | let Inst {31-26} = opconstant0; |
| 1143 | let Inst {10-0} = opconstant1; |
| 1144 | let Inst {25-11} = operand0; |
| 1145 | } |
| 1146 | |
| 1147 | class PPC32InstPattern46 <string name, Format OperandType0, Format OperandType1, Format OperandType2, bits<9> opconstant0, bits<11> opconstant1, bit ppc64, bit vmx> : PPC32Inst { |
| 1148 | let Name = name; |
| 1149 | let ArgCount = 3; |
| 1150 | let PPC64 = ppc64; |
| 1151 | let VMX =vmx; |
| 1152 | |
| 1153 | let Arg0Type = OperandType0.Value; |
| 1154 | let Arg1Type = OperandType1.Value; |
| 1155 | let Arg2Type = OperandType2.Value; |
| 1156 | let Arg3Type = 0; |
| 1157 | let Arg4Type = 0; |
| 1158 | let PPC64 = 0; |
| 1159 | let VMX = 0; |
| 1160 | bits<5> operand0; |
| 1161 | bits<5> operand1; |
| 1162 | bits<2> operand2; |
| 1163 | |
| 1164 | |
| 1165 | let Inst {31-23} = opconstant0; |
| 1166 | let Inst {10-0} = opconstant1; |
| 1167 | let Inst {20-16} = operand0; |
| 1168 | let Inst {15-11} = operand1; |
| 1169 | let Inst {22-21} = operand2; |
| 1170 | } |
| 1171 | |
| 1172 | class PPC32InstPattern47 <string name, Format OperandType0, Format OperandType1, Format OperandType2, Format OperandType3, bits<6> opconstant0, bits<6> opconstant1, bit ppc64, bit vmx> : PPC32Inst { |
| 1173 | let Name = name; |
| 1174 | let ArgCount = 4; |
| 1175 | let PPC64 = ppc64; |
| 1176 | let VMX =vmx; |
| 1177 | |
| 1178 | let Arg0Type = OperandType0.Value; |
| 1179 | let Arg1Type = OperandType1.Value; |
| 1180 | let Arg2Type = OperandType2.Value; |
| 1181 | let Arg3Type = OperandType3.Value; |
| 1182 | let Arg4Type = 0; |
| 1183 | let PPC64 = 0; |
| 1184 | let VMX = 0; |
| 1185 | bits<5> operand0; |
| 1186 | bits<5> operand1; |
| 1187 | bits<5> operand2; |
| 1188 | bits<5> operand3; |
| 1189 | |
| 1190 | |
| 1191 | let Inst {31-26} = opconstant0; |
| 1192 | let Inst {5-0} = opconstant1; |
| 1193 | let Inst {25-21} = operand0; |
| 1194 | let Inst {20-16} = operand1; |
| 1195 | let Inst {15-11} = operand2; |
| 1196 | let Inst {10-6} = operand3; |
| 1197 | } |
| 1198 | |
| 1199 | class PPC32InstPattern48 <string name, Format OperandType0, Format OperandType1, Format OperandType2, Format OperandType3, bits<6> opconstant0, bits<1> opconstant1, bits<6> opconstant2, bit ppc64, bit vmx> : PPC32Inst { |
| 1200 | let Name = name; |
| 1201 | let ArgCount = 4; |
| 1202 | let PPC64 = ppc64; |
| 1203 | let VMX =vmx; |
| 1204 | |
| 1205 | let Arg0Type = OperandType0.Value; |
| 1206 | let Arg1Type = OperandType1.Value; |
| 1207 | let Arg2Type = OperandType2.Value; |
| 1208 | let Arg3Type = OperandType3.Value; |
| 1209 | let Arg4Type = 0; |
| 1210 | let PPC64 = 0; |
| 1211 | let VMX = 0; |
| 1212 | bits<5> operand0; |
| 1213 | bits<5> operand1; |
| 1214 | bits<5> operand2; |
| 1215 | bits<4> operand3; |
| 1216 | |
| 1217 | |
| 1218 | let Inst {31-26} = opconstant0; |
| 1219 | let Inst {10} = opconstant1; |
| 1220 | let Inst {5-0} = opconstant2; |
| 1221 | let Inst {25-21} = operand0; |
| 1222 | let Inst {20-16} = operand1; |
| 1223 | let Inst {15-11} = operand2; |
| 1224 | let Inst {9-6} = operand3; |
| 1225 | } |
| 1226 | |
| 1227 | class PPC32InstPatternPseudo <string name, Format OperandType0> : PPC32Inst { |
| 1228 | let Name = name; |
| 1229 | let ArgCount = 0; |
| 1230 | let PPC64 = 0; |
| 1231 | let VMX = 0; |
| 1232 | |
| 1233 | let Arg0Type = OperandType0.Value; |
| 1234 | let Arg1Type = OperandType0.Value; |
| 1235 | let Arg2Type = OperandType0.Value; |
| 1236 | let Arg3Type = OperandType0.Value; |
| 1237 | let Arg4Type = 0; |
| 1238 | let PPC64 = 0; |
| 1239 | let VMX = 0; |
| 1240 | bits<5> operand0; |
| 1241 | bits<5> operand1; |
| 1242 | bits<5> operand2; |
| 1243 | bits<4> operand3; |
| 1244 | |
| 1245 | |
| 1246 | let Inst {31-0} = 0; |
| 1247 | } |
| 1248 | |
| 1249 | |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 1250 | let isTerminator = 1, isReturn = 1 in |
| 1251 | def BLR : PPC32InstPattern11 <"blr", Imm2, 160768, 32, 0, 0>; |
| 1252 | |
| 1253 | // Pseudo-instructions: |
| 1254 | def PHI : PPC32InstPatternPseudo<"PHI", Pseudo>; // PHI node... |
| 1255 | def ADJCALLSTACKDOWN : PPC32InstPatternPseudo<"ADJCALLSTACKDOWN", Pseudo>; |
| 1256 | def ADJCALLSTACKUP : PPC32InstPatternPseudo<"ADJCALLSTACKUP", Pseudo>; |
Misha Brukman | 53f5678 | 2004-07-27 17:15:05 +0000 | [diff] [blame^] | 1257 | let Defs = [LR] in |
| 1258 | def MovePCtoLR : PPC32InstPatternPseudo<"MovePCtoLR", Pseudo>; |
Misha Brukman | 2bf5438 | 2004-07-16 20:33:41 +0000 | [diff] [blame] | 1259 | def IMPLICIT_DEF : PPC32InstPatternPseudo<"IMPLICIT_DEF", Pseudo>; |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 1260 | |
Misha Brukman | 86ddcf9 | 2004-07-20 15:52:25 +0000 | [diff] [blame] | 1261 | def LOADLoIndirect : PPC32InstPattern0 <"lwz", Gpr, Gpr0, Simm16, 14, 0, 0>; |
| 1262 | def LOADLoDirect : PPC32InstPattern0 <"la", Gpr, Gpr0, Simm16, 14, 0, 0>; |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 1263 | def LOADHiAddr : PPC32InstPattern0 <"addis", Gpr, Gpr0, Simm16, 15, 0, 0>; |
| 1264 | |
| 1265 | def ADDI : PPC32InstPattern0 <"addi", Gpr, Gpr0, Simm16, 14, 0, 0>; |
Misha Brukman | 53d9a48 | 2004-07-21 15:53:04 +0000 | [diff] [blame] | 1266 | def SUBI : PPC32InstPattern0 <"subi", Gpr, Gpr0, Simm16, 14, 0, 0>; |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 1267 | def LI : PPC32InstPattern1 <"li", Gpr, Simm16, 14, 0, 0, 0>; |
| 1268 | def ADDIS : PPC32InstPattern0 <"addis", Gpr, Gpr0, Simm16, 15, 0, 0>; |
| 1269 | def LIS : PPC32InstPattern1 <"lis", Gpr, Simm16, 15, 0, 0, 0>; |
| 1270 | def ADDIC : PPC32InstPattern0 <"addic", Gpr, Gpr, Simm16, 12, 0, 0>; |
| 1271 | def ADDICo : PPC32InstPattern0 <"addic.", Gpr, Gpr, Simm16, 13, 0, 0>; |
| 1272 | def ADD : PPC32InstPattern2 <"add", Gpr, Gpr, Gpr, 31, 532, 0, 0>; |
| 1273 | def ADDo : PPC32InstPattern2 <"add.", Gpr, Gpr, Gpr, 31, 533, 0, 0>; |
| 1274 | def ADDO : PPC32InstPattern2 <"addo", Gpr, Gpr, Gpr, 31, 532, 0, 0>; |
| 1275 | def ADDOo : PPC32InstPattern2 <"addo.", Gpr, Gpr, Gpr, 31, 533, 0, 0>; |
| 1276 | def ADDC : PPC32InstPattern2 <"addc", Gpr, Gpr, Gpr, 31, 20, 0, 0>; |
| 1277 | def ADDCo : PPC32InstPattern2 <"addc.", Gpr, Gpr, Gpr, 31, 21, 0, 0>; |
| 1278 | def ADDCO : PPC32InstPattern2 <"addco", Gpr, Gpr, Gpr, 31, 20, 0, 0>; |
| 1279 | def ADDCOo : PPC32InstPattern2 <"addco.", Gpr, Gpr, Gpr, 31, 21, 0, 0>; |
| 1280 | def ADDE : PPC32InstPattern2 <"adde", Gpr, Gpr, Gpr, 31, 276, 0, 0>; |
| 1281 | def ADDEo : PPC32InstPattern2 <"adde.", Gpr, Gpr, Gpr, 31, 277, 0, 0>; |
| 1282 | def ADDEO : PPC32InstPattern2 <"addeo", Gpr, Gpr, Gpr, 31, 276, 0, 0>; |
| 1283 | def ADDEOo : PPC32InstPattern2 <"addeo.", Gpr, Gpr, Gpr, 31, 277, 0, 0>; |
| 1284 | def ADDME : PPC32InstPattern3 <"addme", Gpr, Gpr, 31, 468, 0, 0>; |
| 1285 | def ADDMEo : PPC32InstPattern3 <"addme.", Gpr, Gpr, 31, 469, 0, 0>; |
| 1286 | def ADDMEO : PPC32InstPattern3 <"addmeo", Gpr, Gpr, 31, 1492, 0, 0>; |
| 1287 | def ADDMEOo : PPC32InstPattern3 <"addmeo.", Gpr, Gpr, 31, 1493, 0, 0>; |
| 1288 | def ADDZE : PPC32InstPattern3 <"addze", Gpr, Gpr, 31, 404, 0, 0>; |
| 1289 | def ADDZEo : PPC32InstPattern3 <"addze.", Gpr, Gpr, 31, 405, 0, 0>; |
| 1290 | def ADDZEO : PPC32InstPattern3 <"addzeo", Gpr, Gpr, 31, 1428, 0, 0>; |
| 1291 | def ADDZEOo : PPC32InstPattern3 <"addzeo.", Gpr, Gpr, 31, 1429, 0, 0>; |
| 1292 | def ANDIo : PPC32InstPattern4 <"andi.", Gpr, Gpr, Zimm16, 28, 0, 0>; |
| 1293 | def ANDISo : PPC32InstPattern4 <"andis.", Gpr, Gpr, Zimm16, 29, 0, 0>; |
| 1294 | def AND : PPC32InstPattern5 <"and", Gpr, Gpr, Gpr, 31, 56, 0, 0>; |
| 1295 | def ANDo : PPC32InstPattern5 <"and.", Gpr, Gpr, Gpr, 31, 57, 0, 0>; |
| 1296 | def ANDC : PPC32InstPattern5 <"andc", Gpr, Gpr, Gpr, 31, 120, 0, 0>; |
| 1297 | def ANDCo : PPC32InstPattern5 <"andc.", Gpr, Gpr, Gpr, 31, 121, 0, 0>; |
Misha Brukman | b2edb44 | 2004-06-28 18:23:35 +0000 | [diff] [blame] | 1298 | |
| 1299 | let isBranch = 1, isTerminator = 1 in { |
| 1300 | def B : PPC32InstPattern6 <"b", PCRelimm24, 18, 0, 0, 0>; |
| 1301 | def BA : PPC32InstPattern6 <"ba", Imm24, 18, 0, 0, 0>; |
Misha Brukman | b2edb44 | 2004-06-28 18:23:35 +0000 | [diff] [blame] | 1302 | def BC : PPC32InstPattern7 <"bc", Imm5, Imm5, PCRelimm14, 16, 0, 0, 0>; |
| 1303 | def BCA : PPC32InstPattern7 <"bca", Imm5, Imm5, Imm14, 16, 0, 0, 0>; |
Misha Brukman | b2edb44 | 2004-06-28 18:23:35 +0000 | [diff] [blame] | 1304 | def BCCTR : PPC32InstPattern8 <"bcctr", Imm5, Imm5, Imm2, 19, 0, 32, 0, 0>; |
Misha Brukman | b2edb44 | 2004-06-28 18:23:35 +0000 | [diff] [blame] | 1305 | def BCLR : PPC32InstPattern8 <"bclr", Imm5, Imm5, Imm2, 19, 0, 32, 0, 0>; |
Misha Brukman | b2edb44 | 2004-06-28 18:23:35 +0000 | [diff] [blame] | 1306 | def BT : PPC32InstPattern9 <"bt", Imm5, PCRelimm14, 524, 0, 0, 0>; |
Misha Brukman | b2edb44 | 2004-06-28 18:23:35 +0000 | [diff] [blame] | 1307 | def BF : PPC32InstPattern9 <"bf", Imm5, PCRelimm14, 516, 0, 0, 0>; |
Misha Brukman | b2edb44 | 2004-06-28 18:23:35 +0000 | [diff] [blame] | 1308 | def BDNZ : PPC32InstPattern10 <"bdnz", PCRelimm14, 16896, 0, 0, 0>; |
| 1309 | def BDNZL : PPC32InstPattern10 <"bdnzl", PCRelimm14, 16896, 1, 0, 0>; |
| 1310 | def BDNZT : PPC32InstPattern9 <"bdnzt", Imm5, PCRelimm14, 520, 0, 0, 0>; |
Misha Brukman | b2edb44 | 2004-06-28 18:23:35 +0000 | [diff] [blame] | 1311 | def BDNZF : PPC32InstPattern9 <"bdnzf", Imm5, PCRelimm14, 512, 0, 0, 0>; |
Misha Brukman | b2edb44 | 2004-06-28 18:23:35 +0000 | [diff] [blame] | 1312 | def BDZ : PPC32InstPattern10 <"bdz", PCRelimm14, 16960, 0, 0, 0>; |
| 1313 | def BDZL : PPC32InstPattern10 <"bdzl", PCRelimm14, 16960, 1, 0, 0>; |
| 1314 | def BDZT : PPC32InstPattern9 <"bdzt", Imm5, PCRelimm14, 522, 0, 0, 0>; |
Misha Brukman | c661c30 | 2004-06-30 22:00:45 +0000 | [diff] [blame] | 1315 | def BDNZTL : PPC32InstPattern9 <"bdnztl", Imm5, PCRelimm14, 520, 1, 0, 0>; |
| 1316 | def BDNZFL : PPC32InstPattern9 <"bdnzfl", Imm5, PCRelimm14, 512, 1, 0, 0>; |
Misha Brukman | b2edb44 | 2004-06-28 18:23:35 +0000 | [diff] [blame] | 1317 | def BDZTL : PPC32InstPattern9 <"bdztl", Imm5, PCRelimm14, 522, 1, 0, 0>; |
| 1318 | def BDZF : PPC32InstPattern9 <"bdzf", Imm5, PCRelimm14, 514, 0, 0, 0>; |
| 1319 | def BDZFL : PPC32InstPattern9 <"bdzfl", Imm5, PCRelimm14, 514, 1, 0, 0>; |
| 1320 | def BTA : PPC32InstPattern9 <"bta", Imm5, Imm14, 524, 0, 0, 0>; |
| 1321 | def BTLA : PPC32InstPattern9 <"btla", Imm5, Imm14, 524, 1, 0, 0>; |
| 1322 | def BFA : PPC32InstPattern9 <"bfa", Imm5, Imm14, 516, 0, 0, 0>; |
| 1323 | def BFLA : PPC32InstPattern9 <"bfla", Imm5, Imm14, 516, 1, 0, 0>; |
| 1324 | def BDNZA : PPC32InstPattern10 <"bdnza", Imm14, 16896, 0, 0, 0>; |
| 1325 | def BDNZLA : PPC32InstPattern10 <"bdnzla", Imm14, 16896, 1, 0, 0>; |
| 1326 | def BDNZTA : PPC32InstPattern9 <"bdnzta", Imm5, Imm14, 520, 0, 0, 0>; |
| 1327 | def BDNZTLA : PPC32InstPattern9 <"bdnztla", Imm5, Imm14, 520, 1, 0, 0>; |
| 1328 | def BDNZFA : PPC32InstPattern9 <"bdnzfa", Imm5, Imm14, 512, 0, 0, 0>; |
| 1329 | def BDNZFLA : PPC32InstPattern9 <"bdnzfla", Imm5, Imm14, 512, 1, 0, 0>; |
| 1330 | def BDZA : PPC32InstPattern10 <"bdza", Imm14, 16960, 0, 0, 0>; |
| 1331 | def BDZLA : PPC32InstPattern10 <"bdzla", Imm14, 16960, 1, 0, 0>; |
| 1332 | def BDZTA : PPC32InstPattern9 <"bdzta", Imm5, Imm14, 522, 0, 0, 0>; |
| 1333 | def BDZTLA : PPC32InstPattern9 <"bdztla", Imm5, Imm14, 522, 1, 0, 0>; |
| 1334 | def BDZFA : PPC32InstPattern9 <"bdzfa", Imm5, Imm14, 514, 0, 0, 0>; |
| 1335 | def BDZFLA : PPC32InstPattern9 <"bdzfla", Imm5, Imm14, 514, 1, 0, 0>; |
Misha Brukman | b2edb44 | 2004-06-28 18:23:35 +0000 | [diff] [blame] | 1336 | def BDNZLR : PPC32InstPattern11 <"bdnzlr", Imm2, 159744, 32, 0, 0>; |
Misha Brukman | c661c30 | 2004-06-30 22:00:45 +0000 | [diff] [blame] | 1337 | def BFLR : PPC32InstPattern12 <"bflr", Imm5, Imm2, 612, 0, 32, 0, 0>; |
Misha Brukman | b2edb44 | 2004-06-28 18:23:35 +0000 | [diff] [blame] | 1338 | def BDNZTLR : PPC32InstPattern12 <"bdnztlr", Imm5, Imm2, 616, 0, 32, 0, 0>; |
Misha Brukman | b2edb44 | 2004-06-28 18:23:35 +0000 | [diff] [blame] | 1339 | def BDNZFLR : PPC32InstPattern12 <"bdnzflr", Imm5, Imm2, 608, 0, 32, 0, 0>; |
Misha Brukman | b2edb44 | 2004-06-28 18:23:35 +0000 | [diff] [blame] | 1340 | def BDZLR : PPC32InstPattern11 <"bdzlr", Imm2, 160256, 32, 0, 0>; |
Misha Brukman | b2edb44 | 2004-06-28 18:23:35 +0000 | [diff] [blame] | 1341 | def BDZTLR : PPC32InstPattern12 <"bdztlr", Imm5, Imm2, 618, 0, 32, 0, 0>; |
Misha Brukman | b2edb44 | 2004-06-28 18:23:35 +0000 | [diff] [blame] | 1342 | def BCTR : PPC32InstPattern3 <"bctr", Imm5, Imm5, 19, 1056, 0, 0>; |
Misha Brukman | b2edb44 | 2004-06-28 18:23:35 +0000 | [diff] [blame] | 1343 | def BTCTR : PPC32InstPattern12 <"btctr", Imm5, Imm2, 620, 0, 32, 0, 0>; |
Misha Brukman | b2edb44 | 2004-06-28 18:23:35 +0000 | [diff] [blame] | 1344 | def BFCTR : PPC32InstPattern12 <"bfctr", Imm5, Imm2, 612, 0, 32, 0, 0>; |
Misha Brukman | b2edb44 | 2004-06-28 18:23:35 +0000 | [diff] [blame] | 1345 | def BLT : PPC32InstPattern9 <"blt", Crf, PCRelimm14, 524, 0, 0, 0>; |
Misha Brukman | b2edb44 | 2004-06-28 18:23:35 +0000 | [diff] [blame] | 1346 | def BLE : PPC32InstPattern9 <"ble", Crf, PCRelimm14, 516, 0, 0, 0>; |
Misha Brukman | b2edb44 | 2004-06-28 18:23:35 +0000 | [diff] [blame] | 1347 | def BEQ : PPC32InstPattern9 <"beq", Crf, PCRelimm14, 524, 0, 0, 0>; |
Misha Brukman | b2edb44 | 2004-06-28 18:23:35 +0000 | [diff] [blame] | 1348 | def BGE : PPC32InstPattern9 <"bge", Crf, PCRelimm14, 516, 0, 0, 0>; |
Misha Brukman | b2edb44 | 2004-06-28 18:23:35 +0000 | [diff] [blame] | 1349 | def BGT : PPC32InstPattern9 <"bgt", Crf, PCRelimm14, 524, 0, 0, 0>; |
Misha Brukman | b2edb44 | 2004-06-28 18:23:35 +0000 | [diff] [blame] | 1350 | def BNE : PPC32InstPattern9 <"bne", Crf, PCRelimm14, 516, 0, 0, 0>; |
Misha Brukman | b2edb44 | 2004-06-28 18:23:35 +0000 | [diff] [blame] | 1351 | def BNG : PPC32InstPattern9 <"bng", Crf, PCRelimm14, 516, 0, 0, 0>; |
Misha Brukman | b2edb44 | 2004-06-28 18:23:35 +0000 | [diff] [blame] | 1352 | def BSO : PPC32InstPattern9 <"bso", Crf, PCRelimm14, 524, 0, 0, 0>; |
Misha Brukman | b2edb44 | 2004-06-28 18:23:35 +0000 | [diff] [blame] | 1353 | def BNS : PPC32InstPattern9 <"bns", Crf, PCRelimm14, 516, 0, 0, 0>; |
Misha Brukman | b2edb44 | 2004-06-28 18:23:35 +0000 | [diff] [blame] | 1354 | def BUN : PPC32InstPattern9 <"bun", Crf, PCRelimm14, 524, 0, 0, 0>; |
Misha Brukman | b2edb44 | 2004-06-28 18:23:35 +0000 | [diff] [blame] | 1355 | def BNU : PPC32InstPattern9 <"bnu", Crf, PCRelimm14, 516, 0, 0, 0>; |
Misha Brukman | c661c30 | 2004-06-30 22:00:45 +0000 | [diff] [blame] | 1356 | |
Misha Brukman | b2edb44 | 2004-06-28 18:23:35 +0000 | [diff] [blame] | 1357 | def BLTA : PPC32InstPattern9 <"blta", Crf, Imm14, 524, 0, 0, 0>; |
| 1358 | def BLTLA : PPC32InstPattern9 <"bltla", Crf, Imm14, 524, 1, 0, 0>; |
| 1359 | def BLEA : PPC32InstPattern9 <"blea", Crf, Imm14, 516, 0, 0, 0>; |
| 1360 | def BLELA : PPC32InstPattern9 <"blela", Crf, Imm14, 516, 1, 0, 0>; |
| 1361 | def BEQA : PPC32InstPattern9 <"beqa", Crf, Imm14, 524, 0, 0, 0>; |
| 1362 | def BEQLA : PPC32InstPattern9 <"beqla", Crf, Imm14, 524, 1, 0, 0>; |
| 1363 | def BGEA : PPC32InstPattern9 <"bgea", Crf, Imm14, 516, 0, 0, 0>; |
| 1364 | def BGELA : PPC32InstPattern9 <"bgela", Crf, Imm14, 516, 1, 0, 0>; |
| 1365 | def BGTA : PPC32InstPattern9 <"bgta", Crf, Imm14, 524, 0, 0, 0>; |
| 1366 | def BGTLA : PPC32InstPattern9 <"bgtla", Crf, Imm14, 524, 1, 0, 0>; |
| 1367 | def BNLA : PPC32InstPattern9 <"bnla", Crf, Imm14, 516, 0, 0, 0>; |
| 1368 | def BNLLA : PPC32InstPattern9 <"bnlla", Crf, Imm14, 516, 1, 0, 0>; |
| 1369 | def BNEA : PPC32InstPattern9 <"bnea", Crf, Imm14, 516, 0, 0, 0>; |
| 1370 | def BNELA : PPC32InstPattern9 <"bnela", Crf, Imm14, 516, 1, 0, 0>; |
| 1371 | def BNGA : PPC32InstPattern9 <"bnga", Crf, Imm14, 516, 0, 0, 0>; |
| 1372 | def BNGLA : PPC32InstPattern9 <"bngla", Crf, Imm14, 516, 1, 0, 0>; |
| 1373 | def BSOA : PPC32InstPattern9 <"bsoa", Crf, Imm14, 524, 0, 0, 0>; |
| 1374 | def BSOLA : PPC32InstPattern9 <"bsola", Crf, Imm14, 524, 1, 0, 0>; |
| 1375 | def BNSA : PPC32InstPattern9 <"bnsa", Crf, Imm14, 516, 0, 0, 0>; |
| 1376 | def BNSLA : PPC32InstPattern9 <"bnsla", Crf, Imm14, 516, 1, 0, 0>; |
| 1377 | def BUNA : PPC32InstPattern9 <"buna", Crf, Imm14, 524, 0, 0, 0>; |
| 1378 | def BUNLA : PPC32InstPattern9 <"bunla", Crf, Imm14, 524, 1, 0, 0>; |
| 1379 | def BNUA : PPC32InstPattern9 <"bnua", Crf, Imm14, 516, 0, 0, 0>; |
| 1380 | def BNULA : PPC32InstPattern9 <"bnula", Crf, Imm14, 516, 1, 0, 0>; |
| 1381 | def BLTLR : PPC32InstPattern12 <"bltlr", Crf, Imm2, 620, 0, 32, 0, 0>; |
| 1382 | def BLTLRL : PPC32InstPattern12 <"bltlrl", Crf, Imm2, 620, 0, 33, 0, 0>; |
| 1383 | def BLELR : PPC32InstPattern12 <"blelr", Crf, Imm2, 612, 0, 32, 0, 0>; |
| 1384 | def BLELRL : PPC32InstPattern12 <"blelrl", Crf, Imm2, 612, 0, 33, 0, 0>; |
| 1385 | def BEQLR : PPC32InstPattern12 <"beqlr", Crf, Imm2, 620, 0, 32, 0, 0>; |
| 1386 | def BEQLRL : PPC32InstPattern12 <"beqlrl", Crf, Imm2, 620, 0, 33, 0, 0>; |
| 1387 | def BGELR : PPC32InstPattern12 <"bgelr", Crf, Imm2, 612, 0, 32, 0, 0>; |
| 1388 | def BGELRL : PPC32InstPattern12 <"bgelrl", Crf, Imm2, 612, 0, 33, 0, 0>; |
| 1389 | def BGTLR : PPC32InstPattern12 <"bgtlr", Crf, Imm2, 620, 0, 32, 0, 0>; |
| 1390 | def BGTLRL : PPC32InstPattern12 <"bgtlrl", Crf, Imm2, 620, 0, 33, 0, 0>; |
| 1391 | def BNLLR : PPC32InstPattern12 <"bnllr", Crf, Imm2, 612, 0, 32, 0, 0>; |
| 1392 | def BNLLRL : PPC32InstPattern12 <"bnllrl", Crf, Imm2, 612, 0, 33, 0, 0>; |
| 1393 | def BNELR : PPC32InstPattern12 <"bnelr", Crf, Imm2, 612, 0, 32, 0, 0>; |
| 1394 | def BNELRL : PPC32InstPattern12 <"bnelrl", Crf, Imm2, 612, 0, 33, 0, 0>; |
| 1395 | def BNGLR : PPC32InstPattern12 <"bnglr", Crf, Imm2, 612, 0, 32, 0, 0>; |
| 1396 | def BNGLRL : PPC32InstPattern12 <"bnglrl", Crf, Imm2, 612, 0, 33, 0, 0>; |
| 1397 | def BSOLR : PPC32InstPattern12 <"bsolr", Crf, Imm2, 620, 0, 32, 0, 0>; |
| 1398 | def BSOLRL : PPC32InstPattern12 <"bsolrl", Crf, Imm2, 620, 0, 33, 0, 0>; |
| 1399 | def BNSLR : PPC32InstPattern12 <"bnslr", Crf, Imm2, 612, 0, 32, 0, 0>; |
| 1400 | def BNSLRL : PPC32InstPattern12 <"bnslrl", Crf, Imm2, 612, 0, 33, 0, 0>; |
| 1401 | def BUNLR : PPC32InstPattern12 <"bunlr", Crf, Imm2, 620, 0, 32, 0, 0>; |
| 1402 | def BUNLRL : PPC32InstPattern12 <"bunlrl", Crf, Imm2, 620, 0, 33, 0, 0>; |
| 1403 | def BNULR : PPC32InstPattern12 <"bnulr", Crf, Imm2, 612, 0, 32, 0, 0>; |
| 1404 | def BNULRL : PPC32InstPattern12 <"bnulrl", Crf, Imm2, 612, 0, 33, 0, 0>; |
| 1405 | def BLTCTR : PPC32InstPattern12 <"bltctr", Crf, Imm2, 620, 0, 32, 0, 0>; |
| 1406 | def BLTCTRL : PPC32InstPattern12 <"bltctrl", Crf, Imm2, 620, 0, 33, 0, 0>; |
| 1407 | def BLECTR : PPC32InstPattern12 <"blectr", Crf, Imm2, 612, 0, 32, 0, 0>; |
| 1408 | def BLECTRL : PPC32InstPattern12 <"blectrl", Crf, Imm2, 612, 0, 33, 0, 0>; |
| 1409 | def BEQCTR : PPC32InstPattern12 <"beqctr", Crf, Imm2, 620, 0, 32, 0, 0>; |
| 1410 | def BEQCTRL : PPC32InstPattern12 <"beqctrl", Crf, Imm2, 620, 0, 33, 0, 0>; |
| 1411 | def BGECTR : PPC32InstPattern12 <"bgectr", Crf, Imm2, 612, 0, 32, 0, 0>; |
| 1412 | def BGECTRL : PPC32InstPattern12 <"bgectrl", Crf, Imm2, 612, 0, 33, 0, 0>; |
| 1413 | def BGTCTR : PPC32InstPattern12 <"bgtctr", Crf, Imm2, 620, 0, 32, 0, 0>; |
| 1414 | def BGTCTRL : PPC32InstPattern12 <"bgtctrl", Crf, Imm2, 620, 0, 33, 0, 0>; |
| 1415 | def BNLCTR : PPC32InstPattern12 <"bnlctr", Crf, Imm2, 612, 0, 32, 0, 0>; |
| 1416 | def BNLCTRL : PPC32InstPattern12 <"bnlctrl", Crf, Imm2, 612, 0, 33, 0, 0>; |
| 1417 | def BNECTR : PPC32InstPattern12 <"bnectr", Crf, Imm2, 612, 0, 32, 0, 0>; |
| 1418 | def BNECTRL : PPC32InstPattern12 <"bnectrl", Crf, Imm2, 612, 0, 33, 0, 0>; |
| 1419 | def BNGCTR : PPC32InstPattern12 <"bngctr", Crf, Imm2, 612, 0, 32, 0, 0>; |
| 1420 | def BNGCTRL : PPC32InstPattern12 <"bngctrl", Crf, Imm2, 612, 0, 33, 0, 0>; |
| 1421 | def BSOCTR : PPC32InstPattern12 <"bsoctr", Crf, Imm2, 620, 0, 32, 0, 0>; |
| 1422 | def BSOCTRL : PPC32InstPattern12 <"bsoctrl", Crf, Imm2, 620, 0, 33, 0, 0>; |
| 1423 | def BNSCTR : PPC32InstPattern12 <"bnsctr", Crf, Imm2, 612, 0, 32, 0, 0>; |
| 1424 | def BNSCTRL : PPC32InstPattern12 <"bnsctrl", Crf, Imm2, 612, 0, 33, 0, 0>; |
| 1425 | def BUNCTR : PPC32InstPattern12 <"bunctr", Crf, Imm2, 620, 0, 32, 0, 0>; |
| 1426 | def BUNCTRL : PPC32InstPattern12 <"bunctrl", Crf, Imm2, 620, 0, 33, 0, 0>; |
| 1427 | def BNUCTR : PPC32InstPattern12 <"bnuctr", Crf, Imm2, 612, 0, 32, 0, 0>; |
| 1428 | def BNUCTRL : PPC32InstPattern12 <"bnuctrl", Crf, Imm2, 612, 0, 33, 0, 0>; |
| 1429 | } |
| 1430 | |
Misha Brukman | 5fa2b02 | 2004-06-29 23:37:36 +0000 | [diff] [blame] | 1431 | let isBranch = 1, isTerminator = 1, isCall = 1, |
| 1432 | // All calls clobber the non-callee saved registers... |
Misha Brukman | c661c30 | 2004-06-30 22:00:45 +0000 | [diff] [blame] | 1433 | Defs = [R0,R2,R3,R4,R5,R6,R7,R8,R9,R10,R11,R12, |
| 1434 | F0,F1,F2,F3,F4,F5,F6,F7,F8,F9,F10,F11,F12,F13, |
| 1435 | LR,XER,CTR, |
| 1436 | CR0,CR1,CR5,CR6,CR7] in { |
| 1437 | // Convenient aliases for call instructions |
| 1438 | def CALLpcrel : PPC32InstPattern6 <"bl", PCRelimm24, 18, 1, 0, 0>; |
| 1439 | def CALLindirect : PPC32InstPattern3 <"bctrl", Imm5, Imm5, 19, 1057, 0, 0>; |
| 1440 | |
Misha Brukman | 5fa2b02 | 2004-06-29 23:37:36 +0000 | [diff] [blame] | 1441 | def BL : PPC32InstPattern6 <"bl", PCRelimm24, 18, 1, 0, 0>; |
| 1442 | def BLA : PPC32InstPattern6 <"bla", Imm24, 18, 1, 0, 0>; |
| 1443 | def BCL : PPC32InstPattern7 <"bcl", Imm5, Imm5, PCRelimm14, 16, 1, 0, 0>; |
| 1444 | def BCLA : PPC32InstPattern7 <"bcla", Imm5, Imm5, Imm14, 16, 1, 0, 0>; |
| 1445 | def BCCTRL : PPC32InstPattern8 <"bcctrl", Imm5, Imm5, Imm2, 19, 0, 33, 0, 0>; |
| 1446 | def BCLRL : PPC32InstPattern8 <"bclrl", Imm5, Imm5, Imm2, 19, 0, 33, 0, 0>; |
| 1447 | def BTL : PPC32InstPattern9 <"btl", Imm5, PCRelimm14, 524, 1, 0, 0>; |
| 1448 | def BFL : PPC32InstPattern9 <"bfl", Imm5, PCRelimm14, 516, 1, 0, 0>; |
Misha Brukman | c661c30 | 2004-06-30 22:00:45 +0000 | [diff] [blame] | 1449 | def BLRL : PPC32InstPattern11 <"blrl", Imm2, 160768, 33, 0, 0>; |
| 1450 | def BTLR : PPC32InstPattern12 <"btlr", Imm5, Imm2, 620, 0, 32, 0, 0>; |
| 1451 | def BTLRL : PPC32InstPattern12 <"btlrl", Imm5, Imm2, 620, 0, 33, 0, 0>; |
| 1452 | def BFLRL : PPC32InstPattern12 <"bflrl", Imm5, Imm2, 612, 0, 33, 0, 0>; |
| 1453 | def BDNZLRL : PPC32InstPattern11 <"bdnzlrl", Imm2, 159744, 33, 0, 0>; |
| 1454 | def BDNZTLRL : PPC32InstPattern12 <"bdnztlrl", Imm5, Imm2, 616, 0, 33, 0, 0>; |
| 1455 | def BDNZFLRL : PPC32InstPattern12 <"bdnzflrl", Imm5, Imm2, 608, 0, 33, 0, 0>; |
| 1456 | def BDZLRL : PPC32InstPattern11 <"bdzlrl", Imm2, 160256, 33, 0, 0>; |
| 1457 | def BDZTLRL : PPC32InstPattern12 <"bdztlrl", Imm5, Imm2, 618, 0, 33, 0, 0>; |
| 1458 | def BDZFLR : PPC32InstPattern12 <"bdzflr", Imm5, Imm2, 610, 0, 32, 0, 0>; |
| 1459 | def BDZFLRL : PPC32InstPattern12 <"bdzflrl", Imm5, Imm2, 610, 0, 33, 0, 0>; |
| 1460 | def BCTRL : PPC32InstPattern3 <"bctrl", Imm5, Imm5, 19, 1057, 0, 0>; |
| 1461 | def BTCTRL : PPC32InstPattern12 <"btctrl", Imm5, Imm2, 620, 0, 33, 0, 0>; |
| 1462 | def BFCTRL : PPC32InstPattern12 <"bfctrl", Imm5, Imm2, 612, 0, 33, 0, 0>; |
| 1463 | def BLTL : PPC32InstPattern9 <"bltl", Crf, PCRelimm14, 524, 1, 0, 0>; |
| 1464 | def BNL : PPC32InstPattern9 <"bnl", Crf, PCRelimm14, 516, 0, 0, 0>; |
| 1465 | def BLEL : PPC32InstPattern9 <"blel", Crf, PCRelimm14, 516, 1, 0, 0>; |
| 1466 | def BEQL : PPC32InstPattern9 <"beql", Crf, PCRelimm14, 524, 1, 0, 0>; |
| 1467 | def BGEL : PPC32InstPattern9 <"bgel", Crf, PCRelimm14, 516, 1, 0, 0>; |
| 1468 | def BGTL : PPC32InstPattern9 <"bgtl", Crf, PCRelimm14, 524, 1, 0, 0>; |
| 1469 | def BNLL : PPC32InstPattern9 <"bnll", Crf, PCRelimm14, 516, 1, 0, 0>; |
| 1470 | def BNEL : PPC32InstPattern9 <"bnel", Crf, PCRelimm14, 516, 1, 0, 0>; |
| 1471 | def BNGL : PPC32InstPattern9 <"bngl", Crf, PCRelimm14, 516, 1, 0, 0>; |
| 1472 | def BSOL : PPC32InstPattern9 <"bsol", Crf, PCRelimm14, 524, 1, 0, 0>; |
| 1473 | def BNSL : PPC32InstPattern9 <"bnsl", Crf, PCRelimm14, 516, 1, 0, 0>; |
| 1474 | def BUNL : PPC32InstPattern9 <"bunl", Crf, PCRelimm14, 524, 1, 0, 0>; |
| 1475 | def BNUL : PPC32InstPattern9 <"bnul", Crf, PCRelimm14, 516, 1, 0, 0>; |
Misha Brukman | 5fa2b02 | 2004-06-29 23:37:36 +0000 | [diff] [blame] | 1476 | } |
| 1477 | |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 1478 | def CMPI : PPC32InstPattern13 <"cmpi", Imm3, Imm1, Gpr, Simm16, 11, 0, 0, 0>; |
| 1479 | def CMPWI : PPC32InstPattern14 <"cmpwi", Imm3, Gpr, Simm16, 11, 0, 0, 0>; |
| 1480 | def CMPDI : PPC32InstPattern14 <"cmpdi", Imm3, Gpr, Simm16, 11, 1, 0, 0>; |
| 1481 | def CMP : PPC32InstPattern15 <"cmp", Imm3, Imm1, Gpr, Gpr, 31, 0, 0, 0, 0>; |
| 1482 | def CMPW : PPC32InstPattern16 <"cmpw", Imm3, Gpr, Gpr, 31, 0, 0, 0, 0>; |
| 1483 | def CMPD : PPC32InstPattern16 <"cmpd", Imm3, Gpr, Gpr, 31, 1, 0, 0, 0>; |
| 1484 | def CMPLI : PPC32InstPattern13 <"cmpli", Imm3, Imm1, Gpr, Zimm16, 10, 0, 0, 0>; |
| 1485 | def CMPLWI : PPC32InstPattern14 <"cmplwi", Imm3, Gpr, Zimm16, 10, 0, 0, 0>; |
| 1486 | def CMPLDI : PPC32InstPattern14 <"cmpldi", Imm3, Gpr, Zimm16, 10, 1, 0, 0>; |
| 1487 | def CMPL : PPC32InstPattern15 <"cmpl", Imm3, Imm1, Gpr, Gpr, 31, 0, 64, 0, 0>; |
| 1488 | def CMPLW : PPC32InstPattern16 <"cmplw", Imm3, Gpr, Gpr, 31, 0, 64, 0, 0>; |
| 1489 | def CMPLD : PPC32InstPattern16 <"cmpld", Imm3, Gpr, Gpr, 31, 1, 64, 0, 0>; |
| 1490 | def CNTLZW : PPC32InstPattern17 <"cntlzw", Gpr, Gpr, 31, 52, 0, 0>; |
| 1491 | def CNTLZWo : PPC32InstPattern17 <"cntlzw.", Gpr, Gpr, 31, 53, 0, 0>; |
| 1492 | def CNTLZD : PPC32InstPattern17 <"cntlzd", Gpr, Gpr, 31, 116, 1, 0>; |
| 1493 | def CNTLZDo : PPC32InstPattern17 <"cntlzd.", Gpr, Gpr, 31, 117, 1, 0>; |
| 1494 | def CRAND : PPC32InstPattern2 <"crand", Imm5, Imm5, Imm5, 19, 514, 0, 0>; |
| 1495 | def CRANDC : PPC32InstPattern2 <"crandc", Imm5, Imm5, Imm5, 19, 258, 0, 0>; |
| 1496 | def CREQV : PPC32InstPattern2 <"creqv", Imm5, Imm5, Imm5, 19, 578, 0, 0>; |
| 1497 | def CRNAND : PPC32InstPattern2 <"crnand", Imm5, Imm5, Imm5, 19, 450, 0, 0>; |
| 1498 | def CRNOR : PPC32InstPattern2 <"crnor", Imm5, Imm5, Imm5, 19, 66, 0, 0>; |
| 1499 | def CROR : PPC32InstPattern2 <"cror", Imm5, Imm5, Imm5, 19, 898, 0, 0>; |
| 1500 | def CRORC : PPC32InstPattern2 <"crorc", Imm5, Imm5, Imm5, 19, 834, 0, 0>; |
| 1501 | def CRXOR : PPC32InstPattern2 <"crxor", Imm5, Imm5, Imm5, 19, 386, 0, 0>; |
| 1502 | def DIVD : PPC32InstPattern2 <"divd", Gpr, Gpr, Gpr, 31, 978, 1, 0>; |
| 1503 | def DIVDo : PPC32InstPattern2 <"divd.", Gpr, Gpr, Gpr, 31, 979, 1, 0>; |
| 1504 | def DIVDO : PPC32InstPattern2 <"divdo", Gpr, Gpr, Gpr, 31, 978, 1, 0>; |
| 1505 | def DIVDOo : PPC32InstPattern2 <"divdo.", Gpr, Gpr, Gpr, 31, 979, 1, 0>; |
| 1506 | def DIVDU : PPC32InstPattern2 <"divdu", Gpr, Gpr, Gpr, 31, 914, 1, 0>; |
| 1507 | def DIVDUo : PPC32InstPattern2 <"divdu.", Gpr, Gpr, Gpr, 31, 915, 1, 0>; |
| 1508 | def DIVDUO : PPC32InstPattern2 <"divduo", Gpr, Gpr, Gpr, 31, 914, 1, 0>; |
| 1509 | def DIVDUOo : PPC32InstPattern2 <"divduo.", Gpr, Gpr, Gpr, 31, 915, 1, 0>; |
| 1510 | def DIVW : PPC32InstPattern2 <"divw", Gpr, Gpr, Gpr, 31, 982, 0, 0>; |
| 1511 | def DIVWo : PPC32InstPattern2 <"divw.", Gpr, Gpr, Gpr, 31, 983, 0, 0>; |
| 1512 | def DIVWO : PPC32InstPattern2 <"divwo", Gpr, Gpr, Gpr, 31, 982, 0, 0>; |
| 1513 | def DIVWOo : PPC32InstPattern2 <"divwo.", Gpr, Gpr, Gpr, 31, 983, 0, 0>; |
| 1514 | def DIVWU : PPC32InstPattern2 <"divwu", Gpr, Gpr, Gpr, 31, 918, 0, 0>; |
| 1515 | def DIVWUo : PPC32InstPattern2 <"divwu.", Gpr, Gpr, Gpr, 31, 919, 0, 0>; |
| 1516 | def DIVWUO : PPC32InstPattern2 <"divwuo", Gpr, Gpr, Gpr, 31, 918, 0, 0>; |
| 1517 | def DIVWUOo : PPC32InstPattern2 <"divwuo.", Gpr, Gpr, Gpr, 31, 919, 0, 0>; |
| 1518 | def EQV : PPC32InstPattern5 <"eqv", Gpr, Gpr, Gpr, 31, 568, 0, 0>; |
| 1519 | def EQVo : PPC32InstPattern5 <"eqv.", Gpr, Gpr, Gpr, 31, 569, 0, 0>; |
| 1520 | def EXTSB : PPC32InstPattern17 <"extsb", Gpr, Gpr, 31, 1908, 0, 0>; |
| 1521 | def EXTSBo : PPC32InstPattern17 <"extsb.", Gpr, Gpr, 31, 1909, 0, 0>; |
| 1522 | def EXTSH : PPC32InstPattern17 <"extsh", Gpr, Gpr, 31, 1844, 0, 0>; |
| 1523 | def EXTSHo : PPC32InstPattern17 <"extsh.", Gpr, Gpr, 31, 1845, 0, 0>; |
| 1524 | def EXTSW : PPC32InstPattern17 <"extsw", Gpr, Gpr, 31, 1972, 1, 0>; |
| 1525 | def EXTSWo : PPC32InstPattern17 <"extsw.", Gpr, Gpr, 31, 1973, 1, 0>; |
| 1526 | def FADD : PPC32InstPattern2 <"fadd", Fpr, Fpr, Fpr, 63, 42, 0, 0>; |
| 1527 | def FADDo : PPC32InstPattern2 <"fadd.", Fpr, Fpr, Fpr, 63, 43, 0, 0>; |
| 1528 | def FADDS : PPC32InstPattern2 <"fadds", Fpr, Fpr, Fpr, 59, 42, 0, 0>; |
| 1529 | def FADDSo : PPC32InstPattern2 <"fadds.", Fpr, Fpr, Fpr, 59, 43, 0, 0>; |
| 1530 | def FSUB : PPC32InstPattern2 <"fsub", Fpr, Fpr, Fpr, 63, 40, 0, 0>; |
| 1531 | def FSUBo : PPC32InstPattern2 <"fsub.", Fpr, Fpr, Fpr, 63, 41, 0, 0>; |
| 1532 | def FSUBS : PPC32InstPattern2 <"fsubs", Fpr, Fpr, Fpr, 59, 40, 0, 0>; |
| 1533 | def FSUBSo : PPC32InstPattern2 <"fsubs.", Fpr, Fpr, Fpr, 59, 41, 0, 0>; |
| 1534 | def FMUL : PPC32InstPattern18 <"fmul", Fpr, Fpr, Fpr, 63, 0, 18, 0, 0>; |
| 1535 | def FMULo : PPC32InstPattern18 <"fmul.", Fpr, Fpr, Fpr, 63, 0, 19, 0, 0>; |
| 1536 | def FMULS : PPC32InstPattern18 <"fmuls", Fpr, Fpr, Fpr, 59, 0, 18, 0, 0>; |
| 1537 | def FMULSo : PPC32InstPattern18 <"fmuls.", Fpr, Fpr, Fpr, 59, 0, 19, 0, 0>; |
| 1538 | def FDIV : PPC32InstPattern2 <"fdiv", Fpr, Fpr, Fpr, 63, 36, 0, 0>; |
| 1539 | def FDIVo : PPC32InstPattern2 <"fdiv.", Fpr, Fpr, Fpr, 63, 37, 0, 0>; |
| 1540 | def FDIVS : PPC32InstPattern2 <"fdivs", Fpr, Fpr, Fpr, 59, 36, 0, 0>; |
| 1541 | def FDIVSo : PPC32InstPattern2 <"fdivs.", Fpr, Fpr, Fpr, 59, 37, 0, 0>; |
| 1542 | def FMADD : PPC32InstPattern19 <"fmadd", Fpr, Fpr, Fpr, Fpr, 63, 26, 0, 0>; |
| 1543 | def FMADDo : PPC32InstPattern19 <"fmadd.", Fpr, Fpr, Fpr, Fpr, 63, 27, 0, 0>; |
| 1544 | def FMADDS : PPC32InstPattern19 <"fmadds", Fpr, Fpr, Fpr, Fpr, 59, 26, 0, 0>; |
| 1545 | def FMADDSo : PPC32InstPattern19 <"fmadds.", Fpr, Fpr, Fpr, Fpr, 59, 27, 0, 0>; |
| 1546 | def FMSUB : PPC32InstPattern19 <"fmsub", Fpr, Fpr, Fpr, Fpr, 63, 24, 0, 0>; |
| 1547 | def FMSUBo : PPC32InstPattern19 <"fmsub.", Fpr, Fpr, Fpr, Fpr, 63, 25, 0, 0>; |
| 1548 | def FMSUBS : PPC32InstPattern19 <"fmsubs", Fpr, Fpr, Fpr, Fpr, 59, 24, 0, 0>; |
| 1549 | def FMSUBSo : PPC32InstPattern19 <"fmsubs.", Fpr, Fpr, Fpr, Fpr, 59, 25, 0, 0>; |
| 1550 | def FNMADD : PPC32InstPattern19 <"fnmadd", Fpr, Fpr, Fpr, Fpr, 63, 30, 0, 0>; |
| 1551 | def FNMADDo : PPC32InstPattern19 <"fnmadd.", Fpr, Fpr, Fpr, Fpr, 63, 31, 0, 0>; |
| 1552 | def FNMADDS : PPC32InstPattern19 <"fnmadds", Fpr, Fpr, Fpr, Fpr, 59, 30, 0, 0>; |
| 1553 | def FNMADDSo : PPC32InstPattern19 <"fnmadds.", Fpr, Fpr, Fpr, Fpr, 59, 31, 0, 0>; |
| 1554 | def FNMSUB : PPC32InstPattern19 <"fnmsub", Fpr, Fpr, Fpr, Fpr, 63, 28, 0, 0>; |
| 1555 | def FNMSUBo : PPC32InstPattern19 <"fnmsub.", Fpr, Fpr, Fpr, Fpr, 63, 29, 0, 0>; |
| 1556 | def FNMSUBS : PPC32InstPattern19 <"fnmsubs", Fpr, Fpr, Fpr, Fpr, 59, 28, 0, 0>; |
| 1557 | def FNMSUBSo : PPC32InstPattern19 <"fnmsubs.", Fpr, Fpr, Fpr, Fpr, 59, 29, 0, 0>; |
| 1558 | def FMR : PPC32InstPattern20 <"fmr", Fpr, Fpr, 63, 0, 144, 0, 0>; |
| 1559 | def FMRo : PPC32InstPattern20 <"fmr.", Fpr, Fpr, 63, 0, 145, 0, 0>; |
| 1560 | def FABS : PPC32InstPattern20 <"fabs", Fpr, Fpr, 63, 0, 528, 0, 0>; |
| 1561 | def FABSo : PPC32InstPattern20 <"fabs.", Fpr, Fpr, 63, 0, 529, 0, 0>; |
| 1562 | def FNEG : PPC32InstPattern20 <"fneg", Fpr, Fpr, 63, 0, 80, 0, 0>; |
| 1563 | def FNEGo : PPC32InstPattern20 <"fneg.", Fpr, Fpr, 63, 0, 81, 0, 0>; |
| 1564 | def FNABS : PPC32InstPattern20 <"fnabs", Fpr, Fpr, 63, 0, 272, 0, 0>; |
| 1565 | def FNABSo : PPC32InstPattern20 <"fnabs.", Fpr, Fpr, 63, 0, 273, 0, 0>; |
| 1566 | def FRES : PPC32InstPattern20 <"fres", Fpr, Fpr, 59, 0, 48, 0, 0>; |
| 1567 | def FRESo : PPC32InstPattern20 <"fres.", Fpr, Fpr, 59, 0, 49, 0, 0>; |
| 1568 | def FRSP : PPC32InstPattern20 <"frsp", Fpr, Fpr, 63, 0, 24, 0, 0>; |
| 1569 | def FRSPo : PPC32InstPattern20 <"frsp.", Fpr, Fpr, 63, 0, 25, 0, 0>; |
| 1570 | def FRSQRTE : PPC32InstPattern20 <"frsqrte", Fpr, Fpr, 63, 0, 52, 0, 0>; |
| 1571 | def FRSQRTEo : PPC32InstPattern20 <"frsqrte.", Fpr, Fpr, 63, 0, 53, 0, 0>; |
| 1572 | def FSEL : PPC32InstPattern19 <"fsel", Fpr, Fpr, Fpr, Fpr, 63, 14, 0, 0>; |
| 1573 | def FSELo : PPC32InstPattern19 <"fsel.", Fpr, Fpr, Fpr, Fpr, 63, 15, 0, 0>; |
| 1574 | def FSQRT : PPC32InstPattern20 <"fsqrt", Fpr, Fpr, 63, 0, 44, 0, 0>; |
| 1575 | def FSQRTo : PPC32InstPattern20 <"fsqrt.", Fpr, Fpr, 63, 0, 45, 0, 0>; |
| 1576 | def FSQRTS : PPC32InstPattern20 <"fsqrts", Fpr, Fpr, 59, 0, 44, 0, 0>; |
| 1577 | def FSQRTSo : PPC32InstPattern20 <"fsqrts.", Fpr, Fpr, 59, 0, 45, 0, 0>; |
| 1578 | def FCTID : PPC32InstPattern20 <"fctid", Fpr, Fpr, 63, 0, 604, 1, 0>; |
| 1579 | def FCTIDo : PPC32InstPattern20 <"fctid.", Fpr, Fpr, 63, 0, 605, 1, 0>; |
| 1580 | def FCTIDZ : PPC32InstPattern20 <"fctidz", Fpr, Fpr, 63, 0, 606, 1, 0>; |
| 1581 | def FCTIDZo : PPC32InstPattern20 <"fctidz.", Fpr, Fpr, 63, 0, 607, 1, 0>; |
| 1582 | def FCTIW : PPC32InstPattern20 <"fctiw", Fpr, Fpr, 63, 0, 28, 0, 0>; |
| 1583 | def FCTIWo : PPC32InstPattern20 <"fctiw.", Fpr, Fpr, 63, 0, 29, 0, 0>; |
| 1584 | def FCTIWZ : PPC32InstPattern20 <"fctiwz", Fpr, Fpr, 63, 0, 30, 0, 0>; |
| 1585 | def FCTIWZo : PPC32InstPattern20 <"fctiwz.", Fpr, Fpr, 63, 0, 31, 0, 0>; |
| 1586 | def FCFID : PPC32InstPattern20 <"fcfid", Fpr, Fpr, 63, 0, 668, 1, 0>; |
| 1587 | def FCFIDo : PPC32InstPattern20 <"fcfid.", Fpr, Fpr, 63, 0, 669, 1, 0>; |
| 1588 | def FCMPU : PPC32InstPattern16 <"fcmpu", Imm3, Fpr, Fpr, 63, 0, 0, 0, 0>; |
| 1589 | def FCMPO : PPC32InstPattern16 <"fcmpo", Imm3, Fpr, Fpr, 63, 0, 64, 0, 0>; |
| 1590 | def MFFS : PPC32InstPattern21 <"mffs", Fpr, 63, 1166, 0, 0>; |
| 1591 | def MFFSo : PPC32InstPattern21 <"mffs.", Fpr, 63, 1167, 0, 0>; |
| 1592 | def MCRFS : PPC32InstPattern22 <"mcrfs", Imm3, Imm5, 63, 128, 0, 0>; |
| 1593 | def MTFSFI : PPC32InstPattern23 <"mtfsfi", Imm3, Imm4, 63, 0, 268, 0, 0>; |
| 1594 | def MTFSFIo : PPC32InstPattern23 <"mtfsfi.", Imm3, Imm4, 63, 0, 269, 0, 0>; |
| 1595 | def MTFSF : PPC32InstPattern24 <"mtfsf", Imm8, Fpr, 126, 0, 398, 0, 0>; |
| 1596 | def MTFSFo : PPC32InstPattern24 <"mtfsf.", Imm8, Fpr, 126, 0, 399, 0, 0>; |
| 1597 | def MTFSB0 : PPC32InstPattern21 <"mtfsb0", Imm5, 63, 140, 0, 0>; |
| 1598 | def MTFSB0o : PPC32InstPattern21 <"mtfsb0.", Imm5, 63, 141, 0, 0>; |
| 1599 | def MTFSB1 : PPC32InstPattern21 <"mtfsb1", Imm5, 63, 76, 0, 0>; |
| 1600 | def MTFSB1o : PPC32InstPattern21 <"mtfsb1.", Imm5, 63, 77, 0, 0>; |
| 1601 | def LBZ : PPC32InstPattern25 <"lbz", Gpr, Disimm16, Gpr0, 34, 0, 0>; |
| 1602 | def LBZX : PPC32InstPattern2 <"lbzx", Gpr, Gpr0, Gpr, 31, 174, 0, 0>; |
| 1603 | def LBZU : PPC32InstPattern25 <"lbzu", Gpr, Disimm16, Gpr0, 35, 0, 0>; |
| 1604 | def LBZUX : PPC32InstPattern2 <"lbzux", Gpr, Gpr, Gpr, 31, 238, 0, 0>; |
| 1605 | def LHZ : PPC32InstPattern25 <"lhz", Gpr, Disimm16, Gpr0, 40, 0, 0>; |
| 1606 | def LHZX : PPC32InstPattern2 <"lhzx", Gpr, Gpr0, Gpr, 31, 558, 0, 0>; |
| 1607 | def LHZU : PPC32InstPattern25 <"lhzu", Gpr, Disimm16, Gpr0, 41, 0, 0>; |
| 1608 | def LHZUX : PPC32InstPattern2 <"lhzux", Gpr, Gpr, Gpr, 31, 622, 0, 0>; |
| 1609 | def LHA : PPC32InstPattern25 <"lha", Gpr, Disimm16, Gpr0, 42, 0, 0>; |
| 1610 | def LHAX : PPC32InstPattern2 <"lhax", Gpr, Gpr0, Gpr, 31, 686, 0, 0>; |
| 1611 | def LHAU : PPC32InstPattern25 <"lhau", Gpr, Disimm16, Gpr, 43, 0, 0>; |
| 1612 | def LHAUX : PPC32InstPattern2 <"lhaux", Gpr, Gpr, Gpr, 31, 750, 0, 0>; |
| 1613 | def LWZ : PPC32InstPattern25 <"lwz", Gpr, Disimm16, Gpr0, 32, 0, 0>; |
| 1614 | def LWZX : PPC32InstPattern2 <"lwzx", Gpr, Gpr0, Gpr, 31, 46, 0, 0>; |
| 1615 | def LWZU : PPC32InstPattern25 <"lwzu", Gpr, Disimm16, Gpr, 33, 0, 0>; |
| 1616 | def LWZUX : PPC32InstPattern2 <"lwzux", Gpr, Gpr, Gpr, 31, 110, 0, 0>; |
| 1617 | def LWA : PPC32InstPattern26 <"lwa", Gpr, Disimm14, Gpr0, 58, 0, 1, 0>; |
| 1618 | def LWAX : PPC32InstPattern2 <"lwax", Gpr, Gpr0, Gpr, 31, 682, 1, 0>; |
| 1619 | def LWAUX : PPC32InstPattern2 <"lwaux", Gpr, Gpr, Gpr, 31, 746, 1, 0>; |
| 1620 | def LD : PPC32InstPattern26 <"ld", Gpr, Disimm14, Gpr0, 58, 0, 1, 0>; |
| 1621 | def LDX : PPC32InstPattern2 <"ldx", Gpr, Gpr0, Gpr, 31, 42, 1, 0>; |
| 1622 | def LDU : PPC32InstPattern26 <"ldu", Gpr, Disimm14, Gpr, 58, 1, 1, 0>; |
| 1623 | def LDUX : PPC32InstPattern2 <"ldux", Gpr, Gpr, Gpr, 31, 106, 1, 0>; |
| 1624 | def LMW : PPC32InstPattern25 <"lmw", Gpr, Disimm16, Gpr0, 46, 0, 0>; |
| 1625 | def STMW : PPC32InstPattern25 <"stmw", Gpr, Disimm16, Gpr0, 47, 0, 0>; |
| 1626 | def LHBRX : PPC32InstPattern2 <"lhbrx", Gpr, Gpr0, Gpr, 31, 556, 0, 0>; |
| 1627 | def LWBRX : PPC32InstPattern2 <"lwbrx", Gpr, Gpr0, Gpr, 31, 44, 0, 0>; |
| 1628 | def LSWX : PPC32InstPattern2 <"lswx", Gpr, Gpr0, Gpr, 31, 42, 0, 0>; |
| 1629 | def LWARX : PPC32InstPattern2 <"lwarx", Gpr, Gpr0, Gpr, 31, 40, 0, 0>; |
| 1630 | def LDARX : PPC32InstPattern2 <"ldarx", Gpr, Gpr0, Gpr, 31, 168, 1, 0>; |
| 1631 | def LSWI : PPC32InstPattern2 <"lswi", Gpr, Gpr0, Imm5, 31, 170, 0, 0>; |
| 1632 | def LFS : PPC32InstPattern25 <"lfs", Fpr, Disimm16, Gpr0, 48, 0, 0>; |
| 1633 | def LFSU : PPC32InstPattern25 <"lfsu", Fpr, Disimm16, Gpr, 49, 0, 0>; |
| 1634 | def LFSX : PPC32InstPattern2 <"lfsx", Fpr, Gpr0, Gpr, 31, 46, 0, 0>; |
| 1635 | def LFSUX : PPC32InstPattern2 <"lfsux", Fpr, Gpr, Gpr, 31, 110, 0, 0>; |
| 1636 | def LFD : PPC32InstPattern25 <"lfd", Fpr, Disimm16, Gpr0, 50, 0, 0>; |
| 1637 | def LFDU : PPC32InstPattern25 <"lfdu", Fpr, Disimm16, Gpr, 51, 0, 0>; |
| 1638 | def LFDX : PPC32InstPattern2 <"lfdx", Fpr, Gpr0, Gpr, 31, 174, 0, 0>; |
| 1639 | def LFDUX : PPC32InstPattern2 <"lfdux", Fpr, Gpr, Gpr, 31, 238, 0, 0>; |
| 1640 | def LA : PPC32InstPattern25 <"la", Gpr, Disimm16, Gpr0, 14, 0, 0>; |
| 1641 | def MCRF : PPC32InstPattern27 <"mcrf", Imm3, Imm3, 19, 0, 0, 0, 0>; |
| 1642 | def MFSPR : PPC32InstPattern28 <"mfspr", Gpr, Spr, 31, 678, 0, 0>; |
| 1643 | def MTSPR : PPC32InstPattern29 <"mtspr", Spr, Gpr, 31, 934, 0, 0>; |
| 1644 | def MTCRF : PPC32InstPattern30 <"mtcrf", Imm8, Gpr, 31, 0, 288, 0, 0>; |
| 1645 | def MCRXR : PPC32InstPattern31 <"mcrxr", Imm3, 31, 1024, 0, 0>; |
| 1646 | def MFCR : PPC32InstPattern32 <"mfcr", Gpr, Imm8, 31, 0, 38, 0, 0>; |
| 1647 | def MFXER : PPC32InstPattern21 <"mfxer", Gpr, 31, 66214, 0, 0>; |
| 1648 | def MFLR : PPC32InstPattern21 <"mflr", Gpr, 31, 524966, 0, 0>; |
| 1649 | def MFCTR : PPC32InstPattern21 <"mfctr", Gpr, 31, 590502, 0, 0>; |
| 1650 | def MTXER : PPC32InstPattern21 <"mtxer", Gpr, 31, 66470, 0, 0>; |
| 1651 | def MTLR : PPC32InstPattern21 <"mtlr", Gpr, 31, 525222, 0, 0>; |
| 1652 | def MTCTR : PPC32InstPattern21 <"mtctr", Gpr, 31, 590758, 0, 0>; |
| 1653 | def MFMQ : PPC32InstPattern21 <"mfmq", Gpr, 31, 678, 0, 0>; |
| 1654 | def MFRTCL : PPC32InstPattern21 <"mfrtcl", Gpr, 31, 328358, 0, 0>; |
| 1655 | def MFRTCU : PPC32InstPattern21 <"mfrtcu", Gpr, 31, 262822, 0, 0>; |
| 1656 | def MTMQ : PPC32InstPattern21 <"mtmq", Gpr, 31, 934, 0, 0>; |
| 1657 | def MTRTCL : PPC32InstPattern21 <"mtrtcl", Gpr, 31, 328614, 0, 0>; |
| 1658 | def MTRTCU : PPC32InstPattern21 <"mtrtcu", Gpr, 31, 263078, 0, 0>; |
| 1659 | def MULLW : PPC32InstPattern2 <"mullw", Gpr, Gpr, Gpr, 31, 470, 0, 0>; |
| 1660 | def MULLWo : PPC32InstPattern2 <"mullw.", Gpr, Gpr, Gpr, 31, 471, 0, 0>; |
| 1661 | def MULLWO : PPC32InstPattern2 <"mullwo", Gpr, Gpr, Gpr, 31, 470, 0, 0>; |
| 1662 | def MULLWOo : PPC32InstPattern2 <"mullwo.", Gpr, Gpr, Gpr, 31, 471, 0, 0>; |
| 1663 | def MULHD : PPC32InstPattern2 <"mulhd", Gpr, Gpr, Gpr, 31, 146, 1, 0>; |
| 1664 | def MULHDo : PPC32InstPattern2 <"mulhd.", Gpr, Gpr, Gpr, 31, 147, 1, 0>; |
| 1665 | def MULHW : PPC32InstPattern2 <"mulhw", Gpr, Gpr, Gpr, 31, 150, 0, 0>; |
| 1666 | def MULHWo : PPC32InstPattern2 <"mulhw.", Gpr, Gpr, Gpr, 31, 151, 0, 0>; |
| 1667 | def MULHDU : PPC32InstPattern2 <"mulhdu", Gpr, Gpr, Gpr, 31, 18, 1, 0>; |
| 1668 | def MULHDUo : PPC32InstPattern2 <"mulhdu.", Gpr, Gpr, Gpr, 31, 19, 1, 0>; |
| 1669 | def MULHWU : PPC32InstPattern2 <"mulhwu", Gpr, Gpr, Gpr, 31, 22, 0, 0>; |
| 1670 | def MULHWUo : PPC32InstPattern2 <"mulhwu.", Gpr, Gpr, Gpr, 31, 23, 0, 0>; |
| 1671 | def MULLD : PPC32InstPattern2 <"mulld", Gpr, Gpr, Gpr, 31, 466, 1, 0>; |
| 1672 | def MULLDo : PPC32InstPattern2 <"mulld.", Gpr, Gpr, Gpr, 31, 467, 1, 0>; |
| 1673 | def MULLDO : PPC32InstPattern2 <"mulldo", Gpr, Gpr, Gpr, 31, 466, 1, 0>; |
| 1674 | def MULLDOo : PPC32InstPattern2 <"mulldo.", Gpr, Gpr, Gpr, 31, 467, 1, 0>; |
| 1675 | def NAND : PPC32InstPattern5 <"nand", Gpr, Gpr, Gpr, 31, 952, 0, 0>; |
| 1676 | def NANDo : PPC32InstPattern5 <"nand.", Gpr, Gpr, Gpr, 31, 953, 0, 0>; |
| 1677 | def NEG : PPC32InstPattern3 <"neg", Gpr, Gpr, 31, 208, 0, 0>; |
| 1678 | def NEGo : PPC32InstPattern3 <"neg.", Gpr, Gpr, 31, 209, 0, 0>; |
| 1679 | def NEGO : PPC32InstPattern3 <"nego", Gpr, Gpr, 31, 1232, 0, 0>; |
| 1680 | def NEGOo : PPC32InstPattern3 <"nego.", Gpr, Gpr, 31, 1233, 0, 0>; |
| 1681 | def NOR : PPC32InstPattern5 <"nor", Gpr, Gpr, Gpr, 31, 248, 0, 0>; |
| 1682 | def NORo : PPC32InstPattern5 <"nor.", Gpr, Gpr, Gpr, 31, 249, 0, 0>; |
| 1683 | def NOP : PPC32InstPattern33 <"nop", 1610612736, 0, 0>; |
| 1684 | def ORI : PPC32InstPattern4 <"ori", Gpr, Gpr, Zimm16, 24, 0, 0>; |
| 1685 | def ORIS : PPC32InstPattern4 <"oris", Gpr, Gpr, Zimm16, 25, 0, 0>; |
| 1686 | def OR : PPC32InstPattern5 <"or", Gpr, Gpr, Gpr, 31, 888, 0, 0>; |
| 1687 | def ORo : PPC32InstPattern5 <"or.", Gpr, Gpr, Gpr, 31, 889, 0, 0>; |
| 1688 | def ORC : PPC32InstPattern5 <"orc", Gpr, Gpr, Gpr, 31, 824, 0, 0>; |
| 1689 | def ORCo : PPC32InstPattern5 <"orc.", Gpr, Gpr, Gpr, 31, 825, 0, 0>; |
| 1690 | def RLDICL : PPC32InstPattern17 <"rldicl", Gpr, Gpr, 30, 0, 1, 0>; |
| 1691 | def RLDICLo : PPC32InstPattern17 <"rldicl.", Gpr, Gpr, 30, 1, 1, 0>; |
| 1692 | def RLDICR : PPC32InstPattern17 <"rldicr", Gpr, Gpr, 30, 4, 1, 0>; |
| 1693 | def RLDICRo : PPC32InstPattern17 <"rldicr.", Gpr, Gpr, 30, 5, 1, 0>; |
| 1694 | def RLDIC : PPC32InstPattern17 <"rldic", Gpr, Gpr, 30, 8, 1, 0>; |
| 1695 | def RLDICo : PPC32InstPattern17 <"rldic.", Gpr, Gpr, 30, 9, 1, 0>; |
| 1696 | def RLDIMI : PPC32InstPattern17 <"rldimi", Gpr, Gpr, 30, 12, 1, 0>; |
| 1697 | def RLDIMIo : PPC32InstPattern17 <"rldimi.", Gpr, Gpr, 30, 13, 1, 0>; |
| 1698 | def RLDCL : PPC32InstPattern5 <"rldcl", Gpr, Gpr, Gpr, 30, 16, 1, 0>; |
| 1699 | def RLDCLo : PPC32InstPattern5 <"rldcl.", Gpr, Gpr, Gpr, 30, 17, 1, 0>; |
| 1700 | def RLDCR : PPC32InstPattern5 <"rldcr", Gpr, Gpr, Gpr, 30, 18, 1, 0>; |
| 1701 | def RLDCRo : PPC32InstPattern5 <"rldcr.", Gpr, Gpr, Gpr, 30, 19, 1, 0>; |
| 1702 | def RLWINM : PPC32InstPattern34 <"rlwinm", Gpr, Gpr, Imm5, Imm5, Imm5, 21, 0, 0, 0>; |
| 1703 | def RLWINMo : PPC32InstPattern34 <"rlwinm.", Gpr, Gpr, Imm5, Imm5, Imm5, 21, 0, 0, 0>; |
| 1704 | def RLWNM : PPC32InstPattern34 <"rlwnm", Gpr, Gpr, Gpr, Imm5, Imm5, 23, 0, 0, 0>; |
| 1705 | def RLWNMo : PPC32InstPattern34 <"rlwnm.", Gpr, Gpr, Gpr, Imm5, Imm5, 23, 0, 0, 0>; |
| 1706 | def RLWIMI : PPC32InstPattern34 <"rlwimi", Gpr, Gpr, Imm5, Imm5, Imm5, 20, 0, 0, 0>; |
| 1707 | def RLWIMIo : PPC32InstPattern34 <"rlwimi.", Gpr, Gpr, Imm5, Imm5, Imm5, 20, 0, 0, 0>; |
| 1708 | def SC : PPC32InstPattern33 <"sc", 1140850690, 0, 0>; |
| 1709 | def RFID : PPC32InstPattern33 <"rfid", 1275068452, 1, 0>; |
| 1710 | def SLW : PPC32InstPattern5 <"slw", Gpr, Gpr, Gpr, 31, 48, 0, 0>; |
| 1711 | def SLWo : PPC32InstPattern5 <"slw.", Gpr, Gpr, Gpr, 31, 49, 0, 0>; |
| 1712 | def SLD : PPC32InstPattern5 <"sld", Gpr, Gpr, Gpr, 31, 54, 1, 0>; |
| 1713 | def SLDo : PPC32InstPattern5 <"sld.", Gpr, Gpr, Gpr, 31, 55, 1, 0>; |
| 1714 | def SRW : PPC32InstPattern5 <"srw", Gpr, Gpr, Gpr, 31, 48, 0, 0>; |
| 1715 | def SRWo : PPC32InstPattern5 <"srw.", Gpr, Gpr, Gpr, 31, 49, 0, 0>; |
| 1716 | def SRD : PPC32InstPattern5 <"srd", Gpr, Gpr, Gpr, 31, 54, 1, 0>; |
| 1717 | def SRDo : PPC32InstPattern5 <"srd.", Gpr, Gpr, Gpr, 31, 55, 1, 0>; |
| 1718 | def SRAWI : PPC32InstPattern5 <"srawi", Gpr, Gpr, Imm5, 31, 624, 0, 0>; |
| 1719 | def SRAWIo : PPC32InstPattern5 <"srawi.", Gpr, Gpr, Imm5, 31, 625, 0, 0>; |
| 1720 | def SRADI : PPC32InstPattern17 <"sradi", Gpr, Gpr, 31, 1652, 1, 0>; |
| 1721 | def SRADIo : PPC32InstPattern17 <"sradi.", Gpr, Gpr, 31, 1653, 1, 0>; |
| 1722 | def SRAW : PPC32InstPattern5 <"sraw", Gpr, Gpr, Gpr, 31, 560, 0, 0>; |
| 1723 | def SRAWo : PPC32InstPattern5 <"sraw.", Gpr, Gpr, Gpr, 31, 561, 0, 0>; |
| 1724 | def SRAD : PPC32InstPattern5 <"srad", Gpr, Gpr, Gpr, 31, 564, 1, 0>; |
| 1725 | def SRADo : PPC32InstPattern5 <"srad.", Gpr, Gpr, Gpr, 31, 565, 1, 0>; |
| 1726 | def STB : PPC32InstPattern25 <"stb", Gpr, Disimm16, Gpr0, 38, 0, 0>; |
| 1727 | def STBU : PPC32InstPattern25 <"stbu", Gpr, Disimm16, Gpr, 39, 0, 0>; |
| 1728 | def STBX : PPC32InstPattern2 <"stbx", Gpr, Gpr0, Gpr, 31, 430, 0, 0>; |
| 1729 | def STBUX : PPC32InstPattern2 <"stbux", Gpr, Gpr, Gpr, 31, 494, 0, 0>; |
| 1730 | def STH : PPC32InstPattern25 <"sth", Gpr, Disimm16, Gpr0, 44, 0, 0>; |
| 1731 | def STHU : PPC32InstPattern25 <"sthu", Gpr, Disimm16, Gpr, 45, 0, 0>; |
| 1732 | def STHX : PPC32InstPattern2 <"sthx", Gpr, Gpr0, Gpr, 31, 814, 0, 0>; |
| 1733 | def STHUX : PPC32InstPattern2 <"sthux", Gpr, Gpr, Gpr, 31, 878, 0, 0>; |
| 1734 | def STW : PPC32InstPattern25 <"stw", Gpr, Disimm16, Gpr0, 36, 0, 0>; |
| 1735 | def STWU : PPC32InstPattern25 <"stwu", Gpr, Disimm16, Gpr, 37, 0, 0>; |
| 1736 | def STWX : PPC32InstPattern2 <"stwx", Gpr, Gpr0, Gpr, 31, 302, 0, 0>; |
| 1737 | def STWUX : PPC32InstPattern2 <"stwux", Gpr, Gpr, Gpr, 31, 366, 0, 0>; |
| 1738 | def STD : PPC32InstPattern26 <"std", Gpr, Disimm14, Gpr0, 62, 0, 1, 0>; |
| 1739 | def STDU : PPC32InstPattern26 <"stdu", Gpr, Disimm14, Gpr, 62, 1, 1, 0>; |
| 1740 | def STDX : PPC32InstPattern2 <"stdx", Gpr, Gpr0, Gpr, 31, 298, 1, 0>; |
| 1741 | def STDUX : PPC32InstPattern2 <"stdux", Gpr, Gpr, Gpr, 31, 362, 1, 0>; |
| 1742 | def STHBRX : PPC32InstPattern2 <"sthbrx", Gpr, Gpr0, Gpr, 31, 812, 0, 0>; |
| 1743 | def STWBRX : PPC32InstPattern2 <"stwbrx", Gpr, Gpr0, Gpr, 31, 300, 0, 0>; |
| 1744 | def STSWX : PPC32InstPattern2 <"stswx", Gpr, Gpr0, Gpr, 31, 298, 0, 0>; |
| 1745 | def STWCXo : PPC32InstPattern2 <"stwcx.", Gpr, Gpr0, Gpr, 31, 301, 0, 0>; |
| 1746 | def STDCXo : PPC32InstPattern2 <"stdcx.", Gpr, Gpr0, Gpr, 31, 429, 1, 0>; |
| 1747 | def STSWI : PPC32InstPattern2 <"stswi", Gpr, Gpr0, Imm5, 31, 426, 0, 0>; |
| 1748 | def STFIWX : PPC32InstPattern2 <"stfiwx", Fpr, Gpr0, Gpr, 31, 942, 0, 0>; |
| 1749 | def STFS : PPC32InstPattern25 <"stfs", Fpr, Disimm16, Gpr0, 52, 0, 0>; |
| 1750 | def STFSU : PPC32InstPattern25 <"stfsu", Fpr, Disimm16, Gpr, 53, 0, 0>; |
| 1751 | def STFSX : PPC32InstPattern2 <"stfsx", Fpr, Gpr0, Gpr, 31, 302, 0, 0>; |
| 1752 | def STFSUX : PPC32InstPattern2 <"stfsux", Fpr, Gpr, Gpr, 31, 366, 0, 0>; |
| 1753 | def STFD : PPC32InstPattern25 <"stfd", Fpr, Disimm16, Gpr0, 54, 0, 0>; |
| 1754 | def STFDU : PPC32InstPattern25 <"stfdu", Fpr, Disimm16, Gpr, 55, 0, 0>; |
| 1755 | def STFDX : PPC32InstPattern2 <"stfdx", Fpr, Gpr0, Gpr, 31, 430, 0, 0>; |
| 1756 | def STFDUX : PPC32InstPattern2 <"stfdux", Fpr, Gpr, Gpr, 31, 494, 0, 0>; |
| 1757 | def SUBFIC : PPC32InstPattern0 <"subfic", Gpr, Gpr, Simm16, 8, 0, 0>; |
| 1758 | def SUB : PPC32InstPattern35 <"sub", Gpr, Gpr, Gpr, 31, 80, 0, 0>; |
| 1759 | def SUBo : PPC32InstPattern35 <"sub.", Gpr, Gpr, Gpr, 31, 81, 0, 0>; |
| 1760 | def SUBO : PPC32InstPattern35 <"subo", Gpr, Gpr, Gpr, 31, 80, 0, 0>; |
| 1761 | def SUBOo : PPC32InstPattern35 <"subo.", Gpr, Gpr, Gpr, 31, 81, 0, 0>; |
| 1762 | def SUBF : PPC32InstPattern2 <"subf", Gpr, Gpr, Gpr, 31, 80, 0, 0>; |
| 1763 | def SUBFo : PPC32InstPattern2 <"subf.", Gpr, Gpr, Gpr, 31, 81, 0, 0>; |
| 1764 | def SUBFO : PPC32InstPattern2 <"subfo", Gpr, Gpr, Gpr, 31, 80, 0, 0>; |
| 1765 | def SUBFOo : PPC32InstPattern2 <"subfo.", Gpr, Gpr, Gpr, 31, 81, 0, 0>; |
| 1766 | def SUBC : PPC32InstPattern35 <"subc", Gpr, Gpr, Gpr, 31, 16, 0, 0>; |
| 1767 | def SUBCo : PPC32InstPattern35 <"subc.", Gpr, Gpr, Gpr, 31, 17, 0, 0>; |
| 1768 | def SUBCO : PPC32InstPattern35 <"subco", Gpr, Gpr, Gpr, 31, 16, 0, 0>; |
| 1769 | def SUBCOo : PPC32InstPattern35 <"subco.", Gpr, Gpr, Gpr, 31, 17, 0, 0>; |
| 1770 | def SUBFC : PPC32InstPattern2 <"subfc", Gpr, Gpr, Gpr, 31, 16, 0, 0>; |
| 1771 | def SUBFCo : PPC32InstPattern2 <"subfc.", Gpr, Gpr, Gpr, 31, 17, 0, 0>; |
| 1772 | def SUBFCO : PPC32InstPattern2 <"subfco", Gpr, Gpr, Gpr, 31, 16, 0, 0>; |
| 1773 | def SUBFCOo : PPC32InstPattern2 <"subfco.", Gpr, Gpr, Gpr, 31, 17, 0, 0>; |
| 1774 | def SUBFE : PPC32InstPattern2 <"subfe", Gpr, Gpr, Gpr, 31, 272, 0, 0>; |
| 1775 | def SUBFEo : PPC32InstPattern2 <"subfe.", Gpr, Gpr, Gpr, 31, 273, 0, 0>; |
| 1776 | def SUBFEO : PPC32InstPattern2 <"subfeo", Gpr, Gpr, Gpr, 31, 272, 0, 0>; |
| 1777 | def SUBFEOo : PPC32InstPattern2 <"subfeo.", Gpr, Gpr, Gpr, 31, 273, 0, 0>; |
| 1778 | def SUBFME : PPC32InstPattern3 <"subfme", Gpr, Gpr, 31, 464, 0, 0>; |
| 1779 | def SUBFMEo : PPC32InstPattern3 <"subfme.", Gpr, Gpr, 31, 465, 0, 0>; |
| 1780 | def SUBFMEO : PPC32InstPattern3 <"subfmeo", Gpr, Gpr, 31, 1488, 0, 0>; |
| 1781 | def SUBFMEOo : PPC32InstPattern3 <"subfmeo.", Gpr, Gpr, 31, 1489, 0, 0>; |
| 1782 | def SUBFZE : PPC32InstPattern3 <"subfze", Gpr, Gpr, 31, 400, 0, 0>; |
| 1783 | def SUBFZEo : PPC32InstPattern3 <"subfze.", Gpr, Gpr, 31, 401, 0, 0>; |
| 1784 | def SUBFZEO : PPC32InstPattern3 <"subfzeo", Gpr, Gpr, 31, 1424, 0, 0>; |
| 1785 | def SUBFZEOo : PPC32InstPattern3 <"subfzeo.", Gpr, Gpr, 31, 1425, 0, 0>; |
| 1786 | def SYNC : PPC32InstPattern36 <"sync", Imm2, 248, 1196, 0, 0>; |
| 1787 | def LWSYNC : PPC32InstPattern33 <"lwsync", 2082473132, 0, 0>; |
| 1788 | def PTESYNC : PPC32InstPattern33 <"ptesync", 2084570284, 0, 0>; |
| 1789 | def TDI : PPC32InstPattern0 <"tdi", Imm5, Gpr, Simm16, 2, 1, 0>; |
| 1790 | def TDLTI : PPC32InstPattern37 <"tdlti", Gpr, Simm16, 80, 1, 0>; |
| 1791 | def TDLEI : PPC32InstPattern37 <"tdlei", Gpr, Simm16, 84, 1, 0>; |
| 1792 | def TDEQI : PPC32InstPattern37 <"tdeqi", Gpr, Simm16, 68, 1, 0>; |
| 1793 | def TDGEI : PPC32InstPattern37 <"tdgei", Gpr, Simm16, 76, 1, 0>; |
| 1794 | def TDGTI : PPC32InstPattern37 <"tdgti", Gpr, Simm16, 72, 1, 0>; |
| 1795 | def TDNLI : PPC32InstPattern37 <"tdnli", Gpr, Simm16, 76, 1, 0>; |
| 1796 | def TDNEI : PPC32InstPattern37 <"tdnei", Gpr, Simm16, 88, 1, 0>; |
| 1797 | def TDNGI : PPC32InstPattern37 <"tdngi", Gpr, Simm16, 84, 1, 0>; |
| 1798 | def TDLLTI : PPC32InstPattern37 <"tdllti", Gpr, Simm16, 66, 1, 0>; |
| 1799 | def TDLLEI : PPC32InstPattern37 <"tdllei", Gpr, Simm16, 70, 1, 0>; |
| 1800 | def TDLGEI : PPC32InstPattern37 <"tdlgei", Gpr, Simm16, 69, 1, 0>; |
| 1801 | def TDLGTI : PPC32InstPattern37 <"tdlgti", Gpr, Simm16, 65, 1, 0>; |
| 1802 | def TDLNLI : PPC32InstPattern37 <"tdlnli", Gpr, Simm16, 69, 1, 0>; |
| 1803 | def TDLNGI : PPC32InstPattern37 <"tdlngi", Gpr, Simm16, 70, 1, 0>; |
| 1804 | def TD : PPC32InstPattern2 <"td", Imm5, Gpr, Gpr, 31, 136, 1, 0>; |
| 1805 | def TDLT : PPC32InstPattern38 <"tdlt", Gpr, Gpr, 1008, 136, 1, 0>; |
| 1806 | def TDLE : PPC32InstPattern38 <"tdle", Gpr, Gpr, 1012, 136, 1, 0>; |
| 1807 | def TDEQ : PPC32InstPattern38 <"tdeq", Gpr, Gpr, 996, 136, 1, 0>; |
| 1808 | def TDGE : PPC32InstPattern38 <"tdge", Gpr, Gpr, 1004, 136, 1, 0>; |
| 1809 | def TDGT : PPC32InstPattern38 <"tdgt", Gpr, Gpr, 1000, 136, 1, 0>; |
| 1810 | def TDNL : PPC32InstPattern38 <"tdnl", Gpr, Gpr, 1004, 136, 1, 0>; |
| 1811 | def TDNE : PPC32InstPattern38 <"tdne", Gpr, Gpr, 1016, 136, 1, 0>; |
| 1812 | def TDNG : PPC32InstPattern38 <"tdng", Gpr, Gpr, 1012, 136, 1, 0>; |
| 1813 | def TDLLT : PPC32InstPattern38 <"tdllt", Gpr, Gpr, 994, 136, 1, 0>; |
| 1814 | def TDLLE : PPC32InstPattern38 <"tdlle", Gpr, Gpr, 998, 136, 1, 0>; |
| 1815 | def TDLGE : PPC32InstPattern38 <"tdlge", Gpr, Gpr, 997, 136, 1, 0>; |
| 1816 | def TDLGT : PPC32InstPattern38 <"tdlgt", Gpr, Gpr, 993, 136, 1, 0>; |
| 1817 | def TDLNL : PPC32InstPattern38 <"tdlnl", Gpr, Gpr, 997, 136, 1, 0>; |
| 1818 | def TDLNG : PPC32InstPattern38 <"tdlng", Gpr, Gpr, 998, 136, 1, 0>; |
| 1819 | def TWI : PPC32InstPattern0 <"twi", Imm5, Gpr, Simm16, 3, 0, 0>; |
| 1820 | def TWLTI : PPC32InstPattern37 <"twlti", Gpr, Simm16, 112, 0, 0>; |
| 1821 | def TWLEI : PPC32InstPattern37 <"twlei", Gpr, Simm16, 116, 0, 0>; |
| 1822 | def TWEQI : PPC32InstPattern37 <"tweqi", Gpr, Simm16, 100, 0, 0>; |
| 1823 | def TWGEI : PPC32InstPattern37 <"twgei", Gpr, Simm16, 108, 0, 0>; |
| 1824 | def TWGTI : PPC32InstPattern37 <"twgti", Gpr, Simm16, 104, 0, 0>; |
| 1825 | def TWNLI : PPC32InstPattern37 <"twnli", Gpr, Simm16, 108, 0, 0>; |
| 1826 | def TWNEI : PPC32InstPattern37 <"twnei", Gpr, Simm16, 120, 0, 0>; |
| 1827 | def TWNGI : PPC32InstPattern37 <"twngi", Gpr, Simm16, 116, 0, 0>; |
| 1828 | def TWLLTI : PPC32InstPattern37 <"twllti", Gpr, Simm16, 98, 0, 0>; |
| 1829 | def TWLLEI : PPC32InstPattern37 <"twllei", Gpr, Simm16, 102, 0, 0>; |
| 1830 | def TWLGEI : PPC32InstPattern37 <"twlgei", Gpr, Simm16, 101, 0, 0>; |
| 1831 | def TWLGTI : PPC32InstPattern37 <"twlgti", Gpr, Simm16, 97, 0, 0>; |
| 1832 | def TWLNLI : PPC32InstPattern37 <"twlnli", Gpr, Simm16, 101, 0, 0>; |
| 1833 | def TWLNGI : PPC32InstPattern37 <"twlngi", Gpr, Simm16, 102, 0, 0>; |
| 1834 | def TW : PPC32InstPattern2 <"tw", Imm5, Gpr, Gpr, 31, 8, 0, 0>; |
| 1835 | def TWLT : PPC32InstPattern38 <"twlt", Gpr, Gpr, 1008, 8, 0, 0>; |
| 1836 | def TWLE : PPC32InstPattern38 <"twle", Gpr, Gpr, 1012, 8, 0, 0>; |
| 1837 | def TWEQ : PPC32InstPattern38 <"tweq", Gpr, Gpr, 996, 8, 0, 0>; |
| 1838 | def TWGE : PPC32InstPattern38 <"twge", Gpr, Gpr, 1004, 8, 0, 0>; |
| 1839 | def TWGT : PPC32InstPattern38 <"twgt", Gpr, Gpr, 1000, 8, 0, 0>; |
| 1840 | def TWNL : PPC32InstPattern38 <"twnl", Gpr, Gpr, 1004, 8, 0, 0>; |
| 1841 | def TWNE : PPC32InstPattern38 <"twne", Gpr, Gpr, 1016, 8, 0, 0>; |
| 1842 | def TWNG : PPC32InstPattern38 <"twng", Gpr, Gpr, 1012, 8, 0, 0>; |
| 1843 | def TWLLT : PPC32InstPattern38 <"twllt", Gpr, Gpr, 994, 8, 0, 0>; |
| 1844 | def TWLLE : PPC32InstPattern38 <"twlle", Gpr, Gpr, 998, 8, 0, 0>; |
| 1845 | def TWLGE : PPC32InstPattern38 <"twlge", Gpr, Gpr, 997, 8, 0, 0>; |
| 1846 | def TWLGT : PPC32InstPattern38 <"twlgt", Gpr, Gpr, 993, 8, 0, 0>; |
| 1847 | def TWLNL : PPC32InstPattern38 <"twlnl", Gpr, Gpr, 997, 8, 0, 0>; |
| 1848 | def TWLNG : PPC32InstPattern38 <"twlng", Gpr, Gpr, 998, 8, 0, 0>; |
| 1849 | def TRAP : PPC32InstPattern33 <"trap", 2145386504, 0, 0>; |
| 1850 | def XORI : PPC32InstPattern4 <"xori", Gpr, Gpr, Zimm16, 26, 0, 0>; |
| 1851 | def XORIS : PPC32InstPattern4 <"xoris", Gpr, Gpr, Zimm16, 27, 0, 0>; |
| 1852 | def XOR : PPC32InstPattern5 <"xor", Gpr, Gpr, Gpr, 31, 632, 0, 0>; |
| 1853 | def XORo : PPC32InstPattern5 <"xor.", Gpr, Gpr, Gpr, 31, 633, 0, 0>; |
| 1854 | def ICBI : PPC32InstPattern38 <"icbi", Gpr0, Gpr, 992, 940, 0, 0>; |
| 1855 | def ISYNC : PPC32InstPattern33 <"isync", 1275068716, 0, 0>; |
| 1856 | def DCBT : PPC32InstPattern39 <"dcbt", Gpr0, Gpr, Imm4, 62, 556, 1, 0>; |
| 1857 | def DCBTST : PPC32InstPattern38 <"dcbtst", Gpr0, Gpr, 992, 492, 0, 0>; |
| 1858 | def DCBT128 : PPC32InstPattern39 <"dcbt128", Gpr0, Gpr, Imm4, 62, 556, 1, 0>; |
| 1859 | def DCBZ : PPC32InstPattern38 <"dcbz", Gpr0, Gpr, 992, 1004, 0, 0>; |
| 1860 | def DCBZL : PPC32InstPattern38 <"dcbzl", Gpr0, Gpr, 993, 1004, 1, 0>; |
| 1861 | def DCBZ128 : PPC32InstPattern38 <"dcbz128", Gpr0, Gpr, 993, 1004, 1, 0>; |
| 1862 | def DCBST : PPC32InstPattern38 <"dcbst", Gpr0, Gpr, 992, 108, 0, 0>; |
| 1863 | def DCBF : PPC32InstPattern38 <"dcbf", Gpr0, Gpr, 992, 172, 0, 0>; |
| 1864 | def ECIWX : PPC32InstPattern2 <"eciwx", Gpr, Gpr0, Gpr, 31, 620, 0, 0>; |
| 1865 | def ECOWX : PPC32InstPattern2 <"ecowx", Gpr, Gpr0, Gpr, 31, 876, 0, 0>; |
| 1866 | def EIEIO : PPC32InstPattern33 <"eieio", 2080376492, 0, 0>; |
| 1867 | def RFI : PPC32InstPattern33 <"rfi", 1275068516, 0, 0>; |
| 1868 | def MTMSR : PPC32InstPattern21 <"mtmsr", Gpr, 31, 292, 0, 0>; |
| 1869 | def MTMSRD : PPC32InstPattern40 <"mtmsrd", Gpr, Imm1, 31, 0, 356, 1, 0>; |
| 1870 | def MFMSR : PPC32InstPattern21 <"mfmsr", Gpr, 31, 166, 0, 0>; |
| 1871 | def DCBA : PPC32InstPattern38 <"dcba", Gpr0, Gpr, 992, 492, 0, 0>; |
| 1872 | def DCBI : PPC32InstPattern38 <"dcbi", Gpr0, Gpr, 992, 940, 0, 0>; |
| 1873 | def MTSR : PPC32InstPattern41 <"mtsr", Sgr, Gpr, 31, 0, 420, 0, 0>; |
| 1874 | def MFSR : PPC32InstPattern42 <"mfsr", Gpr, Sgr, 31, 0, 1190, 0, 0>; |
| 1875 | def MTSRIN : PPC32InstPattern20 <"mtsrin", Gpr, Gpr, 31, 0, 484, 0, 0>; |
| 1876 | def MFSRIN : PPC32InstPattern20 <"mfsrin", Gpr, Gpr, 31, 0, 294, 0, 0>; |
| 1877 | def SLBIE : PPC32InstPattern43 <"slbie", Gpr, 31744, 868, 1, 0>; |
| 1878 | def SLBIA : PPC32InstPattern33 <"slbia", 2080375780, 1, 0>; |
| 1879 | def SLBMTE : PPC32InstPattern20 <"slbmte", Gpr, Gpr, 31, 0, 804, 1, 0>; |
| 1880 | def SLBMFEV : PPC32InstPattern20 <"slbmfev", Gpr, Gpr, 31, 0, 678, 1, 0>; |
| 1881 | def SLBMFEE : PPC32InstPattern20 <"slbmfee", Gpr, Gpr, 31, 0, 806, 1, 0>; |
| 1882 | def TLBIE : PPC32InstPattern44 <"tlbie", Gpr, Imm1, 496, 0, 612, 1, 0>; |
| 1883 | def TLBIEL : PPC32InstPattern43 <"tlbiel", Gpr, 31744, 548, 1, 0>; |
| 1884 | def TLBIA : PPC32InstPattern33 <"tlbia", 2080375524, 0, 0>; |
| 1885 | def TLBSYNC : PPC32InstPattern33 <"tlbsync", 2080375916, 0, 0>; |
| 1886 | def MTTBL : PPC32InstPattern21 <"mttbl", Gpr, 31, 803750, 0, 0>; |
| 1887 | def MTTBU : PPC32InstPattern21 <"mttbu", Gpr, 31, 869286, 0, 0>; |
| 1888 | def MFTB : PPC32InstPattern28 <"mftb", Gpr, Spr, 31, 742, 0, 0>; |
| 1889 | def MFTBU : PPC32InstPattern21 <"mftbu", Gpr, 31, 869094, 0, 0>; |
| 1890 | def ATTN : PPC32InstPattern45 <"attn", Imm15, 0, 512, 0, 0>; |
| 1891 | def MULLI : PPC32InstPattern0 <"mulli", Gpr, Gpr, Simm16, 7, 0, 0>; |
| 1892 | def TLBLD : PPC32InstPattern43 <"tlbld", Gpr, 31744, 932, 0, 0>; |
| 1893 | def TLBLI : PPC32InstPattern43 <"tlbli", Gpr, 31744, 996, 0, 0>; |
| 1894 | def LVEBX : PPC32InstPattern2 <"lvebx", Vpr, Gpr0, Gpr, 31, 14, 0, 1>; |
| 1895 | def LVEHX : PPC32InstPattern2 <"lvehx", Vpr, Gpr0, Gpr, 31, 78, 0, 1>; |
| 1896 | def LVEWX : PPC32InstPattern2 <"lvewx", Vpr, Gpr0, Gpr, 31, 142, 0, 1>; |
| 1897 | def LVX : PPC32InstPattern2 <"lvx", Vpr, Gpr0, Gpr, 31, 206, 0, 1>; |
| 1898 | def LVXL : PPC32InstPattern2 <"lvxl", Vpr, Gpr0, Gpr, 31, 718, 0, 1>; |
| 1899 | def STVEBX : PPC32InstPattern2 <"stvebx", Vpr, Gpr0, Gpr, 31, 270, 0, 1>; |
| 1900 | def STVEHX : PPC32InstPattern2 <"stvehx", Vpr, Gpr0, Gpr, 31, 334, 0, 1>; |
| 1901 | def STVEWX : PPC32InstPattern2 <"stvewx", Vpr, Gpr0, Gpr, 31, 398, 0, 1>; |
| 1902 | def STVX : PPC32InstPattern2 <"stvx", Vpr, Gpr0, Gpr, 31, 462, 0, 1>; |
| 1903 | def STVXL : PPC32InstPattern2 <"stvxl", Vpr, Gpr0, Gpr, 31, 974, 0, 1>; |
| 1904 | def LVSL : PPC32InstPattern2 <"lvsl", Vpr, Gpr0, Gpr, 31, 12, 0, 1>; |
| 1905 | def LVSR : PPC32InstPattern2 <"lvsr", Vpr, Gpr0, Gpr, 31, 76, 0, 1>; |
| 1906 | def MTVSCR : PPC32InstPattern43 <"mtvscr", Vpr, 4096, 580, 0, 1>; |
| 1907 | def MFVSCR : PPC32InstPattern21 <"mfvscr", Vpr, 4, 1540, 0, 1>; |
| 1908 | def DST : PPC32InstPattern46 <"dst", Gpr, Gpr, Imm2, 248, 684, 0, 1>; |
| 1909 | def DSTT : PPC32InstPattern46 <"dstt", Gpr, Gpr, Imm2, 252, 684, 0, 1>; |
| 1910 | def DSTST : PPC32InstPattern46 <"dstst", Gpr, Gpr, Imm2, 248, 748, 0, 1>; |
| 1911 | def DSTSTT : PPC32InstPattern46 <"dststt", Gpr, Gpr, Imm2, 252, 748, 0, 1>; |
| 1912 | def DSS : PPC32InstPattern36 <"dss", Imm2, 248, 1644, 0, 1>; |
| 1913 | def DSSALL : PPC32InstPattern33 <"dssall", 2113930860, 0, 1>; |
| 1914 | def VADDUBM : PPC32InstPattern2 <"vaddubm", Vpr, Vpr, Vpr, 4, 0, 0, 1>; |
| 1915 | def VADDUBS : PPC32InstPattern2 <"vaddubs", Vpr, Vpr, Vpr, 4, 512, 0, 1>; |
| 1916 | def VADDSBS : PPC32InstPattern2 <"vaddsbs", Vpr, Vpr, Vpr, 4, 768, 0, 1>; |
| 1917 | def VADDUHM : PPC32InstPattern2 <"vadduhm", Vpr, Vpr, Vpr, 4, 64, 0, 1>; |
| 1918 | def VADDUHS : PPC32InstPattern2 <"vadduhs", Vpr, Vpr, Vpr, 4, 576, 0, 1>; |
| 1919 | def VADDSHS : PPC32InstPattern2 <"vaddshs", Vpr, Vpr, Vpr, 4, 832, 0, 1>; |
| 1920 | def VADDUWM : PPC32InstPattern2 <"vadduwm", Vpr, Vpr, Vpr, 4, 128, 0, 1>; |
| 1921 | def VADDUWS : PPC32InstPattern2 <"vadduws", Vpr, Vpr, Vpr, 4, 640, 0, 1>; |
| 1922 | def VADDSWS : PPC32InstPattern2 <"vaddsws", Vpr, Vpr, Vpr, 4, 896, 0, 1>; |
| 1923 | def VADDFP : PPC32InstPattern2 <"vaddfp", Vpr, Vpr, Vpr, 4, 10, 0, 1>; |
| 1924 | def VADDCUW : PPC32InstPattern2 <"vaddcuw", Vpr, Vpr, Vpr, 4, 384, 0, 1>; |
| 1925 | def VSUBUBM : PPC32InstPattern2 <"vsububm", Vpr, Vpr, Vpr, 4, 0, 0, 1>; |
| 1926 | def VSUBUBS : PPC32InstPattern2 <"vsububs", Vpr, Vpr, Vpr, 4, 512, 0, 1>; |
| 1927 | def VSUBSBS : PPC32InstPattern2 <"vsubsbs", Vpr, Vpr, Vpr, 4, 768, 0, 1>; |
| 1928 | def VSUBUHM : PPC32InstPattern2 <"vsubuhm", Vpr, Vpr, Vpr, 4, 64, 0, 1>; |
| 1929 | def VSUBUHS : PPC32InstPattern2 <"vsubuhs", Vpr, Vpr, Vpr, 4, 576, 0, 1>; |
| 1930 | def VSUBSHS : PPC32InstPattern2 <"vsubshs", Vpr, Vpr, Vpr, 4, 832, 0, 1>; |
| 1931 | def VSUBUWM : PPC32InstPattern2 <"vsubuwm", Vpr, Vpr, Vpr, 4, 128, 0, 1>; |
| 1932 | def VSUBUWS : PPC32InstPattern2 <"vsubuws", Vpr, Vpr, Vpr, 4, 640, 0, 1>; |
| 1933 | def VSUBSWS : PPC32InstPattern2 <"vsubsws", Vpr, Vpr, Vpr, 4, 896, 0, 1>; |
| 1934 | def VSUBFP : PPC32InstPattern2 <"vsubfp", Vpr, Vpr, Vpr, 4, 74, 0, 1>; |
| 1935 | def VSUBCUW : PPC32InstPattern2 <"vsubcuw", Vpr, Vpr, Vpr, 4, 384, 0, 1>; |
| 1936 | def VMULOUB : PPC32InstPattern2 <"vmuloub", Vpr, Vpr, Vpr, 4, 8, 0, 1>; |
| 1937 | def VMULOSB : PPC32InstPattern2 <"vmulosb", Vpr, Vpr, Vpr, 4, 264, 0, 1>; |
| 1938 | def VMULOUH : PPC32InstPattern2 <"vmulouh", Vpr, Vpr, Vpr, 4, 72, 0, 1>; |
| 1939 | def VMULOSH : PPC32InstPattern2 <"vmulosh", Vpr, Vpr, Vpr, 4, 328, 0, 1>; |
| 1940 | def VMULEUB : PPC32InstPattern2 <"vmuleub", Vpr, Vpr, Vpr, 4, 520, 0, 1>; |
| 1941 | def VMULESB : PPC32InstPattern2 <"vmulesb", Vpr, Vpr, Vpr, 4, 776, 0, 1>; |
| 1942 | def VMULEUH : PPC32InstPattern2 <"vmuleuh", Vpr, Vpr, Vpr, 4, 584, 0, 1>; |
| 1943 | def VMULESH : PPC32InstPattern2 <"vmulesh", Vpr, Vpr, Vpr, 4, 840, 0, 1>; |
| 1944 | def VMHADDSHS : PPC32InstPattern47 <"vmhaddshs", Vpr, Vpr, Vpr, Vpr, 4, 0, 0, 1>; |
| 1945 | def VMHRADDSHS : PPC32InstPattern47 <"vmhraddshs", Vpr, Vpr, Vpr, Vpr, 4, 1, 0, 1>; |
| 1946 | def VMLADDUHM : PPC32InstPattern47 <"vmladduhm", Vpr, Vpr, Vpr, Vpr, 4, 2, 0, 1>; |
| 1947 | def VMADDFP : PPC32InstPattern19 <"vmaddfp", Vpr, Vpr, Vpr, Vpr, 4, 14, 0, 1>; |
| 1948 | def VMSUMUBM : PPC32InstPattern47 <"vmsumubm", Vpr, Vpr, Vpr, Vpr, 4, 4, 0, 1>; |
| 1949 | def VMSUMMBM : PPC32InstPattern47 <"vmsummbm", Vpr, Vpr, Vpr, Vpr, 4, 5, 0, 1>; |
| 1950 | def VMSUMUHM : PPC32InstPattern47 <"vmsumuhm", Vpr, Vpr, Vpr, Vpr, 4, 6, 0, 1>; |
| 1951 | def VMSUMUHS : PPC32InstPattern47 <"vmsumuhs", Vpr, Vpr, Vpr, Vpr, 4, 7, 0, 1>; |
| 1952 | def VMSUMSHM : PPC32InstPattern47 <"vmsumshm", Vpr, Vpr, Vpr, Vpr, 4, 8, 0, 1>; |
| 1953 | def VMSUMSHS : PPC32InstPattern47 <"vmsumshs", Vpr, Vpr, Vpr, Vpr, 4, 9, 0, 1>; |
| 1954 | def VSUMSWS : PPC32InstPattern2 <"vsumsws", Vpr, Vpr, Vpr, 4, 904, 0, 1>; |
| 1955 | def VSUM2SWS : PPC32InstPattern2 <"vsum2sws", Vpr, Vpr, Vpr, 4, 648, 0, 1>; |
| 1956 | def VSUM4UBS : PPC32InstPattern2 <"vsum4ubs", Vpr, Vpr, Vpr, 4, 520, 0, 1>; |
| 1957 | def VSUM4SBS : PPC32InstPattern2 <"vsum4sbs", Vpr, Vpr, Vpr, 4, 776, 0, 1>; |
| 1958 | def VSUM4SHS : PPC32InstPattern2 <"vsum4shs", Vpr, Vpr, Vpr, 4, 584, 0, 1>; |
| 1959 | def VAVGUB : PPC32InstPattern2 <"vavgub", Vpr, Vpr, Vpr, 4, 2, 0, 1>; |
| 1960 | def VAVGUH : PPC32InstPattern2 <"vavguh", Vpr, Vpr, Vpr, 4, 66, 0, 1>; |
| 1961 | def VAVGUW : PPC32InstPattern2 <"vavguw", Vpr, Vpr, Vpr, 4, 130, 0, 1>; |
| 1962 | def VAVGSB : PPC32InstPattern2 <"vavgsb", Vpr, Vpr, Vpr, 4, 258, 0, 1>; |
| 1963 | def VAVGSH : PPC32InstPattern2 <"vavgsh", Vpr, Vpr, Vpr, 4, 322, 0, 1>; |
| 1964 | def VAVGSW : PPC32InstPattern2 <"vavgsw", Vpr, Vpr, Vpr, 4, 386, 0, 1>; |
| 1965 | def VAND : PPC32InstPattern2 <"vand", Vpr, Vpr, Vpr, 4, 4, 0, 1>; |
| 1966 | def VOR : PPC32InstPattern2 <"vor", Vpr, Vpr, Vpr, 4, 132, 0, 1>; |
| 1967 | def VXOR : PPC32InstPattern2 <"vxor", Vpr, Vpr, Vpr, 4, 196, 0, 1>; |
| 1968 | def VANDC : PPC32InstPattern2 <"vandc", Vpr, Vpr, Vpr, 4, 68, 0, 1>; |
| 1969 | def VNOR : PPC32InstPattern2 <"vnor", Vpr, Vpr, Vpr, 4, 260, 0, 1>; |
| 1970 | def VRLB : PPC32InstPattern2 <"vrlb", Vpr, Vpr, Vpr, 4, 4, 0, 1>; |
| 1971 | def VRLH : PPC32InstPattern2 <"vrlh", Vpr, Vpr, Vpr, 4, 68, 0, 1>; |
| 1972 | def VRLW : PPC32InstPattern2 <"vrlw", Vpr, Vpr, Vpr, 4, 132, 0, 1>; |
| 1973 | def VSLB : PPC32InstPattern2 <"vslb", Vpr, Vpr, Vpr, 4, 260, 0, 1>; |
| 1974 | def VSLH : PPC32InstPattern2 <"vslh", Vpr, Vpr, Vpr, 4, 324, 0, 1>; |
| 1975 | def VSLW : PPC32InstPattern2 <"vslw", Vpr, Vpr, Vpr, 4, 388, 0, 1>; |
| 1976 | def VSL : PPC32InstPattern2 <"vsl", Vpr, Vpr, Vpr, 4, 452, 0, 1>; |
| 1977 | def VSRB : PPC32InstPattern2 <"vsrb", Vpr, Vpr, Vpr, 4, 516, 0, 1>; |
| 1978 | def VSRAB : PPC32InstPattern2 <"vsrab", Vpr, Vpr, Vpr, 4, 772, 0, 1>; |
| 1979 | def VSRH : PPC32InstPattern2 <"vsrh", Vpr, Vpr, Vpr, 4, 580, 0, 1>; |
| 1980 | def VSRAH : PPC32InstPattern2 <"vsrah", Vpr, Vpr, Vpr, 4, 836, 0, 1>; |
| 1981 | def VSRW : PPC32InstPattern2 <"vsrw", Vpr, Vpr, Vpr, 4, 644, 0, 1>; |
| 1982 | def VSRAW : PPC32InstPattern2 <"vsraw", Vpr, Vpr, Vpr, 4, 900, 0, 1>; |
| 1983 | def VSR : PPC32InstPattern2 <"vsr", Vpr, Vpr, Vpr, 4, 708, 0, 1>; |
| 1984 | def VCMPGTUB : PPC32InstPattern2 <"vcmpgtub", Vpr, Vpr, Vpr, 4, 518, 0, 1>; |
| 1985 | def VCMPGTUBo : PPC32InstPattern2 <"vcmpgtub.", Vpr, Vpr, Vpr, 4, 518, 0, 1>; |
| 1986 | def VCMPGTSB : PPC32InstPattern2 <"vcmpgtsb", Vpr, Vpr, Vpr, 4, 774, 0, 1>; |
| 1987 | def VCMPGTSBo : PPC32InstPattern2 <"vcmpgtsb.", Vpr, Vpr, Vpr, 4, 774, 0, 1>; |
| 1988 | def VCMPGTUH : PPC32InstPattern2 <"vcmpgtuh", Vpr, Vpr, Vpr, 4, 582, 0, 1>; |
| 1989 | def VCMPGTUHo : PPC32InstPattern2 <"vcmpgtuh.", Vpr, Vpr, Vpr, 4, 582, 0, 1>; |
| 1990 | def VCMPGTSH : PPC32InstPattern2 <"vcmpgtsh", Vpr, Vpr, Vpr, 4, 838, 0, 1>; |
| 1991 | def VCMPGTSHo : PPC32InstPattern2 <"vcmpgtsh.", Vpr, Vpr, Vpr, 4, 838, 0, 1>; |
| 1992 | def VCMPGTUW : PPC32InstPattern2 <"vcmpgtuw", Vpr, Vpr, Vpr, 4, 646, 0, 1>; |
| 1993 | def VCMPGTUWo : PPC32InstPattern2 <"vcmpgtuw.", Vpr, Vpr, Vpr, 4, 646, 0, 1>; |
| 1994 | def VCMPGTSW : PPC32InstPattern2 <"vcmpgtsw", Vpr, Vpr, Vpr, 4, 902, 0, 1>; |
| 1995 | def VCMPGTSWo : PPC32InstPattern2 <"vcmpgtsw.", Vpr, Vpr, Vpr, 4, 902, 0, 1>; |
| 1996 | def VCMPGTFP : PPC32InstPattern2 <"vcmpgtfp", Vpr, Vpr, Vpr, 4, 710, 0, 1>; |
| 1997 | def VCMPGTFPo : PPC32InstPattern2 <"vcmpgtfp.", Vpr, Vpr, Vpr, 4, 710, 0, 1>; |
| 1998 | def VCMPEQUB : PPC32InstPattern2 <"vcmpequb", Vpr, Vpr, Vpr, 4, 6, 0, 1>; |
| 1999 | def VCMPEQUBo : PPC32InstPattern2 <"vcmpequb.", Vpr, Vpr, Vpr, 4, 6, 0, 1>; |
| 2000 | def VCMPEQUH : PPC32InstPattern2 <"vcmpequh", Vpr, Vpr, Vpr, 4, 70, 0, 1>; |
| 2001 | def VCMPEQUHo : PPC32InstPattern2 <"vcmpequh.", Vpr, Vpr, Vpr, 4, 70, 0, 1>; |
| 2002 | def VCMPEQUW : PPC32InstPattern2 <"vcmpequw", Vpr, Vpr, Vpr, 4, 134, 0, 1>; |
| 2003 | def VCMPEQUWo : PPC32InstPattern2 <"vcmpequw.", Vpr, Vpr, Vpr, 4, 134, 0, 1>; |
| 2004 | def VCMPEQFP : PPC32InstPattern2 <"vcmpeqfp", Vpr, Vpr, Vpr, 4, 198, 0, 1>; |
| 2005 | def VCMPEQFPo : PPC32InstPattern2 <"vcmpeqfp.", Vpr, Vpr, Vpr, 4, 198, 0, 1>; |
| 2006 | def VCMPGEFP : PPC32InstPattern2 <"vcmpgefp", Vpr, Vpr, Vpr, 4, 454, 0, 1>; |
| 2007 | def VCMPGEFPo : PPC32InstPattern2 <"vcmpgefp.", Vpr, Vpr, Vpr, 4, 454, 0, 1>; |
| 2008 | def VCMPBFP : PPC32InstPattern2 <"vcmpbfp", Vpr, Vpr, Vpr, 4, 966, 0, 1>; |
| 2009 | def VCMPBFPo : PPC32InstPattern2 <"vcmpbfp.", Vpr, Vpr, Vpr, 4, 966, 0, 1>; |
| 2010 | def VSEL : PPC32InstPattern47 <"vsel", Vpr, Vpr, Vpr, Vpr, 4, 10, 0, 1>; |
| 2011 | def VPKUHUM : PPC32InstPattern2 <"vpkuhum", Vpr, Vpr, Vpr, 4, 14, 0, 1>; |
| 2012 | def VPKUHUS : PPC32InstPattern2 <"vpkuhus", Vpr, Vpr, Vpr, 4, 142, 0, 1>; |
| 2013 | def VPKSHUS : PPC32InstPattern2 <"vpkshus", Vpr, Vpr, Vpr, 4, 270, 0, 1>; |
| 2014 | def VPKSHSS : PPC32InstPattern2 <"vpkshss", Vpr, Vpr, Vpr, 4, 398, 0, 1>; |
| 2015 | def VPKUWUM : PPC32InstPattern2 <"vpkuwum", Vpr, Vpr, Vpr, 4, 78, 0, 1>; |
| 2016 | def VPKUWUS : PPC32InstPattern2 <"vpkuwus", Vpr, Vpr, Vpr, 4, 206, 0, 1>; |
| 2017 | def VPKSWUS : PPC32InstPattern2 <"vpkswus", Vpr, Vpr, Vpr, 4, 334, 0, 1>; |
| 2018 | def VPKSWSS : PPC32InstPattern2 <"vpkswss", Vpr, Vpr, Vpr, 4, 462, 0, 1>; |
| 2019 | def VPKPX : PPC32InstPattern2 <"vpkpx", Vpr, Vpr, Vpr, 4, 782, 0, 1>; |
| 2020 | def VUPKHSB : PPC32InstPattern20 <"vupkhsb", Vpr, Vpr, 4, 0, 526, 0, 1>; |
| 2021 | def VUPKHSH : PPC32InstPattern20 <"vupkhsh", Vpr, Vpr, 4, 0, 590, 0, 1>; |
| 2022 | def VUPKHPX : PPC32InstPattern20 <"vupkhpx", Vpr, Vpr, 4, 0, 846, 0, 1>; |
| 2023 | def VUPKLSB : PPC32InstPattern20 <"vupklsb", Vpr, Vpr, 4, 0, 654, 0, 1>; |
| 2024 | def VUPKLSH : PPC32InstPattern20 <"vupklsh", Vpr, Vpr, 4, 0, 718, 0, 1>; |
| 2025 | def VUPKLPX : PPC32InstPattern20 <"vupklpx", Vpr, Vpr, 4, 0, 974, 0, 1>; |
| 2026 | def VMRGHB : PPC32InstPattern2 <"vmrghb", Vpr, Vpr, Vpr, 4, 12, 0, 1>; |
| 2027 | def VMRGHH : PPC32InstPattern2 <"vmrghh", Vpr, Vpr, Vpr, 4, 76, 0, 1>; |
| 2028 | def VMRGHW : PPC32InstPattern2 <"vmrghw", Vpr, Vpr, Vpr, 4, 140, 0, 1>; |
| 2029 | def VMRGLB : PPC32InstPattern2 <"vmrglb", Vpr, Vpr, Vpr, 4, 268, 0, 1>; |
| 2030 | def VMRGLH : PPC32InstPattern2 <"vmrglh", Vpr, Vpr, Vpr, 4, 332, 0, 1>; |
| 2031 | def VMRGLW : PPC32InstPattern2 <"vmrglw", Vpr, Vpr, Vpr, 4, 396, 0, 1>; |
| 2032 | def VSPLTB : PPC32InstPattern35 <"vspltb", Vpr, Vpr, Imm5, 4, 524, 0, 1>; |
| 2033 | def VSPLTH : PPC32InstPattern35 <"vsplth", Vpr, Vpr, Imm5, 4, 588, 0, 1>; |
| 2034 | def VSPLTW : PPC32InstPattern35 <"vspltw", Vpr, Vpr, Imm5, 4, 652, 0, 1>; |
| 2035 | def VSPLTISB : PPC32InstPattern3 <"vspltisb", Vpr, Imm5, 4, 780, 0, 1>; |
| 2036 | def VSPLTISH : PPC32InstPattern3 <"vspltish", Vpr, Imm5, 4, 844, 0, 1>; |
| 2037 | def VSPLTISW : PPC32InstPattern3 <"vspltisw", Vpr, Imm5, 4, 908, 0, 1>; |
| 2038 | def VPERM : PPC32InstPattern47 <"vperm", Vpr, Vpr, Vpr, Vpr, 4, 11, 0, 1>; |
| 2039 | def VSLDOI : PPC32InstPattern48 <"vsldoi", Vpr, Vpr, Vpr, Imm4, 4, 0, 12, 0, 1>; |
| 2040 | def VSLO : PPC32InstPattern2 <"vslo", Vpr, Vpr, Vpr, 4, 12, 0, 1>; |
| 2041 | def VSRO : PPC32InstPattern2 <"vsro", Vpr, Vpr, Vpr, 4, 76, 0, 1>; |
| 2042 | def VMAXUB : PPC32InstPattern2 <"vmaxub", Vpr, Vpr, Vpr, 4, 2, 0, 1>; |
| 2043 | def VMAXSB : PPC32InstPattern2 <"vmaxsb", Vpr, Vpr, Vpr, 4, 258, 0, 1>; |
| 2044 | def VMAXUH : PPC32InstPattern2 <"vmaxuh", Vpr, Vpr, Vpr, 4, 66, 0, 1>; |
| 2045 | def VMAXSH : PPC32InstPattern2 <"vmaxsh", Vpr, Vpr, Vpr, 4, 322, 0, 1>; |
| 2046 | def VMAXUW : PPC32InstPattern2 <"vmaxuw", Vpr, Vpr, Vpr, 4, 130, 0, 1>; |
| 2047 | def VMAXSW : PPC32InstPattern2 <"vmaxsw", Vpr, Vpr, Vpr, 4, 386, 0, 1>; |
| 2048 | def VMAXFP : PPC32InstPattern2 <"vmaxfp", Vpr, Vpr, Vpr, 4, 10, 0, 1>; |
| 2049 | def VMINUB : PPC32InstPattern2 <"vminub", Vpr, Vpr, Vpr, 4, 514, 0, 1>; |
| 2050 | def VMINSB : PPC32InstPattern2 <"vminsb", Vpr, Vpr, Vpr, 4, 770, 0, 1>; |
| 2051 | def VMINUH : PPC32InstPattern2 <"vminuh", Vpr, Vpr, Vpr, 4, 578, 0, 1>; |
| 2052 | def VMINSH : PPC32InstPattern2 <"vminsh", Vpr, Vpr, Vpr, 4, 834, 0, 1>; |
| 2053 | def VMINUW : PPC32InstPattern2 <"vminuw", Vpr, Vpr, Vpr, 4, 642, 0, 1>; |
| 2054 | def VMINSW : PPC32InstPattern2 <"vminsw", Vpr, Vpr, Vpr, 4, 898, 0, 1>; |
| 2055 | def VMINFP : PPC32InstPattern2 <"vminfp", Vpr, Vpr, Vpr, 4, 74, 0, 1>; |
| 2056 | def VREFP : PPC32InstPattern20 <"vrefp", Vpr, Vpr, 4, 0, 266, 0, 1>; |
| 2057 | def VRSQRTEFP : PPC32InstPattern20 <"vrsqrtefp", Vpr, Vpr, 4, 0, 330, 0, 1>; |
| 2058 | def VLOGEFP : PPC32InstPattern20 <"vlogefp", Vpr, Vpr, 4, 0, 458, 0, 1>; |
| 2059 | def VEXPTEFP : PPC32InstPattern20 <"vexptefp", Vpr, Vpr, 4, 0, 394, 0, 1>; |
| 2060 | def VNMSUBFP : PPC32InstPattern19 <"vnmsubfp", Vpr, Vpr, Vpr, Vpr, 4, 15, 0, 1>; |
| 2061 | def VRFIN : PPC32InstPattern20 <"vrfin", Vpr, Vpr, 4, 0, 522, 0, 1>; |
| 2062 | def VRFIZ : PPC32InstPattern20 <"vrfiz", Vpr, Vpr, 4, 0, 586, 0, 1>; |
| 2063 | def VRFIP : PPC32InstPattern20 <"vrfip", Vpr, Vpr, 4, 0, 650, 0, 1>; |
| 2064 | def VRFIM : PPC32InstPattern20 <"vrfim", Vpr, Vpr, 4, 0, 714, 0, 1>; |
| 2065 | def VCTUXS : PPC32InstPattern35 <"vctuxs", Vpr, Vpr, Imm5, 4, 906, 0, 1>; |
| 2066 | def VCTSXS : PPC32InstPattern35 <"vctsxs", Vpr, Vpr, Imm5, 4, 970, 0, 1>; |
| 2067 | def VCFUX : PPC32InstPattern35 <"vcfux", Vpr, Vpr, Imm5, 4, 778, 0, 1>; |
| 2068 | def VCFSX : PPC32InstPattern35 <"vcfsx", Vpr, Vpr, Imm5, 4, 842, 0, 1>; |