blob: f0627728e532b8b7cb8f0ac575a3d8d5303b21b6 [file] [log] [blame]
Evan Chengd831cda2009-12-08 23:06:22 +00001; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s
2
Bob Wilson5afffae2009-12-18 01:03:29 +00003; Radar 7449043
Evan Chengd831cda2009-12-08 23:06:22 +00004%struct.int32x4_t = type { <4 x i32> }
5
6define arm_apcscc void @t() nounwind {
7entry:
8; CHECK: vmov.I64 q15, #0
9; CHECK: vmov.32 d30[0], r0
10; CHECK: vmov q0, q15
11 %tmp = alloca %struct.int32x4_t, align 16
12 call void asm sideeffect "vmov.I64 q15, #0\0Avmov.32 d30[0], $1\0Avmov ${0:q}, q15\0A", "=*w,r,~{d31},~{d30}"(%struct.int32x4_t* %tmp, i32 8192) nounwind
13 ret void
14}
Bob Wilson5afffae2009-12-18 01:03:29 +000015
16; Radar 7457110
17%struct.int32x2_t = type { <4 x i32> }
18
19define arm_apcscc void @t2() nounwind {
20entry:
21; CHECK: vmov d30, d0
22; CHECK: vmov.32 r0, d30[0]
23 %asmtmp2 = tail call i32 asm sideeffect "vmov d30, $1\0Avmov.32 $0, d30[0]\0A", "=r,w,~{d30}"(<2 x i32> undef) nounwind
24 ret void
25}