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gerrit-public.fairphone.software / fp2-dev / platform / external / llvm / 5b51fd5b550a9589f95e677fca801cea565e8d9f / . / test / CodeGen / Mips / tls.ll
blob: 23a8f93a9d7cfd42ff0111653d05bae57b629059 [file] [log] [blame]
Akira Hatanaka6522a9e2012-08-22 02:51:28 +0000[diff] [blame]1; RUN: llc -march=mipsel -disable-mips-delay-filler < %s | \
2; RUN: FileCheck %s -check-prefix=PIC
3; RUN: llc -march=mipsel -relocation-model=static -disable-mips-delay-filler < \
4; RUN: %s | FileCheck %s -check-prefix=STATIC
5; RUN: llc -march=mipsel -relocation-model=static -disable-mips-delay-filler \
6; RUN: -mips-fix-global-base-reg=false < %s | \
7; RUN: FileCheck %s -check-prefix=STATICGP
Bruno Cardoso Lopesd9796862011-05-31 02:53:58 +0000[diff] [blame]8
9@t1 = thread_local global i32 0, align 4
10
11define i32 @f1() nounwind {
12entry:
13 %tmp = load i32* @t1, align 4
14 ret i32 %tmp
15
Stephen Lin8b2b8a12013-07-14 06:24:09 +0000[diff] [blame]16; PIC-LABEL: f1:
Akira Hatanaka434c0bd2013-07-12 23:33:22 +0000[diff] [blame]17; PIC-DAG: addu $[[R0:[a-z0-9]+]], $2, $25
18; PIC-DAG: lw $25, %call16(__tls_get_addr)($[[R0]])
19; PIC-DAG: addiu $4, $[[R0]], %tlsgd(t1)
20; PIC-DAG: jalr $25
21; PIC-DAG: lw $2, 0($2)
Bruno Cardoso Lopesd9796862011-05-31 02:53:58 +0000[diff] [blame]22
Stephen Lin8b2b8a12013-07-14 06:24:09 +0000[diff] [blame]23; STATIC-LABEL: f1:
Bruno Cardoso Lopesd9796862011-05-31 02:53:58 +0000[diff] [blame]24; STATIC: lui $[[R0:[0-9]+]], %tprel_hi(t1)
25; STATIC: addiu $[[R1:[0-9]+]], $[[R0]], %tprel_lo(t1)
Akira Hatanakaa88322c2013-01-22 21:34:25 +0000[diff] [blame]26; STATIC: rdhwr $3, $29
Bruno Cardoso Lopesd9796862011-05-31 02:53:58 +0000[diff] [blame]27; STATIC: addu $[[R2:[0-9]+]], $3, $[[R1]]
28; STATIC: lw $2, 0($[[R2]])
29}
30
31
32@t2 = external thread_local global i32
33
34define i32 @f2() nounwind {
35entry:
36 %tmp = load i32* @t2, align 4
37 ret i32 %tmp
38
Stephen Lin8b2b8a12013-07-14 06:24:09 +0000[diff] [blame]39; PIC-LABEL: f2:
Akira Hatanaka434c0bd2013-07-12 23:33:22 +0000[diff] [blame]40; PIC-DAG: addu $[[R0:[a-z0-9]+]], $2, $25
41; PIC-DAG: lw $25, %call16(__tls_get_addr)($[[R0]])
42; PIC-DAG: addiu $4, $[[R0]], %tlsgd(t2)
43; PIC-DAG: jalr $25
44; PIC-DAG: lw $2, 0($2)
Bruno Cardoso Lopesd9796862011-05-31 02:53:58 +0000[diff] [blame]45
Stephen Lin8b2b8a12013-07-14 06:24:09 +0000[diff] [blame]46; STATICGP-LABEL: f2:
Akira Hatanaka648f00c2012-02-24 22:34:47 +0000[diff] [blame]47; STATICGP: lui $[[R0:[0-9]+]], %hi(__gnu_local_gp)
48; STATICGP: addiu $[[GP:[0-9]+]], $[[R0]], %lo(__gnu_local_gp)
49; STATICGP: lw ${{[0-9]+}}, %gottprel(t2)($[[GP]])
Akira Hatanaka434c0bd2013-07-12 23:33:22 +0000[diff] [blame]50
Stephen Lin8b2b8a12013-07-14 06:24:09 +0000[diff] [blame]51; STATIC-LABEL: f2:
Akira Hatanaka27ba61d2012-05-12 00:17:17 +0000[diff] [blame]52; STATIC: lui $[[R0:[0-9]+]], %hi(__gnu_local_gp)
Akira Hatanaka1da1cdf2012-05-12 03:25:16 +0000[diff] [blame]53; STATIC: addiu $[[GP:[0-9]+]], $[[R0]], %lo(__gnu_local_gp)
Bruno Cardoso Lopesd9796862011-05-31 02:53:58 +0000[diff] [blame]54; STATIC: rdhwr $3, $29
Akira Hatanaka1da1cdf2012-05-12 03:25:16 +0000[diff] [blame]55; STATIC: lw $[[R0:[0-9]+]], %gottprel(t2)($[[GP]])
Bruno Cardoso Lopesd9796862011-05-31 02:53:58 +0000[diff] [blame]56; STATIC: addu $[[R1:[0-9]+]], $3, $[[R0]]
57; STATIC: lw $2, 0($[[R1]])
58}
Akira Hatanaka3faac0a2011-12-14 18:26:41 +0000[diff] [blame]59
60@f3.i = internal thread_local unnamed_addr global i32 1, align 4
61
62define i32 @f3() nounwind {
63entry:
Stephen Lin8b2b8a12013-07-14 06:24:09 +0000[diff] [blame]64; CHECK-LABEL: f3:
Akira Hatanaka3faac0a2011-12-14 18:26:41 +0000[diff] [blame]65
Akira Hatanaka1da1cdf2012-05-12 03:25:16 +0000[diff] [blame]66; PIC: addiu $4, ${{[a-z0-9]+}}, %tlsldm(f3.i)
Akira Hatanaka3faac0a2011-12-14 18:26:41 +0000[diff] [blame]67; PIC: jalr $25
68; PIC: lui $[[R0:[0-9]+]], %dtprel_hi(f3.i)
69; PIC: addu $[[R1:[0-9]+]], $[[R0]], $2
Akira Hatanaka89dc8d72011-12-19 19:28:37 +0000[diff] [blame]70; PIC: lw ${{[0-9]+}}, %dtprel_lo(f3.i)($[[R1]])
Akira Hatanaka3faac0a2011-12-14 18:26:41 +0000[diff] [blame]71
72 %0 = load i32* @f3.i, align 4
73 %inc = add nsw i32 %0, 1
74 store i32 %inc, i32* @f3.i, align 4
75 ret i32 %inc
76}
77