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Duraid Madinaf2db9b82005-10-28 17:46:35 +00001//===-- IA64ISelLowering.h - IA64 DAG Lowering Interface --------*- C++ -*-===//
2//
3// The LLVM Compiler Infrastructure
4//
5// This file was developed by Duraid Madina and is distributed under
6// the University of Illinois Open Source License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file defines the interfaces that IA64 uses to lower LLVM code into a
11// selection DAG.
12//
13//===----------------------------------------------------------------------===//
14
15#ifndef LLVM_TARGET_IA64_IA64ISELLOWERING_H
16#define LLVM_TARGET_IA64_IA64ISELLOWERING_H
17
18#include "llvm/Target/TargetLowering.h"
19#include "llvm/CodeGen/SelectionDAG.h"
20#include "IA64.h"
21
22namespace llvm {
23 namespace IA64ISD {
24 enum NodeType {
25 // Start the numbering where the builting ops and target ops leave off.
26 FIRST_NUMBER = ISD::BUILTIN_OP_END+IA64::INSTRUCTION_LIST_END,
27
28 /// FSEL - Traditional three-operand fsel node.
29 ///
30 FSEL,
31
32 /// FCFID - The FCFID instruction, taking an f64 operand and producing
33 /// and f64 value containing the FP representation of the integer that
34 /// was temporarily in the f64 operand.
35 FCFID,
36
37 /// FCTI[D,W]Z - The FCTIDZ and FCTIWZ instructions, taking an f32 or f64
38 /// operand, producing an f64 value containing the integer representation
39 /// of that FP value.
40 FCTIDZ, FCTIWZ,
Duraid Madina64aa0ea2005-12-22 13:29:14 +000041
Duraid Madinaa6ec3cb2005-12-22 06:41:39 +000042 /// GETFD - the getf.d instruction takes a floating point operand and
43 /// returns its 64-bit memory representation as an i64
Duraid Madina64aa0ea2005-12-22 13:29:14 +000044 GETFD,
45
46 // TODO: explain this hack
47 BRCALL
Duraid Madinaf2db9b82005-10-28 17:46:35 +000048 };
49 }
50
51 class IA64TargetLowering : public TargetLowering {
52 int VarArgsFrameIndex; // FrameIndex for start of varargs area.
53 //int ReturnAddrIndex; // FrameIndex for return slot.
54 unsigned GP, SP, RP; // FIXME - clean this mess up
55
56 public:
57 IA64TargetLowering(TargetMachine &TM);
58
59 unsigned VirtGPR; // this is public so it can be accessed in the selector
60 // for ISD::RET. add an accessor instead? FIXME
61
62 /// LowerOperation - Provide custom lowering hooks for some operations.
63 ///
64// XXX virtual SDOperand LowerOperation(SDOperand Op, SelectionDAG &DAG);
65
66 /// LowerArguments - This hook must be implemented to indicate how we should
67 /// lower the arguments for the specified function, into the specified DAG.
68 virtual std::vector<SDOperand>
69 LowerArguments(Function &F, SelectionDAG &DAG);
70
71 /// LowerCallTo - This hook lowers an abstract call to a function into an
72 /// actual call.
73 virtual std::pair<SDOperand, SDOperand>
74 LowerCallTo(SDOperand Chain, const Type *RetTy, bool isVarArg,
75 unsigned CC,
76 bool isTailCall, SDOperand Callee, ArgListTy &Args,
77 SelectionDAG &DAG);
78
79 virtual SDOperand LowerVAStart(SDOperand Chain, SDOperand VAListP,
80 Value *VAListV, SelectionDAG &DAG);
81
82 virtual std::pair<SDOperand,SDOperand>
83 LowerVAArg(SDOperand Chain, SDOperand VAListP, Value *VAListV,
84 const Type *ArgTy, SelectionDAG &DAG);
85
86 virtual std::pair<SDOperand, SDOperand>
87 LowerFrameReturnAddress(bool isFrameAddr, SDOperand Chain, unsigned Depth,
88 SelectionDAG &DAG);
89
90// XXX virtual MachineBasicBlock *InsertAtEndOfBasicBlock(MachineInstr *MI,
91// XXX MachineBasicBlock *MBB);
92 };
93}
94
95#endif // LLVM_TARGET_IA64_IA64ISELLOWERING_H