blob: c5636375bf046241c054f2f95451529a7f4d4895 [file] [log] [blame]
Nate Begeman21e463b2005-10-16 05:39:50 +00001//===-- PPCFrameInfo.h - Define TargetFrameInfo for PowerPC -----*- C++ -*-===//
Misha Brukmanb5f662f2005-04-21 23:30:14 +00002//
Nate Begemanca068e82004-08-14 22:16:36 +00003// The LLVM Compiler Infrastructure
4//
Chris Lattner4ee451d2007-12-29 20:36:04 +00005// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
Misha Brukmanb5f662f2005-04-21 23:30:14 +00007//
Nate Begemanca068e82004-08-14 22:16:36 +00008//===----------------------------------------------------------------------===//
9//
10//
Nate Begeman21e463b2005-10-16 05:39:50 +000011//===----------------------------------------------------------------------===//
Nate Begemanca068e82004-08-14 22:16:36 +000012
13#ifndef POWERPC_FRAMEINFO_H
14#define POWERPC_FRAMEINFO_H
15
Chris Lattner26689592005-10-14 23:51:18 +000016#include "PPC.h"
Tilmann Schellerffd02002009-07-03 06:45:56 +000017#include "PPCSubtarget.h"
Nate Begemanca068e82004-08-14 22:16:36 +000018#include "llvm/Target/TargetFrameInfo.h"
19#include "llvm/Target/TargetMachine.h"
Tilmann Schellerffd02002009-07-03 06:45:56 +000020#include "llvm/ADT/STLExtras.h"
Nate Begemanca068e82004-08-14 22:16:36 +000021
22namespace llvm {
23
Nate Begeman21e463b2005-10-16 05:39:50 +000024class PPCFrameInfo: public TargetFrameInfo {
Nate Begemanca068e82004-08-14 22:16:36 +000025 const TargetMachine &TM;
Misha Brukmanb5f662f2005-04-21 23:30:14 +000026
Nate Begemanca068e82004-08-14 22:16:36 +000027public:
Nate Begeman21e463b2005-10-16 05:39:50 +000028 PPCFrameInfo(const TargetMachine &tm, bool LP64)
Misha Brukman63161812004-08-17 05:09:39 +000029 : TargetFrameInfo(TargetFrameInfo::StackGrowsDown, 16, 0), TM(tm) {
Nate Begemanca068e82004-08-14 22:16:36 +000030 }
31
Jim Laskey51fe9d92006-12-06 17:42:06 +000032 /// getReturnSaveOffset - Return the previous frame offset to save the
33 /// return address.
Tilmann Scheller6b16eff2009-08-15 11:54:46 +000034 static unsigned getReturnSaveOffset(bool isPPC64, bool isDarwinABI) {
Tilmann Scheller2a9ddfb2009-07-03 06:47:08 +000035 if (isDarwinABI)
Tilmann Scheller6b16eff2009-08-15 11:54:46 +000036 return isPPC64 ? 16 : 8;
Tilmann Scheller2a9ddfb2009-07-03 06:47:08 +000037 // SVR4 ABI:
Tilmann Scheller6b16eff2009-08-15 11:54:46 +000038 return isPPC64 ? 16 : 4;
Nate Begemanca068e82004-08-14 22:16:36 +000039 }
Jim Laskey51fe9d92006-12-06 17:42:06 +000040
Jim Laskey2f616bf2006-11-16 22:43:37 +000041 /// getFramePointerSaveOffset - Return the previous frame offset to save the
42 /// frame pointer.
Tilmann Scheller6b16eff2009-08-15 11:54:46 +000043 static unsigned getFramePointerSaveOffset(bool isPPC64, bool isDarwinABI) {
Tilmann Scheller2a9ddfb2009-07-03 06:47:08 +000044 // For the Darwin ABI:
Jim Laskey2f616bf2006-11-16 22:43:37 +000045 // Use the TOC save slot in the PowerPC linkage area for saving the frame
46 // pointer (if needed.) LLVM does not generate code that uses the TOC (R2
47 // is treated as a caller saved register.)
Tilmann Scheller2a9ddfb2009-07-03 06:47:08 +000048 if (isDarwinABI)
Tilmann Scheller6b16eff2009-08-15 11:54:46 +000049 return isPPC64 ? 40 : 20;
Chris Lattner9f0bc652007-02-25 05:34:32 +000050
Tilmann Scheller6b16eff2009-08-15 11:54:46 +000051 // SVR4 ABI: First slot in the general register save area.
Reid Spencer6733a162007-04-04 22:07:24 +000052 return -4U;
Jim Laskey2f616bf2006-11-16 22:43:37 +000053 }
54
55 /// getLinkageSize - Return the size of the PowerPC ABI linkage area.
56 ///
Tilmann Scheller6b16eff2009-08-15 11:54:46 +000057 static unsigned getLinkageSize(bool isPPC64, bool isDarwinABI) {
58 if (isDarwinABI || isPPC64)
59 return 6 * (isPPC64 ? 8 : 4);
Chris Lattner9f0bc652007-02-25 05:34:32 +000060
Tilmann Scheller2a9ddfb2009-07-03 06:47:08 +000061 // SVR4 ABI:
Nicolas Geoffrayec58d9f2007-04-03 12:35:28 +000062 return 8;
Jim Laskey2f616bf2006-11-16 22:43:37 +000063 }
64
65 /// getMinCallArgumentsSize - Return the size of the minium PowerPC ABI
66 /// argument area.
Tilmann Scheller6b16eff2009-08-15 11:54:46 +000067 static unsigned getMinCallArgumentsSize(bool isPPC64, bool isDarwinABI) {
68 // For the Darwin ABI / 64-bit SVR4 ABI:
Chris Lattner9f0bc652007-02-25 05:34:32 +000069 // The prolog code of the callee may store up to 8 GPR argument registers to
70 // the stack, allowing va_start to index over them in memory if its varargs.
71 // Because we cannot tell if this is needed on the caller side, we have to
72 // conservatively assume that it is needed. As such, make sure we have at
73 // least enough stack space for the caller to store the 8 GPRs.
Tilmann Scheller6b16eff2009-08-15 11:54:46 +000074 if (isDarwinABI || isPPC64)
75 return 8 * (isPPC64 ? 8 : 4);
Chris Lattner9f0bc652007-02-25 05:34:32 +000076
Tilmann Scheller6b16eff2009-08-15 11:54:46 +000077 // 32-bit SVR4 ABI:
Chris Lattner9f0bc652007-02-25 05:34:32 +000078 // There is no default stack allocated for the 8 first GPR arguments.
79 return 0;
Jim Laskey2f616bf2006-11-16 22:43:37 +000080 }
81
82 /// getMinCallFrameSize - Return the minimum size a call frame can be using
83 /// the PowerPC ABI.
Tilmann Scheller6b16eff2009-08-15 11:54:46 +000084 static unsigned getMinCallFrameSize(bool isPPC64, bool isDarwinABI) {
Jim Laskey2f616bf2006-11-16 22:43:37 +000085 // The call frame needs to be at least big enough for linkage and 8 args.
Tilmann Scheller6b16eff2009-08-15 11:54:46 +000086 return getLinkageSize(isPPC64, isDarwinABI) +
87 getMinCallArgumentsSize(isPPC64, isDarwinABI);
Jim Laskey2f616bf2006-11-16 22:43:37 +000088 }
Tilmann Schellerffd02002009-07-03 06:45:56 +000089
90 // With the SVR4 ABI, callee-saved registers have fixed offsets on the stack.
91 const std::pair<unsigned, int> *
92 getCalleeSavedSpillSlots(unsigned &NumEntries) const {
93 // Early exit if not using the SVR4 ABI.
Tilmann Scheller2a9ddfb2009-07-03 06:47:08 +000094 if (!TM.getSubtarget<PPCSubtarget>().isSVR4ABI()) {
Tilmann Schellerffd02002009-07-03 06:45:56 +000095 NumEntries = 0;
96 return 0;
97 }
98
99 static const std::pair<unsigned, int> Offsets[] = {
100 // Floating-point register save area offsets.
101 std::pair<unsigned, int>(PPC::F31, -8),
102 std::pair<unsigned, int>(PPC::F30, -16),
103 std::pair<unsigned, int>(PPC::F29, -24),
104 std::pair<unsigned, int>(PPC::F28, -32),
105 std::pair<unsigned, int>(PPC::F27, -40),
106 std::pair<unsigned, int>(PPC::F26, -48),
107 std::pair<unsigned, int>(PPC::F25, -56),
108 std::pair<unsigned, int>(PPC::F24, -64),
109 std::pair<unsigned, int>(PPC::F23, -72),
110 std::pair<unsigned, int>(PPC::F22, -80),
111 std::pair<unsigned, int>(PPC::F21, -88),
112 std::pair<unsigned, int>(PPC::F20, -96),
113 std::pair<unsigned, int>(PPC::F19, -104),
114 std::pair<unsigned, int>(PPC::F18, -112),
115 std::pair<unsigned, int>(PPC::F17, -120),
116 std::pair<unsigned, int>(PPC::F16, -128),
117 std::pair<unsigned, int>(PPC::F15, -136),
118 std::pair<unsigned, int>(PPC::F14, -144),
119
120 // General register save area offsets.
121 std::pair<unsigned, int>(PPC::R31, -4),
122 std::pair<unsigned, int>(PPC::R30, -8),
123 std::pair<unsigned, int>(PPC::R29, -12),
124 std::pair<unsigned, int>(PPC::R28, -16),
125 std::pair<unsigned, int>(PPC::R27, -20),
126 std::pair<unsigned, int>(PPC::R26, -24),
127 std::pair<unsigned, int>(PPC::R25, -28),
128 std::pair<unsigned, int>(PPC::R24, -32),
129 std::pair<unsigned, int>(PPC::R23, -36),
130 std::pair<unsigned, int>(PPC::R22, -40),
131 std::pair<unsigned, int>(PPC::R21, -44),
132 std::pair<unsigned, int>(PPC::R20, -48),
133 std::pair<unsigned, int>(PPC::R19, -52),
134 std::pair<unsigned, int>(PPC::R18, -56),
135 std::pair<unsigned, int>(PPC::R17, -60),
136 std::pair<unsigned, int>(PPC::R16, -64),
137 std::pair<unsigned, int>(PPC::R15, -68),
138 std::pair<unsigned, int>(PPC::R14, -72),
139
140 // CR save area offset.
Tilmann Scheller6a3a1ba2009-07-03 06:47:55 +0000141 // FIXME SVR4: Disable CR save area for now.
142// std::pair<unsigned, int>(PPC::CR2, -4),
143// std::pair<unsigned, int>(PPC::CR3, -4),
144// std::pair<unsigned, int>(PPC::CR4, -4),
145// std::pair<unsigned, int>(PPC::CR2LT, -4),
146// std::pair<unsigned, int>(PPC::CR2GT, -4),
147// std::pair<unsigned, int>(PPC::CR2EQ, -4),
148// std::pair<unsigned, int>(PPC::CR2UN, -4),
149// std::pair<unsigned, int>(PPC::CR3LT, -4),
150// std::pair<unsigned, int>(PPC::CR3GT, -4),
151// std::pair<unsigned, int>(PPC::CR3EQ, -4),
152// std::pair<unsigned, int>(PPC::CR3UN, -4),
153// std::pair<unsigned, int>(PPC::CR4LT, -4),
154// std::pair<unsigned, int>(PPC::CR4GT, -4),
155// std::pair<unsigned, int>(PPC::CR4EQ, -4),
156// std::pair<unsigned, int>(PPC::CR4UN, -4),
Tilmann Schellerffd02002009-07-03 06:45:56 +0000157
158 // VRSAVE save area offset.
159 std::pair<unsigned, int>(PPC::VRSAVE, -4),
160
161 // Vector register save area
162 std::pair<unsigned, int>(PPC::V31, -16),
163 std::pair<unsigned, int>(PPC::V30, -32),
164 std::pair<unsigned, int>(PPC::V29, -48),
165 std::pair<unsigned, int>(PPC::V28, -64),
166 std::pair<unsigned, int>(PPC::V27, -80),
167 std::pair<unsigned, int>(PPC::V26, -96),
168 std::pair<unsigned, int>(PPC::V25, -112),
169 std::pair<unsigned, int>(PPC::V24, -128),
170 std::pair<unsigned, int>(PPC::V23, -144),
171 std::pair<unsigned, int>(PPC::V22, -160),
172 std::pair<unsigned, int>(PPC::V21, -176),
173 std::pair<unsigned, int>(PPC::V20, -192)
174 };
175
Tilmann Scheller6b16eff2009-08-15 11:54:46 +0000176 static const std::pair<unsigned, int> Offsets64[] = {
177 // Floating-point register save area offsets.
178 std::pair<unsigned, int>(PPC::F31, -8),
179 std::pair<unsigned, int>(PPC::F30, -16),
180 std::pair<unsigned, int>(PPC::F29, -24),
181 std::pair<unsigned, int>(PPC::F28, -32),
182 std::pair<unsigned, int>(PPC::F27, -40),
183 std::pair<unsigned, int>(PPC::F26, -48),
184 std::pair<unsigned, int>(PPC::F25, -56),
185 std::pair<unsigned, int>(PPC::F24, -64),
186 std::pair<unsigned, int>(PPC::F23, -72),
187 std::pair<unsigned, int>(PPC::F22, -80),
188 std::pair<unsigned, int>(PPC::F21, -88),
189 std::pair<unsigned, int>(PPC::F20, -96),
190 std::pair<unsigned, int>(PPC::F19, -104),
191 std::pair<unsigned, int>(PPC::F18, -112),
192 std::pair<unsigned, int>(PPC::F17, -120),
193 std::pair<unsigned, int>(PPC::F16, -128),
194 std::pair<unsigned, int>(PPC::F15, -136),
195 std::pair<unsigned, int>(PPC::F14, -144),
196
197 // General register save area offsets.
198 // FIXME 64-bit SVR4: Are 32-bit registers actually allocated in 64-bit
199 // mode?
200 std::pair<unsigned, int>(PPC::R31, -4),
201 std::pair<unsigned, int>(PPC::R30, -12),
202 std::pair<unsigned, int>(PPC::R29, -20),
203 std::pair<unsigned, int>(PPC::R28, -28),
204 std::pair<unsigned, int>(PPC::R27, -36),
205 std::pair<unsigned, int>(PPC::R26, -44),
206 std::pair<unsigned, int>(PPC::R25, -52),
207 std::pair<unsigned, int>(PPC::R24, -60),
208 std::pair<unsigned, int>(PPC::R23, -68),
209 std::pair<unsigned, int>(PPC::R22, -76),
210 std::pair<unsigned, int>(PPC::R21, -84),
211 std::pair<unsigned, int>(PPC::R20, -92),
212 std::pair<unsigned, int>(PPC::R19, -100),
213 std::pair<unsigned, int>(PPC::R18, -108),
214 std::pair<unsigned, int>(PPC::R17, -116),
215 std::pair<unsigned, int>(PPC::R16, -124),
216 std::pair<unsigned, int>(PPC::R15, -132),
217 std::pair<unsigned, int>(PPC::R14, -140),
218
219 std::pair<unsigned, int>(PPC::X31, -8),
220 std::pair<unsigned, int>(PPC::X30, -16),
221 std::pair<unsigned, int>(PPC::X29, -24),
222 std::pair<unsigned, int>(PPC::X28, -32),
223 std::pair<unsigned, int>(PPC::X27, -40),
224 std::pair<unsigned, int>(PPC::X26, -48),
225 std::pair<unsigned, int>(PPC::X25, -56),
226 std::pair<unsigned, int>(PPC::X24, -64),
227 std::pair<unsigned, int>(PPC::X23, -72),
228 std::pair<unsigned, int>(PPC::X22, -80),
229 std::pair<unsigned, int>(PPC::X21, -88),
230 std::pair<unsigned, int>(PPC::X20, -96),
231 std::pair<unsigned, int>(PPC::X19, -104),
232 std::pair<unsigned, int>(PPC::X18, -112),
233 std::pair<unsigned, int>(PPC::X17, -120),
234 std::pair<unsigned, int>(PPC::X16, -128),
235 std::pair<unsigned, int>(PPC::X15, -136),
236 std::pair<unsigned, int>(PPC::X14, -144),
237
238 // CR save area offset.
239 // FIXME SVR4: Disable CR save area for now.
240// std::pair<unsigned, int>(PPC::CR2, -4),
241// std::pair<unsigned, int>(PPC::CR3, -4),
242// std::pair<unsigned, int>(PPC::CR4, -4),
243// std::pair<unsigned, int>(PPC::CR2LT, -4),
244// std::pair<unsigned, int>(PPC::CR2GT, -4),
245// std::pair<unsigned, int>(PPC::CR2EQ, -4),
246// std::pair<unsigned, int>(PPC::CR2UN, -4),
247// std::pair<unsigned, int>(PPC::CR3LT, -4),
248// std::pair<unsigned, int>(PPC::CR3GT, -4),
249// std::pair<unsigned, int>(PPC::CR3EQ, -4),
250// std::pair<unsigned, int>(PPC::CR3UN, -4),
251// std::pair<unsigned, int>(PPC::CR4LT, -4),
252// std::pair<unsigned, int>(PPC::CR4GT, -4),
253// std::pair<unsigned, int>(PPC::CR4EQ, -4),
254// std::pair<unsigned, int>(PPC::CR4UN, -4),
255
256 // VRSAVE save area offset.
257 std::pair<unsigned, int>(PPC::VRSAVE, -4),
258
259 // Vector register save area
260 std::pair<unsigned, int>(PPC::V31, -16),
261 std::pair<unsigned, int>(PPC::V30, -32),
262 std::pair<unsigned, int>(PPC::V29, -48),
263 std::pair<unsigned, int>(PPC::V28, -64),
264 std::pair<unsigned, int>(PPC::V27, -80),
265 std::pair<unsigned, int>(PPC::V26, -96),
266 std::pair<unsigned, int>(PPC::V25, -112),
267 std::pair<unsigned, int>(PPC::V24, -128),
268 std::pair<unsigned, int>(PPC::V23, -144),
269 std::pair<unsigned, int>(PPC::V22, -160),
270 std::pair<unsigned, int>(PPC::V21, -176),
271 std::pair<unsigned, int>(PPC::V20, -192)
272 };
Tilmann Schellerffd02002009-07-03 06:45:56 +0000273
Tilmann Scheller6b16eff2009-08-15 11:54:46 +0000274 if (TM.getSubtarget<PPCSubtarget>().isPPC64()) {
275 NumEntries = array_lengthof(Offsets64);
276
277 return Offsets64;
278 } else {
279 NumEntries = array_lengthof(Offsets);
280
281 return Offsets;
282 }
Tilmann Schellerffd02002009-07-03 06:45:56 +0000283 }
Nate Begemanca068e82004-08-14 22:16:36 +0000284};
285
286} // End llvm namespace
287
288#endif