Nate Begeman | 21e463b | 2005-10-16 05:39:50 +0000 | [diff] [blame] | 1 | //===-- PPCFrameInfo.h - Define TargetFrameInfo for PowerPC -----*- C++ -*-===// |
Misha Brukman | b5f662f | 2005-04-21 23:30:14 +0000 | [diff] [blame] | 2 | // |
Nate Begeman | ca068e8 | 2004-08-14 22:16:36 +0000 | [diff] [blame] | 3 | // The LLVM Compiler Infrastructure |
| 4 | // |
Chris Lattner | 4ee451d | 2007-12-29 20:36:04 +0000 | [diff] [blame] | 5 | // This file is distributed under the University of Illinois Open Source |
| 6 | // License. See LICENSE.TXT for details. |
Misha Brukman | b5f662f | 2005-04-21 23:30:14 +0000 | [diff] [blame] | 7 | // |
Nate Begeman | ca068e8 | 2004-08-14 22:16:36 +0000 | [diff] [blame] | 8 | //===----------------------------------------------------------------------===// |
| 9 | // |
| 10 | // |
Nate Begeman | 21e463b | 2005-10-16 05:39:50 +0000 | [diff] [blame] | 11 | //===----------------------------------------------------------------------===// |
Nate Begeman | ca068e8 | 2004-08-14 22:16:36 +0000 | [diff] [blame] | 12 | |
| 13 | #ifndef POWERPC_FRAMEINFO_H |
| 14 | #define POWERPC_FRAMEINFO_H |
| 15 | |
Chris Lattner | 2668959 | 2005-10-14 23:51:18 +0000 | [diff] [blame] | 16 | #include "PPC.h" |
Tilmann Scheller | ffd0200 | 2009-07-03 06:45:56 +0000 | [diff] [blame] | 17 | #include "PPCSubtarget.h" |
Nate Begeman | ca068e8 | 2004-08-14 22:16:36 +0000 | [diff] [blame] | 18 | #include "llvm/Target/TargetFrameInfo.h" |
| 19 | #include "llvm/Target/TargetMachine.h" |
Tilmann Scheller | ffd0200 | 2009-07-03 06:45:56 +0000 | [diff] [blame] | 20 | #include "llvm/ADT/STLExtras.h" |
Nate Begeman | ca068e8 | 2004-08-14 22:16:36 +0000 | [diff] [blame] | 21 | |
| 22 | namespace llvm { |
| 23 | |
Nate Begeman | 21e463b | 2005-10-16 05:39:50 +0000 | [diff] [blame] | 24 | class PPCFrameInfo: public TargetFrameInfo { |
Nate Begeman | ca068e8 | 2004-08-14 22:16:36 +0000 | [diff] [blame] | 25 | const TargetMachine &TM; |
Misha Brukman | b5f662f | 2005-04-21 23:30:14 +0000 | [diff] [blame] | 26 | |
Nate Begeman | ca068e8 | 2004-08-14 22:16:36 +0000 | [diff] [blame] | 27 | public: |
Nate Begeman | 21e463b | 2005-10-16 05:39:50 +0000 | [diff] [blame] | 28 | PPCFrameInfo(const TargetMachine &tm, bool LP64) |
Misha Brukman | 6316181 | 2004-08-17 05:09:39 +0000 | [diff] [blame] | 29 | : TargetFrameInfo(TargetFrameInfo::StackGrowsDown, 16, 0), TM(tm) { |
Nate Begeman | ca068e8 | 2004-08-14 22:16:36 +0000 | [diff] [blame] | 30 | } |
| 31 | |
Jim Laskey | 51fe9d9 | 2006-12-06 17:42:06 +0000 | [diff] [blame] | 32 | /// getReturnSaveOffset - Return the previous frame offset to save the |
| 33 | /// return address. |
Tilmann Scheller | 6b16eff | 2009-08-15 11:54:46 +0000 | [diff] [blame^] | 34 | static unsigned getReturnSaveOffset(bool isPPC64, bool isDarwinABI) { |
Tilmann Scheller | 2a9ddfb | 2009-07-03 06:47:08 +0000 | [diff] [blame] | 35 | if (isDarwinABI) |
Tilmann Scheller | 6b16eff | 2009-08-15 11:54:46 +0000 | [diff] [blame^] | 36 | return isPPC64 ? 16 : 8; |
Tilmann Scheller | 2a9ddfb | 2009-07-03 06:47:08 +0000 | [diff] [blame] | 37 | // SVR4 ABI: |
Tilmann Scheller | 6b16eff | 2009-08-15 11:54:46 +0000 | [diff] [blame^] | 38 | return isPPC64 ? 16 : 4; |
Nate Begeman | ca068e8 | 2004-08-14 22:16:36 +0000 | [diff] [blame] | 39 | } |
Jim Laskey | 51fe9d9 | 2006-12-06 17:42:06 +0000 | [diff] [blame] | 40 | |
Jim Laskey | 2f616bf | 2006-11-16 22:43:37 +0000 | [diff] [blame] | 41 | /// getFramePointerSaveOffset - Return the previous frame offset to save the |
| 42 | /// frame pointer. |
Tilmann Scheller | 6b16eff | 2009-08-15 11:54:46 +0000 | [diff] [blame^] | 43 | static unsigned getFramePointerSaveOffset(bool isPPC64, bool isDarwinABI) { |
Tilmann Scheller | 2a9ddfb | 2009-07-03 06:47:08 +0000 | [diff] [blame] | 44 | // For the Darwin ABI: |
Jim Laskey | 2f616bf | 2006-11-16 22:43:37 +0000 | [diff] [blame] | 45 | // Use the TOC save slot in the PowerPC linkage area for saving the frame |
| 46 | // pointer (if needed.) LLVM does not generate code that uses the TOC (R2 |
| 47 | // is treated as a caller saved register.) |
Tilmann Scheller | 2a9ddfb | 2009-07-03 06:47:08 +0000 | [diff] [blame] | 48 | if (isDarwinABI) |
Tilmann Scheller | 6b16eff | 2009-08-15 11:54:46 +0000 | [diff] [blame^] | 49 | return isPPC64 ? 40 : 20; |
Chris Lattner | 9f0bc65 | 2007-02-25 05:34:32 +0000 | [diff] [blame] | 50 | |
Tilmann Scheller | 6b16eff | 2009-08-15 11:54:46 +0000 | [diff] [blame^] | 51 | // SVR4 ABI: First slot in the general register save area. |
Reid Spencer | 6733a16 | 2007-04-04 22:07:24 +0000 | [diff] [blame] | 52 | return -4U; |
Jim Laskey | 2f616bf | 2006-11-16 22:43:37 +0000 | [diff] [blame] | 53 | } |
| 54 | |
| 55 | /// getLinkageSize - Return the size of the PowerPC ABI linkage area. |
| 56 | /// |
Tilmann Scheller | 6b16eff | 2009-08-15 11:54:46 +0000 | [diff] [blame^] | 57 | static unsigned getLinkageSize(bool isPPC64, bool isDarwinABI) { |
| 58 | if (isDarwinABI || isPPC64) |
| 59 | return 6 * (isPPC64 ? 8 : 4); |
Chris Lattner | 9f0bc65 | 2007-02-25 05:34:32 +0000 | [diff] [blame] | 60 | |
Tilmann Scheller | 2a9ddfb | 2009-07-03 06:47:08 +0000 | [diff] [blame] | 61 | // SVR4 ABI: |
Nicolas Geoffray | ec58d9f | 2007-04-03 12:35:28 +0000 | [diff] [blame] | 62 | return 8; |
Jim Laskey | 2f616bf | 2006-11-16 22:43:37 +0000 | [diff] [blame] | 63 | } |
| 64 | |
| 65 | /// getMinCallArgumentsSize - Return the size of the minium PowerPC ABI |
| 66 | /// argument area. |
Tilmann Scheller | 6b16eff | 2009-08-15 11:54:46 +0000 | [diff] [blame^] | 67 | static unsigned getMinCallArgumentsSize(bool isPPC64, bool isDarwinABI) { |
| 68 | // For the Darwin ABI / 64-bit SVR4 ABI: |
Chris Lattner | 9f0bc65 | 2007-02-25 05:34:32 +0000 | [diff] [blame] | 69 | // The prolog code of the callee may store up to 8 GPR argument registers to |
| 70 | // the stack, allowing va_start to index over them in memory if its varargs. |
| 71 | // Because we cannot tell if this is needed on the caller side, we have to |
| 72 | // conservatively assume that it is needed. As such, make sure we have at |
| 73 | // least enough stack space for the caller to store the 8 GPRs. |
Tilmann Scheller | 6b16eff | 2009-08-15 11:54:46 +0000 | [diff] [blame^] | 74 | if (isDarwinABI || isPPC64) |
| 75 | return 8 * (isPPC64 ? 8 : 4); |
Chris Lattner | 9f0bc65 | 2007-02-25 05:34:32 +0000 | [diff] [blame] | 76 | |
Tilmann Scheller | 6b16eff | 2009-08-15 11:54:46 +0000 | [diff] [blame^] | 77 | // 32-bit SVR4 ABI: |
Chris Lattner | 9f0bc65 | 2007-02-25 05:34:32 +0000 | [diff] [blame] | 78 | // There is no default stack allocated for the 8 first GPR arguments. |
| 79 | return 0; |
Jim Laskey | 2f616bf | 2006-11-16 22:43:37 +0000 | [diff] [blame] | 80 | } |
| 81 | |
| 82 | /// getMinCallFrameSize - Return the minimum size a call frame can be using |
| 83 | /// the PowerPC ABI. |
Tilmann Scheller | 6b16eff | 2009-08-15 11:54:46 +0000 | [diff] [blame^] | 84 | static unsigned getMinCallFrameSize(bool isPPC64, bool isDarwinABI) { |
Jim Laskey | 2f616bf | 2006-11-16 22:43:37 +0000 | [diff] [blame] | 85 | // The call frame needs to be at least big enough for linkage and 8 args. |
Tilmann Scheller | 6b16eff | 2009-08-15 11:54:46 +0000 | [diff] [blame^] | 86 | return getLinkageSize(isPPC64, isDarwinABI) + |
| 87 | getMinCallArgumentsSize(isPPC64, isDarwinABI); |
Jim Laskey | 2f616bf | 2006-11-16 22:43:37 +0000 | [diff] [blame] | 88 | } |
Tilmann Scheller | ffd0200 | 2009-07-03 06:45:56 +0000 | [diff] [blame] | 89 | |
| 90 | // With the SVR4 ABI, callee-saved registers have fixed offsets on the stack. |
| 91 | const std::pair<unsigned, int> * |
| 92 | getCalleeSavedSpillSlots(unsigned &NumEntries) const { |
| 93 | // Early exit if not using the SVR4 ABI. |
Tilmann Scheller | 2a9ddfb | 2009-07-03 06:47:08 +0000 | [diff] [blame] | 94 | if (!TM.getSubtarget<PPCSubtarget>().isSVR4ABI()) { |
Tilmann Scheller | ffd0200 | 2009-07-03 06:45:56 +0000 | [diff] [blame] | 95 | NumEntries = 0; |
| 96 | return 0; |
| 97 | } |
| 98 | |
| 99 | static const std::pair<unsigned, int> Offsets[] = { |
| 100 | // Floating-point register save area offsets. |
| 101 | std::pair<unsigned, int>(PPC::F31, -8), |
| 102 | std::pair<unsigned, int>(PPC::F30, -16), |
| 103 | std::pair<unsigned, int>(PPC::F29, -24), |
| 104 | std::pair<unsigned, int>(PPC::F28, -32), |
| 105 | std::pair<unsigned, int>(PPC::F27, -40), |
| 106 | std::pair<unsigned, int>(PPC::F26, -48), |
| 107 | std::pair<unsigned, int>(PPC::F25, -56), |
| 108 | std::pair<unsigned, int>(PPC::F24, -64), |
| 109 | std::pair<unsigned, int>(PPC::F23, -72), |
| 110 | std::pair<unsigned, int>(PPC::F22, -80), |
| 111 | std::pair<unsigned, int>(PPC::F21, -88), |
| 112 | std::pair<unsigned, int>(PPC::F20, -96), |
| 113 | std::pair<unsigned, int>(PPC::F19, -104), |
| 114 | std::pair<unsigned, int>(PPC::F18, -112), |
| 115 | std::pair<unsigned, int>(PPC::F17, -120), |
| 116 | std::pair<unsigned, int>(PPC::F16, -128), |
| 117 | std::pair<unsigned, int>(PPC::F15, -136), |
| 118 | std::pair<unsigned, int>(PPC::F14, -144), |
| 119 | |
| 120 | // General register save area offsets. |
| 121 | std::pair<unsigned, int>(PPC::R31, -4), |
| 122 | std::pair<unsigned, int>(PPC::R30, -8), |
| 123 | std::pair<unsigned, int>(PPC::R29, -12), |
| 124 | std::pair<unsigned, int>(PPC::R28, -16), |
| 125 | std::pair<unsigned, int>(PPC::R27, -20), |
| 126 | std::pair<unsigned, int>(PPC::R26, -24), |
| 127 | std::pair<unsigned, int>(PPC::R25, -28), |
| 128 | std::pair<unsigned, int>(PPC::R24, -32), |
| 129 | std::pair<unsigned, int>(PPC::R23, -36), |
| 130 | std::pair<unsigned, int>(PPC::R22, -40), |
| 131 | std::pair<unsigned, int>(PPC::R21, -44), |
| 132 | std::pair<unsigned, int>(PPC::R20, -48), |
| 133 | std::pair<unsigned, int>(PPC::R19, -52), |
| 134 | std::pair<unsigned, int>(PPC::R18, -56), |
| 135 | std::pair<unsigned, int>(PPC::R17, -60), |
| 136 | std::pair<unsigned, int>(PPC::R16, -64), |
| 137 | std::pair<unsigned, int>(PPC::R15, -68), |
| 138 | std::pair<unsigned, int>(PPC::R14, -72), |
| 139 | |
| 140 | // CR save area offset. |
Tilmann Scheller | 6a3a1ba | 2009-07-03 06:47:55 +0000 | [diff] [blame] | 141 | // FIXME SVR4: Disable CR save area for now. |
| 142 | // std::pair<unsigned, int>(PPC::CR2, -4), |
| 143 | // std::pair<unsigned, int>(PPC::CR3, -4), |
| 144 | // std::pair<unsigned, int>(PPC::CR4, -4), |
| 145 | // std::pair<unsigned, int>(PPC::CR2LT, -4), |
| 146 | // std::pair<unsigned, int>(PPC::CR2GT, -4), |
| 147 | // std::pair<unsigned, int>(PPC::CR2EQ, -4), |
| 148 | // std::pair<unsigned, int>(PPC::CR2UN, -4), |
| 149 | // std::pair<unsigned, int>(PPC::CR3LT, -4), |
| 150 | // std::pair<unsigned, int>(PPC::CR3GT, -4), |
| 151 | // std::pair<unsigned, int>(PPC::CR3EQ, -4), |
| 152 | // std::pair<unsigned, int>(PPC::CR3UN, -4), |
| 153 | // std::pair<unsigned, int>(PPC::CR4LT, -4), |
| 154 | // std::pair<unsigned, int>(PPC::CR4GT, -4), |
| 155 | // std::pair<unsigned, int>(PPC::CR4EQ, -4), |
| 156 | // std::pair<unsigned, int>(PPC::CR4UN, -4), |
Tilmann Scheller | ffd0200 | 2009-07-03 06:45:56 +0000 | [diff] [blame] | 157 | |
| 158 | // VRSAVE save area offset. |
| 159 | std::pair<unsigned, int>(PPC::VRSAVE, -4), |
| 160 | |
| 161 | // Vector register save area |
| 162 | std::pair<unsigned, int>(PPC::V31, -16), |
| 163 | std::pair<unsigned, int>(PPC::V30, -32), |
| 164 | std::pair<unsigned, int>(PPC::V29, -48), |
| 165 | std::pair<unsigned, int>(PPC::V28, -64), |
| 166 | std::pair<unsigned, int>(PPC::V27, -80), |
| 167 | std::pair<unsigned, int>(PPC::V26, -96), |
| 168 | std::pair<unsigned, int>(PPC::V25, -112), |
| 169 | std::pair<unsigned, int>(PPC::V24, -128), |
| 170 | std::pair<unsigned, int>(PPC::V23, -144), |
| 171 | std::pair<unsigned, int>(PPC::V22, -160), |
| 172 | std::pair<unsigned, int>(PPC::V21, -176), |
| 173 | std::pair<unsigned, int>(PPC::V20, -192) |
| 174 | }; |
| 175 | |
Tilmann Scheller | 6b16eff | 2009-08-15 11:54:46 +0000 | [diff] [blame^] | 176 | static const std::pair<unsigned, int> Offsets64[] = { |
| 177 | // Floating-point register save area offsets. |
| 178 | std::pair<unsigned, int>(PPC::F31, -8), |
| 179 | std::pair<unsigned, int>(PPC::F30, -16), |
| 180 | std::pair<unsigned, int>(PPC::F29, -24), |
| 181 | std::pair<unsigned, int>(PPC::F28, -32), |
| 182 | std::pair<unsigned, int>(PPC::F27, -40), |
| 183 | std::pair<unsigned, int>(PPC::F26, -48), |
| 184 | std::pair<unsigned, int>(PPC::F25, -56), |
| 185 | std::pair<unsigned, int>(PPC::F24, -64), |
| 186 | std::pair<unsigned, int>(PPC::F23, -72), |
| 187 | std::pair<unsigned, int>(PPC::F22, -80), |
| 188 | std::pair<unsigned, int>(PPC::F21, -88), |
| 189 | std::pair<unsigned, int>(PPC::F20, -96), |
| 190 | std::pair<unsigned, int>(PPC::F19, -104), |
| 191 | std::pair<unsigned, int>(PPC::F18, -112), |
| 192 | std::pair<unsigned, int>(PPC::F17, -120), |
| 193 | std::pair<unsigned, int>(PPC::F16, -128), |
| 194 | std::pair<unsigned, int>(PPC::F15, -136), |
| 195 | std::pair<unsigned, int>(PPC::F14, -144), |
| 196 | |
| 197 | // General register save area offsets. |
| 198 | // FIXME 64-bit SVR4: Are 32-bit registers actually allocated in 64-bit |
| 199 | // mode? |
| 200 | std::pair<unsigned, int>(PPC::R31, -4), |
| 201 | std::pair<unsigned, int>(PPC::R30, -12), |
| 202 | std::pair<unsigned, int>(PPC::R29, -20), |
| 203 | std::pair<unsigned, int>(PPC::R28, -28), |
| 204 | std::pair<unsigned, int>(PPC::R27, -36), |
| 205 | std::pair<unsigned, int>(PPC::R26, -44), |
| 206 | std::pair<unsigned, int>(PPC::R25, -52), |
| 207 | std::pair<unsigned, int>(PPC::R24, -60), |
| 208 | std::pair<unsigned, int>(PPC::R23, -68), |
| 209 | std::pair<unsigned, int>(PPC::R22, -76), |
| 210 | std::pair<unsigned, int>(PPC::R21, -84), |
| 211 | std::pair<unsigned, int>(PPC::R20, -92), |
| 212 | std::pair<unsigned, int>(PPC::R19, -100), |
| 213 | std::pair<unsigned, int>(PPC::R18, -108), |
| 214 | std::pair<unsigned, int>(PPC::R17, -116), |
| 215 | std::pair<unsigned, int>(PPC::R16, -124), |
| 216 | std::pair<unsigned, int>(PPC::R15, -132), |
| 217 | std::pair<unsigned, int>(PPC::R14, -140), |
| 218 | |
| 219 | std::pair<unsigned, int>(PPC::X31, -8), |
| 220 | std::pair<unsigned, int>(PPC::X30, -16), |
| 221 | std::pair<unsigned, int>(PPC::X29, -24), |
| 222 | std::pair<unsigned, int>(PPC::X28, -32), |
| 223 | std::pair<unsigned, int>(PPC::X27, -40), |
| 224 | std::pair<unsigned, int>(PPC::X26, -48), |
| 225 | std::pair<unsigned, int>(PPC::X25, -56), |
| 226 | std::pair<unsigned, int>(PPC::X24, -64), |
| 227 | std::pair<unsigned, int>(PPC::X23, -72), |
| 228 | std::pair<unsigned, int>(PPC::X22, -80), |
| 229 | std::pair<unsigned, int>(PPC::X21, -88), |
| 230 | std::pair<unsigned, int>(PPC::X20, -96), |
| 231 | std::pair<unsigned, int>(PPC::X19, -104), |
| 232 | std::pair<unsigned, int>(PPC::X18, -112), |
| 233 | std::pair<unsigned, int>(PPC::X17, -120), |
| 234 | std::pair<unsigned, int>(PPC::X16, -128), |
| 235 | std::pair<unsigned, int>(PPC::X15, -136), |
| 236 | std::pair<unsigned, int>(PPC::X14, -144), |
| 237 | |
| 238 | // CR save area offset. |
| 239 | // FIXME SVR4: Disable CR save area for now. |
| 240 | // std::pair<unsigned, int>(PPC::CR2, -4), |
| 241 | // std::pair<unsigned, int>(PPC::CR3, -4), |
| 242 | // std::pair<unsigned, int>(PPC::CR4, -4), |
| 243 | // std::pair<unsigned, int>(PPC::CR2LT, -4), |
| 244 | // std::pair<unsigned, int>(PPC::CR2GT, -4), |
| 245 | // std::pair<unsigned, int>(PPC::CR2EQ, -4), |
| 246 | // std::pair<unsigned, int>(PPC::CR2UN, -4), |
| 247 | // std::pair<unsigned, int>(PPC::CR3LT, -4), |
| 248 | // std::pair<unsigned, int>(PPC::CR3GT, -4), |
| 249 | // std::pair<unsigned, int>(PPC::CR3EQ, -4), |
| 250 | // std::pair<unsigned, int>(PPC::CR3UN, -4), |
| 251 | // std::pair<unsigned, int>(PPC::CR4LT, -4), |
| 252 | // std::pair<unsigned, int>(PPC::CR4GT, -4), |
| 253 | // std::pair<unsigned, int>(PPC::CR4EQ, -4), |
| 254 | // std::pair<unsigned, int>(PPC::CR4UN, -4), |
| 255 | |
| 256 | // VRSAVE save area offset. |
| 257 | std::pair<unsigned, int>(PPC::VRSAVE, -4), |
| 258 | |
| 259 | // Vector register save area |
| 260 | std::pair<unsigned, int>(PPC::V31, -16), |
| 261 | std::pair<unsigned, int>(PPC::V30, -32), |
| 262 | std::pair<unsigned, int>(PPC::V29, -48), |
| 263 | std::pair<unsigned, int>(PPC::V28, -64), |
| 264 | std::pair<unsigned, int>(PPC::V27, -80), |
| 265 | std::pair<unsigned, int>(PPC::V26, -96), |
| 266 | std::pair<unsigned, int>(PPC::V25, -112), |
| 267 | std::pair<unsigned, int>(PPC::V24, -128), |
| 268 | std::pair<unsigned, int>(PPC::V23, -144), |
| 269 | std::pair<unsigned, int>(PPC::V22, -160), |
| 270 | std::pair<unsigned, int>(PPC::V21, -176), |
| 271 | std::pair<unsigned, int>(PPC::V20, -192) |
| 272 | }; |
Tilmann Scheller | ffd0200 | 2009-07-03 06:45:56 +0000 | [diff] [blame] | 273 | |
Tilmann Scheller | 6b16eff | 2009-08-15 11:54:46 +0000 | [diff] [blame^] | 274 | if (TM.getSubtarget<PPCSubtarget>().isPPC64()) { |
| 275 | NumEntries = array_lengthof(Offsets64); |
| 276 | |
| 277 | return Offsets64; |
| 278 | } else { |
| 279 | NumEntries = array_lengthof(Offsets); |
| 280 | |
| 281 | return Offsets; |
| 282 | } |
Tilmann Scheller | ffd0200 | 2009-07-03 06:45:56 +0000 | [diff] [blame] | 283 | } |
Nate Begeman | ca068e8 | 2004-08-14 22:16:36 +0000 | [diff] [blame] | 284 | }; |
| 285 | |
| 286 | } // End llvm namespace |
| 287 | |
| 288 | #endif |