Chris Lattner | b74e83c | 2002-12-16 16:15:28 +0000 | [diff] [blame] | 1 | //===-- RegAllocLocal.cpp - A BasicBlock generic register allocator -------===// |
| 2 | // |
| 3 | // This register allocator allocates registers to a basic block at a time, |
| 4 | // attempting to keep values in registers and reusing registers as appropriate. |
| 5 | // |
| 6 | //===----------------------------------------------------------------------===// |
| 7 | |
Chris Lattner | 4cc662b | 2003-08-03 21:47:31 +0000 | [diff] [blame] | 8 | #define DEBUG_TYPE "regalloc" |
Chris Lattner | 91a452b | 2003-01-13 00:25:40 +0000 | [diff] [blame] | 9 | #include "llvm/CodeGen/Passes.h" |
Chris Lattner | 580f9be | 2002-12-28 20:40:43 +0000 | [diff] [blame] | 10 | #include "llvm/CodeGen/MachineFunctionPass.h" |
Chris Lattner | b74e83c | 2002-12-16 16:15:28 +0000 | [diff] [blame] | 11 | #include "llvm/CodeGen/MachineInstr.h" |
Chris Lattner | ff863ba | 2002-12-25 05:05:46 +0000 | [diff] [blame] | 12 | #include "llvm/CodeGen/SSARegMap.h" |
Chris Lattner | eb24db9 | 2002-12-28 21:08:26 +0000 | [diff] [blame] | 13 | #include "llvm/CodeGen/MachineFrameInfo.h" |
Chris Lattner | 91a452b | 2003-01-13 00:25:40 +0000 | [diff] [blame] | 14 | #include "llvm/CodeGen/LiveVariables.h" |
Chris Lattner | 3501fea | 2003-01-14 22:00:31 +0000 | [diff] [blame] | 15 | #include "llvm/Target/TargetInstrInfo.h" |
Chris Lattner | b74e83c | 2002-12-16 16:15:28 +0000 | [diff] [blame] | 16 | #include "llvm/Target/TargetMachine.h" |
Chris Lattner | 82bee0f | 2002-12-18 08:14:26 +0000 | [diff] [blame] | 17 | #include "Support/CommandLine.h" |
Chris Lattner | a11136b | 2003-08-01 22:21:34 +0000 | [diff] [blame] | 18 | #include "Support/Debug.h" |
| 19 | #include "Support/Statistic.h" |
Chris Lattner | b74e83c | 2002-12-16 16:15:28 +0000 | [diff] [blame] | 20 | #include <iostream> |
| 21 | |
Chris Lattner | b74e83c | 2002-12-16 16:15:28 +0000 | [diff] [blame] | 22 | namespace { |
| 23 | Statistic<> NumSpilled ("ra-local", "Number of registers spilled"); |
| 24 | Statistic<> NumReloaded("ra-local", "Number of registers reloaded"); |
Chris Lattner | 82bee0f | 2002-12-18 08:14:26 +0000 | [diff] [blame] | 25 | cl::opt<bool> DisableKill("no-kill", cl::Hidden, |
| 26 | cl::desc("Disable register kill in local-ra")); |
Chris Lattner | b74e83c | 2002-12-16 16:15:28 +0000 | [diff] [blame] | 27 | |
Chris Lattner | 580f9be | 2002-12-28 20:40:43 +0000 | [diff] [blame] | 28 | class RA : public MachineFunctionPass { |
| 29 | const TargetMachine *TM; |
Chris Lattner | b74e83c | 2002-12-16 16:15:28 +0000 | [diff] [blame] | 30 | MachineFunction *MF; |
Chris Lattner | 580f9be | 2002-12-28 20:40:43 +0000 | [diff] [blame] | 31 | const MRegisterInfo *RegInfo; |
Chris Lattner | 91a452b | 2003-01-13 00:25:40 +0000 | [diff] [blame] | 32 | LiveVariables *LV; |
Chris Lattner | ff863ba | 2002-12-25 05:05:46 +0000 | [diff] [blame] | 33 | |
Chris Lattner | b8822ad | 2003-08-04 23:36:39 +0000 | [diff] [blame] | 34 | // StackSlotForVirtReg - Maps virtual regs to the frame index where these |
| 35 | // values are spilled. |
Chris Lattner | 580f9be | 2002-12-28 20:40:43 +0000 | [diff] [blame] | 36 | std::map<unsigned, int> StackSlotForVirtReg; |
Chris Lattner | b74e83c | 2002-12-16 16:15:28 +0000 | [diff] [blame] | 37 | |
| 38 | // Virt2PhysRegMap - This map contains entries for each virtual register |
| 39 | // that is currently available in a physical register. |
| 40 | // |
| 41 | std::map<unsigned, unsigned> Virt2PhysRegMap; |
| 42 | |
| 43 | // PhysRegsUsed - This map contains entries for each physical register that |
| 44 | // currently has a value (ie, it is in Virt2PhysRegMap). The value mapped |
| 45 | // to is the virtual register corresponding to the physical register (the |
| 46 | // inverse of the Virt2PhysRegMap), or 0. The value is set to 0 if this |
| 47 | // register is pinned because it is used by a future instruction. |
| 48 | // |
| 49 | std::map<unsigned, unsigned> PhysRegsUsed; |
| 50 | |
| 51 | // PhysRegsUseOrder - This contains a list of the physical registers that |
| 52 | // currently have a virtual register value in them. This list provides an |
| 53 | // ordering of registers, imposing a reallocation order. This list is only |
| 54 | // used if all registers are allocated and we have to spill one, in which |
| 55 | // case we spill the least recently used register. Entries at the front of |
| 56 | // the list are the least recently used registers, entries at the back are |
| 57 | // the most recently used. |
| 58 | // |
| 59 | std::vector<unsigned> PhysRegsUseOrder; |
| 60 | |
Chris Lattner | 91a452b | 2003-01-13 00:25:40 +0000 | [diff] [blame] | 61 | // VirtRegModified - This bitset contains information about which virtual |
| 62 | // registers need to be spilled back to memory when their registers are |
| 63 | // scavenged. If a virtual register has simply been rematerialized, there |
| 64 | // is no reason to spill it to memory when we need the register back. |
Chris Lattner | 82bee0f | 2002-12-18 08:14:26 +0000 | [diff] [blame] | 65 | // |
Chris Lattner | 91a452b | 2003-01-13 00:25:40 +0000 | [diff] [blame] | 66 | std::vector<bool> VirtRegModified; |
| 67 | |
| 68 | void markVirtRegModified(unsigned Reg, bool Val = true) { |
| 69 | assert(Reg >= MRegisterInfo::FirstVirtualRegister && "Illegal VirtReg!"); |
| 70 | Reg -= MRegisterInfo::FirstVirtualRegister; |
| 71 | if (VirtRegModified.size() <= Reg) VirtRegModified.resize(Reg+1); |
| 72 | VirtRegModified[Reg] = Val; |
| 73 | } |
| 74 | |
| 75 | bool isVirtRegModified(unsigned Reg) const { |
| 76 | assert(Reg >= MRegisterInfo::FirstVirtualRegister && "Illegal VirtReg!"); |
| 77 | assert(Reg - MRegisterInfo::FirstVirtualRegister < VirtRegModified.size() |
| 78 | && "Illegal virtual register!"); |
| 79 | return VirtRegModified[Reg - MRegisterInfo::FirstVirtualRegister]; |
| 80 | } |
Chris Lattner | 82bee0f | 2002-12-18 08:14:26 +0000 | [diff] [blame] | 81 | |
Chris Lattner | b74e83c | 2002-12-16 16:15:28 +0000 | [diff] [blame] | 82 | void MarkPhysRegRecentlyUsed(unsigned Reg) { |
Chris Lattner | 82bee0f | 2002-12-18 08:14:26 +0000 | [diff] [blame] | 83 | assert(!PhysRegsUseOrder.empty() && "No registers used!"); |
Chris Lattner | 0eb172c | 2002-12-24 00:04:55 +0000 | [diff] [blame] | 84 | if (PhysRegsUseOrder.back() == Reg) return; // Already most recently used |
| 85 | |
| 86 | for (unsigned i = PhysRegsUseOrder.size(); i != 0; --i) |
| 87 | if (areRegsEqual(Reg, PhysRegsUseOrder[i-1])) { |
| 88 | unsigned RegMatch = PhysRegsUseOrder[i-1]; // remove from middle |
| 89 | PhysRegsUseOrder.erase(PhysRegsUseOrder.begin()+i-1); |
| 90 | // Add it to the end of the list |
| 91 | PhysRegsUseOrder.push_back(RegMatch); |
| 92 | if (RegMatch == Reg) |
| 93 | return; // Found an exact match, exit early |
| 94 | } |
Chris Lattner | b74e83c | 2002-12-16 16:15:28 +0000 | [diff] [blame] | 95 | } |
| 96 | |
| 97 | public: |
Chris Lattner | b74e83c | 2002-12-16 16:15:28 +0000 | [diff] [blame] | 98 | virtual const char *getPassName() const { |
| 99 | return "Local Register Allocator"; |
| 100 | } |
| 101 | |
Chris Lattner | 91a452b | 2003-01-13 00:25:40 +0000 | [diff] [blame] | 102 | virtual void getAnalysisUsage(AnalysisUsage &AU) const { |
| 103 | if (!DisableKill) |
| 104 | AU.addRequired<LiveVariables>(); |
| 105 | AU.addRequiredID(PHIEliminationID); |
| 106 | MachineFunctionPass::getAnalysisUsage(AU); |
| 107 | } |
| 108 | |
Chris Lattner | b74e83c | 2002-12-16 16:15:28 +0000 | [diff] [blame] | 109 | private: |
| 110 | /// runOnMachineFunction - Register allocate the whole function |
| 111 | bool runOnMachineFunction(MachineFunction &Fn); |
| 112 | |
| 113 | /// AllocateBasicBlock - Register allocate the specified basic block. |
| 114 | void AllocateBasicBlock(MachineBasicBlock &MBB); |
| 115 | |
Chris Lattner | 82bee0f | 2002-12-18 08:14:26 +0000 | [diff] [blame] | 116 | |
Chris Lattner | 82bee0f | 2002-12-18 08:14:26 +0000 | [diff] [blame] | 117 | /// areRegsEqual - This method returns true if the specified registers are |
| 118 | /// related to each other. To do this, it checks to see if they are equal |
| 119 | /// or if the first register is in the alias set of the second register. |
| 120 | /// |
| 121 | bool areRegsEqual(unsigned R1, unsigned R2) const { |
| 122 | if (R1 == R2) return true; |
Chris Lattner | 580f9be | 2002-12-28 20:40:43 +0000 | [diff] [blame] | 123 | if (const unsigned *AliasSet = RegInfo->getAliasSet(R2)) |
Chris Lattner | 82bee0f | 2002-12-18 08:14:26 +0000 | [diff] [blame] | 124 | for (unsigned i = 0; AliasSet[i]; ++i) |
| 125 | if (AliasSet[i] == R1) return true; |
| 126 | return false; |
| 127 | } |
| 128 | |
Chris Lattner | 580f9be | 2002-12-28 20:40:43 +0000 | [diff] [blame] | 129 | /// getStackSpaceFor - This returns the frame index of the specified virtual |
Chris Lattner | b8822ad | 2003-08-04 23:36:39 +0000 | [diff] [blame] | 130 | /// register on the stack, allocating space if necessary. |
Chris Lattner | 580f9be | 2002-12-28 20:40:43 +0000 | [diff] [blame] | 131 | int getStackSpaceFor(unsigned VirtReg, const TargetRegisterClass *RC); |
Chris Lattner | b74e83c | 2002-12-16 16:15:28 +0000 | [diff] [blame] | 132 | |
Chris Lattner | b8822ad | 2003-08-04 23:36:39 +0000 | [diff] [blame] | 133 | /// removePhysReg - This method marks the specified physical register as no |
| 134 | /// longer being in use. |
| 135 | /// |
Chris Lattner | 82bee0f | 2002-12-18 08:14:26 +0000 | [diff] [blame] | 136 | void removePhysReg(unsigned PhysReg); |
Chris Lattner | b74e83c | 2002-12-16 16:15:28 +0000 | [diff] [blame] | 137 | |
| 138 | /// spillVirtReg - This method spills the value specified by PhysReg into |
| 139 | /// the virtual register slot specified by VirtReg. It then updates the RA |
| 140 | /// data structures to indicate the fact that PhysReg is now available. |
| 141 | /// |
| 142 | void spillVirtReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I, |
| 143 | unsigned VirtReg, unsigned PhysReg); |
| 144 | |
Chris Lattner | c21be92 | 2002-12-16 17:44:42 +0000 | [diff] [blame] | 145 | /// spillPhysReg - This method spills the specified physical register into |
Chris Lattner | 128c2aa | 2003-08-17 18:01:15 +0000 | [diff] [blame] | 146 | /// the virtual register slot associated with it. If OnlyVirtRegs is set to |
| 147 | /// true, then the request is ignored if the physical register does not |
| 148 | /// contain a virtual register. |
Chris Lattner | 91a452b | 2003-01-13 00:25:40 +0000 | [diff] [blame] | 149 | /// |
Chris Lattner | c21be92 | 2002-12-16 17:44:42 +0000 | [diff] [blame] | 150 | void spillPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I, |
Chris Lattner | 128c2aa | 2003-08-17 18:01:15 +0000 | [diff] [blame] | 151 | unsigned PhysReg, bool OnlyVirtRegs = false); |
Chris Lattner | c21be92 | 2002-12-16 17:44:42 +0000 | [diff] [blame] | 152 | |
Chris Lattner | 91a452b | 2003-01-13 00:25:40 +0000 | [diff] [blame] | 153 | /// assignVirtToPhysReg - This method updates local state so that we know |
| 154 | /// that PhysReg is the proper container for VirtReg now. The physical |
| 155 | /// register must not be used for anything else when this is called. |
| 156 | /// |
| 157 | void assignVirtToPhysReg(unsigned VirtReg, unsigned PhysReg); |
| 158 | |
| 159 | /// liberatePhysReg - Make sure the specified physical register is available |
| 160 | /// for use. If there is currently a value in it, it is either moved out of |
| 161 | /// the way or spilled to memory. |
| 162 | /// |
| 163 | void liberatePhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I, |
| 164 | unsigned PhysReg); |
Chris Lattner | b74e83c | 2002-12-16 16:15:28 +0000 | [diff] [blame] | 165 | |
Chris Lattner | ae64043 | 2002-12-17 02:50:10 +0000 | [diff] [blame] | 166 | /// isPhysRegAvailable - Return true if the specified physical register is |
| 167 | /// free and available for use. This also includes checking to see if |
| 168 | /// aliased registers are all free... |
| 169 | /// |
Chris Lattner | 82bee0f | 2002-12-18 08:14:26 +0000 | [diff] [blame] | 170 | bool isPhysRegAvailable(unsigned PhysReg) const; |
Chris Lattner | 91a452b | 2003-01-13 00:25:40 +0000 | [diff] [blame] | 171 | |
| 172 | /// getFreeReg - Look to see if there is a free register available in the |
| 173 | /// specified register class. If not, return 0. |
| 174 | /// |
| 175 | unsigned getFreeReg(const TargetRegisterClass *RC); |
Chris Lattner | b74e83c | 2002-12-16 16:15:28 +0000 | [diff] [blame] | 176 | |
Chris Lattner | 91a452b | 2003-01-13 00:25:40 +0000 | [diff] [blame] | 177 | /// getReg - Find a physical register to hold the specified virtual |
Chris Lattner | b74e83c | 2002-12-16 16:15:28 +0000 | [diff] [blame] | 178 | /// register. If all compatible physical registers are used, this method |
| 179 | /// spills the last used virtual register to the stack, and uses that |
| 180 | /// register. |
| 181 | /// |
Chris Lattner | 91a452b | 2003-01-13 00:25:40 +0000 | [diff] [blame] | 182 | unsigned getReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I, |
| 183 | unsigned VirtReg); |
Chris Lattner | b74e83c | 2002-12-16 16:15:28 +0000 | [diff] [blame] | 184 | |
| 185 | /// reloadVirtReg - This method loads the specified virtual register into a |
| 186 | /// physical register, returning the physical register chosen. This updates |
| 187 | /// the regalloc data structures to reflect the fact that the virtual reg is |
| 188 | /// now alive in a physical register, and the previous one isn't. |
| 189 | /// |
| 190 | unsigned reloadVirtReg(MachineBasicBlock &MBB, |
| 191 | MachineBasicBlock::iterator &I, unsigned VirtReg); |
Chris Lattner | b8822ad | 2003-08-04 23:36:39 +0000 | [diff] [blame] | 192 | |
| 193 | void reloadPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I, |
| 194 | unsigned PhysReg); |
Chris Lattner | b74e83c | 2002-12-16 16:15:28 +0000 | [diff] [blame] | 195 | }; |
Chris Lattner | b74e83c | 2002-12-16 16:15:28 +0000 | [diff] [blame] | 196 | } |
| 197 | |
Chris Lattner | ae64043 | 2002-12-17 02:50:10 +0000 | [diff] [blame] | 198 | |
Chris Lattner | b8822ad | 2003-08-04 23:36:39 +0000 | [diff] [blame] | 199 | /// getStackSpaceFor - This allocates space for the specified virtual register |
| 200 | /// to be held on the stack. |
| 201 | int RA::getStackSpaceFor(unsigned VirtReg, const TargetRegisterClass *RC) { |
| 202 | // Find the location Reg would belong... |
| 203 | std::map<unsigned, int>::iterator I =StackSlotForVirtReg.lower_bound(VirtReg); |
Chris Lattner | b74e83c | 2002-12-16 16:15:28 +0000 | [diff] [blame] | 204 | |
Chris Lattner | 580f9be | 2002-12-28 20:40:43 +0000 | [diff] [blame] | 205 | if (I != StackSlotForVirtReg.end() && I->first == VirtReg) |
Chris Lattner | b74e83c | 2002-12-16 16:15:28 +0000 | [diff] [blame] | 206 | return I->second; // Already has space allocated? |
| 207 | |
Chris Lattner | 580f9be | 2002-12-28 20:40:43 +0000 | [diff] [blame] | 208 | // Allocate a new stack object for this spill location... |
Chris Lattner | 91a452b | 2003-01-13 00:25:40 +0000 | [diff] [blame] | 209 | int FrameIdx = MF->getFrameInfo()->CreateStackObject(RC); |
Chris Lattner | b74e83c | 2002-12-16 16:15:28 +0000 | [diff] [blame] | 210 | |
Chris Lattner | b74e83c | 2002-12-16 16:15:28 +0000 | [diff] [blame] | 211 | // Assign the slot... |
Chris Lattner | 580f9be | 2002-12-28 20:40:43 +0000 | [diff] [blame] | 212 | StackSlotForVirtReg.insert(I, std::make_pair(VirtReg, FrameIdx)); |
| 213 | return FrameIdx; |
Chris Lattner | b74e83c | 2002-12-16 16:15:28 +0000 | [diff] [blame] | 214 | } |
| 215 | |
Chris Lattner | ae64043 | 2002-12-17 02:50:10 +0000 | [diff] [blame] | 216 | |
Chris Lattner | 82bee0f | 2002-12-18 08:14:26 +0000 | [diff] [blame] | 217 | /// removePhysReg - This method marks the specified physical register as no |
| 218 | /// longer being in use. |
| 219 | /// |
| 220 | void RA::removePhysReg(unsigned PhysReg) { |
| 221 | PhysRegsUsed.erase(PhysReg); // PhyReg no longer used |
| 222 | |
| 223 | std::vector<unsigned>::iterator It = |
| 224 | std::find(PhysRegsUseOrder.begin(), PhysRegsUseOrder.end(), PhysReg); |
| 225 | assert(It != PhysRegsUseOrder.end() && |
| 226 | "Spilled a physical register, but it was not in use list!"); |
| 227 | PhysRegsUseOrder.erase(It); |
| 228 | } |
| 229 | |
Chris Lattner | 91a452b | 2003-01-13 00:25:40 +0000 | [diff] [blame] | 230 | |
Chris Lattner | b74e83c | 2002-12-16 16:15:28 +0000 | [diff] [blame] | 231 | /// spillVirtReg - This method spills the value specified by PhysReg into the |
| 232 | /// virtual register slot specified by VirtReg. It then updates the RA data |
| 233 | /// structures to indicate the fact that PhysReg is now available. |
| 234 | /// |
| 235 | void RA::spillVirtReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I, |
| 236 | unsigned VirtReg, unsigned PhysReg) { |
Chris Lattner | 8c81945 | 2003-08-05 04:13:58 +0000 | [diff] [blame] | 237 | if (!VirtReg && DisableKill) return; |
| 238 | assert(VirtReg && "Spilling a physical register is illegal!" |
Chris Lattner | d9ac6a7 | 2003-08-05 00:49:09 +0000 | [diff] [blame] | 239 | " Must not have appropriate kill for the register or use exists beyond" |
| 240 | " the intended one."); |
| 241 | DEBUG(std::cerr << " Spilling register " << RegInfo->getName(PhysReg); |
| 242 | std::cerr << " containing %reg" << VirtReg; |
| 243 | if (!isVirtRegModified(VirtReg)) |
| 244 | std::cerr << " which has not been modified, so no store necessary!"); |
Chris Lattner | b74e83c | 2002-12-16 16:15:28 +0000 | [diff] [blame] | 245 | |
Chris Lattner | d9ac6a7 | 2003-08-05 00:49:09 +0000 | [diff] [blame] | 246 | // Otherwise, there is a virtual register corresponding to this physical |
| 247 | // register. We only need to spill it into its stack slot if it has been |
| 248 | // modified. |
| 249 | if (isVirtRegModified(VirtReg)) { |
| 250 | const TargetRegisterClass *RC = MF->getSSARegMap()->getRegClass(VirtReg); |
| 251 | int FrameIndex = getStackSpaceFor(VirtReg, RC); |
| 252 | DEBUG(std::cerr << " to stack slot #" << FrameIndex); |
| 253 | RegInfo->storeRegToStackSlot(MBB, I, PhysReg, FrameIndex, RC); |
| 254 | ++NumSpilled; // Update statistics |
Chris Lattner | b74e83c | 2002-12-16 16:15:28 +0000 | [diff] [blame] | 255 | } |
Chris Lattner | d9ac6a7 | 2003-08-05 00:49:09 +0000 | [diff] [blame] | 256 | Virt2PhysRegMap.erase(VirtReg); // VirtReg no longer available |
Chris Lattner | b74e83c | 2002-12-16 16:15:28 +0000 | [diff] [blame] | 257 | |
Chris Lattner | b8822ad | 2003-08-04 23:36:39 +0000 | [diff] [blame] | 258 | DEBUG(std::cerr << "\n"); |
Chris Lattner | 82bee0f | 2002-12-18 08:14:26 +0000 | [diff] [blame] | 259 | removePhysReg(PhysReg); |
Chris Lattner | b74e83c | 2002-12-16 16:15:28 +0000 | [diff] [blame] | 260 | } |
| 261 | |
Chris Lattner | ae64043 | 2002-12-17 02:50:10 +0000 | [diff] [blame] | 262 | |
Chris Lattner | 91a452b | 2003-01-13 00:25:40 +0000 | [diff] [blame] | 263 | /// spillPhysReg - This method spills the specified physical register into the |
Chris Lattner | 128c2aa | 2003-08-17 18:01:15 +0000 | [diff] [blame] | 264 | /// virtual register slot associated with it. If OnlyVirtRegs is set to true, |
| 265 | /// then the request is ignored if the physical register does not contain a |
| 266 | /// virtual register. |
Chris Lattner | 91a452b | 2003-01-13 00:25:40 +0000 | [diff] [blame] | 267 | /// |
| 268 | void RA::spillPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I, |
Chris Lattner | 128c2aa | 2003-08-17 18:01:15 +0000 | [diff] [blame] | 269 | unsigned PhysReg, bool OnlyVirtRegs) { |
Chris Lattner | 91a452b | 2003-01-13 00:25:40 +0000 | [diff] [blame] | 270 | std::map<unsigned, unsigned>::iterator PI = PhysRegsUsed.find(PhysReg); |
| 271 | if (PI != PhysRegsUsed.end()) { // Only spill it if it's used! |
Chris Lattner | 128c2aa | 2003-08-17 18:01:15 +0000 | [diff] [blame] | 272 | if (PI->second || !OnlyVirtRegs) |
| 273 | spillVirtReg(MBB, I, PI->second, PhysReg); |
Chris Lattner | 91a452b | 2003-01-13 00:25:40 +0000 | [diff] [blame] | 274 | } else if (const unsigned *AliasSet = RegInfo->getAliasSet(PhysReg)) { |
| 275 | // If the selected register aliases any other registers, we must make |
| 276 | // sure that one of the aliases isn't alive... |
| 277 | for (unsigned i = 0; AliasSet[i]; ++i) { |
| 278 | PI = PhysRegsUsed.find(AliasSet[i]); |
| 279 | if (PI != PhysRegsUsed.end()) // Spill aliased register... |
Chris Lattner | 128c2aa | 2003-08-17 18:01:15 +0000 | [diff] [blame] | 280 | if (PI->second || !OnlyVirtRegs) |
| 281 | spillVirtReg(MBB, I, PI->second, AliasSet[i]); |
Chris Lattner | 91a452b | 2003-01-13 00:25:40 +0000 | [diff] [blame] | 282 | } |
| 283 | } |
| 284 | } |
| 285 | |
| 286 | |
| 287 | /// assignVirtToPhysReg - This method updates local state so that we know |
| 288 | /// that PhysReg is the proper container for VirtReg now. The physical |
| 289 | /// register must not be used for anything else when this is called. |
| 290 | /// |
| 291 | void RA::assignVirtToPhysReg(unsigned VirtReg, unsigned PhysReg) { |
| 292 | assert(PhysRegsUsed.find(PhysReg) == PhysRegsUsed.end() && |
| 293 | "Phys reg already assigned!"); |
| 294 | // Update information to note the fact that this register was just used, and |
| 295 | // it holds VirtReg. |
| 296 | PhysRegsUsed[PhysReg] = VirtReg; |
| 297 | Virt2PhysRegMap[VirtReg] = PhysReg; |
| 298 | PhysRegsUseOrder.push_back(PhysReg); // New use of PhysReg |
| 299 | } |
| 300 | |
| 301 | |
Chris Lattner | ae64043 | 2002-12-17 02:50:10 +0000 | [diff] [blame] | 302 | /// isPhysRegAvailable - Return true if the specified physical register is free |
| 303 | /// and available for use. This also includes checking to see if aliased |
| 304 | /// registers are all free... |
| 305 | /// |
| 306 | bool RA::isPhysRegAvailable(unsigned PhysReg) const { |
| 307 | if (PhysRegsUsed.count(PhysReg)) return false; |
| 308 | |
| 309 | // If the selected register aliases any other allocated registers, it is |
| 310 | // not free! |
Chris Lattner | 580f9be | 2002-12-28 20:40:43 +0000 | [diff] [blame] | 311 | if (const unsigned *AliasSet = RegInfo->getAliasSet(PhysReg)) |
Chris Lattner | ae64043 | 2002-12-17 02:50:10 +0000 | [diff] [blame] | 312 | for (unsigned i = 0; AliasSet[i]; ++i) |
| 313 | if (PhysRegsUsed.count(AliasSet[i])) // Aliased register in use? |
| 314 | return false; // Can't use this reg then. |
| 315 | return true; |
| 316 | } |
| 317 | |
| 318 | |
Chris Lattner | 91a452b | 2003-01-13 00:25:40 +0000 | [diff] [blame] | 319 | /// getFreeReg - Look to see if there is a free register available in the |
| 320 | /// specified register class. If not, return 0. |
Chris Lattner | b74e83c | 2002-12-16 16:15:28 +0000 | [diff] [blame] | 321 | /// |
Chris Lattner | 91a452b | 2003-01-13 00:25:40 +0000 | [diff] [blame] | 322 | unsigned RA::getFreeReg(const TargetRegisterClass *RC) { |
Chris Lattner | 580f9be | 2002-12-28 20:40:43 +0000 | [diff] [blame] | 323 | // Get iterators defining the range of registers that are valid to allocate in |
| 324 | // this class, which also specifies the preferred allocation order. |
| 325 | TargetRegisterClass::iterator RI = RC->allocation_order_begin(*MF); |
| 326 | TargetRegisterClass::iterator RE = RC->allocation_order_end(*MF); |
Chris Lattner | ae64043 | 2002-12-17 02:50:10 +0000 | [diff] [blame] | 327 | |
Chris Lattner | 91a452b | 2003-01-13 00:25:40 +0000 | [diff] [blame] | 328 | for (; RI != RE; ++RI) |
| 329 | if (isPhysRegAvailable(*RI)) { // Is reg unused? |
| 330 | assert(*RI != 0 && "Cannot use register!"); |
| 331 | return *RI; // Found an unused register! |
| 332 | } |
| 333 | return 0; |
| 334 | } |
| 335 | |
| 336 | |
| 337 | /// liberatePhysReg - Make sure the specified physical register is available for |
| 338 | /// use. If there is currently a value in it, it is either moved out of the way |
| 339 | /// or spilled to memory. |
| 340 | /// |
| 341 | void RA::liberatePhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I, |
| 342 | unsigned PhysReg) { |
| 343 | // FIXME: This code checks to see if a register is available, but it really |
| 344 | // wants to know if a reg is available BEFORE the instruction executes. If |
| 345 | // called after killed operands are freed, it runs the risk of reallocating a |
| 346 | // used operand... |
| 347 | #if 0 |
| 348 | if (isPhysRegAvailable(PhysReg)) return; // Already available... |
| 349 | |
| 350 | // Check to see if the register is directly used, not indirectly used through |
| 351 | // aliases. If aliased registers are the ones actually used, we cannot be |
| 352 | // sure that we will be able to save the whole thing if we do a reg-reg copy. |
| 353 | std::map<unsigned, unsigned>::iterator PRUI = PhysRegsUsed.find(PhysReg); |
| 354 | if (PRUI != PhysRegsUsed.end()) { |
| 355 | unsigned VirtReg = PRUI->second; // The virtual register held... |
| 356 | |
| 357 | // Check to see if there is a compatible register available. If so, we can |
| 358 | // move the value into the new register... |
| 359 | // |
| 360 | const TargetRegisterClass *RC = RegInfo->getRegClass(PhysReg); |
| 361 | if (unsigned NewReg = getFreeReg(RC)) { |
| 362 | // Emit the code to copy the value... |
| 363 | RegInfo->copyRegToReg(MBB, I, NewReg, PhysReg, RC); |
| 364 | |
| 365 | // Update our internal state to indicate that PhysReg is available and Reg |
| 366 | // isn't. |
| 367 | Virt2PhysRegMap.erase(VirtReg); |
| 368 | removePhysReg(PhysReg); // Free the physreg |
| 369 | |
| 370 | // Move reference over to new register... |
| 371 | assignVirtToPhysReg(VirtReg, NewReg); |
| 372 | return; |
Chris Lattner | ae64043 | 2002-12-17 02:50:10 +0000 | [diff] [blame] | 373 | } |
Chris Lattner | b74e83c | 2002-12-16 16:15:28 +0000 | [diff] [blame] | 374 | } |
Chris Lattner | 91a452b | 2003-01-13 00:25:40 +0000 | [diff] [blame] | 375 | #endif |
| 376 | spillPhysReg(MBB, I, PhysReg); |
| 377 | } |
| 378 | |
| 379 | |
| 380 | /// getReg - Find a physical register to hold the specified virtual |
| 381 | /// register. If all compatible physical registers are used, this method spills |
| 382 | /// the last used virtual register to the stack, and uses that register. |
| 383 | /// |
| 384 | unsigned RA::getReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I, |
| 385 | unsigned VirtReg) { |
| 386 | const TargetRegisterClass *RC = MF->getSSARegMap()->getRegClass(VirtReg); |
| 387 | |
| 388 | // First check to see if we have a free register of the requested type... |
| 389 | unsigned PhysReg = getFreeReg(RC); |
Chris Lattner | b74e83c | 2002-12-16 16:15:28 +0000 | [diff] [blame] | 390 | |
Chris Lattner | ae64043 | 2002-12-17 02:50:10 +0000 | [diff] [blame] | 391 | // If we didn't find an unused register, scavenge one now! |
Chris Lattner | b74e83c | 2002-12-16 16:15:28 +0000 | [diff] [blame] | 392 | if (PhysReg == 0) { |
Chris Lattner | c21be92 | 2002-12-16 17:44:42 +0000 | [diff] [blame] | 393 | assert(!PhysRegsUseOrder.empty() && "No allocated registers??"); |
Chris Lattner | ae64043 | 2002-12-17 02:50:10 +0000 | [diff] [blame] | 394 | |
| 395 | // Loop over all of the preallocated registers from the least recently used |
| 396 | // to the most recently used. When we find one that is capable of holding |
| 397 | // our register, use it. |
| 398 | for (unsigned i = 0; PhysReg == 0; ++i) { |
Chris Lattner | b74e83c | 2002-12-16 16:15:28 +0000 | [diff] [blame] | 399 | assert(i != PhysRegsUseOrder.size() && |
| 400 | "Couldn't find a register of the appropriate class!"); |
Chris Lattner | ae64043 | 2002-12-17 02:50:10 +0000 | [diff] [blame] | 401 | |
| 402 | unsigned R = PhysRegsUseOrder[i]; |
Chris Lattner | 41822c7 | 2003-08-23 23:49:42 +0000 | [diff] [blame] | 403 | |
| 404 | // We can only use this register if it holds a virtual register (ie, it |
| 405 | // can be spilled). Do not use it if it is an explicitly allocated |
| 406 | // physical register! |
| 407 | assert(PhysRegsUsed.count(R) && |
| 408 | "PhysReg in PhysRegsUseOrder, but is not allocated?"); |
| 409 | if (PhysRegsUsed[R]) { |
| 410 | // If the current register is compatible, use it. |
| 411 | if (RegInfo->getRegClass(R) == RC) { |
| 412 | PhysReg = R; |
| 413 | break; |
| 414 | } else { |
| 415 | // If one of the registers aliased to the current register is |
| 416 | // compatible, use it. |
| 417 | if (const unsigned *AliasSet = RegInfo->getAliasSet(R)) |
| 418 | for (unsigned a = 0; AliasSet[a]; ++a) |
| 419 | if (RegInfo->getRegClass(AliasSet[a]) == RC) { |
| 420 | PhysReg = AliasSet[a]; // Take an aliased register |
| 421 | break; |
| 422 | } |
| 423 | } |
Chris Lattner | ae64043 | 2002-12-17 02:50:10 +0000 | [diff] [blame] | 424 | } |
Chris Lattner | b74e83c | 2002-12-16 16:15:28 +0000 | [diff] [blame] | 425 | } |
| 426 | |
Chris Lattner | ae64043 | 2002-12-17 02:50:10 +0000 | [diff] [blame] | 427 | assert(PhysReg && "Physical register not assigned!?!?"); |
| 428 | |
Chris Lattner | b74e83c | 2002-12-16 16:15:28 +0000 | [diff] [blame] | 429 | // At this point PhysRegsUseOrder[i] is the least recently used register of |
| 430 | // compatible register class. Spill it to memory and reap its remains. |
Chris Lattner | c21be92 | 2002-12-16 17:44:42 +0000 | [diff] [blame] | 431 | spillPhysReg(MBB, I, PhysReg); |
Chris Lattner | b74e83c | 2002-12-16 16:15:28 +0000 | [diff] [blame] | 432 | } |
| 433 | |
| 434 | // Now that we know which register we need to assign this to, do it now! |
Chris Lattner | 91a452b | 2003-01-13 00:25:40 +0000 | [diff] [blame] | 435 | assignVirtToPhysReg(VirtReg, PhysReg); |
Chris Lattner | b74e83c | 2002-12-16 16:15:28 +0000 | [diff] [blame] | 436 | return PhysReg; |
| 437 | } |
| 438 | |
Chris Lattner | ae64043 | 2002-12-17 02:50:10 +0000 | [diff] [blame] | 439 | |
Chris Lattner | b74e83c | 2002-12-16 16:15:28 +0000 | [diff] [blame] | 440 | /// reloadVirtReg - This method loads the specified virtual register into a |
| 441 | /// physical register, returning the physical register chosen. This updates the |
| 442 | /// regalloc data structures to reflect the fact that the virtual reg is now |
| 443 | /// alive in a physical register, and the previous one isn't. |
| 444 | /// |
| 445 | unsigned RA::reloadVirtReg(MachineBasicBlock &MBB, |
| 446 | MachineBasicBlock::iterator &I, |
| 447 | unsigned VirtReg) { |
| 448 | std::map<unsigned, unsigned>::iterator It = Virt2PhysRegMap.find(VirtReg); |
| 449 | if (It != Virt2PhysRegMap.end()) { |
| 450 | MarkPhysRegRecentlyUsed(It->second); |
| 451 | return It->second; // Already have this value available! |
| 452 | } |
| 453 | |
Chris Lattner | 91a452b | 2003-01-13 00:25:40 +0000 | [diff] [blame] | 454 | unsigned PhysReg = getReg(MBB, I, VirtReg); |
Chris Lattner | b74e83c | 2002-12-16 16:15:28 +0000 | [diff] [blame] | 455 | |
Chris Lattner | ff863ba | 2002-12-25 05:05:46 +0000 | [diff] [blame] | 456 | const TargetRegisterClass *RC = MF->getSSARegMap()->getRegClass(VirtReg); |
Chris Lattner | 580f9be | 2002-12-28 20:40:43 +0000 | [diff] [blame] | 457 | int FrameIndex = getStackSpaceFor(VirtReg, RC); |
Chris Lattner | b74e83c | 2002-12-16 16:15:28 +0000 | [diff] [blame] | 458 | |
Chris Lattner | 91a452b | 2003-01-13 00:25:40 +0000 | [diff] [blame] | 459 | markVirtRegModified(VirtReg, false); // Note that this reg was just reloaded |
| 460 | |
Chris Lattner | b8822ad | 2003-08-04 23:36:39 +0000 | [diff] [blame] | 461 | DEBUG(std::cerr << " Reloading %reg" << VirtReg << " into " |
| 462 | << RegInfo->getName(PhysReg) << "\n"); |
| 463 | |
Chris Lattner | b74e83c | 2002-12-16 16:15:28 +0000 | [diff] [blame] | 464 | // Add move instruction(s) |
Chris Lattner | 580f9be | 2002-12-28 20:40:43 +0000 | [diff] [blame] | 465 | RegInfo->loadRegFromStackSlot(MBB, I, PhysReg, FrameIndex, RC); |
Chris Lattner | b74e83c | 2002-12-16 16:15:28 +0000 | [diff] [blame] | 466 | ++NumReloaded; // Update statistics |
| 467 | return PhysReg; |
| 468 | } |
| 469 | |
Chris Lattner | b8822ad | 2003-08-04 23:36:39 +0000 | [diff] [blame] | 470 | |
| 471 | |
Chris Lattner | b74e83c | 2002-12-16 16:15:28 +0000 | [diff] [blame] | 472 | void RA::AllocateBasicBlock(MachineBasicBlock &MBB) { |
| 473 | // loop over each instruction |
| 474 | MachineBasicBlock::iterator I = MBB.begin(); |
| 475 | for (; I != MBB.end(); ++I) { |
| 476 | MachineInstr *MI = *I; |
Chris Lattner | 3501fea | 2003-01-14 22:00:31 +0000 | [diff] [blame] | 477 | const TargetInstrDescriptor &TID = TM->getInstrInfo().get(MI->getOpcode()); |
Chris Lattner | b8822ad | 2003-08-04 23:36:39 +0000 | [diff] [blame] | 478 | DEBUG(std::cerr << "\nStarting RegAlloc of: " << *MI; |
| 479 | std::cerr << " Regs have values: "; |
| 480 | for (std::map<unsigned, unsigned>::const_iterator |
| 481 | I = PhysRegsUsed.begin(), E = PhysRegsUsed.end(); I != E; ++I) |
| 482 | std::cerr << "[" << RegInfo->getName(I->first) |
| 483 | << ",%reg" << I->second << "] "; |
| 484 | std::cerr << "\n"); |
Chris Lattner | b74e83c | 2002-12-16 16:15:28 +0000 | [diff] [blame] | 485 | |
Chris Lattner | ae64043 | 2002-12-17 02:50:10 +0000 | [diff] [blame] | 486 | // Loop over the implicit uses, making sure that they are at the head of the |
| 487 | // use order list, so they don't get reallocated. |
Chris Lattner | 3501fea | 2003-01-14 22:00:31 +0000 | [diff] [blame] | 488 | if (const unsigned *ImplicitUses = TID.ImplicitUses) |
Chris Lattner | ae64043 | 2002-12-17 02:50:10 +0000 | [diff] [blame] | 489 | for (unsigned i = 0; ImplicitUses[i]; ++i) |
| 490 | MarkPhysRegRecentlyUsed(ImplicitUses[i]); |
Chris Lattner | b74e83c | 2002-12-16 16:15:28 +0000 | [diff] [blame] | 491 | |
Brian Gaeke | 53b99a0 | 2003-08-15 21:19:25 +0000 | [diff] [blame] | 492 | // Get the used operands into registers. This has the potential to spill |
Chris Lattner | b8822ad | 2003-08-04 23:36:39 +0000 | [diff] [blame] | 493 | // incoming values if we are out of registers. Note that we completely |
| 494 | // ignore physical register uses here. We assume that if an explicit |
| 495 | // physical register is referenced by the instruction, that it is guaranteed |
| 496 | // to be live-in, or the input is badly hosed. |
Chris Lattner | b74e83c | 2002-12-16 16:15:28 +0000 | [diff] [blame] | 497 | // |
| 498 | for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) |
Chris Lattner | b8822ad | 2003-08-04 23:36:39 +0000 | [diff] [blame] | 499 | if (MI->getOperand(i).opIsUse() && MI->getOperand(i).isVirtualRegister()){ |
Chris Lattner | b74e83c | 2002-12-16 16:15:28 +0000 | [diff] [blame] | 500 | unsigned VirtSrcReg = MI->getOperand(i).getAllocatedRegNum(); |
| 501 | unsigned PhysSrcReg = reloadVirtReg(MBB, I, VirtSrcReg); |
| 502 | MI->SetMachineOperandReg(i, PhysSrcReg); // Assign the input register |
| 503 | } |
| 504 | |
Chris Lattner | 91a452b | 2003-01-13 00:25:40 +0000 | [diff] [blame] | 505 | if (!DisableKill) { |
| 506 | // If this instruction is the last user of anything in registers, kill the |
| 507 | // value, freeing the register being used, so it doesn't need to be |
| 508 | // spilled to memory. |
| 509 | // |
| 510 | for (LiveVariables::killed_iterator KI = LV->killed_begin(MI), |
Chris Lattner | d572563 | 2003-05-12 03:54:14 +0000 | [diff] [blame] | 511 | KE = LV->killed_end(MI); KI != KE; ++KI) { |
Chris Lattner | 91a452b | 2003-01-13 00:25:40 +0000 | [diff] [blame] | 512 | unsigned VirtReg = KI->second; |
Chris Lattner | d572563 | 2003-05-12 03:54:14 +0000 | [diff] [blame] | 513 | unsigned PhysReg = VirtReg; |
| 514 | if (VirtReg >= MRegisterInfo::FirstVirtualRegister) { |
| 515 | std::map<unsigned, unsigned>::iterator I = |
| 516 | Virt2PhysRegMap.find(VirtReg); |
| 517 | assert(I != Virt2PhysRegMap.end()); |
| 518 | PhysReg = I->second; |
| 519 | Virt2PhysRegMap.erase(I); |
| 520 | } |
Chris Lattner | 91a452b | 2003-01-13 00:25:40 +0000 | [diff] [blame] | 521 | |
Chris Lattner | d572563 | 2003-05-12 03:54:14 +0000 | [diff] [blame] | 522 | if (PhysReg) { |
Chris Lattner | b8822ad | 2003-08-04 23:36:39 +0000 | [diff] [blame] | 523 | DEBUG(std::cerr << " Last use of " << RegInfo->getName(PhysReg) |
| 524 | << "[%reg" << VirtReg <<"], removing it from live set\n"); |
Chris Lattner | d9ac6a7 | 2003-08-05 00:49:09 +0000 | [diff] [blame] | 525 | removePhysReg(PhysReg); |
Chris Lattner | d572563 | 2003-05-12 03:54:14 +0000 | [diff] [blame] | 526 | } |
Chris Lattner | 91a452b | 2003-01-13 00:25:40 +0000 | [diff] [blame] | 527 | } |
| 528 | } |
| 529 | |
| 530 | // Loop over all of the operands of the instruction, spilling registers that |
| 531 | // are defined, and marking explicit destinations in the PhysRegsUsed map. |
| 532 | for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) |
Chris Lattner | d3fd79f | 2003-08-03 13:49:03 +0000 | [diff] [blame] | 533 | if ((MI->getOperand(i).opIsDefOnly() || |
| 534 | MI->getOperand(i).opIsDefAndUse()) && |
Chris Lattner | 91a452b | 2003-01-13 00:25:40 +0000 | [diff] [blame] | 535 | MI->getOperand(i).isPhysicalRegister()) { |
| 536 | unsigned Reg = MI->getOperand(i).getAllocatedRegNum(); |
Chris Lattner | 128c2aa | 2003-08-17 18:01:15 +0000 | [diff] [blame] | 537 | spillPhysReg(MBB, I, Reg, true); // Spill any existing value in the reg |
Chris Lattner | 91a452b | 2003-01-13 00:25:40 +0000 | [diff] [blame] | 538 | PhysRegsUsed[Reg] = 0; // It is free and reserved now |
| 539 | PhysRegsUseOrder.push_back(Reg); |
| 540 | } |
| 541 | |
| 542 | // Loop over the implicit defs, spilling them as well. |
Chris Lattner | 3501fea | 2003-01-14 22:00:31 +0000 | [diff] [blame] | 543 | if (const unsigned *ImplicitDefs = TID.ImplicitDefs) |
Chris Lattner | 91a452b | 2003-01-13 00:25:40 +0000 | [diff] [blame] | 544 | for (unsigned i = 0; ImplicitDefs[i]; ++i) { |
| 545 | unsigned Reg = ImplicitDefs[i]; |
Chris Lattner | d572563 | 2003-05-12 03:54:14 +0000 | [diff] [blame] | 546 | spillPhysReg(MBB, I, Reg); |
| 547 | PhysRegsUseOrder.push_back(Reg); |
| 548 | PhysRegsUsed[Reg] = 0; // It is free and reserved now |
Chris Lattner | 91a452b | 2003-01-13 00:25:40 +0000 | [diff] [blame] | 549 | } |
| 550 | |
Chris Lattner | b74e83c | 2002-12-16 16:15:28 +0000 | [diff] [blame] | 551 | // Okay, we have allocated all of the source operands and spilled any values |
| 552 | // that would be destroyed by defs of this instruction. Loop over the |
Chris Lattner | 91a452b | 2003-01-13 00:25:40 +0000 | [diff] [blame] | 553 | // implicit defs and assign them to a register, spilling incoming values if |
| 554 | // we need to scavenge a register. |
Chris Lattner | 82bee0f | 2002-12-18 08:14:26 +0000 | [diff] [blame] | 555 | // |
Chris Lattner | b74e83c | 2002-12-16 16:15:28 +0000 | [diff] [blame] | 556 | for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) |
Vikram S. Adve | 5f2180c | 2003-05-27 00:05:23 +0000 | [diff] [blame] | 557 | if ((MI->getOperand(i).opIsDefOnly() || MI->getOperand(i).opIsDefAndUse()) |
| 558 | && MI->getOperand(i).isVirtualRegister()) { |
Chris Lattner | b74e83c | 2002-12-16 16:15:28 +0000 | [diff] [blame] | 559 | unsigned DestVirtReg = MI->getOperand(i).getAllocatedRegNum(); |
| 560 | unsigned DestPhysReg; |
| 561 | |
Chris Lattner | d572563 | 2003-05-12 03:54:14 +0000 | [diff] [blame] | 562 | // If DestVirtReg already has a value, forget about it. Why doesn't |
| 563 | // getReg do this right? |
| 564 | std::map<unsigned, unsigned>::iterator DestI = |
| 565 | Virt2PhysRegMap.find(DestVirtReg); |
| 566 | if (DestI != Virt2PhysRegMap.end()) { |
| 567 | unsigned PhysReg = DestI->second; |
| 568 | Virt2PhysRegMap.erase(DestI); |
| 569 | removePhysReg(PhysReg); |
| 570 | } |
Chris Lattner | 91a452b | 2003-01-13 00:25:40 +0000 | [diff] [blame] | 571 | |
Chris Lattner | 580f9be | 2002-12-28 20:40:43 +0000 | [diff] [blame] | 572 | if (TM->getInstrInfo().isTwoAddrInstr(MI->getOpcode()) && i == 0) { |
Chris Lattner | b74e83c | 2002-12-16 16:15:28 +0000 | [diff] [blame] | 573 | // must be same register number as the first operand |
| 574 | // This maps a = b + c into b += c, and saves b into a's spot |
| 575 | assert(MI->getOperand(1).isRegister() && |
| 576 | MI->getOperand(1).getAllocatedRegNum() && |
| 577 | MI->getOperand(1).opIsUse() && |
| 578 | "Two address instruction invalid!"); |
| 579 | DestPhysReg = MI->getOperand(1).getAllocatedRegNum(); |
| 580 | |
Chris Lattner | d572563 | 2003-05-12 03:54:14 +0000 | [diff] [blame] | 581 | liberatePhysReg(MBB, I, DestPhysReg); |
Chris Lattner | 91a452b | 2003-01-13 00:25:40 +0000 | [diff] [blame] | 582 | assignVirtToPhysReg(DestVirtReg, DestPhysReg); |
Chris Lattner | b74e83c | 2002-12-16 16:15:28 +0000 | [diff] [blame] | 583 | } else { |
Chris Lattner | 91a452b | 2003-01-13 00:25:40 +0000 | [diff] [blame] | 584 | DestPhysReg = getReg(MBB, I, DestVirtReg); |
Chris Lattner | b74e83c | 2002-12-16 16:15:28 +0000 | [diff] [blame] | 585 | } |
Chris Lattner | d572563 | 2003-05-12 03:54:14 +0000 | [diff] [blame] | 586 | markVirtRegModified(DestVirtReg); |
Chris Lattner | b74e83c | 2002-12-16 16:15:28 +0000 | [diff] [blame] | 587 | MI->SetMachineOperandReg(i, DestPhysReg); // Assign the output register |
| 588 | } |
Chris Lattner | 82bee0f | 2002-12-18 08:14:26 +0000 | [diff] [blame] | 589 | |
| 590 | if (!DisableKill) { |
Chris Lattner | 91a452b | 2003-01-13 00:25:40 +0000 | [diff] [blame] | 591 | // If this instruction defines any registers that are immediately dead, |
| 592 | // kill them now. |
| 593 | // |
| 594 | for (LiveVariables::killed_iterator KI = LV->dead_begin(MI), |
Chris Lattner | d572563 | 2003-05-12 03:54:14 +0000 | [diff] [blame] | 595 | KE = LV->dead_end(MI); KI != KE; ++KI) { |
Chris Lattner | 91a452b | 2003-01-13 00:25:40 +0000 | [diff] [blame] | 596 | unsigned VirtReg = KI->second; |
Chris Lattner | d572563 | 2003-05-12 03:54:14 +0000 | [diff] [blame] | 597 | unsigned PhysReg = VirtReg; |
| 598 | if (VirtReg >= MRegisterInfo::FirstVirtualRegister) { |
| 599 | std::map<unsigned, unsigned>::iterator I = |
| 600 | Virt2PhysRegMap.find(VirtReg); |
| 601 | assert(I != Virt2PhysRegMap.end()); |
| 602 | PhysReg = I->second; |
| 603 | Virt2PhysRegMap.erase(I); |
| 604 | } |
Chris Lattner | 91a452b | 2003-01-13 00:25:40 +0000 | [diff] [blame] | 605 | |
Chris Lattner | d572563 | 2003-05-12 03:54:14 +0000 | [diff] [blame] | 606 | if (PhysReg) { |
Chris Lattner | b8822ad | 2003-08-04 23:36:39 +0000 | [diff] [blame] | 607 | DEBUG(std::cerr << " Register " << RegInfo->getName(PhysReg) |
| 608 | << " [%reg" << VirtReg |
| 609 | << "] is never used, removing it frame live list\n"); |
Chris Lattner | d572563 | 2003-05-12 03:54:14 +0000 | [diff] [blame] | 610 | removePhysReg(PhysReg); |
| 611 | } |
Chris Lattner | 82bee0f | 2002-12-18 08:14:26 +0000 | [diff] [blame] | 612 | } |
| 613 | } |
Chris Lattner | b74e83c | 2002-12-16 16:15:28 +0000 | [diff] [blame] | 614 | } |
| 615 | |
| 616 | // Rewind the iterator to point to the first flow control instruction... |
Chris Lattner | 3501fea | 2003-01-14 22:00:31 +0000 | [diff] [blame] | 617 | const TargetInstrInfo &TII = TM->getInstrInfo(); |
Chris Lattner | 0416d2a | 2003-01-16 18:06:43 +0000 | [diff] [blame] | 618 | I = MBB.end(); |
Chris Lattner | 3501fea | 2003-01-14 22:00:31 +0000 | [diff] [blame] | 619 | while (I != MBB.begin() && TII.isTerminatorInstr((*(I-1))->getOpcode())) |
Chris Lattner | b74e83c | 2002-12-16 16:15:28 +0000 | [diff] [blame] | 620 | --I; |
Chris Lattner | b74e83c | 2002-12-16 16:15:28 +0000 | [diff] [blame] | 621 | |
| 622 | // Spill all physical registers holding virtual registers now. |
| 623 | while (!PhysRegsUsed.empty()) |
Chris Lattner | 8c81945 | 2003-08-05 04:13:58 +0000 | [diff] [blame] | 624 | if (unsigned VirtReg = PhysRegsUsed.begin()->second) |
| 625 | spillVirtReg(MBB, I, VirtReg, PhysRegsUsed.begin()->first); |
| 626 | else |
| 627 | removePhysReg(PhysRegsUsed.begin()->first); |
Chris Lattner | b74e83c | 2002-12-16 16:15:28 +0000 | [diff] [blame] | 628 | |
Chris Lattner | 91a452b | 2003-01-13 00:25:40 +0000 | [diff] [blame] | 629 | for (std::map<unsigned, unsigned>::iterator I = Virt2PhysRegMap.begin(), |
Chris Lattner | d572563 | 2003-05-12 03:54:14 +0000 | [diff] [blame] | 630 | E = Virt2PhysRegMap.end(); I != E; ++I) |
Chris Lattner | 91a452b | 2003-01-13 00:25:40 +0000 | [diff] [blame] | 631 | std::cerr << "Register still mapped: " << I->first << " -> " |
Chris Lattner | d572563 | 2003-05-12 03:54:14 +0000 | [diff] [blame] | 632 | << I->second << "\n"; |
Chris Lattner | 91a452b | 2003-01-13 00:25:40 +0000 | [diff] [blame] | 633 | |
Chris Lattner | b74e83c | 2002-12-16 16:15:28 +0000 | [diff] [blame] | 634 | assert(Virt2PhysRegMap.empty() && "Virtual registers still in phys regs?"); |
Chris Lattner | 128c2aa | 2003-08-17 18:01:15 +0000 | [diff] [blame] | 635 | |
| 636 | // Clear any physical register which appear live at the end of the basic |
| 637 | // block, but which do not hold any virtual registers. e.g., the stack |
| 638 | // pointer. |
| 639 | PhysRegsUseOrder.clear(); |
Chris Lattner | b74e83c | 2002-12-16 16:15:28 +0000 | [diff] [blame] | 640 | } |
| 641 | |
Chris Lattner | 86c69a6 | 2002-12-17 03:16:10 +0000 | [diff] [blame] | 642 | |
Chris Lattner | b74e83c | 2002-12-16 16:15:28 +0000 | [diff] [blame] | 643 | /// runOnMachineFunction - Register allocate the whole function |
| 644 | /// |
| 645 | bool RA::runOnMachineFunction(MachineFunction &Fn) { |
| 646 | DEBUG(std::cerr << "Machine Function " << "\n"); |
| 647 | MF = &Fn; |
Chris Lattner | 580f9be | 2002-12-28 20:40:43 +0000 | [diff] [blame] | 648 | TM = &Fn.getTarget(); |
| 649 | RegInfo = TM->getRegisterInfo(); |
Chris Lattner | b74e83c | 2002-12-16 16:15:28 +0000 | [diff] [blame] | 650 | |
Chris Lattner | 82bee0f | 2002-12-18 08:14:26 +0000 | [diff] [blame] | 651 | if (!DisableKill) |
Chris Lattner | 91a452b | 2003-01-13 00:25:40 +0000 | [diff] [blame] | 652 | LV = &getAnalysis<LiveVariables>(); |
Chris Lattner | 82bee0f | 2002-12-18 08:14:26 +0000 | [diff] [blame] | 653 | |
Chris Lattner | b74e83c | 2002-12-16 16:15:28 +0000 | [diff] [blame] | 654 | // Loop over all of the basic blocks, eliminating virtual register references |
| 655 | for (MachineFunction::iterator MBB = Fn.begin(), MBBe = Fn.end(); |
| 656 | MBB != MBBe; ++MBB) |
| 657 | AllocateBasicBlock(*MBB); |
| 658 | |
Chris Lattner | 580f9be | 2002-12-28 20:40:43 +0000 | [diff] [blame] | 659 | StackSlotForVirtReg.clear(); |
Chris Lattner | 91a452b | 2003-01-13 00:25:40 +0000 | [diff] [blame] | 660 | VirtRegModified.clear(); |
Chris Lattner | b74e83c | 2002-12-16 16:15:28 +0000 | [diff] [blame] | 661 | return true; |
| 662 | } |
| 663 | |
Brian Gaeke | 19df387 | 2003-08-13 18:18:15 +0000 | [diff] [blame] | 664 | FunctionPass *createLocalRegisterAllocator() { |
Chris Lattner | 580f9be | 2002-12-28 20:40:43 +0000 | [diff] [blame] | 665 | return new RA(); |
Chris Lattner | b74e83c | 2002-12-16 16:15:28 +0000 | [diff] [blame] | 666 | } |