Bruno Cardoso Lopes | 972f589 | 2007-06-06 07:42:06 +0000 | [diff] [blame] | 1 | //===- Mips.td - Describe the Mips Target Machine ---------------*- C++ -*-===// |
| 2 | // |
| 3 | // The LLVM Compiler Infrastructure |
| 4 | // |
| 5 | // This file was developed by Bruno Cardoso Lopes and is distributed under the |
| 6 | // University of Illinois Open Source License. See LICENSE.TXT for details. |
| 7 | // |
| 8 | //===----------------------------------------------------------------------===// |
Bruno Cardoso Lopes | 6d32ca0 | 2007-08-18 02:18:07 +0000 | [diff] [blame^] | 9 | // This is the top level entry point for the Mips target. |
| 10 | //===----------------------------------------------------------------------===// |
Bruno Cardoso Lopes | 972f589 | 2007-06-06 07:42:06 +0000 | [diff] [blame] | 11 | |
| 12 | //===----------------------------------------------------------------------===// |
Bruno Cardoso Lopes | 6d32ca0 | 2007-08-18 02:18:07 +0000 | [diff] [blame^] | 13 | // Target-independent interfaces |
Bruno Cardoso Lopes | 972f589 | 2007-06-06 07:42:06 +0000 | [diff] [blame] | 14 | //===----------------------------------------------------------------------===// |
| 15 | |
| 16 | include "../Target.td" |
| 17 | |
| 18 | //===----------------------------------------------------------------------===// |
Bruno Cardoso Lopes | 6d32ca0 | 2007-08-18 02:18:07 +0000 | [diff] [blame^] | 19 | // Descriptions |
Bruno Cardoso Lopes | 972f589 | 2007-06-06 07:42:06 +0000 | [diff] [blame] | 20 | //===----------------------------------------------------------------------===// |
| 21 | |
| 22 | include "MipsRegisterInfo.td" |
Bruno Cardoso Lopes | 6d32ca0 | 2007-08-18 02:18:07 +0000 | [diff] [blame^] | 23 | include "MipsSchedule.td" |
Bruno Cardoso Lopes | 972f589 | 2007-06-06 07:42:06 +0000 | [diff] [blame] | 24 | include "MipsInstrInfo.td" |
Bruno Cardoso Lopes | 6d32ca0 | 2007-08-18 02:18:07 +0000 | [diff] [blame^] | 25 | include "MipsCallingConv.td" |
Bruno Cardoso Lopes | 972f589 | 2007-06-06 07:42:06 +0000 | [diff] [blame] | 26 | |
| 27 | def MipsInstrInfo : InstrInfo { |
Bruno Cardoso Lopes | 972f589 | 2007-06-06 07:42:06 +0000 | [diff] [blame] | 28 | let TSFlagsFields = []; |
| 29 | let TSFlagsShifts = []; |
| 30 | } |
Bruno Cardoso Lopes | 6d32ca0 | 2007-08-18 02:18:07 +0000 | [diff] [blame^] | 31 | |
Bruno Cardoso Lopes | 972f589 | 2007-06-06 07:42:06 +0000 | [diff] [blame] | 32 | //===----------------------------------------------------------------------===// |
Bruno Cardoso Lopes | 6d32ca0 | 2007-08-18 02:18:07 +0000 | [diff] [blame^] | 33 | // CPU Directives // |
Bruno Cardoso Lopes | 972f589 | 2007-06-06 07:42:06 +0000 | [diff] [blame] | 34 | //===----------------------------------------------------------------------===// |
| 35 | |
Bruno Cardoso Lopes | 6d32ca0 | 2007-08-18 02:18:07 +0000 | [diff] [blame^] | 36 | def FeatureMipsIII : SubtargetFeature<"mips3", "IsMipsIII", "true", |
| 37 | "MipsIII ISA Support">; |
Bruno Cardoso Lopes | 972f589 | 2007-06-06 07:42:06 +0000 | [diff] [blame] | 38 | |
| 39 | //===----------------------------------------------------------------------===// |
| 40 | // Mips processors supported. |
| 41 | //===----------------------------------------------------------------------===// |
| 42 | |
Bruno Cardoso Lopes | 6d32ca0 | 2007-08-18 02:18:07 +0000 | [diff] [blame^] | 43 | def : Processor<"generic", MipsGenericItineraries, []>; |
| 44 | //def : Processor<"r4000", MipsR4000Itineraries, [FeatureMipsIII]>; |
Bruno Cardoso Lopes | 972f589 | 2007-06-06 07:42:06 +0000 | [diff] [blame] | 45 | |
| 46 | def Mips : Target { |
Bruno Cardoso Lopes | 972f589 | 2007-06-06 07:42:06 +0000 | [diff] [blame] | 47 | let InstructionSet = MipsInstrInfo; |
| 48 | } |
Bruno Cardoso Lopes | 6d32ca0 | 2007-08-18 02:18:07 +0000 | [diff] [blame^] | 49 | |