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Nate Begeman4ebd8052005-09-01 23:24:04 +00001//===-- DAGCombiner.cpp - Implement a DAG node combiner -------------------===//
Nate Begeman1d4d4142005-09-01 00:19:25 +00002//
3// The LLVM Compiler Infrastructure
4//
5// This file was developed by Nate Begeman and is distributed under the
6// University of Illinois Open Source License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This pass combines dag nodes to form fewer, simpler DAG nodes. It can be run
11// both before and after the DAG is legalized.
12//
13// FIXME: Missing folds
14// sdiv, udiv, srem, urem (X, const) where X is an integer can be expanded into
15// a sequence of multiplies, shifts, and adds. This should be controlled by
16// some kind of hint from the target that int div is expensive.
17// various folds of mulh[s,u] by constants such as -1, powers of 2, etc.
18//
Nate Begeman44728a72005-09-19 22:34:01 +000019// FIXME: select C, pow2, pow2 -> something smart
20// FIXME: trunc(select X, Y, Z) -> select X, trunc(Y), trunc(Z)
Nate Begeman44728a72005-09-19 22:34:01 +000021// FIXME: Dead stores -> nuke
Chris Lattner40c62d52005-10-18 06:04:22 +000022// FIXME: shr X, (and Y,31) -> shr X, Y (TRICKY!)
Nate Begeman1d4d4142005-09-01 00:19:25 +000023// FIXME: mul (x, const) -> shifts + adds
Nate Begeman1d4d4142005-09-01 00:19:25 +000024// FIXME: undef values
Nate Begeman4ebd8052005-09-01 23:24:04 +000025// FIXME: make truncate see through SIGN_EXTEND and AND
Nate Begeman646d7e22005-09-02 21:18:40 +000026// FIXME: divide by zero is currently left unfolded. do we want to turn this
27// into an undef?
Nate Begemanf845b452005-10-08 00:29:44 +000028// FIXME: select ne (select cc, 1, 0), 0, true, false -> select cc, true, false
Nate Begeman1d4d4142005-09-01 00:19:25 +000029//
30//===----------------------------------------------------------------------===//
31
32#define DEBUG_TYPE "dagcombine"
33#include "llvm/ADT/Statistic.h"
34#include "llvm/CodeGen/SelectionDAG.h"
Nate Begeman2300f552005-09-07 00:15:36 +000035#include "llvm/Support/Debug.h"
Nate Begeman1d4d4142005-09-01 00:19:25 +000036#include "llvm/Support/MathExtras.h"
37#include "llvm/Target/TargetLowering.h"
Chris Lattnera500fc62005-09-09 23:53:39 +000038#include <algorithm>
Nate Begeman1d4d4142005-09-01 00:19:25 +000039#include <cmath>
Chris Lattner2c2c6c62006-01-22 23:41:00 +000040#include <iostream>
Nate Begeman1d4d4142005-09-01 00:19:25 +000041using namespace llvm;
42
43namespace {
44 Statistic<> NodesCombined ("dagcombiner", "Number of dag nodes combined");
45
46 class DAGCombiner {
47 SelectionDAG &DAG;
48 TargetLowering &TLI;
Nate Begeman4ebd8052005-09-01 23:24:04 +000049 bool AfterLegalize;
Nate Begeman1d4d4142005-09-01 00:19:25 +000050
51 // Worklist of all of the nodes that need to be simplified.
52 std::vector<SDNode*> WorkList;
53
54 /// AddUsersToWorkList - When an instruction is simplified, add all users of
55 /// the instruction to the work lists because they might get more simplified
56 /// now.
57 ///
58 void AddUsersToWorkList(SDNode *N) {
59 for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end();
Nate Begeman4ebd8052005-09-01 23:24:04 +000060 UI != UE; ++UI)
61 WorkList.push_back(*UI);
Nate Begeman1d4d4142005-09-01 00:19:25 +000062 }
63
64 /// removeFromWorkList - remove all instances of N from the worklist.
65 void removeFromWorkList(SDNode *N) {
66 WorkList.erase(std::remove(WorkList.begin(), WorkList.end(), N),
67 WorkList.end());
68 }
69
Chris Lattner01a22022005-10-10 22:04:48 +000070 SDOperand CombineTo(SDNode *N, const std::vector<SDOperand> &To) {
Chris Lattner87514ca2005-10-10 22:31:19 +000071 ++NodesCombined;
Chris Lattner01a22022005-10-10 22:04:48 +000072 DEBUG(std::cerr << "\nReplacing "; N->dump();
73 std::cerr << "\nWith: "; To[0].Val->dump();
74 std::cerr << " and " << To.size()-1 << " other values\n");
75 std::vector<SDNode*> NowDead;
76 DAG.ReplaceAllUsesWith(N, To, &NowDead);
77
78 // Push the new nodes and any users onto the worklist
79 for (unsigned i = 0, e = To.size(); i != e; ++i) {
80 WorkList.push_back(To[i].Val);
81 AddUsersToWorkList(To[i].Val);
82 }
83
84 // Nodes can end up on the worklist more than once. Make sure we do
85 // not process a node that has been replaced.
86 removeFromWorkList(N);
87 for (unsigned i = 0, e = NowDead.size(); i != e; ++i)
88 removeFromWorkList(NowDead[i]);
89
90 // Finally, since the node is now dead, remove it from the graph.
91 DAG.DeleteNode(N);
92 return SDOperand(N, 0);
93 }
Nate Begeman368e18d2006-02-16 21:11:51 +000094
Chris Lattner012f2412006-02-17 21:58:01 +000095 /// SimplifyDemandedBits - Check the specified integer node value to see if
96 /// it can be simplified or if things is uses can be simplified by bit
97 /// propagation. If so, return true.
98 bool SimplifyDemandedBits(SDOperand Op) {
Nate Begeman368e18d2006-02-16 21:11:51 +000099 TargetLowering::TargetLoweringOpt TLO(DAG);
100 uint64_t KnownZero, KnownOne;
Chris Lattner012f2412006-02-17 21:58:01 +0000101 uint64_t Demanded = MVT::getIntVTBitMask(Op.getValueType());
102 if (!TLI.SimplifyDemandedBits(Op, Demanded, KnownZero, KnownOne, TLO))
103 return false;
104
105 // Revisit the node.
106 WorkList.push_back(Op.Val);
107
108 // Replace the old value with the new one.
109 ++NodesCombined;
110 DEBUG(std::cerr << "\nReplacing "; TLO.Old.Val->dump();
111 std::cerr << "\nWith: "; TLO.New.Val->dump());
112
113 std::vector<SDNode*> NowDead;
114 DAG.ReplaceAllUsesOfValueWith(TLO.Old, TLO.New, NowDead);
115
Chris Lattner7d20d392006-02-20 06:51:04 +0000116 // Push the new node and any (possibly new) users onto the worklist.
Chris Lattner012f2412006-02-17 21:58:01 +0000117 WorkList.push_back(TLO.New.Val);
118 AddUsersToWorkList(TLO.New.Val);
119
120 // Nodes can end up on the worklist more than once. Make sure we do
121 // not process a node that has been replaced.
Chris Lattner012f2412006-02-17 21:58:01 +0000122 for (unsigned i = 0, e = NowDead.size(); i != e; ++i)
123 removeFromWorkList(NowDead[i]);
124
Chris Lattner7d20d392006-02-20 06:51:04 +0000125 // Finally, if the node is now dead, remove it from the graph. The node
126 // may not be dead if the replacement process recursively simplified to
127 // something else needing this node.
128 if (TLO.Old.Val->use_empty()) {
129 removeFromWorkList(TLO.Old.Val);
130 DAG.DeleteNode(TLO.Old.Val);
131 }
Chris Lattner012f2412006-02-17 21:58:01 +0000132 return true;
Nate Begeman368e18d2006-02-16 21:11:51 +0000133 }
Chris Lattner87514ca2005-10-10 22:31:19 +0000134
135 SDOperand CombineTo(SDNode *N, SDOperand Res) {
136 std::vector<SDOperand> To;
137 To.push_back(Res);
138 return CombineTo(N, To);
139 }
Chris Lattner01a22022005-10-10 22:04:48 +0000140
141 SDOperand CombineTo(SDNode *N, SDOperand Res0, SDOperand Res1) {
142 std::vector<SDOperand> To;
143 To.push_back(Res0);
144 To.push_back(Res1);
145 return CombineTo(N, To);
146 }
147
Nate Begeman1d4d4142005-09-01 00:19:25 +0000148 /// visit - call the node-specific routine that knows how to fold each
149 /// particular type of node.
Nate Begeman83e75ec2005-09-06 04:43:02 +0000150 SDOperand visit(SDNode *N);
Nate Begeman1d4d4142005-09-01 00:19:25 +0000151
152 // Visitation implementation - Implement dag node combining for different
153 // node types. The semantics are as follows:
154 // Return Value:
Nate Begeman2300f552005-09-07 00:15:36 +0000155 // SDOperand.Val == 0 - No change was made
Chris Lattner01a22022005-10-10 22:04:48 +0000156 // SDOperand.Val == N - N was replaced, is dead, and is already handled.
Nate Begeman2300f552005-09-07 00:15:36 +0000157 // otherwise - N should be replaced by the returned Operand.
Nate Begeman1d4d4142005-09-01 00:19:25 +0000158 //
Nate Begeman83e75ec2005-09-06 04:43:02 +0000159 SDOperand visitTokenFactor(SDNode *N);
160 SDOperand visitADD(SDNode *N);
161 SDOperand visitSUB(SDNode *N);
162 SDOperand visitMUL(SDNode *N);
163 SDOperand visitSDIV(SDNode *N);
164 SDOperand visitUDIV(SDNode *N);
165 SDOperand visitSREM(SDNode *N);
166 SDOperand visitUREM(SDNode *N);
167 SDOperand visitMULHU(SDNode *N);
168 SDOperand visitMULHS(SDNode *N);
169 SDOperand visitAND(SDNode *N);
170 SDOperand visitOR(SDNode *N);
171 SDOperand visitXOR(SDNode *N);
172 SDOperand visitSHL(SDNode *N);
173 SDOperand visitSRA(SDNode *N);
174 SDOperand visitSRL(SDNode *N);
175 SDOperand visitCTLZ(SDNode *N);
176 SDOperand visitCTTZ(SDNode *N);
177 SDOperand visitCTPOP(SDNode *N);
Nate Begeman452d7be2005-09-16 00:54:12 +0000178 SDOperand visitSELECT(SDNode *N);
179 SDOperand visitSELECT_CC(SDNode *N);
180 SDOperand visitSETCC(SDNode *N);
Nate Begeman83e75ec2005-09-06 04:43:02 +0000181 SDOperand visitSIGN_EXTEND(SDNode *N);
182 SDOperand visitZERO_EXTEND(SDNode *N);
183 SDOperand visitSIGN_EXTEND_INREG(SDNode *N);
184 SDOperand visitTRUNCATE(SDNode *N);
Chris Lattner94683772005-12-23 05:30:37 +0000185 SDOperand visitBIT_CONVERT(SDNode *N);
Chris Lattner01b3d732005-09-28 22:28:18 +0000186 SDOperand visitFADD(SDNode *N);
187 SDOperand visitFSUB(SDNode *N);
188 SDOperand visitFMUL(SDNode *N);
189 SDOperand visitFDIV(SDNode *N);
190 SDOperand visitFREM(SDNode *N);
Nate Begeman83e75ec2005-09-06 04:43:02 +0000191 SDOperand visitSINT_TO_FP(SDNode *N);
192 SDOperand visitUINT_TO_FP(SDNode *N);
193 SDOperand visitFP_TO_SINT(SDNode *N);
194 SDOperand visitFP_TO_UINT(SDNode *N);
195 SDOperand visitFP_ROUND(SDNode *N);
196 SDOperand visitFP_ROUND_INREG(SDNode *N);
197 SDOperand visitFP_EXTEND(SDNode *N);
198 SDOperand visitFNEG(SDNode *N);
199 SDOperand visitFABS(SDNode *N);
Nate Begeman452d7be2005-09-16 00:54:12 +0000200 SDOperand visitBRCOND(SDNode *N);
Nate Begeman44728a72005-09-19 22:34:01 +0000201 SDOperand visitBRCONDTWOWAY(SDNode *N);
202 SDOperand visitBR_CC(SDNode *N);
203 SDOperand visitBRTWOWAY_CC(SDNode *N);
Chris Lattner01a22022005-10-10 22:04:48 +0000204 SDOperand visitLOAD(SDNode *N);
Chris Lattner87514ca2005-10-10 22:31:19 +0000205 SDOperand visitSTORE(SDNode *N);
Chris Lattner01a22022005-10-10 22:04:48 +0000206
Nate Begemancd4d58c2006-02-03 06:46:56 +0000207 SDOperand ReassociateOps(unsigned Opc, SDOperand LHS, SDOperand RHS);
208
Chris Lattner40c62d52005-10-18 06:04:22 +0000209 bool SimplifySelectOps(SDNode *SELECT, SDOperand LHS, SDOperand RHS);
Nate Begeman44728a72005-09-19 22:34:01 +0000210 SDOperand SimplifySelect(SDOperand N0, SDOperand N1, SDOperand N2);
211 SDOperand SimplifySelectCC(SDOperand N0, SDOperand N1, SDOperand N2,
212 SDOperand N3, ISD::CondCode CC);
Nate Begeman452d7be2005-09-16 00:54:12 +0000213 SDOperand SimplifySetCC(MVT::ValueType VT, SDOperand N0, SDOperand N1,
Nate Begemane17daeb2005-10-05 21:43:42 +0000214 ISD::CondCode Cond, bool foldBooleans = true);
Nate Begeman69575232005-10-20 02:15:44 +0000215
216 SDOperand BuildSDIV(SDNode *N);
217 SDOperand BuildUDIV(SDNode *N);
Nate Begeman1d4d4142005-09-01 00:19:25 +0000218public:
219 DAGCombiner(SelectionDAG &D)
Nate Begeman646d7e22005-09-02 21:18:40 +0000220 : DAG(D), TLI(D.getTargetLoweringInfo()), AfterLegalize(false) {}
Nate Begeman1d4d4142005-09-01 00:19:25 +0000221
222 /// Run - runs the dag combiner on all nodes in the work list
Nate Begeman4ebd8052005-09-01 23:24:04 +0000223 void Run(bool RunningAfterLegalize);
Nate Begeman1d4d4142005-09-01 00:19:25 +0000224 };
225}
226
Nate Begeman69575232005-10-20 02:15:44 +0000227struct ms {
228 int64_t m; // magic number
229 int64_t s; // shift amount
230};
231
232struct mu {
233 uint64_t m; // magic number
234 int64_t a; // add indicator
235 int64_t s; // shift amount
236};
237
238/// magic - calculate the magic numbers required to codegen an integer sdiv as
239/// a sequence of multiply and shifts. Requires that the divisor not be 0, 1,
240/// or -1.
241static ms magic32(int32_t d) {
242 int32_t p;
243 uint32_t ad, anc, delta, q1, r1, q2, r2, t;
244 const uint32_t two31 = 0x80000000U;
245 struct ms mag;
246
247 ad = abs(d);
248 t = two31 + ((uint32_t)d >> 31);
249 anc = t - 1 - t%ad; // absolute value of nc
250 p = 31; // initialize p
251 q1 = two31/anc; // initialize q1 = 2p/abs(nc)
252 r1 = two31 - q1*anc; // initialize r1 = rem(2p,abs(nc))
253 q2 = two31/ad; // initialize q2 = 2p/abs(d)
254 r2 = two31 - q2*ad; // initialize r2 = rem(2p,abs(d))
255 do {
256 p = p + 1;
257 q1 = 2*q1; // update q1 = 2p/abs(nc)
258 r1 = 2*r1; // update r1 = rem(2p/abs(nc))
259 if (r1 >= anc) { // must be unsigned comparison
260 q1 = q1 + 1;
261 r1 = r1 - anc;
262 }
263 q2 = 2*q2; // update q2 = 2p/abs(d)
264 r2 = 2*r2; // update r2 = rem(2p/abs(d))
265 if (r2 >= ad) { // must be unsigned comparison
266 q2 = q2 + 1;
267 r2 = r2 - ad;
268 }
269 delta = ad - r2;
270 } while (q1 < delta || (q1 == delta && r1 == 0));
271
272 mag.m = (int32_t)(q2 + 1); // make sure to sign extend
273 if (d < 0) mag.m = -mag.m; // resulting magic number
274 mag.s = p - 32; // resulting shift
275 return mag;
276}
277
278/// magicu - calculate the magic numbers required to codegen an integer udiv as
279/// a sequence of multiply, add and shifts. Requires that the divisor not be 0.
280static mu magicu32(uint32_t d) {
281 int32_t p;
282 uint32_t nc, delta, q1, r1, q2, r2;
283 struct mu magu;
284 magu.a = 0; // initialize "add" indicator
285 nc = - 1 - (-d)%d;
286 p = 31; // initialize p
287 q1 = 0x80000000/nc; // initialize q1 = 2p/nc
288 r1 = 0x80000000 - q1*nc; // initialize r1 = rem(2p,nc)
289 q2 = 0x7FFFFFFF/d; // initialize q2 = (2p-1)/d
290 r2 = 0x7FFFFFFF - q2*d; // initialize r2 = rem((2p-1),d)
291 do {
292 p = p + 1;
293 if (r1 >= nc - r1 ) {
294 q1 = 2*q1 + 1; // update q1
295 r1 = 2*r1 - nc; // update r1
296 }
297 else {
298 q1 = 2*q1; // update q1
299 r1 = 2*r1; // update r1
300 }
301 if (r2 + 1 >= d - r2) {
302 if (q2 >= 0x7FFFFFFF) magu.a = 1;
303 q2 = 2*q2 + 1; // update q2
304 r2 = 2*r2 + 1 - d; // update r2
305 }
306 else {
307 if (q2 >= 0x80000000) magu.a = 1;
308 q2 = 2*q2; // update q2
309 r2 = 2*r2 + 1; // update r2
310 }
311 delta = d - 1 - r2;
312 } while (p < 64 && (q1 < delta || (q1 == delta && r1 == 0)));
313 magu.m = q2 + 1; // resulting magic number
314 magu.s = p - 32; // resulting shift
315 return magu;
316}
317
318/// magic - calculate the magic numbers required to codegen an integer sdiv as
319/// a sequence of multiply and shifts. Requires that the divisor not be 0, 1,
320/// or -1.
321static ms magic64(int64_t d) {
322 int64_t p;
323 uint64_t ad, anc, delta, q1, r1, q2, r2, t;
324 const uint64_t two63 = 9223372036854775808ULL; // 2^63
325 struct ms mag;
326
Chris Lattnerf75f2a02005-10-20 17:01:00 +0000327 ad = d >= 0 ? d : -d;
Nate Begeman69575232005-10-20 02:15:44 +0000328 t = two63 + ((uint64_t)d >> 63);
329 anc = t - 1 - t%ad; // absolute value of nc
330 p = 63; // initialize p
331 q1 = two63/anc; // initialize q1 = 2p/abs(nc)
332 r1 = two63 - q1*anc; // initialize r1 = rem(2p,abs(nc))
333 q2 = two63/ad; // initialize q2 = 2p/abs(d)
334 r2 = two63 - q2*ad; // initialize r2 = rem(2p,abs(d))
335 do {
336 p = p + 1;
337 q1 = 2*q1; // update q1 = 2p/abs(nc)
338 r1 = 2*r1; // update r1 = rem(2p/abs(nc))
339 if (r1 >= anc) { // must be unsigned comparison
340 q1 = q1 + 1;
341 r1 = r1 - anc;
342 }
343 q2 = 2*q2; // update q2 = 2p/abs(d)
344 r2 = 2*r2; // update r2 = rem(2p/abs(d))
345 if (r2 >= ad) { // must be unsigned comparison
346 q2 = q2 + 1;
347 r2 = r2 - ad;
348 }
349 delta = ad - r2;
350 } while (q1 < delta || (q1 == delta && r1 == 0));
351
352 mag.m = q2 + 1;
353 if (d < 0) mag.m = -mag.m; // resulting magic number
354 mag.s = p - 64; // resulting shift
355 return mag;
356}
357
358/// magicu - calculate the magic numbers required to codegen an integer udiv as
359/// a sequence of multiply, add and shifts. Requires that the divisor not be 0.
360static mu magicu64(uint64_t d)
361{
362 int64_t p;
363 uint64_t nc, delta, q1, r1, q2, r2;
364 struct mu magu;
365 magu.a = 0; // initialize "add" indicator
366 nc = - 1 - (-d)%d;
367 p = 63; // initialize p
368 q1 = 0x8000000000000000ull/nc; // initialize q1 = 2p/nc
369 r1 = 0x8000000000000000ull - q1*nc; // initialize r1 = rem(2p,nc)
370 q2 = 0x7FFFFFFFFFFFFFFFull/d; // initialize q2 = (2p-1)/d
371 r2 = 0x7FFFFFFFFFFFFFFFull - q2*d; // initialize r2 = rem((2p-1),d)
372 do {
373 p = p + 1;
374 if (r1 >= nc - r1 ) {
375 q1 = 2*q1 + 1; // update q1
376 r1 = 2*r1 - nc; // update r1
377 }
378 else {
379 q1 = 2*q1; // update q1
380 r1 = 2*r1; // update r1
381 }
382 if (r2 + 1 >= d - r2) {
383 if (q2 >= 0x7FFFFFFFFFFFFFFFull) magu.a = 1;
384 q2 = 2*q2 + 1; // update q2
385 r2 = 2*r2 + 1 - d; // update r2
386 }
387 else {
388 if (q2 >= 0x8000000000000000ull) magu.a = 1;
389 q2 = 2*q2; // update q2
390 r2 = 2*r2 + 1; // update r2
391 }
392 delta = d - 1 - r2;
393 } while (p < 64 && (q1 < delta || (q1 == delta && r1 == 0)));
394 magu.m = q2 + 1; // resulting magic number
395 magu.s = p - 64; // resulting shift
396 return magu;
397}
398
Nate Begeman4ebd8052005-09-01 23:24:04 +0000399// isSetCCEquivalent - Return true if this node is a setcc, or is a select_cc
400// that selects between the values 1 and 0, making it equivalent to a setcc.
Nate Begeman646d7e22005-09-02 21:18:40 +0000401// Also, set the incoming LHS, RHS, and CC references to the appropriate
402// nodes based on the type of node we are checking. This simplifies life a
403// bit for the callers.
404static bool isSetCCEquivalent(SDOperand N, SDOperand &LHS, SDOperand &RHS,
405 SDOperand &CC) {
406 if (N.getOpcode() == ISD::SETCC) {
407 LHS = N.getOperand(0);
408 RHS = N.getOperand(1);
409 CC = N.getOperand(2);
Nate Begeman4ebd8052005-09-01 23:24:04 +0000410 return true;
Nate Begeman646d7e22005-09-02 21:18:40 +0000411 }
Nate Begeman1d4d4142005-09-01 00:19:25 +0000412 if (N.getOpcode() == ISD::SELECT_CC &&
413 N.getOperand(2).getOpcode() == ISD::Constant &&
414 N.getOperand(3).getOpcode() == ISD::Constant &&
415 cast<ConstantSDNode>(N.getOperand(2))->getValue() == 1 &&
Nate Begeman646d7e22005-09-02 21:18:40 +0000416 cast<ConstantSDNode>(N.getOperand(3))->isNullValue()) {
417 LHS = N.getOperand(0);
418 RHS = N.getOperand(1);
419 CC = N.getOperand(4);
Nate Begeman1d4d4142005-09-01 00:19:25 +0000420 return true;
Nate Begeman646d7e22005-09-02 21:18:40 +0000421 }
Nate Begeman1d4d4142005-09-01 00:19:25 +0000422 return false;
423}
424
Nate Begeman99801192005-09-07 23:25:52 +0000425// isOneUseSetCC - Return true if this is a SetCC-equivalent operation with only
426// one use. If this is true, it allows the users to invert the operation for
427// free when it is profitable to do so.
428static bool isOneUseSetCC(SDOperand N) {
Nate Begeman646d7e22005-09-02 21:18:40 +0000429 SDOperand N0, N1, N2;
Nate Begeman646d7e22005-09-02 21:18:40 +0000430 if (isSetCCEquivalent(N, N0, N1, N2) && N.Val->hasOneUse())
Nate Begeman4ebd8052005-09-01 23:24:04 +0000431 return true;
432 return false;
433}
434
Nate Begeman452d7be2005-09-16 00:54:12 +0000435// FIXME: This should probably go in the ISD class rather than being duplicated
436// in several files.
437static bool isCommutativeBinOp(unsigned Opcode) {
438 switch (Opcode) {
439 case ISD::ADD:
440 case ISD::MUL:
441 case ISD::AND:
442 case ISD::OR:
443 case ISD::XOR: return true;
444 default: return false; // FIXME: Need commutative info for user ops!
445 }
446}
447
Nate Begemancd4d58c2006-02-03 06:46:56 +0000448SDOperand DAGCombiner::ReassociateOps(unsigned Opc, SDOperand N0, SDOperand N1){
449 MVT::ValueType VT = N0.getValueType();
450 // reassoc. (op (op x, c1), y) -> (op (op x, y), c1) iff x+c1 has one use
451 // reassoc. (op (op x, c1), c2) -> (op x, (op c1, c2))
452 if (N0.getOpcode() == Opc && isa<ConstantSDNode>(N0.getOperand(1))) {
453 if (isa<ConstantSDNode>(N1)) {
454 SDOperand OpNode = DAG.getNode(Opc, VT, N0.getOperand(1), N1);
455 WorkList.push_back(OpNode.Val);
456 return DAG.getNode(Opc, VT, OpNode, N0.getOperand(0));
457 } else if (N0.hasOneUse()) {
458 SDOperand OpNode = DAG.getNode(Opc, VT, N0.getOperand(0), N1);
459 WorkList.push_back(OpNode.Val);
460 return DAG.getNode(Opc, VT, OpNode, N0.getOperand(1));
461 }
462 }
463 // reassoc. (op y, (op x, c1)) -> (op (op x, y), c1) iff x+c1 has one use
464 // reassoc. (op c2, (op x, c1)) -> (op x, (op c1, c2))
465 if (N1.getOpcode() == Opc && isa<ConstantSDNode>(N1.getOperand(1))) {
466 if (isa<ConstantSDNode>(N0)) {
467 SDOperand OpNode = DAG.getNode(Opc, VT, N1.getOperand(1), N0);
468 WorkList.push_back(OpNode.Val);
469 return DAG.getNode(Opc, VT, OpNode, N1.getOperand(0));
470 } else if (N1.hasOneUse()) {
471 SDOperand OpNode = DAG.getNode(Opc, VT, N1.getOperand(0), N0);
472 WorkList.push_back(OpNode.Val);
473 return DAG.getNode(Opc, VT, OpNode, N1.getOperand(1));
474 }
475 }
476 return SDOperand();
477}
478
Nate Begeman4ebd8052005-09-01 23:24:04 +0000479void DAGCombiner::Run(bool RunningAfterLegalize) {
480 // set the instance variable, so that the various visit routines may use it.
481 AfterLegalize = RunningAfterLegalize;
482
Nate Begeman646d7e22005-09-02 21:18:40 +0000483 // Add all the dag nodes to the worklist.
Chris Lattnerde202b32005-11-09 23:47:37 +0000484 for (SelectionDAG::allnodes_iterator I = DAG.allnodes_begin(),
485 E = DAG.allnodes_end(); I != E; ++I)
486 WorkList.push_back(I);
Nate Begeman83e75ec2005-09-06 04:43:02 +0000487
Chris Lattner95038592005-10-05 06:35:28 +0000488 // Create a dummy node (which is not added to allnodes), that adds a reference
489 // to the root node, preventing it from being deleted, and tracking any
490 // changes of the root.
491 HandleSDNode Dummy(DAG.getRoot());
492
Nate Begeman1d4d4142005-09-01 00:19:25 +0000493 // while the worklist isn't empty, inspect the node on the end of it and
494 // try and combine it.
495 while (!WorkList.empty()) {
496 SDNode *N = WorkList.back();
497 WorkList.pop_back();
498
499 // If N has no uses, it is dead. Make sure to revisit all N's operands once
Chris Lattner95038592005-10-05 06:35:28 +0000500 // N is deleted from the DAG, since they too may now be dead or may have a
501 // reduced number of uses, allowing other xforms.
502 if (N->use_empty() && N != &Dummy) {
Nate Begeman1d4d4142005-09-01 00:19:25 +0000503 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
504 WorkList.push_back(N->getOperand(i).Val);
505
Nate Begeman1d4d4142005-09-01 00:19:25 +0000506 removeFromWorkList(N);
Chris Lattner95038592005-10-05 06:35:28 +0000507 DAG.DeleteNode(N);
Nate Begeman1d4d4142005-09-01 00:19:25 +0000508 continue;
509 }
510
Nate Begeman83e75ec2005-09-06 04:43:02 +0000511 SDOperand RV = visit(N);
512 if (RV.Val) {
Nate Begeman1d4d4142005-09-01 00:19:25 +0000513 ++NodesCombined;
Nate Begeman646d7e22005-09-02 21:18:40 +0000514 // If we get back the same node we passed in, rather than a new node or
515 // zero, we know that the node must have defined multiple values and
516 // CombineTo was used. Since CombineTo takes care of the worklist
517 // mechanics for us, we have no work to do in this case.
Nate Begeman83e75ec2005-09-06 04:43:02 +0000518 if (RV.Val != N) {
Nate Begeman2300f552005-09-07 00:15:36 +0000519 DEBUG(std::cerr << "\nReplacing "; N->dump();
520 std::cerr << "\nWith: "; RV.Val->dump();
521 std::cerr << '\n');
Chris Lattner01a22022005-10-10 22:04:48 +0000522 std::vector<SDNode*> NowDead;
523 DAG.ReplaceAllUsesWith(N, std::vector<SDOperand>(1, RV), &NowDead);
Nate Begeman646d7e22005-09-02 21:18:40 +0000524
525 // Push the new node and any users onto the worklist
Nate Begeman83e75ec2005-09-06 04:43:02 +0000526 WorkList.push_back(RV.Val);
527 AddUsersToWorkList(RV.Val);
Nate Begeman646d7e22005-09-02 21:18:40 +0000528
529 // Nodes can end up on the worklist more than once. Make sure we do
530 // not process a node that has been replaced.
531 removeFromWorkList(N);
Chris Lattner01a22022005-10-10 22:04:48 +0000532 for (unsigned i = 0, e = NowDead.size(); i != e; ++i)
533 removeFromWorkList(NowDead[i]);
Chris Lattner5c46f742005-10-05 06:11:08 +0000534
535 // Finally, since the node is now dead, remove it from the graph.
536 DAG.DeleteNode(N);
Nate Begeman646d7e22005-09-02 21:18:40 +0000537 }
Nate Begeman1d4d4142005-09-01 00:19:25 +0000538 }
539 }
Chris Lattner95038592005-10-05 06:35:28 +0000540
541 // If the root changed (e.g. it was a dead load, update the root).
542 DAG.setRoot(Dummy.getValue());
Nate Begeman1d4d4142005-09-01 00:19:25 +0000543}
544
Nate Begeman83e75ec2005-09-06 04:43:02 +0000545SDOperand DAGCombiner::visit(SDNode *N) {
Nate Begeman1d4d4142005-09-01 00:19:25 +0000546 switch(N->getOpcode()) {
547 default: break;
Nate Begeman4942a962005-09-01 00:33:32 +0000548 case ISD::TokenFactor: return visitTokenFactor(N);
Nate Begeman646d7e22005-09-02 21:18:40 +0000549 case ISD::ADD: return visitADD(N);
550 case ISD::SUB: return visitSUB(N);
551 case ISD::MUL: return visitMUL(N);
552 case ISD::SDIV: return visitSDIV(N);
553 case ISD::UDIV: return visitUDIV(N);
554 case ISD::SREM: return visitSREM(N);
555 case ISD::UREM: return visitUREM(N);
556 case ISD::MULHU: return visitMULHU(N);
557 case ISD::MULHS: return visitMULHS(N);
558 case ISD::AND: return visitAND(N);
559 case ISD::OR: return visitOR(N);
560 case ISD::XOR: return visitXOR(N);
561 case ISD::SHL: return visitSHL(N);
562 case ISD::SRA: return visitSRA(N);
563 case ISD::SRL: return visitSRL(N);
564 case ISD::CTLZ: return visitCTLZ(N);
565 case ISD::CTTZ: return visitCTTZ(N);
566 case ISD::CTPOP: return visitCTPOP(N);
Nate Begeman452d7be2005-09-16 00:54:12 +0000567 case ISD::SELECT: return visitSELECT(N);
568 case ISD::SELECT_CC: return visitSELECT_CC(N);
569 case ISD::SETCC: return visitSETCC(N);
Nate Begeman646d7e22005-09-02 21:18:40 +0000570 case ISD::SIGN_EXTEND: return visitSIGN_EXTEND(N);
571 case ISD::ZERO_EXTEND: return visitZERO_EXTEND(N);
572 case ISD::SIGN_EXTEND_INREG: return visitSIGN_EXTEND_INREG(N);
573 case ISD::TRUNCATE: return visitTRUNCATE(N);
Chris Lattner94683772005-12-23 05:30:37 +0000574 case ISD::BIT_CONVERT: return visitBIT_CONVERT(N);
Chris Lattner01b3d732005-09-28 22:28:18 +0000575 case ISD::FADD: return visitFADD(N);
576 case ISD::FSUB: return visitFSUB(N);
577 case ISD::FMUL: return visitFMUL(N);
578 case ISD::FDIV: return visitFDIV(N);
579 case ISD::FREM: return visitFREM(N);
Nate Begeman646d7e22005-09-02 21:18:40 +0000580 case ISD::SINT_TO_FP: return visitSINT_TO_FP(N);
581 case ISD::UINT_TO_FP: return visitUINT_TO_FP(N);
582 case ISD::FP_TO_SINT: return visitFP_TO_SINT(N);
583 case ISD::FP_TO_UINT: return visitFP_TO_UINT(N);
584 case ISD::FP_ROUND: return visitFP_ROUND(N);
585 case ISD::FP_ROUND_INREG: return visitFP_ROUND_INREG(N);
586 case ISD::FP_EXTEND: return visitFP_EXTEND(N);
587 case ISD::FNEG: return visitFNEG(N);
588 case ISD::FABS: return visitFABS(N);
Nate Begeman44728a72005-09-19 22:34:01 +0000589 case ISD::BRCOND: return visitBRCOND(N);
590 case ISD::BRCONDTWOWAY: return visitBRCONDTWOWAY(N);
591 case ISD::BR_CC: return visitBR_CC(N);
592 case ISD::BRTWOWAY_CC: return visitBRTWOWAY_CC(N);
Chris Lattner01a22022005-10-10 22:04:48 +0000593 case ISD::LOAD: return visitLOAD(N);
Chris Lattner87514ca2005-10-10 22:31:19 +0000594 case ISD::STORE: return visitSTORE(N);
Nate Begeman1d4d4142005-09-01 00:19:25 +0000595 }
Nate Begeman83e75ec2005-09-06 04:43:02 +0000596 return SDOperand();
Nate Begeman1d4d4142005-09-01 00:19:25 +0000597}
598
Nate Begeman83e75ec2005-09-06 04:43:02 +0000599SDOperand DAGCombiner::visitTokenFactor(SDNode *N) {
Nate Begemanded49632005-10-13 03:11:28 +0000600 std::vector<SDOperand> Ops;
601 bool Changed = false;
602
Nate Begeman1d4d4142005-09-01 00:19:25 +0000603 // If the token factor has two operands and one is the entry token, replace
604 // the token factor with the other operand.
605 if (N->getNumOperands() == 2) {
606 if (N->getOperand(0).getOpcode() == ISD::EntryToken)
Nate Begeman83e75ec2005-09-06 04:43:02 +0000607 return N->getOperand(1);
Nate Begeman1d4d4142005-09-01 00:19:25 +0000608 if (N->getOperand(1).getOpcode() == ISD::EntryToken)
Nate Begeman83e75ec2005-09-06 04:43:02 +0000609 return N->getOperand(0);
Nate Begeman1d4d4142005-09-01 00:19:25 +0000610 }
Chris Lattner24edbb72005-10-13 22:10:05 +0000611
Nate Begemanded49632005-10-13 03:11:28 +0000612 // fold (tokenfactor (tokenfactor)) -> tokenfactor
613 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
614 SDOperand Op = N->getOperand(i);
615 if (Op.getOpcode() == ISD::TokenFactor && Op.hasOneUse()) {
616 Changed = true;
617 for (unsigned j = 0, e = Op.getNumOperands(); j != e; ++j)
618 Ops.push_back(Op.getOperand(j));
619 } else {
620 Ops.push_back(Op);
621 }
622 }
623 if (Changed)
624 return DAG.getNode(ISD::TokenFactor, MVT::Other, Ops);
Nate Begeman83e75ec2005-09-06 04:43:02 +0000625 return SDOperand();
Nate Begeman1d4d4142005-09-01 00:19:25 +0000626}
627
Nate Begeman83e75ec2005-09-06 04:43:02 +0000628SDOperand DAGCombiner::visitADD(SDNode *N) {
Nate Begeman1d4d4142005-09-01 00:19:25 +0000629 SDOperand N0 = N->getOperand(0);
630 SDOperand N1 = N->getOperand(1);
Nate Begeman646d7e22005-09-02 21:18:40 +0000631 ConstantSDNode *N0C = dyn_cast<ConstantSDNode>(N0);
632 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1);
Nate Begemanf89d78d2005-09-07 16:09:19 +0000633 MVT::ValueType VT = N0.getValueType();
Nate Begeman1d4d4142005-09-01 00:19:25 +0000634
635 // fold (add c1, c2) -> c1+c2
Nate Begeman646d7e22005-09-02 21:18:40 +0000636 if (N0C && N1C)
Nate Begemana148d982006-01-18 22:35:16 +0000637 return DAG.getNode(ISD::ADD, VT, N0, N1);
Nate Begeman99801192005-09-07 23:25:52 +0000638 // canonicalize constant to RHS
Nate Begemana0e221d2005-10-18 00:28:13 +0000639 if (N0C && !N1C)
640 return DAG.getNode(ISD::ADD, VT, N1, N0);
Nate Begeman1d4d4142005-09-01 00:19:25 +0000641 // fold (add x, 0) -> x
Nate Begeman646d7e22005-09-02 21:18:40 +0000642 if (N1C && N1C->isNullValue())
Nate Begeman83e75ec2005-09-06 04:43:02 +0000643 return N0;
Chris Lattner4aafb4f2006-01-12 20:22:43 +0000644 // fold ((c1-A)+c2) -> (c1+c2)-A
645 if (N1C && N0.getOpcode() == ISD::SUB)
646 if (ConstantSDNode *N0C = dyn_cast<ConstantSDNode>(N0.getOperand(0)))
647 return DAG.getNode(ISD::SUB, VT,
648 DAG.getConstant(N1C->getValue()+N0C->getValue(), VT),
649 N0.getOperand(1));
Nate Begemancd4d58c2006-02-03 06:46:56 +0000650 // reassociate add
651 SDOperand RADD = ReassociateOps(ISD::ADD, N0, N1);
652 if (RADD.Val != 0)
653 return RADD;
Nate Begeman1d4d4142005-09-01 00:19:25 +0000654 // fold ((0-A) + B) -> B-A
655 if (N0.getOpcode() == ISD::SUB && isa<ConstantSDNode>(N0.getOperand(0)) &&
656 cast<ConstantSDNode>(N0.getOperand(0))->isNullValue())
Nate Begemanf89d78d2005-09-07 16:09:19 +0000657 return DAG.getNode(ISD::SUB, VT, N1, N0.getOperand(1));
Nate Begeman1d4d4142005-09-01 00:19:25 +0000658 // fold (A + (0-B)) -> A-B
659 if (N1.getOpcode() == ISD::SUB && isa<ConstantSDNode>(N1.getOperand(0)) &&
660 cast<ConstantSDNode>(N1.getOperand(0))->isNullValue())
Nate Begemanf89d78d2005-09-07 16:09:19 +0000661 return DAG.getNode(ISD::SUB, VT, N0, N1.getOperand(1));
Chris Lattner01b3d732005-09-28 22:28:18 +0000662 // fold (A+(B-A)) -> B
663 if (N1.getOpcode() == ISD::SUB && N0 == N1.getOperand(1))
Nate Begeman83e75ec2005-09-06 04:43:02 +0000664 return N1.getOperand(0);
Nate Begemanb0d04a72006-02-18 02:40:58 +0000665 //
666 if (SimplifyDemandedBits(SDOperand(N, 0)))
667 return SDOperand();
Nate Begeman83e75ec2005-09-06 04:43:02 +0000668 return SDOperand();
Nate Begeman1d4d4142005-09-01 00:19:25 +0000669}
670
Nate Begeman83e75ec2005-09-06 04:43:02 +0000671SDOperand DAGCombiner::visitSUB(SDNode *N) {
Nate Begeman1d4d4142005-09-01 00:19:25 +0000672 SDOperand N0 = N->getOperand(0);
673 SDOperand N1 = N->getOperand(1);
Nate Begeman646d7e22005-09-02 21:18:40 +0000674 ConstantSDNode *N0C = dyn_cast<ConstantSDNode>(N0.Val);
675 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.Val);
Nate Begemana148d982006-01-18 22:35:16 +0000676 MVT::ValueType VT = N0.getValueType();
Nate Begeman1d4d4142005-09-01 00:19:25 +0000677
Chris Lattner854077d2005-10-17 01:07:11 +0000678 // fold (sub x, x) -> 0
679 if (N0 == N1)
680 return DAG.getConstant(0, N->getValueType(0));
Nate Begeman1d4d4142005-09-01 00:19:25 +0000681 // fold (sub c1, c2) -> c1-c2
Nate Begeman646d7e22005-09-02 21:18:40 +0000682 if (N0C && N1C)
Nate Begemana148d982006-01-18 22:35:16 +0000683 return DAG.getNode(ISD::SUB, VT, N0, N1);
Chris Lattner05b57432005-10-11 06:07:15 +0000684 // fold (sub x, c) -> (add x, -c)
685 if (N1C)
Nate Begemana148d982006-01-18 22:35:16 +0000686 return DAG.getNode(ISD::ADD, VT, N0, DAG.getConstant(-N1C->getValue(), VT));
Nate Begeman1d4d4142005-09-01 00:19:25 +0000687 // fold (A+B)-A -> B
Chris Lattner01b3d732005-09-28 22:28:18 +0000688 if (N0.getOpcode() == ISD::ADD && N0.getOperand(0) == N1)
Nate Begeman83e75ec2005-09-06 04:43:02 +0000689 return N0.getOperand(1);
Nate Begeman1d4d4142005-09-01 00:19:25 +0000690 // fold (A+B)-B -> A
Chris Lattner01b3d732005-09-28 22:28:18 +0000691 if (N0.getOpcode() == ISD::ADD && N0.getOperand(1) == N1)
Nate Begeman83e75ec2005-09-06 04:43:02 +0000692 return N0.getOperand(0);
Nate Begeman83e75ec2005-09-06 04:43:02 +0000693 return SDOperand();
Nate Begeman1d4d4142005-09-01 00:19:25 +0000694}
695
Nate Begeman83e75ec2005-09-06 04:43:02 +0000696SDOperand DAGCombiner::visitMUL(SDNode *N) {
Nate Begeman1d4d4142005-09-01 00:19:25 +0000697 SDOperand N0 = N->getOperand(0);
698 SDOperand N1 = N->getOperand(1);
Nate Begeman646d7e22005-09-02 21:18:40 +0000699 ConstantSDNode *N0C = dyn_cast<ConstantSDNode>(N0);
700 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1);
Nate Begeman223df222005-09-08 20:18:10 +0000701 MVT::ValueType VT = N0.getValueType();
Nate Begeman1d4d4142005-09-01 00:19:25 +0000702
703 // fold (mul c1, c2) -> c1*c2
Nate Begeman646d7e22005-09-02 21:18:40 +0000704 if (N0C && N1C)
Nate Begemana148d982006-01-18 22:35:16 +0000705 return DAG.getNode(ISD::MUL, VT, N0, N1);
Nate Begeman99801192005-09-07 23:25:52 +0000706 // canonicalize constant to RHS
Nate Begemana0e221d2005-10-18 00:28:13 +0000707 if (N0C && !N1C)
708 return DAG.getNode(ISD::MUL, VT, N1, N0);
Nate Begeman1d4d4142005-09-01 00:19:25 +0000709 // fold (mul x, 0) -> 0
Nate Begeman646d7e22005-09-02 21:18:40 +0000710 if (N1C && N1C->isNullValue())
Nate Begeman83e75ec2005-09-06 04:43:02 +0000711 return N1;
Nate Begeman1d4d4142005-09-01 00:19:25 +0000712 // fold (mul x, -1) -> 0-x
Nate Begeman646d7e22005-09-02 21:18:40 +0000713 if (N1C && N1C->isAllOnesValue())
Nate Begeman405e3ec2005-10-21 00:02:42 +0000714 return DAG.getNode(ISD::SUB, VT, DAG.getConstant(0, VT), N0);
Nate Begeman1d4d4142005-09-01 00:19:25 +0000715 // fold (mul x, (1 << c)) -> x << c
Nate Begeman646d7e22005-09-02 21:18:40 +0000716 if (N1C && isPowerOf2_64(N1C->getValue()))
Chris Lattner3e6099b2005-10-30 06:41:49 +0000717 return DAG.getNode(ISD::SHL, VT, N0,
Nate Begeman646d7e22005-09-02 21:18:40 +0000718 DAG.getConstant(Log2_64(N1C->getValue()),
Nate Begeman83e75ec2005-09-06 04:43:02 +0000719 TLI.getShiftAmountTy()));
Chris Lattner3e6099b2005-10-30 06:41:49 +0000720 // fold (mul x, -(1 << c)) -> -(x << c) or (-x) << c
721 if (N1C && isPowerOf2_64(-N1C->getSignExtended())) {
722 // FIXME: If the input is something that is easily negated (e.g. a
723 // single-use add), we should put the negate there.
724 return DAG.getNode(ISD::SUB, VT, DAG.getConstant(0, VT),
725 DAG.getNode(ISD::SHL, VT, N0,
726 DAG.getConstant(Log2_64(-N1C->getSignExtended()),
727 TLI.getShiftAmountTy())));
728 }
Nate Begemancd4d58c2006-02-03 06:46:56 +0000729 // reassociate mul
730 SDOperand RMUL = ReassociateOps(ISD::MUL, N0, N1);
731 if (RMUL.Val != 0)
732 return RMUL;
Nate Begeman83e75ec2005-09-06 04:43:02 +0000733 return SDOperand();
Nate Begeman1d4d4142005-09-01 00:19:25 +0000734}
735
Nate Begeman83e75ec2005-09-06 04:43:02 +0000736SDOperand DAGCombiner::visitSDIV(SDNode *N) {
Nate Begeman1d4d4142005-09-01 00:19:25 +0000737 SDOperand N0 = N->getOperand(0);
738 SDOperand N1 = N->getOperand(1);
Nate Begeman646d7e22005-09-02 21:18:40 +0000739 ConstantSDNode *N0C = dyn_cast<ConstantSDNode>(N0.Val);
740 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.Val);
Nate Begemana148d982006-01-18 22:35:16 +0000741 MVT::ValueType VT = N->getValueType(0);
Nate Begeman1d4d4142005-09-01 00:19:25 +0000742
743 // fold (sdiv c1, c2) -> c1/c2
Nate Begeman646d7e22005-09-02 21:18:40 +0000744 if (N0C && N1C && !N1C->isNullValue())
Nate Begemana148d982006-01-18 22:35:16 +0000745 return DAG.getNode(ISD::SDIV, VT, N0, N1);
Nate Begeman405e3ec2005-10-21 00:02:42 +0000746 // fold (sdiv X, 1) -> X
747 if (N1C && N1C->getSignExtended() == 1LL)
748 return N0;
749 // fold (sdiv X, -1) -> 0-X
750 if (N1C && N1C->isAllOnesValue())
751 return DAG.getNode(ISD::SUB, VT, DAG.getConstant(0, VT), N0);
Chris Lattner094c8fc2005-10-07 06:10:46 +0000752 // If we know the sign bits of both operands are zero, strength reduce to a
753 // udiv instead. Handles (X&15) /s 4 -> X&15 >> 2
754 uint64_t SignBit = 1ULL << (MVT::getSizeInBits(VT)-1);
Chris Lattnerc6fd6cd2006-01-30 04:09:27 +0000755 if (TLI.MaskedValueIsZero(N1, SignBit) &&
756 TLI.MaskedValueIsZero(N0, SignBit))
Chris Lattner094c8fc2005-10-07 06:10:46 +0000757 return DAG.getNode(ISD::UDIV, N1.getValueType(), N0, N1);
Nate Begemancd6a6ed2006-02-17 07:26:20 +0000758 // fold (sdiv X, pow2) -> simple ops after legalize
Nate Begemanfb7217b2006-02-17 19:54:08 +0000759 if (N1C && N1C->getValue() && !TLI.isIntDivCheap() &&
Nate Begeman405e3ec2005-10-21 00:02:42 +0000760 (isPowerOf2_64(N1C->getSignExtended()) ||
761 isPowerOf2_64(-N1C->getSignExtended()))) {
762 // If dividing by powers of two is cheap, then don't perform the following
763 // fold.
764 if (TLI.isPow2DivCheap())
765 return SDOperand();
766 int64_t pow2 = N1C->getSignExtended();
767 int64_t abs2 = pow2 > 0 ? pow2 : -pow2;
Chris Lattner8f4880b2006-02-16 08:02:36 +0000768 unsigned lg2 = Log2_64(abs2);
769 // Splat the sign bit into the register
770 SDOperand SGN = DAG.getNode(ISD::SRA, VT, N0,
Nate Begeman405e3ec2005-10-21 00:02:42 +0000771 DAG.getConstant(MVT::getSizeInBits(VT)-1,
772 TLI.getShiftAmountTy()));
Nate Begeman405e3ec2005-10-21 00:02:42 +0000773 WorkList.push_back(SGN.Val);
Chris Lattner8f4880b2006-02-16 08:02:36 +0000774 // Add (N0 < 0) ? abs2 - 1 : 0;
775 SDOperand SRL = DAG.getNode(ISD::SRL, VT, SGN,
776 DAG.getConstant(MVT::getSizeInBits(VT)-lg2,
Nate Begeman405e3ec2005-10-21 00:02:42 +0000777 TLI.getShiftAmountTy()));
Chris Lattner8f4880b2006-02-16 08:02:36 +0000778 SDOperand ADD = DAG.getNode(ISD::ADD, VT, N0, SRL);
779 WorkList.push_back(SRL.Val);
780 WorkList.push_back(ADD.Val); // Divide by pow2
781 SDOperand SRA = DAG.getNode(ISD::SRA, VT, ADD,
782 DAG.getConstant(lg2, TLI.getShiftAmountTy()));
Nate Begeman405e3ec2005-10-21 00:02:42 +0000783 // If we're dividing by a positive value, we're done. Otherwise, we must
784 // negate the result.
785 if (pow2 > 0)
786 return SRA;
787 WorkList.push_back(SRA.Val);
788 return DAG.getNode(ISD::SUB, VT, DAG.getConstant(0, VT), SRA);
789 }
Nate Begeman69575232005-10-20 02:15:44 +0000790 // if integer divide is expensive and we satisfy the requirements, emit an
791 // alternate sequence.
Nate Begeman405e3ec2005-10-21 00:02:42 +0000792 if (N1C && (N1C->getSignExtended() < -1 || N1C->getSignExtended() > 1) &&
Chris Lattnere9936d12005-10-22 18:50:15 +0000793 !TLI.isIntDivCheap()) {
794 SDOperand Op = BuildSDIV(N);
795 if (Op.Val) return Op;
Nate Begeman69575232005-10-20 02:15:44 +0000796 }
Nate Begeman83e75ec2005-09-06 04:43:02 +0000797 return SDOperand();
Nate Begeman1d4d4142005-09-01 00:19:25 +0000798}
799
Nate Begeman83e75ec2005-09-06 04:43:02 +0000800SDOperand DAGCombiner::visitUDIV(SDNode *N) {
Nate Begeman1d4d4142005-09-01 00:19:25 +0000801 SDOperand N0 = N->getOperand(0);
802 SDOperand N1 = N->getOperand(1);
Nate Begeman646d7e22005-09-02 21:18:40 +0000803 ConstantSDNode *N0C = dyn_cast<ConstantSDNode>(N0.Val);
804 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.Val);
Nate Begemana148d982006-01-18 22:35:16 +0000805 MVT::ValueType VT = N->getValueType(0);
Nate Begeman1d4d4142005-09-01 00:19:25 +0000806
807 // fold (udiv c1, c2) -> c1/c2
Nate Begeman646d7e22005-09-02 21:18:40 +0000808 if (N0C && N1C && !N1C->isNullValue())
Nate Begemana148d982006-01-18 22:35:16 +0000809 return DAG.getNode(ISD::UDIV, VT, N0, N1);
Nate Begeman1d4d4142005-09-01 00:19:25 +0000810 // fold (udiv x, (1 << c)) -> x >>u c
Nate Begeman646d7e22005-09-02 21:18:40 +0000811 if (N1C && isPowerOf2_64(N1C->getValue()))
Nate Begemanfb5e4bd2006-02-05 07:20:23 +0000812 return DAG.getNode(ISD::SRL, VT, N0,
Nate Begeman646d7e22005-09-02 21:18:40 +0000813 DAG.getConstant(Log2_64(N1C->getValue()),
Nate Begeman83e75ec2005-09-06 04:43:02 +0000814 TLI.getShiftAmountTy()));
Nate Begemanfb5e4bd2006-02-05 07:20:23 +0000815 // fold (udiv x, (shl c, y)) -> x >>u (log2(c)+y) iff c is power of 2
816 if (N1.getOpcode() == ISD::SHL) {
817 if (ConstantSDNode *SHC = dyn_cast<ConstantSDNode>(N1.getOperand(0))) {
818 if (isPowerOf2_64(SHC->getValue())) {
819 MVT::ValueType ADDVT = N1.getOperand(1).getValueType();
Nate Begemanc031e332006-02-05 07:36:48 +0000820 SDOperand Add = DAG.getNode(ISD::ADD, ADDVT, N1.getOperand(1),
821 DAG.getConstant(Log2_64(SHC->getValue()),
822 ADDVT));
823 WorkList.push_back(Add.Val);
824 return DAG.getNode(ISD::SRL, VT, N0, Add);
Nate Begemanfb5e4bd2006-02-05 07:20:23 +0000825 }
826 }
827 }
Nate Begeman69575232005-10-20 02:15:44 +0000828 // fold (udiv x, c) -> alternate
Chris Lattnere9936d12005-10-22 18:50:15 +0000829 if (N1C && N1C->getValue() && !TLI.isIntDivCheap()) {
830 SDOperand Op = BuildUDIV(N);
831 if (Op.Val) return Op;
832 }
Nate Begeman83e75ec2005-09-06 04:43:02 +0000833 return SDOperand();
Nate Begeman1d4d4142005-09-01 00:19:25 +0000834}
835
Nate Begeman83e75ec2005-09-06 04:43:02 +0000836SDOperand DAGCombiner::visitSREM(SDNode *N) {
Nate Begeman1d4d4142005-09-01 00:19:25 +0000837 SDOperand N0 = N->getOperand(0);
838 SDOperand N1 = N->getOperand(1);
Nate Begeman646d7e22005-09-02 21:18:40 +0000839 ConstantSDNode *N0C = dyn_cast<ConstantSDNode>(N0);
840 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1);
Nate Begemana148d982006-01-18 22:35:16 +0000841 MVT::ValueType VT = N->getValueType(0);
Nate Begeman1d4d4142005-09-01 00:19:25 +0000842
843 // fold (srem c1, c2) -> c1%c2
Nate Begeman646d7e22005-09-02 21:18:40 +0000844 if (N0C && N1C && !N1C->isNullValue())
Nate Begemana148d982006-01-18 22:35:16 +0000845 return DAG.getNode(ISD::SREM, VT, N0, N1);
Nate Begeman07ed4172005-10-10 21:26:48 +0000846 // If we know the sign bits of both operands are zero, strength reduce to a
847 // urem instead. Handles (X & 0x0FFFFFFF) %s 16 -> X&15
848 uint64_t SignBit = 1ULL << (MVT::getSizeInBits(VT)-1);
Chris Lattnerc6fd6cd2006-01-30 04:09:27 +0000849 if (TLI.MaskedValueIsZero(N1, SignBit) &&
850 TLI.MaskedValueIsZero(N0, SignBit))
Nate Begemana148d982006-01-18 22:35:16 +0000851 return DAG.getNode(ISD::UREM, VT, N0, N1);
Nate Begeman83e75ec2005-09-06 04:43:02 +0000852 return SDOperand();
Nate Begeman1d4d4142005-09-01 00:19:25 +0000853}
854
Nate Begeman83e75ec2005-09-06 04:43:02 +0000855SDOperand DAGCombiner::visitUREM(SDNode *N) {
Nate Begeman1d4d4142005-09-01 00:19:25 +0000856 SDOperand N0 = N->getOperand(0);
857 SDOperand N1 = N->getOperand(1);
Nate Begeman646d7e22005-09-02 21:18:40 +0000858 ConstantSDNode *N0C = dyn_cast<ConstantSDNode>(N0);
859 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1);
Nate Begemana148d982006-01-18 22:35:16 +0000860 MVT::ValueType VT = N->getValueType(0);
Nate Begeman1d4d4142005-09-01 00:19:25 +0000861
862 // fold (urem c1, c2) -> c1%c2
Nate Begeman646d7e22005-09-02 21:18:40 +0000863 if (N0C && N1C && !N1C->isNullValue())
Nate Begemana148d982006-01-18 22:35:16 +0000864 return DAG.getNode(ISD::UREM, VT, N0, N1);
Nate Begeman07ed4172005-10-10 21:26:48 +0000865 // fold (urem x, pow2) -> (and x, pow2-1)
866 if (N1C && !N1C->isNullValue() && isPowerOf2_64(N1C->getValue()))
Nate Begemana148d982006-01-18 22:35:16 +0000867 return DAG.getNode(ISD::AND, VT, N0, DAG.getConstant(N1C->getValue()-1,VT));
Nate Begemanc031e332006-02-05 07:36:48 +0000868 // fold (urem x, (shl pow2, y)) -> (and x, (add (shl pow2, y), -1))
869 if (N1.getOpcode() == ISD::SHL) {
870 if (ConstantSDNode *SHC = dyn_cast<ConstantSDNode>(N1.getOperand(0))) {
871 if (isPowerOf2_64(SHC->getValue())) {
Nate Begemanbab92392006-02-05 08:07:24 +0000872 SDOperand Add = DAG.getNode(ISD::ADD, VT, N1,DAG.getConstant(~0ULL,VT));
Nate Begemanc031e332006-02-05 07:36:48 +0000873 WorkList.push_back(Add.Val);
874 return DAG.getNode(ISD::AND, VT, N0, Add);
875 }
876 }
877 }
Nate Begeman83e75ec2005-09-06 04:43:02 +0000878 return SDOperand();
Nate Begeman1d4d4142005-09-01 00:19:25 +0000879}
880
Nate Begeman83e75ec2005-09-06 04:43:02 +0000881SDOperand DAGCombiner::visitMULHS(SDNode *N) {
Nate Begeman1d4d4142005-09-01 00:19:25 +0000882 SDOperand N0 = N->getOperand(0);
883 SDOperand N1 = N->getOperand(1);
Nate Begeman646d7e22005-09-02 21:18:40 +0000884 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1);
Nate Begeman1d4d4142005-09-01 00:19:25 +0000885
886 // fold (mulhs x, 0) -> 0
Nate Begeman646d7e22005-09-02 21:18:40 +0000887 if (N1C && N1C->isNullValue())
Nate Begeman83e75ec2005-09-06 04:43:02 +0000888 return N1;
Nate Begeman1d4d4142005-09-01 00:19:25 +0000889 // fold (mulhs x, 1) -> (sra x, size(x)-1)
Nate Begeman646d7e22005-09-02 21:18:40 +0000890 if (N1C && N1C->getValue() == 1)
Nate Begeman1d4d4142005-09-01 00:19:25 +0000891 return DAG.getNode(ISD::SRA, N0.getValueType(), N0,
892 DAG.getConstant(MVT::getSizeInBits(N0.getValueType())-1,
Nate Begeman83e75ec2005-09-06 04:43:02 +0000893 TLI.getShiftAmountTy()));
894 return SDOperand();
Nate Begeman1d4d4142005-09-01 00:19:25 +0000895}
896
Nate Begeman83e75ec2005-09-06 04:43:02 +0000897SDOperand DAGCombiner::visitMULHU(SDNode *N) {
Nate Begeman1d4d4142005-09-01 00:19:25 +0000898 SDOperand N0 = N->getOperand(0);
899 SDOperand N1 = N->getOperand(1);
Nate Begeman646d7e22005-09-02 21:18:40 +0000900 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1);
Nate Begeman1d4d4142005-09-01 00:19:25 +0000901
902 // fold (mulhu x, 0) -> 0
Nate Begeman646d7e22005-09-02 21:18:40 +0000903 if (N1C && N1C->isNullValue())
Nate Begeman83e75ec2005-09-06 04:43:02 +0000904 return N1;
Nate Begeman1d4d4142005-09-01 00:19:25 +0000905 // fold (mulhu x, 1) -> 0
Nate Begeman646d7e22005-09-02 21:18:40 +0000906 if (N1C && N1C->getValue() == 1)
Nate Begeman83e75ec2005-09-06 04:43:02 +0000907 return DAG.getConstant(0, N0.getValueType());
908 return SDOperand();
Nate Begeman1d4d4142005-09-01 00:19:25 +0000909}
910
Nate Begeman83e75ec2005-09-06 04:43:02 +0000911SDOperand DAGCombiner::visitAND(SDNode *N) {
Nate Begeman1d4d4142005-09-01 00:19:25 +0000912 SDOperand N0 = N->getOperand(0);
913 SDOperand N1 = N->getOperand(1);
Nate Begemanfb7217b2006-02-17 19:54:08 +0000914 SDOperand LL, LR, RL, RR, CC0, CC1;
Nate Begeman646d7e22005-09-02 21:18:40 +0000915 ConstantSDNode *N0C = dyn_cast<ConstantSDNode>(N0);
916 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1);
Nate Begeman1d4d4142005-09-01 00:19:25 +0000917 MVT::ValueType VT = N1.getValueType();
Nate Begeman83e75ec2005-09-06 04:43:02 +0000918 unsigned OpSizeInBits = MVT::getSizeInBits(VT);
Nate Begeman1d4d4142005-09-01 00:19:25 +0000919
920 // fold (and c1, c2) -> c1&c2
Nate Begeman646d7e22005-09-02 21:18:40 +0000921 if (N0C && N1C)
Nate Begemana148d982006-01-18 22:35:16 +0000922 return DAG.getNode(ISD::AND, VT, N0, N1);
Nate Begeman99801192005-09-07 23:25:52 +0000923 // canonicalize constant to RHS
Nate Begemana0e221d2005-10-18 00:28:13 +0000924 if (N0C && !N1C)
925 return DAG.getNode(ISD::AND, VT, N1, N0);
Nate Begeman1d4d4142005-09-01 00:19:25 +0000926 // fold (and x, -1) -> x
Nate Begeman646d7e22005-09-02 21:18:40 +0000927 if (N1C && N1C->isAllOnesValue())
Nate Begeman83e75ec2005-09-06 04:43:02 +0000928 return N0;
929 // if (and x, c) is known to be zero, return 0
Nate Begeman368e18d2006-02-16 21:11:51 +0000930 if (N1C && TLI.MaskedValueIsZero(SDOperand(N, 0), MVT::getIntVTBitMask(VT)))
Nate Begeman83e75ec2005-09-06 04:43:02 +0000931 return DAG.getConstant(0, VT);
Nate Begemancd4d58c2006-02-03 06:46:56 +0000932 // reassociate and
933 SDOperand RAND = ReassociateOps(ISD::AND, N0, N1);
934 if (RAND.Val != 0)
935 return RAND;
Nate Begeman1d4d4142005-09-01 00:19:25 +0000936 // fold (and (or x, 0xFFFF), 0xFF) -> 0xFF
Nate Begeman5dc7e862005-11-02 18:42:59 +0000937 if (N1C && N0.getOpcode() == ISD::OR)
Nate Begeman1d4d4142005-09-01 00:19:25 +0000938 if (ConstantSDNode *ORI = dyn_cast<ConstantSDNode>(N0.getOperand(1)))
Nate Begeman646d7e22005-09-02 21:18:40 +0000939 if ((ORI->getValue() & N1C->getValue()) == N1C->getValue())
Nate Begeman83e75ec2005-09-06 04:43:02 +0000940 return N1;
Chris Lattner3603cd62006-02-02 07:17:31 +0000941 // fold (and (any_ext V), c) -> (zero_ext V) if 'and' only clears top bits.
942 if (N1C && N0.getOpcode() == ISD::ANY_EXTEND) {
943 unsigned InBits = MVT::getSizeInBits(N0.getOperand(0).getValueType());
944 if (TLI.MaskedValueIsZero(N0.getOperand(0),
945 ~N1C->getValue() & ((1ULL << InBits)-1))) {
946 // We actually want to replace all uses of the any_extend with the
947 // zero_extend, to avoid duplicating things. This will later cause this
948 // AND to be folded.
949 CombineTo(N0.Val, DAG.getNode(ISD::ZERO_EXTEND, N0.getValueType(),
950 N0.getOperand(0)));
951 return SDOperand();
952 }
953 }
Nate Begeman39ee1ac2005-09-09 19:49:52 +0000954 // fold (and (setcc x), (setcc y)) -> (setcc (and x, y))
955 if (isSetCCEquivalent(N0, LL, LR, CC0) && isSetCCEquivalent(N1, RL, RR, CC1)){
956 ISD::CondCode Op0 = cast<CondCodeSDNode>(CC0)->get();
957 ISD::CondCode Op1 = cast<CondCodeSDNode>(CC1)->get();
958
959 if (LR == RR && isa<ConstantSDNode>(LR) && Op0 == Op1 &&
960 MVT::isInteger(LL.getValueType())) {
961 // fold (X == 0) & (Y == 0) -> (X|Y == 0)
962 if (cast<ConstantSDNode>(LR)->getValue() == 0 && Op1 == ISD::SETEQ) {
963 SDOperand ORNode = DAG.getNode(ISD::OR, LR.getValueType(), LL, RL);
964 WorkList.push_back(ORNode.Val);
965 return DAG.getSetCC(VT, ORNode, LR, Op1);
966 }
967 // fold (X == -1) & (Y == -1) -> (X&Y == -1)
968 if (cast<ConstantSDNode>(LR)->isAllOnesValue() && Op1 == ISD::SETEQ) {
969 SDOperand ANDNode = DAG.getNode(ISD::AND, LR.getValueType(), LL, RL);
970 WorkList.push_back(ANDNode.Val);
971 return DAG.getSetCC(VT, ANDNode, LR, Op1);
972 }
973 // fold (X > -1) & (Y > -1) -> (X|Y > -1)
974 if (cast<ConstantSDNode>(LR)->isAllOnesValue() && Op1 == ISD::SETGT) {
975 SDOperand ORNode = DAG.getNode(ISD::OR, LR.getValueType(), LL, RL);
976 WorkList.push_back(ORNode.Val);
977 return DAG.getSetCC(VT, ORNode, LR, Op1);
978 }
979 }
980 // canonicalize equivalent to ll == rl
981 if (LL == RR && LR == RL) {
982 Op1 = ISD::getSetCCSwappedOperands(Op1);
983 std::swap(RL, RR);
984 }
985 if (LL == RL && LR == RR) {
986 bool isInteger = MVT::isInteger(LL.getValueType());
987 ISD::CondCode Result = ISD::getSetCCAndOperation(Op0, Op1, isInteger);
988 if (Result != ISD::SETCC_INVALID)
989 return DAG.getSetCC(N0.getValueType(), LL, LR, Result);
990 }
991 }
992 // fold (and (zext x), (zext y)) -> (zext (and x, y))
993 if (N0.getOpcode() == ISD::ZERO_EXTEND &&
994 N1.getOpcode() == ISD::ZERO_EXTEND &&
995 N0.getOperand(0).getValueType() == N1.getOperand(0).getValueType()) {
996 SDOperand ANDNode = DAG.getNode(ISD::AND, N0.getOperand(0).getValueType(),
997 N0.getOperand(0), N1.getOperand(0));
998 WorkList.push_back(ANDNode.Val);
999 return DAG.getNode(ISD::ZERO_EXTEND, VT, ANDNode);
1000 }
Nate Begeman61af66e2006-01-28 01:06:30 +00001001 // fold (and (shl/srl/sra x), (shl/srl/sra y)) -> (shl/srl/sra (and x, y))
Nate Begeman452d7be2005-09-16 00:54:12 +00001002 if (((N0.getOpcode() == ISD::SHL && N1.getOpcode() == ISD::SHL) ||
Nate Begeman61af66e2006-01-28 01:06:30 +00001003 (N0.getOpcode() == ISD::SRL && N1.getOpcode() == ISD::SRL) ||
1004 (N0.getOpcode() == ISD::SRA && N1.getOpcode() == ISD::SRA)) &&
Nate Begeman452d7be2005-09-16 00:54:12 +00001005 N0.getOperand(1) == N1.getOperand(1)) {
1006 SDOperand ANDNode = DAG.getNode(ISD::AND, N0.getOperand(0).getValueType(),
1007 N0.getOperand(0), N1.getOperand(0));
1008 WorkList.push_back(ANDNode.Val);
1009 return DAG.getNode(N0.getOpcode(), VT, ANDNode, N0.getOperand(1));
1010 }
Nate Begemande996292006-02-03 22:24:05 +00001011 // fold (and (sign_extend_inreg x, i16 to i32), 1) -> (and x, 1)
1012 // fold (and (sra)) -> (and (srl)) when possible.
Chris Lattner012f2412006-02-17 21:58:01 +00001013 if (SimplifyDemandedBits(SDOperand(N, 0)))
Nate Begemande996292006-02-03 22:24:05 +00001014 return SDOperand();
Nate Begemanded49632005-10-13 03:11:28 +00001015 // fold (zext_inreg (extload x)) -> (zextload x)
Nate Begeman5054f162005-10-14 01:12:21 +00001016 if (N0.getOpcode() == ISD::EXTLOAD) {
Nate Begemanded49632005-10-13 03:11:28 +00001017 MVT::ValueType EVT = cast<VTSDNode>(N0.getOperand(3))->getVT();
Nate Begemanbfd65a02005-10-13 18:34:58 +00001018 // If we zero all the possible extended bits, then we can turn this into
1019 // a zextload if we are running before legalize or the operation is legal.
Chris Lattnerc6fd6cd2006-01-30 04:09:27 +00001020 if (TLI.MaskedValueIsZero(N1, ~0ULL << MVT::getSizeInBits(EVT)) &&
Chris Lattner67a44cd2005-10-13 18:16:34 +00001021 (!AfterLegalize || TLI.isOperationLegal(ISD::ZEXTLOAD, EVT))) {
Nate Begemanded49632005-10-13 03:11:28 +00001022 SDOperand ExtLoad = DAG.getExtLoad(ISD::ZEXTLOAD, VT, N0.getOperand(0),
1023 N0.getOperand(1), N0.getOperand(2),
1024 EVT);
Nate Begemanded49632005-10-13 03:11:28 +00001025 WorkList.push_back(N);
Chris Lattner67a44cd2005-10-13 18:16:34 +00001026 CombineTo(N0.Val, ExtLoad, ExtLoad.getValue(1));
Nate Begemanded49632005-10-13 03:11:28 +00001027 return SDOperand();
1028 }
1029 }
1030 // fold (zext_inreg (sextload x)) -> (zextload x) iff load has one use
Chris Lattner40c62d52005-10-18 06:04:22 +00001031 if (N0.getOpcode() == ISD::SEXTLOAD && N0.hasOneUse()) {
Nate Begemanded49632005-10-13 03:11:28 +00001032 MVT::ValueType EVT = cast<VTSDNode>(N0.getOperand(3))->getVT();
Nate Begemanbfd65a02005-10-13 18:34:58 +00001033 // If we zero all the possible extended bits, then we can turn this into
1034 // a zextload if we are running before legalize or the operation is legal.
Chris Lattnerc6fd6cd2006-01-30 04:09:27 +00001035 if (TLI.MaskedValueIsZero(N1, ~0ULL << MVT::getSizeInBits(EVT)) &&
Nate Begemanbfd65a02005-10-13 18:34:58 +00001036 (!AfterLegalize || TLI.isOperationLegal(ISD::ZEXTLOAD, EVT))) {
Nate Begemanded49632005-10-13 03:11:28 +00001037 SDOperand ExtLoad = DAG.getExtLoad(ISD::ZEXTLOAD, VT, N0.getOperand(0),
1038 N0.getOperand(1), N0.getOperand(2),
1039 EVT);
Nate Begemanded49632005-10-13 03:11:28 +00001040 WorkList.push_back(N);
Chris Lattner67a44cd2005-10-13 18:16:34 +00001041 CombineTo(N0.Val, ExtLoad, ExtLoad.getValue(1));
Nate Begemanded49632005-10-13 03:11:28 +00001042 return SDOperand();
1043 }
1044 }
Nate Begeman83e75ec2005-09-06 04:43:02 +00001045 return SDOperand();
Nate Begeman1d4d4142005-09-01 00:19:25 +00001046}
1047
Nate Begeman83e75ec2005-09-06 04:43:02 +00001048SDOperand DAGCombiner::visitOR(SDNode *N) {
Nate Begeman1d4d4142005-09-01 00:19:25 +00001049 SDOperand N0 = N->getOperand(0);
1050 SDOperand N1 = N->getOperand(1);
Nate Begeman39ee1ac2005-09-09 19:49:52 +00001051 SDOperand LL, LR, RL, RR, CC0, CC1;
Nate Begeman646d7e22005-09-02 21:18:40 +00001052 ConstantSDNode *N0C = dyn_cast<ConstantSDNode>(N0);
1053 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1);
Nate Begeman83e75ec2005-09-06 04:43:02 +00001054 MVT::ValueType VT = N1.getValueType();
1055 unsigned OpSizeInBits = MVT::getSizeInBits(VT);
Nate Begeman1d4d4142005-09-01 00:19:25 +00001056
1057 // fold (or c1, c2) -> c1|c2
Nate Begeman646d7e22005-09-02 21:18:40 +00001058 if (N0C && N1C)
Nate Begemana148d982006-01-18 22:35:16 +00001059 return DAG.getNode(ISD::OR, VT, N0, N1);
Nate Begeman99801192005-09-07 23:25:52 +00001060 // canonicalize constant to RHS
Nate Begemana0e221d2005-10-18 00:28:13 +00001061 if (N0C && !N1C)
1062 return DAG.getNode(ISD::OR, VT, N1, N0);
Nate Begeman1d4d4142005-09-01 00:19:25 +00001063 // fold (or x, 0) -> x
Nate Begeman646d7e22005-09-02 21:18:40 +00001064 if (N1C && N1C->isNullValue())
Nate Begeman83e75ec2005-09-06 04:43:02 +00001065 return N0;
Nate Begeman1d4d4142005-09-01 00:19:25 +00001066 // fold (or x, -1) -> -1
Nate Begeman646d7e22005-09-02 21:18:40 +00001067 if (N1C && N1C->isAllOnesValue())
Nate Begeman83e75ec2005-09-06 04:43:02 +00001068 return N1;
1069 // fold (or x, c) -> c iff (x & ~c) == 0
Chris Lattnerc6fd6cd2006-01-30 04:09:27 +00001070 if (N1C &&
1071 TLI.MaskedValueIsZero(N0,~N1C->getValue() & (~0ULL>>(64-OpSizeInBits))))
Nate Begeman83e75ec2005-09-06 04:43:02 +00001072 return N1;
Nate Begemancd4d58c2006-02-03 06:46:56 +00001073 // reassociate or
1074 SDOperand ROR = ReassociateOps(ISD::OR, N0, N1);
1075 if (ROR.Val != 0)
1076 return ROR;
1077 // Canonicalize (or (and X, c1), c2) -> (and (or X, c2), c1|c2)
1078 if (N1C && N0.getOpcode() == ISD::AND && N0.Val->hasOneUse() &&
Chris Lattner731d3482005-10-27 05:06:38 +00001079 isa<ConstantSDNode>(N0.getOperand(1))) {
Chris Lattner731d3482005-10-27 05:06:38 +00001080 ConstantSDNode *C1 = cast<ConstantSDNode>(N0.getOperand(1));
1081 return DAG.getNode(ISD::AND, VT, DAG.getNode(ISD::OR, VT, N0.getOperand(0),
1082 N1),
1083 DAG.getConstant(N1C->getValue() | C1->getValue(), VT));
Nate Begeman223df222005-09-08 20:18:10 +00001084 }
Nate Begeman39ee1ac2005-09-09 19:49:52 +00001085 // fold (or (setcc x), (setcc y)) -> (setcc (or x, y))
1086 if (isSetCCEquivalent(N0, LL, LR, CC0) && isSetCCEquivalent(N1, RL, RR, CC1)){
1087 ISD::CondCode Op0 = cast<CondCodeSDNode>(CC0)->get();
1088 ISD::CondCode Op1 = cast<CondCodeSDNode>(CC1)->get();
1089
1090 if (LR == RR && isa<ConstantSDNode>(LR) && Op0 == Op1 &&
1091 MVT::isInteger(LL.getValueType())) {
1092 // fold (X != 0) | (Y != 0) -> (X|Y != 0)
1093 // fold (X < 0) | (Y < 0) -> (X|Y < 0)
1094 if (cast<ConstantSDNode>(LR)->getValue() == 0 &&
1095 (Op1 == ISD::SETNE || Op1 == ISD::SETLT)) {
1096 SDOperand ORNode = DAG.getNode(ISD::OR, LR.getValueType(), LL, RL);
1097 WorkList.push_back(ORNode.Val);
1098 return DAG.getSetCC(VT, ORNode, LR, Op1);
1099 }
1100 // fold (X != -1) | (Y != -1) -> (X&Y != -1)
1101 // fold (X > -1) | (Y > -1) -> (X&Y > -1)
1102 if (cast<ConstantSDNode>(LR)->isAllOnesValue() &&
1103 (Op1 == ISD::SETNE || Op1 == ISD::SETGT)) {
1104 SDOperand ANDNode = DAG.getNode(ISD::AND, LR.getValueType(), LL, RL);
1105 WorkList.push_back(ANDNode.Val);
1106 return DAG.getSetCC(VT, ANDNode, LR, Op1);
1107 }
1108 }
1109 // canonicalize equivalent to ll == rl
1110 if (LL == RR && LR == RL) {
1111 Op1 = ISD::getSetCCSwappedOperands(Op1);
1112 std::swap(RL, RR);
1113 }
1114 if (LL == RL && LR == RR) {
1115 bool isInteger = MVT::isInteger(LL.getValueType());
1116 ISD::CondCode Result = ISD::getSetCCOrOperation(Op0, Op1, isInteger);
1117 if (Result != ISD::SETCC_INVALID)
1118 return DAG.getSetCC(N0.getValueType(), LL, LR, Result);
1119 }
1120 }
1121 // fold (or (zext x), (zext y)) -> (zext (or x, y))
1122 if (N0.getOpcode() == ISD::ZERO_EXTEND &&
1123 N1.getOpcode() == ISD::ZERO_EXTEND &&
1124 N0.getOperand(0).getValueType() == N1.getOperand(0).getValueType()) {
1125 SDOperand ORNode = DAG.getNode(ISD::OR, N0.getOperand(0).getValueType(),
1126 N0.getOperand(0), N1.getOperand(0));
1127 WorkList.push_back(ORNode.Val);
1128 return DAG.getNode(ISD::ZERO_EXTEND, VT, ORNode);
1129 }
Nate Begeman750ac1b2006-02-01 07:19:44 +00001130 // fold (or (shl/srl/sra x), (shl/srl/sra y)) -> (shl/srl/sra (or x, y))
1131 if (((N0.getOpcode() == ISD::SHL && N1.getOpcode() == ISD::SHL) ||
1132 (N0.getOpcode() == ISD::SRL && N1.getOpcode() == ISD::SRL) ||
1133 (N0.getOpcode() == ISD::SRA && N1.getOpcode() == ISD::SRA)) &&
1134 N0.getOperand(1) == N1.getOperand(1)) {
1135 SDOperand ORNode = DAG.getNode(ISD::OR, N0.getOperand(0).getValueType(),
1136 N0.getOperand(0), N1.getOperand(0));
1137 WorkList.push_back(ORNode.Val);
1138 return DAG.getNode(N0.getOpcode(), VT, ORNode, N0.getOperand(1));
1139 }
Nate Begeman35ef9132006-01-11 21:21:00 +00001140 // canonicalize shl to left side in a shl/srl pair, to match rotate
1141 if (N0.getOpcode() == ISD::SRL && N1.getOpcode() == ISD::SHL)
1142 std::swap(N0, N1);
1143 // check for rotl, rotr
1144 if (N0.getOpcode() == ISD::SHL && N1.getOpcode() == ISD::SRL &&
1145 N0.getOperand(0) == N1.getOperand(0) &&
Chris Lattneraf551bc2006-01-12 18:57:33 +00001146 TLI.isOperationLegal(ISD::ROTL, VT) && TLI.isTypeLegal(VT)) {
Nate Begeman35ef9132006-01-11 21:21:00 +00001147 // fold (or (shl x, C1), (srl x, C2)) -> (rotl x, C1)
1148 if (N0.getOperand(1).getOpcode() == ISD::Constant &&
1149 N1.getOperand(1).getOpcode() == ISD::Constant) {
1150 uint64_t c1val = cast<ConstantSDNode>(N0.getOperand(1))->getValue();
1151 uint64_t c2val = cast<ConstantSDNode>(N1.getOperand(1))->getValue();
1152 if ((c1val + c2val) == OpSizeInBits)
1153 return DAG.getNode(ISD::ROTL, VT, N0.getOperand(0), N0.getOperand(1));
1154 }
1155 // fold (or (shl x, y), (srl x, (sub 32, y))) -> (rotl x, y)
1156 if (N1.getOperand(1).getOpcode() == ISD::SUB &&
1157 N0.getOperand(1) == N1.getOperand(1).getOperand(1))
1158 if (ConstantSDNode *SUBC =
1159 dyn_cast<ConstantSDNode>(N1.getOperand(1).getOperand(0)))
1160 if (SUBC->getValue() == OpSizeInBits)
1161 return DAG.getNode(ISD::ROTL, VT, N0.getOperand(0), N0.getOperand(1));
1162 // fold (or (shl x, (sub 32, y)), (srl x, r)) -> (rotr x, y)
1163 if (N0.getOperand(1).getOpcode() == ISD::SUB &&
1164 N1.getOperand(1) == N0.getOperand(1).getOperand(1))
1165 if (ConstantSDNode *SUBC =
1166 dyn_cast<ConstantSDNode>(N0.getOperand(1).getOperand(0)))
1167 if (SUBC->getValue() == OpSizeInBits) {
Chris Lattneraf551bc2006-01-12 18:57:33 +00001168 if (TLI.isOperationLegal(ISD::ROTR, VT) && TLI.isTypeLegal(VT))
Nate Begeman35ef9132006-01-11 21:21:00 +00001169 return DAG.getNode(ISD::ROTR, VT, N0.getOperand(0),
1170 N1.getOperand(1));
1171 else
1172 return DAG.getNode(ISD::ROTL, VT, N0.getOperand(0),
1173 N0.getOperand(1));
1174 }
1175 }
Nate Begeman83e75ec2005-09-06 04:43:02 +00001176 return SDOperand();
Nate Begeman1d4d4142005-09-01 00:19:25 +00001177}
1178
Nate Begeman83e75ec2005-09-06 04:43:02 +00001179SDOperand DAGCombiner::visitXOR(SDNode *N) {
Nate Begeman1d4d4142005-09-01 00:19:25 +00001180 SDOperand N0 = N->getOperand(0);
1181 SDOperand N1 = N->getOperand(1);
Nate Begeman646d7e22005-09-02 21:18:40 +00001182 SDOperand LHS, RHS, CC;
1183 ConstantSDNode *N0C = dyn_cast<ConstantSDNode>(N0);
1184 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1);
Nate Begeman1d4d4142005-09-01 00:19:25 +00001185 MVT::ValueType VT = N0.getValueType();
1186
1187 // fold (xor c1, c2) -> c1^c2
Nate Begeman646d7e22005-09-02 21:18:40 +00001188 if (N0C && N1C)
Nate Begemana148d982006-01-18 22:35:16 +00001189 return DAG.getNode(ISD::XOR, VT, N0, N1);
Nate Begeman99801192005-09-07 23:25:52 +00001190 // canonicalize constant to RHS
Nate Begemana0e221d2005-10-18 00:28:13 +00001191 if (N0C && !N1C)
1192 return DAG.getNode(ISD::XOR, VT, N1, N0);
Nate Begeman1d4d4142005-09-01 00:19:25 +00001193 // fold (xor x, 0) -> x
Nate Begeman646d7e22005-09-02 21:18:40 +00001194 if (N1C && N1C->isNullValue())
Nate Begeman83e75ec2005-09-06 04:43:02 +00001195 return N0;
Nate Begemancd4d58c2006-02-03 06:46:56 +00001196 // reassociate xor
1197 SDOperand RXOR = ReassociateOps(ISD::XOR, N0, N1);
1198 if (RXOR.Val != 0)
1199 return RXOR;
Nate Begeman1d4d4142005-09-01 00:19:25 +00001200 // fold !(x cc y) -> (x !cc y)
Nate Begeman646d7e22005-09-02 21:18:40 +00001201 if (N1C && N1C->getValue() == 1 && isSetCCEquivalent(N0, LHS, RHS, CC)) {
1202 bool isInt = MVT::isInteger(LHS.getValueType());
1203 ISD::CondCode NotCC = ISD::getSetCCInverse(cast<CondCodeSDNode>(CC)->get(),
1204 isInt);
1205 if (N0.getOpcode() == ISD::SETCC)
Nate Begeman83e75ec2005-09-06 04:43:02 +00001206 return DAG.getSetCC(VT, LHS, RHS, NotCC);
Nate Begeman646d7e22005-09-02 21:18:40 +00001207 if (N0.getOpcode() == ISD::SELECT_CC)
Nate Begeman83e75ec2005-09-06 04:43:02 +00001208 return DAG.getSelectCC(LHS, RHS, N0.getOperand(2),N0.getOperand(3),NotCC);
Nate Begeman646d7e22005-09-02 21:18:40 +00001209 assert(0 && "Unhandled SetCC Equivalent!");
1210 abort();
Nate Begeman1d4d4142005-09-01 00:19:25 +00001211 }
Nate Begeman99801192005-09-07 23:25:52 +00001212 // fold !(x or y) -> (!x and !y) iff x or y are setcc
1213 if (N1C && N1C->getValue() == 1 &&
1214 (N0.getOpcode() == ISD::OR || N0.getOpcode() == ISD::AND)) {
Nate Begeman1d4d4142005-09-01 00:19:25 +00001215 SDOperand LHS = N0.getOperand(0), RHS = N0.getOperand(1);
Nate Begeman99801192005-09-07 23:25:52 +00001216 if (isOneUseSetCC(RHS) || isOneUseSetCC(LHS)) {
1217 unsigned NewOpcode = N0.getOpcode() == ISD::AND ? ISD::OR : ISD::AND;
Nate Begeman1d4d4142005-09-01 00:19:25 +00001218 LHS = DAG.getNode(ISD::XOR, VT, LHS, N1); // RHS = ~LHS
1219 RHS = DAG.getNode(ISD::XOR, VT, RHS, N1); // RHS = ~RHS
Nate Begeman99801192005-09-07 23:25:52 +00001220 WorkList.push_back(LHS.Val); WorkList.push_back(RHS.Val);
1221 return DAG.getNode(NewOpcode, VT, LHS, RHS);
Nate Begeman1d4d4142005-09-01 00:19:25 +00001222 }
1223 }
Nate Begeman99801192005-09-07 23:25:52 +00001224 // fold !(x or y) -> (!x and !y) iff x or y are constants
1225 if (N1C && N1C->isAllOnesValue() &&
1226 (N0.getOpcode() == ISD::OR || N0.getOpcode() == ISD::AND)) {
Nate Begeman1d4d4142005-09-01 00:19:25 +00001227 SDOperand LHS = N0.getOperand(0), RHS = N0.getOperand(1);
Nate Begeman99801192005-09-07 23:25:52 +00001228 if (isa<ConstantSDNode>(RHS) || isa<ConstantSDNode>(LHS)) {
1229 unsigned NewOpcode = N0.getOpcode() == ISD::AND ? ISD::OR : ISD::AND;
Nate Begeman1d4d4142005-09-01 00:19:25 +00001230 LHS = DAG.getNode(ISD::XOR, VT, LHS, N1); // RHS = ~LHS
1231 RHS = DAG.getNode(ISD::XOR, VT, RHS, N1); // RHS = ~RHS
Nate Begeman99801192005-09-07 23:25:52 +00001232 WorkList.push_back(LHS.Val); WorkList.push_back(RHS.Val);
1233 return DAG.getNode(NewOpcode, VT, LHS, RHS);
Nate Begeman1d4d4142005-09-01 00:19:25 +00001234 }
1235 }
Nate Begeman223df222005-09-08 20:18:10 +00001236 // fold (xor (xor x, c1), c2) -> (xor x, c1^c2)
1237 if (N1C && N0.getOpcode() == ISD::XOR) {
1238 ConstantSDNode *N00C = dyn_cast<ConstantSDNode>(N0.getOperand(0));
1239 ConstantSDNode *N01C = dyn_cast<ConstantSDNode>(N0.getOperand(1));
1240 if (N00C)
1241 return DAG.getNode(ISD::XOR, VT, N0.getOperand(1),
1242 DAG.getConstant(N1C->getValue()^N00C->getValue(), VT));
1243 if (N01C)
1244 return DAG.getNode(ISD::XOR, VT, N0.getOperand(0),
1245 DAG.getConstant(N1C->getValue()^N01C->getValue(), VT));
1246 }
1247 // fold (xor x, x) -> 0
1248 if (N0 == N1)
1249 return DAG.getConstant(0, VT);
Nate Begeman39ee1ac2005-09-09 19:49:52 +00001250 // fold (xor (zext x), (zext y)) -> (zext (xor x, y))
1251 if (N0.getOpcode() == ISD::ZERO_EXTEND &&
1252 N1.getOpcode() == ISD::ZERO_EXTEND &&
1253 N0.getOperand(0).getValueType() == N1.getOperand(0).getValueType()) {
1254 SDOperand XORNode = DAG.getNode(ISD::XOR, N0.getOperand(0).getValueType(),
1255 N0.getOperand(0), N1.getOperand(0));
1256 WorkList.push_back(XORNode.Val);
1257 return DAG.getNode(ISD::ZERO_EXTEND, VT, XORNode);
1258 }
Nate Begeman750ac1b2006-02-01 07:19:44 +00001259 // fold (xor (shl/srl/sra x), (shl/srl/sra y)) -> (shl/srl/sra (xor x, y))
1260 if (((N0.getOpcode() == ISD::SHL && N1.getOpcode() == ISD::SHL) ||
1261 (N0.getOpcode() == ISD::SRL && N1.getOpcode() == ISD::SRL) ||
1262 (N0.getOpcode() == ISD::SRA && N1.getOpcode() == ISD::SRA)) &&
1263 N0.getOperand(1) == N1.getOperand(1)) {
1264 SDOperand XORNode = DAG.getNode(ISD::XOR, N0.getOperand(0).getValueType(),
1265 N0.getOperand(0), N1.getOperand(0));
1266 WorkList.push_back(XORNode.Val);
1267 return DAG.getNode(N0.getOpcode(), VT, XORNode, N0.getOperand(1));
1268 }
Nate Begeman83e75ec2005-09-06 04:43:02 +00001269 return SDOperand();
Nate Begeman1d4d4142005-09-01 00:19:25 +00001270}
1271
Nate Begeman83e75ec2005-09-06 04:43:02 +00001272SDOperand DAGCombiner::visitSHL(SDNode *N) {
Nate Begeman1d4d4142005-09-01 00:19:25 +00001273 SDOperand N0 = N->getOperand(0);
1274 SDOperand N1 = N->getOperand(1);
Nate Begeman646d7e22005-09-02 21:18:40 +00001275 ConstantSDNode *N0C = dyn_cast<ConstantSDNode>(N0);
1276 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1);
Nate Begeman1d4d4142005-09-01 00:19:25 +00001277 MVT::ValueType VT = N0.getValueType();
1278 unsigned OpSizeInBits = MVT::getSizeInBits(VT);
1279
1280 // fold (shl c1, c2) -> c1<<c2
Nate Begeman646d7e22005-09-02 21:18:40 +00001281 if (N0C && N1C)
Nate Begemana148d982006-01-18 22:35:16 +00001282 return DAG.getNode(ISD::SHL, VT, N0, N1);
Nate Begeman1d4d4142005-09-01 00:19:25 +00001283 // fold (shl 0, x) -> 0
Nate Begeman646d7e22005-09-02 21:18:40 +00001284 if (N0C && N0C->isNullValue())
Nate Begeman83e75ec2005-09-06 04:43:02 +00001285 return N0;
Nate Begeman1d4d4142005-09-01 00:19:25 +00001286 // fold (shl x, c >= size(x)) -> undef
Nate Begeman646d7e22005-09-02 21:18:40 +00001287 if (N1C && N1C->getValue() >= OpSizeInBits)
Nate Begeman83e75ec2005-09-06 04:43:02 +00001288 return DAG.getNode(ISD::UNDEF, VT);
Nate Begeman1d4d4142005-09-01 00:19:25 +00001289 // fold (shl x, 0) -> x
Nate Begeman646d7e22005-09-02 21:18:40 +00001290 if (N1C && N1C->isNullValue())
Nate Begeman83e75ec2005-09-06 04:43:02 +00001291 return N0;
Nate Begeman1d4d4142005-09-01 00:19:25 +00001292 // if (shl x, c) is known to be zero, return 0
Nate Begemanfb7217b2006-02-17 19:54:08 +00001293 if (TLI.MaskedValueIsZero(SDOperand(N, 0), MVT::getIntVTBitMask(VT)))
Nate Begeman83e75ec2005-09-06 04:43:02 +00001294 return DAG.getConstant(0, VT);
Chris Lattner012f2412006-02-17 21:58:01 +00001295 if (SimplifyDemandedBits(SDOperand(N, 0)))
Nate Begemande996292006-02-03 22:24:05 +00001296 return SDOperand();
Nate Begeman1d4d4142005-09-01 00:19:25 +00001297 // fold (shl (shl x, c1), c2) -> 0 or (shl x, c1+c2)
Nate Begeman646d7e22005-09-02 21:18:40 +00001298 if (N1C && N0.getOpcode() == ISD::SHL &&
Nate Begeman1d4d4142005-09-01 00:19:25 +00001299 N0.getOperand(1).getOpcode() == ISD::Constant) {
1300 uint64_t c1 = cast<ConstantSDNode>(N0.getOperand(1))->getValue();
Nate Begeman646d7e22005-09-02 21:18:40 +00001301 uint64_t c2 = N1C->getValue();
Nate Begeman1d4d4142005-09-01 00:19:25 +00001302 if (c1 + c2 > OpSizeInBits)
Nate Begeman83e75ec2005-09-06 04:43:02 +00001303 return DAG.getConstant(0, VT);
Nate Begeman1d4d4142005-09-01 00:19:25 +00001304 return DAG.getNode(ISD::SHL, VT, N0.getOperand(0),
Nate Begeman83e75ec2005-09-06 04:43:02 +00001305 DAG.getConstant(c1 + c2, N1.getValueType()));
Nate Begeman1d4d4142005-09-01 00:19:25 +00001306 }
1307 // fold (shl (srl x, c1), c2) -> (shl (and x, -1 << c1), c2-c1) or
1308 // (srl (and x, -1 << c1), c1-c2)
Nate Begeman646d7e22005-09-02 21:18:40 +00001309 if (N1C && N0.getOpcode() == ISD::SRL &&
Nate Begeman1d4d4142005-09-01 00:19:25 +00001310 N0.getOperand(1).getOpcode() == ISD::Constant) {
1311 uint64_t c1 = cast<ConstantSDNode>(N0.getOperand(1))->getValue();
Nate Begeman646d7e22005-09-02 21:18:40 +00001312 uint64_t c2 = N1C->getValue();
Nate Begeman1d4d4142005-09-01 00:19:25 +00001313 SDOperand Mask = DAG.getNode(ISD::AND, VT, N0.getOperand(0),
1314 DAG.getConstant(~0ULL << c1, VT));
1315 if (c2 > c1)
1316 return DAG.getNode(ISD::SHL, VT, Mask,
Nate Begeman83e75ec2005-09-06 04:43:02 +00001317 DAG.getConstant(c2-c1, N1.getValueType()));
Nate Begeman1d4d4142005-09-01 00:19:25 +00001318 else
Nate Begeman83e75ec2005-09-06 04:43:02 +00001319 return DAG.getNode(ISD::SRL, VT, Mask,
1320 DAG.getConstant(c1-c2, N1.getValueType()));
Nate Begeman1d4d4142005-09-01 00:19:25 +00001321 }
1322 // fold (shl (sra x, c1), c1) -> (and x, -1 << c1)
Nate Begeman646d7e22005-09-02 21:18:40 +00001323 if (N1C && N0.getOpcode() == ISD::SRA && N1 == N0.getOperand(1))
Nate Begeman4ebd8052005-09-01 23:24:04 +00001324 return DAG.getNode(ISD::AND, VT, N0.getOperand(0),
Nate Begeman83e75ec2005-09-06 04:43:02 +00001325 DAG.getConstant(~0ULL << N1C->getValue(), VT));
1326 return SDOperand();
Nate Begeman1d4d4142005-09-01 00:19:25 +00001327}
1328
Nate Begeman83e75ec2005-09-06 04:43:02 +00001329SDOperand DAGCombiner::visitSRA(SDNode *N) {
Nate Begeman1d4d4142005-09-01 00:19:25 +00001330 SDOperand N0 = N->getOperand(0);
1331 SDOperand N1 = N->getOperand(1);
Nate Begeman646d7e22005-09-02 21:18:40 +00001332 ConstantSDNode *N0C = dyn_cast<ConstantSDNode>(N0);
1333 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1);
Nate Begeman1d4d4142005-09-01 00:19:25 +00001334 MVT::ValueType VT = N0.getValueType();
Nate Begeman1d4d4142005-09-01 00:19:25 +00001335
1336 // fold (sra c1, c2) -> c1>>c2
Nate Begeman646d7e22005-09-02 21:18:40 +00001337 if (N0C && N1C)
Nate Begemana148d982006-01-18 22:35:16 +00001338 return DAG.getNode(ISD::SRA, VT, N0, N1);
Nate Begeman1d4d4142005-09-01 00:19:25 +00001339 // fold (sra 0, x) -> 0
Nate Begeman646d7e22005-09-02 21:18:40 +00001340 if (N0C && N0C->isNullValue())
Nate Begeman83e75ec2005-09-06 04:43:02 +00001341 return N0;
Nate Begeman1d4d4142005-09-01 00:19:25 +00001342 // fold (sra -1, x) -> -1
Nate Begeman646d7e22005-09-02 21:18:40 +00001343 if (N0C && N0C->isAllOnesValue())
Nate Begeman83e75ec2005-09-06 04:43:02 +00001344 return N0;
Nate Begeman1d4d4142005-09-01 00:19:25 +00001345 // fold (sra x, c >= size(x)) -> undef
Nate Begemanfb7217b2006-02-17 19:54:08 +00001346 if (N1C && N1C->getValue() >= MVT::getSizeInBits(VT))
Nate Begeman83e75ec2005-09-06 04:43:02 +00001347 return DAG.getNode(ISD::UNDEF, VT);
Nate Begeman1d4d4142005-09-01 00:19:25 +00001348 // fold (sra x, 0) -> x
Nate Begeman646d7e22005-09-02 21:18:40 +00001349 if (N1C && N1C->isNullValue())
Nate Begeman83e75ec2005-09-06 04:43:02 +00001350 return N0;
Nate Begemanfb7217b2006-02-17 19:54:08 +00001351 // fold (sra (shl x, c1), c1) -> sext_inreg for some c1 and target supports
1352 // sext_inreg.
1353 if (N1C && N0.getOpcode() == ISD::SHL && N1 == N0.getOperand(1)) {
1354 unsigned LowBits = MVT::getSizeInBits(VT) - (unsigned)N1C->getValue();
1355 MVT::ValueType EVT;
1356 switch (LowBits) {
1357 default: EVT = MVT::Other; break;
1358 case 1: EVT = MVT::i1; break;
1359 case 8: EVT = MVT::i8; break;
1360 case 16: EVT = MVT::i16; break;
1361 case 32: EVT = MVT::i32; break;
1362 }
1363 if (EVT > MVT::Other && TLI.isOperationLegal(ISD::SIGN_EXTEND_INREG, EVT))
1364 return DAG.getNode(ISD::SIGN_EXTEND_INREG, VT, N0.getOperand(0),
1365 DAG.getValueType(EVT));
1366 }
Chris Lattner71d9ebc2006-02-28 06:23:04 +00001367
1368 // fold (sra (sra x, c1), c2) -> (sra x, c1+c2)
1369 if (N1C && N0.getOpcode() == ISD::SRA) {
1370 if (ConstantSDNode *C1 = dyn_cast<ConstantSDNode>(N0.getOperand(1))) {
1371 unsigned Sum = N1C->getValue() + C1->getValue();
1372 if (Sum >= MVT::getSizeInBits(VT)) Sum = MVT::getSizeInBits(VT)-1;
1373 return DAG.getNode(ISD::SRA, VT, N0.getOperand(0),
1374 DAG.getConstant(Sum, N1C->getValueType(0)));
1375 }
1376 }
1377
Nate Begeman1d4d4142005-09-01 00:19:25 +00001378 // If the sign bit is known to be zero, switch this to a SRL.
Nate Begemanfb7217b2006-02-17 19:54:08 +00001379 if (TLI.MaskedValueIsZero(N0, MVT::getIntVTSignBit(VT)))
Nate Begeman83e75ec2005-09-06 04:43:02 +00001380 return DAG.getNode(ISD::SRL, VT, N0, N1);
1381 return SDOperand();
Nate Begeman1d4d4142005-09-01 00:19:25 +00001382}
1383
Nate Begeman83e75ec2005-09-06 04:43:02 +00001384SDOperand DAGCombiner::visitSRL(SDNode *N) {
Nate Begeman1d4d4142005-09-01 00:19:25 +00001385 SDOperand N0 = N->getOperand(0);
1386 SDOperand N1 = N->getOperand(1);
Nate Begeman646d7e22005-09-02 21:18:40 +00001387 ConstantSDNode *N0C = dyn_cast<ConstantSDNode>(N0);
1388 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1);
Nate Begeman1d4d4142005-09-01 00:19:25 +00001389 MVT::ValueType VT = N0.getValueType();
1390 unsigned OpSizeInBits = MVT::getSizeInBits(VT);
1391
1392 // fold (srl c1, c2) -> c1 >>u c2
Nate Begeman646d7e22005-09-02 21:18:40 +00001393 if (N0C && N1C)
Nate Begemana148d982006-01-18 22:35:16 +00001394 return DAG.getNode(ISD::SRL, VT, N0, N1);
Nate Begeman1d4d4142005-09-01 00:19:25 +00001395 // fold (srl 0, x) -> 0
Nate Begeman646d7e22005-09-02 21:18:40 +00001396 if (N0C && N0C->isNullValue())
Nate Begeman83e75ec2005-09-06 04:43:02 +00001397 return N0;
Nate Begeman1d4d4142005-09-01 00:19:25 +00001398 // fold (srl x, c >= size(x)) -> undef
Nate Begeman646d7e22005-09-02 21:18:40 +00001399 if (N1C && N1C->getValue() >= OpSizeInBits)
Nate Begeman83e75ec2005-09-06 04:43:02 +00001400 return DAG.getNode(ISD::UNDEF, VT);
Nate Begeman1d4d4142005-09-01 00:19:25 +00001401 // fold (srl x, 0) -> x
Nate Begeman646d7e22005-09-02 21:18:40 +00001402 if (N1C && N1C->isNullValue())
Nate Begeman83e75ec2005-09-06 04:43:02 +00001403 return N0;
Nate Begeman1d4d4142005-09-01 00:19:25 +00001404 // if (srl x, c) is known to be zero, return 0
Chris Lattnerc6fd6cd2006-01-30 04:09:27 +00001405 if (N1C && TLI.MaskedValueIsZero(SDOperand(N, 0), ~0ULL >> (64-OpSizeInBits)))
Nate Begeman83e75ec2005-09-06 04:43:02 +00001406 return DAG.getConstant(0, VT);
Nate Begeman1d4d4142005-09-01 00:19:25 +00001407 // fold (srl (srl x, c1), c2) -> 0 or (srl x, c1+c2)
Nate Begeman646d7e22005-09-02 21:18:40 +00001408 if (N1C && N0.getOpcode() == ISD::SRL &&
Nate Begeman1d4d4142005-09-01 00:19:25 +00001409 N0.getOperand(1).getOpcode() == ISD::Constant) {
1410 uint64_t c1 = cast<ConstantSDNode>(N0.getOperand(1))->getValue();
Nate Begeman646d7e22005-09-02 21:18:40 +00001411 uint64_t c2 = N1C->getValue();
Nate Begeman1d4d4142005-09-01 00:19:25 +00001412 if (c1 + c2 > OpSizeInBits)
Nate Begeman83e75ec2005-09-06 04:43:02 +00001413 return DAG.getConstant(0, VT);
Nate Begeman1d4d4142005-09-01 00:19:25 +00001414 return DAG.getNode(ISD::SRL, VT, N0.getOperand(0),
Nate Begeman83e75ec2005-09-06 04:43:02 +00001415 DAG.getConstant(c1 + c2, N1.getValueType()));
Nate Begeman1d4d4142005-09-01 00:19:25 +00001416 }
Nate Begeman83e75ec2005-09-06 04:43:02 +00001417 return SDOperand();
Nate Begeman1d4d4142005-09-01 00:19:25 +00001418}
1419
Nate Begeman83e75ec2005-09-06 04:43:02 +00001420SDOperand DAGCombiner::visitCTLZ(SDNode *N) {
Nate Begeman1d4d4142005-09-01 00:19:25 +00001421 SDOperand N0 = N->getOperand(0);
Nate Begeman646d7e22005-09-02 21:18:40 +00001422 ConstantSDNode *N0C = dyn_cast<ConstantSDNode>(N0);
Nate Begemana148d982006-01-18 22:35:16 +00001423 MVT::ValueType VT = N->getValueType(0);
Nate Begeman1d4d4142005-09-01 00:19:25 +00001424
1425 // fold (ctlz c1) -> c2
Nate Begeman646d7e22005-09-02 21:18:40 +00001426 if (N0C)
Nate Begemana148d982006-01-18 22:35:16 +00001427 return DAG.getNode(ISD::CTLZ, VT, N0);
Nate Begeman83e75ec2005-09-06 04:43:02 +00001428 return SDOperand();
Nate Begeman1d4d4142005-09-01 00:19:25 +00001429}
1430
Nate Begeman83e75ec2005-09-06 04:43:02 +00001431SDOperand DAGCombiner::visitCTTZ(SDNode *N) {
Nate Begeman1d4d4142005-09-01 00:19:25 +00001432 SDOperand N0 = N->getOperand(0);
Nate Begeman646d7e22005-09-02 21:18:40 +00001433 ConstantSDNode *N0C = dyn_cast<ConstantSDNode>(N0);
Nate Begemana148d982006-01-18 22:35:16 +00001434 MVT::ValueType VT = N->getValueType(0);
Nate Begeman1d4d4142005-09-01 00:19:25 +00001435
1436 // fold (cttz c1) -> c2
Nate Begeman646d7e22005-09-02 21:18:40 +00001437 if (N0C)
Nate Begemana148d982006-01-18 22:35:16 +00001438 return DAG.getNode(ISD::CTTZ, VT, N0);
Nate Begeman83e75ec2005-09-06 04:43:02 +00001439 return SDOperand();
Nate Begeman1d4d4142005-09-01 00:19:25 +00001440}
1441
Nate Begeman83e75ec2005-09-06 04:43:02 +00001442SDOperand DAGCombiner::visitCTPOP(SDNode *N) {
Nate Begeman1d4d4142005-09-01 00:19:25 +00001443 SDOperand N0 = N->getOperand(0);
Nate Begeman646d7e22005-09-02 21:18:40 +00001444 ConstantSDNode *N0C = dyn_cast<ConstantSDNode>(N0);
Nate Begemana148d982006-01-18 22:35:16 +00001445 MVT::ValueType VT = N->getValueType(0);
Nate Begeman1d4d4142005-09-01 00:19:25 +00001446
1447 // fold (ctpop c1) -> c2
Nate Begeman646d7e22005-09-02 21:18:40 +00001448 if (N0C)
Nate Begemana148d982006-01-18 22:35:16 +00001449 return DAG.getNode(ISD::CTPOP, VT, N0);
Nate Begeman83e75ec2005-09-06 04:43:02 +00001450 return SDOperand();
Nate Begeman1d4d4142005-09-01 00:19:25 +00001451}
1452
Nate Begeman452d7be2005-09-16 00:54:12 +00001453SDOperand DAGCombiner::visitSELECT(SDNode *N) {
1454 SDOperand N0 = N->getOperand(0);
1455 SDOperand N1 = N->getOperand(1);
1456 SDOperand N2 = N->getOperand(2);
1457 ConstantSDNode *N0C = dyn_cast<ConstantSDNode>(N0);
1458 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1);
1459 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2);
1460 MVT::ValueType VT = N->getValueType(0);
Nate Begeman44728a72005-09-19 22:34:01 +00001461
Nate Begeman452d7be2005-09-16 00:54:12 +00001462 // fold select C, X, X -> X
1463 if (N1 == N2)
1464 return N1;
1465 // fold select true, X, Y -> X
1466 if (N0C && !N0C->isNullValue())
1467 return N1;
1468 // fold select false, X, Y -> Y
1469 if (N0C && N0C->isNullValue())
1470 return N2;
1471 // fold select C, 1, X -> C | X
Nate Begeman44728a72005-09-19 22:34:01 +00001472 if (MVT::i1 == VT && N1C && N1C->getValue() == 1)
Nate Begeman452d7be2005-09-16 00:54:12 +00001473 return DAG.getNode(ISD::OR, VT, N0, N2);
1474 // fold select C, 0, X -> ~C & X
1475 // FIXME: this should check for C type == X type, not i1?
1476 if (MVT::i1 == VT && N1C && N1C->isNullValue()) {
1477 SDOperand XORNode = DAG.getNode(ISD::XOR, VT, N0, DAG.getConstant(1, VT));
1478 WorkList.push_back(XORNode.Val);
1479 return DAG.getNode(ISD::AND, VT, XORNode, N2);
1480 }
1481 // fold select C, X, 1 -> ~C | X
Nate Begeman44728a72005-09-19 22:34:01 +00001482 if (MVT::i1 == VT && N2C && N2C->getValue() == 1) {
Nate Begeman452d7be2005-09-16 00:54:12 +00001483 SDOperand XORNode = DAG.getNode(ISD::XOR, VT, N0, DAG.getConstant(1, VT));
1484 WorkList.push_back(XORNode.Val);
1485 return DAG.getNode(ISD::OR, VT, XORNode, N1);
1486 }
1487 // fold select C, X, 0 -> C & X
1488 // FIXME: this should check for C type == X type, not i1?
1489 if (MVT::i1 == VT && N2C && N2C->isNullValue())
1490 return DAG.getNode(ISD::AND, VT, N0, N1);
1491 // fold X ? X : Y --> X ? 1 : Y --> X | Y
1492 if (MVT::i1 == VT && N0 == N1)
1493 return DAG.getNode(ISD::OR, VT, N0, N2);
1494 // fold X ? Y : X --> X ? Y : 0 --> X & Y
1495 if (MVT::i1 == VT && N0 == N2)
1496 return DAG.getNode(ISD::AND, VT, N0, N1);
Chris Lattner40c62d52005-10-18 06:04:22 +00001497 // If we can fold this based on the true/false value, do so.
1498 if (SimplifySelectOps(N, N1, N2))
1499 return SDOperand();
Nate Begeman44728a72005-09-19 22:34:01 +00001500 // fold selects based on a setcc into other things, such as min/max/abs
1501 if (N0.getOpcode() == ISD::SETCC)
Nate Begeman750ac1b2006-02-01 07:19:44 +00001502 // FIXME:
1503 // Check against MVT::Other for SELECT_CC, which is a workaround for targets
1504 // having to say they don't support SELECT_CC on every type the DAG knows
1505 // about, since there is no way to mark an opcode illegal at all value types
1506 if (TLI.isOperationLegal(ISD::SELECT_CC, MVT::Other))
1507 return DAG.getNode(ISD::SELECT_CC, VT, N0.getOperand(0), N0.getOperand(1),
1508 N1, N2, N0.getOperand(2));
1509 else
1510 return SimplifySelect(N0, N1, N2);
Nate Begeman452d7be2005-09-16 00:54:12 +00001511 return SDOperand();
1512}
1513
1514SDOperand DAGCombiner::visitSELECT_CC(SDNode *N) {
Nate Begeman44728a72005-09-19 22:34:01 +00001515 SDOperand N0 = N->getOperand(0);
1516 SDOperand N1 = N->getOperand(1);
1517 SDOperand N2 = N->getOperand(2);
1518 SDOperand N3 = N->getOperand(3);
1519 SDOperand N4 = N->getOperand(4);
1520 ConstantSDNode *N0C = dyn_cast<ConstantSDNode>(N0);
1521 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1);
1522 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2);
1523 ISD::CondCode CC = cast<CondCodeSDNode>(N4)->get();
1524
1525 // Determine if the condition we're dealing with is constant
Nate Begemane17daeb2005-10-05 21:43:42 +00001526 SDOperand SCC = SimplifySetCC(TLI.getSetCCResultTy(), N0, N1, CC, false);
Chris Lattner91559022005-10-05 04:45:43 +00001527 ConstantSDNode *SCCC = dyn_cast_or_null<ConstantSDNode>(SCC.Val);
1528
Nate Begeman44728a72005-09-19 22:34:01 +00001529 // fold select_cc lhs, rhs, x, x, cc -> x
1530 if (N2 == N3)
1531 return N2;
Chris Lattner40c62d52005-10-18 06:04:22 +00001532
1533 // If we can fold this based on the true/false value, do so.
1534 if (SimplifySelectOps(N, N2, N3))
1535 return SDOperand();
1536
Nate Begeman44728a72005-09-19 22:34:01 +00001537 // fold select_cc into other things, such as min/max/abs
1538 return SimplifySelectCC(N0, N1, N2, N3, CC);
Nate Begeman452d7be2005-09-16 00:54:12 +00001539}
1540
1541SDOperand DAGCombiner::visitSETCC(SDNode *N) {
1542 return SimplifySetCC(N->getValueType(0), N->getOperand(0), N->getOperand(1),
1543 cast<CondCodeSDNode>(N->getOperand(2))->get());
1544}
1545
Nate Begeman83e75ec2005-09-06 04:43:02 +00001546SDOperand DAGCombiner::visitSIGN_EXTEND(SDNode *N) {
Nate Begeman1d4d4142005-09-01 00:19:25 +00001547 SDOperand N0 = N->getOperand(0);
Nate Begeman646d7e22005-09-02 21:18:40 +00001548 ConstantSDNode *N0C = dyn_cast<ConstantSDNode>(N0);
Nate Begeman1d4d4142005-09-01 00:19:25 +00001549 MVT::ValueType VT = N->getValueType(0);
1550
Nate Begeman1d4d4142005-09-01 00:19:25 +00001551 // fold (sext c1) -> c1
Nate Begeman646d7e22005-09-02 21:18:40 +00001552 if (N0C)
Nate Begemana148d982006-01-18 22:35:16 +00001553 return DAG.getNode(ISD::SIGN_EXTEND, VT, N0);
Nate Begeman1d4d4142005-09-01 00:19:25 +00001554 // fold (sext (sext x)) -> (sext x)
1555 if (N0.getOpcode() == ISD::SIGN_EXTEND)
Nate Begeman83e75ec2005-09-06 04:43:02 +00001556 return DAG.getNode(ISD::SIGN_EXTEND, VT, N0.getOperand(0));
Chris Lattnerb14ab8a2005-12-07 07:11:03 +00001557 // fold (sext (truncate x)) -> (sextinreg x) iff x size == sext size.
Chris Lattnercc2210b2005-12-07 18:02:05 +00001558 if (N0.getOpcode() == ISD::TRUNCATE && N0.getOperand(0).getValueType() == VT&&
1559 (!AfterLegalize ||
1560 TLI.isOperationLegal(ISD::SIGN_EXTEND_INREG, N0.getValueType())))
Chris Lattnerb14ab8a2005-12-07 07:11:03 +00001561 return DAG.getNode(ISD::SIGN_EXTEND_INREG, VT, N0.getOperand(0),
1562 DAG.getValueType(N0.getValueType()));
Evan Cheng110dec22005-12-14 02:19:23 +00001563 // fold (sext (load x)) -> (sext (truncate (sextload x)))
Chris Lattnerd0f6d182005-12-15 19:02:38 +00001564 if (N0.getOpcode() == ISD::LOAD && N0.hasOneUse() &&
1565 (!AfterLegalize||TLI.isOperationLegal(ISD::SEXTLOAD, N0.getValueType()))){
Nate Begeman3df4d522005-10-12 20:40:40 +00001566 SDOperand ExtLoad = DAG.getExtLoad(ISD::SEXTLOAD, VT, N0.getOperand(0),
1567 N0.getOperand(1), N0.getOperand(2),
1568 N0.getValueType());
Chris Lattnerd4771842005-12-14 19:25:30 +00001569 CombineTo(N, ExtLoad);
Chris Lattnerf9884052005-10-13 21:52:31 +00001570 CombineTo(N0.Val, DAG.getNode(ISD::TRUNCATE, N0.getValueType(), ExtLoad),
1571 ExtLoad.getValue(1));
Nate Begeman765784a2005-10-12 23:18:53 +00001572 return SDOperand();
Nate Begeman3df4d522005-10-12 20:40:40 +00001573 }
Chris Lattnerad25d4e2005-12-14 19:05:06 +00001574
1575 // fold (sext (sextload x)) -> (sext (truncate (sextload x)))
1576 // fold (sext ( extload x)) -> (sext (truncate (sextload x)))
1577 if ((N0.getOpcode() == ISD::SEXTLOAD || N0.getOpcode() == ISD::EXTLOAD) &&
1578 N0.hasOneUse()) {
1579 SDOperand ExtLoad = DAG.getNode(ISD::SEXTLOAD, VT, N0.getOperand(0),
1580 N0.getOperand(1), N0.getOperand(2),
1581 N0.getOperand(3));
Chris Lattnerd4771842005-12-14 19:25:30 +00001582 CombineTo(N, ExtLoad);
Chris Lattnerad25d4e2005-12-14 19:05:06 +00001583 CombineTo(N0.Val, DAG.getNode(ISD::TRUNCATE, N0.getValueType(), ExtLoad),
1584 ExtLoad.getValue(1));
1585 return SDOperand();
1586 }
1587
Nate Begeman83e75ec2005-09-06 04:43:02 +00001588 return SDOperand();
Nate Begeman1d4d4142005-09-01 00:19:25 +00001589}
1590
Nate Begeman83e75ec2005-09-06 04:43:02 +00001591SDOperand DAGCombiner::visitZERO_EXTEND(SDNode *N) {
Nate Begeman1d4d4142005-09-01 00:19:25 +00001592 SDOperand N0 = N->getOperand(0);
Nate Begeman646d7e22005-09-02 21:18:40 +00001593 ConstantSDNode *N0C = dyn_cast<ConstantSDNode>(N0);
Nate Begeman1d4d4142005-09-01 00:19:25 +00001594 MVT::ValueType VT = N->getValueType(0);
1595
Nate Begeman1d4d4142005-09-01 00:19:25 +00001596 // fold (zext c1) -> c1
Nate Begeman646d7e22005-09-02 21:18:40 +00001597 if (N0C)
Nate Begemana148d982006-01-18 22:35:16 +00001598 return DAG.getNode(ISD::ZERO_EXTEND, VT, N0);
Nate Begeman1d4d4142005-09-01 00:19:25 +00001599 // fold (zext (zext x)) -> (zext x)
1600 if (N0.getOpcode() == ISD::ZERO_EXTEND)
Nate Begeman83e75ec2005-09-06 04:43:02 +00001601 return DAG.getNode(ISD::ZERO_EXTEND, VT, N0.getOperand(0));
Evan Cheng110dec22005-12-14 02:19:23 +00001602 // fold (zext (truncate x)) -> (zextinreg x) iff x size == zext size.
1603 if (N0.getOpcode() == ISD::TRUNCATE && N0.getOperand(0).getValueType() == VT&&
Chris Lattnerad25d4e2005-12-14 19:05:06 +00001604 (!AfterLegalize || TLI.isOperationLegal(ISD::AND, N0.getValueType())))
Chris Lattner00cb95c2005-12-14 07:58:38 +00001605 return DAG.getZeroExtendInReg(N0.getOperand(0), N0.getValueType());
Evan Cheng110dec22005-12-14 02:19:23 +00001606 // fold (zext (load x)) -> (zext (truncate (zextload x)))
Chris Lattnerd0f6d182005-12-15 19:02:38 +00001607 if (N0.getOpcode() == ISD::LOAD && N0.hasOneUse() &&
1608 (!AfterLegalize||TLI.isOperationLegal(ISD::ZEXTLOAD, N0.getValueType()))){
Evan Cheng110dec22005-12-14 02:19:23 +00001609 SDOperand ExtLoad = DAG.getExtLoad(ISD::ZEXTLOAD, VT, N0.getOperand(0),
1610 N0.getOperand(1), N0.getOperand(2),
1611 N0.getValueType());
Chris Lattnerd4771842005-12-14 19:25:30 +00001612 CombineTo(N, ExtLoad);
Evan Cheng110dec22005-12-14 02:19:23 +00001613 CombineTo(N0.Val, DAG.getNode(ISD::TRUNCATE, N0.getValueType(), ExtLoad),
1614 ExtLoad.getValue(1));
1615 return SDOperand();
1616 }
Chris Lattnerad25d4e2005-12-14 19:05:06 +00001617
1618 // fold (zext (zextload x)) -> (zext (truncate (zextload x)))
1619 // fold (zext ( extload x)) -> (zext (truncate (zextload x)))
1620 if ((N0.getOpcode() == ISD::ZEXTLOAD || N0.getOpcode() == ISD::EXTLOAD) &&
1621 N0.hasOneUse()) {
1622 SDOperand ExtLoad = DAG.getNode(ISD::ZEXTLOAD, VT, N0.getOperand(0),
1623 N0.getOperand(1), N0.getOperand(2),
1624 N0.getOperand(3));
Chris Lattnerd4771842005-12-14 19:25:30 +00001625 CombineTo(N, ExtLoad);
Chris Lattnerad25d4e2005-12-14 19:05:06 +00001626 CombineTo(N0.Val, DAG.getNode(ISD::TRUNCATE, N0.getValueType(), ExtLoad),
1627 ExtLoad.getValue(1));
1628 return SDOperand();
1629 }
Nate Begeman83e75ec2005-09-06 04:43:02 +00001630 return SDOperand();
Nate Begeman1d4d4142005-09-01 00:19:25 +00001631}
1632
Nate Begeman83e75ec2005-09-06 04:43:02 +00001633SDOperand DAGCombiner::visitSIGN_EXTEND_INREG(SDNode *N) {
Nate Begeman1d4d4142005-09-01 00:19:25 +00001634 SDOperand N0 = N->getOperand(0);
Nate Begeman646d7e22005-09-02 21:18:40 +00001635 SDOperand N1 = N->getOperand(1);
Nate Begeman646d7e22005-09-02 21:18:40 +00001636 ConstantSDNode *N0C = dyn_cast<ConstantSDNode>(N0);
Nate Begeman1d4d4142005-09-01 00:19:25 +00001637 MVT::ValueType VT = N->getValueType(0);
Nate Begeman646d7e22005-09-02 21:18:40 +00001638 MVT::ValueType EVT = cast<VTSDNode>(N1)->getVT();
Nate Begeman07ed4172005-10-10 21:26:48 +00001639 unsigned EVTBits = MVT::getSizeInBits(EVT);
Nate Begeman1d4d4142005-09-01 00:19:25 +00001640
Nate Begeman1d4d4142005-09-01 00:19:25 +00001641 // fold (sext_in_reg c1) -> c1
Nate Begeman646d7e22005-09-02 21:18:40 +00001642 if (N0C) {
1643 SDOperand Truncate = DAG.getConstant(N0C->getValue(), EVT);
Nate Begeman83e75ec2005-09-06 04:43:02 +00001644 return DAG.getNode(ISD::SIGN_EXTEND, VT, Truncate);
Nate Begeman1d4d4142005-09-01 00:19:25 +00001645 }
Nate Begeman646d7e22005-09-02 21:18:40 +00001646 // fold (sext_in_reg (sext_in_reg x, VT2), VT1) -> (sext_in_reg x, minVT) pt1
Nate Begeman1d4d4142005-09-01 00:19:25 +00001647 if (N0.getOpcode() == ISD::SIGN_EXTEND_INREG &&
Nate Begeman216def82005-10-14 01:29:07 +00001648 cast<VTSDNode>(N0.getOperand(1))->getVT() <= EVT) {
Nate Begeman83e75ec2005-09-06 04:43:02 +00001649 return N0;
Nate Begeman1d4d4142005-09-01 00:19:25 +00001650 }
Nate Begeman646d7e22005-09-02 21:18:40 +00001651 // fold (sext_in_reg (sext_in_reg x, VT2), VT1) -> (sext_in_reg x, minVT) pt2
1652 if (N0.getOpcode() == ISD::SIGN_EXTEND_INREG &&
1653 EVT < cast<VTSDNode>(N0.getOperand(1))->getVT()) {
Nate Begeman83e75ec2005-09-06 04:43:02 +00001654 return DAG.getNode(ISD::SIGN_EXTEND_INREG, VT, N0.getOperand(0), N1);
Nate Begeman646d7e22005-09-02 21:18:40 +00001655 }
Nate Begeman1d4d4142005-09-01 00:19:25 +00001656 // fold (sext_in_reg (assert_sext x)) -> (assert_sext x)
1657 if (N0.getOpcode() == ISD::AssertSext &&
1658 cast<VTSDNode>(N0.getOperand(1))->getVT() <= EVT) {
Nate Begeman83e75ec2005-09-06 04:43:02 +00001659 return N0;
Nate Begeman1d4d4142005-09-01 00:19:25 +00001660 }
1661 // fold (sext_in_reg (sextload x)) -> (sextload x)
1662 if (N0.getOpcode() == ISD::SEXTLOAD &&
1663 cast<VTSDNode>(N0.getOperand(3))->getVT() <= EVT) {
Nate Begeman83e75ec2005-09-06 04:43:02 +00001664 return N0;
Nate Begeman1d4d4142005-09-01 00:19:25 +00001665 }
Nate Begeman4ebd8052005-09-01 23:24:04 +00001666 // fold (sext_in_reg (setcc x)) -> setcc x iff (setcc x) == 0 or -1
Nate Begeman1d4d4142005-09-01 00:19:25 +00001667 if (N0.getOpcode() == ISD::SETCC &&
1668 TLI.getSetCCResultContents() ==
1669 TargetLowering::ZeroOrNegativeOneSetCCResult)
Nate Begeman83e75ec2005-09-06 04:43:02 +00001670 return N0;
Nate Begeman07ed4172005-10-10 21:26:48 +00001671 // fold (sext_in_reg x) -> (zext_in_reg x) if the sign bit is zero
Chris Lattnerc6fd6cd2006-01-30 04:09:27 +00001672 if (TLI.MaskedValueIsZero(N0, 1ULL << (EVTBits-1)))
Nate Begemande996292006-02-03 22:24:05 +00001673 return DAG.getZeroExtendInReg(N0, EVT);
Nate Begeman07ed4172005-10-10 21:26:48 +00001674 // fold (sext_in_reg (srl x)) -> sra x
1675 if (N0.getOpcode() == ISD::SRL &&
1676 N0.getOperand(1).getOpcode() == ISD::Constant &&
1677 cast<ConstantSDNode>(N0.getOperand(1))->getValue() == EVTBits) {
1678 return DAG.getNode(ISD::SRA, N0.getValueType(), N0.getOperand(0),
1679 N0.getOperand(1));
Nate Begeman1d4d4142005-09-01 00:19:25 +00001680 }
Nate Begemanded49632005-10-13 03:11:28 +00001681 // fold (sext_inreg (extload x)) -> (sextload x)
1682 if (N0.getOpcode() == ISD::EXTLOAD &&
1683 EVT == cast<VTSDNode>(N0.getOperand(3))->getVT() &&
Nate Begemanbfd65a02005-10-13 18:34:58 +00001684 (!AfterLegalize || TLI.isOperationLegal(ISD::SEXTLOAD, EVT))) {
Nate Begemanded49632005-10-13 03:11:28 +00001685 SDOperand ExtLoad = DAG.getExtLoad(ISD::SEXTLOAD, VT, N0.getOperand(0),
1686 N0.getOperand(1), N0.getOperand(2),
1687 EVT);
Chris Lattnerd4771842005-12-14 19:25:30 +00001688 CombineTo(N, ExtLoad);
Nate Begemanbfd65a02005-10-13 18:34:58 +00001689 CombineTo(N0.Val, ExtLoad, ExtLoad.getValue(1));
Nate Begemanded49632005-10-13 03:11:28 +00001690 return SDOperand();
1691 }
1692 // fold (sext_inreg (zextload x)) -> (sextload x) iff load has one use
Chris Lattner40c62d52005-10-18 06:04:22 +00001693 if (N0.getOpcode() == ISD::ZEXTLOAD && N0.hasOneUse() &&
Nate Begemanded49632005-10-13 03:11:28 +00001694 EVT == cast<VTSDNode>(N0.getOperand(3))->getVT() &&
Nate Begemanbfd65a02005-10-13 18:34:58 +00001695 (!AfterLegalize || TLI.isOperationLegal(ISD::SEXTLOAD, EVT))) {
Nate Begemanded49632005-10-13 03:11:28 +00001696 SDOperand ExtLoad = DAG.getExtLoad(ISD::SEXTLOAD, VT, N0.getOperand(0),
1697 N0.getOperand(1), N0.getOperand(2),
1698 EVT);
Chris Lattnerd4771842005-12-14 19:25:30 +00001699 CombineTo(N, ExtLoad);
Nate Begemanbfd65a02005-10-13 18:34:58 +00001700 CombineTo(N0.Val, ExtLoad, ExtLoad.getValue(1));
Nate Begemanded49632005-10-13 03:11:28 +00001701 return SDOperand();
1702 }
Nate Begeman83e75ec2005-09-06 04:43:02 +00001703 return SDOperand();
Nate Begeman1d4d4142005-09-01 00:19:25 +00001704}
1705
Nate Begeman83e75ec2005-09-06 04:43:02 +00001706SDOperand DAGCombiner::visitTRUNCATE(SDNode *N) {
Nate Begeman1d4d4142005-09-01 00:19:25 +00001707 SDOperand N0 = N->getOperand(0);
Nate Begeman646d7e22005-09-02 21:18:40 +00001708 ConstantSDNode *N0C = dyn_cast<ConstantSDNode>(N0);
Nate Begeman1d4d4142005-09-01 00:19:25 +00001709 MVT::ValueType VT = N->getValueType(0);
1710
1711 // noop truncate
1712 if (N0.getValueType() == N->getValueType(0))
Nate Begeman83e75ec2005-09-06 04:43:02 +00001713 return N0;
Nate Begeman1d4d4142005-09-01 00:19:25 +00001714 // fold (truncate c1) -> c1
Nate Begeman646d7e22005-09-02 21:18:40 +00001715 if (N0C)
Nate Begemana148d982006-01-18 22:35:16 +00001716 return DAG.getNode(ISD::TRUNCATE, VT, N0);
Nate Begeman1d4d4142005-09-01 00:19:25 +00001717 // fold (truncate (truncate x)) -> (truncate x)
1718 if (N0.getOpcode() == ISD::TRUNCATE)
Nate Begeman83e75ec2005-09-06 04:43:02 +00001719 return DAG.getNode(ISD::TRUNCATE, VT, N0.getOperand(0));
Nate Begeman1d4d4142005-09-01 00:19:25 +00001720 // fold (truncate (ext x)) -> (ext x) or (truncate x) or x
1721 if (N0.getOpcode() == ISD::ZERO_EXTEND || N0.getOpcode() == ISD::SIGN_EXTEND){
1722 if (N0.getValueType() < VT)
1723 // if the source is smaller than the dest, we still need an extend
Nate Begeman83e75ec2005-09-06 04:43:02 +00001724 return DAG.getNode(N0.getOpcode(), VT, N0.getOperand(0));
Nate Begeman1d4d4142005-09-01 00:19:25 +00001725 else if (N0.getValueType() > VT)
1726 // if the source is larger than the dest, than we just need the truncate
Nate Begeman83e75ec2005-09-06 04:43:02 +00001727 return DAG.getNode(ISD::TRUNCATE, VT, N0.getOperand(0));
Nate Begeman1d4d4142005-09-01 00:19:25 +00001728 else
1729 // if the source and dest are the same type, we can drop both the extend
1730 // and the truncate
Nate Begeman83e75ec2005-09-06 04:43:02 +00001731 return N0.getOperand(0);
Nate Begeman1d4d4142005-09-01 00:19:25 +00001732 }
Nate Begeman3df4d522005-10-12 20:40:40 +00001733 // fold (truncate (load x)) -> (smaller load x)
Chris Lattner40c62d52005-10-18 06:04:22 +00001734 if (N0.getOpcode() == ISD::LOAD && N0.hasOneUse()) {
Nate Begeman3df4d522005-10-12 20:40:40 +00001735 assert(MVT::getSizeInBits(N0.getValueType()) > MVT::getSizeInBits(VT) &&
1736 "Cannot truncate to larger type!");
1737 MVT::ValueType PtrType = N0.getOperand(1).getValueType();
Nate Begeman765784a2005-10-12 23:18:53 +00001738 // For big endian targets, we need to add an offset to the pointer to load
1739 // the correct bytes. For little endian systems, we merely need to read
1740 // fewer bytes from the same pointer.
Nate Begeman3df4d522005-10-12 20:40:40 +00001741 uint64_t PtrOff =
1742 (MVT::getSizeInBits(N0.getValueType()) - MVT::getSizeInBits(VT)) / 8;
Nate Begeman765784a2005-10-12 23:18:53 +00001743 SDOperand NewPtr = TLI.isLittleEndian() ? N0.getOperand(1) :
1744 DAG.getNode(ISD::ADD, PtrType, N0.getOperand(1),
1745 DAG.getConstant(PtrOff, PtrType));
1746 WorkList.push_back(NewPtr.Val);
Nate Begeman3df4d522005-10-12 20:40:40 +00001747 SDOperand Load = DAG.getLoad(VT, N0.getOperand(0), NewPtr,N0.getOperand(2));
Nate Begeman765784a2005-10-12 23:18:53 +00001748 WorkList.push_back(N);
Chris Lattner24edbb72005-10-13 22:10:05 +00001749 CombineTo(N0.Val, Load, Load.getValue(1));
Nate Begeman765784a2005-10-12 23:18:53 +00001750 return SDOperand();
Nate Begeman3df4d522005-10-12 20:40:40 +00001751 }
Nate Begeman83e75ec2005-09-06 04:43:02 +00001752 return SDOperand();
Nate Begeman1d4d4142005-09-01 00:19:25 +00001753}
1754
Chris Lattner94683772005-12-23 05:30:37 +00001755SDOperand DAGCombiner::visitBIT_CONVERT(SDNode *N) {
1756 SDOperand N0 = N->getOperand(0);
1757 MVT::ValueType VT = N->getValueType(0);
1758
1759 // If the input is a constant, let getNode() fold it.
1760 if (isa<ConstantSDNode>(N0) || isa<ConstantFPSDNode>(N0)) {
1761 SDOperand Res = DAG.getNode(ISD::BIT_CONVERT, VT, N0);
1762 if (Res.Val != N) return Res;
1763 }
1764
Chris Lattnerc8547d82005-12-23 05:37:50 +00001765 if (N0.getOpcode() == ISD::BIT_CONVERT) // conv(conv(x,t1),t2) -> conv(x,t2)
1766 return DAG.getNode(ISD::BIT_CONVERT, VT, N0.getOperand(0));
1767
Chris Lattner57104102005-12-23 05:44:41 +00001768 // fold (conv (load x)) -> (load (conv*)x)
Chris Lattnerbf40c4b2006-01-15 18:58:59 +00001769 // FIXME: These xforms need to know that the resultant load doesn't need a
1770 // higher alignment than the original!
1771 if (0 && N0.getOpcode() == ISD::LOAD && N0.hasOneUse()) {
Chris Lattner57104102005-12-23 05:44:41 +00001772 SDOperand Load = DAG.getLoad(VT, N0.getOperand(0), N0.getOperand(1),
1773 N0.getOperand(2));
1774 WorkList.push_back(N);
1775 CombineTo(N0.Val, DAG.getNode(ISD::BIT_CONVERT, N0.getValueType(), Load),
1776 Load.getValue(1));
1777 return Load;
1778 }
1779
Chris Lattner94683772005-12-23 05:30:37 +00001780 return SDOperand();
1781}
1782
Chris Lattner01b3d732005-09-28 22:28:18 +00001783SDOperand DAGCombiner::visitFADD(SDNode *N) {
1784 SDOperand N0 = N->getOperand(0);
1785 SDOperand N1 = N->getOperand(1);
Nate Begemana0e221d2005-10-18 00:28:13 +00001786 ConstantFPSDNode *N0CFP = dyn_cast<ConstantFPSDNode>(N0);
1787 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1);
Chris Lattner01b3d732005-09-28 22:28:18 +00001788 MVT::ValueType VT = N->getValueType(0);
Nate Begemana0e221d2005-10-18 00:28:13 +00001789
1790 // fold (fadd c1, c2) -> c1+c2
1791 if (N0CFP && N1CFP)
Nate Begemana148d982006-01-18 22:35:16 +00001792 return DAG.getNode(ISD::FADD, VT, N0, N1);
Nate Begemana0e221d2005-10-18 00:28:13 +00001793 // canonicalize constant to RHS
1794 if (N0CFP && !N1CFP)
1795 return DAG.getNode(ISD::FADD, VT, N1, N0);
Chris Lattner01b3d732005-09-28 22:28:18 +00001796 // fold (A + (-B)) -> A-B
1797 if (N1.getOpcode() == ISD::FNEG)
1798 return DAG.getNode(ISD::FSUB, VT, N0, N1.getOperand(0));
Chris Lattner01b3d732005-09-28 22:28:18 +00001799 // fold ((-A) + B) -> B-A
1800 if (N0.getOpcode() == ISD::FNEG)
1801 return DAG.getNode(ISD::FSUB, VT, N1, N0.getOperand(0));
Chris Lattner01b3d732005-09-28 22:28:18 +00001802 return SDOperand();
1803}
1804
1805SDOperand DAGCombiner::visitFSUB(SDNode *N) {
1806 SDOperand N0 = N->getOperand(0);
1807 SDOperand N1 = N->getOperand(1);
Nate Begemana0e221d2005-10-18 00:28:13 +00001808 ConstantFPSDNode *N0CFP = dyn_cast<ConstantFPSDNode>(N0);
1809 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1);
Chris Lattner01b3d732005-09-28 22:28:18 +00001810 MVT::ValueType VT = N->getValueType(0);
Nate Begemana0e221d2005-10-18 00:28:13 +00001811
1812 // fold (fsub c1, c2) -> c1-c2
1813 if (N0CFP && N1CFP)
Nate Begemana148d982006-01-18 22:35:16 +00001814 return DAG.getNode(ISD::FSUB, VT, N0, N1);
Chris Lattner01b3d732005-09-28 22:28:18 +00001815 // fold (A-(-B)) -> A+B
1816 if (N1.getOpcode() == ISD::FNEG)
Nate Begemana148d982006-01-18 22:35:16 +00001817 return DAG.getNode(ISD::FADD, VT, N0, N1.getOperand(0));
Chris Lattner01b3d732005-09-28 22:28:18 +00001818 return SDOperand();
1819}
1820
1821SDOperand DAGCombiner::visitFMUL(SDNode *N) {
1822 SDOperand N0 = N->getOperand(0);
1823 SDOperand N1 = N->getOperand(1);
Nate Begeman11af4ea2005-10-17 20:40:11 +00001824 ConstantFPSDNode *N0CFP = dyn_cast<ConstantFPSDNode>(N0);
1825 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1);
Chris Lattner01b3d732005-09-28 22:28:18 +00001826 MVT::ValueType VT = N->getValueType(0);
1827
Nate Begeman11af4ea2005-10-17 20:40:11 +00001828 // fold (fmul c1, c2) -> c1*c2
1829 if (N0CFP && N1CFP)
Nate Begemana148d982006-01-18 22:35:16 +00001830 return DAG.getNode(ISD::FMUL, VT, N0, N1);
Nate Begeman11af4ea2005-10-17 20:40:11 +00001831 // canonicalize constant to RHS
Nate Begemana0e221d2005-10-18 00:28:13 +00001832 if (N0CFP && !N1CFP)
1833 return DAG.getNode(ISD::FMUL, VT, N1, N0);
Nate Begeman11af4ea2005-10-17 20:40:11 +00001834 // fold (fmul X, 2.0) -> (fadd X, X)
1835 if (N1CFP && N1CFP->isExactlyValue(+2.0))
1836 return DAG.getNode(ISD::FADD, VT, N0, N0);
Chris Lattner01b3d732005-09-28 22:28:18 +00001837 return SDOperand();
1838}
1839
1840SDOperand DAGCombiner::visitFDIV(SDNode *N) {
1841 SDOperand N0 = N->getOperand(0);
1842 SDOperand N1 = N->getOperand(1);
Nate Begemana148d982006-01-18 22:35:16 +00001843 ConstantFPSDNode *N0CFP = dyn_cast<ConstantFPSDNode>(N0);
1844 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1);
Chris Lattner01b3d732005-09-28 22:28:18 +00001845 MVT::ValueType VT = N->getValueType(0);
1846
Nate Begemana148d982006-01-18 22:35:16 +00001847 // fold (fdiv c1, c2) -> c1/c2
1848 if (N0CFP && N1CFP)
1849 return DAG.getNode(ISD::FDIV, VT, N0, N1);
Chris Lattner01b3d732005-09-28 22:28:18 +00001850 return SDOperand();
1851}
1852
1853SDOperand DAGCombiner::visitFREM(SDNode *N) {
1854 SDOperand N0 = N->getOperand(0);
1855 SDOperand N1 = N->getOperand(1);
Nate Begemana148d982006-01-18 22:35:16 +00001856 ConstantFPSDNode *N0CFP = dyn_cast<ConstantFPSDNode>(N0);
1857 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1);
Chris Lattner01b3d732005-09-28 22:28:18 +00001858 MVT::ValueType VT = N->getValueType(0);
1859
Nate Begemana148d982006-01-18 22:35:16 +00001860 // fold (frem c1, c2) -> fmod(c1,c2)
1861 if (N0CFP && N1CFP)
1862 return DAG.getNode(ISD::FREM, VT, N0, N1);
Chris Lattner01b3d732005-09-28 22:28:18 +00001863 return SDOperand();
1864}
1865
1866
Nate Begeman83e75ec2005-09-06 04:43:02 +00001867SDOperand DAGCombiner::visitSINT_TO_FP(SDNode *N) {
Nate Begeman1d4d4142005-09-01 00:19:25 +00001868 SDOperand N0 = N->getOperand(0);
Nate Begeman646d7e22005-09-02 21:18:40 +00001869 ConstantSDNode *N0C = dyn_cast<ConstantSDNode>(N0);
Nate Begemana148d982006-01-18 22:35:16 +00001870 MVT::ValueType VT = N->getValueType(0);
Nate Begeman1d4d4142005-09-01 00:19:25 +00001871
1872 // fold (sint_to_fp c1) -> c1fp
Nate Begeman646d7e22005-09-02 21:18:40 +00001873 if (N0C)
Nate Begemana148d982006-01-18 22:35:16 +00001874 return DAG.getNode(ISD::SINT_TO_FP, VT, N0);
Nate Begeman83e75ec2005-09-06 04:43:02 +00001875 return SDOperand();
Nate Begeman1d4d4142005-09-01 00:19:25 +00001876}
1877
Nate Begeman83e75ec2005-09-06 04:43:02 +00001878SDOperand DAGCombiner::visitUINT_TO_FP(SDNode *N) {
Nate Begeman1d4d4142005-09-01 00:19:25 +00001879 SDOperand N0 = N->getOperand(0);
Nate Begeman646d7e22005-09-02 21:18:40 +00001880 ConstantSDNode *N0C = dyn_cast<ConstantSDNode>(N0);
Nate Begemana148d982006-01-18 22:35:16 +00001881 MVT::ValueType VT = N->getValueType(0);
1882
Nate Begeman1d4d4142005-09-01 00:19:25 +00001883 // fold (uint_to_fp c1) -> c1fp
Nate Begeman646d7e22005-09-02 21:18:40 +00001884 if (N0C)
Nate Begemana148d982006-01-18 22:35:16 +00001885 return DAG.getNode(ISD::UINT_TO_FP, VT, N0);
Nate Begeman83e75ec2005-09-06 04:43:02 +00001886 return SDOperand();
Nate Begeman1d4d4142005-09-01 00:19:25 +00001887}
1888
Nate Begeman83e75ec2005-09-06 04:43:02 +00001889SDOperand DAGCombiner::visitFP_TO_SINT(SDNode *N) {
Nate Begemana148d982006-01-18 22:35:16 +00001890 SDOperand N0 = N->getOperand(0);
1891 ConstantFPSDNode *N0CFP = dyn_cast<ConstantFPSDNode>(N0);
1892 MVT::ValueType VT = N->getValueType(0);
Nate Begeman1d4d4142005-09-01 00:19:25 +00001893
1894 // fold (fp_to_sint c1fp) -> c1
Nate Begeman646d7e22005-09-02 21:18:40 +00001895 if (N0CFP)
Nate Begemana148d982006-01-18 22:35:16 +00001896 return DAG.getNode(ISD::FP_TO_SINT, VT, N0);
Nate Begeman83e75ec2005-09-06 04:43:02 +00001897 return SDOperand();
Nate Begeman1d4d4142005-09-01 00:19:25 +00001898}
1899
Nate Begeman83e75ec2005-09-06 04:43:02 +00001900SDOperand DAGCombiner::visitFP_TO_UINT(SDNode *N) {
Nate Begemana148d982006-01-18 22:35:16 +00001901 SDOperand N0 = N->getOperand(0);
1902 ConstantFPSDNode *N0CFP = dyn_cast<ConstantFPSDNode>(N0);
1903 MVT::ValueType VT = N->getValueType(0);
Nate Begeman1d4d4142005-09-01 00:19:25 +00001904
1905 // fold (fp_to_uint c1fp) -> c1
Nate Begeman646d7e22005-09-02 21:18:40 +00001906 if (N0CFP)
Nate Begemana148d982006-01-18 22:35:16 +00001907 return DAG.getNode(ISD::FP_TO_UINT, VT, N0);
Nate Begeman83e75ec2005-09-06 04:43:02 +00001908 return SDOperand();
Nate Begeman1d4d4142005-09-01 00:19:25 +00001909}
1910
Nate Begeman83e75ec2005-09-06 04:43:02 +00001911SDOperand DAGCombiner::visitFP_ROUND(SDNode *N) {
Nate Begemana148d982006-01-18 22:35:16 +00001912 SDOperand N0 = N->getOperand(0);
1913 ConstantFPSDNode *N0CFP = dyn_cast<ConstantFPSDNode>(N0);
1914 MVT::ValueType VT = N->getValueType(0);
Nate Begeman1d4d4142005-09-01 00:19:25 +00001915
1916 // fold (fp_round c1fp) -> c1fp
Nate Begeman646d7e22005-09-02 21:18:40 +00001917 if (N0CFP)
Nate Begemana148d982006-01-18 22:35:16 +00001918 return DAG.getNode(ISD::FP_ROUND, VT, N0);
Nate Begeman83e75ec2005-09-06 04:43:02 +00001919 return SDOperand();
Nate Begeman1d4d4142005-09-01 00:19:25 +00001920}
1921
Nate Begeman83e75ec2005-09-06 04:43:02 +00001922SDOperand DAGCombiner::visitFP_ROUND_INREG(SDNode *N) {
Nate Begeman1d4d4142005-09-01 00:19:25 +00001923 SDOperand N0 = N->getOperand(0);
1924 MVT::ValueType VT = N->getValueType(0);
1925 MVT::ValueType EVT = cast<VTSDNode>(N->getOperand(1))->getVT();
Nate Begeman646d7e22005-09-02 21:18:40 +00001926 ConstantFPSDNode *N0CFP = dyn_cast<ConstantFPSDNode>(N0);
Nate Begeman1d4d4142005-09-01 00:19:25 +00001927
Nate Begeman1d4d4142005-09-01 00:19:25 +00001928 // fold (fp_round_inreg c1fp) -> c1fp
Nate Begeman646d7e22005-09-02 21:18:40 +00001929 if (N0CFP) {
1930 SDOperand Round = DAG.getConstantFP(N0CFP->getValue(), EVT);
Nate Begeman83e75ec2005-09-06 04:43:02 +00001931 return DAG.getNode(ISD::FP_EXTEND, VT, Round);
Nate Begeman1d4d4142005-09-01 00:19:25 +00001932 }
Nate Begeman83e75ec2005-09-06 04:43:02 +00001933 return SDOperand();
Nate Begeman1d4d4142005-09-01 00:19:25 +00001934}
1935
Nate Begeman83e75ec2005-09-06 04:43:02 +00001936SDOperand DAGCombiner::visitFP_EXTEND(SDNode *N) {
Nate Begemana148d982006-01-18 22:35:16 +00001937 SDOperand N0 = N->getOperand(0);
1938 ConstantFPSDNode *N0CFP = dyn_cast<ConstantFPSDNode>(N0);
1939 MVT::ValueType VT = N->getValueType(0);
Nate Begeman1d4d4142005-09-01 00:19:25 +00001940
1941 // fold (fp_extend c1fp) -> c1fp
Nate Begeman646d7e22005-09-02 21:18:40 +00001942 if (N0CFP)
Nate Begemana148d982006-01-18 22:35:16 +00001943 return DAG.getNode(ISD::FP_EXTEND, VT, N0);
Nate Begeman83e75ec2005-09-06 04:43:02 +00001944 return SDOperand();
Nate Begeman1d4d4142005-09-01 00:19:25 +00001945}
1946
Nate Begeman83e75ec2005-09-06 04:43:02 +00001947SDOperand DAGCombiner::visitFNEG(SDNode *N) {
Nate Begemana148d982006-01-18 22:35:16 +00001948 SDOperand N0 = N->getOperand(0);
1949 ConstantFPSDNode *N0CFP = dyn_cast<ConstantFPSDNode>(N0);
1950 MVT::ValueType VT = N->getValueType(0);
1951
1952 // fold (fneg c1) -> -c1
Nate Begeman646d7e22005-09-02 21:18:40 +00001953 if (N0CFP)
Nate Begemana148d982006-01-18 22:35:16 +00001954 return DAG.getNode(ISD::FNEG, VT, N0);
1955 // fold (fneg (sub x, y)) -> (sub y, x)
Nate Begeman1d4d4142005-09-01 00:19:25 +00001956 if (N->getOperand(0).getOpcode() == ISD::SUB)
Nate Begemana148d982006-01-18 22:35:16 +00001957 return DAG.getNode(ISD::SUB, VT, N->getOperand(1), N->getOperand(0));
1958 // fold (fneg (fneg x)) -> x
Nate Begeman1d4d4142005-09-01 00:19:25 +00001959 if (N->getOperand(0).getOpcode() == ISD::FNEG)
Nate Begeman83e75ec2005-09-06 04:43:02 +00001960 return N->getOperand(0).getOperand(0);
1961 return SDOperand();
Nate Begeman1d4d4142005-09-01 00:19:25 +00001962}
1963
Nate Begeman83e75ec2005-09-06 04:43:02 +00001964SDOperand DAGCombiner::visitFABS(SDNode *N) {
Nate Begemana148d982006-01-18 22:35:16 +00001965 SDOperand N0 = N->getOperand(0);
1966 ConstantFPSDNode *N0CFP = dyn_cast<ConstantFPSDNode>(N0);
1967 MVT::ValueType VT = N->getValueType(0);
1968
Nate Begeman1d4d4142005-09-01 00:19:25 +00001969 // fold (fabs c1) -> fabs(c1)
Nate Begeman646d7e22005-09-02 21:18:40 +00001970 if (N0CFP)
Nate Begemana148d982006-01-18 22:35:16 +00001971 return DAG.getNode(ISD::FABS, VT, N0);
Nate Begeman1d4d4142005-09-01 00:19:25 +00001972 // fold (fabs (fabs x)) -> (fabs x)
1973 if (N->getOperand(0).getOpcode() == ISD::FABS)
Nate Begeman83e75ec2005-09-06 04:43:02 +00001974 return N->getOperand(0);
Nate Begeman1d4d4142005-09-01 00:19:25 +00001975 // fold (fabs (fneg x)) -> (fabs x)
1976 if (N->getOperand(0).getOpcode() == ISD::FNEG)
Nate Begemana148d982006-01-18 22:35:16 +00001977 return DAG.getNode(ISD::FABS, VT, N->getOperand(0).getOperand(0));
Nate Begeman83e75ec2005-09-06 04:43:02 +00001978 return SDOperand();
Nate Begeman1d4d4142005-09-01 00:19:25 +00001979}
1980
Nate Begeman44728a72005-09-19 22:34:01 +00001981SDOperand DAGCombiner::visitBRCOND(SDNode *N) {
1982 SDOperand Chain = N->getOperand(0);
1983 SDOperand N1 = N->getOperand(1);
1984 SDOperand N2 = N->getOperand(2);
1985 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1);
1986
1987 // never taken branch, fold to chain
1988 if (N1C && N1C->isNullValue())
1989 return Chain;
1990 // unconditional branch
Nate Begemane17daeb2005-10-05 21:43:42 +00001991 if (N1C && N1C->getValue() == 1)
Nate Begeman44728a72005-09-19 22:34:01 +00001992 return DAG.getNode(ISD::BR, MVT::Other, Chain, N2);
Nate Begeman750ac1b2006-02-01 07:19:44 +00001993 // fold a brcond with a setcc condition into a BR_CC node if BR_CC is legal
1994 // on the target.
1995 if (N1.getOpcode() == ISD::SETCC &&
1996 TLI.isOperationLegal(ISD::BR_CC, MVT::Other)) {
1997 return DAG.getNode(ISD::BR_CC, MVT::Other, Chain, N1.getOperand(2),
1998 N1.getOperand(0), N1.getOperand(1), N2);
1999 }
Nate Begeman44728a72005-09-19 22:34:01 +00002000 return SDOperand();
2001}
2002
2003SDOperand DAGCombiner::visitBRCONDTWOWAY(SDNode *N) {
2004 SDOperand Chain = N->getOperand(0);
2005 SDOperand N1 = N->getOperand(1);
2006 SDOperand N2 = N->getOperand(2);
2007 SDOperand N3 = N->getOperand(3);
2008 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1);
2009
2010 // unconditional branch to true mbb
2011 if (N1C && N1C->getValue() == 1)
2012 return DAG.getNode(ISD::BR, MVT::Other, Chain, N2);
2013 // unconditional branch to false mbb
2014 if (N1C && N1C->isNullValue())
2015 return DAG.getNode(ISD::BR, MVT::Other, Chain, N3);
Nate Begeman750ac1b2006-02-01 07:19:44 +00002016 // fold a brcondtwoway with a setcc condition into a BRTWOWAY_CC node if
2017 // BRTWOWAY_CC is legal on the target.
2018 if (N1.getOpcode() == ISD::SETCC &&
2019 TLI.isOperationLegal(ISD::BRTWOWAY_CC, MVT::Other)) {
2020 std::vector<SDOperand> Ops;
2021 Ops.push_back(Chain);
2022 Ops.push_back(N1.getOperand(2));
2023 Ops.push_back(N1.getOperand(0));
2024 Ops.push_back(N1.getOperand(1));
2025 Ops.push_back(N2);
2026 Ops.push_back(N3);
2027 return DAG.getNode(ISD::BRTWOWAY_CC, MVT::Other, Ops);
2028 }
Nate Begeman44728a72005-09-19 22:34:01 +00002029 return SDOperand();
2030}
2031
Chris Lattner3ea0b472005-10-05 06:47:48 +00002032// Operand List for BR_CC: Chain, CondCC, CondLHS, CondRHS, DestBB.
2033//
Nate Begeman44728a72005-09-19 22:34:01 +00002034SDOperand DAGCombiner::visitBR_CC(SDNode *N) {
Chris Lattner3ea0b472005-10-05 06:47:48 +00002035 CondCodeSDNode *CC = cast<CondCodeSDNode>(N->getOperand(1));
2036 SDOperand CondLHS = N->getOperand(2), CondRHS = N->getOperand(3);
2037
2038 // Use SimplifySetCC to simplify SETCC's.
Nate Begemane17daeb2005-10-05 21:43:42 +00002039 SDOperand Simp = SimplifySetCC(MVT::i1, CondLHS, CondRHS, CC->get(), false);
2040 ConstantSDNode *SCCC = dyn_cast_or_null<ConstantSDNode>(Simp.Val);
2041
2042 // fold br_cc true, dest -> br dest (unconditional branch)
2043 if (SCCC && SCCC->getValue())
2044 return DAG.getNode(ISD::BR, MVT::Other, N->getOperand(0),
2045 N->getOperand(4));
2046 // fold br_cc false, dest -> unconditional fall through
2047 if (SCCC && SCCC->isNullValue())
2048 return N->getOperand(0);
2049 // fold to a simpler setcc
2050 if (Simp.Val && Simp.getOpcode() == ISD::SETCC)
2051 return DAG.getNode(ISD::BR_CC, MVT::Other, N->getOperand(0),
2052 Simp.getOperand(2), Simp.getOperand(0),
2053 Simp.getOperand(1), N->getOperand(4));
Nate Begeman44728a72005-09-19 22:34:01 +00002054 return SDOperand();
2055}
2056
2057SDOperand DAGCombiner::visitBRTWOWAY_CC(SDNode *N) {
Nate Begemane17daeb2005-10-05 21:43:42 +00002058 SDOperand Chain = N->getOperand(0);
2059 SDOperand CCN = N->getOperand(1);
2060 SDOperand LHS = N->getOperand(2);
2061 SDOperand RHS = N->getOperand(3);
2062 SDOperand N4 = N->getOperand(4);
2063 SDOperand N5 = N->getOperand(5);
2064
2065 SDOperand SCC = SimplifySetCC(TLI.getSetCCResultTy(), LHS, RHS,
2066 cast<CondCodeSDNode>(CCN)->get(), false);
2067 ConstantSDNode *SCCC = dyn_cast_or_null<ConstantSDNode>(SCC.Val);
2068
2069 // fold select_cc lhs, rhs, x, x, cc -> x
2070 if (N4 == N5)
2071 return DAG.getNode(ISD::BR, MVT::Other, Chain, N4);
2072 // fold select_cc true, x, y -> x
2073 if (SCCC && SCCC->getValue())
2074 return DAG.getNode(ISD::BR, MVT::Other, Chain, N4);
2075 // fold select_cc false, x, y -> y
2076 if (SCCC && SCCC->isNullValue())
2077 return DAG.getNode(ISD::BR, MVT::Other, Chain, N5);
2078 // fold to a simpler setcc
Chris Lattner03d5e872006-01-29 06:00:45 +00002079 if (SCC.Val && SCC.getOpcode() == ISD::SETCC) {
2080 std::vector<SDOperand> Ops;
2081 Ops.push_back(Chain);
2082 Ops.push_back(SCC.getOperand(2));
2083 Ops.push_back(SCC.getOperand(0));
2084 Ops.push_back(SCC.getOperand(1));
2085 Ops.push_back(N4);
2086 Ops.push_back(N5);
2087 return DAG.getNode(ISD::BRTWOWAY_CC, MVT::Other, Ops);
2088 }
Nate Begeman44728a72005-09-19 22:34:01 +00002089 return SDOperand();
2090}
2091
Chris Lattner01a22022005-10-10 22:04:48 +00002092SDOperand DAGCombiner::visitLOAD(SDNode *N) {
2093 SDOperand Chain = N->getOperand(0);
2094 SDOperand Ptr = N->getOperand(1);
2095 SDOperand SrcValue = N->getOperand(2);
2096
2097 // If this load is directly stored, replace the load value with the stored
2098 // value.
2099 // TODO: Handle store large -> read small portion.
2100 // TODO: Handle TRUNCSTORE/EXTLOAD
2101 if (Chain.getOpcode() == ISD::STORE && Chain.getOperand(2) == Ptr &&
2102 Chain.getOperand(1).getValueType() == N->getValueType(0))
2103 return CombineTo(N, Chain.getOperand(1), Chain);
2104
2105 return SDOperand();
2106}
2107
Chris Lattner87514ca2005-10-10 22:31:19 +00002108SDOperand DAGCombiner::visitSTORE(SDNode *N) {
2109 SDOperand Chain = N->getOperand(0);
2110 SDOperand Value = N->getOperand(1);
2111 SDOperand Ptr = N->getOperand(2);
2112 SDOperand SrcValue = N->getOperand(3);
2113
2114 // If this is a store that kills a previous store, remove the previous store.
Chris Lattner04ecf6d2005-10-10 23:00:08 +00002115 if (Chain.getOpcode() == ISD::STORE && Chain.getOperand(2) == Ptr &&
Chris Lattnerfe7f0462005-10-27 07:10:34 +00002116 Chain.Val->hasOneUse() /* Avoid introducing DAG cycles */ &&
2117 // Make sure that these stores are the same value type:
2118 // FIXME: we really care that the second store is >= size of the first.
2119 Value.getValueType() == Chain.getOperand(1).getValueType()) {
Chris Lattner87514ca2005-10-10 22:31:19 +00002120 // Create a new store of Value that replaces both stores.
2121 SDNode *PrevStore = Chain.Val;
Chris Lattner04ecf6d2005-10-10 23:00:08 +00002122 if (PrevStore->getOperand(1) == Value) // Same value multiply stored.
2123 return Chain;
Chris Lattner87514ca2005-10-10 22:31:19 +00002124 SDOperand NewStore = DAG.getNode(ISD::STORE, MVT::Other,
2125 PrevStore->getOperand(0), Value, Ptr,
2126 SrcValue);
Chris Lattner04ecf6d2005-10-10 23:00:08 +00002127 CombineTo(N, NewStore); // Nuke this store.
Chris Lattner87514ca2005-10-10 22:31:19 +00002128 CombineTo(PrevStore, NewStore); // Nuke the previous store.
Chris Lattner04ecf6d2005-10-10 23:00:08 +00002129 return SDOperand(N, 0);
Chris Lattner87514ca2005-10-10 22:31:19 +00002130 }
2131
Chris Lattnerc33baaa2005-12-23 05:48:07 +00002132 // If this is a store of a bit convert, store the input value.
Chris Lattnerbf40c4b2006-01-15 18:58:59 +00002133 // FIXME: This needs to know that the resultant store does not need a
2134 // higher alignment than the original.
2135 if (0 && Value.getOpcode() == ISD::BIT_CONVERT)
Chris Lattnerc33baaa2005-12-23 05:48:07 +00002136 return DAG.getNode(ISD::STORE, MVT::Other, Chain, Value.getOperand(0),
2137 Ptr, SrcValue);
2138
Chris Lattner87514ca2005-10-10 22:31:19 +00002139 return SDOperand();
2140}
2141
Nate Begeman44728a72005-09-19 22:34:01 +00002142SDOperand DAGCombiner::SimplifySelect(SDOperand N0, SDOperand N1, SDOperand N2){
Nate Begemanf845b452005-10-08 00:29:44 +00002143 assert(N0.getOpcode() ==ISD::SETCC && "First argument must be a SetCC node!");
2144
2145 SDOperand SCC = SimplifySelectCC(N0.getOperand(0), N0.getOperand(1), N1, N2,
2146 cast<CondCodeSDNode>(N0.getOperand(2))->get());
2147 // If we got a simplified select_cc node back from SimplifySelectCC, then
2148 // break it down into a new SETCC node, and a new SELECT node, and then return
2149 // the SELECT node, since we were called with a SELECT node.
2150 if (SCC.Val) {
2151 // Check to see if we got a select_cc back (to turn into setcc/select).
2152 // Otherwise, just return whatever node we got back, like fabs.
2153 if (SCC.getOpcode() == ISD::SELECT_CC) {
2154 SDOperand SETCC = DAG.getNode(ISD::SETCC, N0.getValueType(),
2155 SCC.getOperand(0), SCC.getOperand(1),
2156 SCC.getOperand(4));
2157 WorkList.push_back(SETCC.Val);
2158 return DAG.getNode(ISD::SELECT, SCC.getValueType(), SCC.getOperand(2),
2159 SCC.getOperand(3), SETCC);
2160 }
2161 return SCC;
2162 }
Nate Begeman44728a72005-09-19 22:34:01 +00002163 return SDOperand();
2164}
2165
Chris Lattner40c62d52005-10-18 06:04:22 +00002166/// SimplifySelectOps - Given a SELECT or a SELECT_CC node, where LHS and RHS
2167/// are the two values being selected between, see if we can simplify the
2168/// select.
2169///
2170bool DAGCombiner::SimplifySelectOps(SDNode *TheSelect, SDOperand LHS,
2171 SDOperand RHS) {
2172
2173 // If this is a select from two identical things, try to pull the operation
2174 // through the select.
2175 if (LHS.getOpcode() == RHS.getOpcode() && LHS.hasOneUse() && RHS.hasOneUse()){
2176#if 0
2177 std::cerr << "SELECT: ["; LHS.Val->dump();
2178 std::cerr << "] ["; RHS.Val->dump();
2179 std::cerr << "]\n";
2180#endif
2181
2182 // If this is a load and the token chain is identical, replace the select
2183 // of two loads with a load through a select of the address to load from.
2184 // This triggers in things like "select bool X, 10.0, 123.0" after the FP
2185 // constants have been dropped into the constant pool.
2186 if ((LHS.getOpcode() == ISD::LOAD ||
2187 LHS.getOpcode() == ISD::EXTLOAD ||
2188 LHS.getOpcode() == ISD::ZEXTLOAD ||
2189 LHS.getOpcode() == ISD::SEXTLOAD) &&
2190 // Token chains must be identical.
2191 LHS.getOperand(0) == RHS.getOperand(0) &&
2192 // If this is an EXTLOAD, the VT's must match.
2193 (LHS.getOpcode() == ISD::LOAD ||
2194 LHS.getOperand(3) == RHS.getOperand(3))) {
2195 // FIXME: this conflates two src values, discarding one. This is not
2196 // the right thing to do, but nothing uses srcvalues now. When they do,
2197 // turn SrcValue into a list of locations.
2198 SDOperand Addr;
2199 if (TheSelect->getOpcode() == ISD::SELECT)
2200 Addr = DAG.getNode(ISD::SELECT, LHS.getOperand(1).getValueType(),
2201 TheSelect->getOperand(0), LHS.getOperand(1),
2202 RHS.getOperand(1));
2203 else
2204 Addr = DAG.getNode(ISD::SELECT_CC, LHS.getOperand(1).getValueType(),
2205 TheSelect->getOperand(0),
2206 TheSelect->getOperand(1),
2207 LHS.getOperand(1), RHS.getOperand(1),
2208 TheSelect->getOperand(4));
2209
2210 SDOperand Load;
2211 if (LHS.getOpcode() == ISD::LOAD)
2212 Load = DAG.getLoad(TheSelect->getValueType(0), LHS.getOperand(0),
2213 Addr, LHS.getOperand(2));
2214 else
2215 Load = DAG.getExtLoad(LHS.getOpcode(), TheSelect->getValueType(0),
2216 LHS.getOperand(0), Addr, LHS.getOperand(2),
2217 cast<VTSDNode>(LHS.getOperand(3))->getVT());
2218 // Users of the select now use the result of the load.
2219 CombineTo(TheSelect, Load);
2220
2221 // Users of the old loads now use the new load's chain. We know the
2222 // old-load value is dead now.
2223 CombineTo(LHS.Val, Load.getValue(0), Load.getValue(1));
2224 CombineTo(RHS.Val, Load.getValue(0), Load.getValue(1));
2225 return true;
2226 }
2227 }
2228
2229 return false;
2230}
2231
Nate Begeman44728a72005-09-19 22:34:01 +00002232SDOperand DAGCombiner::SimplifySelectCC(SDOperand N0, SDOperand N1,
2233 SDOperand N2, SDOperand N3,
2234 ISD::CondCode CC) {
Nate Begemanf845b452005-10-08 00:29:44 +00002235
2236 MVT::ValueType VT = N2.getValueType();
2237 ConstantSDNode *N0C = dyn_cast<ConstantSDNode>(N0.Val);
2238 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.Val);
2239 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.Val);
2240 ConstantSDNode *N3C = dyn_cast<ConstantSDNode>(N3.Val);
2241
2242 // Determine if the condition we're dealing with is constant
2243 SDOperand SCC = SimplifySetCC(TLI.getSetCCResultTy(), N0, N1, CC, false);
2244 ConstantSDNode *SCCC = dyn_cast_or_null<ConstantSDNode>(SCC.Val);
2245
2246 // fold select_cc true, x, y -> x
2247 if (SCCC && SCCC->getValue())
2248 return N2;
2249 // fold select_cc false, x, y -> y
2250 if (SCCC && SCCC->getValue() == 0)
2251 return N3;
2252
2253 // Check to see if we can simplify the select into an fabs node
2254 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1)) {
2255 // Allow either -0.0 or 0.0
2256 if (CFP->getValue() == 0.0) {
2257 // select (setg[te] X, +/-0.0), X, fneg(X) -> fabs
2258 if ((CC == ISD::SETGE || CC == ISD::SETGT) &&
2259 N0 == N2 && N3.getOpcode() == ISD::FNEG &&
2260 N2 == N3.getOperand(0))
2261 return DAG.getNode(ISD::FABS, VT, N0);
2262
2263 // select (setl[te] X, +/-0.0), fneg(X), X -> fabs
2264 if ((CC == ISD::SETLT || CC == ISD::SETLE) &&
2265 N0 == N3 && N2.getOpcode() == ISD::FNEG &&
2266 N2.getOperand(0) == N3)
2267 return DAG.getNode(ISD::FABS, VT, N3);
2268 }
2269 }
2270
2271 // Check to see if we can perform the "gzip trick", transforming
2272 // select_cc setlt X, 0, A, 0 -> and (sra X, size(X)-1), A
2273 if (N1C && N1C->isNullValue() && N3C && N3C->isNullValue() &&
2274 MVT::isInteger(N0.getValueType()) &&
2275 MVT::isInteger(N2.getValueType()) && CC == ISD::SETLT) {
2276 MVT::ValueType XType = N0.getValueType();
2277 MVT::ValueType AType = N2.getValueType();
2278 if (XType >= AType) {
2279 // and (sra X, size(X)-1, A) -> "and (srl X, C2), A" iff A is a
Nate Begeman07ed4172005-10-10 21:26:48 +00002280 // single-bit constant.
Nate Begemanf845b452005-10-08 00:29:44 +00002281 if (N2C && ((N2C->getValue() & (N2C->getValue()-1)) == 0)) {
2282 unsigned ShCtV = Log2_64(N2C->getValue());
2283 ShCtV = MVT::getSizeInBits(XType)-ShCtV-1;
2284 SDOperand ShCt = DAG.getConstant(ShCtV, TLI.getShiftAmountTy());
2285 SDOperand Shift = DAG.getNode(ISD::SRL, XType, N0, ShCt);
2286 WorkList.push_back(Shift.Val);
2287 if (XType > AType) {
2288 Shift = DAG.getNode(ISD::TRUNCATE, AType, Shift);
2289 WorkList.push_back(Shift.Val);
2290 }
2291 return DAG.getNode(ISD::AND, AType, Shift, N2);
2292 }
2293 SDOperand Shift = DAG.getNode(ISD::SRA, XType, N0,
2294 DAG.getConstant(MVT::getSizeInBits(XType)-1,
2295 TLI.getShiftAmountTy()));
2296 WorkList.push_back(Shift.Val);
2297 if (XType > AType) {
2298 Shift = DAG.getNode(ISD::TRUNCATE, AType, Shift);
2299 WorkList.push_back(Shift.Val);
2300 }
2301 return DAG.getNode(ISD::AND, AType, Shift, N2);
2302 }
2303 }
Nate Begeman07ed4172005-10-10 21:26:48 +00002304
2305 // fold select C, 16, 0 -> shl C, 4
2306 if (N2C && N3C && N3C->isNullValue() && isPowerOf2_64(N2C->getValue()) &&
2307 TLI.getSetCCResultContents() == TargetLowering::ZeroOrOneSetCCResult) {
2308 // Get a SetCC of the condition
2309 // FIXME: Should probably make sure that setcc is legal if we ever have a
2310 // target where it isn't.
Nate Begemanb0d04a72006-02-18 02:40:58 +00002311 SDOperand Temp, SCC;
Nate Begeman07ed4172005-10-10 21:26:48 +00002312 // cast from setcc result type to select result type
Nate Begemanb0d04a72006-02-18 02:40:58 +00002313 if (AfterLegalize) {
2314 SCC = DAG.getSetCC(TLI.getSetCCResultTy(), N0, N1, CC);
Nate Begeman07ed4172005-10-10 21:26:48 +00002315 Temp = DAG.getZeroExtendInReg(SCC, N2.getValueType());
Nate Begemanb0d04a72006-02-18 02:40:58 +00002316 } else {
2317 SCC = DAG.getSetCC(MVT::i1, N0, N1, CC);
Nate Begeman07ed4172005-10-10 21:26:48 +00002318 Temp = DAG.getNode(ISD::ZERO_EXTEND, N2.getValueType(), SCC);
Nate Begemanb0d04a72006-02-18 02:40:58 +00002319 }
2320 WorkList.push_back(SCC.Val);
Nate Begeman07ed4172005-10-10 21:26:48 +00002321 WorkList.push_back(Temp.Val);
2322 // shl setcc result by log2 n2c
2323 return DAG.getNode(ISD::SHL, N2.getValueType(), Temp,
2324 DAG.getConstant(Log2_64(N2C->getValue()),
2325 TLI.getShiftAmountTy()));
2326 }
2327
Nate Begemanf845b452005-10-08 00:29:44 +00002328 // Check to see if this is the equivalent of setcc
2329 // FIXME: Turn all of these into setcc if setcc if setcc is legal
2330 // otherwise, go ahead with the folds.
2331 if (0 && N3C && N3C->isNullValue() && N2C && (N2C->getValue() == 1ULL)) {
2332 MVT::ValueType XType = N0.getValueType();
2333 if (TLI.isOperationLegal(ISD::SETCC, TLI.getSetCCResultTy())) {
2334 SDOperand Res = DAG.getSetCC(TLI.getSetCCResultTy(), N0, N1, CC);
2335 if (Res.getValueType() != VT)
2336 Res = DAG.getNode(ISD::ZERO_EXTEND, VT, Res);
2337 return Res;
2338 }
2339
2340 // seteq X, 0 -> srl (ctlz X, log2(size(X)))
2341 if (N1C && N1C->isNullValue() && CC == ISD::SETEQ &&
2342 TLI.isOperationLegal(ISD::CTLZ, XType)) {
2343 SDOperand Ctlz = DAG.getNode(ISD::CTLZ, XType, N0);
2344 return DAG.getNode(ISD::SRL, XType, Ctlz,
2345 DAG.getConstant(Log2_32(MVT::getSizeInBits(XType)),
2346 TLI.getShiftAmountTy()));
2347 }
2348 // setgt X, 0 -> srl (and (-X, ~X), size(X)-1)
2349 if (N1C && N1C->isNullValue() && CC == ISD::SETGT) {
2350 SDOperand NegN0 = DAG.getNode(ISD::SUB, XType, DAG.getConstant(0, XType),
2351 N0);
2352 SDOperand NotN0 = DAG.getNode(ISD::XOR, XType, N0,
2353 DAG.getConstant(~0ULL, XType));
2354 return DAG.getNode(ISD::SRL, XType,
2355 DAG.getNode(ISD::AND, XType, NegN0, NotN0),
2356 DAG.getConstant(MVT::getSizeInBits(XType)-1,
2357 TLI.getShiftAmountTy()));
2358 }
2359 // setgt X, -1 -> xor (srl (X, size(X)-1), 1)
2360 if (N1C && N1C->isAllOnesValue() && CC == ISD::SETGT) {
2361 SDOperand Sign = DAG.getNode(ISD::SRL, XType, N0,
2362 DAG.getConstant(MVT::getSizeInBits(XType)-1,
2363 TLI.getShiftAmountTy()));
2364 return DAG.getNode(ISD::XOR, XType, Sign, DAG.getConstant(1, XType));
2365 }
2366 }
2367
2368 // Check to see if this is an integer abs. select_cc setl[te] X, 0, -X, X ->
2369 // Y = sra (X, size(X)-1); xor (add (X, Y), Y)
2370 if (N1C && N1C->isNullValue() && (CC == ISD::SETLT || CC == ISD::SETLE) &&
2371 N0 == N3 && N2.getOpcode() == ISD::SUB && N0 == N2.getOperand(1)) {
2372 if (ConstantSDNode *SubC = dyn_cast<ConstantSDNode>(N2.getOperand(0))) {
2373 MVT::ValueType XType = N0.getValueType();
2374 if (SubC->isNullValue() && MVT::isInteger(XType)) {
2375 SDOperand Shift = DAG.getNode(ISD::SRA, XType, N0,
2376 DAG.getConstant(MVT::getSizeInBits(XType)-1,
2377 TLI.getShiftAmountTy()));
2378 SDOperand Add = DAG.getNode(ISD::ADD, XType, N0, Shift);
2379 WorkList.push_back(Shift.Val);
2380 WorkList.push_back(Add.Val);
2381 return DAG.getNode(ISD::XOR, XType, Add, Shift);
2382 }
2383 }
2384 }
2385
Nate Begeman44728a72005-09-19 22:34:01 +00002386 return SDOperand();
2387}
2388
Nate Begeman452d7be2005-09-16 00:54:12 +00002389SDOperand DAGCombiner::SimplifySetCC(MVT::ValueType VT, SDOperand N0,
Nate Begemane17daeb2005-10-05 21:43:42 +00002390 SDOperand N1, ISD::CondCode Cond,
2391 bool foldBooleans) {
Nate Begeman452d7be2005-09-16 00:54:12 +00002392 // These setcc operations always fold.
2393 switch (Cond) {
2394 default: break;
2395 case ISD::SETFALSE:
2396 case ISD::SETFALSE2: return DAG.getConstant(0, VT);
2397 case ISD::SETTRUE:
2398 case ISD::SETTRUE2: return DAG.getConstant(1, VT);
2399 }
2400
2401 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.Val)) {
2402 uint64_t C1 = N1C->getValue();
2403 if (ConstantSDNode *N0C = dyn_cast<ConstantSDNode>(N0.Val)) {
2404 uint64_t C0 = N0C->getValue();
2405
2406 // Sign extend the operands if required
2407 if (ISD::isSignedIntSetCC(Cond)) {
2408 C0 = N0C->getSignExtended();
2409 C1 = N1C->getSignExtended();
2410 }
2411
2412 switch (Cond) {
2413 default: assert(0 && "Unknown integer setcc!");
2414 case ISD::SETEQ: return DAG.getConstant(C0 == C1, VT);
2415 case ISD::SETNE: return DAG.getConstant(C0 != C1, VT);
2416 case ISD::SETULT: return DAG.getConstant(C0 < C1, VT);
2417 case ISD::SETUGT: return DAG.getConstant(C0 > C1, VT);
2418 case ISD::SETULE: return DAG.getConstant(C0 <= C1, VT);
2419 case ISD::SETUGE: return DAG.getConstant(C0 >= C1, VT);
2420 case ISD::SETLT: return DAG.getConstant((int64_t)C0 < (int64_t)C1, VT);
2421 case ISD::SETGT: return DAG.getConstant((int64_t)C0 > (int64_t)C1, VT);
2422 case ISD::SETLE: return DAG.getConstant((int64_t)C0 <= (int64_t)C1, VT);
2423 case ISD::SETGE: return DAG.getConstant((int64_t)C0 >= (int64_t)C1, VT);
2424 }
2425 } else {
2426 // If the LHS is a ZERO_EXTEND, perform the comparison on the input.
2427 if (N0.getOpcode() == ISD::ZERO_EXTEND) {
2428 unsigned InSize = MVT::getSizeInBits(N0.getOperand(0).getValueType());
2429
2430 // If the comparison constant has bits in the upper part, the
2431 // zero-extended value could never match.
2432 if (C1 & (~0ULL << InSize)) {
2433 unsigned VSize = MVT::getSizeInBits(N0.getValueType());
2434 switch (Cond) {
2435 case ISD::SETUGT:
2436 case ISD::SETUGE:
2437 case ISD::SETEQ: return DAG.getConstant(0, VT);
2438 case ISD::SETULT:
2439 case ISD::SETULE:
2440 case ISD::SETNE: return DAG.getConstant(1, VT);
2441 case ISD::SETGT:
2442 case ISD::SETGE:
2443 // True if the sign bit of C1 is set.
2444 return DAG.getConstant((C1 & (1ULL << VSize)) != 0, VT);
2445 case ISD::SETLT:
2446 case ISD::SETLE:
2447 // True if the sign bit of C1 isn't set.
2448 return DAG.getConstant((C1 & (1ULL << VSize)) == 0, VT);
2449 default:
2450 break;
2451 }
2452 }
2453
2454 // Otherwise, we can perform the comparison with the low bits.
2455 switch (Cond) {
2456 case ISD::SETEQ:
2457 case ISD::SETNE:
2458 case ISD::SETUGT:
2459 case ISD::SETUGE:
2460 case ISD::SETULT:
2461 case ISD::SETULE:
2462 return DAG.getSetCC(VT, N0.getOperand(0),
2463 DAG.getConstant(C1, N0.getOperand(0).getValueType()),
2464 Cond);
2465 default:
2466 break; // todo, be more careful with signed comparisons
2467 }
2468 } else if (N0.getOpcode() == ISD::SIGN_EXTEND_INREG &&
2469 (Cond == ISD::SETEQ || Cond == ISD::SETNE)) {
2470 MVT::ValueType ExtSrcTy = cast<VTSDNode>(N0.getOperand(1))->getVT();
2471 unsigned ExtSrcTyBits = MVT::getSizeInBits(ExtSrcTy);
2472 MVT::ValueType ExtDstTy = N0.getValueType();
2473 unsigned ExtDstTyBits = MVT::getSizeInBits(ExtDstTy);
2474
2475 // If the extended part has any inconsistent bits, it cannot ever
2476 // compare equal. In other words, they have to be all ones or all
2477 // zeros.
2478 uint64_t ExtBits =
2479 (~0ULL >> (64-ExtSrcTyBits)) & (~0ULL << (ExtDstTyBits-1));
2480 if ((C1 & ExtBits) != 0 && (C1 & ExtBits) != ExtBits)
2481 return DAG.getConstant(Cond == ISD::SETNE, VT);
2482
2483 SDOperand ZextOp;
2484 MVT::ValueType Op0Ty = N0.getOperand(0).getValueType();
2485 if (Op0Ty == ExtSrcTy) {
2486 ZextOp = N0.getOperand(0);
2487 } else {
2488 int64_t Imm = ~0ULL >> (64-ExtSrcTyBits);
2489 ZextOp = DAG.getNode(ISD::AND, Op0Ty, N0.getOperand(0),
2490 DAG.getConstant(Imm, Op0Ty));
2491 }
2492 WorkList.push_back(ZextOp.Val);
2493 // Otherwise, make this a use of a zext.
2494 return DAG.getSetCC(VT, ZextOp,
2495 DAG.getConstant(C1 & (~0ULL>>(64-ExtSrcTyBits)),
2496 ExtDstTy),
2497 Cond);
Chris Lattner3391bcd2006-02-08 02:13:15 +00002498 } else if ((N1C->getValue() == 0 || N1C->getValue() == 1) &&
2499 (Cond == ISD::SETEQ || Cond == ISD::SETNE) &&
2500 (N0.getOpcode() == ISD::XOR ||
2501 (N0.getOpcode() == ISD::AND &&
2502 N0.getOperand(0).getOpcode() == ISD::XOR &&
2503 N0.getOperand(1) == N0.getOperand(0).getOperand(1))) &&
2504 isa<ConstantSDNode>(N0.getOperand(1)) &&
2505 cast<ConstantSDNode>(N0.getOperand(1))->getValue() == 1) {
2506 // If this is (X^1) == 0/1, swap the RHS and eliminate the xor. We can
2507 // only do this if the top bits are known zero.
2508 if (TLI.MaskedValueIsZero(N1,
2509 MVT::getIntVTBitMask(N0.getValueType())-1)) {
2510 // Okay, get the un-inverted input value.
2511 SDOperand Val;
2512 if (N0.getOpcode() == ISD::XOR)
2513 Val = N0.getOperand(0);
2514 else {
2515 assert(N0.getOpcode() == ISD::AND &&
2516 N0.getOperand(0).getOpcode() == ISD::XOR);
2517 // ((X^1)&1)^1 -> X & 1
2518 Val = DAG.getNode(ISD::AND, N0.getValueType(),
2519 N0.getOperand(0).getOperand(0), N0.getOperand(1));
2520 }
2521 return DAG.getSetCC(VT, Val, N1,
2522 Cond == ISD::SETEQ ? ISD::SETNE : ISD::SETEQ);
2523 }
Nate Begeman452d7be2005-09-16 00:54:12 +00002524 }
Chris Lattner5c46f742005-10-05 06:11:08 +00002525
Nate Begeman452d7be2005-09-16 00:54:12 +00002526 uint64_t MinVal, MaxVal;
2527 unsigned OperandBitSize = MVT::getSizeInBits(N1C->getValueType(0));
2528 if (ISD::isSignedIntSetCC(Cond)) {
2529 MinVal = 1ULL << (OperandBitSize-1);
2530 if (OperandBitSize != 1) // Avoid X >> 64, which is undefined.
2531 MaxVal = ~0ULL >> (65-OperandBitSize);
2532 else
2533 MaxVal = 0;
2534 } else {
2535 MinVal = 0;
2536 MaxVal = ~0ULL >> (64-OperandBitSize);
2537 }
2538
2539 // Canonicalize GE/LE comparisons to use GT/LT comparisons.
2540 if (Cond == ISD::SETGE || Cond == ISD::SETUGE) {
2541 if (C1 == MinVal) return DAG.getConstant(1, VT); // X >= MIN --> true
2542 --C1; // X >= C0 --> X > (C0-1)
2543 return DAG.getSetCC(VT, N0, DAG.getConstant(C1, N1.getValueType()),
2544 (Cond == ISD::SETGE) ? ISD::SETGT : ISD::SETUGT);
2545 }
2546
2547 if (Cond == ISD::SETLE || Cond == ISD::SETULE) {
2548 if (C1 == MaxVal) return DAG.getConstant(1, VT); // X <= MAX --> true
2549 ++C1; // X <= C0 --> X < (C0+1)
2550 return DAG.getSetCC(VT, N0, DAG.getConstant(C1, N1.getValueType()),
2551 (Cond == ISD::SETLE) ? ISD::SETLT : ISD::SETULT);
2552 }
2553
2554 if ((Cond == ISD::SETLT || Cond == ISD::SETULT) && C1 == MinVal)
2555 return DAG.getConstant(0, VT); // X < MIN --> false
2556
2557 // Canonicalize setgt X, Min --> setne X, Min
2558 if ((Cond == ISD::SETGT || Cond == ISD::SETUGT) && C1 == MinVal)
2559 return DAG.getSetCC(VT, N0, N1, ISD::SETNE);
Chris Lattnerc8597ca2005-10-21 21:23:25 +00002560 // Canonicalize setlt X, Max --> setne X, Max
2561 if ((Cond == ISD::SETLT || Cond == ISD::SETULT) && C1 == MaxVal)
2562 return DAG.getSetCC(VT, N0, N1, ISD::SETNE);
Nate Begeman452d7be2005-09-16 00:54:12 +00002563
2564 // If we have setult X, 1, turn it into seteq X, 0
2565 if ((Cond == ISD::SETLT || Cond == ISD::SETULT) && C1 == MinVal+1)
2566 return DAG.getSetCC(VT, N0, DAG.getConstant(MinVal, N0.getValueType()),
2567 ISD::SETEQ);
2568 // If we have setugt X, Max-1, turn it into seteq X, Max
2569 else if ((Cond == ISD::SETGT || Cond == ISD::SETUGT) && C1 == MaxVal-1)
2570 return DAG.getSetCC(VT, N0, DAG.getConstant(MaxVal, N0.getValueType()),
2571 ISD::SETEQ);
2572
2573 // If we have "setcc X, C0", check to see if we can shrink the immediate
2574 // by changing cc.
2575
2576 // SETUGT X, SINTMAX -> SETLT X, 0
2577 if (Cond == ISD::SETUGT && OperandBitSize != 1 &&
2578 C1 == (~0ULL >> (65-OperandBitSize)))
2579 return DAG.getSetCC(VT, N0, DAG.getConstant(0, N1.getValueType()),
2580 ISD::SETLT);
2581
2582 // FIXME: Implement the rest of these.
2583
2584 // Fold bit comparisons when we can.
2585 if ((Cond == ISD::SETEQ || Cond == ISD::SETNE) &&
2586 VT == N0.getValueType() && N0.getOpcode() == ISD::AND)
2587 if (ConstantSDNode *AndRHS =
2588 dyn_cast<ConstantSDNode>(N0.getOperand(1))) {
2589 if (Cond == ISD::SETNE && C1 == 0) {// (X & 8) != 0 --> (X & 8) >> 3
2590 // Perform the xform if the AND RHS is a single bit.
2591 if ((AndRHS->getValue() & (AndRHS->getValue()-1)) == 0) {
2592 return DAG.getNode(ISD::SRL, VT, N0,
2593 DAG.getConstant(Log2_64(AndRHS->getValue()),
2594 TLI.getShiftAmountTy()));
2595 }
2596 } else if (Cond == ISD::SETEQ && C1 == AndRHS->getValue()) {
2597 // (X & 8) == 8 --> (X & 8) >> 3
2598 // Perform the xform if C1 is a single bit.
2599 if ((C1 & (C1-1)) == 0) {
2600 return DAG.getNode(ISD::SRL, VT, N0,
2601 DAG.getConstant(Log2_64(C1),TLI.getShiftAmountTy()));
2602 }
2603 }
2604 }
2605 }
2606 } else if (isa<ConstantSDNode>(N0.Val)) {
2607 // Ensure that the constant occurs on the RHS.
2608 return DAG.getSetCC(VT, N1, N0, ISD::getSetCCSwappedOperands(Cond));
2609 }
2610
2611 if (ConstantFPSDNode *N0C = dyn_cast<ConstantFPSDNode>(N0.Val))
2612 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.Val)) {
2613 double C0 = N0C->getValue(), C1 = N1C->getValue();
2614
2615 switch (Cond) {
2616 default: break; // FIXME: Implement the rest of these!
2617 case ISD::SETEQ: return DAG.getConstant(C0 == C1, VT);
2618 case ISD::SETNE: return DAG.getConstant(C0 != C1, VT);
2619 case ISD::SETLT: return DAG.getConstant(C0 < C1, VT);
2620 case ISD::SETGT: return DAG.getConstant(C0 > C1, VT);
2621 case ISD::SETLE: return DAG.getConstant(C0 <= C1, VT);
2622 case ISD::SETGE: return DAG.getConstant(C0 >= C1, VT);
2623 }
2624 } else {
2625 // Ensure that the constant occurs on the RHS.
2626 return DAG.getSetCC(VT, N1, N0, ISD::getSetCCSwappedOperands(Cond));
2627 }
2628
2629 if (N0 == N1) {
2630 // We can always fold X == Y for integer setcc's.
2631 if (MVT::isInteger(N0.getValueType()))
2632 return DAG.getConstant(ISD::isTrueWhenEqual(Cond), VT);
2633 unsigned UOF = ISD::getUnorderedFlavor(Cond);
2634 if (UOF == 2) // FP operators that are undefined on NaNs.
2635 return DAG.getConstant(ISD::isTrueWhenEqual(Cond), VT);
2636 if (UOF == unsigned(ISD::isTrueWhenEqual(Cond)))
2637 return DAG.getConstant(UOF, VT);
2638 // Otherwise, we can't fold it. However, we can simplify it to SETUO/SETO
2639 // if it is not already.
Chris Lattner4090aee2006-01-18 19:13:41 +00002640 ISD::CondCode NewCond = UOF == 0 ? ISD::SETO : ISD::SETUO;
Nate Begeman452d7be2005-09-16 00:54:12 +00002641 if (NewCond != Cond)
2642 return DAG.getSetCC(VT, N0, N1, NewCond);
2643 }
2644
2645 if ((Cond == ISD::SETEQ || Cond == ISD::SETNE) &&
2646 MVT::isInteger(N0.getValueType())) {
2647 if (N0.getOpcode() == ISD::ADD || N0.getOpcode() == ISD::SUB ||
2648 N0.getOpcode() == ISD::XOR) {
2649 // Simplify (X+Y) == (X+Z) --> Y == Z
2650 if (N0.getOpcode() == N1.getOpcode()) {
2651 if (N0.getOperand(0) == N1.getOperand(0))
2652 return DAG.getSetCC(VT, N0.getOperand(1), N1.getOperand(1), Cond);
2653 if (N0.getOperand(1) == N1.getOperand(1))
2654 return DAG.getSetCC(VT, N0.getOperand(0), N1.getOperand(0), Cond);
2655 if (isCommutativeBinOp(N0.getOpcode())) {
2656 // If X op Y == Y op X, try other combinations.
2657 if (N0.getOperand(0) == N1.getOperand(1))
2658 return DAG.getSetCC(VT, N0.getOperand(1), N1.getOperand(0), Cond);
2659 if (N0.getOperand(1) == N1.getOperand(0))
Chris Lattnera158eee2005-10-25 18:57:30 +00002660 return DAG.getSetCC(VT, N0.getOperand(0), N1.getOperand(1), Cond);
Nate Begeman452d7be2005-09-16 00:54:12 +00002661 }
2662 }
Chris Lattnerb3ddfc42006-02-02 06:36:13 +00002663
2664 if (ConstantSDNode *RHSC = dyn_cast<ConstantSDNode>(N1)) {
2665 if (ConstantSDNode *LHSR = dyn_cast<ConstantSDNode>(N0.getOperand(1))) {
2666 // Turn (X+C1) == C2 --> X == C2-C1
2667 if (N0.getOpcode() == ISD::ADD && N0.Val->hasOneUse()) {
2668 return DAG.getSetCC(VT, N0.getOperand(0),
2669 DAG.getConstant(RHSC->getValue()-LHSR->getValue(),
2670 N0.getValueType()), Cond);
2671 }
2672
2673 // Turn (X^C1) == C2 into X == C1^C2 iff X&~C1 = 0.
2674 if (N0.getOpcode() == ISD::XOR)
Chris Lattner5c46f742005-10-05 06:11:08 +00002675 // If we know that all of the inverted bits are zero, don't bother
2676 // performing the inversion.
Chris Lattnerb3ddfc42006-02-02 06:36:13 +00002677 if (TLI.MaskedValueIsZero(N0.getOperand(0), ~LHSR->getValue()))
Chris Lattner5c46f742005-10-05 06:11:08 +00002678 return DAG.getSetCC(VT, N0.getOperand(0),
Chris Lattnerb3ddfc42006-02-02 06:36:13 +00002679 DAG.getConstant(LHSR->getValue()^RHSC->getValue(),
Chris Lattner5c46f742005-10-05 06:11:08 +00002680 N0.getValueType()), Cond);
Chris Lattnerb3ddfc42006-02-02 06:36:13 +00002681 }
2682
2683 // Turn (C1-X) == C2 --> X == C1-C2
2684 if (ConstantSDNode *SUBC = dyn_cast<ConstantSDNode>(N0.getOperand(0))) {
2685 if (N0.getOpcode() == ISD::SUB && N0.Val->hasOneUse()) {
2686 return DAG.getSetCC(VT, N0.getOperand(1),
2687 DAG.getConstant(SUBC->getValue()-RHSC->getValue(),
2688 N0.getValueType()), Cond);
Chris Lattner5c46f742005-10-05 06:11:08 +00002689 }
Chris Lattnerb3ddfc42006-02-02 06:36:13 +00002690 }
2691 }
2692
Nate Begeman452d7be2005-09-16 00:54:12 +00002693 // Simplify (X+Z) == X --> Z == 0
2694 if (N0.getOperand(0) == N1)
2695 return DAG.getSetCC(VT, N0.getOperand(1),
2696 DAG.getConstant(0, N0.getValueType()), Cond);
2697 if (N0.getOperand(1) == N1) {
2698 if (isCommutativeBinOp(N0.getOpcode()))
2699 return DAG.getSetCC(VT, N0.getOperand(0),
2700 DAG.getConstant(0, N0.getValueType()), Cond);
2701 else {
2702 assert(N0.getOpcode() == ISD::SUB && "Unexpected operation!");
2703 // (Z-X) == X --> Z == X<<1
2704 SDOperand SH = DAG.getNode(ISD::SHL, N1.getValueType(),
2705 N1,
2706 DAG.getConstant(1,TLI.getShiftAmountTy()));
2707 WorkList.push_back(SH.Val);
2708 return DAG.getSetCC(VT, N0.getOperand(0), SH, Cond);
2709 }
2710 }
2711 }
2712
2713 if (N1.getOpcode() == ISD::ADD || N1.getOpcode() == ISD::SUB ||
2714 N1.getOpcode() == ISD::XOR) {
2715 // Simplify X == (X+Z) --> Z == 0
2716 if (N1.getOperand(0) == N0) {
2717 return DAG.getSetCC(VT, N1.getOperand(1),
2718 DAG.getConstant(0, N1.getValueType()), Cond);
2719 } else if (N1.getOperand(1) == N0) {
2720 if (isCommutativeBinOp(N1.getOpcode())) {
2721 return DAG.getSetCC(VT, N1.getOperand(0),
2722 DAG.getConstant(0, N1.getValueType()), Cond);
2723 } else {
2724 assert(N1.getOpcode() == ISD::SUB && "Unexpected operation!");
2725 // X == (Z-X) --> X<<1 == Z
2726 SDOperand SH = DAG.getNode(ISD::SHL, N1.getValueType(), N0,
2727 DAG.getConstant(1,TLI.getShiftAmountTy()));
2728 WorkList.push_back(SH.Val);
2729 return DAG.getSetCC(VT, SH, N1.getOperand(0), Cond);
2730 }
2731 }
2732 }
2733 }
2734
2735 // Fold away ALL boolean setcc's.
2736 SDOperand Temp;
Nate Begemane17daeb2005-10-05 21:43:42 +00002737 if (N0.getValueType() == MVT::i1 && foldBooleans) {
Nate Begeman452d7be2005-09-16 00:54:12 +00002738 switch (Cond) {
2739 default: assert(0 && "Unknown integer setcc!");
2740 case ISD::SETEQ: // X == Y -> (X^Y)^1
2741 Temp = DAG.getNode(ISD::XOR, MVT::i1, N0, N1);
2742 N0 = DAG.getNode(ISD::XOR, MVT::i1, Temp, DAG.getConstant(1, MVT::i1));
2743 WorkList.push_back(Temp.Val);
2744 break;
2745 case ISD::SETNE: // X != Y --> (X^Y)
2746 N0 = DAG.getNode(ISD::XOR, MVT::i1, N0, N1);
2747 break;
2748 case ISD::SETGT: // X >s Y --> X == 0 & Y == 1 --> X^1 & Y
2749 case ISD::SETULT: // X <u Y --> X == 0 & Y == 1 --> X^1 & Y
2750 Temp = DAG.getNode(ISD::XOR, MVT::i1, N0, DAG.getConstant(1, MVT::i1));
2751 N0 = DAG.getNode(ISD::AND, MVT::i1, N1, Temp);
2752 WorkList.push_back(Temp.Val);
2753 break;
2754 case ISD::SETLT: // X <s Y --> X == 1 & Y == 0 --> Y^1 & X
2755 case ISD::SETUGT: // X >u Y --> X == 1 & Y == 0 --> Y^1 & X
2756 Temp = DAG.getNode(ISD::XOR, MVT::i1, N1, DAG.getConstant(1, MVT::i1));
2757 N0 = DAG.getNode(ISD::AND, MVT::i1, N0, Temp);
2758 WorkList.push_back(Temp.Val);
2759 break;
2760 case ISD::SETULE: // X <=u Y --> X == 0 | Y == 1 --> X^1 | Y
2761 case ISD::SETGE: // X >=s Y --> X == 0 | Y == 1 --> X^1 | Y
2762 Temp = DAG.getNode(ISD::XOR, MVT::i1, N0, DAG.getConstant(1, MVT::i1));
2763 N0 = DAG.getNode(ISD::OR, MVT::i1, N1, Temp);
2764 WorkList.push_back(Temp.Val);
2765 break;
2766 case ISD::SETUGE: // X >=u Y --> X == 1 | Y == 0 --> Y^1 | X
2767 case ISD::SETLE: // X <=s Y --> X == 1 | Y == 0 --> Y^1 | X
2768 Temp = DAG.getNode(ISD::XOR, MVT::i1, N1, DAG.getConstant(1, MVT::i1));
2769 N0 = DAG.getNode(ISD::OR, MVT::i1, N0, Temp);
2770 break;
2771 }
2772 if (VT != MVT::i1) {
2773 WorkList.push_back(N0.Val);
2774 // FIXME: If running after legalize, we probably can't do this.
2775 N0 = DAG.getNode(ISD::ZERO_EXTEND, VT, N0);
2776 }
2777 return N0;
2778 }
2779
2780 // Could not fold it.
2781 return SDOperand();
2782}
2783
Nate Begeman69575232005-10-20 02:15:44 +00002784/// BuildSDIVSequence - Given an ISD::SDIV node expressing a divide by constant,
2785/// return a DAG expression to select that will generate the same value by
2786/// multiplying by a magic number. See:
2787/// <http://the.wall.riscom.net/books/proc/ppc/cwg/code2.html>
2788SDOperand DAGCombiner::BuildSDIV(SDNode *N) {
2789 MVT::ValueType VT = N->getValueType(0);
Chris Lattnere9936d12005-10-22 18:50:15 +00002790
2791 // Check to see if we can do this.
2792 if (!TLI.isTypeLegal(VT) || (VT != MVT::i32 && VT != MVT::i64))
2793 return SDOperand(); // BuildSDIV only operates on i32 or i64
2794 if (!TLI.isOperationLegal(ISD::MULHS, VT))
2795 return SDOperand(); // Make sure the target supports MULHS.
Nate Begeman69575232005-10-20 02:15:44 +00002796
Nate Begemanc6a454e2005-10-20 17:45:03 +00002797 int64_t d = cast<ConstantSDNode>(N->getOperand(1))->getSignExtended();
Nate Begeman69575232005-10-20 02:15:44 +00002798 ms magics = (VT == MVT::i32) ? magic32(d) : magic64(d);
2799
2800 // Multiply the numerator (operand 0) by the magic value
2801 SDOperand Q = DAG.getNode(ISD::MULHS, VT, N->getOperand(0),
2802 DAG.getConstant(magics.m, VT));
2803 // If d > 0 and m < 0, add the numerator
2804 if (d > 0 && magics.m < 0) {
2805 Q = DAG.getNode(ISD::ADD, VT, Q, N->getOperand(0));
2806 WorkList.push_back(Q.Val);
2807 }
2808 // If d < 0 and m > 0, subtract the numerator.
2809 if (d < 0 && magics.m > 0) {
2810 Q = DAG.getNode(ISD::SUB, VT, Q, N->getOperand(0));
2811 WorkList.push_back(Q.Val);
2812 }
2813 // Shift right algebraic if shift value is nonzero
2814 if (magics.s > 0) {
2815 Q = DAG.getNode(ISD::SRA, VT, Q,
2816 DAG.getConstant(magics.s, TLI.getShiftAmountTy()));
2817 WorkList.push_back(Q.Val);
2818 }
2819 // Extract the sign bit and add it to the quotient
2820 SDOperand T =
Nate Begeman4d385672005-10-21 01:51:45 +00002821 DAG.getNode(ISD::SRL, VT, Q, DAG.getConstant(MVT::getSizeInBits(VT)-1,
2822 TLI.getShiftAmountTy()));
Nate Begeman69575232005-10-20 02:15:44 +00002823 WorkList.push_back(T.Val);
2824 return DAG.getNode(ISD::ADD, VT, Q, T);
2825}
2826
2827/// BuildUDIVSequence - Given an ISD::UDIV node expressing a divide by constant,
2828/// return a DAG expression to select that will generate the same value by
2829/// multiplying by a magic number. See:
2830/// <http://the.wall.riscom.net/books/proc/ppc/cwg/code2.html>
2831SDOperand DAGCombiner::BuildUDIV(SDNode *N) {
2832 MVT::ValueType VT = N->getValueType(0);
Chris Lattnere9936d12005-10-22 18:50:15 +00002833
2834 // Check to see if we can do this.
2835 if (!TLI.isTypeLegal(VT) || (VT != MVT::i32 && VT != MVT::i64))
2836 return SDOperand(); // BuildUDIV only operates on i32 or i64
2837 if (!TLI.isOperationLegal(ISD::MULHU, VT))
2838 return SDOperand(); // Make sure the target supports MULHU.
Nate Begeman69575232005-10-20 02:15:44 +00002839
2840 uint64_t d = cast<ConstantSDNode>(N->getOperand(1))->getValue();
2841 mu magics = (VT == MVT::i32) ? magicu32(d) : magicu64(d);
2842
2843 // Multiply the numerator (operand 0) by the magic value
2844 SDOperand Q = DAG.getNode(ISD::MULHU, VT, N->getOperand(0),
2845 DAG.getConstant(magics.m, VT));
2846 WorkList.push_back(Q.Val);
2847
2848 if (magics.a == 0) {
2849 return DAG.getNode(ISD::SRL, VT, Q,
2850 DAG.getConstant(magics.s, TLI.getShiftAmountTy()));
2851 } else {
2852 SDOperand NPQ = DAG.getNode(ISD::SUB, VT, N->getOperand(0), Q);
2853 WorkList.push_back(NPQ.Val);
2854 NPQ = DAG.getNode(ISD::SRL, VT, NPQ,
2855 DAG.getConstant(1, TLI.getShiftAmountTy()));
2856 WorkList.push_back(NPQ.Val);
2857 NPQ = DAG.getNode(ISD::ADD, VT, NPQ, Q);
2858 WorkList.push_back(NPQ.Val);
2859 return DAG.getNode(ISD::SRL, VT, NPQ,
2860 DAG.getConstant(magics.s-1, TLI.getShiftAmountTy()));
2861 }
2862}
2863
Nate Begeman1d4d4142005-09-01 00:19:25 +00002864// SelectionDAG::Combine - This is the entry point for the file.
2865//
Nate Begeman4ebd8052005-09-01 23:24:04 +00002866void SelectionDAG::Combine(bool RunningAfterLegalize) {
Nate Begeman1d4d4142005-09-01 00:19:25 +00002867 /// run - This is the main entry point to this class.
2868 ///
Nate Begeman4ebd8052005-09-01 23:24:04 +00002869 DAGCombiner(*this).Run(RunningAfterLegalize);
Nate Begeman1d4d4142005-09-01 00:19:25 +00002870}