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Chris Lattner08084142003-01-13 00:26:36 +00001//===-- TargetInstrInfo.cpp - Target Instruction Information --------------===//
Misha Brukmanf976c852005-04-21 22:55:34 +00002//
John Criswellb576c942003-10-20 19:43:21 +00003// The LLVM Compiler Infrastructure
4//
Chris Lattner4ee451d2007-12-29 20:36:04 +00005// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
Misha Brukmanf976c852005-04-21 22:55:34 +00007//
John Criswellb576c942003-10-20 19:43:21 +00008//===----------------------------------------------------------------------===//
Chris Lattner93fa7052002-10-28 23:55:33 +00009//
Chris Lattner167b10c2005-01-19 06:53:34 +000010// This file implements the TargetInstrInfo class.
Chris Lattner93fa7052002-10-28 23:55:33 +000011//
12//===----------------------------------------------------------------------===//
13
Chris Lattner3501fea2003-01-14 22:00:31 +000014#include "llvm/Target/TargetInstrInfo.h"
Chris Lattnera187ed92002-11-17 22:53:03 +000015#include "llvm/CodeGen/MachineInstr.h"
Chris Lattner93fa7052002-10-28 23:55:33 +000016#include "llvm/Constant.h"
17#include "llvm/DerivedTypes.h"
Chris Lattner167b10c2005-01-19 06:53:34 +000018using namespace llvm;
Chris Lattner93fa7052002-10-28 23:55:33 +000019
Evan Chengcc22a7a2006-12-08 18:45:48 +000020/// findTiedToSrcOperand - Returns the operand that is tied to the specified
21/// dest operand. Returns -1 if there isn't one.
22int TargetInstrDescriptor::findTiedToSrcOperand(unsigned OpNum) const {
23 for (unsigned i = 0, e = numOperands; i != e; ++i) {
24 if (i == OpNum)
25 continue;
26 if (getOperandConstraint(i, TOI::TIED_TO) == (int)OpNum)
27 return i;
28 }
29 return -1;
30}
31
32
Chris Lattner08084142003-01-13 00:26:36 +000033TargetInstrInfo::TargetInstrInfo(const TargetInstrDescriptor* Desc,
Misha Brukman7847fca2005-04-22 17:54:37 +000034 unsigned numOpcodes)
Chris Lattnerdce363d2004-02-29 06:31:44 +000035 : desc(Desc), NumOpcodes(numOpcodes) {
Chris Lattner93fa7052002-10-28 23:55:33 +000036}
37
Chris Lattner08084142003-01-13 00:26:36 +000038TargetInstrInfo::~TargetInstrInfo() {
Chris Lattner93fa7052002-10-28 23:55:33 +000039}
40
Chris Lattner167b10c2005-01-19 06:53:34 +000041// commuteInstruction - The default implementation of this method just exchanges
42// operand 1 and 2.
43MachineInstr *TargetInstrInfo::commuteInstruction(MachineInstr *MI) const {
44 assert(MI->getOperand(1).isRegister() && MI->getOperand(2).isRegister() &&
45 "This only knows how to commute register operands so far");
46 unsigned Reg1 = MI->getOperand(1).getReg();
Evan Cheng31ff1ff2006-05-12 01:46:26 +000047 unsigned Reg2 = MI->getOperand(2).getReg();
Evan Chengff608a72006-11-15 20:56:03 +000048 bool Reg1IsKill = MI->getOperand(1).isKill();
49 bool Reg2IsKill = MI->getOperand(2).isKill();
Chris Lattnere53f4a02006-05-04 17:52:23 +000050 MI->getOperand(2).setReg(Reg1);
51 MI->getOperand(1).setReg(Reg2);
Chris Lattnerf7382302007-12-30 21:56:09 +000052 MI->getOperand(2).setIsKill(Reg1IsKill);
53 MI->getOperand(1).setIsKill(Reg2IsKill);
Chris Lattner167b10c2005-01-19 06:53:34 +000054 return MI;
55}
Evan Cheng2eb80fa2007-05-16 21:20:37 +000056
Evan Cheng02c602b2007-05-16 21:53:07 +000057bool TargetInstrInfo::PredicateInstruction(MachineInstr *MI,
Evan Chengf277ee42007-05-29 18:35:22 +000058 const std::vector<MachineOperand> &Pred) const {
Evan Cheng02c602b2007-05-16 21:53:07 +000059 bool MadeChange = false;
Evan Cheng2eb80fa2007-05-16 21:20:37 +000060 const TargetInstrDescriptor *TID = MI->getInstrDescriptor();
Evan Cheng02c602b2007-05-16 21:53:07 +000061 if (TID->Flags & M_PREDICABLE) {
62 for (unsigned j = 0, i = 0, e = MI->getNumOperands(); i != e; ++i) {
63 if ((TID->OpInfo[i].Flags & M_PREDICATE_OPERAND)) {
64 MachineOperand &MO = MI->getOperand(i);
Dan Gohman92dfe202007-09-14 20:33:02 +000065 if (MO.isRegister()) {
Evan Chengd9073302007-05-23 07:21:11 +000066 MO.setReg(Pred[j].getReg());
Evan Cheng02c602b2007-05-16 21:53:07 +000067 MadeChange = true;
Dan Gohman92dfe202007-09-14 20:33:02 +000068 } else if (MO.isImmediate()) {
Chris Lattner9a1ceae2007-12-30 20:49:49 +000069 MO.setImm(Pred[j].getImm());
Evan Cheng02c602b2007-05-16 21:53:07 +000070 MadeChange = true;
Dan Gohman92dfe202007-09-14 20:33:02 +000071 } else if (MO.isMachineBasicBlock()) {
Evan Chengd9073302007-05-23 07:21:11 +000072 MO.setMachineBasicBlock(Pred[j].getMachineBasicBlock());
Evan Cheng02c602b2007-05-16 21:53:07 +000073 MadeChange = true;
74 }
75 ++j;
76 }
Evan Cheng2eb80fa2007-05-16 21:20:37 +000077 }
78 }
Evan Cheng02c602b2007-05-16 21:53:07 +000079 return MadeChange;
Evan Cheng2eb80fa2007-05-16 21:20:37 +000080}
Evan Chengbfd2ec42007-06-08 21:59:56 +000081
82bool TargetInstrInfo::isUnpredicatedTerminator(const MachineInstr *MI) const {
83 const TargetInstrDescriptor *TID = MI->getInstrDescriptor();
Evan Cheng0e4a2762007-07-05 07:06:46 +000084 if (TID->Flags & M_TERMINATOR_FLAG) {
Evan Cheng14c46552007-07-06 23:22:03 +000085 // Conditional branch is a special case.
86 if ((TID->Flags & M_BRANCH_FLAG) != 0 && (TID->Flags & M_BARRIER_FLAG) == 0)
87 return true;
Evan Cheng0e4a2762007-07-05 07:06:46 +000088 if ((TID->Flags & M_PREDICABLE) == 0)
89 return true;
Evan Chengbfd2ec42007-06-08 21:59:56 +000090 return !isPredicated(MI);
Evan Cheng14c46552007-07-06 23:22:03 +000091 }
Evan Chengbfd2ec42007-06-08 21:59:56 +000092 return false;
93}