Chris Lattner | ee6b5f6 | 2003-07-29 23:07:13 +0000 | [diff] [blame] | 1 | //===- Target.td - Target Independent TableGen interface --------*- C++ -*-===// |
| 2 | // |
| 3 | // This file defines the target-independent interfaces which should be |
| 4 | // implemented by each target which is using a TableGen based code generator. |
| 5 | // |
Misha Brukman | 01c1638 | 2003-05-29 18:48:17 +0000 | [diff] [blame] | 6 | //===----------------------------------------------------------------------===// |
| 7 | |
Chris Lattner | b3aa319 | 2003-07-28 04:24:59 +0000 | [diff] [blame] | 8 | // Value types - These values correspond to the register types defined in the |
Chris Lattner | 84c40c1 | 2003-07-29 23:02:49 +0000 | [diff] [blame] | 9 | // ValueTypes.h file. |
| 10 | class ValueType { string Namespace = "MVT"; } |
Chris Lattner | b3aa319 | 2003-07-28 04:24:59 +0000 | [diff] [blame] | 11 | def i1 : ValueType; // One bit boolean value |
| 12 | def i8 : ValueType; // 8-bit integer value |
| 13 | def i16 : ValueType; // 16-bit integer value |
| 14 | def i32 : ValueType; // 32-bit integer value |
| 15 | def i64 : ValueType; // 64-bit integer value |
| 16 | def i128 : ValueType; // 128-bit integer value |
| 17 | def f32 : ValueType; // 32-bit floating point value |
| 18 | def f64 : ValueType; // 64-bit floating point value |
| 19 | def f80 : ValueType; // 80-bit floating point value |
| 20 | def f128 : ValueType; // 128-bit floating point value |
| 21 | |
Misha Brukman | 01c1638 | 2003-05-29 18:48:17 +0000 | [diff] [blame] | 22 | class Register { |
| 23 | string Namespace = ""; |
Chris Lattner | b3aa319 | 2003-07-28 04:24:59 +0000 | [diff] [blame] | 24 | ValueType RegType; |
Misha Brukman | 01c1638 | 2003-05-29 18:48:17 +0000 | [diff] [blame] | 25 | } |
| 26 | |
| 27 | class Instruction { |
| 28 | string Name; // The opcode string for this instruction |
| 29 | string Namespace = ""; |
| 30 | |
| 31 | list<Register> Uses = []; // Default to using no non-operand registers |
| 32 | list<Register> Defs = []; // Default to modifying no non-operand registers |
| 33 | |
| 34 | // These bits capture information about the high-level semantics of the |
| 35 | // instruction. |
Chris Lattner | 84c40c1 | 2003-07-29 23:02:49 +0000 | [diff] [blame] | 36 | bit isReturn = 0; // Is this instruction a return instruction? |
| 37 | bit isBranch = 0; // Is this instruction a branch instruction? |
| 38 | bit isCall = 0; // Is this instruction a call instruction? |
| 39 | bit isTwoAddress = 0; // Is this a two address instruction? |
| 40 | bit isTerminator = 0; // Is this part of the terminator for a basic block? |
Misha Brukman | 01c1638 | 2003-05-29 18:48:17 +0000 | [diff] [blame] | 41 | } |