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Dan Gohmanf17a25c2007-07-18 16:29:46 +00001//===-- AlphaTargetMachine.cpp - Define TargetMachine for Alpha -----------===//
2//
3// The LLVM Compiler Infrastructure
4//
Chris Lattner081ce942007-12-29 20:36:04 +00005// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
Dan Gohmanf17a25c2007-07-18 16:29:46 +00007//
8//===----------------------------------------------------------------------===//
9//
10//
11//===----------------------------------------------------------------------===//
12
13#include "Alpha.h"
14#include "AlphaJITInfo.h"
15#include "AlphaTargetAsmInfo.h"
16#include "AlphaTargetMachine.h"
17#include "llvm/Module.h"
18#include "llvm/PassManager.h"
19#include "llvm/Target/TargetMachineRegistry.h"
David Greene302008d2009-07-14 20:18:05 +000020#include "llvm/Support/FormattedStream.h"
Dan Gohmanf17a25c2007-07-18 16:29:46 +000021
22using namespace llvm;
23
Dan Gohman089efff2008-05-13 00:00:25 +000024// Register the targets
Daniel Dunbarfe5939f2009-07-15 20:24:03 +000025extern Target TheAlphaTarget;
26static RegisterTarget<AlphaTargetMachine> X(TheAlphaTarget, "alpha",
27 "Alpha [experimental]");
Dan Gohmanf17a25c2007-07-18 16:29:46 +000028
Bob Wilsonebbc1c42009-06-23 23:59:40 +000029// Force static initialization.
30extern "C" void LLVMInitializeAlphaTarget() { }
Douglas Gregor1dc5ff42009-06-16 20:12:29 +000031
Dan Gohmanf17a25c2007-07-18 16:29:46 +000032const TargetAsmInfo *AlphaTargetMachine::createTargetAsmInfo() const {
33 return new AlphaTargetAsmInfo(*this);
34}
35
Daniel Dunbarfe5939f2009-07-15 20:24:03 +000036AlphaTargetMachine::AlphaTargetMachine(const Target &T, const Module &M,
37 const std::string &FS)
38 : LLVMTargetMachine(T),
39 DataLayout("e-f128:128:128"),
Dan Gohmanf17a25c2007-07-18 16:29:46 +000040 FrameInfo(TargetFrameInfo::StackGrowsDown, 16, 0),
41 JITInfo(*this),
42 Subtarget(M, FS),
43 TLInfo(*this) {
44 setRelocationModel(Reloc::PIC_);
45}
46
47
48//===----------------------------------------------------------------------===//
49// Pass Pipeline Configuration
50//===----------------------------------------------------------------------===//
51
Bill Wendling58ed5d22009-04-29 00:15:41 +000052bool AlphaTargetMachine::addInstSelector(PassManagerBase &PM,
Bill Wendling5ed22ac2009-04-29 23:29:43 +000053 CodeGenOpt::Level OptLevel) {
Dan Gohmanf17a25c2007-07-18 16:29:46 +000054 PM.add(createAlphaISelDag(*this));
55 return false;
56}
Bill Wendling58ed5d22009-04-29 00:15:41 +000057bool AlphaTargetMachine::addPreEmitPass(PassManagerBase &PM,
Bill Wendling5ed22ac2009-04-29 23:29:43 +000058 CodeGenOpt::Level OptLevel) {
Dan Gohmanf17a25c2007-07-18 16:29:46 +000059 // Must run branch selection immediately preceding the asm printer
60 PM.add(createAlphaBranchSelectionPass());
Chris Lattnerb7720eb2009-07-15 21:40:24 +000061 PM.add(createAlphaLLRPPass(*this));
Dan Gohmanf17a25c2007-07-18 16:29:46 +000062 return false;
63}
Bill Wendling58ed5d22009-04-29 00:15:41 +000064bool AlphaTargetMachine::addAssemblyEmitter(PassManagerBase &PM,
Bill Wendling5ed22ac2009-04-29 23:29:43 +000065 CodeGenOpt::Level OptLevel,
Evan Cheng42ceb472009-03-25 01:47:28 +000066 bool Verbose,
David Greene302008d2009-07-14 20:18:05 +000067 formatted_raw_ostream &Out) {
Daniel Dunbarb3cbc672009-07-15 22:01:32 +000068 FunctionPass *Printer = getTarget().createAsmPrinter(Out, *this, Verbose);
69 if (!Printer)
70 llvm_report_error("unable to create assembly printer");
71 PM.add(Printer);
Dan Gohmanf17a25c2007-07-18 16:29:46 +000072 return false;
73}
Bill Wendling5ed22ac2009-04-29 23:29:43 +000074bool AlphaTargetMachine::addCodeEmitter(PassManagerBase &PM,
75 CodeGenOpt::Level OptLevel,
Evan Cheng77547212007-07-20 21:56:13 +000076 bool DumpAsm, MachineCodeEmitter &MCE) {
Dan Gohmanf17a25c2007-07-18 16:29:46 +000077 PM.add(createAlphaCodeEmitterPass(*this, MCE));
Daniel Dunbarb3cbc672009-07-15 22:01:32 +000078 if (DumpAsm)
79 addAssemblyEmitter(PM, OptLevel, true, ferrs());
Dan Gohmanf17a25c2007-07-18 16:29:46 +000080 return false;
81}
Bruno Cardoso Lopes1ea31ff2009-05-30 20:51:52 +000082bool AlphaTargetMachine::addCodeEmitter(PassManagerBase &PM,
83 CodeGenOpt::Level OptLevel,
84 bool DumpAsm, JITCodeEmitter &JCE) {
85 PM.add(createAlphaJITCodeEmitterPass(*this, JCE));
Daniel Dunbarb3cbc672009-07-15 22:01:32 +000086 if (DumpAsm)
87 addAssemblyEmitter(PM, OptLevel, true, ferrs());
Bruno Cardoso Lopes1ea31ff2009-05-30 20:51:52 +000088 return false;
89}
Bruno Cardoso Lopesaabb9a52009-07-06 05:09:34 +000090bool AlphaTargetMachine::addCodeEmitter(PassManagerBase &PM,
91 CodeGenOpt::Level OptLevel,
92 bool DumpAsm, ObjectCodeEmitter &OCE) {
93 PM.add(createAlphaObjectCodeEmitterPass(*this, OCE));
Daniel Dunbarb3cbc672009-07-15 22:01:32 +000094 if (DumpAsm)
95 addAssemblyEmitter(PM, OptLevel, true, ferrs());
Bruno Cardoso Lopesaabb9a52009-07-06 05:09:34 +000096 return false;
97}
Dan Gohmane34aa772008-03-11 22:29:46 +000098bool AlphaTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
Bill Wendling5ed22ac2009-04-29 23:29:43 +000099 CodeGenOpt::Level OptLevel,
100 bool DumpAsm,
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000101 MachineCodeEmitter &MCE) {
Bill Wendling58ed5d22009-04-29 00:15:41 +0000102 return addCodeEmitter(PM, OptLevel, DumpAsm, MCE);
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000103}
Bruno Cardoso Lopes1ea31ff2009-05-30 20:51:52 +0000104bool AlphaTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
105 CodeGenOpt::Level OptLevel,
106 bool DumpAsm,
107 JITCodeEmitter &JCE) {
108 return addCodeEmitter(PM, OptLevel, DumpAsm, JCE);
109}
Bruno Cardoso Lopesaabb9a52009-07-06 05:09:34 +0000110bool AlphaTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
111 CodeGenOpt::Level OptLevel,
112 bool DumpAsm,
113 ObjectCodeEmitter &OCE) {
114 return addCodeEmitter(PM, OptLevel, DumpAsm, OCE);
115}
Bruno Cardoso Lopes1ea31ff2009-05-30 20:51:52 +0000116