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Evan Cheng09e8ca82008-10-20 21:44:59 +00001//===-- PreAllocSplitting.cpp - Pre-allocation Interval Spltting Pass. ----===//
2//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file implements the machine instruction level pre-register allocation
11// live interval splitting pass. It finds live interval barriers, i.e.
12// instructions which will kill all physical registers in certain register
13// classes, and split all live intervals which cross the barrier.
14//
15//===----------------------------------------------------------------------===//
16
17#define DEBUG_TYPE "pre-alloc-split"
18#include "llvm/CodeGen/LiveIntervalAnalysis.h"
Evan Chengd0e32c52008-10-29 05:06:14 +000019#include "llvm/CodeGen/LiveStackAnalysis.h"
Owen Andersonf1f75b12008-11-04 22:22:41 +000020#include "llvm/CodeGen/MachineDominators.h"
Evan Chengf5cd4f02008-10-23 20:43:13 +000021#include "llvm/CodeGen/MachineFrameInfo.h"
Evan Cheng09e8ca82008-10-20 21:44:59 +000022#include "llvm/CodeGen/MachineFunctionPass.h"
23#include "llvm/CodeGen/MachineLoopInfo.h"
24#include "llvm/CodeGen/MachineRegisterInfo.h"
25#include "llvm/CodeGen/Passes.h"
26#include "llvm/CodeGen/RegisterCoalescer.h"
Evan Chengf5cd4f02008-10-23 20:43:13 +000027#include "llvm/Target/TargetInstrInfo.h"
Evan Cheng09e8ca82008-10-20 21:44:59 +000028#include "llvm/Target/TargetMachine.h"
29#include "llvm/Target/TargetOptions.h"
30#include "llvm/Target/TargetRegisterInfo.h"
31#include "llvm/Support/CommandLine.h"
32#include "llvm/Support/Debug.h"
Evan Chengd0e32c52008-10-29 05:06:14 +000033#include "llvm/ADT/DenseMap.h"
Evan Cheng54898932008-10-29 08:39:34 +000034#include "llvm/ADT/DepthFirstIterator.h"
Evan Cheng09e8ca82008-10-20 21:44:59 +000035#include "llvm/ADT/SmallPtrSet.h"
Evan Chengf5cd4f02008-10-23 20:43:13 +000036#include "llvm/ADT/Statistic.h"
Evan Cheng09e8ca82008-10-20 21:44:59 +000037using namespace llvm;
38
Evan Chengae7fa5b2008-10-28 01:48:24 +000039static cl::opt<int> PreSplitLimit("pre-split-limit", cl::init(-1), cl::Hidden);
40
41STATISTIC(NumSplits, "Number of intervals split");
Evan Chengf5cd4f02008-10-23 20:43:13 +000042
Evan Cheng09e8ca82008-10-20 21:44:59 +000043namespace {
44 class VISIBILITY_HIDDEN PreAllocSplitting : public MachineFunctionPass {
Evan Chengd0e32c52008-10-29 05:06:14 +000045 MachineFunction *CurrMF;
Evan Chengf5cd4f02008-10-23 20:43:13 +000046 const TargetMachine *TM;
47 const TargetInstrInfo *TII;
48 MachineFrameInfo *MFI;
49 MachineRegisterInfo *MRI;
50 LiveIntervals *LIs;
Evan Chengd0e32c52008-10-29 05:06:14 +000051 LiveStacks *LSs;
Evan Cheng09e8ca82008-10-20 21:44:59 +000052
Evan Chengf5cd4f02008-10-23 20:43:13 +000053 // Barrier - Current barrier being processed.
54 MachineInstr *Barrier;
55
56 // BarrierMBB - Basic block where the barrier resides in.
57 MachineBasicBlock *BarrierMBB;
58
59 // Barrier - Current barrier index.
60 unsigned BarrierIdx;
61
62 // CurrLI - Current live interval being split.
63 LiveInterval *CurrLI;
64
Evan Chengd0e32c52008-10-29 05:06:14 +000065 // CurrSLI - Current stack slot live interval.
66 LiveInterval *CurrSLI;
67
68 // CurrSValNo - Current val# for the stack slot live interval.
69 VNInfo *CurrSValNo;
70
71 // IntervalSSMap - A map from live interval to spill slots.
72 DenseMap<unsigned, int> IntervalSSMap;
Evan Chengf5cd4f02008-10-23 20:43:13 +000073
Evan Cheng54898932008-10-29 08:39:34 +000074 // Def2SpillMap - A map from a def instruction index to spill index.
75 DenseMap<unsigned, unsigned> Def2SpillMap;
Evan Cheng06587492008-10-24 02:05:00 +000076
Evan Cheng09e8ca82008-10-20 21:44:59 +000077 public:
78 static char ID;
79 PreAllocSplitting() : MachineFunctionPass(&ID) {}
80
81 virtual bool runOnMachineFunction(MachineFunction &MF);
82
83 virtual void getAnalysisUsage(AnalysisUsage &AU) const {
84 AU.addRequired<LiveIntervals>();
85 AU.addPreserved<LiveIntervals>();
Evan Chengd0e32c52008-10-29 05:06:14 +000086 AU.addRequired<LiveStacks>();
87 AU.addPreserved<LiveStacks>();
Evan Cheng09e8ca82008-10-20 21:44:59 +000088 AU.addPreserved<RegisterCoalescer>();
89 if (StrongPHIElim)
90 AU.addPreservedID(StrongPHIEliminationID);
91 else
92 AU.addPreservedID(PHIEliminationID);
Owen Andersonf1f75b12008-11-04 22:22:41 +000093 AU.addRequired<MachineDominatorTree>();
94 AU.addRequired<MachineLoopInfo>();
95 AU.addPreserved<MachineDominatorTree>();
96 AU.addPreserved<MachineLoopInfo>();
Evan Cheng09e8ca82008-10-20 21:44:59 +000097 MachineFunctionPass::getAnalysisUsage(AU);
98 }
99
100 virtual void releaseMemory() {
Evan Chengd0e32c52008-10-29 05:06:14 +0000101 IntervalSSMap.clear();
Evan Cheng54898932008-10-29 08:39:34 +0000102 Def2SpillMap.clear();
Evan Cheng09e8ca82008-10-20 21:44:59 +0000103 }
104
105 virtual const char *getPassName() const {
106 return "Pre-Register Allocaton Live Interval Splitting";
107 }
Evan Chengf5cd4f02008-10-23 20:43:13 +0000108
109 /// print - Implement the dump method.
110 virtual void print(std::ostream &O, const Module* M = 0) const {
111 LIs->print(O, M);
112 }
113
114 void print(std::ostream *O, const Module* M = 0) const {
115 if (O) print(*O, M);
116 }
117
118 private:
119 MachineBasicBlock::iterator
120 findNextEmptySlot(MachineBasicBlock*, MachineInstr*,
121 unsigned&);
122
123 MachineBasicBlock::iterator
Evan Cheng1f08cc22008-10-28 05:28:21 +0000124 findSpillPoint(MachineBasicBlock*, MachineInstr*, MachineInstr*,
Evan Chengf5cd4f02008-10-23 20:43:13 +0000125 SmallPtrSet<MachineInstr*, 4>&, unsigned&);
126
127 MachineBasicBlock::iterator
Evan Chengf62ce372008-10-28 00:47:49 +0000128 findRestorePoint(MachineBasicBlock*, MachineInstr*, unsigned,
Evan Chengf5cd4f02008-10-23 20:43:13 +0000129 SmallPtrSet<MachineInstr*, 4>&, unsigned&);
130
Evan Chengd0e32c52008-10-29 05:06:14 +0000131 int CreateSpillStackSlot(unsigned, const TargetRegisterClass *);
Evan Chengf5cd4f02008-10-23 20:43:13 +0000132
Evan Cheng54898932008-10-29 08:39:34 +0000133 bool IsAvailableInStack(MachineBasicBlock*, unsigned, unsigned, unsigned,
134 unsigned&, int&) const;
Evan Chengf5cd4f02008-10-23 20:43:13 +0000135
Evan Chengd0e32c52008-10-29 05:06:14 +0000136 void UpdateSpillSlotInterval(VNInfo*, unsigned, unsigned);
Evan Chengf5cd4f02008-10-23 20:43:13 +0000137
Evan Chengd0e32c52008-10-29 05:06:14 +0000138 void UpdateRegisterInterval(VNInfo*, unsigned, unsigned);
139
140 bool ShrinkWrapToLastUse(MachineBasicBlock*, VNInfo*,
Evan Cheng06587492008-10-24 02:05:00 +0000141 SmallVector<MachineOperand*, 4>&,
142 SmallPtrSet<MachineInstr*, 4>&);
Evan Chengf5cd4f02008-10-23 20:43:13 +0000143
Evan Chengaaf510c2008-10-26 07:49:03 +0000144 void ShrinkWrapLiveInterval(VNInfo*, MachineBasicBlock*, MachineBasicBlock*,
Evan Chengf5cd4f02008-10-23 20:43:13 +0000145 MachineBasicBlock*, SmallPtrSet<MachineBasicBlock*, 8>&,
Evan Cheng06587492008-10-24 02:05:00 +0000146 DenseMap<MachineBasicBlock*, SmallVector<MachineOperand*, 4> >&,
147 DenseMap<MachineBasicBlock*, SmallPtrSet<MachineInstr*, 4> >&,
148 SmallVector<MachineBasicBlock*, 4>&);
Evan Chengf5cd4f02008-10-23 20:43:13 +0000149
150 bool SplitRegLiveInterval(LiveInterval*);
151
152 bool SplitRegLiveIntervals(const TargetRegisterClass **);
Owen Andersonf1f75b12008-11-04 22:22:41 +0000153
154 bool createsNewJoin(LiveRange* LR, MachineBasicBlock* DefMBB,
155 MachineBasicBlock* BarrierMBB);
Evan Cheng09e8ca82008-10-20 21:44:59 +0000156 };
157} // end anonymous namespace
158
159char PreAllocSplitting::ID = 0;
160
161static RegisterPass<PreAllocSplitting>
162X("pre-alloc-splitting", "Pre-Register Allocation Live Interval Splitting");
163
164const PassInfo *const llvm::PreAllocSplittingID = &X;
165
Evan Chengf5cd4f02008-10-23 20:43:13 +0000166
167/// findNextEmptySlot - Find a gap after the given machine instruction in the
168/// instruction index map. If there isn't one, return end().
169MachineBasicBlock::iterator
170PreAllocSplitting::findNextEmptySlot(MachineBasicBlock *MBB, MachineInstr *MI,
171 unsigned &SpotIndex) {
172 MachineBasicBlock::iterator MII = MI;
173 if (++MII != MBB->end()) {
174 unsigned Index = LIs->findGapBeforeInstr(LIs->getInstructionIndex(MII));
175 if (Index) {
176 SpotIndex = Index;
177 return MII;
178 }
179 }
180 return MBB->end();
181}
182
183/// findSpillPoint - Find a gap as far away from the given MI that's suitable
184/// for spilling the current live interval. The index must be before any
185/// defs and uses of the live interval register in the mbb. Return begin() if
186/// none is found.
187MachineBasicBlock::iterator
188PreAllocSplitting::findSpillPoint(MachineBasicBlock *MBB, MachineInstr *MI,
Evan Cheng1f08cc22008-10-28 05:28:21 +0000189 MachineInstr *DefMI,
Evan Chengf5cd4f02008-10-23 20:43:13 +0000190 SmallPtrSet<MachineInstr*, 4> &RefsInMBB,
191 unsigned &SpillIndex) {
192 MachineBasicBlock::iterator Pt = MBB->begin();
193
194 // Go top down if RefsInMBB is empty.
Evan Cheng1f08cc22008-10-28 05:28:21 +0000195 if (RefsInMBB.empty() && !DefMI) {
Evan Chengf5cd4f02008-10-23 20:43:13 +0000196 MachineBasicBlock::iterator MII = MBB->begin();
197 MachineBasicBlock::iterator EndPt = MI;
198 do {
199 ++MII;
200 unsigned Index = LIs->getInstructionIndex(MII);
201 unsigned Gap = LIs->findGapBeforeInstr(Index);
202 if (Gap) {
203 Pt = MII;
204 SpillIndex = Gap;
205 break;
206 }
207 } while (MII != EndPt);
208 } else {
209 MachineBasicBlock::iterator MII = MI;
Evan Cheng1f08cc22008-10-28 05:28:21 +0000210 MachineBasicBlock::iterator EndPt = DefMI
211 ? MachineBasicBlock::iterator(DefMI) : MBB->begin();
212 while (MII != EndPt && !RefsInMBB.count(MII)) {
Evan Chengf5cd4f02008-10-23 20:43:13 +0000213 unsigned Index = LIs->getInstructionIndex(MII);
214 if (LIs->hasGapBeforeInstr(Index)) {
215 Pt = MII;
216 SpillIndex = LIs->findGapBeforeInstr(Index, true);
217 }
218 --MII;
219 }
220 }
221
222 return Pt;
223}
224
225/// findRestorePoint - Find a gap in the instruction index map that's suitable
226/// for restoring the current live interval value. The index must be before any
227/// uses of the live interval register in the mbb. Return end() if none is
228/// found.
229MachineBasicBlock::iterator
230PreAllocSplitting::findRestorePoint(MachineBasicBlock *MBB, MachineInstr *MI,
Evan Chengf62ce372008-10-28 00:47:49 +0000231 unsigned LastIdx,
Evan Chengf5cd4f02008-10-23 20:43:13 +0000232 SmallPtrSet<MachineInstr*, 4> &RefsInMBB,
233 unsigned &RestoreIndex) {
Evan Cheng54898932008-10-29 08:39:34 +0000234 // FIXME: Allow spill to be inserted to the beginning of the mbb. Update mbb
235 // begin index accordingly.
Evan Chengf5cd4f02008-10-23 20:43:13 +0000236 MachineBasicBlock::iterator Pt = MBB->end();
Evan Chengf62ce372008-10-28 00:47:49 +0000237 unsigned EndIdx = LIs->getMBBEndIdx(MBB);
Evan Chengf5cd4f02008-10-23 20:43:13 +0000238
Evan Chengf62ce372008-10-28 00:47:49 +0000239 // Go bottom up if RefsInMBB is empty and the end of the mbb isn't beyond
240 // the last index in the live range.
241 if (RefsInMBB.empty() && LastIdx >= EndIdx) {
Evan Chengf5cd4f02008-10-23 20:43:13 +0000242 MachineBasicBlock::iterator MII = MBB->end();
243 MachineBasicBlock::iterator EndPt = MI;
Evan Cheng54898932008-10-29 08:39:34 +0000244 --MII;
Evan Chengf5cd4f02008-10-23 20:43:13 +0000245 do {
Evan Chengf5cd4f02008-10-23 20:43:13 +0000246 unsigned Index = LIs->getInstructionIndex(MII);
Evan Cheng56ab0de2008-10-24 18:46:44 +0000247 unsigned Gap = LIs->findGapBeforeInstr(Index);
Evan Chengf5cd4f02008-10-23 20:43:13 +0000248 if (Gap) {
249 Pt = MII;
250 RestoreIndex = Gap;
251 break;
252 }
Evan Cheng54898932008-10-29 08:39:34 +0000253 --MII;
Evan Chengf5cd4f02008-10-23 20:43:13 +0000254 } while (MII != EndPt);
255 } else {
256 MachineBasicBlock::iterator MII = MI;
257 MII = ++MII;
Evan Chengf62ce372008-10-28 00:47:49 +0000258 // FIXME: Limit the number of instructions to examine to reduce
259 // compile time?
Evan Chengf5cd4f02008-10-23 20:43:13 +0000260 while (MII != MBB->end()) {
261 unsigned Index = LIs->getInstructionIndex(MII);
Evan Chengf62ce372008-10-28 00:47:49 +0000262 if (Index > LastIdx)
263 break;
Evan Chengf5cd4f02008-10-23 20:43:13 +0000264 unsigned Gap = LIs->findGapBeforeInstr(Index);
265 if (Gap) {
266 Pt = MII;
267 RestoreIndex = Gap;
268 }
269 if (RefsInMBB.count(MII))
270 break;
271 ++MII;
272 }
273 }
274
275 return Pt;
276}
277
Evan Chengd0e32c52008-10-29 05:06:14 +0000278/// CreateSpillStackSlot - Create a stack slot for the live interval being
279/// split. If the live interval was previously split, just reuse the same
280/// slot.
281int PreAllocSplitting::CreateSpillStackSlot(unsigned Reg,
282 const TargetRegisterClass *RC) {
283 int SS;
284 DenseMap<unsigned, int>::iterator I = IntervalSSMap.find(Reg);
285 if (I != IntervalSSMap.end()) {
286 SS = I->second;
287 } else {
288 SS = MFI->CreateStackObject(RC->getSize(), RC->getAlignment());
289 IntervalSSMap[Reg] = SS;
Evan Cheng06587492008-10-24 02:05:00 +0000290 }
Evan Chengd0e32c52008-10-29 05:06:14 +0000291
292 // Create live interval for stack slot.
293 CurrSLI = &LSs->getOrCreateInterval(SS);
Evan Cheng54898932008-10-29 08:39:34 +0000294 if (CurrSLI->hasAtLeastOneValue())
Evan Chengd0e32c52008-10-29 05:06:14 +0000295 CurrSValNo = CurrSLI->getValNumInfo(0);
296 else
297 CurrSValNo = CurrSLI->getNextValue(~0U, 0, LSs->getVNInfoAllocator());
298 return SS;
Evan Chengf5cd4f02008-10-23 20:43:13 +0000299}
300
Evan Chengd0e32c52008-10-29 05:06:14 +0000301/// IsAvailableInStack - Return true if register is available in a split stack
302/// slot at the specified index.
303bool
Evan Cheng54898932008-10-29 08:39:34 +0000304PreAllocSplitting::IsAvailableInStack(MachineBasicBlock *DefMBB,
305 unsigned Reg, unsigned DefIndex,
306 unsigned RestoreIndex, unsigned &SpillIndex,
307 int& SS) const {
308 if (!DefMBB)
309 return false;
310
Evan Chengd0e32c52008-10-29 05:06:14 +0000311 DenseMap<unsigned, int>::iterator I = IntervalSSMap.find(Reg);
312 if (I == IntervalSSMap.end())
Evan Chengf5cd4f02008-10-23 20:43:13 +0000313 return false;
Evan Cheng54898932008-10-29 08:39:34 +0000314 DenseMap<unsigned, unsigned>::iterator II = Def2SpillMap.find(DefIndex);
315 if (II == Def2SpillMap.end())
316 return false;
317
318 // If last spill of def is in the same mbb as barrier mbb (where restore will
319 // be), make sure it's not below the intended restore index.
320 // FIXME: Undo the previous spill?
321 assert(LIs->getMBBFromIndex(II->second) == DefMBB);
322 if (DefMBB == BarrierMBB && II->second >= RestoreIndex)
323 return false;
324
325 SS = I->second;
326 SpillIndex = II->second;
327 return true;
Evan Chengf5cd4f02008-10-23 20:43:13 +0000328}
329
Evan Chengd0e32c52008-10-29 05:06:14 +0000330/// UpdateSpillSlotInterval - Given the specified val# of the register live
331/// interval being split, and the spill and restore indicies, update the live
332/// interval of the spill stack slot.
333void
334PreAllocSplitting::UpdateSpillSlotInterval(VNInfo *ValNo, unsigned SpillIndex,
335 unsigned RestoreIndex) {
Evan Cheng54898932008-10-29 08:39:34 +0000336 assert(LIs->getMBBFromIndex(RestoreIndex) == BarrierMBB &&
337 "Expect restore in the barrier mbb");
338
339 MachineBasicBlock *MBB = LIs->getMBBFromIndex(SpillIndex);
340 if (MBB == BarrierMBB) {
341 // Intra-block spill + restore. We are done.
Evan Chengd0e32c52008-10-29 05:06:14 +0000342 LiveRange SLR(SpillIndex, RestoreIndex, CurrSValNo);
343 CurrSLI->addRange(SLR);
344 return;
345 }
346
Evan Cheng54898932008-10-29 08:39:34 +0000347 SmallPtrSet<MachineBasicBlock*, 4> Processed;
348 unsigned EndIdx = LIs->getMBBEndIdx(MBB);
349 LiveRange SLR(SpillIndex, EndIdx+1, CurrSValNo);
Evan Chengd0e32c52008-10-29 05:06:14 +0000350 CurrSLI->addRange(SLR);
Evan Cheng54898932008-10-29 08:39:34 +0000351 Processed.insert(MBB);
Evan Chengd0e32c52008-10-29 05:06:14 +0000352
353 // Start from the spill mbb, figure out the extend of the spill slot's
354 // live interval.
355 SmallVector<MachineBasicBlock*, 4> WorkList;
Evan Cheng54898932008-10-29 08:39:34 +0000356 const LiveRange *LR = CurrLI->getLiveRangeContaining(SpillIndex);
357 if (LR->end > EndIdx)
Evan Chengd0e32c52008-10-29 05:06:14 +0000358 // If live range extend beyond end of mbb, add successors to work list.
359 for (MachineBasicBlock::succ_iterator SI = MBB->succ_begin(),
360 SE = MBB->succ_end(); SI != SE; ++SI)
361 WorkList.push_back(*SI);
Evan Chengd0e32c52008-10-29 05:06:14 +0000362
363 while (!WorkList.empty()) {
364 MachineBasicBlock *MBB = WorkList.back();
365 WorkList.pop_back();
Evan Cheng54898932008-10-29 08:39:34 +0000366 if (Processed.count(MBB))
367 continue;
Evan Chengd0e32c52008-10-29 05:06:14 +0000368 unsigned Idx = LIs->getMBBStartIdx(MBB);
369 LR = CurrLI->getLiveRangeContaining(Idx);
Evan Cheng54898932008-10-29 08:39:34 +0000370 if (LR && LR->valno == ValNo) {
371 EndIdx = LIs->getMBBEndIdx(MBB);
372 if (Idx <= RestoreIndex && RestoreIndex < EndIdx) {
Evan Chengd0e32c52008-10-29 05:06:14 +0000373 // Spill slot live interval stops at the restore.
Evan Cheng54898932008-10-29 08:39:34 +0000374 LiveRange SLR(Idx, RestoreIndex, CurrSValNo);
Evan Chengd0e32c52008-10-29 05:06:14 +0000375 CurrSLI->addRange(SLR);
Evan Cheng54898932008-10-29 08:39:34 +0000376 } else if (LR->end > EndIdx) {
377 // Live range extends beyond end of mbb, process successors.
378 LiveRange SLR(Idx, EndIdx+1, CurrSValNo);
379 CurrSLI->addRange(SLR);
380 for (MachineBasicBlock::succ_iterator SI = MBB->succ_begin(),
381 SE = MBB->succ_end(); SI != SE; ++SI)
382 WorkList.push_back(*SI);
Evan Chengd0e32c52008-10-29 05:06:14 +0000383 } else {
Evan Cheng54898932008-10-29 08:39:34 +0000384 LiveRange SLR(Idx, LR->end, CurrSValNo);
Evan Chengd0e32c52008-10-29 05:06:14 +0000385 CurrSLI->addRange(SLR);
Evan Chengd0e32c52008-10-29 05:06:14 +0000386 }
Evan Cheng54898932008-10-29 08:39:34 +0000387 Processed.insert(MBB);
Evan Chengd0e32c52008-10-29 05:06:14 +0000388 }
389 }
390}
391
392/// UpdateRegisterInterval - Given the specified val# of the current live
393/// interval is being split, and the spill and restore indices, update the live
Evan Chengf5cd4f02008-10-23 20:43:13 +0000394/// interval accordingly.
395void
Evan Chengd0e32c52008-10-29 05:06:14 +0000396PreAllocSplitting::UpdateRegisterInterval(VNInfo *ValNo, unsigned SpillIndex,
397 unsigned RestoreIndex) {
Evan Cheng54898932008-10-29 08:39:34 +0000398 assert(LIs->getMBBFromIndex(RestoreIndex) == BarrierMBB &&
399 "Expect restore in the barrier mbb");
400
Evan Chengf5cd4f02008-10-23 20:43:13 +0000401 SmallVector<std::pair<unsigned,unsigned>, 4> Before;
402 SmallVector<std::pair<unsigned,unsigned>, 4> After;
403 SmallVector<unsigned, 4> BeforeKills;
404 SmallVector<unsigned, 4> AfterKills;
405 SmallPtrSet<const LiveRange*, 4> Processed;
406
407 // First, let's figure out which parts of the live interval is now defined
408 // by the restore, which are defined by the original definition.
Evan Chengd0e32c52008-10-29 05:06:14 +0000409 const LiveRange *LR = CurrLI->getLiveRangeContaining(RestoreIndex);
410 After.push_back(std::make_pair(RestoreIndex, LR->end));
Evan Cheng06587492008-10-24 02:05:00 +0000411 if (CurrLI->isKill(ValNo, LR->end))
412 AfterKills.push_back(LR->end);
413
Evan Chengd0e32c52008-10-29 05:06:14 +0000414 assert(LR->contains(SpillIndex));
415 if (SpillIndex > LR->start) {
416 Before.push_back(std::make_pair(LR->start, SpillIndex));
417 BeforeKills.push_back(SpillIndex);
Evan Cheng06587492008-10-24 02:05:00 +0000418 }
Evan Chengf5cd4f02008-10-23 20:43:13 +0000419 Processed.insert(LR);
420
Evan Chengd0e32c52008-10-29 05:06:14 +0000421 // Start from the restore mbb, figure out what part of the live interval
422 // are defined by the restore.
Evan Chengf5cd4f02008-10-23 20:43:13 +0000423 SmallVector<MachineBasicBlock*, 4> WorkList;
Evan Cheng54898932008-10-29 08:39:34 +0000424 MachineBasicBlock *MBB = BarrierMBB;
Evan Chengf5cd4f02008-10-23 20:43:13 +0000425 for (MachineBasicBlock::succ_iterator SI = MBB->succ_begin(),
426 SE = MBB->succ_end(); SI != SE; ++SI)
427 WorkList.push_back(*SI);
428
429 while (!WorkList.empty()) {
430 MBB = WorkList.back();
431 WorkList.pop_back();
432 unsigned Idx = LIs->getMBBStartIdx(MBB);
433 LR = CurrLI->getLiveRangeContaining(Idx);
434 if (LR && LR->valno == ValNo && !Processed.count(LR)) {
435 After.push_back(std::make_pair(LR->start, LR->end));
436 if (CurrLI->isKill(ValNo, LR->end))
437 AfterKills.push_back(LR->end);
438 Idx = LIs->getMBBEndIdx(MBB);
439 if (LR->end > Idx) {
Evan Chengd0e32c52008-10-29 05:06:14 +0000440 // Live range extend beyond at least one mbb. Let's see what other
441 // mbbs it reaches.
442 LIs->findReachableMBBs(LR->start, LR->end, WorkList);
Evan Chengf5cd4f02008-10-23 20:43:13 +0000443 }
444 Processed.insert(LR);
445 }
446 }
447
448 for (LiveInterval::iterator I = CurrLI->begin(), E = CurrLI->end();
449 I != E; ++I) {
450 LiveRange *LR = I;
451 if (LR->valno == ValNo && !Processed.count(LR)) {
452 Before.push_back(std::make_pair(LR->start, LR->end));
453 if (CurrLI->isKill(ValNo, LR->end))
454 BeforeKills.push_back(LR->end);
455 }
456 }
457
458 // Now create new val#s to represent the live ranges defined by the old def
459 // those defined by the restore.
460 unsigned AfterDef = ValNo->def;
461 MachineInstr *AfterCopy = ValNo->copy;
462 bool HasPHIKill = ValNo->hasPHIKill;
463 CurrLI->removeValNo(ValNo);
Evan Cheng06587492008-10-24 02:05:00 +0000464 VNInfo *BValNo = (Before.empty())
465 ? NULL
466 : CurrLI->getNextValue(AfterDef, AfterCopy, LIs->getVNInfoAllocator());
467 if (BValNo)
468 CurrLI->addKills(BValNo, BeforeKills);
469
470 VNInfo *AValNo = (After.empty())
471 ? NULL
Evan Chengd0e32c52008-10-29 05:06:14 +0000472 : CurrLI->getNextValue(RestoreIndex, 0, LIs->getVNInfoAllocator());
Evan Cheng06587492008-10-24 02:05:00 +0000473 if (AValNo) {
474 AValNo->hasPHIKill = HasPHIKill;
475 CurrLI->addKills(AValNo, AfterKills);
476 }
Evan Chengf5cd4f02008-10-23 20:43:13 +0000477
478 for (unsigned i = 0, e = Before.size(); i != e; ++i) {
479 unsigned Start = Before[i].first;
480 unsigned End = Before[i].second;
481 CurrLI->addRange(LiveRange(Start, End, BValNo));
482 }
483 for (unsigned i = 0, e = After.size(); i != e; ++i) {
484 unsigned Start = After[i].first;
485 unsigned End = After[i].second;
486 CurrLI->addRange(LiveRange(Start, End, AValNo));
487 }
488}
489
490/// ShrinkWrapToLastUse - There are uses of the current live interval in the
491/// given block, shrink wrap the live interval to the last use (i.e. remove
492/// from last use to the end of the mbb). In case mbb is the where the barrier
493/// is, remove from the last use to the barrier.
494bool
Evan Chengd0e32c52008-10-29 05:06:14 +0000495PreAllocSplitting::ShrinkWrapToLastUse(MachineBasicBlock *MBB, VNInfo *ValNo,
Evan Cheng06587492008-10-24 02:05:00 +0000496 SmallVector<MachineOperand*, 4> &Uses,
497 SmallPtrSet<MachineInstr*, 4> &UseMIs) {
Evan Chengf5cd4f02008-10-23 20:43:13 +0000498 MachineOperand *LastMO = 0;
499 MachineInstr *LastMI = 0;
500 if (MBB != BarrierMBB && Uses.size() == 1) {
501 // Single use, no need to traverse the block. We can't assume this for the
502 // barrier bb though since the use is probably below the barrier.
503 LastMO = Uses[0];
504 LastMI = LastMO->getParent();
505 } else {
Evan Cheng2efe3fd2008-10-24 05:53:44 +0000506 MachineBasicBlock::iterator MEE = MBB->begin();
Evan Chengf5cd4f02008-10-23 20:43:13 +0000507 MachineBasicBlock::iterator MII;
Evan Cheng2efe3fd2008-10-24 05:53:44 +0000508 if (MBB == BarrierMBB)
Evan Chengf5cd4f02008-10-23 20:43:13 +0000509 MII = Barrier;
Evan Cheng2efe3fd2008-10-24 05:53:44 +0000510 else
Evan Chengf5cd4f02008-10-23 20:43:13 +0000511 MII = MBB->end();
Evan Chengd0e32c52008-10-29 05:06:14 +0000512 while (MII != MEE) {
513 --MII;
Evan Chengf5cd4f02008-10-23 20:43:13 +0000514 MachineInstr *UseMI = &*MII;
515 if (!UseMIs.count(UseMI))
516 continue;
517 for (unsigned i = 0, e = UseMI->getNumOperands(); i != e; ++i) {
518 MachineOperand &MO = UseMI->getOperand(i);
519 if (MO.isReg() && MO.getReg() == CurrLI->reg) {
520 LastMO = &MO;
521 break;
522 }
523 }
524 LastMI = UseMI;
525 break;
526 }
527 }
528
529 // Cut off live range from last use (or beginning of the mbb if there
530 // are no uses in it) to the end of the mbb.
531 unsigned RangeStart, RangeEnd = LIs->getMBBEndIdx(MBB)+1;
532 if (LastMI) {
533 RangeStart = LIs->getUseIndex(LIs->getInstructionIndex(LastMI))+1;
534 assert(!LastMO->isKill() && "Last use already terminates the interval?");
535 LastMO->setIsKill();
536 } else {
537 assert(MBB == BarrierMBB);
538 RangeStart = LIs->getMBBStartIdx(MBB);
539 }
540 if (MBB == BarrierMBB)
Evan Cheng06587492008-10-24 02:05:00 +0000541 RangeEnd = LIs->getUseIndex(BarrierIdx)+1;
Evan Chengf5cd4f02008-10-23 20:43:13 +0000542 CurrLI->removeRange(RangeStart, RangeEnd);
Evan Chengd0e32c52008-10-29 05:06:14 +0000543 if (LastMI)
544 CurrLI->addKill(ValNo, RangeStart);
Evan Chengf5cd4f02008-10-23 20:43:13 +0000545
546 // Return true if the last use becomes a new kill.
547 return LastMI;
548}
549
550/// ShrinkWrapLiveInterval - Recursively traverse the predecessor
551/// chain to find the new 'kills' and shrink wrap the live interval to the
552/// new kill indices.
553void
Evan Chengaaf510c2008-10-26 07:49:03 +0000554PreAllocSplitting::ShrinkWrapLiveInterval(VNInfo *ValNo, MachineBasicBlock *MBB,
555 MachineBasicBlock *SuccMBB, MachineBasicBlock *DefMBB,
Evan Cheng06587492008-10-24 02:05:00 +0000556 SmallPtrSet<MachineBasicBlock*, 8> &Visited,
557 DenseMap<MachineBasicBlock*, SmallVector<MachineOperand*, 4> > &Uses,
558 DenseMap<MachineBasicBlock*, SmallPtrSet<MachineInstr*, 4> > &UseMIs,
559 SmallVector<MachineBasicBlock*, 4> &UseMBBs) {
Evan Chengaaf510c2008-10-26 07:49:03 +0000560 if (Visited.count(MBB))
Evan Chengf5cd4f02008-10-23 20:43:13 +0000561 return;
562
Evan Chengaaf510c2008-10-26 07:49:03 +0000563 // If live interval is live in another successor path, then we can't process
564 // this block. But we may able to do so after all the successors have been
565 // processed.
Evan Chengf62ce372008-10-28 00:47:49 +0000566 if (MBB != BarrierMBB) {
567 for (MachineBasicBlock::succ_iterator SI = MBB->succ_begin(),
568 SE = MBB->succ_end(); SI != SE; ++SI) {
569 MachineBasicBlock *SMBB = *SI;
570 if (SMBB == SuccMBB)
571 continue;
572 if (CurrLI->liveAt(LIs->getMBBStartIdx(SMBB)))
573 return;
574 }
Evan Chengaaf510c2008-10-26 07:49:03 +0000575 }
576
577 Visited.insert(MBB);
578
Evan Cheng06587492008-10-24 02:05:00 +0000579 DenseMap<MachineBasicBlock*, SmallVector<MachineOperand*, 4> >::iterator
580 UMII = Uses.find(MBB);
Evan Chengf5cd4f02008-10-23 20:43:13 +0000581 if (UMII != Uses.end()) {
582 // At least one use in this mbb, lets look for the kill.
Evan Cheng06587492008-10-24 02:05:00 +0000583 DenseMap<MachineBasicBlock*, SmallPtrSet<MachineInstr*, 4> >::iterator
584 UMII2 = UseMIs.find(MBB);
Evan Chengd0e32c52008-10-29 05:06:14 +0000585 if (ShrinkWrapToLastUse(MBB, ValNo, UMII->second, UMII2->second))
Evan Chengf5cd4f02008-10-23 20:43:13 +0000586 // Found a kill, shrink wrapping of this path ends here.
587 return;
Evan Cheng06587492008-10-24 02:05:00 +0000588 } else if (MBB == DefMBB) {
Evan Cheng06587492008-10-24 02:05:00 +0000589 // There are no uses after the def.
590 MachineInstr *DefMI = LIs->getInstructionFromIndex(ValNo->def);
Evan Cheng06587492008-10-24 02:05:00 +0000591 if (UseMBBs.empty()) {
592 // The only use must be below barrier in the barrier block. It's safe to
593 // remove the def.
594 LIs->RemoveMachineInstrFromMaps(DefMI);
595 DefMI->eraseFromParent();
596 CurrLI->removeRange(ValNo->def, LIs->getMBBEndIdx(MBB)+1);
597 }
Evan Cheng79d5b5a2008-10-25 23:49:39 +0000598 } else if (MBB == BarrierMBB) {
599 // Remove entire live range from start of mbb to barrier.
600 CurrLI->removeRange(LIs->getMBBStartIdx(MBB),
601 LIs->getUseIndex(BarrierIdx)+1);
Evan Chengf5cd4f02008-10-23 20:43:13 +0000602 } else {
Evan Cheng79d5b5a2008-10-25 23:49:39 +0000603 // Remove entire live range of the mbb out of the live interval.
Evan Cheng06587492008-10-24 02:05:00 +0000604 CurrLI->removeRange(LIs->getMBBStartIdx(MBB), LIs->getMBBEndIdx(MBB)+1);
Evan Chengf5cd4f02008-10-23 20:43:13 +0000605 }
606
607 if (MBB == DefMBB)
608 // Reached the def mbb, stop traversing this path further.
609 return;
610
611 // Traverse the pathes up the predecessor chains further.
612 for (MachineBasicBlock::pred_iterator PI = MBB->pred_begin(),
613 PE = MBB->pred_end(); PI != PE; ++PI) {
614 MachineBasicBlock *Pred = *PI;
615 if (Pred == MBB)
616 continue;
617 if (Pred == DefMBB && ValNo->hasPHIKill)
618 // Pred is the def bb and the def reaches other val#s, we must
619 // allow the value to be live out of the bb.
620 continue;
Evan Chengaaf510c2008-10-26 07:49:03 +0000621 ShrinkWrapLiveInterval(ValNo, Pred, MBB, DefMBB, Visited,
622 Uses, UseMIs, UseMBBs);
Evan Chengf5cd4f02008-10-23 20:43:13 +0000623 }
624
625 return;
626}
627
628/// SplitRegLiveInterval - Split (spill and restore) the given live interval
629/// so it would not cross the barrier that's being processed. Shrink wrap
630/// (minimize) the live interval to the last uses.
631bool PreAllocSplitting::SplitRegLiveInterval(LiveInterval *LI) {
632 CurrLI = LI;
633
634 // Find live range where current interval cross the barrier.
635 LiveInterval::iterator LR =
636 CurrLI->FindLiveRangeContaining(LIs->getUseIndex(BarrierIdx));
637 VNInfo *ValNo = LR->valno;
638
639 if (ValNo->def == ~1U) {
640 // Defined by a dead def? How can this be?
641 assert(0 && "Val# is defined by a dead def?");
642 abort();
643 }
644
Evan Cheng06587492008-10-24 02:05:00 +0000645 // FIXME: For now, if definition is rematerializable, do not split.
646 MachineInstr *DefMI = (ValNo->def != ~0U)
647 ? LIs->getInstructionFromIndex(ValNo->def) : NULL;
648 if (DefMI && LIs->isReMaterializable(*LI, ValNo, DefMI))
649 return false;
650
Owen Andersonb214c692008-11-05 00:32:13 +0000651 // If this would create a new join point, do not split.
652 if (DefMI && createsNewJoin(LR, DefMI->getParent(), Barrier->getParent()))
653 return false;
654
Evan Chengf5cd4f02008-10-23 20:43:13 +0000655 // Find all references in the barrier mbb.
656 SmallPtrSet<MachineInstr*, 4> RefsInMBB;
657 for (MachineRegisterInfo::reg_iterator I = MRI->reg_begin(CurrLI->reg),
658 E = MRI->reg_end(); I != E; ++I) {
659 MachineInstr *RefMI = &*I;
660 if (RefMI->getParent() == BarrierMBB)
661 RefsInMBB.insert(RefMI);
662 }
663
664 // Find a point to restore the value after the barrier.
665 unsigned RestoreIndex;
666 MachineBasicBlock::iterator RestorePt =
Evan Chengf62ce372008-10-28 00:47:49 +0000667 findRestorePoint(BarrierMBB, Barrier, LR->end, RefsInMBB, RestoreIndex);
Evan Chengf5cd4f02008-10-23 20:43:13 +0000668 if (RestorePt == BarrierMBB->end())
669 return false;
670
671 // Add a spill either before the barrier or after the definition.
Evan Cheng06587492008-10-24 02:05:00 +0000672 MachineBasicBlock *DefMBB = DefMI ? DefMI->getParent() : NULL;
Evan Chengf5cd4f02008-10-23 20:43:13 +0000673 const TargetRegisterClass *RC = MRI->getRegClass(CurrLI->reg);
Evan Chengf5cd4f02008-10-23 20:43:13 +0000674 unsigned SpillIndex = 0;
Evan Cheng06587492008-10-24 02:05:00 +0000675 MachineInstr *SpillMI = NULL;
Evan Cheng985921e2008-10-27 23:29:28 +0000676 int SS = -1;
Evan Cheng78dfef72008-10-25 00:52:41 +0000677 if (ValNo->def == ~0U) {
Evan Chengf5cd4f02008-10-23 20:43:13 +0000678 // If it's defined by a phi, we must split just before the barrier.
679 MachineBasicBlock::iterator SpillPt =
Evan Cheng1f08cc22008-10-28 05:28:21 +0000680 findSpillPoint(BarrierMBB, Barrier, NULL, RefsInMBB, SpillIndex);
Evan Chengf5cd4f02008-10-23 20:43:13 +0000681 if (SpillPt == BarrierMBB->begin())
682 return false; // No gap to insert spill.
683 // Add spill.
Evan Chengd0e32c52008-10-29 05:06:14 +0000684 SS = CreateSpillStackSlot(CurrLI->reg, RC);
Evan Chengf5cd4f02008-10-23 20:43:13 +0000685 TII->storeRegToStackSlot(*BarrierMBB, SpillPt, CurrLI->reg, true, SS, RC);
Evan Cheng06587492008-10-24 02:05:00 +0000686 SpillMI = prior(SpillPt);
687 LIs->InsertMachineInstrInMaps(SpillMI, SpillIndex);
Evan Cheng54898932008-10-29 08:39:34 +0000688 } else if (!IsAvailableInStack(DefMBB, CurrLI->reg, ValNo->def,
689 RestoreIndex, SpillIndex, SS)) {
Evan Cheng78dfef72008-10-25 00:52:41 +0000690 // If it's already split, just restore the value. There is no need to spill
691 // the def again.
Evan Chengd0e32c52008-10-29 05:06:14 +0000692 if (!DefMI)
693 return false; // Def is dead. Do nothing.
Evan Chengf5cd4f02008-10-23 20:43:13 +0000694 // Check if it's possible to insert a spill after the def MI.
Evan Cheng1f08cc22008-10-28 05:28:21 +0000695 MachineBasicBlock::iterator SpillPt;
696 if (DefMBB == BarrierMBB) {
697 // Add spill after the def and the last use before the barrier.
698 SpillPt = findSpillPoint(BarrierMBB, Barrier, DefMI, RefsInMBB, SpillIndex);
699 if (SpillPt == DefMBB->begin())
700 return false; // No gap to insert spill.
701 } else {
702 SpillPt = findNextEmptySlot(DefMBB, DefMI, SpillIndex);
703 if (SpillPt == DefMBB->end())
704 return false; // No gap to insert spill.
705 }
Evan Cheng78dfef72008-10-25 00:52:41 +0000706 // Add spill. The store instruction kills the register if def is before
707 // the barrier in the barrier block.
Evan Chengd0e32c52008-10-29 05:06:14 +0000708 SS = CreateSpillStackSlot(CurrLI->reg, RC);
Evan Cheng06587492008-10-24 02:05:00 +0000709 TII->storeRegToStackSlot(*DefMBB, SpillPt, CurrLI->reg,
710 DefMBB == BarrierMBB, SS, RC);
711 SpillMI = prior(SpillPt);
712 LIs->InsertMachineInstrInMaps(SpillMI, SpillIndex);
Evan Chengf5cd4f02008-10-23 20:43:13 +0000713 }
714
Evan Cheng54898932008-10-29 08:39:34 +0000715 // Remember def instruction index to spill index mapping.
716 if (DefMI && SpillMI)
717 Def2SpillMap[ValNo->def] = SpillIndex;
718
Evan Chengf5cd4f02008-10-23 20:43:13 +0000719 // Add restore.
Evan Chengf5cd4f02008-10-23 20:43:13 +0000720 TII->loadRegFromStackSlot(*BarrierMBB, RestorePt, CurrLI->reg, SS, RC);
721 MachineInstr *LoadMI = prior(RestorePt);
722 LIs->InsertMachineInstrInMaps(LoadMI, RestoreIndex);
723
724 // If live interval is spilled in the same block as the barrier, just
725 // create a hole in the interval.
726 if (!DefMBB ||
Evan Cheng78dfef72008-10-25 00:52:41 +0000727 (SpillMI && SpillMI->getParent() == BarrierMBB)) {
Evan Chengd0e32c52008-10-29 05:06:14 +0000728 // Update spill stack slot live interval.
729 UpdateSpillSlotInterval(ValNo, LIs->getUseIndex(SpillIndex)+1,
730 LIs->getDefIndex(RestoreIndex));
Evan Chengf5cd4f02008-10-23 20:43:13 +0000731
Evan Chengd0e32c52008-10-29 05:06:14 +0000732 UpdateRegisterInterval(ValNo, LIs->getUseIndex(SpillIndex)+1,
733 LIs->getDefIndex(RestoreIndex));
Evan Chengf5cd4f02008-10-23 20:43:13 +0000734
Evan Chengae7fa5b2008-10-28 01:48:24 +0000735 ++NumSplits;
Evan Chengf5cd4f02008-10-23 20:43:13 +0000736 return true;
737 }
738
Evan Chengd0e32c52008-10-29 05:06:14 +0000739 // Update spill stack slot live interval.
Evan Cheng54898932008-10-29 08:39:34 +0000740 UpdateSpillSlotInterval(ValNo, LIs->getUseIndex(SpillIndex)+1,
741 LIs->getDefIndex(RestoreIndex));
Evan Chengd0e32c52008-10-29 05:06:14 +0000742
Evan Chengf5cd4f02008-10-23 20:43:13 +0000743 // Shrink wrap the live interval by walking up the CFG and find the
744 // new kills.
745 // Now let's find all the uses of the val#.
Evan Cheng06587492008-10-24 02:05:00 +0000746 DenseMap<MachineBasicBlock*, SmallVector<MachineOperand*, 4> > Uses;
747 DenseMap<MachineBasicBlock*, SmallPtrSet<MachineInstr*, 4> > UseMIs;
748 SmallPtrSet<MachineBasicBlock*, 4> Seen;
749 SmallVector<MachineBasicBlock*, 4> UseMBBs;
Evan Chengf5cd4f02008-10-23 20:43:13 +0000750 for (MachineRegisterInfo::use_iterator UI = MRI->use_begin(CurrLI->reg),
751 UE = MRI->use_end(); UI != UE; ++UI) {
752 MachineOperand &UseMO = UI.getOperand();
753 MachineInstr *UseMI = UseMO.getParent();
754 unsigned UseIdx = LIs->getInstructionIndex(UseMI);
755 LiveInterval::iterator ULR = CurrLI->FindLiveRangeContaining(UseIdx);
756 if (ULR->valno != ValNo)
757 continue;
758 MachineBasicBlock *UseMBB = UseMI->getParent();
Evan Cheng06587492008-10-24 02:05:00 +0000759 // Remember which other mbb's use this val#.
760 if (Seen.insert(UseMBB) && UseMBB != BarrierMBB)
761 UseMBBs.push_back(UseMBB);
762 DenseMap<MachineBasicBlock*, SmallVector<MachineOperand*, 4> >::iterator
763 UMII = Uses.find(UseMBB);
764 if (UMII != Uses.end()) {
765 DenseMap<MachineBasicBlock*, SmallPtrSet<MachineInstr*, 4> >::iterator
766 UMII2 = UseMIs.find(UseMBB);
Evan Chengf5cd4f02008-10-23 20:43:13 +0000767 UMII->second.push_back(&UseMO);
Evan Cheng06587492008-10-24 02:05:00 +0000768 UMII2->second.insert(UseMI);
769 } else {
770 SmallVector<MachineOperand*, 4> Ops;
Evan Chengf5cd4f02008-10-23 20:43:13 +0000771 Ops.push_back(&UseMO);
Evan Cheng06587492008-10-24 02:05:00 +0000772 Uses.insert(std::make_pair(UseMBB, Ops));
773 SmallPtrSet<MachineInstr*, 4> MIs;
774 MIs.insert(UseMI);
775 UseMIs.insert(std::make_pair(UseMBB, MIs));
Evan Chengf5cd4f02008-10-23 20:43:13 +0000776 }
777 }
778
779 // Walk up the predecessor chains.
780 SmallPtrSet<MachineBasicBlock*, 8> Visited;
Evan Chengaaf510c2008-10-26 07:49:03 +0000781 ShrinkWrapLiveInterval(ValNo, BarrierMBB, NULL, DefMBB, Visited,
Evan Cheng06587492008-10-24 02:05:00 +0000782 Uses, UseMIs, UseMBBs);
Evan Chengf5cd4f02008-10-23 20:43:13 +0000783
Evan Cheng36f3adf2008-10-31 16:41:59 +0000784 // FIXME: If ValNo->hasPHIKill is false, then renumber the val# by
785 // the restore.
786
Evan Chengf5cd4f02008-10-23 20:43:13 +0000787 // Remove live range from barrier to the restore. FIXME: Find a better
788 // point to re-start the live interval.
Evan Chengd0e32c52008-10-29 05:06:14 +0000789 UpdateRegisterInterval(ValNo, LIs->getUseIndex(BarrierIdx)+1,
Evan Chengf5cd4f02008-10-23 20:43:13 +0000790 LIs->getDefIndex(RestoreIndex));
Evan Chengf5cd4f02008-10-23 20:43:13 +0000791
Evan Chengae7fa5b2008-10-28 01:48:24 +0000792 ++NumSplits;
Evan Chengf5cd4f02008-10-23 20:43:13 +0000793 return true;
794}
795
796/// SplitRegLiveIntervals - Split all register live intervals that cross the
797/// barrier that's being processed.
798bool
799PreAllocSplitting::SplitRegLiveIntervals(const TargetRegisterClass **RCs) {
800 // First find all the virtual registers whose live intervals are intercepted
801 // by the current barrier.
802 SmallVector<LiveInterval*, 8> Intervals;
803 for (const TargetRegisterClass **RC = RCs; *RC; ++RC) {
Evan Cheng23066282008-10-27 07:14:50 +0000804 if (TII->IgnoreRegisterClassBarriers(*RC))
805 continue;
Evan Chengf5cd4f02008-10-23 20:43:13 +0000806 std::vector<unsigned> &VRs = MRI->getRegClassVirtRegs(*RC);
807 for (unsigned i = 0, e = VRs.size(); i != e; ++i) {
808 unsigned Reg = VRs[i];
809 if (!LIs->hasInterval(Reg))
810 continue;
811 LiveInterval *LI = &LIs->getInterval(Reg);
812 if (LI->liveAt(BarrierIdx) && !Barrier->readsRegister(Reg))
813 // Virtual register live interval is intercepted by the barrier. We
814 // should split and shrink wrap its interval if possible.
815 Intervals.push_back(LI);
816 }
817 }
818
819 // Process the affected live intervals.
820 bool Change = false;
821 while (!Intervals.empty()) {
Evan Chengae7fa5b2008-10-28 01:48:24 +0000822 if (PreSplitLimit != -1 && (int)NumSplits == PreSplitLimit)
823 break;
Evan Chengf5cd4f02008-10-23 20:43:13 +0000824 LiveInterval *LI = Intervals.back();
825 Intervals.pop_back();
826 Change |= SplitRegLiveInterval(LI);
827 }
828
829 return Change;
830}
831
Owen Andersonf1f75b12008-11-04 22:22:41 +0000832bool PreAllocSplitting::createsNewJoin(LiveRange* LR,
833 MachineBasicBlock* DefMBB,
834 MachineBasicBlock* BarrierMBB) {
835 if (DefMBB == BarrierMBB)
836 return false;
837
838 if (LR->valno->hasPHIKill)
839 return false;
840
841 unsigned MBBEnd = LIs->getMBBEndIdx(BarrierMBB);
842 if (LR->end < MBBEnd)
843 return false;
844
845 MachineLoopInfo& MLI = getAnalysis<MachineLoopInfo>();
846 if (MLI.getLoopFor(DefMBB) != MLI.getLoopFor(BarrierMBB))
847 return true;
848
849 MachineDominatorTree& MDT = getAnalysis<MachineDominatorTree>();
850 SmallPtrSet<MachineBasicBlock*, 4> Visited;
851 typedef std::pair<MachineBasicBlock*,
852 MachineBasicBlock::succ_iterator> ItPair;
853 SmallVector<ItPair, 4> Stack;
854 Stack.push_back(std::make_pair(BarrierMBB, BarrierMBB->succ_begin()));
855
856 while (!Stack.empty()) {
857 ItPair P = Stack.back();
858 Stack.pop_back();
859
860 MachineBasicBlock* PredMBB = P.first;
861 MachineBasicBlock::succ_iterator S = P.second;
862
863 if (S == PredMBB->succ_end())
864 continue;
865 else if (Visited.count(*S)) {
866 Stack.push_back(std::make_pair(PredMBB, ++S));
867 continue;
868 } else
Owen Andersonb214c692008-11-05 00:32:13 +0000869 Stack.push_back(std::make_pair(PredMBB, S+1));
Owen Andersonf1f75b12008-11-04 22:22:41 +0000870
871 MachineBasicBlock* MBB = *S;
872 Visited.insert(MBB);
873
874 if (MBB == BarrierMBB)
875 return true;
876
877 MachineDomTreeNode* DefMDTN = MDT.getNode(DefMBB);
878 MachineDomTreeNode* BarrierMDTN = MDT.getNode(BarrierMBB);
879 MachineDomTreeNode* MDTN = MDT.getNode(MBB)->getIDom();
880 while (MDTN) {
881 if (MDTN == DefMDTN)
882 return true;
883 else if (MDTN == BarrierMDTN)
884 break;
885 MDTN = MDTN->getIDom();
886 }
887
888 MBBEnd = LIs->getMBBEndIdx(MBB);
889 if (LR->end > MBBEnd)
890 Stack.push_back(std::make_pair(MBB, MBB->succ_begin()));
891 }
892
893 return false;
894}
895
896
Evan Cheng09e8ca82008-10-20 21:44:59 +0000897bool PreAllocSplitting::runOnMachineFunction(MachineFunction &MF) {
Evan Chengd0e32c52008-10-29 05:06:14 +0000898 CurrMF = &MF;
899 TM = &MF.getTarget();
900 TII = TM->getInstrInfo();
901 MFI = MF.getFrameInfo();
902 MRI = &MF.getRegInfo();
903 LIs = &getAnalysis<LiveIntervals>();
904 LSs = &getAnalysis<LiveStacks>();
Evan Chengf5cd4f02008-10-23 20:43:13 +0000905
906 bool MadeChange = false;
907
908 // Make sure blocks are numbered in order.
909 MF.RenumberBlocks();
910
Evan Cheng54898932008-10-29 08:39:34 +0000911#if 0
912 // FIXME: Go top down.
913 MachineBasicBlock *Entry = MF.begin();
914 SmallPtrSet<MachineBasicBlock*,16> Visited;
915
916 for (df_ext_iterator<MachineBasicBlock*, SmallPtrSet<MachineBasicBlock*,16> >
917 DFI = df_ext_begin(Entry, Visited), E = df_ext_end(Entry, Visited);
918 DFI != E; ++DFI) {
919 BarrierMBB = *DFI;
920 for (MachineBasicBlock::iterator I = BarrierMBB->begin(),
921 E = BarrierMBB->end(); I != E; ++I) {
922 Barrier = &*I;
923 const TargetRegisterClass **BarrierRCs =
924 Barrier->getDesc().getRegClassBarriers();
925 if (!BarrierRCs)
926 continue;
927 BarrierIdx = LIs->getInstructionIndex(Barrier);
928 MadeChange |= SplitRegLiveIntervals(BarrierRCs);
929 }
930 }
931#else
Evan Chengf5cd4f02008-10-23 20:43:13 +0000932 for (MachineFunction::reverse_iterator I = MF.rbegin(), E = MF.rend();
933 I != E; ++I) {
934 BarrierMBB = &*I;
935 for (MachineBasicBlock::reverse_iterator II = BarrierMBB->rbegin(),
936 EE = BarrierMBB->rend(); II != EE; ++II) {
937 Barrier = &*II;
938 const TargetRegisterClass **BarrierRCs =
939 Barrier->getDesc().getRegClassBarriers();
940 if (!BarrierRCs)
941 continue;
942 BarrierIdx = LIs->getInstructionIndex(Barrier);
943 MadeChange |= SplitRegLiveIntervals(BarrierRCs);
944 }
945 }
Evan Cheng54898932008-10-29 08:39:34 +0000946#endif
Evan Chengf5cd4f02008-10-23 20:43:13 +0000947
948 return MadeChange;
Evan Cheng09e8ca82008-10-20 21:44:59 +0000949}