Evan Cheng | 09e8ca8 | 2008-10-20 21:44:59 +0000 | [diff] [blame] | 1 | //===-- PreAllocSplitting.cpp - Pre-allocation Interval Spltting Pass. ----===// |
| 2 | // |
| 3 | // The LLVM Compiler Infrastructure |
| 4 | // |
| 5 | // This file is distributed under the University of Illinois Open Source |
| 6 | // License. See LICENSE.TXT for details. |
| 7 | // |
| 8 | //===----------------------------------------------------------------------===// |
| 9 | // |
| 10 | // This file implements the machine instruction level pre-register allocation |
| 11 | // live interval splitting pass. It finds live interval barriers, i.e. |
| 12 | // instructions which will kill all physical registers in certain register |
| 13 | // classes, and split all live intervals which cross the barrier. |
| 14 | // |
| 15 | //===----------------------------------------------------------------------===// |
| 16 | |
| 17 | #define DEBUG_TYPE "pre-alloc-split" |
| 18 | #include "llvm/CodeGen/LiveIntervalAnalysis.h" |
Evan Cheng | d0e32c5 | 2008-10-29 05:06:14 +0000 | [diff] [blame] | 19 | #include "llvm/CodeGen/LiveStackAnalysis.h" |
Owen Anderson | f1f75b1 | 2008-11-04 22:22:41 +0000 | [diff] [blame] | 20 | #include "llvm/CodeGen/MachineDominators.h" |
Evan Cheng | f5cd4f0 | 2008-10-23 20:43:13 +0000 | [diff] [blame] | 21 | #include "llvm/CodeGen/MachineFrameInfo.h" |
Evan Cheng | 09e8ca8 | 2008-10-20 21:44:59 +0000 | [diff] [blame] | 22 | #include "llvm/CodeGen/MachineFunctionPass.h" |
| 23 | #include "llvm/CodeGen/MachineLoopInfo.h" |
| 24 | #include "llvm/CodeGen/MachineRegisterInfo.h" |
| 25 | #include "llvm/CodeGen/Passes.h" |
| 26 | #include "llvm/CodeGen/RegisterCoalescer.h" |
Evan Cheng | f5cd4f0 | 2008-10-23 20:43:13 +0000 | [diff] [blame] | 27 | #include "llvm/Target/TargetInstrInfo.h" |
Evan Cheng | 09e8ca8 | 2008-10-20 21:44:59 +0000 | [diff] [blame] | 28 | #include "llvm/Target/TargetMachine.h" |
| 29 | #include "llvm/Target/TargetOptions.h" |
| 30 | #include "llvm/Target/TargetRegisterInfo.h" |
| 31 | #include "llvm/Support/CommandLine.h" |
| 32 | #include "llvm/Support/Debug.h" |
Evan Cheng | d0e32c5 | 2008-10-29 05:06:14 +0000 | [diff] [blame] | 33 | #include "llvm/ADT/DenseMap.h" |
Evan Cheng | 5489893 | 2008-10-29 08:39:34 +0000 | [diff] [blame] | 34 | #include "llvm/ADT/DepthFirstIterator.h" |
Evan Cheng | 09e8ca8 | 2008-10-20 21:44:59 +0000 | [diff] [blame] | 35 | #include "llvm/ADT/SmallPtrSet.h" |
Evan Cheng | f5cd4f0 | 2008-10-23 20:43:13 +0000 | [diff] [blame] | 36 | #include "llvm/ADT/Statistic.h" |
Evan Cheng | 09e8ca8 | 2008-10-20 21:44:59 +0000 | [diff] [blame] | 37 | using namespace llvm; |
| 38 | |
Evan Cheng | ae7fa5b | 2008-10-28 01:48:24 +0000 | [diff] [blame] | 39 | static cl::opt<int> PreSplitLimit("pre-split-limit", cl::init(-1), cl::Hidden); |
| 40 | |
| 41 | STATISTIC(NumSplits, "Number of intervals split"); |
Evan Cheng | f5cd4f0 | 2008-10-23 20:43:13 +0000 | [diff] [blame] | 42 | |
Evan Cheng | 09e8ca8 | 2008-10-20 21:44:59 +0000 | [diff] [blame] | 43 | namespace { |
| 44 | class VISIBILITY_HIDDEN PreAllocSplitting : public MachineFunctionPass { |
Evan Cheng | d0e32c5 | 2008-10-29 05:06:14 +0000 | [diff] [blame] | 45 | MachineFunction *CurrMF; |
Evan Cheng | f5cd4f0 | 2008-10-23 20:43:13 +0000 | [diff] [blame] | 46 | const TargetMachine *TM; |
| 47 | const TargetInstrInfo *TII; |
| 48 | MachineFrameInfo *MFI; |
| 49 | MachineRegisterInfo *MRI; |
| 50 | LiveIntervals *LIs; |
Evan Cheng | d0e32c5 | 2008-10-29 05:06:14 +0000 | [diff] [blame] | 51 | LiveStacks *LSs; |
Evan Cheng | 09e8ca8 | 2008-10-20 21:44:59 +0000 | [diff] [blame] | 52 | |
Evan Cheng | f5cd4f0 | 2008-10-23 20:43:13 +0000 | [diff] [blame] | 53 | // Barrier - Current barrier being processed. |
| 54 | MachineInstr *Barrier; |
| 55 | |
| 56 | // BarrierMBB - Basic block where the barrier resides in. |
| 57 | MachineBasicBlock *BarrierMBB; |
| 58 | |
| 59 | // Barrier - Current barrier index. |
| 60 | unsigned BarrierIdx; |
| 61 | |
| 62 | // CurrLI - Current live interval being split. |
| 63 | LiveInterval *CurrLI; |
| 64 | |
Evan Cheng | d0e32c5 | 2008-10-29 05:06:14 +0000 | [diff] [blame] | 65 | // CurrSLI - Current stack slot live interval. |
| 66 | LiveInterval *CurrSLI; |
| 67 | |
| 68 | // CurrSValNo - Current val# for the stack slot live interval. |
| 69 | VNInfo *CurrSValNo; |
| 70 | |
| 71 | // IntervalSSMap - A map from live interval to spill slots. |
| 72 | DenseMap<unsigned, int> IntervalSSMap; |
Evan Cheng | f5cd4f0 | 2008-10-23 20:43:13 +0000 | [diff] [blame] | 73 | |
Evan Cheng | 5489893 | 2008-10-29 08:39:34 +0000 | [diff] [blame] | 74 | // Def2SpillMap - A map from a def instruction index to spill index. |
| 75 | DenseMap<unsigned, unsigned> Def2SpillMap; |
Evan Cheng | 0658749 | 2008-10-24 02:05:00 +0000 | [diff] [blame] | 76 | |
Evan Cheng | 09e8ca8 | 2008-10-20 21:44:59 +0000 | [diff] [blame] | 77 | public: |
| 78 | static char ID; |
| 79 | PreAllocSplitting() : MachineFunctionPass(&ID) {} |
| 80 | |
| 81 | virtual bool runOnMachineFunction(MachineFunction &MF); |
| 82 | |
| 83 | virtual void getAnalysisUsage(AnalysisUsage &AU) const { |
| 84 | AU.addRequired<LiveIntervals>(); |
| 85 | AU.addPreserved<LiveIntervals>(); |
Evan Cheng | d0e32c5 | 2008-10-29 05:06:14 +0000 | [diff] [blame] | 86 | AU.addRequired<LiveStacks>(); |
| 87 | AU.addPreserved<LiveStacks>(); |
Evan Cheng | 09e8ca8 | 2008-10-20 21:44:59 +0000 | [diff] [blame] | 88 | AU.addPreserved<RegisterCoalescer>(); |
| 89 | if (StrongPHIElim) |
| 90 | AU.addPreservedID(StrongPHIEliminationID); |
| 91 | else |
| 92 | AU.addPreservedID(PHIEliminationID); |
Owen Anderson | f1f75b1 | 2008-11-04 22:22:41 +0000 | [diff] [blame] | 93 | AU.addRequired<MachineDominatorTree>(); |
| 94 | AU.addRequired<MachineLoopInfo>(); |
| 95 | AU.addPreserved<MachineDominatorTree>(); |
| 96 | AU.addPreserved<MachineLoopInfo>(); |
Evan Cheng | 09e8ca8 | 2008-10-20 21:44:59 +0000 | [diff] [blame] | 97 | MachineFunctionPass::getAnalysisUsage(AU); |
| 98 | } |
| 99 | |
| 100 | virtual void releaseMemory() { |
Evan Cheng | d0e32c5 | 2008-10-29 05:06:14 +0000 | [diff] [blame] | 101 | IntervalSSMap.clear(); |
Evan Cheng | 5489893 | 2008-10-29 08:39:34 +0000 | [diff] [blame] | 102 | Def2SpillMap.clear(); |
Evan Cheng | 09e8ca8 | 2008-10-20 21:44:59 +0000 | [diff] [blame] | 103 | } |
| 104 | |
| 105 | virtual const char *getPassName() const { |
| 106 | return "Pre-Register Allocaton Live Interval Splitting"; |
| 107 | } |
Evan Cheng | f5cd4f0 | 2008-10-23 20:43:13 +0000 | [diff] [blame] | 108 | |
| 109 | /// print - Implement the dump method. |
| 110 | virtual void print(std::ostream &O, const Module* M = 0) const { |
| 111 | LIs->print(O, M); |
| 112 | } |
| 113 | |
| 114 | void print(std::ostream *O, const Module* M = 0) const { |
| 115 | if (O) print(*O, M); |
| 116 | } |
| 117 | |
| 118 | private: |
| 119 | MachineBasicBlock::iterator |
| 120 | findNextEmptySlot(MachineBasicBlock*, MachineInstr*, |
| 121 | unsigned&); |
| 122 | |
| 123 | MachineBasicBlock::iterator |
Evan Cheng | 1f08cc2 | 2008-10-28 05:28:21 +0000 | [diff] [blame] | 124 | findSpillPoint(MachineBasicBlock*, MachineInstr*, MachineInstr*, |
Evan Cheng | f5cd4f0 | 2008-10-23 20:43:13 +0000 | [diff] [blame] | 125 | SmallPtrSet<MachineInstr*, 4>&, unsigned&); |
| 126 | |
| 127 | MachineBasicBlock::iterator |
Evan Cheng | f62ce37 | 2008-10-28 00:47:49 +0000 | [diff] [blame] | 128 | findRestorePoint(MachineBasicBlock*, MachineInstr*, unsigned, |
Evan Cheng | f5cd4f0 | 2008-10-23 20:43:13 +0000 | [diff] [blame] | 129 | SmallPtrSet<MachineInstr*, 4>&, unsigned&); |
| 130 | |
Evan Cheng | d0e32c5 | 2008-10-29 05:06:14 +0000 | [diff] [blame] | 131 | int CreateSpillStackSlot(unsigned, const TargetRegisterClass *); |
Evan Cheng | f5cd4f0 | 2008-10-23 20:43:13 +0000 | [diff] [blame] | 132 | |
Evan Cheng | 5489893 | 2008-10-29 08:39:34 +0000 | [diff] [blame] | 133 | bool IsAvailableInStack(MachineBasicBlock*, unsigned, unsigned, unsigned, |
| 134 | unsigned&, int&) const; |
Evan Cheng | f5cd4f0 | 2008-10-23 20:43:13 +0000 | [diff] [blame] | 135 | |
Evan Cheng | d0e32c5 | 2008-10-29 05:06:14 +0000 | [diff] [blame] | 136 | void UpdateSpillSlotInterval(VNInfo*, unsigned, unsigned); |
Evan Cheng | f5cd4f0 | 2008-10-23 20:43:13 +0000 | [diff] [blame] | 137 | |
Evan Cheng | d0e32c5 | 2008-10-29 05:06:14 +0000 | [diff] [blame] | 138 | void UpdateRegisterInterval(VNInfo*, unsigned, unsigned); |
| 139 | |
| 140 | bool ShrinkWrapToLastUse(MachineBasicBlock*, VNInfo*, |
Evan Cheng | 0658749 | 2008-10-24 02:05:00 +0000 | [diff] [blame] | 141 | SmallVector<MachineOperand*, 4>&, |
| 142 | SmallPtrSet<MachineInstr*, 4>&); |
Evan Cheng | f5cd4f0 | 2008-10-23 20:43:13 +0000 | [diff] [blame] | 143 | |
Evan Cheng | aaf510c | 2008-10-26 07:49:03 +0000 | [diff] [blame] | 144 | void ShrinkWrapLiveInterval(VNInfo*, MachineBasicBlock*, MachineBasicBlock*, |
Evan Cheng | f5cd4f0 | 2008-10-23 20:43:13 +0000 | [diff] [blame] | 145 | MachineBasicBlock*, SmallPtrSet<MachineBasicBlock*, 8>&, |
Evan Cheng | 0658749 | 2008-10-24 02:05:00 +0000 | [diff] [blame] | 146 | DenseMap<MachineBasicBlock*, SmallVector<MachineOperand*, 4> >&, |
| 147 | DenseMap<MachineBasicBlock*, SmallPtrSet<MachineInstr*, 4> >&, |
| 148 | SmallVector<MachineBasicBlock*, 4>&); |
Evan Cheng | f5cd4f0 | 2008-10-23 20:43:13 +0000 | [diff] [blame] | 149 | |
| 150 | bool SplitRegLiveInterval(LiveInterval*); |
| 151 | |
| 152 | bool SplitRegLiveIntervals(const TargetRegisterClass **); |
Owen Anderson | f1f75b1 | 2008-11-04 22:22:41 +0000 | [diff] [blame] | 153 | |
| 154 | bool createsNewJoin(LiveRange* LR, MachineBasicBlock* DefMBB, |
| 155 | MachineBasicBlock* BarrierMBB); |
Evan Cheng | 09e8ca8 | 2008-10-20 21:44:59 +0000 | [diff] [blame] | 156 | }; |
| 157 | } // end anonymous namespace |
| 158 | |
| 159 | char PreAllocSplitting::ID = 0; |
| 160 | |
| 161 | static RegisterPass<PreAllocSplitting> |
| 162 | X("pre-alloc-splitting", "Pre-Register Allocation Live Interval Splitting"); |
| 163 | |
| 164 | const PassInfo *const llvm::PreAllocSplittingID = &X; |
| 165 | |
Evan Cheng | f5cd4f0 | 2008-10-23 20:43:13 +0000 | [diff] [blame] | 166 | |
| 167 | /// findNextEmptySlot - Find a gap after the given machine instruction in the |
| 168 | /// instruction index map. If there isn't one, return end(). |
| 169 | MachineBasicBlock::iterator |
| 170 | PreAllocSplitting::findNextEmptySlot(MachineBasicBlock *MBB, MachineInstr *MI, |
| 171 | unsigned &SpotIndex) { |
| 172 | MachineBasicBlock::iterator MII = MI; |
| 173 | if (++MII != MBB->end()) { |
| 174 | unsigned Index = LIs->findGapBeforeInstr(LIs->getInstructionIndex(MII)); |
| 175 | if (Index) { |
| 176 | SpotIndex = Index; |
| 177 | return MII; |
| 178 | } |
| 179 | } |
| 180 | return MBB->end(); |
| 181 | } |
| 182 | |
| 183 | /// findSpillPoint - Find a gap as far away from the given MI that's suitable |
| 184 | /// for spilling the current live interval. The index must be before any |
| 185 | /// defs and uses of the live interval register in the mbb. Return begin() if |
| 186 | /// none is found. |
| 187 | MachineBasicBlock::iterator |
| 188 | PreAllocSplitting::findSpillPoint(MachineBasicBlock *MBB, MachineInstr *MI, |
Evan Cheng | 1f08cc2 | 2008-10-28 05:28:21 +0000 | [diff] [blame] | 189 | MachineInstr *DefMI, |
Evan Cheng | f5cd4f0 | 2008-10-23 20:43:13 +0000 | [diff] [blame] | 190 | SmallPtrSet<MachineInstr*, 4> &RefsInMBB, |
| 191 | unsigned &SpillIndex) { |
| 192 | MachineBasicBlock::iterator Pt = MBB->begin(); |
| 193 | |
| 194 | // Go top down if RefsInMBB is empty. |
Evan Cheng | 1f08cc2 | 2008-10-28 05:28:21 +0000 | [diff] [blame] | 195 | if (RefsInMBB.empty() && !DefMI) { |
Evan Cheng | f5cd4f0 | 2008-10-23 20:43:13 +0000 | [diff] [blame] | 196 | MachineBasicBlock::iterator MII = MBB->begin(); |
| 197 | MachineBasicBlock::iterator EndPt = MI; |
| 198 | do { |
| 199 | ++MII; |
| 200 | unsigned Index = LIs->getInstructionIndex(MII); |
| 201 | unsigned Gap = LIs->findGapBeforeInstr(Index); |
| 202 | if (Gap) { |
| 203 | Pt = MII; |
| 204 | SpillIndex = Gap; |
| 205 | break; |
| 206 | } |
| 207 | } while (MII != EndPt); |
| 208 | } else { |
| 209 | MachineBasicBlock::iterator MII = MI; |
Evan Cheng | 1f08cc2 | 2008-10-28 05:28:21 +0000 | [diff] [blame] | 210 | MachineBasicBlock::iterator EndPt = DefMI |
| 211 | ? MachineBasicBlock::iterator(DefMI) : MBB->begin(); |
| 212 | while (MII != EndPt && !RefsInMBB.count(MII)) { |
Evan Cheng | f5cd4f0 | 2008-10-23 20:43:13 +0000 | [diff] [blame] | 213 | unsigned Index = LIs->getInstructionIndex(MII); |
| 214 | if (LIs->hasGapBeforeInstr(Index)) { |
| 215 | Pt = MII; |
| 216 | SpillIndex = LIs->findGapBeforeInstr(Index, true); |
| 217 | } |
| 218 | --MII; |
| 219 | } |
| 220 | } |
| 221 | |
| 222 | return Pt; |
| 223 | } |
| 224 | |
| 225 | /// findRestorePoint - Find a gap in the instruction index map that's suitable |
| 226 | /// for restoring the current live interval value. The index must be before any |
| 227 | /// uses of the live interval register in the mbb. Return end() if none is |
| 228 | /// found. |
| 229 | MachineBasicBlock::iterator |
| 230 | PreAllocSplitting::findRestorePoint(MachineBasicBlock *MBB, MachineInstr *MI, |
Evan Cheng | f62ce37 | 2008-10-28 00:47:49 +0000 | [diff] [blame] | 231 | unsigned LastIdx, |
Evan Cheng | f5cd4f0 | 2008-10-23 20:43:13 +0000 | [diff] [blame] | 232 | SmallPtrSet<MachineInstr*, 4> &RefsInMBB, |
| 233 | unsigned &RestoreIndex) { |
Evan Cheng | 5489893 | 2008-10-29 08:39:34 +0000 | [diff] [blame] | 234 | // FIXME: Allow spill to be inserted to the beginning of the mbb. Update mbb |
| 235 | // begin index accordingly. |
Evan Cheng | f5cd4f0 | 2008-10-23 20:43:13 +0000 | [diff] [blame] | 236 | MachineBasicBlock::iterator Pt = MBB->end(); |
Evan Cheng | f62ce37 | 2008-10-28 00:47:49 +0000 | [diff] [blame] | 237 | unsigned EndIdx = LIs->getMBBEndIdx(MBB); |
Evan Cheng | f5cd4f0 | 2008-10-23 20:43:13 +0000 | [diff] [blame] | 238 | |
Evan Cheng | f62ce37 | 2008-10-28 00:47:49 +0000 | [diff] [blame] | 239 | // Go bottom up if RefsInMBB is empty and the end of the mbb isn't beyond |
| 240 | // the last index in the live range. |
| 241 | if (RefsInMBB.empty() && LastIdx >= EndIdx) { |
Evan Cheng | f5cd4f0 | 2008-10-23 20:43:13 +0000 | [diff] [blame] | 242 | MachineBasicBlock::iterator MII = MBB->end(); |
| 243 | MachineBasicBlock::iterator EndPt = MI; |
Evan Cheng | 5489893 | 2008-10-29 08:39:34 +0000 | [diff] [blame] | 244 | --MII; |
Evan Cheng | f5cd4f0 | 2008-10-23 20:43:13 +0000 | [diff] [blame] | 245 | do { |
Evan Cheng | f5cd4f0 | 2008-10-23 20:43:13 +0000 | [diff] [blame] | 246 | unsigned Index = LIs->getInstructionIndex(MII); |
Evan Cheng | 56ab0de | 2008-10-24 18:46:44 +0000 | [diff] [blame] | 247 | unsigned Gap = LIs->findGapBeforeInstr(Index); |
Evan Cheng | f5cd4f0 | 2008-10-23 20:43:13 +0000 | [diff] [blame] | 248 | if (Gap) { |
| 249 | Pt = MII; |
| 250 | RestoreIndex = Gap; |
| 251 | break; |
| 252 | } |
Evan Cheng | 5489893 | 2008-10-29 08:39:34 +0000 | [diff] [blame] | 253 | --MII; |
Evan Cheng | f5cd4f0 | 2008-10-23 20:43:13 +0000 | [diff] [blame] | 254 | } while (MII != EndPt); |
| 255 | } else { |
| 256 | MachineBasicBlock::iterator MII = MI; |
| 257 | MII = ++MII; |
Evan Cheng | f62ce37 | 2008-10-28 00:47:49 +0000 | [diff] [blame] | 258 | // FIXME: Limit the number of instructions to examine to reduce |
| 259 | // compile time? |
Evan Cheng | f5cd4f0 | 2008-10-23 20:43:13 +0000 | [diff] [blame] | 260 | while (MII != MBB->end()) { |
| 261 | unsigned Index = LIs->getInstructionIndex(MII); |
Evan Cheng | f62ce37 | 2008-10-28 00:47:49 +0000 | [diff] [blame] | 262 | if (Index > LastIdx) |
| 263 | break; |
Evan Cheng | f5cd4f0 | 2008-10-23 20:43:13 +0000 | [diff] [blame] | 264 | unsigned Gap = LIs->findGapBeforeInstr(Index); |
| 265 | if (Gap) { |
| 266 | Pt = MII; |
| 267 | RestoreIndex = Gap; |
| 268 | } |
| 269 | if (RefsInMBB.count(MII)) |
| 270 | break; |
| 271 | ++MII; |
| 272 | } |
| 273 | } |
| 274 | |
| 275 | return Pt; |
| 276 | } |
| 277 | |
Evan Cheng | d0e32c5 | 2008-10-29 05:06:14 +0000 | [diff] [blame] | 278 | /// CreateSpillStackSlot - Create a stack slot for the live interval being |
| 279 | /// split. If the live interval was previously split, just reuse the same |
| 280 | /// slot. |
| 281 | int PreAllocSplitting::CreateSpillStackSlot(unsigned Reg, |
| 282 | const TargetRegisterClass *RC) { |
| 283 | int SS; |
| 284 | DenseMap<unsigned, int>::iterator I = IntervalSSMap.find(Reg); |
| 285 | if (I != IntervalSSMap.end()) { |
| 286 | SS = I->second; |
| 287 | } else { |
| 288 | SS = MFI->CreateStackObject(RC->getSize(), RC->getAlignment()); |
| 289 | IntervalSSMap[Reg] = SS; |
Evan Cheng | 0658749 | 2008-10-24 02:05:00 +0000 | [diff] [blame] | 290 | } |
Evan Cheng | d0e32c5 | 2008-10-29 05:06:14 +0000 | [diff] [blame] | 291 | |
| 292 | // Create live interval for stack slot. |
| 293 | CurrSLI = &LSs->getOrCreateInterval(SS); |
Evan Cheng | 5489893 | 2008-10-29 08:39:34 +0000 | [diff] [blame] | 294 | if (CurrSLI->hasAtLeastOneValue()) |
Evan Cheng | d0e32c5 | 2008-10-29 05:06:14 +0000 | [diff] [blame] | 295 | CurrSValNo = CurrSLI->getValNumInfo(0); |
| 296 | else |
| 297 | CurrSValNo = CurrSLI->getNextValue(~0U, 0, LSs->getVNInfoAllocator()); |
| 298 | return SS; |
Evan Cheng | f5cd4f0 | 2008-10-23 20:43:13 +0000 | [diff] [blame] | 299 | } |
| 300 | |
Evan Cheng | d0e32c5 | 2008-10-29 05:06:14 +0000 | [diff] [blame] | 301 | /// IsAvailableInStack - Return true if register is available in a split stack |
| 302 | /// slot at the specified index. |
| 303 | bool |
Evan Cheng | 5489893 | 2008-10-29 08:39:34 +0000 | [diff] [blame] | 304 | PreAllocSplitting::IsAvailableInStack(MachineBasicBlock *DefMBB, |
| 305 | unsigned Reg, unsigned DefIndex, |
| 306 | unsigned RestoreIndex, unsigned &SpillIndex, |
| 307 | int& SS) const { |
| 308 | if (!DefMBB) |
| 309 | return false; |
| 310 | |
Evan Cheng | d0e32c5 | 2008-10-29 05:06:14 +0000 | [diff] [blame] | 311 | DenseMap<unsigned, int>::iterator I = IntervalSSMap.find(Reg); |
| 312 | if (I == IntervalSSMap.end()) |
Evan Cheng | f5cd4f0 | 2008-10-23 20:43:13 +0000 | [diff] [blame] | 313 | return false; |
Evan Cheng | 5489893 | 2008-10-29 08:39:34 +0000 | [diff] [blame] | 314 | DenseMap<unsigned, unsigned>::iterator II = Def2SpillMap.find(DefIndex); |
| 315 | if (II == Def2SpillMap.end()) |
| 316 | return false; |
| 317 | |
| 318 | // If last spill of def is in the same mbb as barrier mbb (where restore will |
| 319 | // be), make sure it's not below the intended restore index. |
| 320 | // FIXME: Undo the previous spill? |
| 321 | assert(LIs->getMBBFromIndex(II->second) == DefMBB); |
| 322 | if (DefMBB == BarrierMBB && II->second >= RestoreIndex) |
| 323 | return false; |
| 324 | |
| 325 | SS = I->second; |
| 326 | SpillIndex = II->second; |
| 327 | return true; |
Evan Cheng | f5cd4f0 | 2008-10-23 20:43:13 +0000 | [diff] [blame] | 328 | } |
| 329 | |
Evan Cheng | d0e32c5 | 2008-10-29 05:06:14 +0000 | [diff] [blame] | 330 | /// UpdateSpillSlotInterval - Given the specified val# of the register live |
| 331 | /// interval being split, and the spill and restore indicies, update the live |
| 332 | /// interval of the spill stack slot. |
| 333 | void |
| 334 | PreAllocSplitting::UpdateSpillSlotInterval(VNInfo *ValNo, unsigned SpillIndex, |
| 335 | unsigned RestoreIndex) { |
Evan Cheng | 5489893 | 2008-10-29 08:39:34 +0000 | [diff] [blame] | 336 | assert(LIs->getMBBFromIndex(RestoreIndex) == BarrierMBB && |
| 337 | "Expect restore in the barrier mbb"); |
| 338 | |
| 339 | MachineBasicBlock *MBB = LIs->getMBBFromIndex(SpillIndex); |
| 340 | if (MBB == BarrierMBB) { |
| 341 | // Intra-block spill + restore. We are done. |
Evan Cheng | d0e32c5 | 2008-10-29 05:06:14 +0000 | [diff] [blame] | 342 | LiveRange SLR(SpillIndex, RestoreIndex, CurrSValNo); |
| 343 | CurrSLI->addRange(SLR); |
| 344 | return; |
| 345 | } |
| 346 | |
Evan Cheng | 5489893 | 2008-10-29 08:39:34 +0000 | [diff] [blame] | 347 | SmallPtrSet<MachineBasicBlock*, 4> Processed; |
| 348 | unsigned EndIdx = LIs->getMBBEndIdx(MBB); |
| 349 | LiveRange SLR(SpillIndex, EndIdx+1, CurrSValNo); |
Evan Cheng | d0e32c5 | 2008-10-29 05:06:14 +0000 | [diff] [blame] | 350 | CurrSLI->addRange(SLR); |
Evan Cheng | 5489893 | 2008-10-29 08:39:34 +0000 | [diff] [blame] | 351 | Processed.insert(MBB); |
Evan Cheng | d0e32c5 | 2008-10-29 05:06:14 +0000 | [diff] [blame] | 352 | |
| 353 | // Start from the spill mbb, figure out the extend of the spill slot's |
| 354 | // live interval. |
| 355 | SmallVector<MachineBasicBlock*, 4> WorkList; |
Evan Cheng | 5489893 | 2008-10-29 08:39:34 +0000 | [diff] [blame] | 356 | const LiveRange *LR = CurrLI->getLiveRangeContaining(SpillIndex); |
| 357 | if (LR->end > EndIdx) |
Evan Cheng | d0e32c5 | 2008-10-29 05:06:14 +0000 | [diff] [blame] | 358 | // If live range extend beyond end of mbb, add successors to work list. |
| 359 | for (MachineBasicBlock::succ_iterator SI = MBB->succ_begin(), |
| 360 | SE = MBB->succ_end(); SI != SE; ++SI) |
| 361 | WorkList.push_back(*SI); |
Evan Cheng | d0e32c5 | 2008-10-29 05:06:14 +0000 | [diff] [blame] | 362 | |
| 363 | while (!WorkList.empty()) { |
| 364 | MachineBasicBlock *MBB = WorkList.back(); |
| 365 | WorkList.pop_back(); |
Evan Cheng | 5489893 | 2008-10-29 08:39:34 +0000 | [diff] [blame] | 366 | if (Processed.count(MBB)) |
| 367 | continue; |
Evan Cheng | d0e32c5 | 2008-10-29 05:06:14 +0000 | [diff] [blame] | 368 | unsigned Idx = LIs->getMBBStartIdx(MBB); |
| 369 | LR = CurrLI->getLiveRangeContaining(Idx); |
Evan Cheng | 5489893 | 2008-10-29 08:39:34 +0000 | [diff] [blame] | 370 | if (LR && LR->valno == ValNo) { |
| 371 | EndIdx = LIs->getMBBEndIdx(MBB); |
| 372 | if (Idx <= RestoreIndex && RestoreIndex < EndIdx) { |
Evan Cheng | d0e32c5 | 2008-10-29 05:06:14 +0000 | [diff] [blame] | 373 | // Spill slot live interval stops at the restore. |
Evan Cheng | 5489893 | 2008-10-29 08:39:34 +0000 | [diff] [blame] | 374 | LiveRange SLR(Idx, RestoreIndex, CurrSValNo); |
Evan Cheng | d0e32c5 | 2008-10-29 05:06:14 +0000 | [diff] [blame] | 375 | CurrSLI->addRange(SLR); |
Evan Cheng | 5489893 | 2008-10-29 08:39:34 +0000 | [diff] [blame] | 376 | } else if (LR->end > EndIdx) { |
| 377 | // Live range extends beyond end of mbb, process successors. |
| 378 | LiveRange SLR(Idx, EndIdx+1, CurrSValNo); |
| 379 | CurrSLI->addRange(SLR); |
| 380 | for (MachineBasicBlock::succ_iterator SI = MBB->succ_begin(), |
| 381 | SE = MBB->succ_end(); SI != SE; ++SI) |
| 382 | WorkList.push_back(*SI); |
Evan Cheng | d0e32c5 | 2008-10-29 05:06:14 +0000 | [diff] [blame] | 383 | } else { |
Evan Cheng | 5489893 | 2008-10-29 08:39:34 +0000 | [diff] [blame] | 384 | LiveRange SLR(Idx, LR->end, CurrSValNo); |
Evan Cheng | d0e32c5 | 2008-10-29 05:06:14 +0000 | [diff] [blame] | 385 | CurrSLI->addRange(SLR); |
Evan Cheng | d0e32c5 | 2008-10-29 05:06:14 +0000 | [diff] [blame] | 386 | } |
Evan Cheng | 5489893 | 2008-10-29 08:39:34 +0000 | [diff] [blame] | 387 | Processed.insert(MBB); |
Evan Cheng | d0e32c5 | 2008-10-29 05:06:14 +0000 | [diff] [blame] | 388 | } |
| 389 | } |
| 390 | } |
| 391 | |
| 392 | /// UpdateRegisterInterval - Given the specified val# of the current live |
| 393 | /// interval is being split, and the spill and restore indices, update the live |
Evan Cheng | f5cd4f0 | 2008-10-23 20:43:13 +0000 | [diff] [blame] | 394 | /// interval accordingly. |
| 395 | void |
Evan Cheng | d0e32c5 | 2008-10-29 05:06:14 +0000 | [diff] [blame] | 396 | PreAllocSplitting::UpdateRegisterInterval(VNInfo *ValNo, unsigned SpillIndex, |
| 397 | unsigned RestoreIndex) { |
Evan Cheng | 5489893 | 2008-10-29 08:39:34 +0000 | [diff] [blame] | 398 | assert(LIs->getMBBFromIndex(RestoreIndex) == BarrierMBB && |
| 399 | "Expect restore in the barrier mbb"); |
| 400 | |
Evan Cheng | f5cd4f0 | 2008-10-23 20:43:13 +0000 | [diff] [blame] | 401 | SmallVector<std::pair<unsigned,unsigned>, 4> Before; |
| 402 | SmallVector<std::pair<unsigned,unsigned>, 4> After; |
| 403 | SmallVector<unsigned, 4> BeforeKills; |
| 404 | SmallVector<unsigned, 4> AfterKills; |
| 405 | SmallPtrSet<const LiveRange*, 4> Processed; |
| 406 | |
| 407 | // First, let's figure out which parts of the live interval is now defined |
| 408 | // by the restore, which are defined by the original definition. |
Evan Cheng | d0e32c5 | 2008-10-29 05:06:14 +0000 | [diff] [blame] | 409 | const LiveRange *LR = CurrLI->getLiveRangeContaining(RestoreIndex); |
| 410 | After.push_back(std::make_pair(RestoreIndex, LR->end)); |
Evan Cheng | 0658749 | 2008-10-24 02:05:00 +0000 | [diff] [blame] | 411 | if (CurrLI->isKill(ValNo, LR->end)) |
| 412 | AfterKills.push_back(LR->end); |
| 413 | |
Evan Cheng | d0e32c5 | 2008-10-29 05:06:14 +0000 | [diff] [blame] | 414 | assert(LR->contains(SpillIndex)); |
| 415 | if (SpillIndex > LR->start) { |
| 416 | Before.push_back(std::make_pair(LR->start, SpillIndex)); |
| 417 | BeforeKills.push_back(SpillIndex); |
Evan Cheng | 0658749 | 2008-10-24 02:05:00 +0000 | [diff] [blame] | 418 | } |
Evan Cheng | f5cd4f0 | 2008-10-23 20:43:13 +0000 | [diff] [blame] | 419 | Processed.insert(LR); |
| 420 | |
Evan Cheng | d0e32c5 | 2008-10-29 05:06:14 +0000 | [diff] [blame] | 421 | // Start from the restore mbb, figure out what part of the live interval |
| 422 | // are defined by the restore. |
Evan Cheng | f5cd4f0 | 2008-10-23 20:43:13 +0000 | [diff] [blame] | 423 | SmallVector<MachineBasicBlock*, 4> WorkList; |
Evan Cheng | 5489893 | 2008-10-29 08:39:34 +0000 | [diff] [blame] | 424 | MachineBasicBlock *MBB = BarrierMBB; |
Evan Cheng | f5cd4f0 | 2008-10-23 20:43:13 +0000 | [diff] [blame] | 425 | for (MachineBasicBlock::succ_iterator SI = MBB->succ_begin(), |
| 426 | SE = MBB->succ_end(); SI != SE; ++SI) |
| 427 | WorkList.push_back(*SI); |
| 428 | |
| 429 | while (!WorkList.empty()) { |
| 430 | MBB = WorkList.back(); |
| 431 | WorkList.pop_back(); |
| 432 | unsigned Idx = LIs->getMBBStartIdx(MBB); |
| 433 | LR = CurrLI->getLiveRangeContaining(Idx); |
| 434 | if (LR && LR->valno == ValNo && !Processed.count(LR)) { |
| 435 | After.push_back(std::make_pair(LR->start, LR->end)); |
| 436 | if (CurrLI->isKill(ValNo, LR->end)) |
| 437 | AfterKills.push_back(LR->end); |
| 438 | Idx = LIs->getMBBEndIdx(MBB); |
| 439 | if (LR->end > Idx) { |
Evan Cheng | d0e32c5 | 2008-10-29 05:06:14 +0000 | [diff] [blame] | 440 | // Live range extend beyond at least one mbb. Let's see what other |
| 441 | // mbbs it reaches. |
| 442 | LIs->findReachableMBBs(LR->start, LR->end, WorkList); |
Evan Cheng | f5cd4f0 | 2008-10-23 20:43:13 +0000 | [diff] [blame] | 443 | } |
| 444 | Processed.insert(LR); |
| 445 | } |
| 446 | } |
| 447 | |
| 448 | for (LiveInterval::iterator I = CurrLI->begin(), E = CurrLI->end(); |
| 449 | I != E; ++I) { |
| 450 | LiveRange *LR = I; |
| 451 | if (LR->valno == ValNo && !Processed.count(LR)) { |
| 452 | Before.push_back(std::make_pair(LR->start, LR->end)); |
| 453 | if (CurrLI->isKill(ValNo, LR->end)) |
| 454 | BeforeKills.push_back(LR->end); |
| 455 | } |
| 456 | } |
| 457 | |
| 458 | // Now create new val#s to represent the live ranges defined by the old def |
| 459 | // those defined by the restore. |
| 460 | unsigned AfterDef = ValNo->def; |
| 461 | MachineInstr *AfterCopy = ValNo->copy; |
| 462 | bool HasPHIKill = ValNo->hasPHIKill; |
| 463 | CurrLI->removeValNo(ValNo); |
Evan Cheng | 0658749 | 2008-10-24 02:05:00 +0000 | [diff] [blame] | 464 | VNInfo *BValNo = (Before.empty()) |
| 465 | ? NULL |
| 466 | : CurrLI->getNextValue(AfterDef, AfterCopy, LIs->getVNInfoAllocator()); |
| 467 | if (BValNo) |
| 468 | CurrLI->addKills(BValNo, BeforeKills); |
| 469 | |
| 470 | VNInfo *AValNo = (After.empty()) |
| 471 | ? NULL |
Evan Cheng | d0e32c5 | 2008-10-29 05:06:14 +0000 | [diff] [blame] | 472 | : CurrLI->getNextValue(RestoreIndex, 0, LIs->getVNInfoAllocator()); |
Evan Cheng | 0658749 | 2008-10-24 02:05:00 +0000 | [diff] [blame] | 473 | if (AValNo) { |
| 474 | AValNo->hasPHIKill = HasPHIKill; |
| 475 | CurrLI->addKills(AValNo, AfterKills); |
| 476 | } |
Evan Cheng | f5cd4f0 | 2008-10-23 20:43:13 +0000 | [diff] [blame] | 477 | |
| 478 | for (unsigned i = 0, e = Before.size(); i != e; ++i) { |
| 479 | unsigned Start = Before[i].first; |
| 480 | unsigned End = Before[i].second; |
| 481 | CurrLI->addRange(LiveRange(Start, End, BValNo)); |
| 482 | } |
| 483 | for (unsigned i = 0, e = After.size(); i != e; ++i) { |
| 484 | unsigned Start = After[i].first; |
| 485 | unsigned End = After[i].second; |
| 486 | CurrLI->addRange(LiveRange(Start, End, AValNo)); |
| 487 | } |
| 488 | } |
| 489 | |
| 490 | /// ShrinkWrapToLastUse - There are uses of the current live interval in the |
| 491 | /// given block, shrink wrap the live interval to the last use (i.e. remove |
| 492 | /// from last use to the end of the mbb). In case mbb is the where the barrier |
| 493 | /// is, remove from the last use to the barrier. |
| 494 | bool |
Evan Cheng | d0e32c5 | 2008-10-29 05:06:14 +0000 | [diff] [blame] | 495 | PreAllocSplitting::ShrinkWrapToLastUse(MachineBasicBlock *MBB, VNInfo *ValNo, |
Evan Cheng | 0658749 | 2008-10-24 02:05:00 +0000 | [diff] [blame] | 496 | SmallVector<MachineOperand*, 4> &Uses, |
| 497 | SmallPtrSet<MachineInstr*, 4> &UseMIs) { |
Evan Cheng | f5cd4f0 | 2008-10-23 20:43:13 +0000 | [diff] [blame] | 498 | MachineOperand *LastMO = 0; |
| 499 | MachineInstr *LastMI = 0; |
| 500 | if (MBB != BarrierMBB && Uses.size() == 1) { |
| 501 | // Single use, no need to traverse the block. We can't assume this for the |
| 502 | // barrier bb though since the use is probably below the barrier. |
| 503 | LastMO = Uses[0]; |
| 504 | LastMI = LastMO->getParent(); |
| 505 | } else { |
Evan Cheng | 2efe3fd | 2008-10-24 05:53:44 +0000 | [diff] [blame] | 506 | MachineBasicBlock::iterator MEE = MBB->begin(); |
Evan Cheng | f5cd4f0 | 2008-10-23 20:43:13 +0000 | [diff] [blame] | 507 | MachineBasicBlock::iterator MII; |
Evan Cheng | 2efe3fd | 2008-10-24 05:53:44 +0000 | [diff] [blame] | 508 | if (MBB == BarrierMBB) |
Evan Cheng | f5cd4f0 | 2008-10-23 20:43:13 +0000 | [diff] [blame] | 509 | MII = Barrier; |
Evan Cheng | 2efe3fd | 2008-10-24 05:53:44 +0000 | [diff] [blame] | 510 | else |
Evan Cheng | f5cd4f0 | 2008-10-23 20:43:13 +0000 | [diff] [blame] | 511 | MII = MBB->end(); |
Evan Cheng | d0e32c5 | 2008-10-29 05:06:14 +0000 | [diff] [blame] | 512 | while (MII != MEE) { |
| 513 | --MII; |
Evan Cheng | f5cd4f0 | 2008-10-23 20:43:13 +0000 | [diff] [blame] | 514 | MachineInstr *UseMI = &*MII; |
| 515 | if (!UseMIs.count(UseMI)) |
| 516 | continue; |
| 517 | for (unsigned i = 0, e = UseMI->getNumOperands(); i != e; ++i) { |
| 518 | MachineOperand &MO = UseMI->getOperand(i); |
| 519 | if (MO.isReg() && MO.getReg() == CurrLI->reg) { |
| 520 | LastMO = &MO; |
| 521 | break; |
| 522 | } |
| 523 | } |
| 524 | LastMI = UseMI; |
| 525 | break; |
| 526 | } |
| 527 | } |
| 528 | |
| 529 | // Cut off live range from last use (or beginning of the mbb if there |
| 530 | // are no uses in it) to the end of the mbb. |
| 531 | unsigned RangeStart, RangeEnd = LIs->getMBBEndIdx(MBB)+1; |
| 532 | if (LastMI) { |
| 533 | RangeStart = LIs->getUseIndex(LIs->getInstructionIndex(LastMI))+1; |
| 534 | assert(!LastMO->isKill() && "Last use already terminates the interval?"); |
| 535 | LastMO->setIsKill(); |
| 536 | } else { |
| 537 | assert(MBB == BarrierMBB); |
| 538 | RangeStart = LIs->getMBBStartIdx(MBB); |
| 539 | } |
| 540 | if (MBB == BarrierMBB) |
Evan Cheng | 0658749 | 2008-10-24 02:05:00 +0000 | [diff] [blame] | 541 | RangeEnd = LIs->getUseIndex(BarrierIdx)+1; |
Evan Cheng | f5cd4f0 | 2008-10-23 20:43:13 +0000 | [diff] [blame] | 542 | CurrLI->removeRange(RangeStart, RangeEnd); |
Evan Cheng | d0e32c5 | 2008-10-29 05:06:14 +0000 | [diff] [blame] | 543 | if (LastMI) |
| 544 | CurrLI->addKill(ValNo, RangeStart); |
Evan Cheng | f5cd4f0 | 2008-10-23 20:43:13 +0000 | [diff] [blame] | 545 | |
| 546 | // Return true if the last use becomes a new kill. |
| 547 | return LastMI; |
| 548 | } |
| 549 | |
| 550 | /// ShrinkWrapLiveInterval - Recursively traverse the predecessor |
| 551 | /// chain to find the new 'kills' and shrink wrap the live interval to the |
| 552 | /// new kill indices. |
| 553 | void |
Evan Cheng | aaf510c | 2008-10-26 07:49:03 +0000 | [diff] [blame] | 554 | PreAllocSplitting::ShrinkWrapLiveInterval(VNInfo *ValNo, MachineBasicBlock *MBB, |
| 555 | MachineBasicBlock *SuccMBB, MachineBasicBlock *DefMBB, |
Evan Cheng | 0658749 | 2008-10-24 02:05:00 +0000 | [diff] [blame] | 556 | SmallPtrSet<MachineBasicBlock*, 8> &Visited, |
| 557 | DenseMap<MachineBasicBlock*, SmallVector<MachineOperand*, 4> > &Uses, |
| 558 | DenseMap<MachineBasicBlock*, SmallPtrSet<MachineInstr*, 4> > &UseMIs, |
| 559 | SmallVector<MachineBasicBlock*, 4> &UseMBBs) { |
Evan Cheng | aaf510c | 2008-10-26 07:49:03 +0000 | [diff] [blame] | 560 | if (Visited.count(MBB)) |
Evan Cheng | f5cd4f0 | 2008-10-23 20:43:13 +0000 | [diff] [blame] | 561 | return; |
| 562 | |
Evan Cheng | aaf510c | 2008-10-26 07:49:03 +0000 | [diff] [blame] | 563 | // If live interval is live in another successor path, then we can't process |
| 564 | // this block. But we may able to do so after all the successors have been |
| 565 | // processed. |
Evan Cheng | f62ce37 | 2008-10-28 00:47:49 +0000 | [diff] [blame] | 566 | if (MBB != BarrierMBB) { |
| 567 | for (MachineBasicBlock::succ_iterator SI = MBB->succ_begin(), |
| 568 | SE = MBB->succ_end(); SI != SE; ++SI) { |
| 569 | MachineBasicBlock *SMBB = *SI; |
| 570 | if (SMBB == SuccMBB) |
| 571 | continue; |
| 572 | if (CurrLI->liveAt(LIs->getMBBStartIdx(SMBB))) |
| 573 | return; |
| 574 | } |
Evan Cheng | aaf510c | 2008-10-26 07:49:03 +0000 | [diff] [blame] | 575 | } |
| 576 | |
| 577 | Visited.insert(MBB); |
| 578 | |
Evan Cheng | 0658749 | 2008-10-24 02:05:00 +0000 | [diff] [blame] | 579 | DenseMap<MachineBasicBlock*, SmallVector<MachineOperand*, 4> >::iterator |
| 580 | UMII = Uses.find(MBB); |
Evan Cheng | f5cd4f0 | 2008-10-23 20:43:13 +0000 | [diff] [blame] | 581 | if (UMII != Uses.end()) { |
| 582 | // At least one use in this mbb, lets look for the kill. |
Evan Cheng | 0658749 | 2008-10-24 02:05:00 +0000 | [diff] [blame] | 583 | DenseMap<MachineBasicBlock*, SmallPtrSet<MachineInstr*, 4> >::iterator |
| 584 | UMII2 = UseMIs.find(MBB); |
Evan Cheng | d0e32c5 | 2008-10-29 05:06:14 +0000 | [diff] [blame] | 585 | if (ShrinkWrapToLastUse(MBB, ValNo, UMII->second, UMII2->second)) |
Evan Cheng | f5cd4f0 | 2008-10-23 20:43:13 +0000 | [diff] [blame] | 586 | // Found a kill, shrink wrapping of this path ends here. |
| 587 | return; |
Evan Cheng | 0658749 | 2008-10-24 02:05:00 +0000 | [diff] [blame] | 588 | } else if (MBB == DefMBB) { |
Evan Cheng | 0658749 | 2008-10-24 02:05:00 +0000 | [diff] [blame] | 589 | // There are no uses after the def. |
| 590 | MachineInstr *DefMI = LIs->getInstructionFromIndex(ValNo->def); |
Evan Cheng | 0658749 | 2008-10-24 02:05:00 +0000 | [diff] [blame] | 591 | if (UseMBBs.empty()) { |
| 592 | // The only use must be below barrier in the barrier block. It's safe to |
| 593 | // remove the def. |
| 594 | LIs->RemoveMachineInstrFromMaps(DefMI); |
| 595 | DefMI->eraseFromParent(); |
| 596 | CurrLI->removeRange(ValNo->def, LIs->getMBBEndIdx(MBB)+1); |
| 597 | } |
Evan Cheng | 79d5b5a | 2008-10-25 23:49:39 +0000 | [diff] [blame] | 598 | } else if (MBB == BarrierMBB) { |
| 599 | // Remove entire live range from start of mbb to barrier. |
| 600 | CurrLI->removeRange(LIs->getMBBStartIdx(MBB), |
| 601 | LIs->getUseIndex(BarrierIdx)+1); |
Evan Cheng | f5cd4f0 | 2008-10-23 20:43:13 +0000 | [diff] [blame] | 602 | } else { |
Evan Cheng | 79d5b5a | 2008-10-25 23:49:39 +0000 | [diff] [blame] | 603 | // Remove entire live range of the mbb out of the live interval. |
Evan Cheng | 0658749 | 2008-10-24 02:05:00 +0000 | [diff] [blame] | 604 | CurrLI->removeRange(LIs->getMBBStartIdx(MBB), LIs->getMBBEndIdx(MBB)+1); |
Evan Cheng | f5cd4f0 | 2008-10-23 20:43:13 +0000 | [diff] [blame] | 605 | } |
| 606 | |
| 607 | if (MBB == DefMBB) |
| 608 | // Reached the def mbb, stop traversing this path further. |
| 609 | return; |
| 610 | |
| 611 | // Traverse the pathes up the predecessor chains further. |
| 612 | for (MachineBasicBlock::pred_iterator PI = MBB->pred_begin(), |
| 613 | PE = MBB->pred_end(); PI != PE; ++PI) { |
| 614 | MachineBasicBlock *Pred = *PI; |
| 615 | if (Pred == MBB) |
| 616 | continue; |
| 617 | if (Pred == DefMBB && ValNo->hasPHIKill) |
| 618 | // Pred is the def bb and the def reaches other val#s, we must |
| 619 | // allow the value to be live out of the bb. |
| 620 | continue; |
Owen Anderson | 80fe873 | 2008-11-11 22:11:27 +0000 | [diff] [blame^] | 621 | if (!CurrLI->liveAt(LIs->getMBBEndIdx(Pred)-1)) |
| 622 | return; |
Evan Cheng | aaf510c | 2008-10-26 07:49:03 +0000 | [diff] [blame] | 623 | ShrinkWrapLiveInterval(ValNo, Pred, MBB, DefMBB, Visited, |
| 624 | Uses, UseMIs, UseMBBs); |
Evan Cheng | f5cd4f0 | 2008-10-23 20:43:13 +0000 | [diff] [blame] | 625 | } |
| 626 | |
| 627 | return; |
| 628 | } |
| 629 | |
| 630 | /// SplitRegLiveInterval - Split (spill and restore) the given live interval |
| 631 | /// so it would not cross the barrier that's being processed. Shrink wrap |
| 632 | /// (minimize) the live interval to the last uses. |
| 633 | bool PreAllocSplitting::SplitRegLiveInterval(LiveInterval *LI) { |
| 634 | CurrLI = LI; |
| 635 | |
| 636 | // Find live range where current interval cross the barrier. |
| 637 | LiveInterval::iterator LR = |
| 638 | CurrLI->FindLiveRangeContaining(LIs->getUseIndex(BarrierIdx)); |
| 639 | VNInfo *ValNo = LR->valno; |
| 640 | |
| 641 | if (ValNo->def == ~1U) { |
| 642 | // Defined by a dead def? How can this be? |
| 643 | assert(0 && "Val# is defined by a dead def?"); |
| 644 | abort(); |
| 645 | } |
| 646 | |
Evan Cheng | 0658749 | 2008-10-24 02:05:00 +0000 | [diff] [blame] | 647 | // FIXME: For now, if definition is rematerializable, do not split. |
| 648 | MachineInstr *DefMI = (ValNo->def != ~0U) |
| 649 | ? LIs->getInstructionFromIndex(ValNo->def) : NULL; |
| 650 | if (DefMI && LIs->isReMaterializable(*LI, ValNo, DefMI)) |
| 651 | return false; |
| 652 | |
Owen Anderson | b214c69 | 2008-11-05 00:32:13 +0000 | [diff] [blame] | 653 | // If this would create a new join point, do not split. |
| 654 | if (DefMI && createsNewJoin(LR, DefMI->getParent(), Barrier->getParent())) |
| 655 | return false; |
| 656 | |
Evan Cheng | f5cd4f0 | 2008-10-23 20:43:13 +0000 | [diff] [blame] | 657 | // Find all references in the barrier mbb. |
| 658 | SmallPtrSet<MachineInstr*, 4> RefsInMBB; |
| 659 | for (MachineRegisterInfo::reg_iterator I = MRI->reg_begin(CurrLI->reg), |
| 660 | E = MRI->reg_end(); I != E; ++I) { |
| 661 | MachineInstr *RefMI = &*I; |
| 662 | if (RefMI->getParent() == BarrierMBB) |
| 663 | RefsInMBB.insert(RefMI); |
| 664 | } |
| 665 | |
| 666 | // Find a point to restore the value after the barrier. |
| 667 | unsigned RestoreIndex; |
| 668 | MachineBasicBlock::iterator RestorePt = |
Evan Cheng | f62ce37 | 2008-10-28 00:47:49 +0000 | [diff] [blame] | 669 | findRestorePoint(BarrierMBB, Barrier, LR->end, RefsInMBB, RestoreIndex); |
Evan Cheng | f5cd4f0 | 2008-10-23 20:43:13 +0000 | [diff] [blame] | 670 | if (RestorePt == BarrierMBB->end()) |
| 671 | return false; |
| 672 | |
| 673 | // Add a spill either before the barrier or after the definition. |
Evan Cheng | 0658749 | 2008-10-24 02:05:00 +0000 | [diff] [blame] | 674 | MachineBasicBlock *DefMBB = DefMI ? DefMI->getParent() : NULL; |
Evan Cheng | f5cd4f0 | 2008-10-23 20:43:13 +0000 | [diff] [blame] | 675 | const TargetRegisterClass *RC = MRI->getRegClass(CurrLI->reg); |
Evan Cheng | f5cd4f0 | 2008-10-23 20:43:13 +0000 | [diff] [blame] | 676 | unsigned SpillIndex = 0; |
Evan Cheng | 0658749 | 2008-10-24 02:05:00 +0000 | [diff] [blame] | 677 | MachineInstr *SpillMI = NULL; |
Evan Cheng | 985921e | 2008-10-27 23:29:28 +0000 | [diff] [blame] | 678 | int SS = -1; |
Evan Cheng | 78dfef7 | 2008-10-25 00:52:41 +0000 | [diff] [blame] | 679 | if (ValNo->def == ~0U) { |
Evan Cheng | f5cd4f0 | 2008-10-23 20:43:13 +0000 | [diff] [blame] | 680 | // If it's defined by a phi, we must split just before the barrier. |
| 681 | MachineBasicBlock::iterator SpillPt = |
Evan Cheng | 1f08cc2 | 2008-10-28 05:28:21 +0000 | [diff] [blame] | 682 | findSpillPoint(BarrierMBB, Barrier, NULL, RefsInMBB, SpillIndex); |
Evan Cheng | f5cd4f0 | 2008-10-23 20:43:13 +0000 | [diff] [blame] | 683 | if (SpillPt == BarrierMBB->begin()) |
| 684 | return false; // No gap to insert spill. |
| 685 | // Add spill. |
Evan Cheng | d0e32c5 | 2008-10-29 05:06:14 +0000 | [diff] [blame] | 686 | SS = CreateSpillStackSlot(CurrLI->reg, RC); |
Evan Cheng | f5cd4f0 | 2008-10-23 20:43:13 +0000 | [diff] [blame] | 687 | TII->storeRegToStackSlot(*BarrierMBB, SpillPt, CurrLI->reg, true, SS, RC); |
Evan Cheng | 0658749 | 2008-10-24 02:05:00 +0000 | [diff] [blame] | 688 | SpillMI = prior(SpillPt); |
| 689 | LIs->InsertMachineInstrInMaps(SpillMI, SpillIndex); |
Evan Cheng | 5489893 | 2008-10-29 08:39:34 +0000 | [diff] [blame] | 690 | } else if (!IsAvailableInStack(DefMBB, CurrLI->reg, ValNo->def, |
| 691 | RestoreIndex, SpillIndex, SS)) { |
Evan Cheng | 78dfef7 | 2008-10-25 00:52:41 +0000 | [diff] [blame] | 692 | // If it's already split, just restore the value. There is no need to spill |
| 693 | // the def again. |
Evan Cheng | d0e32c5 | 2008-10-29 05:06:14 +0000 | [diff] [blame] | 694 | if (!DefMI) |
| 695 | return false; // Def is dead. Do nothing. |
Evan Cheng | f5cd4f0 | 2008-10-23 20:43:13 +0000 | [diff] [blame] | 696 | // Check if it's possible to insert a spill after the def MI. |
Evan Cheng | 1f08cc2 | 2008-10-28 05:28:21 +0000 | [diff] [blame] | 697 | MachineBasicBlock::iterator SpillPt; |
| 698 | if (DefMBB == BarrierMBB) { |
| 699 | // Add spill after the def and the last use before the barrier. |
| 700 | SpillPt = findSpillPoint(BarrierMBB, Barrier, DefMI, RefsInMBB, SpillIndex); |
| 701 | if (SpillPt == DefMBB->begin()) |
| 702 | return false; // No gap to insert spill. |
| 703 | } else { |
| 704 | SpillPt = findNextEmptySlot(DefMBB, DefMI, SpillIndex); |
| 705 | if (SpillPt == DefMBB->end()) |
| 706 | return false; // No gap to insert spill. |
| 707 | } |
Evan Cheng | 78dfef7 | 2008-10-25 00:52:41 +0000 | [diff] [blame] | 708 | // Add spill. The store instruction kills the register if def is before |
| 709 | // the barrier in the barrier block. |
Evan Cheng | d0e32c5 | 2008-10-29 05:06:14 +0000 | [diff] [blame] | 710 | SS = CreateSpillStackSlot(CurrLI->reg, RC); |
Evan Cheng | 0658749 | 2008-10-24 02:05:00 +0000 | [diff] [blame] | 711 | TII->storeRegToStackSlot(*DefMBB, SpillPt, CurrLI->reg, |
| 712 | DefMBB == BarrierMBB, SS, RC); |
| 713 | SpillMI = prior(SpillPt); |
| 714 | LIs->InsertMachineInstrInMaps(SpillMI, SpillIndex); |
Evan Cheng | f5cd4f0 | 2008-10-23 20:43:13 +0000 | [diff] [blame] | 715 | } |
| 716 | |
Evan Cheng | 5489893 | 2008-10-29 08:39:34 +0000 | [diff] [blame] | 717 | // Remember def instruction index to spill index mapping. |
| 718 | if (DefMI && SpillMI) |
| 719 | Def2SpillMap[ValNo->def] = SpillIndex; |
| 720 | |
Evan Cheng | f5cd4f0 | 2008-10-23 20:43:13 +0000 | [diff] [blame] | 721 | // Add restore. |
Evan Cheng | f5cd4f0 | 2008-10-23 20:43:13 +0000 | [diff] [blame] | 722 | TII->loadRegFromStackSlot(*BarrierMBB, RestorePt, CurrLI->reg, SS, RC); |
| 723 | MachineInstr *LoadMI = prior(RestorePt); |
| 724 | LIs->InsertMachineInstrInMaps(LoadMI, RestoreIndex); |
| 725 | |
| 726 | // If live interval is spilled in the same block as the barrier, just |
| 727 | // create a hole in the interval. |
| 728 | if (!DefMBB || |
Evan Cheng | 78dfef7 | 2008-10-25 00:52:41 +0000 | [diff] [blame] | 729 | (SpillMI && SpillMI->getParent() == BarrierMBB)) { |
Evan Cheng | d0e32c5 | 2008-10-29 05:06:14 +0000 | [diff] [blame] | 730 | // Update spill stack slot live interval. |
| 731 | UpdateSpillSlotInterval(ValNo, LIs->getUseIndex(SpillIndex)+1, |
| 732 | LIs->getDefIndex(RestoreIndex)); |
Evan Cheng | f5cd4f0 | 2008-10-23 20:43:13 +0000 | [diff] [blame] | 733 | |
Evan Cheng | d0e32c5 | 2008-10-29 05:06:14 +0000 | [diff] [blame] | 734 | UpdateRegisterInterval(ValNo, LIs->getUseIndex(SpillIndex)+1, |
| 735 | LIs->getDefIndex(RestoreIndex)); |
Evan Cheng | f5cd4f0 | 2008-10-23 20:43:13 +0000 | [diff] [blame] | 736 | |
Evan Cheng | ae7fa5b | 2008-10-28 01:48:24 +0000 | [diff] [blame] | 737 | ++NumSplits; |
Evan Cheng | f5cd4f0 | 2008-10-23 20:43:13 +0000 | [diff] [blame] | 738 | return true; |
| 739 | } |
| 740 | |
Evan Cheng | d0e32c5 | 2008-10-29 05:06:14 +0000 | [diff] [blame] | 741 | // Update spill stack slot live interval. |
Evan Cheng | 5489893 | 2008-10-29 08:39:34 +0000 | [diff] [blame] | 742 | UpdateSpillSlotInterval(ValNo, LIs->getUseIndex(SpillIndex)+1, |
| 743 | LIs->getDefIndex(RestoreIndex)); |
Evan Cheng | d0e32c5 | 2008-10-29 05:06:14 +0000 | [diff] [blame] | 744 | |
Evan Cheng | f5cd4f0 | 2008-10-23 20:43:13 +0000 | [diff] [blame] | 745 | // Shrink wrap the live interval by walking up the CFG and find the |
| 746 | // new kills. |
| 747 | // Now let's find all the uses of the val#. |
Evan Cheng | 0658749 | 2008-10-24 02:05:00 +0000 | [diff] [blame] | 748 | DenseMap<MachineBasicBlock*, SmallVector<MachineOperand*, 4> > Uses; |
| 749 | DenseMap<MachineBasicBlock*, SmallPtrSet<MachineInstr*, 4> > UseMIs; |
| 750 | SmallPtrSet<MachineBasicBlock*, 4> Seen; |
| 751 | SmallVector<MachineBasicBlock*, 4> UseMBBs; |
Evan Cheng | f5cd4f0 | 2008-10-23 20:43:13 +0000 | [diff] [blame] | 752 | for (MachineRegisterInfo::use_iterator UI = MRI->use_begin(CurrLI->reg), |
| 753 | UE = MRI->use_end(); UI != UE; ++UI) { |
| 754 | MachineOperand &UseMO = UI.getOperand(); |
| 755 | MachineInstr *UseMI = UseMO.getParent(); |
| 756 | unsigned UseIdx = LIs->getInstructionIndex(UseMI); |
| 757 | LiveInterval::iterator ULR = CurrLI->FindLiveRangeContaining(UseIdx); |
| 758 | if (ULR->valno != ValNo) |
| 759 | continue; |
| 760 | MachineBasicBlock *UseMBB = UseMI->getParent(); |
Evan Cheng | 0658749 | 2008-10-24 02:05:00 +0000 | [diff] [blame] | 761 | // Remember which other mbb's use this val#. |
| 762 | if (Seen.insert(UseMBB) && UseMBB != BarrierMBB) |
| 763 | UseMBBs.push_back(UseMBB); |
| 764 | DenseMap<MachineBasicBlock*, SmallVector<MachineOperand*, 4> >::iterator |
| 765 | UMII = Uses.find(UseMBB); |
| 766 | if (UMII != Uses.end()) { |
| 767 | DenseMap<MachineBasicBlock*, SmallPtrSet<MachineInstr*, 4> >::iterator |
| 768 | UMII2 = UseMIs.find(UseMBB); |
Evan Cheng | f5cd4f0 | 2008-10-23 20:43:13 +0000 | [diff] [blame] | 769 | UMII->second.push_back(&UseMO); |
Evan Cheng | 0658749 | 2008-10-24 02:05:00 +0000 | [diff] [blame] | 770 | UMII2->second.insert(UseMI); |
| 771 | } else { |
| 772 | SmallVector<MachineOperand*, 4> Ops; |
Evan Cheng | f5cd4f0 | 2008-10-23 20:43:13 +0000 | [diff] [blame] | 773 | Ops.push_back(&UseMO); |
Evan Cheng | 0658749 | 2008-10-24 02:05:00 +0000 | [diff] [blame] | 774 | Uses.insert(std::make_pair(UseMBB, Ops)); |
| 775 | SmallPtrSet<MachineInstr*, 4> MIs; |
| 776 | MIs.insert(UseMI); |
| 777 | UseMIs.insert(std::make_pair(UseMBB, MIs)); |
Evan Cheng | f5cd4f0 | 2008-10-23 20:43:13 +0000 | [diff] [blame] | 778 | } |
| 779 | } |
| 780 | |
| 781 | // Walk up the predecessor chains. |
| 782 | SmallPtrSet<MachineBasicBlock*, 8> Visited; |
Evan Cheng | aaf510c | 2008-10-26 07:49:03 +0000 | [diff] [blame] | 783 | ShrinkWrapLiveInterval(ValNo, BarrierMBB, NULL, DefMBB, Visited, |
Evan Cheng | 0658749 | 2008-10-24 02:05:00 +0000 | [diff] [blame] | 784 | Uses, UseMIs, UseMBBs); |
Evan Cheng | f5cd4f0 | 2008-10-23 20:43:13 +0000 | [diff] [blame] | 785 | |
Evan Cheng | 36f3adf | 2008-10-31 16:41:59 +0000 | [diff] [blame] | 786 | // FIXME: If ValNo->hasPHIKill is false, then renumber the val# by |
| 787 | // the restore. |
| 788 | |
Evan Cheng | f5cd4f0 | 2008-10-23 20:43:13 +0000 | [diff] [blame] | 789 | // Remove live range from barrier to the restore. FIXME: Find a better |
| 790 | // point to re-start the live interval. |
Evan Cheng | d0e32c5 | 2008-10-29 05:06:14 +0000 | [diff] [blame] | 791 | UpdateRegisterInterval(ValNo, LIs->getUseIndex(BarrierIdx)+1, |
Evan Cheng | f5cd4f0 | 2008-10-23 20:43:13 +0000 | [diff] [blame] | 792 | LIs->getDefIndex(RestoreIndex)); |
Evan Cheng | f5cd4f0 | 2008-10-23 20:43:13 +0000 | [diff] [blame] | 793 | |
Evan Cheng | ae7fa5b | 2008-10-28 01:48:24 +0000 | [diff] [blame] | 794 | ++NumSplits; |
Evan Cheng | f5cd4f0 | 2008-10-23 20:43:13 +0000 | [diff] [blame] | 795 | return true; |
| 796 | } |
| 797 | |
| 798 | /// SplitRegLiveIntervals - Split all register live intervals that cross the |
| 799 | /// barrier that's being processed. |
| 800 | bool |
| 801 | PreAllocSplitting::SplitRegLiveIntervals(const TargetRegisterClass **RCs) { |
| 802 | // First find all the virtual registers whose live intervals are intercepted |
| 803 | // by the current barrier. |
| 804 | SmallVector<LiveInterval*, 8> Intervals; |
| 805 | for (const TargetRegisterClass **RC = RCs; *RC; ++RC) { |
Evan Cheng | 2306628 | 2008-10-27 07:14:50 +0000 | [diff] [blame] | 806 | if (TII->IgnoreRegisterClassBarriers(*RC)) |
| 807 | continue; |
Evan Cheng | f5cd4f0 | 2008-10-23 20:43:13 +0000 | [diff] [blame] | 808 | std::vector<unsigned> &VRs = MRI->getRegClassVirtRegs(*RC); |
| 809 | for (unsigned i = 0, e = VRs.size(); i != e; ++i) { |
| 810 | unsigned Reg = VRs[i]; |
| 811 | if (!LIs->hasInterval(Reg)) |
| 812 | continue; |
| 813 | LiveInterval *LI = &LIs->getInterval(Reg); |
| 814 | if (LI->liveAt(BarrierIdx) && !Barrier->readsRegister(Reg)) |
| 815 | // Virtual register live interval is intercepted by the barrier. We |
| 816 | // should split and shrink wrap its interval if possible. |
| 817 | Intervals.push_back(LI); |
| 818 | } |
| 819 | } |
| 820 | |
| 821 | // Process the affected live intervals. |
| 822 | bool Change = false; |
| 823 | while (!Intervals.empty()) { |
Evan Cheng | ae7fa5b | 2008-10-28 01:48:24 +0000 | [diff] [blame] | 824 | if (PreSplitLimit != -1 && (int)NumSplits == PreSplitLimit) |
| 825 | break; |
Evan Cheng | f5cd4f0 | 2008-10-23 20:43:13 +0000 | [diff] [blame] | 826 | LiveInterval *LI = Intervals.back(); |
| 827 | Intervals.pop_back(); |
| 828 | Change |= SplitRegLiveInterval(LI); |
| 829 | } |
| 830 | |
| 831 | return Change; |
| 832 | } |
| 833 | |
Owen Anderson | f1f75b1 | 2008-11-04 22:22:41 +0000 | [diff] [blame] | 834 | bool PreAllocSplitting::createsNewJoin(LiveRange* LR, |
| 835 | MachineBasicBlock* DefMBB, |
| 836 | MachineBasicBlock* BarrierMBB) { |
| 837 | if (DefMBB == BarrierMBB) |
| 838 | return false; |
| 839 | |
| 840 | if (LR->valno->hasPHIKill) |
| 841 | return false; |
| 842 | |
| 843 | unsigned MBBEnd = LIs->getMBBEndIdx(BarrierMBB); |
| 844 | if (LR->end < MBBEnd) |
| 845 | return false; |
| 846 | |
| 847 | MachineLoopInfo& MLI = getAnalysis<MachineLoopInfo>(); |
| 848 | if (MLI.getLoopFor(DefMBB) != MLI.getLoopFor(BarrierMBB)) |
| 849 | return true; |
| 850 | |
| 851 | MachineDominatorTree& MDT = getAnalysis<MachineDominatorTree>(); |
| 852 | SmallPtrSet<MachineBasicBlock*, 4> Visited; |
| 853 | typedef std::pair<MachineBasicBlock*, |
| 854 | MachineBasicBlock::succ_iterator> ItPair; |
| 855 | SmallVector<ItPair, 4> Stack; |
| 856 | Stack.push_back(std::make_pair(BarrierMBB, BarrierMBB->succ_begin())); |
| 857 | |
| 858 | while (!Stack.empty()) { |
| 859 | ItPair P = Stack.back(); |
| 860 | Stack.pop_back(); |
| 861 | |
| 862 | MachineBasicBlock* PredMBB = P.first; |
| 863 | MachineBasicBlock::succ_iterator S = P.second; |
| 864 | |
| 865 | if (S == PredMBB->succ_end()) |
| 866 | continue; |
| 867 | else if (Visited.count(*S)) { |
| 868 | Stack.push_back(std::make_pair(PredMBB, ++S)); |
| 869 | continue; |
| 870 | } else |
Owen Anderson | b214c69 | 2008-11-05 00:32:13 +0000 | [diff] [blame] | 871 | Stack.push_back(std::make_pair(PredMBB, S+1)); |
Owen Anderson | f1f75b1 | 2008-11-04 22:22:41 +0000 | [diff] [blame] | 872 | |
| 873 | MachineBasicBlock* MBB = *S; |
| 874 | Visited.insert(MBB); |
| 875 | |
| 876 | if (MBB == BarrierMBB) |
| 877 | return true; |
| 878 | |
| 879 | MachineDomTreeNode* DefMDTN = MDT.getNode(DefMBB); |
| 880 | MachineDomTreeNode* BarrierMDTN = MDT.getNode(BarrierMBB); |
| 881 | MachineDomTreeNode* MDTN = MDT.getNode(MBB)->getIDom(); |
| 882 | while (MDTN) { |
| 883 | if (MDTN == DefMDTN) |
| 884 | return true; |
| 885 | else if (MDTN == BarrierMDTN) |
| 886 | break; |
| 887 | MDTN = MDTN->getIDom(); |
| 888 | } |
| 889 | |
| 890 | MBBEnd = LIs->getMBBEndIdx(MBB); |
| 891 | if (LR->end > MBBEnd) |
| 892 | Stack.push_back(std::make_pair(MBB, MBB->succ_begin())); |
| 893 | } |
| 894 | |
| 895 | return false; |
| 896 | } |
| 897 | |
| 898 | |
Evan Cheng | 09e8ca8 | 2008-10-20 21:44:59 +0000 | [diff] [blame] | 899 | bool PreAllocSplitting::runOnMachineFunction(MachineFunction &MF) { |
Evan Cheng | d0e32c5 | 2008-10-29 05:06:14 +0000 | [diff] [blame] | 900 | CurrMF = &MF; |
| 901 | TM = &MF.getTarget(); |
| 902 | TII = TM->getInstrInfo(); |
| 903 | MFI = MF.getFrameInfo(); |
| 904 | MRI = &MF.getRegInfo(); |
| 905 | LIs = &getAnalysis<LiveIntervals>(); |
| 906 | LSs = &getAnalysis<LiveStacks>(); |
Evan Cheng | f5cd4f0 | 2008-10-23 20:43:13 +0000 | [diff] [blame] | 907 | |
| 908 | bool MadeChange = false; |
| 909 | |
| 910 | // Make sure blocks are numbered in order. |
| 911 | MF.RenumberBlocks(); |
| 912 | |
Evan Cheng | 5489893 | 2008-10-29 08:39:34 +0000 | [diff] [blame] | 913 | #if 0 |
| 914 | // FIXME: Go top down. |
| 915 | MachineBasicBlock *Entry = MF.begin(); |
| 916 | SmallPtrSet<MachineBasicBlock*,16> Visited; |
| 917 | |
| 918 | for (df_ext_iterator<MachineBasicBlock*, SmallPtrSet<MachineBasicBlock*,16> > |
| 919 | DFI = df_ext_begin(Entry, Visited), E = df_ext_end(Entry, Visited); |
| 920 | DFI != E; ++DFI) { |
| 921 | BarrierMBB = *DFI; |
| 922 | for (MachineBasicBlock::iterator I = BarrierMBB->begin(), |
| 923 | E = BarrierMBB->end(); I != E; ++I) { |
| 924 | Barrier = &*I; |
| 925 | const TargetRegisterClass **BarrierRCs = |
| 926 | Barrier->getDesc().getRegClassBarriers(); |
| 927 | if (!BarrierRCs) |
| 928 | continue; |
| 929 | BarrierIdx = LIs->getInstructionIndex(Barrier); |
| 930 | MadeChange |= SplitRegLiveIntervals(BarrierRCs); |
| 931 | } |
| 932 | } |
| 933 | #else |
Evan Cheng | f5cd4f0 | 2008-10-23 20:43:13 +0000 | [diff] [blame] | 934 | for (MachineFunction::reverse_iterator I = MF.rbegin(), E = MF.rend(); |
| 935 | I != E; ++I) { |
| 936 | BarrierMBB = &*I; |
| 937 | for (MachineBasicBlock::reverse_iterator II = BarrierMBB->rbegin(), |
| 938 | EE = BarrierMBB->rend(); II != EE; ++II) { |
| 939 | Barrier = &*II; |
| 940 | const TargetRegisterClass **BarrierRCs = |
| 941 | Barrier->getDesc().getRegClassBarriers(); |
| 942 | if (!BarrierRCs) |
| 943 | continue; |
| 944 | BarrierIdx = LIs->getInstructionIndex(Barrier); |
| 945 | MadeChange |= SplitRegLiveIntervals(BarrierRCs); |
| 946 | } |
| 947 | } |
Evan Cheng | 5489893 | 2008-10-29 08:39:34 +0000 | [diff] [blame] | 948 | #endif |
Evan Cheng | f5cd4f0 | 2008-10-23 20:43:13 +0000 | [diff] [blame] | 949 | |
| 950 | return MadeChange; |
Evan Cheng | 09e8ca8 | 2008-10-20 21:44:59 +0000 | [diff] [blame] | 951 | } |