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Dan Gohmanf17a25c2007-07-18 16:29:46 +00001//===-- ARMTargetMachine.h - Define TargetMachine for ARM -------*- C++ -*-===//
2//
3// The LLVM Compiler Infrastructure
4//
Chris Lattner081ce942007-12-29 20:36:04 +00005// This file is distributed under the University of Illinois Open Source
Dan Gohmanf17a25c2007-07-18 16:29:46 +00006// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file declares the ARM specific subclass of TargetMachine.
11//
12//===----------------------------------------------------------------------===//
13
14#ifndef ARMTARGETMACHINE_H
15#define ARMTARGETMACHINE_H
16
17#include "llvm/Target/TargetMachine.h"
18#include "llvm/Target/TargetData.h"
Dan Gohmanf17a25c2007-07-18 16:29:46 +000019#include "ARMInstrInfo.h"
20#include "ARMFrameInfo.h"
21#include "ARMJITInfo.h"
22#include "ARMSubtarget.h"
23#include "ARMISelLowering.h"
David Goodwinaca520d2009-07-02 22:18:33 +000024#include "Thumb1InstrInfo.h"
25#include "Thumb2InstrInfo.h"
Dan Gohmanf17a25c2007-07-18 16:29:46 +000026
27namespace llvm {
28
29class Module;
30
Anton Korobeynikov65d16ea2009-06-26 21:28:53 +000031class ARMBaseTargetMachine : public LLVMTargetMachine {
32protected:
Evan Cheng88e78d22009-06-19 01:51:50 +000033 ARMSubtarget Subtarget;
Anton Korobeynikov65d16ea2009-06-26 21:28:53 +000034
35private:
Evan Cheng88e78d22009-06-19 01:51:50 +000036 ARMFrameInfo FrameInfo;
37 ARMJITInfo JITInfo;
Evan Cheng88e78d22009-06-19 01:51:50 +000038 InstrItineraryData InstrItins;
39 Reloc::Model DefRelocModel; // Reloc model before it's overridden.
Dan Gohmanf17a25c2007-07-18 16:29:46 +000040
Anton Korobeynikov74b114b2008-08-17 13:55:10 +000041protected:
42 // To avoid having target depend on the asmprinter stuff libraries, asmprinter
43 // set this functions to ctor pointer at startup time if they are linked in.
David Greene302008d2009-07-14 20:18:05 +000044 typedef FunctionPass *(*AsmPrinterCtorFn)(formatted_raw_ostream &o,
Daniel Dunbar6fa4f572009-07-15 09:22:31 +000045 TargetMachine &tm,
Bill Wendling5ed22ac2009-04-29 23:29:43 +000046 bool verbose);
Anton Korobeynikov74b114b2008-08-17 13:55:10 +000047 static AsmPrinterCtorFn AsmPrinterCtor;
48
Dan Gohmanf17a25c2007-07-18 16:29:46 +000049public:
Daniel Dunbar8ea70212009-07-15 12:11:05 +000050 ARMBaseTargetMachine(const Target &T, const Module &M, const std::string &FS,
51 bool isThumb);
Dan Gohmanf17a25c2007-07-18 16:29:46 +000052
Dan Gohmanb41dfba2008-05-14 01:58:56 +000053 virtual const ARMFrameInfo *getFrameInfo() const { return &FrameInfo; }
54 virtual ARMJITInfo *getJITInfo() { return &JITInfo; }
Dan Gohmanf17a25c2007-07-18 16:29:46 +000055 virtual const ARMSubtarget *getSubtargetImpl() const { return &Subtarget; }
Anton Korobeynikov65d16ea2009-06-26 21:28:53 +000056 virtual const InstrItineraryData getInstrItineraryData() const {
Evan Cheng88e78d22009-06-19 01:51:50 +000057 return InstrItins;
58 }
Anton Korobeynikov74b114b2008-08-17 13:55:10 +000059
60 static void registerAsmPrinter(AsmPrinterCtorFn F) {
61 AsmPrinterCtor = F;
62 }
63
Dan Gohmanf17a25c2007-07-18 16:29:46 +000064 static unsigned getModuleMatchQuality(const Module &M);
65 static unsigned getJITMatchQuality();
66
67 virtual const TargetAsmInfo *createTargetAsmInfo() const;
Anton Korobeynikov74b114b2008-08-17 13:55:10 +000068
Dan Gohmanf17a25c2007-07-18 16:29:46 +000069 // Pass Pipeline Configuration
Bill Wendling5ed22ac2009-04-29 23:29:43 +000070 virtual bool addInstSelector(PassManagerBase &PM, CodeGenOpt::Level OptLevel);
Evan Cheng54353c92009-06-13 09:12:55 +000071 virtual bool addPreRegAlloc(PassManagerBase &PM, CodeGenOpt::Level OptLevel);
Bill Wendling5ed22ac2009-04-29 23:29:43 +000072 virtual bool addPreEmitPass(PassManagerBase &PM, CodeGenOpt::Level OptLevel);
73 virtual bool addAssemblyEmitter(PassManagerBase &PM,
74 CodeGenOpt::Level OptLevel,
David Greene302008d2009-07-14 20:18:05 +000075 bool Verbose, formatted_raw_ostream &Out);
Bill Wendling5ed22ac2009-04-29 23:29:43 +000076 virtual bool addCodeEmitter(PassManagerBase &PM, CodeGenOpt::Level OptLevel,
Evan Cheng77547212007-07-20 21:56:13 +000077 bool DumpAsm, MachineCodeEmitter &MCE);
Bruno Cardoso Lopes1ea31ff2009-05-30 20:51:52 +000078 virtual bool addCodeEmitter(PassManagerBase &PM, CodeGenOpt::Level OptLevel,
79 bool DumpAsm, JITCodeEmitter &MCE);
Bruno Cardoso Lopesaabb9a52009-07-06 05:09:34 +000080 virtual bool addCodeEmitter(PassManagerBase &PM, CodeGenOpt::Level OptLevel,
81 bool DumpAsm, ObjectCodeEmitter &OCE);
Bill Wendling5ed22ac2009-04-29 23:29:43 +000082 virtual bool addSimpleCodeEmitter(PassManagerBase &PM,
83 CodeGenOpt::Level OptLevel,
84 bool DumpAsm,
85 MachineCodeEmitter &MCE);
Bruno Cardoso Lopes1ea31ff2009-05-30 20:51:52 +000086 virtual bool addSimpleCodeEmitter(PassManagerBase &PM,
87 CodeGenOpt::Level OptLevel,
88 bool DumpAsm,
89 JITCodeEmitter &MCE);
Bruno Cardoso Lopesaabb9a52009-07-06 05:09:34 +000090 virtual bool addSimpleCodeEmitter(PassManagerBase &PM,
91 CodeGenOpt::Level OptLevel,
92 bool DumpAsm,
93 ObjectCodeEmitter &OCE);
Dan Gohmanf17a25c2007-07-18 16:29:46 +000094};
95
Anton Korobeynikov65d16ea2009-06-26 21:28:53 +000096/// ARMTargetMachine - ARM target machine.
97///
98class ARMTargetMachine : public ARMBaseTargetMachine {
99 ARMInstrInfo InstrInfo;
100 const TargetData DataLayout; // Calculates type size & alignment
101 ARMTargetLowering TLInfo;
102public:
Daniel Dunbar8ea70212009-07-15 12:11:05 +0000103 ARMTargetMachine(const Target &T, const Module &M, const std::string &FS);
Anton Korobeynikov65d16ea2009-06-26 21:28:53 +0000104
105 virtual const ARMRegisterInfo *getRegisterInfo() const {
106 return &InstrInfo.getRegisterInfo();
107 }
108
109 virtual ARMTargetLowering *getTargetLowering() const {
110 return const_cast<ARMTargetLowering*>(&TLInfo);
111 }
112
113 virtual const ARMInstrInfo *getInstrInfo() const { return &InstrInfo; }
114 virtual const TargetData *getTargetData() const { return &DataLayout; }
115
116 static unsigned getJITMatchQuality();
117 static unsigned getModuleMatchQuality(const Module &M);
118};
119
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000120/// ThumbTargetMachine - Thumb target machine.
David Goodwinaca520d2009-07-02 22:18:33 +0000121/// Due to the way architectures are handled, this represents both
122/// Thumb-1 and Thumb-2.
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000123///
Anton Korobeynikov65d16ea2009-06-26 21:28:53 +0000124class ThumbTargetMachine : public ARMBaseTargetMachine {
David Goodwinaca520d2009-07-02 22:18:33 +0000125 ARMBaseInstrInfo *InstrInfo; // either Thumb1InstrInfo or Thumb2InstrInfo
126 const TargetData DataLayout; // Calculates type size & alignment
Anton Korobeynikov65d16ea2009-06-26 21:28:53 +0000127 ARMTargetLowering TLInfo;
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000128public:
Daniel Dunbar8ea70212009-07-15 12:11:05 +0000129 ThumbTargetMachine(const Target &T, const Module &M, const std::string &FS);
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000130
David Goodwinaca520d2009-07-02 22:18:33 +0000131 /// returns either Thumb1RegisterInfo of Thumb2RegisterInfo
132 virtual const ARMBaseRegisterInfo *getRegisterInfo() const {
133 return &InstrInfo->getRegisterInfo();
Anton Korobeynikov65d16ea2009-06-26 21:28:53 +0000134 }
135
David Goodwinaca520d2009-07-02 22:18:33 +0000136 virtual ARMTargetLowering *getTargetLowering() const {
Anton Korobeynikov65d16ea2009-06-26 21:28:53 +0000137 return const_cast<ARMTargetLowering*>(&TLInfo);
138 }
139
David Goodwinaca520d2009-07-02 22:18:33 +0000140 /// returns either Thumb1InstrInfo or Thumb2InstrInfo
141 virtual const ARMBaseInstrInfo *getInstrInfo() const { return InstrInfo; }
Anton Korobeynikov65d16ea2009-06-26 21:28:53 +0000142 virtual const TargetData *getTargetData() const { return &DataLayout; }
143
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000144 static unsigned getJITMatchQuality();
145 static unsigned getModuleMatchQuality(const Module &M);
146};
147
148} // end namespace llvm
149
150#endif