| Chad Rosier | 9eb6748 | 2011-11-13 09:44:21 +0000 | [diff] [blame] | 1 | ; RUN: llc < %s -O0 -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=armv7-apple-darwin | FileCheck %s --check-prefix=ARM |
| Chad Rosier | 11add26 | 2011-11-11 23:31:03 +0000 | [diff] [blame] | 2 | ; RUN: llc < %s -O0 -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=thumbv7-apple-darwin | FileCheck %s --check-prefix=THUMB |
| 3 | |
| 4 | @message1 = global [60 x i8] c"The LLVM Compiler Infrastructure\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00", align 1 |
| 5 | @temp = common global [60 x i8] zeroinitializer, align 1 |
| 6 | |
| 7 | define void @t1() nounwind ssp { |
| 8 | ; ARM: t1 |
| 9 | ; ARM: ldr r0, LCPI0_0 |
| 10 | ; ARM: add r0, r0, #5 |
| 11 | ; ARM: movw r1, #64 |
| 12 | ; ARM: movw r2, #10 |
| 13 | ; ARM: uxtb r1, r1 |
| Chad Rosier | 9eb6748 | 2011-11-13 09:44:21 +0000 | [diff] [blame] | 14 | ; ARM: bl _memset |
| Chad Rosier | 11add26 | 2011-11-11 23:31:03 +0000 | [diff] [blame] | 15 | ; THUMB: t1 |
| 16 | ; THUMB: ldr.n r0, LCPI0_0 |
| 17 | ; THUMB: adds r0, #5 |
| 18 | ; THUMB: movs r1, #64 |
| 19 | ; THUMB: movt r1, #0 |
| 20 | ; THUMB: movs r2, #10 |
| 21 | ; THUMB: movt r2, #0 |
| 22 | ; THUMB: uxtb r1, r1 |
| 23 | ; THUMB: bl _memset |
| 24 | call void @llvm.memset.p0i8.i32(i8* getelementptr inbounds ([60 x i8]* @message1, i32 0, i32 5), i8 64, i32 10, i32 1, i1 false) |
| 25 | ret void |
| 26 | } |
| 27 | |
| 28 | declare void @llvm.memset.p0i8.i32(i8* nocapture, i8, i32, i32, i1) nounwind |
| 29 | |
| 30 | define void @t2() nounwind ssp { |
| 31 | ; ARM: t2 |
| 32 | ; ARM: ldr r0, LCPI1_0 |
| 33 | ; ARM: ldr r0, [r0] |
| 34 | ; ARM: add r1, r0, #4 |
| 35 | ; ARM: add r0, r0, #16 |
| 36 | ; ARM: movw r2, #10 |
| 37 | ; ARM: str r0, [sp] @ 4-byte Spill |
| 38 | ; ARM: mov r0, r1 |
| 39 | ; ARM: ldr r1, [sp] @ 4-byte Reload |
| Chad Rosier | 9eb6748 | 2011-11-13 09:44:21 +0000 | [diff] [blame] | 40 | ; ARM: bl _memcpy |
| Chad Rosier | 11add26 | 2011-11-11 23:31:03 +0000 | [diff] [blame] | 41 | ; THUMB: t2 |
| 42 | ; THUMB: ldr.n r0, LCPI1_0 |
| 43 | ; THUMB: ldr r0, [r0] |
| 44 | ; THUMB: adds r1, r0, #4 |
| 45 | ; THUMB: adds r0, #16 |
| 46 | ; THUMB: movs r2, #10 |
| 47 | ; THUMB: movt r2, #0 |
| 48 | ; THUMB: mov r0, r1 |
| 49 | ; THUMB: bl _memcpy |
| 50 | call void @llvm.memcpy.p0i8.p0i8.i32(i8* getelementptr inbounds ([60 x i8]* @temp, i32 0, i32 4), i8* getelementptr inbounds ([60 x i8]* @temp, i32 0, i32 16), i32 10, i32 1, i1 false) |
| 51 | ret void |
| 52 | } |
| 53 | |
| 54 | declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i32, i1) nounwind |
| 55 | |
| 56 | define void @t3() nounwind ssp { |
| 57 | ; ARM: t3 |
| 58 | ; ARM: ldr r0, LCPI2_0 |
| 59 | ; ARM: ldr r0, [r0] |
| 60 | ; ARM: add r1, r0, #4 |
| 61 | ; ARM: add r0, r0, #16 |
| 62 | ; ARM: movw r2, #10 |
| 63 | ; ARM: mov r0, r1 |
| Chad Rosier | 9eb6748 | 2011-11-13 09:44:21 +0000 | [diff] [blame] | 64 | ; ARM: bl _memmove |
| Chad Rosier | 11add26 | 2011-11-11 23:31:03 +0000 | [diff] [blame] | 65 | ; THUMB: t3 |
| 66 | ; THUMB: ldr.n r0, LCPI2_0 |
| 67 | ; THUMB: ldr r0, [r0] |
| 68 | ; THUMB: adds r1, r0, #4 |
| 69 | ; THUMB: adds r0, #16 |
| 70 | ; THUMB: movs r2, #10 |
| 71 | ; THUMB: movt r2, #0 |
| 72 | ; THUMB: mov r0, r1 |
| 73 | ; THUMB: bl _memmove |
| 74 | call void @llvm.memmove.p0i8.p0i8.i32(i8* getelementptr inbounds ([60 x i8]* @temp, i32 0, i32 4), i8* getelementptr inbounds ([60 x i8]* @temp, i32 0, i32 16), i32 10, i32 1, i1 false) |
| 75 | ret void |
| 76 | } |
| 77 | |
| 78 | declare void @llvm.memmove.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i32, i1) nounwind |