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Ruchira Sasanka8e604792001-09-14 21:18:34 +00001#include "llvm/CodeGen/LiveRangeInfo.h"
2
3LiveRangeInfo::LiveRangeInfo(const Method *const M,
4 const TargetMachine& tm,
5 vector<RegClass *> &RCL)
6 : Meth(M), LiveRangeMap(),
Ruchira Sasankaa5ab9642001-09-30 23:11:59 +00007 TM(tm), RegClassList(RCL),
8 MRI( tm.getRegInfo()),
9 CallRetInstrList()
Ruchira Sasanka8e604792001-09-14 21:18:34 +000010{ }
11
12
13// union two live ranges into one. The 2nd LR is deleted. Used for coalescing.
Ruchira Sasankaa5ab9642001-09-30 23:11:59 +000014// Note: the caller must make sure that L1 and L2 are distinct and both
15// LRs don't have suggested colors
Ruchira Sasanka8e604792001-09-14 21:18:34 +000016
17void LiveRangeInfo::unionAndUpdateLRs(LiveRange *const L1, LiveRange *L2)
18{
19 assert( L1 != L2);
20 L1->setUnion( L2 ); // add elements of L2 to L1
21 ValueSet::iterator L2It;
22
23 for( L2It = L2->begin() ; L2It != L2->end(); ++L2It) {
24
25 //assert(( L1->getTypeID() == L2->getTypeID()) && "Merge:Different types");
26
27 L1->add( *L2It ); // add the var in L2 to L1
28 LiveRangeMap[ *L2It ] = L1; // now the elements in L2 should map to L1
29 }
Ruchira Sasankaa5ab9642001-09-30 23:11:59 +000030
31
32 // Now if LROfDef(L1) has a suggested color, it will remain.
33 // But, if LROfUse(L2) has a suggested color, the new range
34 // must have the same color.
35
36 if(L2->hasSuggestedColor())
37 L1->setSuggestedColor( L2->getSuggestedColor() );
38
Ruchira Sasanka8e604792001-09-14 21:18:34 +000039 delete ( L2 ); // delete L2 as it is no longer needed
40}
41
42
43
44
45void LiveRangeInfo::constructLiveRanges()
46{
47
48 if( DEBUG_RA)
Ruchira Sasankac4d4b762001-10-16 01:23:19 +000049 cout << "Consturcting Live Ranges ..." << endl;
Ruchira Sasanka8e604792001-09-14 21:18:34 +000050
51 // first find the live ranges for all incoming args of the method since
52 // those LRs start from the start of the method
53
54 // get the argument list
55 const Method::ArgumentListType& ArgList = Meth->getArgumentList();
56 // get an iterator to arg list
57 Method::ArgumentListType::const_iterator ArgIt = ArgList.begin();
58
59
60 for( ; ArgIt != ArgList.end() ; ++ArgIt) { // for each argument
61
62 LiveRange * ArgRange = new LiveRange(); // creates a new LR and
63 const Value *const Val = (const Value *) *ArgIt;
64
65 assert( Val);
66
67 ArgRange->add( Val ); // add the arg (def) to it
68 LiveRangeMap[ Val ] = ArgRange;
69
70 // create a temp machine op to find the register class of value
71 //const MachineOperand Op(MachineOperand::MO_VirtualRegister);
72
Ruchira Sasankaa5ab9642001-09-30 23:11:59 +000073 unsigned rcid = MRI.getRegClassIDOfValue( Val );
Ruchira Sasanka8e604792001-09-14 21:18:34 +000074 ArgRange->setRegClass(RegClassList[ rcid ] );
75
76
77 if( DEBUG_RA > 1) {
Ruchira Sasankac4d4b762001-10-16 01:23:19 +000078 cout << " adding LiveRange for argument ";
79 printValue( (const Value *) *ArgIt); cout << endl;
Ruchira Sasanka8e604792001-09-14 21:18:34 +000080 }
81 }
82
Ruchira Sasankaa5ab9642001-09-30 23:11:59 +000083 // Now suggest hardware registers for these method args
84 MRI.suggestRegs4MethodArgs(Meth, *this);
Ruchira Sasanka8e604792001-09-14 21:18:34 +000085
Ruchira Sasankaa5ab9642001-09-30 23:11:59 +000086
87
88 // Now find speical LLVM instructions (CALL, RET) and LRs in machine
89 // instructions.
90
Ruchira Sasanka8e604792001-09-14 21:18:34 +000091
92 Method::const_iterator BBI = Meth->begin(); // random iterator for BBs
93
94 for( ; BBI != Meth->end(); ++BBI) { // go thru BBs in random order
95
Ruchira Sasankaa5ab9642001-09-30 23:11:59 +000096 // Now find all LRs for machine the instructions. A new LR will be created
97 // only for defs in the machine instr since, we assume that all Values are
98 // defined before they are used. However, there can be multiple defs for
99 // the same Value in machine instructions.
100
Ruchira Sasanka8e604792001-09-14 21:18:34 +0000101 // get the iterator for machine instructions
102 const MachineCodeForBasicBlock& MIVec = (*BBI)->getMachineInstrVec();
103 MachineCodeForBasicBlock::const_iterator
104 MInstIterator = MIVec.begin();
105
106 // iterate over all the machine instructions in BB
107 for( ; MInstIterator != MIVec.end(); MInstIterator++) {
108
109 const MachineInstr * MInst = *MInstIterator;
Ruchira Sasankaa5ab9642001-09-30 23:11:59 +0000110
Ruchira Sasankaa90e7702001-10-15 16:26:38 +0000111 // Now if the machine instruction is a call/return instruction,
112 // add it to CallRetInstrList for processing its implicit operands
Ruchira Sasankaa5ab9642001-09-30 23:11:59 +0000113
Ruchira Sasankaa90e7702001-10-15 16:26:38 +0000114 if( (TM.getInstrInfo()).isReturn( MInst->getOpCode()) ||
115 (TM.getInstrInfo()).isCall( MInst->getOpCode()) )
116 CallRetInstrList.push_back( MInst );
117
118
Ruchira Sasanka8e604792001-09-14 21:18:34 +0000119 // iterate over MI operands to find defs
Ruchira Sasankaa5ab9642001-09-30 23:11:59 +0000120 for( MachineInstr::val_op_const_iterator OpI(MInst);!OpI.done(); ++OpI) {
Ruchira Sasanka8e604792001-09-14 21:18:34 +0000121
Ruchira Sasankaa90e7702001-10-15 16:26:38 +0000122 if( DEBUG_RA) {
123 MachineOperand::MachineOperandType OpTyp =
124 OpI.getMachineOperand().getOperandType();
Ruchira Sasankae727f852001-09-18 22:43:57 +0000125
Ruchira Sasankaa90e7702001-10-15 16:26:38 +0000126 if ( OpTyp == MachineOperand::MO_CCRegister) {
Ruchira Sasankac4d4b762001-10-16 01:23:19 +0000127 cout << "\n**CC reg found. Is Def=" << OpI.isDef() << " Val:";
Ruchira Sasankaa90e7702001-10-15 16:26:38 +0000128 printValue( OpI.getMachineOperand().getVRegValue() );
Ruchira Sasankac4d4b762001-10-16 01:23:19 +0000129 cout << endl;
Ruchira Sasankaa90e7702001-10-15 16:26:38 +0000130 }
Ruchira Sasankae727f852001-09-18 22:43:57 +0000131 }
Ruchira Sasankae727f852001-09-18 22:43:57 +0000132
Ruchira Sasanka8e604792001-09-14 21:18:34 +0000133 // create a new LR iff this operand is a def
134 if( OpI.isDef() ) {
135
136 const Value *const Def = *OpI;
Ruchira Sasankaa5ab9642001-09-30 23:11:59 +0000137
138
139 // Only instruction values are accepted for live ranges here
140
141 if( Def->getValueType() != Value::InstructionVal ) {
Ruchira Sasankac4d4b762001-10-16 01:23:19 +0000142 cout << "\n**%%Error: Def is not an instruction val. Def=";
143 printValue( Def ); cout << endl;
Ruchira Sasankaa5ab9642001-09-30 23:11:59 +0000144 continue;
145 }
146
147
Ruchira Sasanka8e604792001-09-14 21:18:34 +0000148 LiveRange *DefRange = LiveRangeMap[Def];
149
150 // see LR already there (because of multiple defs)
151
152 if( !DefRange) { // if it is not in LiveRangeMap
153
154 DefRange = new LiveRange(); // creates a new live range and
155 DefRange->add( Def ); // add the instruction (def) to it
156 LiveRangeMap[ Def ] = DefRange; // update the map
157
158 if( DEBUG_RA > 1) {
Ruchira Sasankac4d4b762001-10-16 01:23:19 +0000159 cout << " creating a LR for def: ";
160 printValue(Def); cout << endl;
Ruchira Sasanka8e604792001-09-14 21:18:34 +0000161 }
162
163 // set the register class of the new live range
164 //assert( RegClassList.size() );
165 MachineOperand::MachineOperandType OpTy =
166 OpI.getMachineOperand().getOperandType();
167
168 bool isCC = ( OpTy == MachineOperand::MO_CCRegister);
Ruchira Sasankaa5ab9642001-09-30 23:11:59 +0000169 unsigned rcid = MRI.getRegClassIDOfValue(
Ruchira Sasanka8e604792001-09-14 21:18:34 +0000170 OpI.getMachineOperand().getVRegValue(), isCC );
171
172
Ruchira Sasankae727f852001-09-18 22:43:57 +0000173 if(isCC && DEBUG_RA) {
Ruchira Sasankac4d4b762001-10-16 01:23:19 +0000174 cout << "\a**created a LR for a CC reg:";
Ruchira Sasanka0931a012001-09-15 19:06:58 +0000175 printValue( OpI.getMachineOperand().getVRegValue() );
176 }
Ruchira Sasanka8e604792001-09-14 21:18:34 +0000177
178 DefRange->setRegClass( RegClassList[ rcid ] );
179
180 }
181 else {
182 DefRange->add( Def ); // add the opearand to def range
183 // update the map - Operand points
184 // to the merged set
185 LiveRangeMap[ Def ] = DefRange;
186
187 if( DEBUG_RA > 1) {
Ruchira Sasankac4d4b762001-10-16 01:23:19 +0000188 cout << " added to an existing LR for def: ";
189 printValue( Def ); cout << endl;
Ruchira Sasanka8e604792001-09-14 21:18:34 +0000190 }
191 }
192
Ruchira Sasanka8e604792001-09-14 21:18:34 +0000193 } // if isDef()
194
195 } // for all opereands in machine instructions
196
197 } // for all machine instructions in the BB
198
Ruchira Sasankaa5ab9642001-09-30 23:11:59 +0000199 } // for all BBs in method
200
Ruchira Sasankaa5ab9642001-09-30 23:11:59 +0000201
Ruchira Sasankaa90e7702001-10-15 16:26:38 +0000202 // Now we have to suggest clors for call and return arg live ranges.
203 // Also, if there are implicit defs (e.g., retun value of a call inst)
204 // they must be added to the live range list
Ruchira Sasankaa5ab9642001-09-30 23:11:59 +0000205
Ruchira Sasankaa90e7702001-10-15 16:26:38 +0000206 suggestRegs4CallRets();
Ruchira Sasanka8e604792001-09-14 21:18:34 +0000207
208 if( DEBUG_RA)
Ruchira Sasankac4d4b762001-10-16 01:23:19 +0000209 cout << "Initial Live Ranges constructed!" << endl;
Ruchira Sasanka8e604792001-09-14 21:18:34 +0000210
211}
212
213
214
Ruchira Sasankaa90e7702001-10-15 16:26:38 +0000215// Suggest colors for call and return args.
216// Also create new LRs for implicit defs
217
218void LiveRangeInfo::suggestRegs4CallRets()
219{
220
221 CallRetInstrListType::const_iterator It = CallRetInstrList.begin();
222
223 for( ; It != CallRetInstrList.end(); ++It ) {
224
225 const MachineInstr *MInst = *It;
226 MachineOpCode OpCode = MInst->getOpCode();
227
228 if( (TM.getInstrInfo()).isReturn(OpCode) )
229 MRI.suggestReg4RetValue( MInst, *this);
230
231 else if( (TM.getInstrInfo()).isCall( OpCode ) )
232 MRI.suggestRegs4CallArgs( MInst, *this, RegClassList );
233
234 else
235 assert( 0 && "Non call/ret instr in CallRetInstrList" );
236 }
237
238}
239
240
241
242
Ruchira Sasanka8e604792001-09-14 21:18:34 +0000243void LiveRangeInfo::coalesceLRs()
244{
245
246/* Algorithm:
247 for each BB in method
248 for each machine instruction (inst)
249 for each definition (def) in inst
250 for each operand (op) of inst that is a use
Ruchira Sasankad33238b2001-10-12 17:48:18 +0000251 if the def and op are of the same register class
Ruchira Sasanka8e604792001-09-14 21:18:34 +0000252 if the def and op do not interfere //i.e., not simultaneously live
253 if (degree(LR of def) + degree(LR of op)) <= # avail regs
Ruchira Sasankaa5ab9642001-09-30 23:11:59 +0000254 if both LRs do not have suggested colors
255 merge2IGNodes(def, op) // i.e., merge 2 LRs
Ruchira Sasanka8e604792001-09-14 21:18:34 +0000256
257*/
258
259 if( DEBUG_RA)
Ruchira Sasankac4d4b762001-10-16 01:23:19 +0000260 cout << endl << "Coalscing LRs ..." << endl;
Ruchira Sasanka8e604792001-09-14 21:18:34 +0000261
262 Method::const_iterator BBI = Meth->begin(); // random iterator for BBs
263
264 for( ; BBI != Meth->end(); ++BBI) { // traverse BBs in random order
265
266 // get the iterator for machine instructions
267 const MachineCodeForBasicBlock& MIVec = (*BBI)->getMachineInstrVec();
268 MachineCodeForBasicBlock::const_iterator
269 MInstIterator = MIVec.begin();
270
271 // iterate over all the machine instructions in BB
272 for( ; MInstIterator != MIVec.end(); ++MInstIterator) {
273
274 const MachineInstr * MInst = *MInstIterator;
275
276 if( DEBUG_RA > 1) {
Ruchira Sasankac4d4b762001-10-16 01:23:19 +0000277 cout << " *Iterating over machine instr ";
Ruchira Sasanka8e604792001-09-14 21:18:34 +0000278 MInst->dump();
Ruchira Sasankac4d4b762001-10-16 01:23:19 +0000279 cout << endl;
Ruchira Sasanka8e604792001-09-14 21:18:34 +0000280 }
281
282
283 // iterate over MI operands to find defs
284 for(MachineInstr::val_op_const_iterator DefI(MInst);!DefI.done();++DefI){
285
286 if( DefI.isDef() ) { // iff this operand is a def
287
288 LiveRange *const LROfDef = getLiveRangeForValue( *DefI );
289 assert( LROfDef );
290 RegClass *const RCOfDef = LROfDef->getRegClass();
291
292 MachineInstr::val_op_const_iterator UseI(MInst);
293 for( ; !UseI.done(); ++UseI){ // for all uses
294
295 LiveRange *const LROfUse = getLiveRangeForValue( *UseI );
296
297 if( ! LROfUse ) { // if LR of use is not found
298
299 //don't warn about labels
300 if (!((*UseI)->getType())->isLabelType() && DEBUG_RA) {
Ruchira Sasankac4d4b762001-10-16 01:23:19 +0000301 cout<<" !! Warning: No LR for use "; printValue(*UseI);
302 cout << endl;
Ruchira Sasanka8e604792001-09-14 21:18:34 +0000303 }
304 continue; // ignore and continue
305 }
306
307 if( LROfUse == LROfDef) // nothing to merge if they are same
308 continue;
309
Ruchira Sasankad33238b2001-10-12 17:48:18 +0000310 RegClass *const RCOfUse = LROfUse->getRegClass();
Ruchira Sasanka8e604792001-09-14 21:18:34 +0000311
Ruchira Sasankad33238b2001-10-12 17:48:18 +0000312 if( RCOfDef == RCOfUse ) { // if the reg classes are the same
Ruchira Sasanka8e604792001-09-14 21:18:34 +0000313
Ruchira Sasanka8e604792001-09-14 21:18:34 +0000314 if( ! RCOfDef->getInterference(LROfDef, LROfUse) ) {
315
316 unsigned CombinedDegree =
317 LROfDef->getUserIGNode()->getNumOfNeighbors() +
318 LROfUse->getUserIGNode()->getNumOfNeighbors();
319
320 if( CombinedDegree <= RCOfDef->getNumOfAvailRegs() ) {
321
Ruchira Sasankaa5ab9642001-09-30 23:11:59 +0000322 // if both LRs do not have suggested colors
323 if( ! (LROfDef->hasSuggestedColor() &&
324 LROfUse->hasSuggestedColor() ) ) {
325
326 RCOfDef->mergeIGNodesOfLRs(LROfDef, LROfUse);
327 unionAndUpdateLRs(LROfDef, LROfUse);
328 }
329
Ruchira Sasanka8e604792001-09-14 21:18:34 +0000330
331 } // if combined degree is less than # of regs
332
333 } // if def and use do not interfere
334
Ruchira Sasankad33238b2001-10-12 17:48:18 +0000335 }// if reg classes are the same
Ruchira Sasanka8e604792001-09-14 21:18:34 +0000336
337 } // for all uses
338
339 } // if def
340
341 } // for all defs
342
343 } // for all machine instructions
344
345 } // for all BBs
346
347 if( DEBUG_RA)
Ruchira Sasankac4d4b762001-10-16 01:23:19 +0000348 cout << endl << "Coalscing Done!" << endl;
Ruchira Sasanka8e604792001-09-14 21:18:34 +0000349
350}
351
352
353
354
355
356/*--------------------------- Debug code for printing ---------------*/
357
358
359void LiveRangeInfo::printLiveRanges()
360{
361 LiveRangeMapType::iterator HMI = LiveRangeMap.begin(); // hash map iterator
Ruchira Sasankac4d4b762001-10-16 01:23:19 +0000362 cout << endl << "Printing Live Ranges from Hash Map:" << endl;
Ruchira Sasanka8e604792001-09-14 21:18:34 +0000363 for( ; HMI != LiveRangeMap.end() ; HMI ++ ) {
Ruchira Sasankaa5ab9642001-09-30 23:11:59 +0000364 if( (*HMI).first && (*HMI).second ) {
Ruchira Sasankac4d4b762001-10-16 01:23:19 +0000365 cout <<" "; printValue((*HMI).first); cout << "\t: ";
366 ((*HMI).second)->printSet(); cout << endl;
Ruchira Sasanka8e604792001-09-14 21:18:34 +0000367 }
368 }
369}
370
371