Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 1 | //===-- ARMISelLowering.cpp - ARM DAG Lowering Implementation -------------===// |
| 2 | // |
| 3 | // The LLVM Compiler Infrastructure |
| 4 | // |
Chris Lattner | 4ee451d | 2007-12-29 20:36:04 +0000 | [diff] [blame] | 5 | // This file is distributed under the University of Illinois Open Source |
| 6 | // License. See LICENSE.TXT for details. |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 7 | // |
| 8 | //===----------------------------------------------------------------------===// |
| 9 | // |
| 10 | // This file defines the interfaces that ARM uses to lower LLVM code into a |
| 11 | // selection DAG. |
| 12 | // |
| 13 | //===----------------------------------------------------------------------===// |
| 14 | |
| 15 | #include "ARM.h" |
| 16 | #include "ARMAddressingModes.h" |
| 17 | #include "ARMConstantPoolValue.h" |
| 18 | #include "ARMISelLowering.h" |
| 19 | #include "ARMMachineFunctionInfo.h" |
| 20 | #include "ARMRegisterInfo.h" |
| 21 | #include "ARMSubtarget.h" |
| 22 | #include "ARMTargetMachine.h" |
| 23 | #include "llvm/CallingConv.h" |
| 24 | #include "llvm/Constants.h" |
Bob Wilson | 1f595bb | 2009-04-17 19:07:39 +0000 | [diff] [blame] | 25 | #include "llvm/Function.h" |
Evan Cheng | 2770747 | 2007-03-16 08:43:56 +0000 | [diff] [blame] | 26 | #include "llvm/Instruction.h" |
Lauro Ramos Venancio | e0cb36b | 2007-11-08 17:20:05 +0000 | [diff] [blame] | 27 | #include "llvm/Intrinsics.h" |
Chris Lattner | 84bc542 | 2007-12-31 04:13:23 +0000 | [diff] [blame] | 28 | #include "llvm/GlobalValue.h" |
Bob Wilson | 1f595bb | 2009-04-17 19:07:39 +0000 | [diff] [blame] | 29 | #include "llvm/CodeGen/CallingConvLower.h" |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 30 | #include "llvm/CodeGen/MachineBasicBlock.h" |
| 31 | #include "llvm/CodeGen/MachineFrameInfo.h" |
| 32 | #include "llvm/CodeGen/MachineFunction.h" |
| 33 | #include "llvm/CodeGen/MachineInstrBuilder.h" |
Chris Lattner | 84bc542 | 2007-12-31 04:13:23 +0000 | [diff] [blame] | 34 | #include "llvm/CodeGen/MachineRegisterInfo.h" |
Bob Wilson | 1f595bb | 2009-04-17 19:07:39 +0000 | [diff] [blame] | 35 | #include "llvm/CodeGen/PseudoSourceValue.h" |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 36 | #include "llvm/CodeGen/SelectionDAG.h" |
Evan Cheng | b6ab254 | 2007-01-31 08:40:13 +0000 | [diff] [blame] | 37 | #include "llvm/Target/TargetOptions.h" |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 38 | #include "llvm/ADT/VectorExtras.h" |
Evan Cheng | b01fad6 | 2007-03-12 23:30:29 +0000 | [diff] [blame] | 39 | #include "llvm/Support/MathExtras.h" |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 40 | using namespace llvm; |
| 41 | |
Bob Wilson | dee46d7 | 2009-04-17 20:35:10 +0000 | [diff] [blame] | 42 | static bool CC_ARM_APCS_Custom_f64(unsigned &ValNo, MVT &ValVT, MVT &LocVT, |
Bob Wilson | 1f595bb | 2009-04-17 19:07:39 +0000 | [diff] [blame] | 43 | CCValAssign::LocInfo &LocInfo, |
| 44 | ISD::ArgFlagsTy &ArgFlags, |
| 45 | CCState &State); |
Bob Wilson | dee46d7 | 2009-04-17 20:35:10 +0000 | [diff] [blame] | 46 | static bool CC_ARM_AAPCS_Custom_f64(unsigned &ValNo, MVT &ValVT, MVT &LocVT, |
Bob Wilson | 1f595bb | 2009-04-17 19:07:39 +0000 | [diff] [blame] | 47 | CCValAssign::LocInfo &LocInfo, |
| 48 | ISD::ArgFlagsTy &ArgFlags, |
| 49 | CCState &State); |
Bob Wilson | dee46d7 | 2009-04-17 20:35:10 +0000 | [diff] [blame] | 50 | static bool RetCC_ARM_APCS_Custom_f64(unsigned &ValNo, MVT &ValVT, MVT &LocVT, |
Bob Wilson | 1f595bb | 2009-04-17 19:07:39 +0000 | [diff] [blame] | 51 | CCValAssign::LocInfo &LocInfo, |
| 52 | ISD::ArgFlagsTy &ArgFlags, |
| 53 | CCState &State); |
Bob Wilson | dee46d7 | 2009-04-17 20:35:10 +0000 | [diff] [blame] | 54 | static bool RetCC_ARM_AAPCS_Custom_f64(unsigned &ValNo, MVT &ValVT, MVT &LocVT, |
Bob Wilson | 1f595bb | 2009-04-17 19:07:39 +0000 | [diff] [blame] | 55 | CCValAssign::LocInfo &LocInfo, |
| 56 | ISD::ArgFlagsTy &ArgFlags, |
| 57 | CCState &State); |
| 58 | |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 59 | ARMTargetLowering::ARMTargetLowering(TargetMachine &TM) |
| 60 | : TargetLowering(TM), ARMPCLabelIndex(0) { |
| 61 | Subtarget = &TM.getSubtarget<ARMSubtarget>(); |
| 62 | |
Evan Cheng | b1df8f2 | 2007-04-27 08:15:43 +0000 | [diff] [blame] | 63 | if (Subtarget->isTargetDarwin()) { |
Evan Cheng | b1df8f2 | 2007-04-27 08:15:43 +0000 | [diff] [blame] | 64 | // Uses VFP for Thumb libfuncs if available. |
| 65 | if (Subtarget->isThumb() && Subtarget->hasVFP2()) { |
| 66 | // Single-precision floating-point arithmetic. |
| 67 | setLibcallName(RTLIB::ADD_F32, "__addsf3vfp"); |
| 68 | setLibcallName(RTLIB::SUB_F32, "__subsf3vfp"); |
| 69 | setLibcallName(RTLIB::MUL_F32, "__mulsf3vfp"); |
| 70 | setLibcallName(RTLIB::DIV_F32, "__divsf3vfp"); |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 71 | |
Evan Cheng | b1df8f2 | 2007-04-27 08:15:43 +0000 | [diff] [blame] | 72 | // Double-precision floating-point arithmetic. |
| 73 | setLibcallName(RTLIB::ADD_F64, "__adddf3vfp"); |
| 74 | setLibcallName(RTLIB::SUB_F64, "__subdf3vfp"); |
| 75 | setLibcallName(RTLIB::MUL_F64, "__muldf3vfp"); |
| 76 | setLibcallName(RTLIB::DIV_F64, "__divdf3vfp"); |
Evan Cheng | 193f850 | 2007-01-31 09:30:58 +0000 | [diff] [blame] | 77 | |
Evan Cheng | b1df8f2 | 2007-04-27 08:15:43 +0000 | [diff] [blame] | 78 | // Single-precision comparisons. |
| 79 | setLibcallName(RTLIB::OEQ_F32, "__eqsf2vfp"); |
| 80 | setLibcallName(RTLIB::UNE_F32, "__nesf2vfp"); |
| 81 | setLibcallName(RTLIB::OLT_F32, "__ltsf2vfp"); |
| 82 | setLibcallName(RTLIB::OLE_F32, "__lesf2vfp"); |
| 83 | setLibcallName(RTLIB::OGE_F32, "__gesf2vfp"); |
| 84 | setLibcallName(RTLIB::OGT_F32, "__gtsf2vfp"); |
| 85 | setLibcallName(RTLIB::UO_F32, "__unordsf2vfp"); |
| 86 | setLibcallName(RTLIB::O_F32, "__unordsf2vfp"); |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 87 | |
Evan Cheng | b1df8f2 | 2007-04-27 08:15:43 +0000 | [diff] [blame] | 88 | setCmpLibcallCC(RTLIB::OEQ_F32, ISD::SETNE); |
| 89 | setCmpLibcallCC(RTLIB::UNE_F32, ISD::SETNE); |
| 90 | setCmpLibcallCC(RTLIB::OLT_F32, ISD::SETNE); |
| 91 | setCmpLibcallCC(RTLIB::OLE_F32, ISD::SETNE); |
| 92 | setCmpLibcallCC(RTLIB::OGE_F32, ISD::SETNE); |
| 93 | setCmpLibcallCC(RTLIB::OGT_F32, ISD::SETNE); |
| 94 | setCmpLibcallCC(RTLIB::UO_F32, ISD::SETNE); |
| 95 | setCmpLibcallCC(RTLIB::O_F32, ISD::SETEQ); |
Evan Cheng | 193f850 | 2007-01-31 09:30:58 +0000 | [diff] [blame] | 96 | |
Evan Cheng | b1df8f2 | 2007-04-27 08:15:43 +0000 | [diff] [blame] | 97 | // Double-precision comparisons. |
| 98 | setLibcallName(RTLIB::OEQ_F64, "__eqdf2vfp"); |
| 99 | setLibcallName(RTLIB::UNE_F64, "__nedf2vfp"); |
| 100 | setLibcallName(RTLIB::OLT_F64, "__ltdf2vfp"); |
| 101 | setLibcallName(RTLIB::OLE_F64, "__ledf2vfp"); |
| 102 | setLibcallName(RTLIB::OGE_F64, "__gedf2vfp"); |
| 103 | setLibcallName(RTLIB::OGT_F64, "__gtdf2vfp"); |
| 104 | setLibcallName(RTLIB::UO_F64, "__unorddf2vfp"); |
| 105 | setLibcallName(RTLIB::O_F64, "__unorddf2vfp"); |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 106 | |
Evan Cheng | b1df8f2 | 2007-04-27 08:15:43 +0000 | [diff] [blame] | 107 | setCmpLibcallCC(RTLIB::OEQ_F64, ISD::SETNE); |
| 108 | setCmpLibcallCC(RTLIB::UNE_F64, ISD::SETNE); |
| 109 | setCmpLibcallCC(RTLIB::OLT_F64, ISD::SETNE); |
| 110 | setCmpLibcallCC(RTLIB::OLE_F64, ISD::SETNE); |
| 111 | setCmpLibcallCC(RTLIB::OGE_F64, ISD::SETNE); |
| 112 | setCmpLibcallCC(RTLIB::OGT_F64, ISD::SETNE); |
| 113 | setCmpLibcallCC(RTLIB::UO_F64, ISD::SETNE); |
| 114 | setCmpLibcallCC(RTLIB::O_F64, ISD::SETEQ); |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 115 | |
Evan Cheng | b1df8f2 | 2007-04-27 08:15:43 +0000 | [diff] [blame] | 116 | // Floating-point to integer conversions. |
| 117 | // i64 conversions are done via library routines even when generating VFP |
| 118 | // instructions, so use the same ones. |
| 119 | setLibcallName(RTLIB::FPTOSINT_F64_I32, "__fixdfsivfp"); |
| 120 | setLibcallName(RTLIB::FPTOUINT_F64_I32, "__fixunsdfsivfp"); |
| 121 | setLibcallName(RTLIB::FPTOSINT_F32_I32, "__fixsfsivfp"); |
| 122 | setLibcallName(RTLIB::FPTOUINT_F32_I32, "__fixunssfsivfp"); |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 123 | |
Evan Cheng | b1df8f2 | 2007-04-27 08:15:43 +0000 | [diff] [blame] | 124 | // Conversions between floating types. |
| 125 | setLibcallName(RTLIB::FPROUND_F64_F32, "__truncdfsf2vfp"); |
| 126 | setLibcallName(RTLIB::FPEXT_F32_F64, "__extendsfdf2vfp"); |
| 127 | |
| 128 | // Integer to floating-point conversions. |
| 129 | // i64 conversions are done via library routines even when generating VFP |
| 130 | // instructions, so use the same ones. |
Bob Wilson | 2a14c52 | 2009-03-20 23:16:43 +0000 | [diff] [blame] | 131 | // FIXME: There appears to be some naming inconsistency in ARM libgcc: |
| 132 | // e.g., __floatunsidf vs. __floatunssidfvfp. |
Evan Cheng | b1df8f2 | 2007-04-27 08:15:43 +0000 | [diff] [blame] | 133 | setLibcallName(RTLIB::SINTTOFP_I32_F64, "__floatsidfvfp"); |
| 134 | setLibcallName(RTLIB::UINTTOFP_I32_F64, "__floatunssidfvfp"); |
| 135 | setLibcallName(RTLIB::SINTTOFP_I32_F32, "__floatsisfvfp"); |
| 136 | setLibcallName(RTLIB::UINTTOFP_I32_F32, "__floatunssisfvfp"); |
| 137 | } |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 138 | } |
| 139 | |
Jim Grosbach | 30eae3c | 2009-04-07 20:34:09 +0000 | [diff] [blame] | 140 | if (Subtarget->isThumb()) |
| 141 | addRegisterClass(MVT::i32, ARM::tGPRRegisterClass); |
| 142 | else |
| 143 | addRegisterClass(MVT::i32, ARM::GPRRegisterClass); |
Evan Cheng | b6ab254 | 2007-01-31 08:40:13 +0000 | [diff] [blame] | 144 | if (!UseSoftFloat && Subtarget->hasVFP2() && !Subtarget->isThumb()) { |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 145 | addRegisterClass(MVT::f32, ARM::SPRRegisterClass); |
| 146 | addRegisterClass(MVT::f64, ARM::DPRRegisterClass); |
Bob Wilson | 2dc4f54 | 2009-03-20 22:42:55 +0000 | [diff] [blame] | 147 | |
Chris Lattner | ddf8956 | 2008-01-17 19:59:44 +0000 | [diff] [blame] | 148 | setTruncStoreAction(MVT::f64, MVT::f32, Expand); |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 149 | } |
Evan Cheng | 9f8cbd1 | 2007-05-18 00:19:34 +0000 | [diff] [blame] | 150 | computeRegisterProperties(); |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 151 | |
| 152 | // ARM does not have f32 extending load. |
Evan Cheng | 0329466 | 2008-10-14 21:26:46 +0000 | [diff] [blame] | 153 | setLoadExtAction(ISD::EXTLOAD, MVT::f32, Expand); |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 154 | |
Duncan Sands | f9c98e6 | 2008-01-23 20:39:46 +0000 | [diff] [blame] | 155 | // ARM does not have i1 sign extending load. |
Evan Cheng | 0329466 | 2008-10-14 21:26:46 +0000 | [diff] [blame] | 156 | setLoadExtAction(ISD::SEXTLOAD, MVT::i1, Promote); |
Duncan Sands | f9c98e6 | 2008-01-23 20:39:46 +0000 | [diff] [blame] | 157 | |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 158 | // ARM supports all 4 flavors of integer indexed load / store. |
| 159 | for (unsigned im = (unsigned)ISD::PRE_INC; |
| 160 | im != (unsigned)ISD::LAST_INDEXED_MODE; ++im) { |
| 161 | setIndexedLoadAction(im, MVT::i1, Legal); |
| 162 | setIndexedLoadAction(im, MVT::i8, Legal); |
| 163 | setIndexedLoadAction(im, MVT::i16, Legal); |
| 164 | setIndexedLoadAction(im, MVT::i32, Legal); |
| 165 | setIndexedStoreAction(im, MVT::i1, Legal); |
| 166 | setIndexedStoreAction(im, MVT::i8, Legal); |
| 167 | setIndexedStoreAction(im, MVT::i16, Legal); |
| 168 | setIndexedStoreAction(im, MVT::i32, Legal); |
| 169 | } |
| 170 | |
| 171 | // i64 operation support. |
| 172 | if (Subtarget->isThumb()) { |
| 173 | setOperationAction(ISD::MUL, MVT::i64, Expand); |
| 174 | setOperationAction(ISD::MULHU, MVT::i32, Expand); |
| 175 | setOperationAction(ISD::MULHS, MVT::i32, Expand); |
Dan Gohman | 525178c | 2007-10-08 18:33:35 +0000 | [diff] [blame] | 176 | setOperationAction(ISD::UMUL_LOHI, MVT::i32, Expand); |
| 177 | setOperationAction(ISD::SMUL_LOHI, MVT::i32, Expand); |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 178 | } else { |
Dan Gohman | 525178c | 2007-10-08 18:33:35 +0000 | [diff] [blame] | 179 | setOperationAction(ISD::MUL, MVT::i64, Expand); |
| 180 | setOperationAction(ISD::MULHU, MVT::i32, Expand); |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 181 | if (!Subtarget->hasV6Ops()) |
Dan Gohman | 525178c | 2007-10-08 18:33:35 +0000 | [diff] [blame] | 182 | setOperationAction(ISD::MULHS, MVT::i32, Expand); |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 183 | } |
| 184 | setOperationAction(ISD::SHL_PARTS, MVT::i32, Expand); |
| 185 | setOperationAction(ISD::SRA_PARTS, MVT::i32, Expand); |
| 186 | setOperationAction(ISD::SRL_PARTS, MVT::i32, Expand); |
| 187 | setOperationAction(ISD::SRL, MVT::i64, Custom); |
| 188 | setOperationAction(ISD::SRA, MVT::i64, Custom); |
| 189 | |
| 190 | // ARM does not have ROTL. |
| 191 | setOperationAction(ISD::ROTL, MVT::i32, Expand); |
Bob Wilson | 2dc4f54 | 2009-03-20 22:42:55 +0000 | [diff] [blame] | 192 | setOperationAction(ISD::CTTZ, MVT::i32, Expand); |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 193 | setOperationAction(ISD::CTPOP, MVT::i32, Expand); |
Evan Cheng | b063615 | 2007-02-01 23:34:03 +0000 | [diff] [blame] | 194 | if (!Subtarget->hasV5TOps() || Subtarget->isThumb()) |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 195 | setOperationAction(ISD::CTLZ, MVT::i32, Expand); |
| 196 | |
Lauro Ramos Venancio | 368f20f | 2007-03-16 22:54:16 +0000 | [diff] [blame] | 197 | // Only ARMv6 has BSWAP. |
| 198 | if (!Subtarget->hasV6Ops()) |
Chris Lattner | 1719e13 | 2007-03-20 02:25:53 +0000 | [diff] [blame] | 199 | setOperationAction(ISD::BSWAP, MVT::i32, Expand); |
Lauro Ramos Venancio | 368f20f | 2007-03-16 22:54:16 +0000 | [diff] [blame] | 200 | |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 201 | // These are expanded into libcalls. |
| 202 | setOperationAction(ISD::SDIV, MVT::i32, Expand); |
| 203 | setOperationAction(ISD::UDIV, MVT::i32, Expand); |
| 204 | setOperationAction(ISD::SREM, MVT::i32, Expand); |
| 205 | setOperationAction(ISD::UREM, MVT::i32, Expand); |
Dan Gohman | 525178c | 2007-10-08 18:33:35 +0000 | [diff] [blame] | 206 | setOperationAction(ISD::SDIVREM, MVT::i32, Expand); |
| 207 | setOperationAction(ISD::UDIVREM, MVT::i32, Expand); |
Bob Wilson | 2dc4f54 | 2009-03-20 22:42:55 +0000 | [diff] [blame] | 208 | |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 209 | // Support label based line numbers. |
Dan Gohman | 7f46020 | 2008-06-30 20:59:49 +0000 | [diff] [blame] | 210 | setOperationAction(ISD::DBG_STOPPOINT, MVT::Other, Expand); |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 211 | setOperationAction(ISD::DEBUG_LOC, MVT::Other, Expand); |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 212 | |
| 213 | setOperationAction(ISD::RET, MVT::Other, Custom); |
| 214 | setOperationAction(ISD::GlobalAddress, MVT::i32, Custom); |
| 215 | setOperationAction(ISD::ConstantPool, MVT::i32, Custom); |
Lauro Ramos Venancio | 0ae4a33 | 2007-04-22 00:04:12 +0000 | [diff] [blame] | 216 | setOperationAction(ISD::GLOBAL_OFFSET_TABLE, MVT::i32, Custom); |
Lauro Ramos Venancio | 64f4fa5 | 2007-04-27 13:54:47 +0000 | [diff] [blame] | 217 | setOperationAction(ISD::GlobalTLSAddress, MVT::i32, Custom); |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 218 | |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 219 | // Use the default implementation. |
Bob Wilson | 2dc4f54 | 2009-03-20 22:42:55 +0000 | [diff] [blame] | 220 | setOperationAction(ISD::VASTART, MVT::Other, Custom); |
| 221 | setOperationAction(ISD::VAARG, MVT::Other, Expand); |
| 222 | setOperationAction(ISD::VACOPY, MVT::Other, Expand); |
| 223 | setOperationAction(ISD::VAEND, MVT::Other, Expand); |
| 224 | setOperationAction(ISD::STACKSAVE, MVT::Other, Expand); |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 225 | setOperationAction(ISD::STACKRESTORE, MVT::Other, Expand); |
Bob Wilson | 2dc4f54 | 2009-03-20 22:42:55 +0000 | [diff] [blame] | 226 | setOperationAction(ISD::DYNAMIC_STACKALLOC, MVT::i32, Expand); |
| 227 | setOperationAction(ISD::MEMBARRIER, MVT::Other, Expand); |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 228 | |
| 229 | if (!Subtarget->hasV6Ops()) { |
| 230 | setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i16, Expand); |
| 231 | setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i8, Expand); |
| 232 | } |
| 233 | setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i1, Expand); |
| 234 | |
Evan Cheng | b6ab254 | 2007-01-31 08:40:13 +0000 | [diff] [blame] | 235 | if (!UseSoftFloat && Subtarget->hasVFP2() && !Subtarget->isThumb()) |
Evan Cheng | c7c7729 | 2008-11-04 19:57:48 +0000 | [diff] [blame] | 236 | // Turn f64->i64 into FMRRD, i64 -> f64 to FMDRR iff target supports vfp2. |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 237 | setOperationAction(ISD::BIT_CONVERT, MVT::i64, Custom); |
Lauro Ramos Venancio | e0cb36b | 2007-11-08 17:20:05 +0000 | [diff] [blame] | 238 | |
| 239 | // We want to custom lower some of our intrinsics. |
| 240 | setOperationAction(ISD::INTRINSIC_WO_CHAIN, MVT::Other, Custom); |
| 241 | |
Bob Wilson | 2dc4f54 | 2009-03-20 22:42:55 +0000 | [diff] [blame] | 242 | setOperationAction(ISD::SETCC, MVT::i32, Expand); |
| 243 | setOperationAction(ISD::SETCC, MVT::f32, Expand); |
| 244 | setOperationAction(ISD::SETCC, MVT::f64, Expand); |
| 245 | setOperationAction(ISD::SELECT, MVT::i32, Expand); |
| 246 | setOperationAction(ISD::SELECT, MVT::f32, Expand); |
| 247 | setOperationAction(ISD::SELECT, MVT::f64, Expand); |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 248 | setOperationAction(ISD::SELECT_CC, MVT::i32, Custom); |
| 249 | setOperationAction(ISD::SELECT_CC, MVT::f32, Custom); |
| 250 | setOperationAction(ISD::SELECT_CC, MVT::f64, Custom); |
| 251 | |
Bob Wilson | 2dc4f54 | 2009-03-20 22:42:55 +0000 | [diff] [blame] | 252 | setOperationAction(ISD::BRCOND, MVT::Other, Expand); |
| 253 | setOperationAction(ISD::BR_CC, MVT::i32, Custom); |
| 254 | setOperationAction(ISD::BR_CC, MVT::f32, Custom); |
| 255 | setOperationAction(ISD::BR_CC, MVT::f64, Custom); |
| 256 | setOperationAction(ISD::BR_JT, MVT::Other, Custom); |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 257 | |
Dan Gohman | f96e4de | 2007-10-11 23:21:31 +0000 | [diff] [blame] | 258 | // We don't support sin/cos/fmod/copysign/pow |
Bob Wilson | 2dc4f54 | 2009-03-20 22:42:55 +0000 | [diff] [blame] | 259 | setOperationAction(ISD::FSIN, MVT::f64, Expand); |
| 260 | setOperationAction(ISD::FSIN, MVT::f32, Expand); |
| 261 | setOperationAction(ISD::FCOS, MVT::f32, Expand); |
| 262 | setOperationAction(ISD::FCOS, MVT::f64, Expand); |
| 263 | setOperationAction(ISD::FREM, MVT::f64, Expand); |
| 264 | setOperationAction(ISD::FREM, MVT::f32, Expand); |
Evan Cheng | 110cf48 | 2008-04-01 01:50:16 +0000 | [diff] [blame] | 265 | if (!UseSoftFloat && Subtarget->hasVFP2() && !Subtarget->isThumb()) { |
| 266 | setOperationAction(ISD::FCOPYSIGN, MVT::f64, Custom); |
| 267 | setOperationAction(ISD::FCOPYSIGN, MVT::f32, Custom); |
| 268 | } |
Bob Wilson | 2dc4f54 | 2009-03-20 22:42:55 +0000 | [diff] [blame] | 269 | setOperationAction(ISD::FPOW, MVT::f64, Expand); |
| 270 | setOperationAction(ISD::FPOW, MVT::f32, Expand); |
| 271 | |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 272 | // int <-> fp are custom expanded into bit_convert + ARMISD ops. |
Evan Cheng | 110cf48 | 2008-04-01 01:50:16 +0000 | [diff] [blame] | 273 | if (!UseSoftFloat && Subtarget->hasVFP2() && !Subtarget->isThumb()) { |
| 274 | setOperationAction(ISD::SINT_TO_FP, MVT::i32, Custom); |
| 275 | setOperationAction(ISD::UINT_TO_FP, MVT::i32, Custom); |
| 276 | setOperationAction(ISD::FP_TO_UINT, MVT::i32, Custom); |
| 277 | setOperationAction(ISD::FP_TO_SINT, MVT::i32, Custom); |
| 278 | } |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 279 | |
Chris Lattner | f1b1c5e | 2007-11-27 22:36:16 +0000 | [diff] [blame] | 280 | // We have target-specific dag combine patterns for the following nodes: |
| 281 | // ARMISD::FMRRD - No need to call setTargetDAGCombine |
Chris Lattner | d1980a5 | 2009-03-12 06:52:53 +0000 | [diff] [blame] | 282 | setTargetDAGCombine(ISD::ADD); |
| 283 | setTargetDAGCombine(ISD::SUB); |
Bob Wilson | 2dc4f54 | 2009-03-20 22:42:55 +0000 | [diff] [blame] | 284 | |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 285 | setStackPointerRegisterToSaveRestore(ARM::SP); |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 286 | setSchedulingPreference(SchedulingForRegPressure); |
Evan Cheng | 9f8cbd1 | 2007-05-18 00:19:34 +0000 | [diff] [blame] | 287 | setIfCvtBlockSizeLimit(Subtarget->isThumb() ? 0 : 10); |
Evan Cheng | 97e604e | 2007-06-19 23:55:02 +0000 | [diff] [blame] | 288 | setIfCvtDupBlockSizeLimit(Subtarget->isThumb() ? 0 : 2); |
Dale Johannesen | 8dd86c1 | 2007-05-17 21:31:21 +0000 | [diff] [blame] | 289 | |
| 290 | maxStoresPerMemcpy = 1; //// temporary - rewrite interface to use type |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 291 | } |
| 292 | |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 293 | const char *ARMTargetLowering::getTargetNodeName(unsigned Opcode) const { |
| 294 | switch (Opcode) { |
| 295 | default: return 0; |
| 296 | case ARMISD::Wrapper: return "ARMISD::Wrapper"; |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 297 | case ARMISD::WrapperJT: return "ARMISD::WrapperJT"; |
| 298 | case ARMISD::CALL: return "ARMISD::CALL"; |
Evan Cheng | 277f074 | 2007-06-19 21:05:09 +0000 | [diff] [blame] | 299 | case ARMISD::CALL_PRED: return "ARMISD::CALL_PRED"; |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 300 | case ARMISD::CALL_NOLINK: return "ARMISD::CALL_NOLINK"; |
| 301 | case ARMISD::tCALL: return "ARMISD::tCALL"; |
| 302 | case ARMISD::BRCOND: return "ARMISD::BRCOND"; |
| 303 | case ARMISD::BR_JT: return "ARMISD::BR_JT"; |
| 304 | case ARMISD::RET_FLAG: return "ARMISD::RET_FLAG"; |
| 305 | case ARMISD::PIC_ADD: return "ARMISD::PIC_ADD"; |
| 306 | case ARMISD::CMP: return "ARMISD::CMP"; |
Lauro Ramos Venancio | 9996663 | 2007-04-02 01:30:03 +0000 | [diff] [blame] | 307 | case ARMISD::CMPNZ: return "ARMISD::CMPNZ"; |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 308 | case ARMISD::CMPFP: return "ARMISD::CMPFP"; |
| 309 | case ARMISD::CMPFPw0: return "ARMISD::CMPFPw0"; |
| 310 | case ARMISD::FMSTAT: return "ARMISD::FMSTAT"; |
| 311 | case ARMISD::CMOV: return "ARMISD::CMOV"; |
| 312 | case ARMISD::CNEG: return "ARMISD::CNEG"; |
Bob Wilson | 2dc4f54 | 2009-03-20 22:42:55 +0000 | [diff] [blame] | 313 | |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 314 | case ARMISD::FTOSI: return "ARMISD::FTOSI"; |
| 315 | case ARMISD::FTOUI: return "ARMISD::FTOUI"; |
| 316 | case ARMISD::SITOF: return "ARMISD::SITOF"; |
| 317 | case ARMISD::UITOF: return "ARMISD::UITOF"; |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 318 | |
| 319 | case ARMISD::SRL_FLAG: return "ARMISD::SRL_FLAG"; |
| 320 | case ARMISD::SRA_FLAG: return "ARMISD::SRA_FLAG"; |
| 321 | case ARMISD::RRX: return "ARMISD::RRX"; |
Bob Wilson | 2dc4f54 | 2009-03-20 22:42:55 +0000 | [diff] [blame] | 322 | |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 323 | case ARMISD::FMRRD: return "ARMISD::FMRRD"; |
| 324 | case ARMISD::FMDRR: return "ARMISD::FMDRR"; |
Lauro Ramos Venancio | 64f4fa5 | 2007-04-27 13:54:47 +0000 | [diff] [blame] | 325 | |
| 326 | case ARMISD::THREAD_POINTER:return "ARMISD::THREAD_POINTER"; |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 327 | } |
| 328 | } |
| 329 | |
| 330 | //===----------------------------------------------------------------------===// |
| 331 | // Lowering Code |
| 332 | //===----------------------------------------------------------------------===// |
| 333 | |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 334 | /// IntCCToARMCC - Convert a DAG integer condition code to an ARM CC |
| 335 | static ARMCC::CondCodes IntCCToARMCC(ISD::CondCode CC) { |
| 336 | switch (CC) { |
| 337 | default: assert(0 && "Unknown condition code!"); |
| 338 | case ISD::SETNE: return ARMCC::NE; |
| 339 | case ISD::SETEQ: return ARMCC::EQ; |
| 340 | case ISD::SETGT: return ARMCC::GT; |
| 341 | case ISD::SETGE: return ARMCC::GE; |
| 342 | case ISD::SETLT: return ARMCC::LT; |
| 343 | case ISD::SETLE: return ARMCC::LE; |
| 344 | case ISD::SETUGT: return ARMCC::HI; |
| 345 | case ISD::SETUGE: return ARMCC::HS; |
| 346 | case ISD::SETULT: return ARMCC::LO; |
| 347 | case ISD::SETULE: return ARMCC::LS; |
| 348 | } |
| 349 | } |
| 350 | |
| 351 | /// FPCCToARMCC - Convert a DAG fp condition code to an ARM CC. It |
| 352 | /// returns true if the operands should be inverted to form the proper |
| 353 | /// comparison. |
| 354 | static bool FPCCToARMCC(ISD::CondCode CC, ARMCC::CondCodes &CondCode, |
| 355 | ARMCC::CondCodes &CondCode2) { |
| 356 | bool Invert = false; |
| 357 | CondCode2 = ARMCC::AL; |
| 358 | switch (CC) { |
| 359 | default: assert(0 && "Unknown FP condition!"); |
| 360 | case ISD::SETEQ: |
| 361 | case ISD::SETOEQ: CondCode = ARMCC::EQ; break; |
| 362 | case ISD::SETGT: |
| 363 | case ISD::SETOGT: CondCode = ARMCC::GT; break; |
| 364 | case ISD::SETGE: |
| 365 | case ISD::SETOGE: CondCode = ARMCC::GE; break; |
| 366 | case ISD::SETOLT: CondCode = ARMCC::MI; break; |
| 367 | case ISD::SETOLE: CondCode = ARMCC::GT; Invert = true; break; |
| 368 | case ISD::SETONE: CondCode = ARMCC::MI; CondCode2 = ARMCC::GT; break; |
| 369 | case ISD::SETO: CondCode = ARMCC::VC; break; |
| 370 | case ISD::SETUO: CondCode = ARMCC::VS; break; |
| 371 | case ISD::SETUEQ: CondCode = ARMCC::EQ; CondCode2 = ARMCC::VS; break; |
| 372 | case ISD::SETUGT: CondCode = ARMCC::HI; break; |
| 373 | case ISD::SETUGE: CondCode = ARMCC::PL; break; |
| 374 | case ISD::SETLT: |
| 375 | case ISD::SETULT: CondCode = ARMCC::LT; break; |
| 376 | case ISD::SETLE: |
| 377 | case ISD::SETULE: CondCode = ARMCC::LE; break; |
| 378 | case ISD::SETNE: |
| 379 | case ISD::SETUNE: CondCode = ARMCC::NE; break; |
| 380 | } |
| 381 | return Invert; |
| 382 | } |
| 383 | |
Bob Wilson | 1f595bb | 2009-04-17 19:07:39 +0000 | [diff] [blame] | 384 | //===----------------------------------------------------------------------===// |
| 385 | // Calling Convention Implementation |
| 386 | // |
| 387 | // The lower operations present on calling convention works on this order: |
| 388 | // LowerCALL (virt regs --> phys regs, virt regs --> stack) |
| 389 | // LowerFORMAL_ARGUMENTS (phys --> virt regs, stack --> virt regs) |
| 390 | // LowerRET (virt regs --> phys regs) |
| 391 | // LowerCALL (phys regs --> virt regs) |
| 392 | // |
| 393 | //===----------------------------------------------------------------------===// |
| 394 | |
| 395 | #include "ARMGenCallingConv.inc" |
| 396 | |
| 397 | // APCS f64 is in register pairs, possibly split to stack |
Bob Wilson | dee46d7 | 2009-04-17 20:35:10 +0000 | [diff] [blame] | 398 | static bool CC_ARM_APCS_Custom_f64(unsigned &ValNo, MVT &ValVT, MVT &LocVT, |
Bob Wilson | 1f595bb | 2009-04-17 19:07:39 +0000 | [diff] [blame] | 399 | CCValAssign::LocInfo &LocInfo, |
| 400 | ISD::ArgFlagsTy &ArgFlags, |
| 401 | CCState &State) { |
| 402 | static const unsigned HiRegList[] = { ARM::R0, ARM::R1, ARM::R2, ARM::R3 }; |
| 403 | static const unsigned LoRegList[] = { ARM::R1, |
| 404 | ARM::R2, |
| 405 | ARM::R3, |
| 406 | ARM::NoRegister }; |
| 407 | |
Bob Wilson | e65586b | 2009-04-17 20:40:45 +0000 | [diff] [blame] | 408 | unsigned Reg = State.AllocateReg(HiRegList, LoRegList, 4); |
| 409 | if (Reg == 0) |
| 410 | return false; // we didn't handle it |
Bob Wilson | 1f595bb | 2009-04-17 19:07:39 +0000 | [diff] [blame] | 411 | |
Bob Wilson | e65586b | 2009-04-17 20:40:45 +0000 | [diff] [blame] | 412 | unsigned i; |
| 413 | for (i = 0; i < 4; ++i) |
| 414 | if (HiRegList[i] == Reg) |
| 415 | break; |
| 416 | |
| 417 | State.addLoc(CCValAssign::getCustomReg(ValNo, ValVT, Reg, MVT::i32, LocInfo)); |
| 418 | if (LoRegList[i] != ARM::NoRegister) |
| 419 | State.addLoc(CCValAssign::getCustomReg(ValNo, ValVT, LoRegList[i], |
Bob Wilson | 1f595bb | 2009-04-17 19:07:39 +0000 | [diff] [blame] | 420 | MVT::i32, LocInfo)); |
Bob Wilson | e65586b | 2009-04-17 20:40:45 +0000 | [diff] [blame] | 421 | else |
| 422 | State.addLoc(CCValAssign::getCustomMem(ValNo, ValVT, |
| 423 | State.AllocateStack(4, 4), |
| 424 | MVT::i32, LocInfo)); |
| 425 | return true; // we handled it |
Bob Wilson | 1f595bb | 2009-04-17 19:07:39 +0000 | [diff] [blame] | 426 | } |
| 427 | |
| 428 | // AAPCS f64 is in aligned register pairs |
Bob Wilson | dee46d7 | 2009-04-17 20:35:10 +0000 | [diff] [blame] | 429 | static bool CC_ARM_AAPCS_Custom_f64(unsigned &ValNo, MVT &ValVT, MVT &LocVT, |
Bob Wilson | 1f595bb | 2009-04-17 19:07:39 +0000 | [diff] [blame] | 430 | CCValAssign::LocInfo &LocInfo, |
| 431 | ISD::ArgFlagsTy &ArgFlags, |
| 432 | CCState &State) { |
| 433 | static const unsigned HiRegList[] = { ARM::R0, ARM::R2 }; |
| 434 | static const unsigned LoRegList[] = { ARM::R1, ARM::R3 }; |
| 435 | |
Bob Wilson | e65586b | 2009-04-17 20:40:45 +0000 | [diff] [blame] | 436 | unsigned Reg = State.AllocateReg(HiRegList, LoRegList, 2); |
| 437 | if (Reg == 0) |
| 438 | return false; // we didn't handle it |
Bob Wilson | 1f595bb | 2009-04-17 19:07:39 +0000 | [diff] [blame] | 439 | |
Bob Wilson | e65586b | 2009-04-17 20:40:45 +0000 | [diff] [blame] | 440 | unsigned i; |
| 441 | for (i = 0; i < 2; ++i) |
| 442 | if (HiRegList[i] == Reg) |
| 443 | break; |
Bob Wilson | 1f595bb | 2009-04-17 19:07:39 +0000 | [diff] [blame] | 444 | |
Bob Wilson | e65586b | 2009-04-17 20:40:45 +0000 | [diff] [blame] | 445 | State.addLoc(CCValAssign::getCustomReg(ValNo, ValVT, Reg, MVT::i32, LocInfo)); |
| 446 | State.addLoc(CCValAssign::getCustomReg(ValNo, ValVT, LoRegList[i], |
| 447 | MVT::i32, LocInfo)); |
| 448 | return true; // we handled it |
Bob Wilson | 1f595bb | 2009-04-17 19:07:39 +0000 | [diff] [blame] | 449 | } |
| 450 | |
Bob Wilson | dee46d7 | 2009-04-17 20:35:10 +0000 | [diff] [blame] | 451 | static bool RetCC_ARM_APCS_Custom_f64(unsigned &ValNo, MVT &ValVT, MVT &LocVT, |
Bob Wilson | 1f595bb | 2009-04-17 19:07:39 +0000 | [diff] [blame] | 452 | CCValAssign::LocInfo &LocInfo, |
| 453 | ISD::ArgFlagsTy &ArgFlags, |
| 454 | CCState &State) { |
| 455 | static const unsigned HiRegList[] = { ARM::R0, ARM::R2 }; |
| 456 | static const unsigned LoRegList[] = { ARM::R1, ARM::R3 }; |
| 457 | |
Bob Wilson | e65586b | 2009-04-17 20:40:45 +0000 | [diff] [blame] | 458 | unsigned Reg = State.AllocateReg(HiRegList, LoRegList, 2); |
| 459 | if (Reg == 0) |
| 460 | return false; // we didn't handle it |
Bob Wilson | 1f595bb | 2009-04-17 19:07:39 +0000 | [diff] [blame] | 461 | |
Bob Wilson | e65586b | 2009-04-17 20:40:45 +0000 | [diff] [blame] | 462 | unsigned i; |
| 463 | for (i = 0; i < 2; ++i) |
| 464 | if (HiRegList[i] == Reg) |
| 465 | break; |
Bob Wilson | 1f595bb | 2009-04-17 19:07:39 +0000 | [diff] [blame] | 466 | |
Bob Wilson | e65586b | 2009-04-17 20:40:45 +0000 | [diff] [blame] | 467 | State.addLoc(CCValAssign::getCustomReg(ValNo, ValVT, Reg, MVT::i32, LocInfo)); |
| 468 | State.addLoc(CCValAssign::getCustomReg(ValNo, ValVT, LoRegList[i], |
| 469 | MVT::i32, LocInfo)); |
| 470 | return true; // we handled it |
Bob Wilson | 1f595bb | 2009-04-17 19:07:39 +0000 | [diff] [blame] | 471 | } |
| 472 | |
Bob Wilson | dee46d7 | 2009-04-17 20:35:10 +0000 | [diff] [blame] | 473 | static bool RetCC_ARM_AAPCS_Custom_f64(unsigned &ValNo, MVT &ValVT, MVT &LocVT, |
Bob Wilson | 1f595bb | 2009-04-17 19:07:39 +0000 | [diff] [blame] | 474 | CCValAssign::LocInfo &LocInfo, |
| 475 | ISD::ArgFlagsTy &ArgFlags, |
| 476 | CCState &State) { |
| 477 | return RetCC_ARM_APCS_Custom_f64(ValNo, ValVT, LocVT, LocInfo, ArgFlags, |
| 478 | State); |
| 479 | } |
| 480 | |
Bob Wilson | 1f595bb | 2009-04-17 19:07:39 +0000 | [diff] [blame] | 481 | /// LowerCallResult - Lower the result values of an ISD::CALL into the |
| 482 | /// appropriate copies out of appropriate physical registers. This assumes that |
| 483 | /// Chain/InFlag are the input chain/flag to use, and that TheCall is the call |
| 484 | /// being lowered. The returns a SDNode with the same number of values as the |
| 485 | /// ISD::CALL. |
| 486 | SDNode *ARMTargetLowering:: |
| 487 | LowerCallResult(SDValue Chain, SDValue InFlag, CallSDNode *TheCall, |
| 488 | unsigned CallingConv, SelectionDAG &DAG) { |
| 489 | |
| 490 | DebugLoc dl = TheCall->getDebugLoc(); |
| 491 | // Assign locations to each value returned by this call. |
| 492 | SmallVector<CCValAssign, 16> RVLocs; |
| 493 | bool isVarArg = TheCall->isVarArg(); |
| 494 | CCState CCInfo(CallingConv, isVarArg, getTargetMachine(), RVLocs); |
| 495 | CCInfo.AnalyzeCallResult(TheCall, RetCC_ARM); |
| 496 | |
| 497 | SmallVector<SDValue, 8> ResultVals; |
| 498 | |
| 499 | // Copy all of the result registers out of their specified physreg. |
| 500 | for (unsigned i = 0; i != RVLocs.size(); ++i) { |
| 501 | CCValAssign VA = RVLocs[i]; |
| 502 | |
| 503 | // handle f64 as custom |
| 504 | if (VA.needsCustom()) { |
| 505 | SDValue Lo = DAG.getCopyFromReg(Chain, dl, VA.getLocReg(), VA.getLocVT(), |
| 506 | InFlag); |
| 507 | VA = RVLocs[++i]; // skip ahead to next loc |
| 508 | SDValue Hi = DAG.getCopyFromReg(Lo, dl, VA.getLocReg(), VA.getLocVT(), |
| 509 | Lo.getValue(2)); |
| 510 | ResultVals.push_back(DAG.getNode(ARMISD::FMDRR, dl, VA.getValVT(), Lo, |
| 511 | Hi)); |
| 512 | } else { |
| 513 | Chain = DAG.getCopyFromReg(Chain, dl, VA.getLocReg(), VA.getLocVT(), |
| 514 | InFlag).getValue(1); |
| 515 | SDValue Val = Chain.getValue(0); |
| 516 | InFlag = Chain.getValue(2); |
| 517 | |
| 518 | switch (VA.getLocInfo()) { |
| 519 | default: assert(0 && "Unknown loc info!"); |
| 520 | case CCValAssign::Full: break; |
| 521 | case CCValAssign::BCvt: |
| 522 | Val = DAG.getNode(ISD::BIT_CONVERT, dl, VA.getValVT(), |
| 523 | Chain.getValue(0)); |
| 524 | break; |
| 525 | } |
| 526 | |
| 527 | ResultVals.push_back(Val); |
| 528 | } |
| 529 | } |
| 530 | |
| 531 | // Merge everything together with a MERGE_VALUES node. |
| 532 | ResultVals.push_back(Chain); |
| 533 | return DAG.getNode(ISD::MERGE_VALUES, dl, TheCall->getVTList(), |
| 534 | &ResultVals[0], ResultVals.size()).getNode(); |
| 535 | } |
| 536 | |
| 537 | /// CreateCopyOfByValArgument - Make a copy of an aggregate at address specified |
| 538 | /// by "Src" to address "Dst" of size "Size". Alignment information is |
Bob Wilson | dee46d7 | 2009-04-17 20:35:10 +0000 | [diff] [blame] | 539 | /// specified by the specific parameter attribute. The copy will be passed as |
Bob Wilson | 1f595bb | 2009-04-17 19:07:39 +0000 | [diff] [blame] | 540 | /// a byval function parameter. |
| 541 | /// Sometimes what we are copying is the end of a larger object, the part that |
| 542 | /// does not fit in registers. |
| 543 | static SDValue |
| 544 | CreateCopyOfByValArgument(SDValue Src, SDValue Dst, SDValue Chain, |
| 545 | ISD::ArgFlagsTy Flags, SelectionDAG &DAG, |
| 546 | DebugLoc dl) { |
| 547 | SDValue SizeNode = DAG.getConstant(Flags.getByValSize(), MVT::i32); |
| 548 | return DAG.getMemcpy(Chain, dl, Dst, Src, SizeNode, Flags.getByValAlign(), |
| 549 | /*AlwaysInline=*/false, NULL, 0, NULL, 0); |
| 550 | } |
| 551 | |
Bob Wilson | dee46d7 | 2009-04-17 20:35:10 +0000 | [diff] [blame] | 552 | /// LowerMemOpCallTo - Store the argument to the stack. |
Bob Wilson | 1f595bb | 2009-04-17 19:07:39 +0000 | [diff] [blame] | 553 | SDValue |
| 554 | ARMTargetLowering::LowerMemOpCallTo(CallSDNode *TheCall, SelectionDAG &DAG, |
| 555 | const SDValue &StackPtr, |
Bob Wilson | dee46d7 | 2009-04-17 20:35:10 +0000 | [diff] [blame] | 556 | const CCValAssign &VA, SDValue Chain, |
Bob Wilson | 1f595bb | 2009-04-17 19:07:39 +0000 | [diff] [blame] | 557 | SDValue Arg, ISD::ArgFlagsTy Flags) { |
| 558 | DebugLoc dl = TheCall->getDebugLoc(); |
| 559 | unsigned LocMemOffset = VA.getLocMemOffset(); |
| 560 | SDValue PtrOff = DAG.getIntPtrConstant(LocMemOffset); |
| 561 | PtrOff = DAG.getNode(ISD::ADD, dl, getPointerTy(), StackPtr, PtrOff); |
| 562 | if (Flags.isByVal()) { |
| 563 | return CreateCopyOfByValArgument(Arg, PtrOff, Chain, Flags, DAG, dl); |
| 564 | } |
| 565 | return DAG.getStore(Chain, dl, Arg, PtrOff, |
| 566 | PseudoSourceValue::getStack(), LocMemOffset); |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 567 | } |
| 568 | |
Evan Cheng | fc40342 | 2007-02-03 08:53:01 +0000 | [diff] [blame] | 569 | /// LowerCALL - Lowering a ISD::CALL node into a callseq_start <- |
| 570 | /// ARMISD:CALL <- callseq_end chain. Also add input and output parameter |
| 571 | /// nodes. |
Dan Gohman | 475871a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 572 | SDValue ARMTargetLowering::LowerCALL(SDValue Op, SelectionDAG &DAG) { |
Dan Gohman | 095cc29 | 2008-09-13 01:54:27 +0000 | [diff] [blame] | 573 | CallSDNode *TheCall = cast<CallSDNode>(Op.getNode()); |
Bob Wilson | 1f595bb | 2009-04-17 19:07:39 +0000 | [diff] [blame] | 574 | MVT RetVT = TheCall->getRetValType(0); |
| 575 | SDValue Chain = TheCall->getChain(); |
| 576 | unsigned CC = TheCall->getCallingConv(); |
| 577 | assert((CC == CallingConv::C || |
| 578 | CC == CallingConv::Fast) && "unknown calling convention"); |
| 579 | bool isVarArg = TheCall->isVarArg(); |
| 580 | SDValue Callee = TheCall->getCallee(); |
| 581 | DebugLoc dl = TheCall->getDebugLoc(); |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 582 | |
Bob Wilson | 1f595bb | 2009-04-17 19:07:39 +0000 | [diff] [blame] | 583 | // Analyze operands of the call, assigning locations to each operand. |
| 584 | SmallVector<CCValAssign, 16> ArgLocs; |
| 585 | CCState CCInfo(CC, isVarArg, getTargetMachine(), ArgLocs); |
| 586 | CCInfo.AnalyzeCallOperands(TheCall, CC_ARM); |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 587 | |
Bob Wilson | 1f595bb | 2009-04-17 19:07:39 +0000 | [diff] [blame] | 588 | // Get a count of how many bytes are to be pushed on the stack. |
| 589 | unsigned NumBytes = CCInfo.getNextStackOffset(); |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 590 | |
| 591 | // Adjust the stack pointer for the new arguments... |
| 592 | // These operations are automatically eliminated by the prolog/epilog pass |
Chris Lattner | e563bbc | 2008-10-11 22:08:30 +0000 | [diff] [blame] | 593 | Chain = DAG.getCALLSEQ_START(Chain, DAG.getIntPtrConstant(NumBytes, true)); |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 594 | |
Dan Gohman | 475871a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 595 | SDValue StackPtr = DAG.getRegister(ARM::SP, MVT::i32); |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 596 | |
Bob Wilson | 1f595bb | 2009-04-17 19:07:39 +0000 | [diff] [blame] | 597 | SmallVector<std::pair<unsigned, SDValue>, 8> RegsToPass; |
| 598 | SmallVector<SDValue, 8> MemOpChains; |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 599 | |
Bob Wilson | 1f595bb | 2009-04-17 19:07:39 +0000 | [diff] [blame] | 600 | // Walk the register/memloc assignments, inserting copies/loads. In the case |
Bob Wilson | dee46d7 | 2009-04-17 20:35:10 +0000 | [diff] [blame] | 601 | // of tail call optimization, arguments are handled later. |
Bob Wilson | 1f595bb | 2009-04-17 19:07:39 +0000 | [diff] [blame] | 602 | for (unsigned i = 0, realArgIdx = 0, e = ArgLocs.size(); |
| 603 | i != e; |
| 604 | ++i, ++realArgIdx) { |
| 605 | CCValAssign &VA = ArgLocs[i]; |
| 606 | SDValue Arg = TheCall->getArg(realArgIdx); |
| 607 | ISD::ArgFlagsTy Flags = TheCall->getArgFlags(realArgIdx); |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 608 | |
Bob Wilson | 1f595bb | 2009-04-17 19:07:39 +0000 | [diff] [blame] | 609 | // Promote the value if needed. |
| 610 | switch (VA.getLocInfo()) { |
| 611 | default: assert(0 && "Unknown loc info!"); |
| 612 | case CCValAssign::Full: break; |
| 613 | case CCValAssign::SExt: |
| 614 | Arg = DAG.getNode(ISD::SIGN_EXTEND, dl, VA.getLocVT(), Arg); |
| 615 | break; |
| 616 | case CCValAssign::ZExt: |
| 617 | Arg = DAG.getNode(ISD::ZERO_EXTEND, dl, VA.getLocVT(), Arg); |
| 618 | break; |
| 619 | case CCValAssign::AExt: |
| 620 | Arg = DAG.getNode(ISD::ANY_EXTEND, dl, VA.getLocVT(), Arg); |
| 621 | break; |
| 622 | case CCValAssign::BCvt: |
| 623 | Arg = DAG.getNode(ISD::BIT_CONVERT, dl, VA.getLocVT(), Arg); |
| 624 | break; |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 625 | } |
| 626 | |
Bob Wilson | 1f595bb | 2009-04-17 19:07:39 +0000 | [diff] [blame] | 627 | // f64 is passed in i32 pairs and must be combined |
| 628 | if (VA.needsCustom()) { |
| 629 | SDValue fmrrd = DAG.getNode(ARMISD::FMRRD, dl, |
| 630 | DAG.getVTList(MVT::i32, MVT::i32), &Arg, 1); |
| 631 | RegsToPass.push_back(std::make_pair(VA.getLocReg(), fmrrd)); |
| 632 | VA = ArgLocs[++i]; // skip ahead to next loc |
| 633 | if (VA.isRegLoc()) |
Bob Wilson | dee46d7 | 2009-04-17 20:35:10 +0000 | [diff] [blame] | 634 | RegsToPass.push_back(std::make_pair(VA.getLocReg(), fmrrd.getValue(1))); |
Bob Wilson | 1f595bb | 2009-04-17 19:07:39 +0000 | [diff] [blame] | 635 | else { |
| 636 | assert(VA.isMemLoc()); |
| 637 | if (StackPtr.getNode() == 0) |
| 638 | StackPtr = DAG.getCopyFromReg(Chain, dl, ARM::SP, getPointerTy()); |
| 639 | |
| 640 | MemOpChains.push_back(LowerMemOpCallTo(TheCall, DAG, StackPtr, VA, |
| 641 | Chain, fmrrd.getValue(1), |
| 642 | Flags)); |
| 643 | } |
| 644 | } else if (VA.isRegLoc()) { |
| 645 | RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg)); |
| 646 | } else { |
| 647 | assert(VA.isMemLoc()); |
| 648 | if (StackPtr.getNode() == 0) |
| 649 | StackPtr = DAG.getCopyFromReg(Chain, dl, ARM::SP, getPointerTy()); |
| 650 | |
| 651 | MemOpChains.push_back(LowerMemOpCallTo(TheCall, DAG, StackPtr, VA, |
| 652 | Chain, Arg, Flags)); |
| 653 | } |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 654 | } |
| 655 | |
| 656 | if (!MemOpChains.empty()) |
Dale Johannesen | 33c960f | 2009-02-04 20:06:27 +0000 | [diff] [blame] | 657 | Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 658 | &MemOpChains[0], MemOpChains.size()); |
| 659 | |
| 660 | // Build a sequence of copy-to-reg nodes chained together with token chain |
| 661 | // and flag operands which copy the outgoing args into the appropriate regs. |
Dan Gohman | 475871a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 662 | SDValue InFlag; |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 663 | for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) { |
Bob Wilson | 2dc4f54 | 2009-03-20 22:42:55 +0000 | [diff] [blame] | 664 | Chain = DAG.getCopyToReg(Chain, dl, RegsToPass[i].first, |
Dale Johannesen | 33c960f | 2009-02-04 20:06:27 +0000 | [diff] [blame] | 665 | RegsToPass[i].second, InFlag); |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 666 | InFlag = Chain.getValue(1); |
| 667 | } |
| 668 | |
Bill Wendling | 056292f | 2008-09-16 21:48:12 +0000 | [diff] [blame] | 669 | // If the callee is a GlobalAddress/ExternalSymbol node (quite common, every |
| 670 | // direct call is) turn it into a TargetGlobalAddress/TargetExternalSymbol |
| 671 | // node so that legalize doesn't hack it. |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 672 | bool isDirect = false; |
| 673 | bool isARMFunc = false; |
Evan Cheng | 277f074 | 2007-06-19 21:05:09 +0000 | [diff] [blame] | 674 | bool isLocalARMFunc = false; |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 675 | if (GlobalAddressSDNode *G = dyn_cast<GlobalAddressSDNode>(Callee)) { |
| 676 | GlobalValue *GV = G->getGlobal(); |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 677 | isDirect = true; |
Reid Spencer | 5cbf985 | 2007-01-30 20:08:39 +0000 | [diff] [blame] | 678 | bool isExt = (GV->isDeclaration() || GV->hasWeakLinkage() || |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 679 | GV->hasLinkOnceLinkage()); |
Evan Cheng | 970a419 | 2007-01-19 19:28:01 +0000 | [diff] [blame] | 680 | bool isStub = (isExt && Subtarget->isTargetDarwin()) && |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 681 | getTargetMachine().getRelocationModel() != Reloc::Static; |
| 682 | isARMFunc = !Subtarget->isThumb() || isStub; |
Evan Cheng | 277f074 | 2007-06-19 21:05:09 +0000 | [diff] [blame] | 683 | // ARM call to a local ARM function is predicable. |
| 684 | isLocalARMFunc = !Subtarget->isThumb() && !isExt; |
Evan Cheng | c60e76d | 2007-01-30 20:37:08 +0000 | [diff] [blame] | 685 | // tBX takes a register source operand. |
| 686 | if (isARMFunc && Subtarget->isThumb() && !Subtarget->hasV5TOps()) { |
| 687 | ARMConstantPoolValue *CPV = new ARMConstantPoolValue(GV, ARMPCLabelIndex, |
| 688 | ARMCP::CPStub, 4); |
Evan Cheng | 1606e8e | 2009-03-13 07:51:59 +0000 | [diff] [blame] | 689 | SDValue CPAddr = DAG.getTargetConstantPool(CPV, getPointerTy(), 4); |
Dale Johannesen | b300d2a | 2009-02-07 00:55:49 +0000 | [diff] [blame] | 690 | CPAddr = DAG.getNode(ARMISD::Wrapper, dl, MVT::i32, CPAddr); |
Bob Wilson | 2dc4f54 | 2009-03-20 22:42:55 +0000 | [diff] [blame] | 691 | Callee = DAG.getLoad(getPointerTy(), dl, |
| 692 | DAG.getEntryNode(), CPAddr, NULL, 0); |
Dan Gohman | 475871a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 693 | SDValue PICLabel = DAG.getConstant(ARMPCLabelIndex++, MVT::i32); |
Bob Wilson | 2dc4f54 | 2009-03-20 22:42:55 +0000 | [diff] [blame] | 694 | Callee = DAG.getNode(ARMISD::PIC_ADD, dl, |
Dale Johannesen | 33c960f | 2009-02-04 20:06:27 +0000 | [diff] [blame] | 695 | getPointerTy(), Callee, PICLabel); |
Evan Cheng | c60e76d | 2007-01-30 20:37:08 +0000 | [diff] [blame] | 696 | } else |
| 697 | Callee = DAG.getTargetGlobalAddress(GV, getPointerTy()); |
Bill Wendling | 056292f | 2008-09-16 21:48:12 +0000 | [diff] [blame] | 698 | } else if (ExternalSymbolSDNode *S = dyn_cast<ExternalSymbolSDNode>(Callee)) { |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 699 | isDirect = true; |
Evan Cheng | 970a419 | 2007-01-19 19:28:01 +0000 | [diff] [blame] | 700 | bool isStub = Subtarget->isTargetDarwin() && |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 701 | getTargetMachine().getRelocationModel() != Reloc::Static; |
| 702 | isARMFunc = !Subtarget->isThumb() || isStub; |
Evan Cheng | c60e76d | 2007-01-30 20:37:08 +0000 | [diff] [blame] | 703 | // tBX takes a register source operand. |
| 704 | const char *Sym = S->getSymbol(); |
| 705 | if (isARMFunc && Subtarget->isThumb() && !Subtarget->hasV5TOps()) { |
| 706 | ARMConstantPoolValue *CPV = new ARMConstantPoolValue(Sym, ARMPCLabelIndex, |
| 707 | ARMCP::CPStub, 4); |
Evan Cheng | 1606e8e | 2009-03-13 07:51:59 +0000 | [diff] [blame] | 708 | SDValue CPAddr = DAG.getTargetConstantPool(CPV, getPointerTy(), 4); |
Dale Johannesen | b300d2a | 2009-02-07 00:55:49 +0000 | [diff] [blame] | 709 | CPAddr = DAG.getNode(ARMISD::Wrapper, dl, MVT::i32, CPAddr); |
Dale Johannesen | 33c960f | 2009-02-04 20:06:27 +0000 | [diff] [blame] | 710 | Callee = DAG.getLoad(getPointerTy(), dl, |
Bob Wilson | 2dc4f54 | 2009-03-20 22:42:55 +0000 | [diff] [blame] | 711 | DAG.getEntryNode(), CPAddr, NULL, 0); |
Dan Gohman | 475871a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 712 | SDValue PICLabel = DAG.getConstant(ARMPCLabelIndex++, MVT::i32); |
Bob Wilson | 2dc4f54 | 2009-03-20 22:42:55 +0000 | [diff] [blame] | 713 | Callee = DAG.getNode(ARMISD::PIC_ADD, dl, |
Dale Johannesen | 33c960f | 2009-02-04 20:06:27 +0000 | [diff] [blame] | 714 | getPointerTy(), Callee, PICLabel); |
Evan Cheng | c60e76d | 2007-01-30 20:37:08 +0000 | [diff] [blame] | 715 | } else |
Bill Wendling | 056292f | 2008-09-16 21:48:12 +0000 | [diff] [blame] | 716 | Callee = DAG.getTargetExternalSymbol(Sym, getPointerTy()); |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 717 | } |
| 718 | |
Lauro Ramos Venancio | 64c88d7 | 2007-03-20 17:57:23 +0000 | [diff] [blame] | 719 | // FIXME: handle tail calls differently. |
| 720 | unsigned CallOpc; |
| 721 | if (Subtarget->isThumb()) { |
| 722 | if (!Subtarget->hasV5TOps() && (!isDirect || isARMFunc)) |
| 723 | CallOpc = ARMISD::CALL_NOLINK; |
| 724 | else |
| 725 | CallOpc = isARMFunc ? ARMISD::CALL : ARMISD::tCALL; |
| 726 | } else { |
| 727 | CallOpc = (isDirect || Subtarget->hasV5TOps()) |
Evan Cheng | 277f074 | 2007-06-19 21:05:09 +0000 | [diff] [blame] | 728 | ? (isLocalARMFunc ? ARMISD::CALL_PRED : ARMISD::CALL) |
| 729 | : ARMISD::CALL_NOLINK; |
Lauro Ramos Venancio | 64c88d7 | 2007-03-20 17:57:23 +0000 | [diff] [blame] | 730 | } |
Lauro Ramos Venancio | b8a93a4 | 2007-03-27 16:19:21 +0000 | [diff] [blame] | 731 | if (CallOpc == ARMISD::CALL_NOLINK && !Subtarget->isThumb()) { |
| 732 | // implicit def LR - LR mustn't be allocated as GRP:$dst of CALL_NOLINK |
Dale Johannesen | e8d7230 | 2009-02-06 23:05:02 +0000 | [diff] [blame] | 733 | Chain = DAG.getCopyToReg(Chain, dl, ARM::LR, DAG.getUNDEF(MVT::i32),InFlag); |
Lauro Ramos Venancio | 64c88d7 | 2007-03-20 17:57:23 +0000 | [diff] [blame] | 734 | InFlag = Chain.getValue(1); |
| 735 | } |
| 736 | |
Dan Gohman | 475871a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 737 | std::vector<SDValue> Ops; |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 738 | Ops.push_back(Chain); |
| 739 | Ops.push_back(Callee); |
| 740 | |
| 741 | // Add argument registers to the end of the list so that they are known live |
| 742 | // into the call. |
| 743 | for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) |
| 744 | Ops.push_back(DAG.getRegister(RegsToPass[i].first, |
| 745 | RegsToPass[i].second.getValueType())); |
| 746 | |
Gabor Greif | ba36cb5 | 2008-08-28 21:40:38 +0000 | [diff] [blame] | 747 | if (InFlag.getNode()) |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 748 | Ops.push_back(InFlag); |
Duncan Sands | 4bdcb61 | 2008-07-02 17:40:58 +0000 | [diff] [blame] | 749 | // Returns a chain and a flag for retval copy to use. |
Dale Johannesen | 33c960f | 2009-02-04 20:06:27 +0000 | [diff] [blame] | 750 | Chain = DAG.getNode(CallOpc, dl, DAG.getVTList(MVT::Other, MVT::Flag), |
Duncan Sands | 4bdcb61 | 2008-07-02 17:40:58 +0000 | [diff] [blame] | 751 | &Ops[0], Ops.size()); |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 752 | InFlag = Chain.getValue(1); |
| 753 | |
Chris Lattner | e563bbc | 2008-10-11 22:08:30 +0000 | [diff] [blame] | 754 | Chain = DAG.getCALLSEQ_END(Chain, DAG.getIntPtrConstant(NumBytes, true), |
| 755 | DAG.getIntPtrConstant(0, true), InFlag); |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 756 | if (RetVT != MVT::Other) |
| 757 | InFlag = Chain.getValue(1); |
| 758 | |
Bob Wilson | 1f595bb | 2009-04-17 19:07:39 +0000 | [diff] [blame] | 759 | // Handle result values, copying them out of physregs into vregs that we |
| 760 | // return. |
| 761 | return SDValue(LowerCallResult(Chain, InFlag, TheCall, CC, DAG), |
| 762 | Op.getResNo()); |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 763 | } |
| 764 | |
Bob Wilson | 1f595bb | 2009-04-17 19:07:39 +0000 | [diff] [blame] | 765 | SDValue ARMTargetLowering::LowerRET(SDValue Op, SelectionDAG &DAG) { |
| 766 | // The chain is always operand #0 |
Dan Gohman | 475871a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 767 | SDValue Chain = Op.getOperand(0); |
Dale Johannesen | a05dca4 | 2009-02-04 23:02:30 +0000 | [diff] [blame] | 768 | DebugLoc dl = Op.getDebugLoc(); |
Bob Wilson | 2dc4f54 | 2009-03-20 22:42:55 +0000 | [diff] [blame] | 769 | |
Bob Wilson | dee46d7 | 2009-04-17 20:35:10 +0000 | [diff] [blame] | 770 | // CCValAssign - represent the assignment of the return value to a location. |
Bob Wilson | 1f595bb | 2009-04-17 19:07:39 +0000 | [diff] [blame] | 771 | SmallVector<CCValAssign, 16> RVLocs; |
| 772 | unsigned CC = DAG.getMachineFunction().getFunction()->getCallingConv(); |
| 773 | bool isVarArg = DAG.getMachineFunction().getFunction()->isVarArg(); |
| 774 | |
Bob Wilson | dee46d7 | 2009-04-17 20:35:10 +0000 | [diff] [blame] | 775 | // CCState - Info about the registers and stack slots. |
Bob Wilson | 1f595bb | 2009-04-17 19:07:39 +0000 | [diff] [blame] | 776 | CCState CCInfo(CC, isVarArg, getTargetMachine(), RVLocs); |
| 777 | |
Bob Wilson | dee46d7 | 2009-04-17 20:35:10 +0000 | [diff] [blame] | 778 | // Analyze return values of ISD::RET. |
Bob Wilson | 1f595bb | 2009-04-17 19:07:39 +0000 | [diff] [blame] | 779 | CCInfo.AnalyzeReturn(Op.getNode(), RetCC_ARM); |
| 780 | |
| 781 | // If this is the first return lowered for this function, add |
| 782 | // the regs to the liveout set for the function. |
| 783 | if (DAG.getMachineFunction().getRegInfo().liveout_empty()) { |
| 784 | for (unsigned i = 0; i != RVLocs.size(); ++i) |
| 785 | if (RVLocs[i].isRegLoc()) |
| 786 | DAG.getMachineFunction().getRegInfo().addLiveOut(RVLocs[i].getLocReg()); |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 787 | } |
| 788 | |
Bob Wilson | 1f595bb | 2009-04-17 19:07:39 +0000 | [diff] [blame] | 789 | SDValue Flag; |
| 790 | |
| 791 | // Copy the result values into the output registers. |
| 792 | for (unsigned i = 0, realRVLocIdx = 0; |
| 793 | i != RVLocs.size(); |
| 794 | ++i, ++realRVLocIdx) { |
| 795 | CCValAssign &VA = RVLocs[i]; |
| 796 | assert(VA.isRegLoc() && "Can only return in registers!"); |
| 797 | |
| 798 | // ISD::RET => ret chain, (regnum1,val1), ... |
| 799 | // So i*2+1 index only the regnums |
| 800 | SDValue Arg = Op.getOperand(realRVLocIdx*2+1); |
| 801 | |
| 802 | switch (VA.getLocInfo()) { |
| 803 | default: assert(0 && "Unknown loc info!"); |
| 804 | case CCValAssign::Full: break; |
| 805 | case CCValAssign::BCvt: |
| 806 | Arg = DAG.getNode(ISD::BIT_CONVERT, dl, VA.getLocVT(), Arg); |
| 807 | break; |
| 808 | } |
| 809 | |
| 810 | // Legalize ret f64 -> ret 2 x i32. We always have fmrrd if f64 is |
| 811 | // available. |
| 812 | if (VA.needsCustom()) { |
| 813 | SDValue fmrrd = DAG.getNode(ARMISD::FMRRD, dl, |
| 814 | DAG.getVTList(MVT::i32, MVT::i32), &Arg, 1); |
| 815 | Chain = DAG.getCopyToReg(Chain, dl, VA.getLocReg(), fmrrd, Flag); |
| 816 | VA = RVLocs[++i]; // skip ahead to next loc |
| 817 | Chain = DAG.getCopyToReg(Chain, dl, VA.getLocReg(), fmrrd.getValue(1), |
| 818 | Flag); |
| 819 | } else |
| 820 | Chain = DAG.getCopyToReg(Chain, dl, VA.getLocReg(), Arg, Flag); |
| 821 | |
Bob Wilson | dee46d7 | 2009-04-17 20:35:10 +0000 | [diff] [blame] | 822 | // Guarantee that all emitted copies are |
| 823 | // stuck together, avoiding something bad. |
Bob Wilson | 1f595bb | 2009-04-17 19:07:39 +0000 | [diff] [blame] | 824 | Flag = Chain.getValue(1); |
| 825 | } |
| 826 | |
| 827 | SDValue result; |
| 828 | if (Flag.getNode()) |
| 829 | result = DAG.getNode(ARMISD::RET_FLAG, dl, MVT::Other, Chain, Flag); |
| 830 | else // Return Void |
| 831 | result = DAG.getNode(ARMISD::RET_FLAG, dl, MVT::Other, Chain); |
| 832 | |
| 833 | return result; |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 834 | } |
| 835 | |
Bob Wilson | 2dc4f54 | 2009-03-20 22:42:55 +0000 | [diff] [blame] | 836 | // ConstantPool, JumpTable, GlobalAddress, and ExternalSymbol are lowered as |
Bill Wendling | 056292f | 2008-09-16 21:48:12 +0000 | [diff] [blame] | 837 | // their target countpart wrapped in the ARMISD::Wrapper node. Suppose N is |
| 838 | // one of the above mentioned nodes. It has to be wrapped because otherwise |
| 839 | // Select(N) returns N. So the raw TargetGlobalAddress nodes, etc. can only |
| 840 | // be used to form addressing mode. These wrapped nodes will be selected |
| 841 | // into MOVi. |
Dan Gohman | 475871a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 842 | static SDValue LowerConstantPool(SDValue Op, SelectionDAG &DAG) { |
Duncan Sands | 83ec4b6 | 2008-06-06 12:08:01 +0000 | [diff] [blame] | 843 | MVT PtrVT = Op.getValueType(); |
Dale Johannesen | b300d2a | 2009-02-07 00:55:49 +0000 | [diff] [blame] | 844 | // FIXME there is no actual debug info here |
| 845 | DebugLoc dl = Op.getDebugLoc(); |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 846 | ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(Op); |
Dan Gohman | 475871a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 847 | SDValue Res; |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 848 | if (CP->isMachineConstantPoolEntry()) |
| 849 | Res = DAG.getTargetConstantPool(CP->getMachineCPVal(), PtrVT, |
| 850 | CP->getAlignment()); |
| 851 | else |
| 852 | Res = DAG.getTargetConstantPool(CP->getConstVal(), PtrVT, |
| 853 | CP->getAlignment()); |
Dale Johannesen | b300d2a | 2009-02-07 00:55:49 +0000 | [diff] [blame] | 854 | return DAG.getNode(ARMISD::Wrapper, dl, MVT::i32, Res); |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 855 | } |
| 856 | |
Lauro Ramos Venancio | 64f4fa5 | 2007-04-27 13:54:47 +0000 | [diff] [blame] | 857 | // Lower ISD::GlobalTLSAddress using the "general dynamic" model |
Dan Gohman | 475871a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 858 | SDValue |
Lauro Ramos Venancio | 64f4fa5 | 2007-04-27 13:54:47 +0000 | [diff] [blame] | 859 | ARMTargetLowering::LowerToTLSGeneralDynamicModel(GlobalAddressSDNode *GA, |
| 860 | SelectionDAG &DAG) { |
Dale Johannesen | 33c960f | 2009-02-04 20:06:27 +0000 | [diff] [blame] | 861 | DebugLoc dl = GA->getDebugLoc(); |
Duncan Sands | 83ec4b6 | 2008-06-06 12:08:01 +0000 | [diff] [blame] | 862 | MVT PtrVT = getPointerTy(); |
Lauro Ramos Venancio | 64f4fa5 | 2007-04-27 13:54:47 +0000 | [diff] [blame] | 863 | unsigned char PCAdj = Subtarget->isThumb() ? 4 : 8; |
| 864 | ARMConstantPoolValue *CPV = |
| 865 | new ARMConstantPoolValue(GA->getGlobal(), ARMPCLabelIndex, ARMCP::CPValue, |
| 866 | PCAdj, "tlsgd", true); |
Evan Cheng | 1606e8e | 2009-03-13 07:51:59 +0000 | [diff] [blame] | 867 | SDValue Argument = DAG.getTargetConstantPool(CPV, PtrVT, 4); |
Dale Johannesen | b300d2a | 2009-02-07 00:55:49 +0000 | [diff] [blame] | 868 | Argument = DAG.getNode(ARMISD::Wrapper, dl, MVT::i32, Argument); |
Dale Johannesen | 33c960f | 2009-02-04 20:06:27 +0000 | [diff] [blame] | 869 | Argument = DAG.getLoad(PtrVT, dl, DAG.getEntryNode(), Argument, NULL, 0); |
Dan Gohman | 475871a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 870 | SDValue Chain = Argument.getValue(1); |
Lauro Ramos Venancio | 64f4fa5 | 2007-04-27 13:54:47 +0000 | [diff] [blame] | 871 | |
Dan Gohman | 475871a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 872 | SDValue PICLabel = DAG.getConstant(ARMPCLabelIndex++, MVT::i32); |
Dale Johannesen | 33c960f | 2009-02-04 20:06:27 +0000 | [diff] [blame] | 873 | Argument = DAG.getNode(ARMISD::PIC_ADD, dl, PtrVT, Argument, PICLabel); |
Lauro Ramos Venancio | 64f4fa5 | 2007-04-27 13:54:47 +0000 | [diff] [blame] | 874 | |
| 875 | // call __tls_get_addr. |
| 876 | ArgListTy Args; |
| 877 | ArgListEntry Entry; |
| 878 | Entry.Node = Argument; |
| 879 | Entry.Ty = (const Type *) Type::Int32Ty; |
| 880 | Args.push_back(Entry); |
Dale Johannesen | 7d2ad62 | 2009-01-30 23:10:59 +0000 | [diff] [blame] | 881 | // FIXME: is there useful debug info available here? |
Dan Gohman | 475871a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 882 | std::pair<SDValue, SDValue> CallResult = |
Dale Johannesen | 86098bd | 2008-09-26 19:31:26 +0000 | [diff] [blame] | 883 | LowerCallTo(Chain, (const Type *) Type::Int32Ty, false, false, false, false, |
Lauro Ramos Venancio | 64f4fa5 | 2007-04-27 13:54:47 +0000 | [diff] [blame] | 884 | CallingConv::C, false, |
Dale Johannesen | 33c960f | 2009-02-04 20:06:27 +0000 | [diff] [blame] | 885 | DAG.getExternalSymbol("__tls_get_addr", PtrVT), Args, DAG, dl); |
Lauro Ramos Venancio | 64f4fa5 | 2007-04-27 13:54:47 +0000 | [diff] [blame] | 886 | return CallResult.first; |
| 887 | } |
| 888 | |
| 889 | // Lower ISD::GlobalTLSAddress using the "initial exec" or |
| 890 | // "local exec" model. |
Dan Gohman | 475871a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 891 | SDValue |
Lauro Ramos Venancio | 64f4fa5 | 2007-04-27 13:54:47 +0000 | [diff] [blame] | 892 | ARMTargetLowering::LowerToTLSExecModels(GlobalAddressSDNode *GA, |
Bob Wilson | 2dc4f54 | 2009-03-20 22:42:55 +0000 | [diff] [blame] | 893 | SelectionDAG &DAG) { |
Lauro Ramos Venancio | 64f4fa5 | 2007-04-27 13:54:47 +0000 | [diff] [blame] | 894 | GlobalValue *GV = GA->getGlobal(); |
Dale Johannesen | 33c960f | 2009-02-04 20:06:27 +0000 | [diff] [blame] | 895 | DebugLoc dl = GA->getDebugLoc(); |
Dan Gohman | 475871a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 896 | SDValue Offset; |
| 897 | SDValue Chain = DAG.getEntryNode(); |
Duncan Sands | 83ec4b6 | 2008-06-06 12:08:01 +0000 | [diff] [blame] | 898 | MVT PtrVT = getPointerTy(); |
Lauro Ramos Venancio | 64f4fa5 | 2007-04-27 13:54:47 +0000 | [diff] [blame] | 899 | // Get the Thread Pointer |
Dale Johannesen | 33c960f | 2009-02-04 20:06:27 +0000 | [diff] [blame] | 900 | SDValue ThreadPointer = DAG.getNode(ARMISD::THREAD_POINTER, dl, PtrVT); |
Lauro Ramos Venancio | 64f4fa5 | 2007-04-27 13:54:47 +0000 | [diff] [blame] | 901 | |
| 902 | if (GV->isDeclaration()){ |
| 903 | // initial exec model |
| 904 | unsigned char PCAdj = Subtarget->isThumb() ? 4 : 8; |
| 905 | ARMConstantPoolValue *CPV = |
| 906 | new ARMConstantPoolValue(GA->getGlobal(), ARMPCLabelIndex, ARMCP::CPValue, |
| 907 | PCAdj, "gottpoff", true); |
Evan Cheng | 1606e8e | 2009-03-13 07:51:59 +0000 | [diff] [blame] | 908 | Offset = DAG.getTargetConstantPool(CPV, PtrVT, 4); |
Dale Johannesen | b300d2a | 2009-02-07 00:55:49 +0000 | [diff] [blame] | 909 | Offset = DAG.getNode(ARMISD::Wrapper, dl, MVT::i32, Offset); |
Dale Johannesen | 33c960f | 2009-02-04 20:06:27 +0000 | [diff] [blame] | 910 | Offset = DAG.getLoad(PtrVT, dl, Chain, Offset, NULL, 0); |
Lauro Ramos Venancio | 64f4fa5 | 2007-04-27 13:54:47 +0000 | [diff] [blame] | 911 | Chain = Offset.getValue(1); |
| 912 | |
Dan Gohman | 475871a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 913 | SDValue PICLabel = DAG.getConstant(ARMPCLabelIndex++, MVT::i32); |
Dale Johannesen | 33c960f | 2009-02-04 20:06:27 +0000 | [diff] [blame] | 914 | Offset = DAG.getNode(ARMISD::PIC_ADD, dl, PtrVT, Offset, PICLabel); |
Lauro Ramos Venancio | 64f4fa5 | 2007-04-27 13:54:47 +0000 | [diff] [blame] | 915 | |
Dale Johannesen | 33c960f | 2009-02-04 20:06:27 +0000 | [diff] [blame] | 916 | Offset = DAG.getLoad(PtrVT, dl, Chain, Offset, NULL, 0); |
Lauro Ramos Venancio | 64f4fa5 | 2007-04-27 13:54:47 +0000 | [diff] [blame] | 917 | } else { |
| 918 | // local exec model |
| 919 | ARMConstantPoolValue *CPV = |
| 920 | new ARMConstantPoolValue(GV, ARMCP::CPValue, "tpoff"); |
Evan Cheng | 1606e8e | 2009-03-13 07:51:59 +0000 | [diff] [blame] | 921 | Offset = DAG.getTargetConstantPool(CPV, PtrVT, 4); |
Dale Johannesen | b300d2a | 2009-02-07 00:55:49 +0000 | [diff] [blame] | 922 | Offset = DAG.getNode(ARMISD::Wrapper, dl, MVT::i32, Offset); |
Dale Johannesen | 33c960f | 2009-02-04 20:06:27 +0000 | [diff] [blame] | 923 | Offset = DAG.getLoad(PtrVT, dl, Chain, Offset, NULL, 0); |
Lauro Ramos Venancio | 64f4fa5 | 2007-04-27 13:54:47 +0000 | [diff] [blame] | 924 | } |
| 925 | |
| 926 | // The address of the thread local variable is the add of the thread |
| 927 | // pointer with the offset of the variable. |
Dale Johannesen | 33c960f | 2009-02-04 20:06:27 +0000 | [diff] [blame] | 928 | return DAG.getNode(ISD::ADD, dl, PtrVT, ThreadPointer, Offset); |
Lauro Ramos Venancio | 64f4fa5 | 2007-04-27 13:54:47 +0000 | [diff] [blame] | 929 | } |
| 930 | |
Dan Gohman | 475871a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 931 | SDValue |
| 932 | ARMTargetLowering::LowerGlobalTLSAddress(SDValue Op, SelectionDAG &DAG) { |
Lauro Ramos Venancio | 64f4fa5 | 2007-04-27 13:54:47 +0000 | [diff] [blame] | 933 | // TODO: implement the "local dynamic" model |
| 934 | assert(Subtarget->isTargetELF() && |
| 935 | "TLS not implemented for non-ELF targets"); |
| 936 | GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(Op); |
| 937 | // If the relocation model is PIC, use the "General Dynamic" TLS Model, |
| 938 | // otherwise use the "Local Exec" TLS Model |
| 939 | if (getTargetMachine().getRelocationModel() == Reloc::PIC_) |
| 940 | return LowerToTLSGeneralDynamicModel(GA, DAG); |
| 941 | else |
| 942 | return LowerToTLSExecModels(GA, DAG); |
| 943 | } |
| 944 | |
Dan Gohman | 475871a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 945 | SDValue ARMTargetLowering::LowerGlobalAddressELF(SDValue Op, |
Bob Wilson | 2dc4f54 | 2009-03-20 22:42:55 +0000 | [diff] [blame] | 946 | SelectionDAG &DAG) { |
Duncan Sands | 83ec4b6 | 2008-06-06 12:08:01 +0000 | [diff] [blame] | 947 | MVT PtrVT = getPointerTy(); |
Dale Johannesen | 33c960f | 2009-02-04 20:06:27 +0000 | [diff] [blame] | 948 | DebugLoc dl = Op.getDebugLoc(); |
Lauro Ramos Venancio | 0ae4a33 | 2007-04-22 00:04:12 +0000 | [diff] [blame] | 949 | GlobalValue *GV = cast<GlobalAddressSDNode>(Op)->getGlobal(); |
| 950 | Reloc::Model RelocM = getTargetMachine().getRelocationModel(); |
| 951 | if (RelocM == Reloc::PIC_) { |
Rafael Espindola | bb46f52 | 2009-01-15 20:18:42 +0000 | [diff] [blame] | 952 | bool UseGOTOFF = GV->hasLocalLinkage() || GV->hasHiddenVisibility(); |
Lauro Ramos Venancio | 0ae4a33 | 2007-04-22 00:04:12 +0000 | [diff] [blame] | 953 | ARMConstantPoolValue *CPV = |
| 954 | new ARMConstantPoolValue(GV, ARMCP::CPValue, UseGOTOFF ? "GOTOFF":"GOT"); |
Evan Cheng | 1606e8e | 2009-03-13 07:51:59 +0000 | [diff] [blame] | 955 | SDValue CPAddr = DAG.getTargetConstantPool(CPV, PtrVT, 4); |
Dale Johannesen | b300d2a | 2009-02-07 00:55:49 +0000 | [diff] [blame] | 956 | CPAddr = DAG.getNode(ARMISD::Wrapper, dl, MVT::i32, CPAddr); |
Bob Wilson | 2dc4f54 | 2009-03-20 22:42:55 +0000 | [diff] [blame] | 957 | SDValue Result = DAG.getLoad(PtrVT, dl, DAG.getEntryNode(), |
Dale Johannesen | 33c960f | 2009-02-04 20:06:27 +0000 | [diff] [blame] | 958 | CPAddr, NULL, 0); |
Dan Gohman | 475871a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 959 | SDValue Chain = Result.getValue(1); |
Dale Johannesen | b300d2a | 2009-02-07 00:55:49 +0000 | [diff] [blame] | 960 | SDValue GOT = DAG.getGLOBAL_OFFSET_TABLE(PtrVT); |
Dale Johannesen | 33c960f | 2009-02-04 20:06:27 +0000 | [diff] [blame] | 961 | Result = DAG.getNode(ISD::ADD, dl, PtrVT, Result, GOT); |
Lauro Ramos Venancio | 0ae4a33 | 2007-04-22 00:04:12 +0000 | [diff] [blame] | 962 | if (!UseGOTOFF) |
Dale Johannesen | 33c960f | 2009-02-04 20:06:27 +0000 | [diff] [blame] | 963 | Result = DAG.getLoad(PtrVT, dl, Chain, Result, NULL, 0); |
Lauro Ramos Venancio | 0ae4a33 | 2007-04-22 00:04:12 +0000 | [diff] [blame] | 964 | return Result; |
| 965 | } else { |
Evan Cheng | 1606e8e | 2009-03-13 07:51:59 +0000 | [diff] [blame] | 966 | SDValue CPAddr = DAG.getTargetConstantPool(GV, PtrVT, 4); |
Dale Johannesen | b300d2a | 2009-02-07 00:55:49 +0000 | [diff] [blame] | 967 | CPAddr = DAG.getNode(ARMISD::Wrapper, dl, MVT::i32, CPAddr); |
Dale Johannesen | 33c960f | 2009-02-04 20:06:27 +0000 | [diff] [blame] | 968 | return DAG.getLoad(PtrVT, dl, DAG.getEntryNode(), CPAddr, NULL, 0); |
Lauro Ramos Venancio | 0ae4a33 | 2007-04-22 00:04:12 +0000 | [diff] [blame] | 969 | } |
| 970 | } |
| 971 | |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 972 | /// GVIsIndirectSymbol - true if the GV will be accessed via an indirect symbol |
Evan Cheng | 97c9bb5 | 2007-05-04 00:26:58 +0000 | [diff] [blame] | 973 | /// even in non-static mode. |
| 974 | static bool GVIsIndirectSymbol(GlobalValue *GV, Reloc::Model RelocM) { |
Evan Cheng | ae94e59 | 2008-12-05 01:06:39 +0000 | [diff] [blame] | 975 | // If symbol visibility is hidden, the extra load is not needed if |
| 976 | // the symbol is definitely defined in the current translation unit. |
| 977 | bool isDecl = GV->isDeclaration() && !GV->hasNotBeenReadFromBitcode(); |
| 978 | if (GV->hasHiddenVisibility() && (!isDecl && !GV->hasCommonLinkage())) |
| 979 | return false; |
Duncan Sands | 667d4b8 | 2009-03-07 15:45:40 +0000 | [diff] [blame] | 980 | return RelocM != Reloc::Static && (isDecl || GV->isWeakForLinker()); |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 981 | } |
| 982 | |
Dan Gohman | 475871a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 983 | SDValue ARMTargetLowering::LowerGlobalAddressDarwin(SDValue Op, |
Bob Wilson | 2dc4f54 | 2009-03-20 22:42:55 +0000 | [diff] [blame] | 984 | SelectionDAG &DAG) { |
Duncan Sands | 83ec4b6 | 2008-06-06 12:08:01 +0000 | [diff] [blame] | 985 | MVT PtrVT = getPointerTy(); |
Dale Johannesen | 33c960f | 2009-02-04 20:06:27 +0000 | [diff] [blame] | 986 | DebugLoc dl = Op.getDebugLoc(); |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 987 | GlobalValue *GV = cast<GlobalAddressSDNode>(Op)->getGlobal(); |
| 988 | Reloc::Model RelocM = getTargetMachine().getRelocationModel(); |
Evan Cheng | 97c9bb5 | 2007-05-04 00:26:58 +0000 | [diff] [blame] | 989 | bool IsIndirect = GVIsIndirectSymbol(GV, RelocM); |
Dan Gohman | 475871a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 990 | SDValue CPAddr; |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 991 | if (RelocM == Reloc::Static) |
Evan Cheng | 1606e8e | 2009-03-13 07:51:59 +0000 | [diff] [blame] | 992 | CPAddr = DAG.getTargetConstantPool(GV, PtrVT, 4); |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 993 | else { |
| 994 | unsigned PCAdj = (RelocM != Reloc::PIC_) |
| 995 | ? 0 : (Subtarget->isThumb() ? 4 : 8); |
Evan Cheng | c60e76d | 2007-01-30 20:37:08 +0000 | [diff] [blame] | 996 | ARMCP::ARMCPKind Kind = IsIndirect ? ARMCP::CPNonLazyPtr |
| 997 | : ARMCP::CPValue; |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 998 | ARMConstantPoolValue *CPV = new ARMConstantPoolValue(GV, ARMPCLabelIndex, |
Evan Cheng | c60e76d | 2007-01-30 20:37:08 +0000 | [diff] [blame] | 999 | Kind, PCAdj); |
Evan Cheng | 1606e8e | 2009-03-13 07:51:59 +0000 | [diff] [blame] | 1000 | CPAddr = DAG.getTargetConstantPool(CPV, PtrVT, 4); |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 1001 | } |
Dale Johannesen | b300d2a | 2009-02-07 00:55:49 +0000 | [diff] [blame] | 1002 | CPAddr = DAG.getNode(ARMISD::Wrapper, dl, MVT::i32, CPAddr); |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 1003 | |
Dale Johannesen | 33c960f | 2009-02-04 20:06:27 +0000 | [diff] [blame] | 1004 | SDValue Result = DAG.getLoad(PtrVT, dl, DAG.getEntryNode(), CPAddr, NULL, 0); |
Dan Gohman | 475871a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 1005 | SDValue Chain = Result.getValue(1); |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 1006 | |
| 1007 | if (RelocM == Reloc::PIC_) { |
Dan Gohman | 475871a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 1008 | SDValue PICLabel = DAG.getConstant(ARMPCLabelIndex++, MVT::i32); |
Dale Johannesen | 33c960f | 2009-02-04 20:06:27 +0000 | [diff] [blame] | 1009 | Result = DAG.getNode(ARMISD::PIC_ADD, dl, PtrVT, Result, PICLabel); |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 1010 | } |
| 1011 | if (IsIndirect) |
Dale Johannesen | 33c960f | 2009-02-04 20:06:27 +0000 | [diff] [blame] | 1012 | Result = DAG.getLoad(PtrVT, dl, Chain, Result, NULL, 0); |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 1013 | |
| 1014 | return Result; |
| 1015 | } |
| 1016 | |
Dan Gohman | 475871a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 1017 | SDValue ARMTargetLowering::LowerGLOBAL_OFFSET_TABLE(SDValue Op, |
Bob Wilson | 2dc4f54 | 2009-03-20 22:42:55 +0000 | [diff] [blame] | 1018 | SelectionDAG &DAG){ |
Lauro Ramos Venancio | 0ae4a33 | 2007-04-22 00:04:12 +0000 | [diff] [blame] | 1019 | assert(Subtarget->isTargetELF() && |
| 1020 | "GLOBAL OFFSET TABLE not implemented for non-ELF targets"); |
Duncan Sands | 83ec4b6 | 2008-06-06 12:08:01 +0000 | [diff] [blame] | 1021 | MVT PtrVT = getPointerTy(); |
Dale Johannesen | 33c960f | 2009-02-04 20:06:27 +0000 | [diff] [blame] | 1022 | DebugLoc dl = Op.getDebugLoc(); |
Lauro Ramos Venancio | 0ae4a33 | 2007-04-22 00:04:12 +0000 | [diff] [blame] | 1023 | unsigned PCAdj = Subtarget->isThumb() ? 4 : 8; |
| 1024 | ARMConstantPoolValue *CPV = new ARMConstantPoolValue("_GLOBAL_OFFSET_TABLE_", |
| 1025 | ARMPCLabelIndex, |
| 1026 | ARMCP::CPValue, PCAdj); |
Evan Cheng | 1606e8e | 2009-03-13 07:51:59 +0000 | [diff] [blame] | 1027 | SDValue CPAddr = DAG.getTargetConstantPool(CPV, PtrVT, 4); |
Dale Johannesen | b300d2a | 2009-02-07 00:55:49 +0000 | [diff] [blame] | 1028 | CPAddr = DAG.getNode(ARMISD::Wrapper, dl, MVT::i32, CPAddr); |
Dale Johannesen | 33c960f | 2009-02-04 20:06:27 +0000 | [diff] [blame] | 1029 | SDValue Result = DAG.getLoad(PtrVT, dl, DAG.getEntryNode(), CPAddr, NULL, 0); |
Dan Gohman | 475871a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 1030 | SDValue PICLabel = DAG.getConstant(ARMPCLabelIndex++, MVT::i32); |
Dale Johannesen | 33c960f | 2009-02-04 20:06:27 +0000 | [diff] [blame] | 1031 | return DAG.getNode(ARMISD::PIC_ADD, dl, PtrVT, Result, PICLabel); |
Lauro Ramos Venancio | 0ae4a33 | 2007-04-22 00:04:12 +0000 | [diff] [blame] | 1032 | } |
| 1033 | |
Dan Gohman | 475871a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 1034 | static SDValue LowerINTRINSIC_WO_CHAIN(SDValue Op, SelectionDAG &DAG) { |
Duncan Sands | 83ec4b6 | 2008-06-06 12:08:01 +0000 | [diff] [blame] | 1035 | MVT PtrVT = DAG.getTargetLoweringInfo().getPointerTy(); |
Dan Gohman | f5aeb1a | 2008-09-12 16:56:44 +0000 | [diff] [blame] | 1036 | unsigned IntNo = cast<ConstantSDNode>(Op.getOperand(0))->getZExtValue(); |
Lauro Ramos Venancio | e0cb36b | 2007-11-08 17:20:05 +0000 | [diff] [blame] | 1037 | switch (IntNo) { |
Dan Gohman | 475871a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 1038 | default: return SDValue(); // Don't custom lower most intrinsics. |
Lauro Ramos Venancio | e0cb36b | 2007-11-08 17:20:05 +0000 | [diff] [blame] | 1039 | case Intrinsic::arm_thread_pointer: |
Dale Johannesen | b300d2a | 2009-02-07 00:55:49 +0000 | [diff] [blame] | 1040 | return DAG.getNode(ARMISD::THREAD_POINTER, DebugLoc::getUnknownLoc(), |
| 1041 | PtrVT); |
Lauro Ramos Venancio | e0cb36b | 2007-11-08 17:20:05 +0000 | [diff] [blame] | 1042 | } |
| 1043 | } |
| 1044 | |
Dan Gohman | 475871a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 1045 | static SDValue LowerVASTART(SDValue Op, SelectionDAG &DAG, |
Bob Wilson | 2dc4f54 | 2009-03-20 22:42:55 +0000 | [diff] [blame] | 1046 | unsigned VarArgsFrameIndex) { |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 1047 | // vastart just stores the address of the VarArgsFrameIndex slot into the |
| 1048 | // memory location argument. |
Dale Johannesen | 33c960f | 2009-02-04 20:06:27 +0000 | [diff] [blame] | 1049 | DebugLoc dl = Op.getDebugLoc(); |
Duncan Sands | 83ec4b6 | 2008-06-06 12:08:01 +0000 | [diff] [blame] | 1050 | MVT PtrVT = DAG.getTargetLoweringInfo().getPointerTy(); |
Dan Gohman | 475871a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 1051 | SDValue FR = DAG.getFrameIndex(VarArgsFrameIndex, PtrVT); |
Dan Gohman | 69de193 | 2008-02-06 22:27:42 +0000 | [diff] [blame] | 1052 | const Value *SV = cast<SrcValueSDNode>(Op.getOperand(2))->getValue(); |
Dale Johannesen | 33c960f | 2009-02-04 20:06:27 +0000 | [diff] [blame] | 1053 | return DAG.getStore(Op.getOperand(0), dl, FR, Op.getOperand(1), SV, 0); |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 1054 | } |
| 1055 | |
Dan Gohman | 475871a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 1056 | SDValue |
| 1057 | ARMTargetLowering::LowerFORMAL_ARGUMENTS(SDValue Op, SelectionDAG &DAG) { |
Bob Wilson | 1f595bb | 2009-04-17 19:07:39 +0000 | [diff] [blame] | 1058 | MachineFunction &MF = DAG.getMachineFunction(); |
| 1059 | MachineFrameInfo *MFI = MF.getFrameInfo(); |
| 1060 | |
Dan Gohman | 475871a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 1061 | SDValue Root = Op.getOperand(0); |
Dale Johannesen | 33c960f | 2009-02-04 20:06:27 +0000 | [diff] [blame] | 1062 | DebugLoc dl = Op.getDebugLoc(); |
Dan Gohman | f5aeb1a | 2008-09-12 16:56:44 +0000 | [diff] [blame] | 1063 | bool isVarArg = cast<ConstantSDNode>(Op.getOperand(2))->getZExtValue() != 0; |
Bob Wilson | 1f595bb | 2009-04-17 19:07:39 +0000 | [diff] [blame] | 1064 | unsigned CC = MF.getFunction()->getCallingConv(); |
| 1065 | ARMFunctionInfo *AFI = MF.getInfo<ARMFunctionInfo>(); |
| 1066 | |
| 1067 | // Assign locations to all of the incoming arguments. |
| 1068 | SmallVector<CCValAssign, 16> ArgLocs; |
| 1069 | CCState CCInfo(CC, isVarArg, getTargetMachine(), ArgLocs); |
| 1070 | CCInfo.AnalyzeFormalArguments(Op.getNode(), CC_ARM); |
| 1071 | |
| 1072 | SmallVector<SDValue, 16> ArgValues; |
| 1073 | |
| 1074 | for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { |
| 1075 | CCValAssign &VA = ArgLocs[i]; |
| 1076 | |
Bob Wilson | dee46d7 | 2009-04-17 20:35:10 +0000 | [diff] [blame] | 1077 | // Arguments stored in registers. |
Bob Wilson | 1f595bb | 2009-04-17 19:07:39 +0000 | [diff] [blame] | 1078 | if (VA.isRegLoc()) { |
| 1079 | MVT RegVT = VA.getLocVT(); |
| 1080 | TargetRegisterClass *RC; |
| 1081 | if (AFI->isThumbFunction()) |
| 1082 | RC = ARM::tGPRRegisterClass; |
| 1083 | else |
| 1084 | RC = ARM::GPRRegisterClass; |
| 1085 | |
| 1086 | if (RegVT == MVT::f64) { |
Bob Wilson | dee46d7 | 2009-04-17 20:35:10 +0000 | [diff] [blame] | 1087 | // f64 is passed in pairs of GPRs and must be combined. |
Bob Wilson | 1f595bb | 2009-04-17 19:07:39 +0000 | [diff] [blame] | 1088 | RegVT = MVT::i32; |
| 1089 | } else if (!((RegVT == MVT::i32) || (RegVT == MVT::f32))) |
| 1090 | assert(0 && "RegVT not supported by FORMAL_ARGUMENTS Lowering"); |
| 1091 | |
Bob Wilson | dee46d7 | 2009-04-17 20:35:10 +0000 | [diff] [blame] | 1092 | // Transform the arguments stored in physical registers into virtual ones. |
Bob Wilson | 998e125 | 2009-04-20 18:36:57 +0000 | [diff] [blame^] | 1093 | unsigned Reg = MF.addLiveIn(VA.getLocReg(), RC); |
Bob Wilson | 1f595bb | 2009-04-17 19:07:39 +0000 | [diff] [blame] | 1094 | SDValue ArgValue = DAG.getCopyFromReg(Root, dl, Reg, RegVT); |
| 1095 | |
Bob Wilson | dee46d7 | 2009-04-17 20:35:10 +0000 | [diff] [blame] | 1096 | // f64 is passed in i32 pairs and must be combined. |
Bob Wilson | 1f595bb | 2009-04-17 19:07:39 +0000 | [diff] [blame] | 1097 | if (VA.needsCustom()) { |
| 1098 | SDValue ArgValue2; |
| 1099 | |
| 1100 | VA = ArgLocs[++i]; // skip ahead to next loc |
| 1101 | if (VA.isMemLoc()) { |
| 1102 | // must be APCS and older than V5T to split like this |
| 1103 | unsigned ArgSize = VA.getLocVT().getSizeInBits()/8; |
| 1104 | int FI = MFI->CreateFixedObject(ArgSize, VA.getLocMemOffset()); |
| 1105 | |
Bob Wilson | dee46d7 | 2009-04-17 20:35:10 +0000 | [diff] [blame] | 1106 | // Create load node to retrieve arguments from the stack. |
Bob Wilson | 1f595bb | 2009-04-17 19:07:39 +0000 | [diff] [blame] | 1107 | SDValue FIN = DAG.getFrameIndex(FI, getPointerTy()); |
| 1108 | ArgValue2 = DAG.getLoad(MVT::i32, dl, Root, FIN, NULL, 0); |
| 1109 | } else { |
Bob Wilson | 998e125 | 2009-04-20 18:36:57 +0000 | [diff] [blame^] | 1110 | Reg = MF.addLiveIn(VA.getLocReg(), RC); |
Bob Wilson | 1f595bb | 2009-04-17 19:07:39 +0000 | [diff] [blame] | 1111 | ArgValue2 = DAG.getCopyFromReg(Root, dl, Reg, MVT::i32); |
| 1112 | } |
| 1113 | |
| 1114 | ArgValue = DAG.getNode(ARMISD::FMDRR, dl, MVT::f64, |
| 1115 | ArgValue, ArgValue2); |
| 1116 | } |
| 1117 | |
| 1118 | // If this is an 8 or 16-bit value, it is really passed promoted |
| 1119 | // to 32 bits. Insert an assert[sz]ext to capture this, then |
| 1120 | // truncate to the right size. |
| 1121 | switch (VA.getLocInfo()) { |
| 1122 | default: assert(0 && "Unknown loc info!"); |
| 1123 | case CCValAssign::Full: break; |
| 1124 | case CCValAssign::BCvt: |
| 1125 | ArgValue = DAG.getNode(ISD::BIT_CONVERT, dl, VA.getValVT(), ArgValue); |
| 1126 | break; |
| 1127 | case CCValAssign::SExt: |
| 1128 | ArgValue = DAG.getNode(ISD::AssertSext, dl, RegVT, ArgValue, |
| 1129 | DAG.getValueType(VA.getValVT())); |
| 1130 | ArgValue = DAG.getNode(ISD::TRUNCATE, dl, VA.getValVT(), ArgValue); |
| 1131 | break; |
| 1132 | case CCValAssign::ZExt: |
| 1133 | ArgValue = DAG.getNode(ISD::AssertZext, dl, RegVT, ArgValue, |
| 1134 | DAG.getValueType(VA.getValVT())); |
| 1135 | ArgValue = DAG.getNode(ISD::TRUNCATE, dl, VA.getValVT(), ArgValue); |
| 1136 | break; |
| 1137 | } |
| 1138 | |
| 1139 | ArgValues.push_back(ArgValue); |
| 1140 | |
| 1141 | } else { // VA.isRegLoc() |
| 1142 | |
| 1143 | // sanity check |
| 1144 | assert(VA.isMemLoc()); |
| 1145 | assert(VA.getValVT() != MVT::i64 && "i64 should already be lowered"); |
| 1146 | |
| 1147 | unsigned ArgSize = VA.getLocVT().getSizeInBits()/8; |
| 1148 | int FI = MFI->CreateFixedObject(ArgSize, VA.getLocMemOffset()); |
| 1149 | |
Bob Wilson | dee46d7 | 2009-04-17 20:35:10 +0000 | [diff] [blame] | 1150 | // Create load nodes to retrieve arguments from the stack. |
Bob Wilson | 1f595bb | 2009-04-17 19:07:39 +0000 | [diff] [blame] | 1151 | SDValue FIN = DAG.getFrameIndex(FI, getPointerTy()); |
| 1152 | ArgValues.push_back(DAG.getLoad(VA.getValVT(), dl, Root, FIN, NULL, 0)); |
| 1153 | } |
| 1154 | } |
| 1155 | |
| 1156 | // varargs |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 1157 | if (isVarArg) { |
| 1158 | static const unsigned GPRArgRegs[] = { |
| 1159 | ARM::R0, ARM::R1, ARM::R2, ARM::R3 |
| 1160 | }; |
| 1161 | |
Bob Wilson | dee46d7 | 2009-04-17 20:35:10 +0000 | [diff] [blame] | 1162 | unsigned NumGPRs = CCInfo.getFirstUnallocated |
| 1163 | (GPRArgRegs, sizeof(GPRArgRegs) / sizeof(GPRArgRegs[0])); |
Bob Wilson | 1f595bb | 2009-04-17 19:07:39 +0000 | [diff] [blame] | 1164 | |
Lauro Ramos Venancio | 600c383 | 2007-02-23 20:32:57 +0000 | [diff] [blame] | 1165 | unsigned Align = MF.getTarget().getFrameInfo()->getStackAlignment(); |
| 1166 | unsigned VARegSize = (4 - NumGPRs) * 4; |
| 1167 | unsigned VARegSaveSize = (VARegSize + Align - 1) & ~(Align - 1); |
Bob Wilson | 1f595bb | 2009-04-17 19:07:39 +0000 | [diff] [blame] | 1168 | unsigned ArgOffset = 0; |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 1169 | if (VARegSaveSize) { |
| 1170 | // If this function is vararg, store any remaining integer argument regs |
| 1171 | // to their spots on the stack so that they may be loaded by deferencing |
| 1172 | // the result of va_next. |
| 1173 | AFI->setVarArgsRegSaveSize(VARegSaveSize); |
Bob Wilson | 1f595bb | 2009-04-17 19:07:39 +0000 | [diff] [blame] | 1174 | ArgOffset = CCInfo.getNextStackOffset(); |
Lauro Ramos Venancio | 600c383 | 2007-02-23 20:32:57 +0000 | [diff] [blame] | 1175 | VarArgsFrameIndex = MFI->CreateFixedObject(VARegSaveSize, ArgOffset + |
| 1176 | VARegSaveSize - VARegSize); |
Dan Gohman | 475871a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 1177 | SDValue FIN = DAG.getFrameIndex(VarArgsFrameIndex, getPointerTy()); |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 1178 | |
Dan Gohman | 475871a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 1179 | SmallVector<SDValue, 4> MemOps; |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 1180 | for (; NumGPRs < 4; ++NumGPRs) { |
Bob Wilson | 1f595bb | 2009-04-17 19:07:39 +0000 | [diff] [blame] | 1181 | TargetRegisterClass *RC; |
Jim Grosbach | 30eae3c | 2009-04-07 20:34:09 +0000 | [diff] [blame] | 1182 | if (AFI->isThumbFunction()) |
Bob Wilson | 1f595bb | 2009-04-17 19:07:39 +0000 | [diff] [blame] | 1183 | RC = ARM::tGPRRegisterClass; |
Jim Grosbach | 30eae3c | 2009-04-07 20:34:09 +0000 | [diff] [blame] | 1184 | else |
Bob Wilson | 1f595bb | 2009-04-17 19:07:39 +0000 | [diff] [blame] | 1185 | RC = ARM::GPRRegisterClass; |
| 1186 | |
Bob Wilson | 998e125 | 2009-04-20 18:36:57 +0000 | [diff] [blame^] | 1187 | unsigned VReg = MF.addLiveIn(GPRArgRegs[NumGPRs], RC); |
Dale Johannesen | 33c960f | 2009-02-04 20:06:27 +0000 | [diff] [blame] | 1188 | SDValue Val = DAG.getCopyFromReg(Root, dl, VReg, MVT::i32); |
| 1189 | SDValue Store = DAG.getStore(Val.getValue(1), dl, Val, FIN, NULL, 0); |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 1190 | MemOps.push_back(Store); |
Dale Johannesen | 33c960f | 2009-02-04 20:06:27 +0000 | [diff] [blame] | 1191 | FIN = DAG.getNode(ISD::ADD, dl, getPointerTy(), FIN, |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 1192 | DAG.getConstant(4, getPointerTy())); |
| 1193 | } |
| 1194 | if (!MemOps.empty()) |
Dale Johannesen | 33c960f | 2009-02-04 20:06:27 +0000 | [diff] [blame] | 1195 | Root = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 1196 | &MemOps[0], MemOps.size()); |
| 1197 | } else |
| 1198 | // This will point to the next argument passed via stack. |
| 1199 | VarArgsFrameIndex = MFI->CreateFixedObject(4, ArgOffset); |
| 1200 | } |
| 1201 | |
| 1202 | ArgValues.push_back(Root); |
| 1203 | |
| 1204 | // Return the new list of results. |
Dale Johannesen | 33c960f | 2009-02-04 20:06:27 +0000 | [diff] [blame] | 1205 | return DAG.getNode(ISD::MERGE_VALUES, dl, Op.getNode()->getVTList(), |
Bob Wilson | 1f595bb | 2009-04-17 19:07:39 +0000 | [diff] [blame] | 1206 | &ArgValues[0], ArgValues.size()).getValue(Op.getResNo()); |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 1207 | } |
| 1208 | |
| 1209 | /// isFloatingPointZero - Return true if this is +0.0. |
Dan Gohman | 475871a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 1210 | static bool isFloatingPointZero(SDValue Op) { |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 1211 | if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(Op)) |
Dale Johannesen | eaf0894 | 2007-08-31 04:03:46 +0000 | [diff] [blame] | 1212 | return CFP->getValueAPF().isPosZero(); |
Gabor Greif | ba36cb5 | 2008-08-28 21:40:38 +0000 | [diff] [blame] | 1213 | else if (ISD::isEXTLoad(Op.getNode()) || ISD::isNON_EXTLoad(Op.getNode())) { |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 1214 | // Maybe this has already been legalized into the constant pool? |
| 1215 | if (Op.getOperand(1).getOpcode() == ARMISD::Wrapper) { |
Dan Gohman | 475871a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 1216 | SDValue WrapperOp = Op.getOperand(1).getOperand(0); |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 1217 | if (ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(WrapperOp)) |
| 1218 | if (ConstantFP *CFP = dyn_cast<ConstantFP>(CP->getConstVal())) |
Dale Johannesen | eaf0894 | 2007-08-31 04:03:46 +0000 | [diff] [blame] | 1219 | return CFP->getValueAPF().isPosZero(); |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 1220 | } |
| 1221 | } |
| 1222 | return false; |
| 1223 | } |
| 1224 | |
Evan Cheng | 9a2ef95 | 2007-02-02 01:53:26 +0000 | [diff] [blame] | 1225 | static bool isLegalCmpImmediate(unsigned C, bool isThumb) { |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 1226 | return ( isThumb && (C & ~255U) == 0) || |
| 1227 | (!isThumb && ARM_AM::getSOImmVal(C) != -1); |
| 1228 | } |
| 1229 | |
| 1230 | /// Returns appropriate ARM CMP (cmp) and corresponding condition code for |
| 1231 | /// the given operands. |
Dan Gohman | 475871a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 1232 | static SDValue getARMCmp(SDValue LHS, SDValue RHS, ISD::CondCode CC, |
Dale Johannesen | de06470 | 2009-02-06 21:50:26 +0000 | [diff] [blame] | 1233 | SDValue &ARMCC, SelectionDAG &DAG, bool isThumb, |
| 1234 | DebugLoc dl) { |
Gabor Greif | ba36cb5 | 2008-08-28 21:40:38 +0000 | [diff] [blame] | 1235 | if (ConstantSDNode *RHSC = dyn_cast<ConstantSDNode>(RHS.getNode())) { |
Dan Gohman | f5aeb1a | 2008-09-12 16:56:44 +0000 | [diff] [blame] | 1236 | unsigned C = RHSC->getZExtValue(); |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 1237 | if (!isLegalCmpImmediate(C, isThumb)) { |
| 1238 | // Constant does not fit, try adjusting it by one? |
| 1239 | switch (CC) { |
| 1240 | default: break; |
| 1241 | case ISD::SETLT: |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 1242 | case ISD::SETGE: |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 1243 | if (isLegalCmpImmediate(C-1, isThumb)) { |
Evan Cheng | 9a2ef95 | 2007-02-02 01:53:26 +0000 | [diff] [blame] | 1244 | CC = (CC == ISD::SETLT) ? ISD::SETLE : ISD::SETGT; |
| 1245 | RHS = DAG.getConstant(C-1, MVT::i32); |
| 1246 | } |
| 1247 | break; |
| 1248 | case ISD::SETULT: |
| 1249 | case ISD::SETUGE: |
| 1250 | if (C > 0 && isLegalCmpImmediate(C-1, isThumb)) { |
| 1251 | CC = (CC == ISD::SETULT) ? ISD::SETULE : ISD::SETUGT; |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 1252 | RHS = DAG.getConstant(C-1, MVT::i32); |
| 1253 | } |
| 1254 | break; |
| 1255 | case ISD::SETLE: |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 1256 | case ISD::SETGT: |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 1257 | if (isLegalCmpImmediate(C+1, isThumb)) { |
Evan Cheng | 9a2ef95 | 2007-02-02 01:53:26 +0000 | [diff] [blame] | 1258 | CC = (CC == ISD::SETLE) ? ISD::SETLT : ISD::SETGE; |
| 1259 | RHS = DAG.getConstant(C+1, MVT::i32); |
| 1260 | } |
| 1261 | break; |
| 1262 | case ISD::SETULE: |
| 1263 | case ISD::SETUGT: |
| 1264 | if (C < 0xffffffff && isLegalCmpImmediate(C+1, isThumb)) { |
| 1265 | CC = (CC == ISD::SETULE) ? ISD::SETULT : ISD::SETUGE; |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 1266 | RHS = DAG.getConstant(C+1, MVT::i32); |
| 1267 | } |
| 1268 | break; |
| 1269 | } |
| 1270 | } |
| 1271 | } |
| 1272 | |
| 1273 | ARMCC::CondCodes CondCode = IntCCToARMCC(CC); |
Lauro Ramos Venancio | 9996663 | 2007-04-02 01:30:03 +0000 | [diff] [blame] | 1274 | ARMISD::NodeType CompareType; |
| 1275 | switch (CondCode) { |
| 1276 | default: |
| 1277 | CompareType = ARMISD::CMP; |
| 1278 | break; |
| 1279 | case ARMCC::EQ: |
| 1280 | case ARMCC::NE: |
| 1281 | case ARMCC::MI: |
| 1282 | case ARMCC::PL: |
| 1283 | // Uses only N and Z Flags |
| 1284 | CompareType = ARMISD::CMPNZ; |
| 1285 | break; |
| 1286 | } |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 1287 | ARMCC = DAG.getConstant(CondCode, MVT::i32); |
Dale Johannesen | de06470 | 2009-02-06 21:50:26 +0000 | [diff] [blame] | 1288 | return DAG.getNode(CompareType, dl, MVT::Flag, LHS, RHS); |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 1289 | } |
| 1290 | |
| 1291 | /// Returns a appropriate VFP CMP (fcmp{s|d}+fmstat) for the given operands. |
Bob Wilson | 2dc4f54 | 2009-03-20 22:42:55 +0000 | [diff] [blame] | 1292 | static SDValue getVFPCmp(SDValue LHS, SDValue RHS, SelectionDAG &DAG, |
Dale Johannesen | de06470 | 2009-02-06 21:50:26 +0000 | [diff] [blame] | 1293 | DebugLoc dl) { |
Dan Gohman | 475871a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 1294 | SDValue Cmp; |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 1295 | if (!isFloatingPointZero(RHS)) |
Dale Johannesen | de06470 | 2009-02-06 21:50:26 +0000 | [diff] [blame] | 1296 | Cmp = DAG.getNode(ARMISD::CMPFP, dl, MVT::Flag, LHS, RHS); |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 1297 | else |
Dale Johannesen | de06470 | 2009-02-06 21:50:26 +0000 | [diff] [blame] | 1298 | Cmp = DAG.getNode(ARMISD::CMPFPw0, dl, MVT::Flag, LHS); |
| 1299 | return DAG.getNode(ARMISD::FMSTAT, dl, MVT::Flag, Cmp); |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 1300 | } |
| 1301 | |
Dan Gohman | 475871a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 1302 | static SDValue LowerSELECT_CC(SDValue Op, SelectionDAG &DAG, |
Bob Wilson | 2dc4f54 | 2009-03-20 22:42:55 +0000 | [diff] [blame] | 1303 | const ARMSubtarget *ST) { |
Duncan Sands | 83ec4b6 | 2008-06-06 12:08:01 +0000 | [diff] [blame] | 1304 | MVT VT = Op.getValueType(); |
Dan Gohman | 475871a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 1305 | SDValue LHS = Op.getOperand(0); |
| 1306 | SDValue RHS = Op.getOperand(1); |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 1307 | ISD::CondCode CC = cast<CondCodeSDNode>(Op.getOperand(4))->get(); |
Dan Gohman | 475871a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 1308 | SDValue TrueVal = Op.getOperand(2); |
| 1309 | SDValue FalseVal = Op.getOperand(3); |
Dale Johannesen | de06470 | 2009-02-06 21:50:26 +0000 | [diff] [blame] | 1310 | DebugLoc dl = Op.getDebugLoc(); |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 1311 | |
| 1312 | if (LHS.getValueType() == MVT::i32) { |
Dan Gohman | 475871a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 1313 | SDValue ARMCC; |
| 1314 | SDValue CCR = DAG.getRegister(ARM::CPSR, MVT::i32); |
Dale Johannesen | de06470 | 2009-02-06 21:50:26 +0000 | [diff] [blame] | 1315 | SDValue Cmp = getARMCmp(LHS, RHS, CC, ARMCC, DAG, ST->isThumb(), dl); |
| 1316 | return DAG.getNode(ARMISD::CMOV, dl, VT, FalseVal, TrueVal, ARMCC, CCR,Cmp); |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 1317 | } |
| 1318 | |
| 1319 | ARMCC::CondCodes CondCode, CondCode2; |
| 1320 | if (FPCCToARMCC(CC, CondCode, CondCode2)) |
| 1321 | std::swap(TrueVal, FalseVal); |
| 1322 | |
Dan Gohman | 475871a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 1323 | SDValue ARMCC = DAG.getConstant(CondCode, MVT::i32); |
| 1324 | SDValue CCR = DAG.getRegister(ARM::CPSR, MVT::i32); |
Dale Johannesen | de06470 | 2009-02-06 21:50:26 +0000 | [diff] [blame] | 1325 | SDValue Cmp = getVFPCmp(LHS, RHS, DAG, dl); |
| 1326 | SDValue Result = DAG.getNode(ARMISD::CMOV, dl, VT, FalseVal, TrueVal, |
Evan Cheng | 0e1d379 | 2007-07-05 07:18:20 +0000 | [diff] [blame] | 1327 | ARMCC, CCR, Cmp); |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 1328 | if (CondCode2 != ARMCC::AL) { |
Dan Gohman | 475871a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 1329 | SDValue ARMCC2 = DAG.getConstant(CondCode2, MVT::i32); |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 1330 | // FIXME: Needs another CMP because flag can have but one use. |
Dale Johannesen | de06470 | 2009-02-06 21:50:26 +0000 | [diff] [blame] | 1331 | SDValue Cmp2 = getVFPCmp(LHS, RHS, DAG, dl); |
Bob Wilson | 2dc4f54 | 2009-03-20 22:42:55 +0000 | [diff] [blame] | 1332 | Result = DAG.getNode(ARMISD::CMOV, dl, VT, |
Dale Johannesen | de06470 | 2009-02-06 21:50:26 +0000 | [diff] [blame] | 1333 | Result, TrueVal, ARMCC2, CCR, Cmp2); |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 1334 | } |
| 1335 | return Result; |
| 1336 | } |
| 1337 | |
Dan Gohman | 475871a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 1338 | static SDValue LowerBR_CC(SDValue Op, SelectionDAG &DAG, |
Bob Wilson | 2dc4f54 | 2009-03-20 22:42:55 +0000 | [diff] [blame] | 1339 | const ARMSubtarget *ST) { |
Dan Gohman | 475871a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 1340 | SDValue Chain = Op.getOperand(0); |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 1341 | ISD::CondCode CC = cast<CondCodeSDNode>(Op.getOperand(1))->get(); |
Dan Gohman | 475871a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 1342 | SDValue LHS = Op.getOperand(2); |
| 1343 | SDValue RHS = Op.getOperand(3); |
| 1344 | SDValue Dest = Op.getOperand(4); |
Dale Johannesen | de06470 | 2009-02-06 21:50:26 +0000 | [diff] [blame] | 1345 | DebugLoc dl = Op.getDebugLoc(); |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 1346 | |
| 1347 | if (LHS.getValueType() == MVT::i32) { |
Dan Gohman | 475871a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 1348 | SDValue ARMCC; |
| 1349 | SDValue CCR = DAG.getRegister(ARM::CPSR, MVT::i32); |
Dale Johannesen | de06470 | 2009-02-06 21:50:26 +0000 | [diff] [blame] | 1350 | SDValue Cmp = getARMCmp(LHS, RHS, CC, ARMCC, DAG, ST->isThumb(), dl); |
Bob Wilson | 2dc4f54 | 2009-03-20 22:42:55 +0000 | [diff] [blame] | 1351 | return DAG.getNode(ARMISD::BRCOND, dl, MVT::Other, |
Dale Johannesen | de06470 | 2009-02-06 21:50:26 +0000 | [diff] [blame] | 1352 | Chain, Dest, ARMCC, CCR,Cmp); |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 1353 | } |
| 1354 | |
| 1355 | assert(LHS.getValueType() == MVT::f32 || LHS.getValueType() == MVT::f64); |
| 1356 | ARMCC::CondCodes CondCode, CondCode2; |
| 1357 | if (FPCCToARMCC(CC, CondCode, CondCode2)) |
| 1358 | // Swap the LHS/RHS of the comparison if needed. |
| 1359 | std::swap(LHS, RHS); |
Bob Wilson | 2dc4f54 | 2009-03-20 22:42:55 +0000 | [diff] [blame] | 1360 | |
Dale Johannesen | de06470 | 2009-02-06 21:50:26 +0000 | [diff] [blame] | 1361 | SDValue Cmp = getVFPCmp(LHS, RHS, DAG, dl); |
Dan Gohman | 475871a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 1362 | SDValue ARMCC = DAG.getConstant(CondCode, MVT::i32); |
| 1363 | SDValue CCR = DAG.getRegister(ARM::CPSR, MVT::i32); |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 1364 | SDVTList VTList = DAG.getVTList(MVT::Other, MVT::Flag); |
Dan Gohman | 475871a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 1365 | SDValue Ops[] = { Chain, Dest, ARMCC, CCR, Cmp }; |
Dale Johannesen | de06470 | 2009-02-06 21:50:26 +0000 | [diff] [blame] | 1366 | SDValue Res = DAG.getNode(ARMISD::BRCOND, dl, VTList, Ops, 5); |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 1367 | if (CondCode2 != ARMCC::AL) { |
| 1368 | ARMCC = DAG.getConstant(CondCode2, MVT::i32); |
Dan Gohman | 475871a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 1369 | SDValue Ops[] = { Res, Dest, ARMCC, CCR, Res.getValue(1) }; |
Dale Johannesen | de06470 | 2009-02-06 21:50:26 +0000 | [diff] [blame] | 1370 | Res = DAG.getNode(ARMISD::BRCOND, dl, VTList, Ops, 5); |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 1371 | } |
| 1372 | return Res; |
| 1373 | } |
| 1374 | |
Dan Gohman | 475871a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 1375 | SDValue ARMTargetLowering::LowerBR_JT(SDValue Op, SelectionDAG &DAG) { |
| 1376 | SDValue Chain = Op.getOperand(0); |
| 1377 | SDValue Table = Op.getOperand(1); |
| 1378 | SDValue Index = Op.getOperand(2); |
Dale Johannesen | 33c960f | 2009-02-04 20:06:27 +0000 | [diff] [blame] | 1379 | DebugLoc dl = Op.getDebugLoc(); |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 1380 | |
Duncan Sands | 83ec4b6 | 2008-06-06 12:08:01 +0000 | [diff] [blame] | 1381 | MVT PTy = getPointerTy(); |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 1382 | JumpTableSDNode *JT = cast<JumpTableSDNode>(Table); |
| 1383 | ARMFunctionInfo *AFI = DAG.getMachineFunction().getInfo<ARMFunctionInfo>(); |
Dan Gohman | 475871a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 1384 | SDValue UId = DAG.getConstant(AFI->createJumpTableUId(), PTy); |
| 1385 | SDValue JTI = DAG.getTargetJumpTable(JT->getIndex(), PTy); |
Dale Johannesen | de06470 | 2009-02-06 21:50:26 +0000 | [diff] [blame] | 1386 | Table = DAG.getNode(ARMISD::WrapperJT, dl, MVT::i32, JTI, UId); |
Dale Johannesen | 33c960f | 2009-02-04 20:06:27 +0000 | [diff] [blame] | 1387 | Index = DAG.getNode(ISD::MUL, dl, PTy, Index, DAG.getConstant(4, PTy)); |
| 1388 | SDValue Addr = DAG.getNode(ISD::ADD, dl, PTy, Index, Table); |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 1389 | bool isPIC = getTargetMachine().getRelocationModel() == Reloc::PIC_; |
Dale Johannesen | 33c960f | 2009-02-04 20:06:27 +0000 | [diff] [blame] | 1390 | Addr = DAG.getLoad(isPIC ? (MVT)MVT::i32 : PTy, dl, |
Evan Cheng | e2446c6 | 2007-06-26 18:31:22 +0000 | [diff] [blame] | 1391 | Chain, Addr, NULL, 0); |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 1392 | Chain = Addr.getValue(1); |
| 1393 | if (isPIC) |
Dale Johannesen | 33c960f | 2009-02-04 20:06:27 +0000 | [diff] [blame] | 1394 | Addr = DAG.getNode(ISD::ADD, dl, PTy, Addr, Table); |
| 1395 | return DAG.getNode(ARMISD::BR_JT, dl, MVT::Other, Chain, Addr, JTI, UId); |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 1396 | } |
| 1397 | |
Dan Gohman | 475871a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 1398 | static SDValue LowerFP_TO_INT(SDValue Op, SelectionDAG &DAG) { |
Dale Johannesen | de06470 | 2009-02-06 21:50:26 +0000 | [diff] [blame] | 1399 | DebugLoc dl = Op.getDebugLoc(); |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 1400 | unsigned Opc = |
| 1401 | Op.getOpcode() == ISD::FP_TO_SINT ? ARMISD::FTOSI : ARMISD::FTOUI; |
Dale Johannesen | de06470 | 2009-02-06 21:50:26 +0000 | [diff] [blame] | 1402 | Op = DAG.getNode(Opc, dl, MVT::f32, Op.getOperand(0)); |
| 1403 | return DAG.getNode(ISD::BIT_CONVERT, dl, MVT::i32, Op); |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 1404 | } |
| 1405 | |
Dan Gohman | 475871a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 1406 | static SDValue LowerINT_TO_FP(SDValue Op, SelectionDAG &DAG) { |
Duncan Sands | 83ec4b6 | 2008-06-06 12:08:01 +0000 | [diff] [blame] | 1407 | MVT VT = Op.getValueType(); |
Dale Johannesen | de06470 | 2009-02-06 21:50:26 +0000 | [diff] [blame] | 1408 | DebugLoc dl = Op.getDebugLoc(); |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 1409 | unsigned Opc = |
| 1410 | Op.getOpcode() == ISD::SINT_TO_FP ? ARMISD::SITOF : ARMISD::UITOF; |
| 1411 | |
Dale Johannesen | de06470 | 2009-02-06 21:50:26 +0000 | [diff] [blame] | 1412 | Op = DAG.getNode(ISD::BIT_CONVERT, dl, MVT::f32, Op.getOperand(0)); |
| 1413 | return DAG.getNode(Opc, dl, VT, Op); |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 1414 | } |
| 1415 | |
Dan Gohman | 475871a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 1416 | static SDValue LowerFCOPYSIGN(SDValue Op, SelectionDAG &DAG) { |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 1417 | // Implement fcopysign with a fabs and a conditional fneg. |
Dan Gohman | 475871a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 1418 | SDValue Tmp0 = Op.getOperand(0); |
| 1419 | SDValue Tmp1 = Op.getOperand(1); |
Dale Johannesen | de06470 | 2009-02-06 21:50:26 +0000 | [diff] [blame] | 1420 | DebugLoc dl = Op.getDebugLoc(); |
Duncan Sands | 83ec4b6 | 2008-06-06 12:08:01 +0000 | [diff] [blame] | 1421 | MVT VT = Op.getValueType(); |
| 1422 | MVT SrcVT = Tmp1.getValueType(); |
Dale Johannesen | de06470 | 2009-02-06 21:50:26 +0000 | [diff] [blame] | 1423 | SDValue AbsVal = DAG.getNode(ISD::FABS, dl, VT, Tmp0); |
| 1424 | SDValue Cmp = getVFPCmp(Tmp1, DAG.getConstantFP(0.0, SrcVT), DAG, dl); |
Dan Gohman | 475871a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 1425 | SDValue ARMCC = DAG.getConstant(ARMCC::LT, MVT::i32); |
| 1426 | SDValue CCR = DAG.getRegister(ARM::CPSR, MVT::i32); |
Dale Johannesen | de06470 | 2009-02-06 21:50:26 +0000 | [diff] [blame] | 1427 | return DAG.getNode(ARMISD::CNEG, dl, VT, AbsVal, AbsVal, ARMCC, CCR, Cmp); |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 1428 | } |
| 1429 | |
Dan Gohman | 475871a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 1430 | SDValue |
Dale Johannesen | 0f502f6 | 2009-02-03 22:26:09 +0000 | [diff] [blame] | 1431 | ARMTargetLowering::EmitTargetCodeForMemcpy(SelectionDAG &DAG, DebugLoc dl, |
Dan Gohman | 475871a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 1432 | SDValue Chain, |
| 1433 | SDValue Dst, SDValue Src, |
| 1434 | SDValue Size, unsigned Align, |
Dan Gohman | 707e018 | 2008-04-12 04:36:06 +0000 | [diff] [blame] | 1435 | bool AlwaysInline, |
Dan Gohman | 1f13c68 | 2008-04-28 17:15:20 +0000 | [diff] [blame] | 1436 | const Value *DstSV, uint64_t DstSVOff, |
| 1437 | const Value *SrcSV, uint64_t SrcSVOff){ |
Evan Cheng | 4102eb5 | 2007-10-22 22:11:27 +0000 | [diff] [blame] | 1438 | // Do repeated 4-byte loads and stores. To be improved. |
Dan Gohman | 707e018 | 2008-04-12 04:36:06 +0000 | [diff] [blame] | 1439 | // This requires 4-byte alignment. |
| 1440 | if ((Align & 3) != 0) |
Dan Gohman | 475871a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 1441 | return SDValue(); |
Dan Gohman | 707e018 | 2008-04-12 04:36:06 +0000 | [diff] [blame] | 1442 | // This requires the copy size to be a constant, preferrably |
| 1443 | // within a subtarget-specific limit. |
| 1444 | ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); |
| 1445 | if (!ConstantSize) |
Dan Gohman | 475871a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 1446 | return SDValue(); |
Dan Gohman | f5aeb1a | 2008-09-12 16:56:44 +0000 | [diff] [blame] | 1447 | uint64_t SizeVal = ConstantSize->getZExtValue(); |
Dan Gohman | 707e018 | 2008-04-12 04:36:06 +0000 | [diff] [blame] | 1448 | if (!AlwaysInline && SizeVal > getSubtarget()->getMaxInlineSizeThreshold()) |
Dan Gohman | 475871a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 1449 | return SDValue(); |
Dan Gohman | 707e018 | 2008-04-12 04:36:06 +0000 | [diff] [blame] | 1450 | |
| 1451 | unsigned BytesLeft = SizeVal & 3; |
| 1452 | unsigned NumMemOps = SizeVal >> 2; |
Dale Johannesen | 8dd86c1 | 2007-05-17 21:31:21 +0000 | [diff] [blame] | 1453 | unsigned EmittedNumMemOps = 0; |
Duncan Sands | 83ec4b6 | 2008-06-06 12:08:01 +0000 | [diff] [blame] | 1454 | MVT VT = MVT::i32; |
Dale Johannesen | 8dd86c1 | 2007-05-17 21:31:21 +0000 | [diff] [blame] | 1455 | unsigned VTSize = 4; |
Evan Cheng | 4102eb5 | 2007-10-22 22:11:27 +0000 | [diff] [blame] | 1456 | unsigned i = 0; |
Evan Cheng | e5e7ce4 | 2007-05-18 01:19:57 +0000 | [diff] [blame] | 1457 | const unsigned MAX_LOADS_IN_LDM = 6; |
Dan Gohman | 475871a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 1458 | SDValue TFOps[MAX_LOADS_IN_LDM]; |
| 1459 | SDValue Loads[MAX_LOADS_IN_LDM]; |
Dan Gohman | 1f13c68 | 2008-04-28 17:15:20 +0000 | [diff] [blame] | 1460 | uint64_t SrcOff = 0, DstOff = 0; |
Dale Johannesen | 8dd86c1 | 2007-05-17 21:31:21 +0000 | [diff] [blame] | 1461 | |
Evan Cheng | 4102eb5 | 2007-10-22 22:11:27 +0000 | [diff] [blame] | 1462 | // Emit up to MAX_LOADS_IN_LDM loads, then a TokenFactor barrier, then the |
| 1463 | // same number of stores. The loads and stores will get combined into |
Dale Johannesen | 8dd86c1 | 2007-05-17 21:31:21 +0000 | [diff] [blame] | 1464 | // ldm/stm later on. |
Evan Cheng | 4102eb5 | 2007-10-22 22:11:27 +0000 | [diff] [blame] | 1465 | while (EmittedNumMemOps < NumMemOps) { |
| 1466 | for (i = 0; |
| 1467 | i < MAX_LOADS_IN_LDM && EmittedNumMemOps + i < NumMemOps; ++i) { |
Dale Johannesen | 0f502f6 | 2009-02-03 22:26:09 +0000 | [diff] [blame] | 1468 | Loads[i] = DAG.getLoad(VT, dl, Chain, |
| 1469 | DAG.getNode(ISD::ADD, dl, MVT::i32, Src, |
Evan Cheng | 4102eb5 | 2007-10-22 22:11:27 +0000 | [diff] [blame] | 1470 | DAG.getConstant(SrcOff, MVT::i32)), |
Dan Gohman | 1f13c68 | 2008-04-28 17:15:20 +0000 | [diff] [blame] | 1471 | SrcSV, SrcSVOff + SrcOff); |
Evan Cheng | 4102eb5 | 2007-10-22 22:11:27 +0000 | [diff] [blame] | 1472 | TFOps[i] = Loads[i].getValue(1); |
Dale Johannesen | 8dd86c1 | 2007-05-17 21:31:21 +0000 | [diff] [blame] | 1473 | SrcOff += VTSize; |
| 1474 | } |
Dale Johannesen | 0f502f6 | 2009-02-03 22:26:09 +0000 | [diff] [blame] | 1475 | Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, &TFOps[0], i); |
Dale Johannesen | 8dd86c1 | 2007-05-17 21:31:21 +0000 | [diff] [blame] | 1476 | |
Evan Cheng | 4102eb5 | 2007-10-22 22:11:27 +0000 | [diff] [blame] | 1477 | for (i = 0; |
| 1478 | i < MAX_LOADS_IN_LDM && EmittedNumMemOps + i < NumMemOps; ++i) { |
Dale Johannesen | 0f502f6 | 2009-02-03 22:26:09 +0000 | [diff] [blame] | 1479 | TFOps[i] = DAG.getStore(Chain, dl, Loads[i], |
Bob Wilson | 2dc4f54 | 2009-03-20 22:42:55 +0000 | [diff] [blame] | 1480 | DAG.getNode(ISD::ADD, dl, MVT::i32, Dst, |
Evan Cheng | 4102eb5 | 2007-10-22 22:11:27 +0000 | [diff] [blame] | 1481 | DAG.getConstant(DstOff, MVT::i32)), |
Dan Gohman | 1f13c68 | 2008-04-28 17:15:20 +0000 | [diff] [blame] | 1482 | DstSV, DstSVOff + DstOff); |
Dale Johannesen | 8dd86c1 | 2007-05-17 21:31:21 +0000 | [diff] [blame] | 1483 | DstOff += VTSize; |
| 1484 | } |
Dale Johannesen | 0f502f6 | 2009-02-03 22:26:09 +0000 | [diff] [blame] | 1485 | Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, &TFOps[0], i); |
Evan Cheng | 4102eb5 | 2007-10-22 22:11:27 +0000 | [diff] [blame] | 1486 | |
Dale Johannesen | 8dd86c1 | 2007-05-17 21:31:21 +0000 | [diff] [blame] | 1487 | EmittedNumMemOps += i; |
| 1488 | } |
| 1489 | |
Bob Wilson | 2dc4f54 | 2009-03-20 22:42:55 +0000 | [diff] [blame] | 1490 | if (BytesLeft == 0) |
Evan Cheng | 4102eb5 | 2007-10-22 22:11:27 +0000 | [diff] [blame] | 1491 | return Chain; |
| 1492 | |
| 1493 | // Issue loads / stores for the trailing (1 - 3) bytes. |
| 1494 | unsigned BytesLeftSave = BytesLeft; |
| 1495 | i = 0; |
| 1496 | while (BytesLeft) { |
| 1497 | if (BytesLeft >= 2) { |
| 1498 | VT = MVT::i16; |
| 1499 | VTSize = 2; |
| 1500 | } else { |
| 1501 | VT = MVT::i8; |
| 1502 | VTSize = 1; |
| 1503 | } |
| 1504 | |
Dale Johannesen | 0f502f6 | 2009-02-03 22:26:09 +0000 | [diff] [blame] | 1505 | Loads[i] = DAG.getLoad(VT, dl, Chain, |
| 1506 | DAG.getNode(ISD::ADD, dl, MVT::i32, Src, |
Evan Cheng | 4102eb5 | 2007-10-22 22:11:27 +0000 | [diff] [blame] | 1507 | DAG.getConstant(SrcOff, MVT::i32)), |
Dan Gohman | 1f13c68 | 2008-04-28 17:15:20 +0000 | [diff] [blame] | 1508 | SrcSV, SrcSVOff + SrcOff); |
Evan Cheng | 4102eb5 | 2007-10-22 22:11:27 +0000 | [diff] [blame] | 1509 | TFOps[i] = Loads[i].getValue(1); |
| 1510 | ++i; |
| 1511 | SrcOff += VTSize; |
| 1512 | BytesLeft -= VTSize; |
| 1513 | } |
Dale Johannesen | 0f502f6 | 2009-02-03 22:26:09 +0000 | [diff] [blame] | 1514 | Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, &TFOps[0], i); |
Evan Cheng | 4102eb5 | 2007-10-22 22:11:27 +0000 | [diff] [blame] | 1515 | |
| 1516 | i = 0; |
| 1517 | BytesLeft = BytesLeftSave; |
| 1518 | while (BytesLeft) { |
| 1519 | if (BytesLeft >= 2) { |
| 1520 | VT = MVT::i16; |
| 1521 | VTSize = 2; |
| 1522 | } else { |
| 1523 | VT = MVT::i8; |
| 1524 | VTSize = 1; |
| 1525 | } |
| 1526 | |
Dale Johannesen | 0f502f6 | 2009-02-03 22:26:09 +0000 | [diff] [blame] | 1527 | TFOps[i] = DAG.getStore(Chain, dl, Loads[i], |
Bob Wilson | 2dc4f54 | 2009-03-20 22:42:55 +0000 | [diff] [blame] | 1528 | DAG.getNode(ISD::ADD, dl, MVT::i32, Dst, |
Evan Cheng | 4102eb5 | 2007-10-22 22:11:27 +0000 | [diff] [blame] | 1529 | DAG.getConstant(DstOff, MVT::i32)), |
Dan Gohman | 1f13c68 | 2008-04-28 17:15:20 +0000 | [diff] [blame] | 1530 | DstSV, DstSVOff + DstOff); |
Evan Cheng | 4102eb5 | 2007-10-22 22:11:27 +0000 | [diff] [blame] | 1531 | ++i; |
| 1532 | DstOff += VTSize; |
| 1533 | BytesLeft -= VTSize; |
| 1534 | } |
Dale Johannesen | 0f502f6 | 2009-02-03 22:26:09 +0000 | [diff] [blame] | 1535 | return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, &TFOps[0], i); |
Dale Johannesen | 8dd86c1 | 2007-05-17 21:31:21 +0000 | [diff] [blame] | 1536 | } |
| 1537 | |
Duncan Sands | 1607f05 | 2008-12-01 11:39:25 +0000 | [diff] [blame] | 1538 | static SDValue ExpandBIT_CONVERT(SDNode *N, SelectionDAG &DAG) { |
Dan Gohman | 475871a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 1539 | SDValue Op = N->getOperand(0); |
Dale Johannesen | de06470 | 2009-02-06 21:50:26 +0000 | [diff] [blame] | 1540 | DebugLoc dl = N->getDebugLoc(); |
Evan Cheng | c7c7729 | 2008-11-04 19:57:48 +0000 | [diff] [blame] | 1541 | if (N->getValueType(0) == MVT::f64) { |
| 1542 | // Turn i64->f64 into FMDRR. |
Dale Johannesen | de06470 | 2009-02-06 21:50:26 +0000 | [diff] [blame] | 1543 | SDValue Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32, Op, |
Evan Cheng | c7c7729 | 2008-11-04 19:57:48 +0000 | [diff] [blame] | 1544 | DAG.getConstant(0, MVT::i32)); |
Dale Johannesen | de06470 | 2009-02-06 21:50:26 +0000 | [diff] [blame] | 1545 | SDValue Hi = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32, Op, |
Evan Cheng | c7c7729 | 2008-11-04 19:57:48 +0000 | [diff] [blame] | 1546 | DAG.getConstant(1, MVT::i32)); |
Dale Johannesen | de06470 | 2009-02-06 21:50:26 +0000 | [diff] [blame] | 1547 | return DAG.getNode(ARMISD::FMDRR, dl, MVT::f64, Lo, Hi); |
Evan Cheng | c7c7729 | 2008-11-04 19:57:48 +0000 | [diff] [blame] | 1548 | } |
Bob Wilson | 2dc4f54 | 2009-03-20 22:42:55 +0000 | [diff] [blame] | 1549 | |
Evan Cheng | c7c7729 | 2008-11-04 19:57:48 +0000 | [diff] [blame] | 1550 | // Turn f64->i64 into FMRRD. |
Bob Wilson | 2dc4f54 | 2009-03-20 22:42:55 +0000 | [diff] [blame] | 1551 | SDValue Cvt = DAG.getNode(ARMISD::FMRRD, dl, |
Dale Johannesen | de06470 | 2009-02-06 21:50:26 +0000 | [diff] [blame] | 1552 | DAG.getVTList(MVT::i32, MVT::i32), &Op, 1); |
Bob Wilson | 2dc4f54 | 2009-03-20 22:42:55 +0000 | [diff] [blame] | 1553 | |
Chris Lattner | 27a6c73 | 2007-11-24 07:07:01 +0000 | [diff] [blame] | 1554 | // Merge the pieces into a single i64 value. |
Dale Johannesen | de06470 | 2009-02-06 21:50:26 +0000 | [diff] [blame] | 1555 | return DAG.getNode(ISD::BUILD_PAIR, dl, MVT::i64, Cvt, Cvt.getValue(1)); |
Chris Lattner | 27a6c73 | 2007-11-24 07:07:01 +0000 | [diff] [blame] | 1556 | } |
| 1557 | |
Duncan Sands | 1607f05 | 2008-12-01 11:39:25 +0000 | [diff] [blame] | 1558 | static SDValue ExpandSRx(SDNode *N, SelectionDAG &DAG, const ARMSubtarget *ST) { |
Chris Lattner | 27a6c73 | 2007-11-24 07:07:01 +0000 | [diff] [blame] | 1559 | assert(N->getValueType(0) == MVT::i64 && |
| 1560 | (N->getOpcode() == ISD::SRL || N->getOpcode() == ISD::SRA) && |
| 1561 | "Unknown shift to lower!"); |
Duncan Sands | 1607f05 | 2008-12-01 11:39:25 +0000 | [diff] [blame] | 1562 | |
Chris Lattner | 27a6c73 | 2007-11-24 07:07:01 +0000 | [diff] [blame] | 1563 | // We only lower SRA, SRL of 1 here, all others use generic lowering. |
| 1564 | if (!isa<ConstantSDNode>(N->getOperand(1)) || |
Dan Gohman | f5aeb1a | 2008-09-12 16:56:44 +0000 | [diff] [blame] | 1565 | cast<ConstantSDNode>(N->getOperand(1))->getZExtValue() != 1) |
Duncan Sands | 1607f05 | 2008-12-01 11:39:25 +0000 | [diff] [blame] | 1566 | return SDValue(); |
Bob Wilson | 2dc4f54 | 2009-03-20 22:42:55 +0000 | [diff] [blame] | 1567 | |
Chris Lattner | 27a6c73 | 2007-11-24 07:07:01 +0000 | [diff] [blame] | 1568 | // If we are in thumb mode, we don't have RRX. |
Duncan Sands | 1607f05 | 2008-12-01 11:39:25 +0000 | [diff] [blame] | 1569 | if (ST->isThumb()) return SDValue(); |
Bob Wilson | 2dc4f54 | 2009-03-20 22:42:55 +0000 | [diff] [blame] | 1570 | |
Chris Lattner | 27a6c73 | 2007-11-24 07:07:01 +0000 | [diff] [blame] | 1571 | // Okay, we have a 64-bit SRA or SRL of 1. Lower this to an RRX expr. |
Dale Johannesen | de06470 | 2009-02-06 21:50:26 +0000 | [diff] [blame] | 1572 | DebugLoc dl = N->getDebugLoc(); |
| 1573 | SDValue Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32, N->getOperand(0), |
Chris Lattner | 27a6c73 | 2007-11-24 07:07:01 +0000 | [diff] [blame] | 1574 | DAG.getConstant(0, MVT::i32)); |
Dale Johannesen | de06470 | 2009-02-06 21:50:26 +0000 | [diff] [blame] | 1575 | SDValue Hi = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32, N->getOperand(0), |
Chris Lattner | 27a6c73 | 2007-11-24 07:07:01 +0000 | [diff] [blame] | 1576 | DAG.getConstant(1, MVT::i32)); |
Bob Wilson | 2dc4f54 | 2009-03-20 22:42:55 +0000 | [diff] [blame] | 1577 | |
Chris Lattner | 27a6c73 | 2007-11-24 07:07:01 +0000 | [diff] [blame] | 1578 | // First, build a SRA_FLAG/SRL_FLAG op, which shifts the top part by one and |
| 1579 | // captures the result into a carry flag. |
| 1580 | unsigned Opc = N->getOpcode() == ISD::SRL ? ARMISD::SRL_FLAG:ARMISD::SRA_FLAG; |
Dale Johannesen | de06470 | 2009-02-06 21:50:26 +0000 | [diff] [blame] | 1581 | Hi = DAG.getNode(Opc, dl, DAG.getVTList(MVT::i32, MVT::Flag), &Hi, 1); |
Bob Wilson | 2dc4f54 | 2009-03-20 22:42:55 +0000 | [diff] [blame] | 1582 | |
Chris Lattner | 27a6c73 | 2007-11-24 07:07:01 +0000 | [diff] [blame] | 1583 | // The low part is an ARMISD::RRX operand, which shifts the carry in. |
Dale Johannesen | de06470 | 2009-02-06 21:50:26 +0000 | [diff] [blame] | 1584 | Lo = DAG.getNode(ARMISD::RRX, dl, MVT::i32, Lo, Hi.getValue(1)); |
Bob Wilson | 2dc4f54 | 2009-03-20 22:42:55 +0000 | [diff] [blame] | 1585 | |
Chris Lattner | 27a6c73 | 2007-11-24 07:07:01 +0000 | [diff] [blame] | 1586 | // Merge the pieces into a single i64 value. |
Dale Johannesen | de06470 | 2009-02-06 21:50:26 +0000 | [diff] [blame] | 1587 | return DAG.getNode(ISD::BUILD_PAIR, dl, MVT::i64, Lo, Hi); |
Chris Lattner | 27a6c73 | 2007-11-24 07:07:01 +0000 | [diff] [blame] | 1588 | } |
| 1589 | |
Dan Gohman | 475871a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 1590 | SDValue ARMTargetLowering::LowerOperation(SDValue Op, SelectionDAG &DAG) { |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 1591 | switch (Op.getOpcode()) { |
| 1592 | default: assert(0 && "Don't know how to custom lower this!"); abort(); |
| 1593 | case ISD::ConstantPool: return LowerConstantPool(Op, DAG); |
Lauro Ramos Venancio | 0ae4a33 | 2007-04-22 00:04:12 +0000 | [diff] [blame] | 1594 | case ISD::GlobalAddress: |
| 1595 | return Subtarget->isTargetDarwin() ? LowerGlobalAddressDarwin(Op, DAG) : |
| 1596 | LowerGlobalAddressELF(Op, DAG); |
Lauro Ramos Venancio | 64f4fa5 | 2007-04-27 13:54:47 +0000 | [diff] [blame] | 1597 | case ISD::GlobalTLSAddress: return LowerGlobalTLSAddress(Op, DAG); |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 1598 | case ISD::CALL: return LowerCALL(Op, DAG); |
| 1599 | case ISD::RET: return LowerRET(Op, DAG); |
| 1600 | case ISD::SELECT_CC: return LowerSELECT_CC(Op, DAG, Subtarget); |
| 1601 | case ISD::BR_CC: return LowerBR_CC(Op, DAG, Subtarget); |
| 1602 | case ISD::BR_JT: return LowerBR_JT(Op, DAG); |
| 1603 | case ISD::VASTART: return LowerVASTART(Op, DAG, VarArgsFrameIndex); |
| 1604 | case ISD::SINT_TO_FP: |
| 1605 | case ISD::UINT_TO_FP: return LowerINT_TO_FP(Op, DAG); |
| 1606 | case ISD::FP_TO_SINT: |
| 1607 | case ISD::FP_TO_UINT: return LowerFP_TO_INT(Op, DAG); |
| 1608 | case ISD::FCOPYSIGN: return LowerFCOPYSIGN(Op, DAG); |
Chris Lattner | 27a6c73 | 2007-11-24 07:07:01 +0000 | [diff] [blame] | 1609 | case ISD::FORMAL_ARGUMENTS: return LowerFORMAL_ARGUMENTS(Op, DAG); |
Nate Begeman | bcc5f36 | 2007-01-29 22:58:52 +0000 | [diff] [blame] | 1610 | case ISD::RETURNADDR: break; |
| 1611 | case ISD::FRAMEADDR: break; |
Lauro Ramos Venancio | 0ae4a33 | 2007-04-22 00:04:12 +0000 | [diff] [blame] | 1612 | case ISD::GLOBAL_OFFSET_TABLE: return LowerGLOBAL_OFFSET_TABLE(Op, DAG); |
Lauro Ramos Venancio | e0cb36b | 2007-11-08 17:20:05 +0000 | [diff] [blame] | 1613 | case ISD::INTRINSIC_WO_CHAIN: return LowerINTRINSIC_WO_CHAIN(Op, DAG); |
Duncan Sands | 1607f05 | 2008-12-01 11:39:25 +0000 | [diff] [blame] | 1614 | case ISD::BIT_CONVERT: return ExpandBIT_CONVERT(Op.getNode(), DAG); |
Chris Lattner | 27a6c73 | 2007-11-24 07:07:01 +0000 | [diff] [blame] | 1615 | case ISD::SRL: |
Duncan Sands | 1607f05 | 2008-12-01 11:39:25 +0000 | [diff] [blame] | 1616 | case ISD::SRA: return ExpandSRx(Op.getNode(), DAG,Subtarget); |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 1617 | } |
Dan Gohman | 475871a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 1618 | return SDValue(); |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 1619 | } |
| 1620 | |
Duncan Sands | 1607f05 | 2008-12-01 11:39:25 +0000 | [diff] [blame] | 1621 | /// ReplaceNodeResults - Replace the results of node with an illegal result |
| 1622 | /// type with new values built out of custom code. |
Duncan Sands | 1607f05 | 2008-12-01 11:39:25 +0000 | [diff] [blame] | 1623 | void ARMTargetLowering::ReplaceNodeResults(SDNode *N, |
| 1624 | SmallVectorImpl<SDValue>&Results, |
| 1625 | SelectionDAG &DAG) { |
Chris Lattner | 27a6c73 | 2007-11-24 07:07:01 +0000 | [diff] [blame] | 1626 | switch (N->getOpcode()) { |
Duncan Sands | 1607f05 | 2008-12-01 11:39:25 +0000 | [diff] [blame] | 1627 | default: |
| 1628 | assert(0 && "Don't know how to custom expand this!"); |
| 1629 | return; |
| 1630 | case ISD::BIT_CONVERT: |
| 1631 | Results.push_back(ExpandBIT_CONVERT(N, DAG)); |
| 1632 | return; |
Chris Lattner | 27a6c73 | 2007-11-24 07:07:01 +0000 | [diff] [blame] | 1633 | case ISD::SRL: |
Duncan Sands | 1607f05 | 2008-12-01 11:39:25 +0000 | [diff] [blame] | 1634 | case ISD::SRA: { |
| 1635 | SDValue Res = ExpandSRx(N, DAG, Subtarget); |
| 1636 | if (Res.getNode()) |
| 1637 | Results.push_back(Res); |
| 1638 | return; |
| 1639 | } |
Chris Lattner | 27a6c73 | 2007-11-24 07:07:01 +0000 | [diff] [blame] | 1640 | } |
| 1641 | } |
Chris Lattner | 27a6c73 | 2007-11-24 07:07:01 +0000 | [diff] [blame] | 1642 | |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 1643 | //===----------------------------------------------------------------------===// |
| 1644 | // ARM Scheduler Hooks |
| 1645 | //===----------------------------------------------------------------------===// |
| 1646 | |
| 1647 | MachineBasicBlock * |
Evan Cheng | ff9b373 | 2008-01-30 18:18:23 +0000 | [diff] [blame] | 1648 | ARMTargetLowering::EmitInstrWithCustomInserter(MachineInstr *MI, |
Dan Gohman | 1fdbc1d | 2009-02-07 16:15:20 +0000 | [diff] [blame] | 1649 | MachineBasicBlock *BB) const { |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 1650 | const TargetInstrInfo *TII = getTargetMachine().getInstrInfo(); |
Dale Johannesen | b672840 | 2009-02-13 02:25:56 +0000 | [diff] [blame] | 1651 | DebugLoc dl = MI->getDebugLoc(); |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 1652 | switch (MI->getOpcode()) { |
| 1653 | default: assert(false && "Unexpected instr type to insert"); |
| 1654 | case ARM::tMOVCCr: { |
| 1655 | // To "insert" a SELECT_CC instruction, we actually have to insert the |
| 1656 | // diamond control-flow pattern. The incoming instruction knows the |
| 1657 | // destination vreg to set, the condition code register to branch on, the |
| 1658 | // true/false values to select between, and a branch opcode to use. |
| 1659 | const BasicBlock *LLVM_BB = BB->getBasicBlock(); |
Dan Gohman | 8e5f2c6 | 2008-07-07 23:14:23 +0000 | [diff] [blame] | 1660 | MachineFunction::iterator It = BB; |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 1661 | ++It; |
| 1662 | |
| 1663 | // thisMBB: |
| 1664 | // ... |
| 1665 | // TrueVal = ... |
| 1666 | // cmpTY ccX, r1, r2 |
| 1667 | // bCC copy1MBB |
| 1668 | // fallthrough --> copy0MBB |
| 1669 | MachineBasicBlock *thisMBB = BB; |
Dan Gohman | 8e5f2c6 | 2008-07-07 23:14:23 +0000 | [diff] [blame] | 1670 | MachineFunction *F = BB->getParent(); |
| 1671 | MachineBasicBlock *copy0MBB = F->CreateMachineBasicBlock(LLVM_BB); |
| 1672 | MachineBasicBlock *sinkMBB = F->CreateMachineBasicBlock(LLVM_BB); |
Dale Johannesen | b672840 | 2009-02-13 02:25:56 +0000 | [diff] [blame] | 1673 | BuildMI(BB, dl, TII->get(ARM::tBcc)).addMBB(sinkMBB) |
Evan Cheng | 0e1d379 | 2007-07-05 07:18:20 +0000 | [diff] [blame] | 1674 | .addImm(MI->getOperand(3).getImm()).addReg(MI->getOperand(4).getReg()); |
Dan Gohman | 8e5f2c6 | 2008-07-07 23:14:23 +0000 | [diff] [blame] | 1675 | F->insert(It, copy0MBB); |
| 1676 | F->insert(It, sinkMBB); |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 1677 | // Update machine-CFG edges by first adding all successors of the current |
| 1678 | // block to the new block which will contain the Phi node for the select. |
| 1679 | for(MachineBasicBlock::succ_iterator i = BB->succ_begin(), |
| 1680 | e = BB->succ_end(); i != e; ++i) |
| 1681 | sinkMBB->addSuccessor(*i); |
| 1682 | // Next, remove all successors of the current block, and add the true |
| 1683 | // and fallthrough blocks as its successors. |
| 1684 | while(!BB->succ_empty()) |
| 1685 | BB->removeSuccessor(BB->succ_begin()); |
| 1686 | BB->addSuccessor(copy0MBB); |
| 1687 | BB->addSuccessor(sinkMBB); |
| 1688 | |
| 1689 | // copy0MBB: |
| 1690 | // %FalseValue = ... |
| 1691 | // # fallthrough to sinkMBB |
| 1692 | BB = copy0MBB; |
| 1693 | |
| 1694 | // Update machine-CFG edges |
| 1695 | BB->addSuccessor(sinkMBB); |
| 1696 | |
| 1697 | // sinkMBB: |
| 1698 | // %Result = phi [ %FalseValue, copy0MBB ], [ %TrueValue, thisMBB ] |
| 1699 | // ... |
| 1700 | BB = sinkMBB; |
Dale Johannesen | b672840 | 2009-02-13 02:25:56 +0000 | [diff] [blame] | 1701 | BuildMI(BB, dl, TII->get(ARM::PHI), MI->getOperand(0).getReg()) |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 1702 | .addReg(MI->getOperand(1).getReg()).addMBB(copy0MBB) |
| 1703 | .addReg(MI->getOperand(2).getReg()).addMBB(thisMBB); |
| 1704 | |
Dan Gohman | 8e5f2c6 | 2008-07-07 23:14:23 +0000 | [diff] [blame] | 1705 | F->DeleteMachineInstr(MI); // The pseudo instruction is gone now. |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 1706 | return BB; |
| 1707 | } |
| 1708 | } |
| 1709 | } |
| 1710 | |
| 1711 | //===----------------------------------------------------------------------===// |
| 1712 | // ARM Optimization Hooks |
| 1713 | //===----------------------------------------------------------------------===// |
| 1714 | |
Chris Lattner | d1980a5 | 2009-03-12 06:52:53 +0000 | [diff] [blame] | 1715 | static |
| 1716 | SDValue combineSelectAndUse(SDNode *N, SDValue Slct, SDValue OtherOp, |
| 1717 | TargetLowering::DAGCombinerInfo &DCI) { |
Chris Lattner | d1980a5 | 2009-03-12 06:52:53 +0000 | [diff] [blame] | 1718 | SelectionDAG &DAG = DCI.DAG; |
| 1719 | const TargetLowering &TLI = DAG.getTargetLoweringInfo(); |
| 1720 | MVT VT = N->getValueType(0); |
| 1721 | unsigned Opc = N->getOpcode(); |
| 1722 | bool isSlctCC = Slct.getOpcode() == ISD::SELECT_CC; |
| 1723 | SDValue LHS = isSlctCC ? Slct.getOperand(2) : Slct.getOperand(1); |
| 1724 | SDValue RHS = isSlctCC ? Slct.getOperand(3) : Slct.getOperand(2); |
| 1725 | ISD::CondCode CC = ISD::SETCC_INVALID; |
| 1726 | |
| 1727 | if (isSlctCC) { |
| 1728 | CC = cast<CondCodeSDNode>(Slct.getOperand(4))->get(); |
| 1729 | } else { |
| 1730 | SDValue CCOp = Slct.getOperand(0); |
| 1731 | if (CCOp.getOpcode() == ISD::SETCC) |
| 1732 | CC = cast<CondCodeSDNode>(CCOp.getOperand(2))->get(); |
| 1733 | } |
| 1734 | |
| 1735 | bool DoXform = false; |
| 1736 | bool InvCC = false; |
| 1737 | assert ((Opc == ISD::ADD || (Opc == ISD::SUB && Slct == N->getOperand(1))) && |
| 1738 | "Bad input!"); |
| 1739 | |
| 1740 | if (LHS.getOpcode() == ISD::Constant && |
| 1741 | cast<ConstantSDNode>(LHS)->isNullValue()) { |
| 1742 | DoXform = true; |
| 1743 | } else if (CC != ISD::SETCC_INVALID && |
| 1744 | RHS.getOpcode() == ISD::Constant && |
| 1745 | cast<ConstantSDNode>(RHS)->isNullValue()) { |
| 1746 | std::swap(LHS, RHS); |
| 1747 | SDValue Op0 = Slct.getOperand(0); |
| 1748 | MVT OpVT = isSlctCC ? Op0.getValueType() : |
| 1749 | Op0.getOperand(0).getValueType(); |
| 1750 | bool isInt = OpVT.isInteger(); |
| 1751 | CC = ISD::getSetCCInverse(CC, isInt); |
| 1752 | |
| 1753 | if (!TLI.isCondCodeLegal(CC, OpVT)) |
| 1754 | return SDValue(); // Inverse operator isn't legal. |
| 1755 | |
| 1756 | DoXform = true; |
| 1757 | InvCC = true; |
| 1758 | } |
| 1759 | |
| 1760 | if (DoXform) { |
| 1761 | SDValue Result = DAG.getNode(Opc, RHS.getDebugLoc(), VT, OtherOp, RHS); |
| 1762 | if (isSlctCC) |
| 1763 | return DAG.getSelectCC(N->getDebugLoc(), OtherOp, Result, |
| 1764 | Slct.getOperand(0), Slct.getOperand(1), CC); |
| 1765 | SDValue CCOp = Slct.getOperand(0); |
| 1766 | if (InvCC) |
| 1767 | CCOp = DAG.getSetCC(Slct.getDebugLoc(), CCOp.getValueType(), |
| 1768 | CCOp.getOperand(0), CCOp.getOperand(1), CC); |
| 1769 | return DAG.getNode(ISD::SELECT, N->getDebugLoc(), VT, |
| 1770 | CCOp, OtherOp, Result); |
| 1771 | } |
| 1772 | return SDValue(); |
| 1773 | } |
| 1774 | |
| 1775 | /// PerformADDCombine - Target-specific dag combine xforms for ISD::ADD. |
| 1776 | static SDValue PerformADDCombine(SDNode *N, |
| 1777 | TargetLowering::DAGCombinerInfo &DCI) { |
| 1778 | // added by evan in r37685 with no testcase. |
| 1779 | SDValue N0 = N->getOperand(0), N1 = N->getOperand(1); |
Bob Wilson | 2dc4f54 | 2009-03-20 22:42:55 +0000 | [diff] [blame] | 1780 | |
Chris Lattner | d1980a5 | 2009-03-12 06:52:53 +0000 | [diff] [blame] | 1781 | // fold (add (select cc, 0, c), x) -> (select cc, x, (add, x, c)) |
| 1782 | if (N0.getOpcode() == ISD::SELECT && N0.getNode()->hasOneUse()) { |
| 1783 | SDValue Result = combineSelectAndUse(N, N0, N1, DCI); |
| 1784 | if (Result.getNode()) return Result; |
| 1785 | } |
| 1786 | if (N1.getOpcode() == ISD::SELECT && N1.getNode()->hasOneUse()) { |
| 1787 | SDValue Result = combineSelectAndUse(N, N1, N0, DCI); |
| 1788 | if (Result.getNode()) return Result; |
| 1789 | } |
Bob Wilson | 2dc4f54 | 2009-03-20 22:42:55 +0000 | [diff] [blame] | 1790 | |
Chris Lattner | d1980a5 | 2009-03-12 06:52:53 +0000 | [diff] [blame] | 1791 | return SDValue(); |
| 1792 | } |
| 1793 | |
| 1794 | /// PerformSUBCombine - Target-specific dag combine xforms for ISD::SUB. |
| 1795 | static SDValue PerformSUBCombine(SDNode *N, |
| 1796 | TargetLowering::DAGCombinerInfo &DCI) { |
| 1797 | // added by evan in r37685 with no testcase. |
| 1798 | SDValue N0 = N->getOperand(0), N1 = N->getOperand(1); |
Bob Wilson | 2dc4f54 | 2009-03-20 22:42:55 +0000 | [diff] [blame] | 1799 | |
Chris Lattner | d1980a5 | 2009-03-12 06:52:53 +0000 | [diff] [blame] | 1800 | // fold (sub x, (select cc, 0, c)) -> (select cc, x, (sub, x, c)) |
| 1801 | if (N1.getOpcode() == ISD::SELECT && N1.getNode()->hasOneUse()) { |
| 1802 | SDValue Result = combineSelectAndUse(N, N1, N0, DCI); |
| 1803 | if (Result.getNode()) return Result; |
| 1804 | } |
Bob Wilson | 2dc4f54 | 2009-03-20 22:42:55 +0000 | [diff] [blame] | 1805 | |
Chris Lattner | d1980a5 | 2009-03-12 06:52:53 +0000 | [diff] [blame] | 1806 | return SDValue(); |
| 1807 | } |
| 1808 | |
| 1809 | |
Chris Lattner | f1b1c5e | 2007-11-27 22:36:16 +0000 | [diff] [blame] | 1810 | /// PerformFMRRDCombine - Target-specific dag combine xforms for ARMISD::FMRRD. |
Bob Wilson | 2dc4f54 | 2009-03-20 22:42:55 +0000 | [diff] [blame] | 1811 | static SDValue PerformFMRRDCombine(SDNode *N, |
| 1812 | TargetLowering::DAGCombinerInfo &DCI) { |
Chris Lattner | f1b1c5e | 2007-11-27 22:36:16 +0000 | [diff] [blame] | 1813 | // fmrrd(fmdrr x, y) -> x,y |
Dan Gohman | 475871a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 1814 | SDValue InDouble = N->getOperand(0); |
Chris Lattner | f1b1c5e | 2007-11-27 22:36:16 +0000 | [diff] [blame] | 1815 | if (InDouble.getOpcode() == ARMISD::FMDRR) |
| 1816 | return DCI.CombineTo(N, InDouble.getOperand(0), InDouble.getOperand(1)); |
Dan Gohman | 475871a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 1817 | return SDValue(); |
Chris Lattner | f1b1c5e | 2007-11-27 22:36:16 +0000 | [diff] [blame] | 1818 | } |
| 1819 | |
Dan Gohman | 475871a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 1820 | SDValue ARMTargetLowering::PerformDAGCombine(SDNode *N, |
Bob Wilson | 2dc4f54 | 2009-03-20 22:42:55 +0000 | [diff] [blame] | 1821 | DAGCombinerInfo &DCI) const { |
Chris Lattner | f1b1c5e | 2007-11-27 22:36:16 +0000 | [diff] [blame] | 1822 | switch (N->getOpcode()) { |
| 1823 | default: break; |
Chris Lattner | d1980a5 | 2009-03-12 06:52:53 +0000 | [diff] [blame] | 1824 | case ISD::ADD: return PerformADDCombine(N, DCI); |
| 1825 | case ISD::SUB: return PerformSUBCombine(N, DCI); |
Chris Lattner | f1b1c5e | 2007-11-27 22:36:16 +0000 | [diff] [blame] | 1826 | case ARMISD::FMRRD: return PerformFMRRDCombine(N, DCI); |
| 1827 | } |
Bob Wilson | 2dc4f54 | 2009-03-20 22:42:55 +0000 | [diff] [blame] | 1828 | |
Dan Gohman | 475871a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 1829 | return SDValue(); |
Chris Lattner | f1b1c5e | 2007-11-27 22:36:16 +0000 | [diff] [blame] | 1830 | } |
| 1831 | |
Evan Cheng | b01fad6 | 2007-03-12 23:30:29 +0000 | [diff] [blame] | 1832 | /// isLegalAddressImmediate - Return true if the integer value can be used |
| 1833 | /// as the offset of the target addressing mode for load / store of the |
| 1834 | /// given type. |
Duncan Sands | 83ec4b6 | 2008-06-06 12:08:01 +0000 | [diff] [blame] | 1835 | static bool isLegalAddressImmediate(int64_t V, MVT VT, |
Chris Lattner | 37caf8c | 2007-04-09 23:33:39 +0000 | [diff] [blame] | 1836 | const ARMSubtarget *Subtarget) { |
Evan Cheng | 961f879 | 2007-03-13 20:37:59 +0000 | [diff] [blame] | 1837 | if (V == 0) |
| 1838 | return true; |
| 1839 | |
Evan Cheng | 6501153 | 2009-03-09 19:15:00 +0000 | [diff] [blame] | 1840 | if (!VT.isSimple()) |
| 1841 | return false; |
| 1842 | |
Evan Cheng | b01fad6 | 2007-03-12 23:30:29 +0000 | [diff] [blame] | 1843 | if (Subtarget->isThumb()) { |
| 1844 | if (V < 0) |
| 1845 | return false; |
| 1846 | |
| 1847 | unsigned Scale = 1; |
Duncan Sands | 83ec4b6 | 2008-06-06 12:08:01 +0000 | [diff] [blame] | 1848 | switch (VT.getSimpleVT()) { |
Evan Cheng | b01fad6 | 2007-03-12 23:30:29 +0000 | [diff] [blame] | 1849 | default: return false; |
| 1850 | case MVT::i1: |
| 1851 | case MVT::i8: |
| 1852 | // Scale == 1; |
| 1853 | break; |
| 1854 | case MVT::i16: |
| 1855 | // Scale == 2; |
| 1856 | Scale = 2; |
| 1857 | break; |
| 1858 | case MVT::i32: |
| 1859 | // Scale == 4; |
| 1860 | Scale = 4; |
| 1861 | break; |
| 1862 | } |
| 1863 | |
| 1864 | if ((V & (Scale - 1)) != 0) |
| 1865 | return false; |
| 1866 | V /= Scale; |
Anton Korobeynikov | 7c1c261 | 2008-02-20 11:22:39 +0000 | [diff] [blame] | 1867 | return V == (V & ((1LL << 5) - 1)); |
Evan Cheng | b01fad6 | 2007-03-12 23:30:29 +0000 | [diff] [blame] | 1868 | } |
| 1869 | |
| 1870 | if (V < 0) |
| 1871 | V = - V; |
Duncan Sands | 83ec4b6 | 2008-06-06 12:08:01 +0000 | [diff] [blame] | 1872 | switch (VT.getSimpleVT()) { |
Evan Cheng | b01fad6 | 2007-03-12 23:30:29 +0000 | [diff] [blame] | 1873 | default: return false; |
| 1874 | case MVT::i1: |
| 1875 | case MVT::i8: |
| 1876 | case MVT::i32: |
| 1877 | // +- imm12 |
Anton Korobeynikov | 7c1c261 | 2008-02-20 11:22:39 +0000 | [diff] [blame] | 1878 | return V == (V & ((1LL << 12) - 1)); |
Evan Cheng | b01fad6 | 2007-03-12 23:30:29 +0000 | [diff] [blame] | 1879 | case MVT::i16: |
| 1880 | // +- imm8 |
Anton Korobeynikov | 7c1c261 | 2008-02-20 11:22:39 +0000 | [diff] [blame] | 1881 | return V == (V & ((1LL << 8) - 1)); |
Evan Cheng | b01fad6 | 2007-03-12 23:30:29 +0000 | [diff] [blame] | 1882 | case MVT::f32: |
| 1883 | case MVT::f64: |
| 1884 | if (!Subtarget->hasVFP2()) |
| 1885 | return false; |
Evan Cheng | 0b0a9a9 | 2007-05-03 02:00:18 +0000 | [diff] [blame] | 1886 | if ((V & 3) != 0) |
Evan Cheng | b01fad6 | 2007-03-12 23:30:29 +0000 | [diff] [blame] | 1887 | return false; |
| 1888 | V >>= 2; |
Anton Korobeynikov | 7c1c261 | 2008-02-20 11:22:39 +0000 | [diff] [blame] | 1889 | return V == (V & ((1LL << 8) - 1)); |
Evan Cheng | b01fad6 | 2007-03-12 23:30:29 +0000 | [diff] [blame] | 1890 | } |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 1891 | } |
| 1892 | |
Chris Lattner | 37caf8c | 2007-04-09 23:33:39 +0000 | [diff] [blame] | 1893 | /// isLegalAddressingMode - Return true if the addressing mode represented |
| 1894 | /// by AM is legal for this target, for a load/store of the specified type. |
Bob Wilson | 2dc4f54 | 2009-03-20 22:42:55 +0000 | [diff] [blame] | 1895 | bool ARMTargetLowering::isLegalAddressingMode(const AddrMode &AM, |
Chris Lattner | 37caf8c | 2007-04-09 23:33:39 +0000 | [diff] [blame] | 1896 | const Type *Ty) const { |
Bob Wilson | 2c7dab1 | 2009-04-08 17:55:28 +0000 | [diff] [blame] | 1897 | MVT VT = getValueType(Ty, true); |
| 1898 | if (!isLegalAddressImmediate(AM.BaseOffs, VT, Subtarget)) |
Evan Cheng | b01fad6 | 2007-03-12 23:30:29 +0000 | [diff] [blame] | 1899 | return false; |
Bob Wilson | 2dc4f54 | 2009-03-20 22:42:55 +0000 | [diff] [blame] | 1900 | |
Chris Lattner | 37caf8c | 2007-04-09 23:33:39 +0000 | [diff] [blame] | 1901 | // Can never fold addr of global into load/store. |
Bob Wilson | 2dc4f54 | 2009-03-20 22:42:55 +0000 | [diff] [blame] | 1902 | if (AM.BaseGV) |
Chris Lattner | 37caf8c | 2007-04-09 23:33:39 +0000 | [diff] [blame] | 1903 | return false; |
Bob Wilson | 2dc4f54 | 2009-03-20 22:42:55 +0000 | [diff] [blame] | 1904 | |
Chris Lattner | 37caf8c | 2007-04-09 23:33:39 +0000 | [diff] [blame] | 1905 | switch (AM.Scale) { |
| 1906 | case 0: // no scale reg, must be "r+i" or "r", or "i". |
| 1907 | break; |
| 1908 | case 1: |
| 1909 | if (Subtarget->isThumb()) |
| 1910 | return false; |
Chris Lattner | 5a3d40d | 2007-04-13 06:50:55 +0000 | [diff] [blame] | 1911 | // FALL THROUGH. |
Chris Lattner | 37caf8c | 2007-04-09 23:33:39 +0000 | [diff] [blame] | 1912 | default: |
Chris Lattner | 5a3d40d | 2007-04-13 06:50:55 +0000 | [diff] [blame] | 1913 | // ARM doesn't support any R+R*scale+imm addr modes. |
| 1914 | if (AM.BaseOffs) |
| 1915 | return false; |
Bob Wilson | 2dc4f54 | 2009-03-20 22:42:55 +0000 | [diff] [blame] | 1916 | |
Bob Wilson | 2c7dab1 | 2009-04-08 17:55:28 +0000 | [diff] [blame] | 1917 | if (!VT.isSimple()) |
| 1918 | return false; |
| 1919 | |
Chris Lattner | eb13d1b | 2007-04-10 03:48:29 +0000 | [diff] [blame] | 1920 | int Scale = AM.Scale; |
Bob Wilson | 2c7dab1 | 2009-04-08 17:55:28 +0000 | [diff] [blame] | 1921 | switch (VT.getSimpleVT()) { |
Chris Lattner | 37caf8c | 2007-04-09 23:33:39 +0000 | [diff] [blame] | 1922 | default: return false; |
| 1923 | case MVT::i1: |
| 1924 | case MVT::i8: |
| 1925 | case MVT::i32: |
| 1926 | case MVT::i64: |
| 1927 | // This assumes i64 is legalized to a pair of i32. If not (i.e. |
| 1928 | // ldrd / strd are used, then its address mode is same as i16. |
| 1929 | // r + r |
Chris Lattner | eb13d1b | 2007-04-10 03:48:29 +0000 | [diff] [blame] | 1930 | if (Scale < 0) Scale = -Scale; |
| 1931 | if (Scale == 1) |
Chris Lattner | 37caf8c | 2007-04-09 23:33:39 +0000 | [diff] [blame] | 1932 | return true; |
| 1933 | // r + r << imm |
Chris Lattner | e115294 | 2007-04-11 16:17:12 +0000 | [diff] [blame] | 1934 | return isPowerOf2_32(Scale & ~1); |
Chris Lattner | 37caf8c | 2007-04-09 23:33:39 +0000 | [diff] [blame] | 1935 | case MVT::i16: |
| 1936 | // r + r |
Chris Lattner | eb13d1b | 2007-04-10 03:48:29 +0000 | [diff] [blame] | 1937 | if (((unsigned)AM.HasBaseReg + Scale) <= 2) |
Chris Lattner | 37caf8c | 2007-04-09 23:33:39 +0000 | [diff] [blame] | 1938 | return true; |
Chris Lattner | e115294 | 2007-04-11 16:17:12 +0000 | [diff] [blame] | 1939 | return false; |
Bob Wilson | 2dc4f54 | 2009-03-20 22:42:55 +0000 | [diff] [blame] | 1940 | |
Chris Lattner | 37caf8c | 2007-04-09 23:33:39 +0000 | [diff] [blame] | 1941 | case MVT::isVoid: |
| 1942 | // Note, we allow "void" uses (basically, uses that aren't loads or |
| 1943 | // stores), because arm allows folding a scale into many arithmetic |
| 1944 | // operations. This should be made more precise and revisited later. |
Bob Wilson | 2dc4f54 | 2009-03-20 22:42:55 +0000 | [diff] [blame] | 1945 | |
Chris Lattner | 37caf8c | 2007-04-09 23:33:39 +0000 | [diff] [blame] | 1946 | // Allow r << imm, but the imm has to be a multiple of two. |
| 1947 | if (AM.Scale & 1) return false; |
| 1948 | return isPowerOf2_32(AM.Scale); |
| 1949 | } |
| 1950 | break; |
Evan Cheng | b01fad6 | 2007-03-12 23:30:29 +0000 | [diff] [blame] | 1951 | } |
Chris Lattner | 37caf8c | 2007-04-09 23:33:39 +0000 | [diff] [blame] | 1952 | return true; |
Evan Cheng | b01fad6 | 2007-03-12 23:30:29 +0000 | [diff] [blame] | 1953 | } |
| 1954 | |
Duncan Sands | 83ec4b6 | 2008-06-06 12:08:01 +0000 | [diff] [blame] | 1955 | static bool getIndexedAddressParts(SDNode *Ptr, MVT VT, |
Dan Gohman | 475871a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 1956 | bool isSEXTLoad, SDValue &Base, |
| 1957 | SDValue &Offset, bool &isInc, |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 1958 | SelectionDAG &DAG) { |
| 1959 | if (Ptr->getOpcode() != ISD::ADD && Ptr->getOpcode() != ISD::SUB) |
| 1960 | return false; |
| 1961 | |
| 1962 | if (VT == MVT::i16 || ((VT == MVT::i8 || VT == MVT::i1) && isSEXTLoad)) { |
| 1963 | // AddressingMode 3 |
| 1964 | Base = Ptr->getOperand(0); |
| 1965 | if (ConstantSDNode *RHS = dyn_cast<ConstantSDNode>(Ptr->getOperand(1))) { |
Dan Gohman | f5aeb1a | 2008-09-12 16:56:44 +0000 | [diff] [blame] | 1966 | int RHSC = (int)RHS->getZExtValue(); |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 1967 | if (RHSC < 0 && RHSC > -256) { |
| 1968 | isInc = false; |
| 1969 | Offset = DAG.getConstant(-RHSC, RHS->getValueType(0)); |
| 1970 | return true; |
| 1971 | } |
| 1972 | } |
| 1973 | isInc = (Ptr->getOpcode() == ISD::ADD); |
| 1974 | Offset = Ptr->getOperand(1); |
| 1975 | return true; |
| 1976 | } else if (VT == MVT::i32 || VT == MVT::i8 || VT == MVT::i1) { |
| 1977 | // AddressingMode 2 |
| 1978 | if (ConstantSDNode *RHS = dyn_cast<ConstantSDNode>(Ptr->getOperand(1))) { |
Dan Gohman | f5aeb1a | 2008-09-12 16:56:44 +0000 | [diff] [blame] | 1979 | int RHSC = (int)RHS->getZExtValue(); |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 1980 | if (RHSC < 0 && RHSC > -0x1000) { |
| 1981 | isInc = false; |
| 1982 | Offset = DAG.getConstant(-RHSC, RHS->getValueType(0)); |
| 1983 | Base = Ptr->getOperand(0); |
| 1984 | return true; |
| 1985 | } |
| 1986 | } |
| 1987 | |
| 1988 | if (Ptr->getOpcode() == ISD::ADD) { |
| 1989 | isInc = true; |
| 1990 | ARM_AM::ShiftOpc ShOpcVal= ARM_AM::getShiftOpcForNode(Ptr->getOperand(0)); |
| 1991 | if (ShOpcVal != ARM_AM::no_shift) { |
| 1992 | Base = Ptr->getOperand(1); |
| 1993 | Offset = Ptr->getOperand(0); |
| 1994 | } else { |
| 1995 | Base = Ptr->getOperand(0); |
| 1996 | Offset = Ptr->getOperand(1); |
| 1997 | } |
| 1998 | return true; |
| 1999 | } |
| 2000 | |
| 2001 | isInc = (Ptr->getOpcode() == ISD::ADD); |
| 2002 | Base = Ptr->getOperand(0); |
| 2003 | Offset = Ptr->getOperand(1); |
| 2004 | return true; |
| 2005 | } |
| 2006 | |
| 2007 | // FIXME: Use FLDM / FSTM to emulate indexed FP load / store. |
| 2008 | return false; |
| 2009 | } |
| 2010 | |
| 2011 | /// getPreIndexedAddressParts - returns true by value, base pointer and |
| 2012 | /// offset pointer and addressing mode by reference if the node's address |
| 2013 | /// can be legally represented as pre-indexed load / store address. |
| 2014 | bool |
Dan Gohman | 475871a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 2015 | ARMTargetLowering::getPreIndexedAddressParts(SDNode *N, SDValue &Base, |
| 2016 | SDValue &Offset, |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 2017 | ISD::MemIndexedMode &AM, |
Dan Gohman | 73e0914 | 2009-01-15 16:29:45 +0000 | [diff] [blame] | 2018 | SelectionDAG &DAG) const { |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 2019 | if (Subtarget->isThumb()) |
| 2020 | return false; |
| 2021 | |
Duncan Sands | 83ec4b6 | 2008-06-06 12:08:01 +0000 | [diff] [blame] | 2022 | MVT VT; |
Dan Gohman | 475871a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 2023 | SDValue Ptr; |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 2024 | bool isSEXTLoad = false; |
| 2025 | if (LoadSDNode *LD = dyn_cast<LoadSDNode>(N)) { |
| 2026 | Ptr = LD->getBasePtr(); |
Dan Gohman | b625f2f | 2008-01-30 00:15:11 +0000 | [diff] [blame] | 2027 | VT = LD->getMemoryVT(); |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 2028 | isSEXTLoad = LD->getExtensionType() == ISD::SEXTLOAD; |
| 2029 | } else if (StoreSDNode *ST = dyn_cast<StoreSDNode>(N)) { |
| 2030 | Ptr = ST->getBasePtr(); |
Dan Gohman | b625f2f | 2008-01-30 00:15:11 +0000 | [diff] [blame] | 2031 | VT = ST->getMemoryVT(); |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 2032 | } else |
| 2033 | return false; |
| 2034 | |
| 2035 | bool isInc; |
Gabor Greif | ba36cb5 | 2008-08-28 21:40:38 +0000 | [diff] [blame] | 2036 | bool isLegal = getIndexedAddressParts(Ptr.getNode(), VT, isSEXTLoad, Base, Offset, |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 2037 | isInc, DAG); |
| 2038 | if (isLegal) { |
| 2039 | AM = isInc ? ISD::PRE_INC : ISD::PRE_DEC; |
| 2040 | return true; |
| 2041 | } |
| 2042 | return false; |
| 2043 | } |
| 2044 | |
| 2045 | /// getPostIndexedAddressParts - returns true by value, base pointer and |
| 2046 | /// offset pointer and addressing mode by reference if this node can be |
| 2047 | /// combined with a load / store to form a post-indexed load / store. |
| 2048 | bool ARMTargetLowering::getPostIndexedAddressParts(SDNode *N, SDNode *Op, |
Dan Gohman | 475871a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 2049 | SDValue &Base, |
| 2050 | SDValue &Offset, |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 2051 | ISD::MemIndexedMode &AM, |
Dan Gohman | 73e0914 | 2009-01-15 16:29:45 +0000 | [diff] [blame] | 2052 | SelectionDAG &DAG) const { |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 2053 | if (Subtarget->isThumb()) |
| 2054 | return false; |
| 2055 | |
Duncan Sands | 83ec4b6 | 2008-06-06 12:08:01 +0000 | [diff] [blame] | 2056 | MVT VT; |
Dan Gohman | 475871a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 2057 | SDValue Ptr; |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 2058 | bool isSEXTLoad = false; |
| 2059 | if (LoadSDNode *LD = dyn_cast<LoadSDNode>(N)) { |
Dan Gohman | b625f2f | 2008-01-30 00:15:11 +0000 | [diff] [blame] | 2060 | VT = LD->getMemoryVT(); |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 2061 | isSEXTLoad = LD->getExtensionType() == ISD::SEXTLOAD; |
| 2062 | } else if (StoreSDNode *ST = dyn_cast<StoreSDNode>(N)) { |
Dan Gohman | b625f2f | 2008-01-30 00:15:11 +0000 | [diff] [blame] | 2063 | VT = ST->getMemoryVT(); |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 2064 | } else |
| 2065 | return false; |
| 2066 | |
| 2067 | bool isInc; |
| 2068 | bool isLegal = getIndexedAddressParts(Op, VT, isSEXTLoad, Base, Offset, |
| 2069 | isInc, DAG); |
| 2070 | if (isLegal) { |
| 2071 | AM = isInc ? ISD::POST_INC : ISD::POST_DEC; |
| 2072 | return true; |
| 2073 | } |
| 2074 | return false; |
| 2075 | } |
| 2076 | |
Dan Gohman | 475871a | 2008-07-27 21:46:04 +0000 | [diff] [blame] | 2077 | void ARMTargetLowering::computeMaskedBitsForTargetNode(const SDValue Op, |
Dan Gohman | 977a76f | 2008-02-13 22:28:48 +0000 | [diff] [blame] | 2078 | const APInt &Mask, |
Bob Wilson | 2dc4f54 | 2009-03-20 22:42:55 +0000 | [diff] [blame] | 2079 | APInt &KnownZero, |
Dan Gohman | fd29e0e | 2008-02-13 00:35:47 +0000 | [diff] [blame] | 2080 | APInt &KnownOne, |
Dan Gohman | ea859be | 2007-06-22 14:59:07 +0000 | [diff] [blame] | 2081 | const SelectionDAG &DAG, |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 2082 | unsigned Depth) const { |
Dan Gohman | fd29e0e | 2008-02-13 00:35:47 +0000 | [diff] [blame] | 2083 | KnownZero = KnownOne = APInt(Mask.getBitWidth(), 0); |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 2084 | switch (Op.getOpcode()) { |
| 2085 | default: break; |
| 2086 | case ARMISD::CMOV: { |
| 2087 | // Bits are known zero/one if known on the LHS and RHS. |
Dan Gohman | ea859be | 2007-06-22 14:59:07 +0000 | [diff] [blame] | 2088 | DAG.ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero, KnownOne, Depth+1); |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 2089 | if (KnownZero == 0 && KnownOne == 0) return; |
| 2090 | |
Dan Gohman | fd29e0e | 2008-02-13 00:35:47 +0000 | [diff] [blame] | 2091 | APInt KnownZeroRHS, KnownOneRHS; |
Dan Gohman | ea859be | 2007-06-22 14:59:07 +0000 | [diff] [blame] | 2092 | DAG.ComputeMaskedBits(Op.getOperand(1), Mask, |
| 2093 | KnownZeroRHS, KnownOneRHS, Depth+1); |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 2094 | KnownZero &= KnownZeroRHS; |
| 2095 | KnownOne &= KnownOneRHS; |
| 2096 | return; |
| 2097 | } |
| 2098 | } |
| 2099 | } |
| 2100 | |
| 2101 | //===----------------------------------------------------------------------===// |
| 2102 | // ARM Inline Assembly Support |
| 2103 | //===----------------------------------------------------------------------===// |
| 2104 | |
| 2105 | /// getConstraintType - Given a constraint letter, return the type of |
| 2106 | /// constraint it is for this target. |
| 2107 | ARMTargetLowering::ConstraintType |
Chris Lattner | 4234f57 | 2007-03-25 02:14:49 +0000 | [diff] [blame] | 2108 | ARMTargetLowering::getConstraintType(const std::string &Constraint) const { |
| 2109 | if (Constraint.size() == 1) { |
| 2110 | switch (Constraint[0]) { |
| 2111 | default: break; |
| 2112 | case 'l': return C_RegisterClass; |
Chris Lattner | c4e3f8e | 2007-04-02 17:24:08 +0000 | [diff] [blame] | 2113 | case 'w': return C_RegisterClass; |
Chris Lattner | 4234f57 | 2007-03-25 02:14:49 +0000 | [diff] [blame] | 2114 | } |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 2115 | } |
Chris Lattner | 4234f57 | 2007-03-25 02:14:49 +0000 | [diff] [blame] | 2116 | return TargetLowering::getConstraintType(Constraint); |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 2117 | } |
| 2118 | |
Bob Wilson | 2dc4f54 | 2009-03-20 22:42:55 +0000 | [diff] [blame] | 2119 | std::pair<unsigned, const TargetRegisterClass*> |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 2120 | ARMTargetLowering::getRegForInlineAsmConstraint(const std::string &Constraint, |
Duncan Sands | 83ec4b6 | 2008-06-06 12:08:01 +0000 | [diff] [blame] | 2121 | MVT VT) const { |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 2122 | if (Constraint.size() == 1) { |
| 2123 | // GCC RS6000 Constraint Letters |
| 2124 | switch (Constraint[0]) { |
Chris Lattner | c4e3f8e | 2007-04-02 17:24:08 +0000 | [diff] [blame] | 2125 | case 'l': |
Jim Grosbach | 30eae3c | 2009-04-07 20:34:09 +0000 | [diff] [blame] | 2126 | if (Subtarget->isThumb()) |
| 2127 | return std::make_pair(0U, ARM::tGPRRegisterClass); |
| 2128 | else |
| 2129 | return std::make_pair(0U, ARM::GPRRegisterClass); |
Chris Lattner | c4e3f8e | 2007-04-02 17:24:08 +0000 | [diff] [blame] | 2130 | case 'r': |
| 2131 | return std::make_pair(0U, ARM::GPRRegisterClass); |
| 2132 | case 'w': |
| 2133 | if (VT == MVT::f32) |
| 2134 | return std::make_pair(0U, ARM::SPRRegisterClass); |
Evan Cheng | 0a7baa2 | 2007-04-04 00:06:07 +0000 | [diff] [blame] | 2135 | if (VT == MVT::f64) |
Chris Lattner | c4e3f8e | 2007-04-02 17:24:08 +0000 | [diff] [blame] | 2136 | return std::make_pair(0U, ARM::DPRRegisterClass); |
| 2137 | break; |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 2138 | } |
| 2139 | } |
| 2140 | return TargetLowering::getRegForInlineAsmConstraint(Constraint, VT); |
| 2141 | } |
| 2142 | |
| 2143 | std::vector<unsigned> ARMTargetLowering:: |
| 2144 | getRegClassForInlineAsmConstraint(const std::string &Constraint, |
Duncan Sands | 83ec4b6 | 2008-06-06 12:08:01 +0000 | [diff] [blame] | 2145 | MVT VT) const { |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 2146 | if (Constraint.size() != 1) |
| 2147 | return std::vector<unsigned>(); |
| 2148 | |
| 2149 | switch (Constraint[0]) { // GCC ARM Constraint Letters |
| 2150 | default: break; |
| 2151 | case 'l': |
Jim Grosbach | 30eae3c | 2009-04-07 20:34:09 +0000 | [diff] [blame] | 2152 | return make_vector<unsigned>(ARM::R0, ARM::R1, ARM::R2, ARM::R3, |
| 2153 | ARM::R4, ARM::R5, ARM::R6, ARM::R7, |
| 2154 | 0); |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 2155 | case 'r': |
| 2156 | return make_vector<unsigned>(ARM::R0, ARM::R1, ARM::R2, ARM::R3, |
| 2157 | ARM::R4, ARM::R5, ARM::R6, ARM::R7, |
| 2158 | ARM::R8, ARM::R9, ARM::R10, ARM::R11, |
| 2159 | ARM::R12, ARM::LR, 0); |
Chris Lattner | c4e3f8e | 2007-04-02 17:24:08 +0000 | [diff] [blame] | 2160 | case 'w': |
| 2161 | if (VT == MVT::f32) |
| 2162 | return make_vector<unsigned>(ARM::S0, ARM::S1, ARM::S2, ARM::S3, |
| 2163 | ARM::S4, ARM::S5, ARM::S6, ARM::S7, |
| 2164 | ARM::S8, ARM::S9, ARM::S10, ARM::S11, |
| 2165 | ARM::S12,ARM::S13,ARM::S14,ARM::S15, |
| 2166 | ARM::S16,ARM::S17,ARM::S18,ARM::S19, |
| 2167 | ARM::S20,ARM::S21,ARM::S22,ARM::S23, |
| 2168 | ARM::S24,ARM::S25,ARM::S26,ARM::S27, |
| 2169 | ARM::S28,ARM::S29,ARM::S30,ARM::S31, 0); |
| 2170 | if (VT == MVT::f64) |
| 2171 | return make_vector<unsigned>(ARM::D0, ARM::D1, ARM::D2, ARM::D3, |
| 2172 | ARM::D4, ARM::D5, ARM::D6, ARM::D7, |
| 2173 | ARM::D8, ARM::D9, ARM::D10,ARM::D11, |
| 2174 | ARM::D12,ARM::D13,ARM::D14,ARM::D15, 0); |
| 2175 | break; |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 2176 | } |
| 2177 | |
| 2178 | return std::vector<unsigned>(); |
| 2179 | } |
Bob Wilson | bf6396b | 2009-04-01 17:58:54 +0000 | [diff] [blame] | 2180 | |
| 2181 | /// LowerAsmOperandForConstraint - Lower the specified operand into the Ops |
| 2182 | /// vector. If it is invalid, don't add anything to Ops. |
| 2183 | void ARMTargetLowering::LowerAsmOperandForConstraint(SDValue Op, |
| 2184 | char Constraint, |
| 2185 | bool hasMemory, |
| 2186 | std::vector<SDValue>&Ops, |
| 2187 | SelectionDAG &DAG) const { |
| 2188 | SDValue Result(0, 0); |
| 2189 | |
| 2190 | switch (Constraint) { |
| 2191 | default: break; |
| 2192 | case 'I': case 'J': case 'K': case 'L': |
| 2193 | case 'M': case 'N': case 'O': |
| 2194 | ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op); |
| 2195 | if (!C) |
| 2196 | return; |
| 2197 | |
| 2198 | int64_t CVal64 = C->getSExtValue(); |
| 2199 | int CVal = (int) CVal64; |
| 2200 | // None of these constraints allow values larger than 32 bits. Check |
| 2201 | // that the value fits in an int. |
| 2202 | if (CVal != CVal64) |
| 2203 | return; |
| 2204 | |
| 2205 | switch (Constraint) { |
| 2206 | case 'I': |
| 2207 | if (Subtarget->isThumb()) { |
| 2208 | // This must be a constant between 0 and 255, for ADD immediates. |
| 2209 | if (CVal >= 0 && CVal <= 255) |
| 2210 | break; |
| 2211 | } else { |
| 2212 | // A constant that can be used as an immediate value in a |
| 2213 | // data-processing instruction. |
| 2214 | if (ARM_AM::getSOImmVal(CVal) != -1) |
| 2215 | break; |
| 2216 | } |
| 2217 | return; |
| 2218 | |
| 2219 | case 'J': |
| 2220 | if (Subtarget->isThumb()) { |
| 2221 | // This must be a constant between -255 and -1, for negated ADD |
| 2222 | // immediates. This can be used in GCC with an "n" modifier that |
| 2223 | // prints the negated value, for use with SUB instructions. It is |
| 2224 | // not useful otherwise but is implemented for compatibility. |
| 2225 | if (CVal >= -255 && CVal <= -1) |
| 2226 | break; |
| 2227 | } else { |
| 2228 | // This must be a constant between -4095 and 4095. It is not clear |
| 2229 | // what this constraint is intended for. Implemented for |
| 2230 | // compatibility with GCC. |
| 2231 | if (CVal >= -4095 && CVal <= 4095) |
| 2232 | break; |
| 2233 | } |
| 2234 | return; |
| 2235 | |
| 2236 | case 'K': |
| 2237 | if (Subtarget->isThumb()) { |
| 2238 | // A 32-bit value where only one byte has a nonzero value. Exclude |
| 2239 | // zero to match GCC. This constraint is used by GCC internally for |
| 2240 | // constants that can be loaded with a move/shift combination. |
| 2241 | // It is not useful otherwise but is implemented for compatibility. |
| 2242 | if (CVal != 0 && ARM_AM::isThumbImmShiftedVal(CVal)) |
| 2243 | break; |
| 2244 | } else { |
| 2245 | // A constant whose bitwise inverse can be used as an immediate |
| 2246 | // value in a data-processing instruction. This can be used in GCC |
| 2247 | // with a "B" modifier that prints the inverted value, for use with |
| 2248 | // BIC and MVN instructions. It is not useful otherwise but is |
| 2249 | // implemented for compatibility. |
| 2250 | if (ARM_AM::getSOImmVal(~CVal) != -1) |
| 2251 | break; |
| 2252 | } |
| 2253 | return; |
| 2254 | |
| 2255 | case 'L': |
| 2256 | if (Subtarget->isThumb()) { |
| 2257 | // This must be a constant between -7 and 7, |
| 2258 | // for 3-operand ADD/SUB immediate instructions. |
| 2259 | if (CVal >= -7 && CVal < 7) |
| 2260 | break; |
| 2261 | } else { |
| 2262 | // A constant whose negation can be used as an immediate value in a |
| 2263 | // data-processing instruction. This can be used in GCC with an "n" |
| 2264 | // modifier that prints the negated value, for use with SUB |
| 2265 | // instructions. It is not useful otherwise but is implemented for |
| 2266 | // compatibility. |
| 2267 | if (ARM_AM::getSOImmVal(-CVal) != -1) |
| 2268 | break; |
| 2269 | } |
| 2270 | return; |
| 2271 | |
| 2272 | case 'M': |
| 2273 | if (Subtarget->isThumb()) { |
| 2274 | // This must be a multiple of 4 between 0 and 1020, for |
| 2275 | // ADD sp + immediate. |
| 2276 | if ((CVal >= 0 && CVal <= 1020) && ((CVal & 3) == 0)) |
| 2277 | break; |
| 2278 | } else { |
| 2279 | // A power of two or a constant between 0 and 32. This is used in |
| 2280 | // GCC for the shift amount on shifted register operands, but it is |
| 2281 | // useful in general for any shift amounts. |
| 2282 | if ((CVal >= 0 && CVal <= 32) || ((CVal & (CVal - 1)) == 0)) |
| 2283 | break; |
| 2284 | } |
| 2285 | return; |
| 2286 | |
| 2287 | case 'N': |
| 2288 | if (Subtarget->isThumb()) { |
| 2289 | // This must be a constant between 0 and 31, for shift amounts. |
| 2290 | if (CVal >= 0 && CVal <= 31) |
| 2291 | break; |
| 2292 | } |
| 2293 | return; |
| 2294 | |
| 2295 | case 'O': |
| 2296 | if (Subtarget->isThumb()) { |
| 2297 | // This must be a multiple of 4 between -508 and 508, for |
| 2298 | // ADD/SUB sp = sp + immediate. |
| 2299 | if ((CVal >= -508 && CVal <= 508) && ((CVal & 3) == 0)) |
| 2300 | break; |
| 2301 | } |
| 2302 | return; |
| 2303 | } |
| 2304 | Result = DAG.getTargetConstant(CVal, Op.getValueType()); |
| 2305 | break; |
| 2306 | } |
| 2307 | |
| 2308 | if (Result.getNode()) { |
| 2309 | Ops.push_back(Result); |
| 2310 | return; |
| 2311 | } |
| 2312 | return TargetLowering::LowerAsmOperandForConstraint(Op, Constraint, hasMemory, |
| 2313 | Ops, DAG); |
| 2314 | } |