Rafael Espindola | fd9493d | 2010-09-27 18:31:37 +0000 | [diff] [blame] | 1 | //===-- ARMELFWriterInfo.h - ELF Writer Info for ARM ------------*- C++ -*-===// |
| 2 | // |
| 3 | // The LLVM Compiler Infrastructure |
| 4 | // |
| 5 | // This file is distributed under the University of Illinois Open Source |
| 6 | // License. See LICENSE.TXT for details. |
| 7 | // |
| 8 | //===----------------------------------------------------------------------===// |
| 9 | // |
| 10 | // This file implements ELF writer information for the ARM backend. |
| 11 | // |
| 12 | //===----------------------------------------------------------------------===// |
| 13 | |
| 14 | #ifndef ARM_ELF_WRITER_INFO_H |
| 15 | #define ARM_ELF_WRITER_INFO_H |
| 16 | |
| 17 | #include "llvm/Target/TargetELFWriterInfo.h" |
| 18 | |
| 19 | namespace llvm { |
| 20 | |
| 21 | class ARMELFWriterInfo : public TargetELFWriterInfo { |
| 22 | |
| 23 | // ELF Relocation types for ARM |
Jason W Kim | 6cecceb | 2010-11-08 16:47:27 +0000 | [diff] [blame] | 24 | // Meets 2.08 ABI Specs. Most of these are not used by the assembler. |
| 25 | // They are here for completeness's sake |
| 26 | |
Rafael Espindola | fd9493d | 2010-09-27 18:31:37 +0000 | [diff] [blame] | 27 | enum ARMRelocationType { |
Jason W Kim | 6cecceb | 2010-11-08 16:47:27 +0000 | [diff] [blame] | 28 | R_ARM_NONE = 0x00, |
| 29 | R_ARM_PC24 = 0x01, |
| 30 | R_ARM_ABS32 = 0x02, |
| 31 | R_ARM_REL32 = 0x03, |
| 32 | R_ARM_LDR_PC_G0 = 0x04, |
| 33 | R_ARM_ABS16 = 0x05, |
| 34 | R_ARM_ABS12 = 0x06, |
| 35 | R_ARM_THM_ABS5 = 0x07, |
| 36 | R_ARM_ABS8 = 0x08, |
| 37 | R_ARM_SBREL32 = 0x09, |
| 38 | R_ARM_THM_CALL = 0x0a, |
| 39 | R_ARM_THM_PC8 = 0x0b, |
| 40 | R_ARM_BREL_ADJ = 0x0c, |
| 41 | R_ARM_TLS_DESC = 0x0d, |
| 42 | R_ARM_THM_SWI8 = 0x0e, |
| 43 | R_ARM_XPC25 = 0x0f, |
| 44 | R_ARM_THM_XPC22 = 0x10, |
| 45 | R_ARM_TLS_DTPMOD32 = 0x11, |
| 46 | R_ARM_TLS_DTPOFF32 = 0x12, |
| 47 | R_ARM_TLS_TPOFF32 = 0x13, |
| 48 | R_ARM_COPY = 0x14, |
| 49 | R_ARM_GLOB_DAT = 0x15, |
| 50 | R_ARM_JUMP_SLOT = 0x16, |
| 51 | R_ARM_RELATIVE = 0x17, |
| 52 | R_ARM_GOTOFF32 = 0x18, |
| 53 | R_ARM_BASE_PREL = 0x19, |
| 54 | R_ARM_GOT_BREL = 0x1a, |
| 55 | R_ARM_PLT32 = 0x1b, |
| 56 | R_ARM_CALL = 0x1c, |
| 57 | R_ARM_JUMP24 = 0x1d, |
| 58 | R_ARM_THM_JUMP24 = 0x1e, |
| 59 | R_ARM_BASE_ABS = 0x1f, |
| 60 | R_ARM_ALU_PCREL_7_0 = 0x20, |
| 61 | R_ARM_ALU_PCREL_15_8 = 0x21, |
| 62 | R_ARM_ALU_PCREL_23_15 = 0x22, |
| 63 | R_ARM_LDR_SBREL_11_0_NC = 0x23, |
| 64 | R_ARM_ALU_SBREL_19_12_NC = 0x24, |
| 65 | R_ARM_ALU_SBREL_27_20_CK = 0x25, |
| 66 | R_ARM_TARGET1 = 0x26, |
| 67 | R_ARM_SBREL31 = 0x27, |
| 68 | R_ARM_V4BX = 0x28, |
| 69 | R_ARM_TARGET2 = 0x29, |
| 70 | R_ARM_PREL31 = 0x2a, |
| 71 | R_ARM_MOVW_ABS_NC = 0x2b, |
| 72 | R_ARM_MOVT_ABS = 0x2c, |
| 73 | R_ARM_MOVW_PREL_NC = 0x2d, |
| 74 | R_ARM_MOVT_PREL = 0x2e, |
| 75 | R_ARM_THM_MOVW_ABS_NC = 0x2f, |
| 76 | R_ARM_THM_MOVT_ABS = 0x30, |
| 77 | R_ARM_THM_MOVW_PREL_NC = 0x31, |
| 78 | R_ARM_THM_MOVT_PREL = 0x32, |
| 79 | R_ARM_THM_JUMP19 = 0x33, |
| 80 | R_ARM_THM_JUMP6 = 0x34, |
| 81 | R_ARM_THM_ALU_PREL_11_0 = 0x35, |
| 82 | R_ARM_THM_PC12 = 0x36, |
| 83 | R_ARM_ABS32_NOI = 0x37, |
| 84 | R_ARM_REL32_NOI = 0x38, |
| 85 | R_ARM_ALU_PC_G0_NC = 0x39, |
| 86 | R_ARM_ALU_PC_G0 = 0x3a, |
| 87 | R_ARM_ALU_PC_G1_NC = 0x3b, |
| 88 | R_ARM_ALU_PC_G1 = 0x3c, |
| 89 | R_ARM_ALU_PC_G2 = 0x3d, |
| 90 | R_ARM_LDR_PC_G1 = 0x3e, |
| 91 | R_ARM_LDR_PC_G2 = 0x3f, |
| 92 | R_ARM_LDRS_PC_G0 = 0x40, |
| 93 | R_ARM_LDRS_PC_G1 = 0x41, |
| 94 | R_ARM_LDRS_PC_G2 = 0x42, |
| 95 | R_ARM_LDC_PC_G0 = 0x43, |
| 96 | R_ARM_LDC_PC_G1 = 0x44, |
| 97 | R_ARM_LDC_PC_G2 = 0x45, |
| 98 | R_ARM_ALU_SB_G0_NC = 0x46, |
| 99 | R_ARM_ALU_SB_G0 = 0x47, |
| 100 | R_ARM_ALU_SB_G1_NC = 0x48, |
| 101 | R_ARM_ALU_SB_G1 = 0x49, |
| 102 | R_ARM_ALU_SB_G2 = 0x4a, |
| 103 | R_ARM_LDR_SB_G0 = 0x4b, |
| 104 | R_ARM_LDR_SB_G1 = 0x4c, |
| 105 | R_ARM_LDR_SB_G2 = 0x4d, |
| 106 | R_ARM_LDRS_SB_G0 = 0x4e, |
| 107 | R_ARM_LDRS_SB_G1 = 0x4f, |
| 108 | R_ARM_LDRS_SB_G2 = 0x50, |
| 109 | R_ARM_LDC_SB_G0 = 0x51, |
| 110 | R_ARM_LDC_SB_G1 = 0x52, |
| 111 | R_ARM_LDC_SB_G2 = 0x53, |
| 112 | R_ARM_MOVW_BREL_NC = 0x54, |
| 113 | R_ARM_MOVT_BREL = 0x55, |
| 114 | R_ARM_MOVW_BREL = 0x56, |
| 115 | R_ARM_THM_MOVW_BREL_NC = 0x57, |
| 116 | R_ARM_THM_MOVT_BREL = 0x58, |
| 117 | R_ARM_THM_MOVW_BREL = 0x59, |
| 118 | R_ARM_TLS_GOTDESC = 0x5a, |
| 119 | R_ARM_TLS_CALL = 0x5b, |
| 120 | R_ARM_TLS_DESCSEQ = 0x5c, |
| 121 | R_ARM_THM_TLS_CALL = 0x5d, |
| 122 | R_ARM_PLT32_ABS = 0x5e, |
| 123 | R_ARM_GOT_ABS = 0x5f, |
| 124 | R_ARM_GOT_PREL = 0x60, |
| 125 | R_ARM_GOT_BREL12 = 0x61, |
| 126 | R_ARM_GOTOFF12 = 0x62, |
| 127 | R_ARM_GOTRELAX = 0x63, |
| 128 | R_ARM_GNU_VTENTRY = 0x64, |
| 129 | R_ARM_GNU_VTINHERIT = 0x65, |
| 130 | R_ARM_THM_JUMP11 = 0x66, |
| 131 | R_ARM_THM_JUMP8 = 0x67, |
| 132 | R_ARM_TLS_GD32 = 0x68, |
| 133 | R_ARM_TLS_LDM32 = 0x69, |
| 134 | R_ARM_TLS_LDO32 = 0x6a, |
| 135 | R_ARM_TLS_IE32 = 0x6b, |
| 136 | R_ARM_TLS_LE32 = 0x6c, |
| 137 | R_ARM_TLS_LDO12 = 0x6d, |
| 138 | R_ARM_TLS_LE12 = 0x6e, |
| 139 | R_ARM_TLS_IE12GP = 0x6f, |
| 140 | R_ARM_PRIVATE_0 = 0x70, |
| 141 | R_ARM_PRIVATE_1 = 0x71, |
| 142 | R_ARM_PRIVATE_2 = 0x72, |
| 143 | R_ARM_PRIVATE_3 = 0x73, |
| 144 | R_ARM_PRIVATE_4 = 0x74, |
| 145 | R_ARM_PRIVATE_5 = 0x75, |
| 146 | R_ARM_PRIVATE_6 = 0x76, |
| 147 | R_ARM_PRIVATE_7 = 0x77, |
| 148 | R_ARM_PRIVATE_8 = 0x78, |
| 149 | R_ARM_PRIVATE_9 = 0x79, |
| 150 | R_ARM_PRIVATE_10 = 0x7a, |
| 151 | R_ARM_PRIVATE_11 = 0x7b, |
| 152 | R_ARM_PRIVATE_12 = 0x7c, |
| 153 | R_ARM_PRIVATE_13 = 0x7d, |
| 154 | R_ARM_PRIVATE_14 = 0x7e, |
| 155 | R_ARM_PRIVATE_15 = 0x7f, |
| 156 | R_ARM_ME_TOO = 0x80, |
| 157 | R_ARM_THM_TLS_DESCSEQ16 = 0x81, |
| 158 | R_ARM_THM_TLS_DESCSEQ32 = 0x82 |
Rafael Espindola | fd9493d | 2010-09-27 18:31:37 +0000 | [diff] [blame] | 159 | }; |
| 160 | |
| 161 | public: |
| 162 | ARMELFWriterInfo(TargetMachine &TM); |
| 163 | virtual ~ARMELFWriterInfo(); |
| 164 | |
| 165 | /// getRelocationType - Returns the target specific ELF Relocation type. |
| 166 | /// 'MachineRelTy' contains the object code independent relocation type |
| 167 | virtual unsigned getRelocationType(unsigned MachineRelTy) const; |
| 168 | |
| 169 | /// hasRelocationAddend - True if the target uses an addend in the |
| 170 | /// ELF relocation entry. |
| 171 | virtual bool hasRelocationAddend() const { return false; } |
| 172 | |
| 173 | /// getDefaultAddendForRelTy - Gets the default addend value for a |
| 174 | /// relocation entry based on the target ELF relocation type. |
| 175 | virtual long int getDefaultAddendForRelTy(unsigned RelTy, |
| 176 | long int Modifier = 0) const; |
| 177 | |
| 178 | /// getRelTySize - Returns the size of relocatable field in bits |
| 179 | virtual unsigned getRelocationTySize(unsigned RelTy) const; |
| 180 | |
| 181 | /// isPCRelativeRel - True if the relocation type is pc relative |
| 182 | virtual bool isPCRelativeRel(unsigned RelTy) const; |
| 183 | |
| 184 | /// getJumpTableRelocationTy - Returns the machine relocation type used |
| 185 | /// to reference a jumptable. |
| 186 | virtual unsigned getAbsoluteLabelMachineRelTy() const; |
| 187 | |
| 188 | /// computeRelocation - Some relocatable fields could be relocated |
| 189 | /// directly, avoiding the relocation symbol emission, compute the |
| 190 | /// final relocation value for this symbol. |
| 191 | virtual long int computeRelocation(unsigned SymOffset, unsigned RelOffset, |
| 192 | unsigned RelTy) const; |
| 193 | }; |
| 194 | |
| 195 | } // end llvm namespace |
| 196 | |
| 197 | #endif // ARM_ELF_WRITER_INFO_H |