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Dan Gohman2048b852009-11-23 18:04:58 +00001//===-- SelectionDAGBuilder.cpp - Selection-DAG building ------------------===//
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This implements routines for translating from LLVM IR into SelectionDAG IR.
11//
12//===----------------------------------------------------------------------===//
13
14#define DEBUG_TYPE "isel"
Devang Patel00190342010-03-15 19:15:44 +000015#include "SDNodeDbgValue.h"
Dan Gohman2048b852009-11-23 18:04:58 +000016#include "SelectionDAGBuilder.h"
Dan Gohmanf0cbcd42008-09-03 16:12:24 +000017#include "llvm/ADT/BitVector.h"
Michael J. Spencer84ac4d52010-10-16 08:25:41 +000018#include "llvm/ADT/PostOrderIterator.h"
Dan Gohman5b229802008-09-04 20:49:27 +000019#include "llvm/ADT/SmallSet.h"
Dan Gohmanf0cbcd42008-09-03 16:12:24 +000020#include "llvm/Analysis/AliasAnalysis.h"
Chris Lattner8047d9a2009-12-24 00:37:38 +000021#include "llvm/Analysis/ConstantFolding.h"
Dan Gohmanf0cbcd42008-09-03 16:12:24 +000022#include "llvm/Constants.h"
23#include "llvm/CallingConv.h"
24#include "llvm/DerivedTypes.h"
25#include "llvm/Function.h"
26#include "llvm/GlobalVariable.h"
27#include "llvm/InlineAsm.h"
28#include "llvm/Instructions.h"
29#include "llvm/Intrinsics.h"
30#include "llvm/IntrinsicInst.h"
Chris Lattner6129c372010-04-08 00:09:16 +000031#include "llvm/LLVMContext.h"
Bill Wendlingb2a42982008-11-06 02:29:10 +000032#include "llvm/Module.h"
Dan Gohman5eb6d652010-04-21 01:22:34 +000033#include "llvm/CodeGen/Analysis.h"
Dan Gohmanf0cbcd42008-09-03 16:12:24 +000034#include "llvm/CodeGen/FastISel.h"
Dan Gohman4c3fd9f2010-07-07 16:01:37 +000035#include "llvm/CodeGen/FunctionLoweringInfo.h"
Dan Gohmanf0cbcd42008-09-03 16:12:24 +000036#include "llvm/CodeGen/GCStrategy.h"
37#include "llvm/CodeGen/GCMetadata.h"
38#include "llvm/CodeGen/MachineFunction.h"
39#include "llvm/CodeGen/MachineFrameInfo.h"
40#include "llvm/CodeGen/MachineInstrBuilder.h"
41#include "llvm/CodeGen/MachineJumpTableInfo.h"
42#include "llvm/CodeGen/MachineModuleInfo.h"
43#include "llvm/CodeGen/MachineRegisterInfo.h"
Bill Wendlingb2a42982008-11-06 02:29:10 +000044#include "llvm/CodeGen/PseudoSourceValue.h"
Dan Gohmanf0cbcd42008-09-03 16:12:24 +000045#include "llvm/CodeGen/SelectionDAG.h"
Devang Patel83489bb2009-01-13 00:35:13 +000046#include "llvm/Analysis/DebugInfo.h"
Dan Gohmanf0cbcd42008-09-03 16:12:24 +000047#include "llvm/Target/TargetData.h"
Anton Korobeynikov16c29b52011-01-10 12:39:04 +000048#include "llvm/Target/TargetFrameLowering.h"
Dan Gohmanf0cbcd42008-09-03 16:12:24 +000049#include "llvm/Target/TargetInstrInfo.h"
Dale Johannesen49de9822009-02-05 01:49:45 +000050#include "llvm/Target/TargetIntrinsicInfo.h"
Dan Gohmanf0cbcd42008-09-03 16:12:24 +000051#include "llvm/Target/TargetLowering.h"
Dan Gohmanf0cbcd42008-09-03 16:12:24 +000052#include "llvm/Target/TargetOptions.h"
Mikhail Glushenkov2388a582009-01-16 07:02:28 +000053#include "llvm/Support/CommandLine.h"
Dan Gohmanf0cbcd42008-09-03 16:12:24 +000054#include "llvm/Support/Debug.h"
Torok Edwin7d696d82009-07-11 13:10:19 +000055#include "llvm/Support/ErrorHandling.h"
Dan Gohmanf0cbcd42008-09-03 16:12:24 +000056#include "llvm/Support/MathExtras.h"
Anton Korobeynikov56d245b2008-12-23 22:26:18 +000057#include "llvm/Support/raw_ostream.h"
Dan Gohmanf0cbcd42008-09-03 16:12:24 +000058#include <algorithm>
59using namespace llvm;
60
Dale Johannesen601d3c02008-09-05 01:48:15 +000061/// LimitFloatPrecision - Generate low-precision inline sequences for
62/// some float libcalls (6, 8 or 12 bits).
63static unsigned LimitFloatPrecision;
64
65static cl::opt<unsigned, true>
66LimitFPPrecision("limit-float-precision",
67 cl::desc("Generate low-precision inline sequences "
68 "for some float libcalls"),
69 cl::location(LimitFloatPrecision),
70 cl::init(0));
71
Andrew Trickde91f3c2010-11-12 17:50:46 +000072// Limit the width of DAG chains. This is important in general to prevent
73// prevent DAG-based analysis from blowing up. For example, alias analysis and
74// load clustering may not complete in reasonable time. It is difficult to
75// recognize and avoid this situation within each individual analysis, and
76// future analyses are likely to have the same behavior. Limiting DAG width is
Andrew Trickb9e6fe12010-11-20 07:26:51 +000077// the safe approach, and will be especially important with global DAGs.
Andrew Trickde91f3c2010-11-12 17:50:46 +000078//
79// MaxParallelChains default is arbitrarily high to avoid affecting
80// optimization, but could be lowered to improve compile time. Any ld-ld-st-st
Andrew Trickb9e6fe12010-11-20 07:26:51 +000081// sequence over this should have been converted to llvm.memcpy by the
82// frontend. It easy to induce this behavior with .ll code such as:
83// %buffer = alloca [4096 x i8]
84// %data = load [4096 x i8]* %argPtr
85// store [4096 x i8] %data, [4096 x i8]* %buffer
Andrew Trick778583a2011-03-11 17:46:59 +000086static const unsigned MaxParallelChains = 64;
Andrew Trickde91f3c2010-11-12 17:50:46 +000087
Chris Lattner3ac18842010-08-24 23:20:40 +000088static SDValue getCopyFromPartsVector(SelectionDAG &DAG, DebugLoc DL,
89 const SDValue *Parts, unsigned NumParts,
90 EVT PartVT, EVT ValueVT);
Michael J. Spencere70c5262010-10-16 08:25:21 +000091
Dan Gohmanf0cbcd42008-09-03 16:12:24 +000092/// getCopyFromParts - Create a value that contains the specified legal parts
93/// combined into the value they represent. If the parts combine to a type
94/// larger then ValueVT then AssertOp can be used to specify whether the extra
95/// bits are known to be zero (ISD::AssertZext) or sign extended from ValueVT
96/// (ISD::AssertSext).
Chris Lattner3ac18842010-08-24 23:20:40 +000097static SDValue getCopyFromParts(SelectionDAG &DAG, DebugLoc DL,
Dale Johannesen66978ee2009-01-31 02:22:37 +000098 const SDValue *Parts,
Owen Andersone50ed302009-08-10 22:56:29 +000099 unsigned NumParts, EVT PartVT, EVT ValueVT,
Duncan Sands0b3aa262009-01-28 14:42:54 +0000100 ISD::NodeType AssertOp = ISD::DELETED_NODE) {
Chris Lattner3ac18842010-08-24 23:20:40 +0000101 if (ValueVT.isVector())
102 return getCopyFromPartsVector(DAG, DL, Parts, NumParts, PartVT, ValueVT);
Michael J. Spencere70c5262010-10-16 08:25:21 +0000103
Dan Gohmanf0cbcd42008-09-03 16:12:24 +0000104 assert(NumParts > 0 && "No parts to assemble!");
Dan Gohmane9530ec2009-01-15 16:58:17 +0000105 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
Dan Gohmanf0cbcd42008-09-03 16:12:24 +0000106 SDValue Val = Parts[0];
107
108 if (NumParts > 1) {
109 // Assemble the value from multiple parts.
Chris Lattner3ac18842010-08-24 23:20:40 +0000110 if (ValueVT.isInteger()) {
Dan Gohmanf0cbcd42008-09-03 16:12:24 +0000111 unsigned PartBits = PartVT.getSizeInBits();
112 unsigned ValueBits = ValueVT.getSizeInBits();
113
114 // Assemble the power of 2 part.
115 unsigned RoundParts = NumParts & (NumParts - 1) ?
116 1 << Log2_32(NumParts) : NumParts;
117 unsigned RoundBits = PartBits * RoundParts;
Owen Andersone50ed302009-08-10 22:56:29 +0000118 EVT RoundVT = RoundBits == ValueBits ?
Owen Anderson23b9b192009-08-12 00:36:31 +0000119 ValueVT : EVT::getIntegerVT(*DAG.getContext(), RoundBits);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +0000120 SDValue Lo, Hi;
121
Owen Anderson23b9b192009-08-12 00:36:31 +0000122 EVT HalfVT = EVT::getIntegerVT(*DAG.getContext(), RoundBits/2);
Duncan Sandsd22ec5f2008-10-29 14:22:20 +0000123
Dan Gohmanf0cbcd42008-09-03 16:12:24 +0000124 if (RoundParts > 2) {
Chris Lattner3ac18842010-08-24 23:20:40 +0000125 Lo = getCopyFromParts(DAG, DL, Parts, RoundParts / 2,
Dan Gohmanf0cbcd42008-09-03 16:12:24 +0000126 PartVT, HalfVT);
Chris Lattner3ac18842010-08-24 23:20:40 +0000127 Hi = getCopyFromParts(DAG, DL, Parts + RoundParts / 2,
Bill Wendling3ea3c242009-12-22 02:10:19 +0000128 RoundParts / 2, PartVT, HalfVT);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +0000129 } else {
Wesley Peckbf17cfa2010-11-23 03:31:01 +0000130 Lo = DAG.getNode(ISD::BITCAST, DL, HalfVT, Parts[0]);
131 Hi = DAG.getNode(ISD::BITCAST, DL, HalfVT, Parts[1]);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +0000132 }
Bill Wendling3ea3c242009-12-22 02:10:19 +0000133
Dan Gohmanf0cbcd42008-09-03 16:12:24 +0000134 if (TLI.isBigEndian())
135 std::swap(Lo, Hi);
Bill Wendling3ea3c242009-12-22 02:10:19 +0000136
Chris Lattner3ac18842010-08-24 23:20:40 +0000137 Val = DAG.getNode(ISD::BUILD_PAIR, DL, RoundVT, Lo, Hi);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +0000138
139 if (RoundParts < NumParts) {
140 // Assemble the trailing non-power-of-2 part.
141 unsigned OddParts = NumParts - RoundParts;
Owen Anderson23b9b192009-08-12 00:36:31 +0000142 EVT OddVT = EVT::getIntegerVT(*DAG.getContext(), OddParts * PartBits);
Chris Lattner3ac18842010-08-24 23:20:40 +0000143 Hi = getCopyFromParts(DAG, DL,
Bill Wendling3ea3c242009-12-22 02:10:19 +0000144 Parts + RoundParts, OddParts, PartVT, OddVT);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +0000145
146 // Combine the round and odd parts.
147 Lo = Val;
148 if (TLI.isBigEndian())
149 std::swap(Lo, Hi);
Owen Anderson23b9b192009-08-12 00:36:31 +0000150 EVT TotalVT = EVT::getIntegerVT(*DAG.getContext(), NumParts * PartBits);
Chris Lattner3ac18842010-08-24 23:20:40 +0000151 Hi = DAG.getNode(ISD::ANY_EXTEND, DL, TotalVT, Hi);
152 Hi = DAG.getNode(ISD::SHL, DL, TotalVT, Hi,
Dan Gohmanf0cbcd42008-09-03 16:12:24 +0000153 DAG.getConstant(Lo.getValueType().getSizeInBits(),
Duncan Sands92abc622009-01-31 15:50:11 +0000154 TLI.getPointerTy()));
Chris Lattner3ac18842010-08-24 23:20:40 +0000155 Lo = DAG.getNode(ISD::ZERO_EXTEND, DL, TotalVT, Lo);
156 Val = DAG.getNode(ISD::OR, DL, TotalVT, Lo, Hi);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +0000157 }
Eli Friedman2ac8b322009-05-20 06:02:09 +0000158 } else if (PartVT.isFloatingPoint()) {
159 // FP split into multiple FP parts (for ppcf128)
Owen Anderson825b72b2009-08-11 20:47:22 +0000160 assert(ValueVT == EVT(MVT::ppcf128) && PartVT == EVT(MVT::f64) &&
Eli Friedman2ac8b322009-05-20 06:02:09 +0000161 "Unexpected split");
162 SDValue Lo, Hi;
Wesley Peckbf17cfa2010-11-23 03:31:01 +0000163 Lo = DAG.getNode(ISD::BITCAST, DL, EVT(MVT::f64), Parts[0]);
164 Hi = DAG.getNode(ISD::BITCAST, DL, EVT(MVT::f64), Parts[1]);
Eli Friedman2ac8b322009-05-20 06:02:09 +0000165 if (TLI.isBigEndian())
166 std::swap(Lo, Hi);
Chris Lattner3ac18842010-08-24 23:20:40 +0000167 Val = DAG.getNode(ISD::BUILD_PAIR, DL, ValueVT, Lo, Hi);
Eli Friedman2ac8b322009-05-20 06:02:09 +0000168 } else {
169 // FP split into integer parts (soft fp)
170 assert(ValueVT.isFloatingPoint() && PartVT.isInteger() &&
171 !PartVT.isVector() && "Unexpected split");
Owen Anderson23b9b192009-08-12 00:36:31 +0000172 EVT IntVT = EVT::getIntegerVT(*DAG.getContext(), ValueVT.getSizeInBits());
Chris Lattner3ac18842010-08-24 23:20:40 +0000173 Val = getCopyFromParts(DAG, DL, Parts, NumParts, PartVT, IntVT);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +0000174 }
175 }
176
177 // There is now one part, held in Val. Correct it to match ValueVT.
178 PartVT = Val.getValueType();
179
180 if (PartVT == ValueVT)
181 return Val;
182
Chris Lattner3ac18842010-08-24 23:20:40 +0000183 if (PartVT.isInteger() && ValueVT.isInteger()) {
Dan Gohmanf0cbcd42008-09-03 16:12:24 +0000184 if (ValueVT.bitsLT(PartVT)) {
185 // For a truncate, see if we have any information to
186 // indicate whether the truncated bits will always be
187 // zero or sign-extension.
188 if (AssertOp != ISD::DELETED_NODE)
Chris Lattner3ac18842010-08-24 23:20:40 +0000189 Val = DAG.getNode(AssertOp, DL, PartVT, Val,
Dan Gohmanf0cbcd42008-09-03 16:12:24 +0000190 DAG.getValueType(ValueVT));
Chris Lattner3ac18842010-08-24 23:20:40 +0000191 return DAG.getNode(ISD::TRUNCATE, DL, ValueVT, Val);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +0000192 }
Chris Lattner3ac18842010-08-24 23:20:40 +0000193 return DAG.getNode(ISD::ANY_EXTEND, DL, ValueVT, Val);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +0000194 }
195
196 if (PartVT.isFloatingPoint() && ValueVT.isFloatingPoint()) {
Chris Lattner3ac18842010-08-24 23:20:40 +0000197 // FP_ROUND's are always exact here.
198 if (ValueVT.bitsLT(Val.getValueType()))
199 return DAG.getNode(ISD::FP_ROUND, DL, ValueVT, Val,
Bill Wendling4533cac2010-01-28 21:51:40 +0000200 DAG.getIntPtrConstant(1));
Bill Wendling3ea3c242009-12-22 02:10:19 +0000201
Chris Lattner3ac18842010-08-24 23:20:40 +0000202 return DAG.getNode(ISD::FP_EXTEND, DL, ValueVT, Val);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +0000203 }
204
Bill Wendling4533cac2010-01-28 21:51:40 +0000205 if (PartVT.getSizeInBits() == ValueVT.getSizeInBits())
Wesley Peckbf17cfa2010-11-23 03:31:01 +0000206 return DAG.getNode(ISD::BITCAST, DL, ValueVT, Val);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +0000207
Torok Edwinc23197a2009-07-14 16:55:14 +0000208 llvm_unreachable("Unknown mismatch!");
Dan Gohmanf0cbcd42008-09-03 16:12:24 +0000209 return SDValue();
210}
211
Chris Lattner3ac18842010-08-24 23:20:40 +0000212/// getCopyFromParts - Create a value that contains the specified legal parts
213/// combined into the value they represent. If the parts combine to a type
214/// larger then ValueVT then AssertOp can be used to specify whether the extra
215/// bits are known to be zero (ISD::AssertZext) or sign extended from ValueVT
216/// (ISD::AssertSext).
217static SDValue getCopyFromPartsVector(SelectionDAG &DAG, DebugLoc DL,
218 const SDValue *Parts, unsigned NumParts,
219 EVT PartVT, EVT ValueVT) {
220 assert(ValueVT.isVector() && "Not a vector value");
221 assert(NumParts > 0 && "No parts to assemble!");
222 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
223 SDValue Val = Parts[0];
Michael J. Spencere70c5262010-10-16 08:25:21 +0000224
Chris Lattner3ac18842010-08-24 23:20:40 +0000225 // Handle a multi-element vector.
226 if (NumParts > 1) {
227 EVT IntermediateVT, RegisterVT;
228 unsigned NumIntermediates;
229 unsigned NumRegs =
230 TLI.getVectorTypeBreakdown(*DAG.getContext(), ValueVT, IntermediateVT,
231 NumIntermediates, RegisterVT);
232 assert(NumRegs == NumParts && "Part count doesn't match vector breakdown!");
233 NumParts = NumRegs; // Silence a compiler warning.
234 assert(RegisterVT == PartVT && "Part type doesn't match vector breakdown!");
235 assert(RegisterVT == Parts[0].getValueType() &&
236 "Part type doesn't match part!");
Michael J. Spencere70c5262010-10-16 08:25:21 +0000237
Chris Lattner3ac18842010-08-24 23:20:40 +0000238 // Assemble the parts into intermediate operands.
239 SmallVector<SDValue, 8> Ops(NumIntermediates);
240 if (NumIntermediates == NumParts) {
241 // If the register was not expanded, truncate or copy the value,
242 // as appropriate.
243 for (unsigned i = 0; i != NumParts; ++i)
244 Ops[i] = getCopyFromParts(DAG, DL, &Parts[i], 1,
245 PartVT, IntermediateVT);
246 } else if (NumParts > 0) {
247 // If the intermediate type was expanded, build the intermediate
248 // operands from the parts.
249 assert(NumParts % NumIntermediates == 0 &&
250 "Must expand into a divisible number of parts!");
251 unsigned Factor = NumParts / NumIntermediates;
252 for (unsigned i = 0; i != NumIntermediates; ++i)
253 Ops[i] = getCopyFromParts(DAG, DL, &Parts[i * Factor], Factor,
254 PartVT, IntermediateVT);
255 }
Michael J. Spencere70c5262010-10-16 08:25:21 +0000256
Chris Lattner3ac18842010-08-24 23:20:40 +0000257 // Build a vector with BUILD_VECTOR or CONCAT_VECTORS from the
258 // intermediate operands.
259 Val = DAG.getNode(IntermediateVT.isVector() ?
260 ISD::CONCAT_VECTORS : ISD::BUILD_VECTOR, DL,
261 ValueVT, &Ops[0], NumIntermediates);
262 }
Michael J. Spencere70c5262010-10-16 08:25:21 +0000263
Chris Lattner3ac18842010-08-24 23:20:40 +0000264 // There is now one part, held in Val. Correct it to match ValueVT.
265 PartVT = Val.getValueType();
Michael J. Spencere70c5262010-10-16 08:25:21 +0000266
Chris Lattner3ac18842010-08-24 23:20:40 +0000267 if (PartVT == ValueVT)
268 return Val;
Michael J. Spencere70c5262010-10-16 08:25:21 +0000269
Chris Lattnere6f7c262010-08-25 22:49:25 +0000270 if (PartVT.isVector()) {
271 // If the element type of the source/dest vectors are the same, but the
272 // parts vector has more elements than the value vector, then we have a
273 // vector widening case (e.g. <2 x float> -> <4 x float>). Extract the
274 // elements we want.
275 if (PartVT.getVectorElementType() == ValueVT.getVectorElementType()) {
276 assert(PartVT.getVectorNumElements() > ValueVT.getVectorNumElements() &&
277 "Cannot narrow, it would be a lossy transformation");
278 return DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, ValueVT, Val,
279 DAG.getIntPtrConstant(0));
Michael J. Spencere70c5262010-10-16 08:25:21 +0000280 }
281
Chris Lattnere6f7c262010-08-25 22:49:25 +0000282 // Vector/Vector bitcast.
Nadav Rotem0b666362011-06-04 20:58:08 +0000283 if (ValueVT.getSizeInBits() == PartVT.getSizeInBits())
284 return DAG.getNode(ISD::BITCAST, DL, ValueVT, Val);
285
286 assert(PartVT.getVectorNumElements() == ValueVT.getVectorNumElements() &&
287 "Cannot handle this kind of promotion");
288 // Promoted vector extract
Nadav Rotemb05f14b2011-06-12 14:49:38 +0000289 bool Smaller = ValueVT.bitsLE(PartVT);
290 return DAG.getNode((Smaller ? ISD::TRUNCATE : ISD::ANY_EXTEND),
291 DL, ValueVT, Val);
Nadav Rotem0b666362011-06-04 20:58:08 +0000292
Chris Lattnere6f7c262010-08-25 22:49:25 +0000293 }
Eric Christopher471e4222011-06-08 23:55:35 +0000294
Eric Christopher9aaa02a2011-06-01 19:55:10 +0000295 // Trivial bitcast if the types are the same size and the destination
296 // vector type is legal.
297 if (PartVT.getSizeInBits() == ValueVT.getSizeInBits() &&
298 TLI.isTypeLegal(ValueVT))
299 return DAG.getNode(ISD::BITCAST, DL, ValueVT, Val);
Michael J. Spencere70c5262010-10-16 08:25:21 +0000300
Nadav Rotemb05f14b2011-06-12 14:49:38 +0000301 // Handle cases such as i8 -> <1 x i1>
302 assert(ValueVT.getVectorNumElements() == 1 &&
Chris Lattner3ac18842010-08-24 23:20:40 +0000303 "Only trivial scalar-to-vector conversions should get here!");
Nadav Rotemb05f14b2011-06-12 14:49:38 +0000304
305 if (ValueVT.getVectorNumElements() == 1 &&
306 ValueVT.getVectorElementType() != PartVT) {
307 bool Smaller = ValueVT.bitsLE(PartVT);
308 Val = DAG.getNode((Smaller ? ISD::TRUNCATE : ISD::ANY_EXTEND),
309 DL, ValueVT.getScalarType(), Val);
310 }
311
Chris Lattner3ac18842010-08-24 23:20:40 +0000312 return DAG.getNode(ISD::BUILD_VECTOR, DL, ValueVT, Val);
313}
314
315
316
Chris Lattnera13b8602010-08-24 23:10:06 +0000317
318static void getCopyToPartsVector(SelectionDAG &DAG, DebugLoc dl,
319 SDValue Val, SDValue *Parts, unsigned NumParts,
320 EVT PartVT);
Michael J. Spencere70c5262010-10-16 08:25:21 +0000321
Dan Gohmanf0cbcd42008-09-03 16:12:24 +0000322/// getCopyToParts - Create a series of nodes that contain the specified value
323/// split into legal parts. If the parts contain more bits than Val, then, for
324/// integers, ExtendKind can be used to specify how to generate the extra bits.
Chris Lattnera13b8602010-08-24 23:10:06 +0000325static void getCopyToParts(SelectionDAG &DAG, DebugLoc DL,
Bill Wendling3ea3c242009-12-22 02:10:19 +0000326 SDValue Val, SDValue *Parts, unsigned NumParts,
327 EVT PartVT,
Dan Gohmanf0cbcd42008-09-03 16:12:24 +0000328 ISD::NodeType ExtendKind = ISD::ANY_EXTEND) {
Owen Andersone50ed302009-08-10 22:56:29 +0000329 EVT ValueVT = Val.getValueType();
Michael J. Spencere70c5262010-10-16 08:25:21 +0000330
Chris Lattnera13b8602010-08-24 23:10:06 +0000331 // Handle the vector case separately.
332 if (ValueVT.isVector())
333 return getCopyToPartsVector(DAG, DL, Val, Parts, NumParts, PartVT);
Michael J. Spencere70c5262010-10-16 08:25:21 +0000334
Chris Lattnera13b8602010-08-24 23:10:06 +0000335 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
Dan Gohmanf0cbcd42008-09-03 16:12:24 +0000336 unsigned PartBits = PartVT.getSizeInBits();
Dale Johannesen8a36f502009-02-25 22:39:13 +0000337 unsigned OrigNumParts = NumParts;
Dan Gohmanf0cbcd42008-09-03 16:12:24 +0000338 assert(TLI.isTypeLegal(PartVT) && "Copying to an illegal type!");
339
Chris Lattnera13b8602010-08-24 23:10:06 +0000340 if (NumParts == 0)
Dan Gohmanf0cbcd42008-09-03 16:12:24 +0000341 return;
342
Chris Lattnera13b8602010-08-24 23:10:06 +0000343 assert(!ValueVT.isVector() && "Vector case handled elsewhere");
344 if (PartVT == ValueVT) {
345 assert(NumParts == 1 && "No-op copy with multiple parts!");
Dan Gohmanf0cbcd42008-09-03 16:12:24 +0000346 Parts[0] = Val;
347 return;
348 }
349
Chris Lattnera13b8602010-08-24 23:10:06 +0000350 if (NumParts * PartBits > ValueVT.getSizeInBits()) {
351 // If the parts cover more bits than the value has, promote the value.
352 if (PartVT.isFloatingPoint() && ValueVT.isFloatingPoint()) {
353 assert(NumParts == 1 && "Do not know what to promote to!");
354 Val = DAG.getNode(ISD::FP_EXTEND, DL, PartVT, Val);
355 } else {
356 assert(PartVT.isInteger() && ValueVT.isInteger() &&
Michael J. Spencere70c5262010-10-16 08:25:21 +0000357 "Unknown mismatch!");
Chris Lattnera13b8602010-08-24 23:10:06 +0000358 ValueVT = EVT::getIntegerVT(*DAG.getContext(), NumParts * PartBits);
359 Val = DAG.getNode(ExtendKind, DL, ValueVT, Val);
360 }
361 } else if (PartBits == ValueVT.getSizeInBits()) {
362 // Different types of the same size.
363 assert(NumParts == 1 && PartVT != ValueVT);
Wesley Peckbf17cfa2010-11-23 03:31:01 +0000364 Val = DAG.getNode(ISD::BITCAST, DL, PartVT, Val);
Chris Lattnera13b8602010-08-24 23:10:06 +0000365 } else if (NumParts * PartBits < ValueVT.getSizeInBits()) {
366 // If the parts cover less bits than value has, truncate the value.
367 assert(PartVT.isInteger() && ValueVT.isInteger() &&
368 "Unknown mismatch!");
369 ValueVT = EVT::getIntegerVT(*DAG.getContext(), NumParts * PartBits);
370 Val = DAG.getNode(ISD::TRUNCATE, DL, ValueVT, Val);
371 }
372
373 // The value may have changed - recompute ValueVT.
374 ValueVT = Val.getValueType();
375 assert(NumParts * PartBits == ValueVT.getSizeInBits() &&
376 "Failed to tile the value with PartVT!");
377
378 if (NumParts == 1) {
379 assert(PartVT == ValueVT && "Type conversion failed!");
380 Parts[0] = Val;
381 return;
382 }
383
384 // Expand the value into multiple parts.
385 if (NumParts & (NumParts - 1)) {
386 // The number of parts is not a power of 2. Split off and copy the tail.
387 assert(PartVT.isInteger() && ValueVT.isInteger() &&
388 "Do not know what to expand to!");
389 unsigned RoundParts = 1 << Log2_32(NumParts);
390 unsigned RoundBits = RoundParts * PartBits;
391 unsigned OddParts = NumParts - RoundParts;
392 SDValue OddVal = DAG.getNode(ISD::SRL, DL, ValueVT, Val,
393 DAG.getIntPtrConstant(RoundBits));
394 getCopyToParts(DAG, DL, OddVal, Parts + RoundParts, OddParts, PartVT);
395
396 if (TLI.isBigEndian())
397 // The odd parts were reversed by getCopyToParts - unreverse them.
398 std::reverse(Parts + RoundParts, Parts + NumParts);
399
400 NumParts = RoundParts;
401 ValueVT = EVT::getIntegerVT(*DAG.getContext(), NumParts * PartBits);
402 Val = DAG.getNode(ISD::TRUNCATE, DL, ValueVT, Val);
403 }
404
405 // The number of parts is a power of 2. Repeatedly bisect the value using
406 // EXTRACT_ELEMENT.
Wesley Peckbf17cfa2010-11-23 03:31:01 +0000407 Parts[0] = DAG.getNode(ISD::BITCAST, DL,
Chris Lattnera13b8602010-08-24 23:10:06 +0000408 EVT::getIntegerVT(*DAG.getContext(),
409 ValueVT.getSizeInBits()),
410 Val);
411
412 for (unsigned StepSize = NumParts; StepSize > 1; StepSize /= 2) {
413 for (unsigned i = 0; i < NumParts; i += StepSize) {
414 unsigned ThisBits = StepSize * PartBits / 2;
415 EVT ThisVT = EVT::getIntegerVT(*DAG.getContext(), ThisBits);
416 SDValue &Part0 = Parts[i];
417 SDValue &Part1 = Parts[i+StepSize/2];
418
419 Part1 = DAG.getNode(ISD::EXTRACT_ELEMENT, DL,
420 ThisVT, Part0, DAG.getIntPtrConstant(1));
421 Part0 = DAG.getNode(ISD::EXTRACT_ELEMENT, DL,
422 ThisVT, Part0, DAG.getIntPtrConstant(0));
423
424 if (ThisBits == PartBits && ThisVT != PartVT) {
Wesley Peckbf17cfa2010-11-23 03:31:01 +0000425 Part0 = DAG.getNode(ISD::BITCAST, DL, PartVT, Part0);
426 Part1 = DAG.getNode(ISD::BITCAST, DL, PartVT, Part1);
Chris Lattnera13b8602010-08-24 23:10:06 +0000427 }
428 }
429 }
430
431 if (TLI.isBigEndian())
432 std::reverse(Parts, Parts + OrigNumParts);
433}
434
435
436/// getCopyToPartsVector - Create a series of nodes that contain the specified
437/// value split into legal parts.
438static void getCopyToPartsVector(SelectionDAG &DAG, DebugLoc DL,
439 SDValue Val, SDValue *Parts, unsigned NumParts,
440 EVT PartVT) {
441 EVT ValueVT = Val.getValueType();
442 assert(ValueVT.isVector() && "Not a vector");
443 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
Michael J. Spencere70c5262010-10-16 08:25:21 +0000444
Chris Lattnera13b8602010-08-24 23:10:06 +0000445 if (NumParts == 1) {
Chris Lattnere6f7c262010-08-25 22:49:25 +0000446 if (PartVT == ValueVT) {
447 // Nothing to do.
448 } else if (PartVT.getSizeInBits() == ValueVT.getSizeInBits()) {
449 // Bitconvert vector->vector case.
Wesley Peckbf17cfa2010-11-23 03:31:01 +0000450 Val = DAG.getNode(ISD::BITCAST, DL, PartVT, Val);
Chris Lattnere6f7c262010-08-25 22:49:25 +0000451 } else if (PartVT.isVector() &&
Nadav Rotemb05f14b2011-06-12 14:49:38 +0000452 PartVT.getVectorElementType() == ValueVT.getVectorElementType() &&
Chris Lattnere6f7c262010-08-25 22:49:25 +0000453 PartVT.getVectorNumElements() > ValueVT.getVectorNumElements()) {
454 EVT ElementVT = PartVT.getVectorElementType();
455 // Vector widening case, e.g. <2 x float> -> <4 x float>. Shuffle in
456 // undef elements.
457 SmallVector<SDValue, 16> Ops;
458 for (unsigned i = 0, e = ValueVT.getVectorNumElements(); i != e; ++i)
459 Ops.push_back(DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL,
460 ElementVT, Val, DAG.getIntPtrConstant(i)));
Michael J. Spencere70c5262010-10-16 08:25:21 +0000461
Chris Lattnere6f7c262010-08-25 22:49:25 +0000462 for (unsigned i = ValueVT.getVectorNumElements(),
463 e = PartVT.getVectorNumElements(); i != e; ++i)
464 Ops.push_back(DAG.getUNDEF(ElementVT));
465
466 Val = DAG.getNode(ISD::BUILD_VECTOR, DL, PartVT, &Ops[0], Ops.size());
467
468 // FIXME: Use CONCAT for 2x -> 4x.
Michael J. Spencere70c5262010-10-16 08:25:21 +0000469
Chris Lattnere6f7c262010-08-25 22:49:25 +0000470 //SDValue UndefElts = DAG.getUNDEF(VectorTy);
471 //Val = DAG.getNode(ISD::CONCAT_VECTORS, DL, PartVT, Val, UndefElts);
Nadav Rotem0b666362011-06-04 20:58:08 +0000472 } else if (PartVT.isVector() &&
473 PartVT.getVectorElementType().bitsGE(
Nadav Rotemb05f14b2011-06-12 14:49:38 +0000474 ValueVT.getVectorElementType()) &&
Nadav Rotem0b666362011-06-04 20:58:08 +0000475 PartVT.getVectorNumElements() == ValueVT.getVectorNumElements()) {
476
477 // Promoted vector extract
Nadav Rotemc6341e62011-06-19 08:49:38 +0000478 bool Smaller = PartVT.bitsLE(ValueVT);
479 Val = DAG.getNode((Smaller ? ISD::TRUNCATE : ISD::ANY_EXTEND),
480 DL, PartVT, Val);
Nadav Rotem0b666362011-06-04 20:58:08 +0000481 } else{
Chris Lattnere6f7c262010-08-25 22:49:25 +0000482 // Vector -> scalar conversion.
Nadav Rotemb05f14b2011-06-12 14:49:38 +0000483 assert(ValueVT.getVectorNumElements() == 1 &&
Chris Lattnere6f7c262010-08-25 22:49:25 +0000484 "Only trivial vector-to-scalar conversions should get here!");
485 Val = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL,
486 PartVT, Val, DAG.getIntPtrConstant(0));
Nadav Rotemb05f14b2011-06-12 14:49:38 +0000487
488 bool Smaller = ValueVT.bitsLE(PartVT);
489 Val = DAG.getNode((Smaller ? ISD::TRUNCATE : ISD::ANY_EXTEND),
490 DL, PartVT, Val);
Chris Lattnera13b8602010-08-24 23:10:06 +0000491 }
Michael J. Spencere70c5262010-10-16 08:25:21 +0000492
Chris Lattnera13b8602010-08-24 23:10:06 +0000493 Parts[0] = Val;
494 return;
495 }
Michael J. Spencere70c5262010-10-16 08:25:21 +0000496
Dan Gohmanf0cbcd42008-09-03 16:12:24 +0000497 // Handle a multi-element vector.
Owen Andersone50ed302009-08-10 22:56:29 +0000498 EVT IntermediateVT, RegisterVT;
Dan Gohmanf0cbcd42008-09-03 16:12:24 +0000499 unsigned NumIntermediates;
Owen Anderson23b9b192009-08-12 00:36:31 +0000500 unsigned NumRegs = TLI.getVectorTypeBreakdown(*DAG.getContext(), ValueVT,
Devang Patel8f09bea2010-08-26 20:32:32 +0000501 IntermediateVT,
502 NumIntermediates, RegisterVT);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +0000503 unsigned NumElements = ValueVT.getVectorNumElements();
Michael J. Spencere70c5262010-10-16 08:25:21 +0000504
Dan Gohmanf0cbcd42008-09-03 16:12:24 +0000505 assert(NumRegs == NumParts && "Part count doesn't match vector breakdown!");
506 NumParts = NumRegs; // Silence a compiler warning.
507 assert(RegisterVT == PartVT && "Part type doesn't match vector breakdown!");
Michael J. Spencere70c5262010-10-16 08:25:21 +0000508
Dan Gohmanf0cbcd42008-09-03 16:12:24 +0000509 // Split the vector into intermediate operands.
510 SmallVector<SDValue, 8> Ops(NumIntermediates);
Bill Wendling3ea3c242009-12-22 02:10:19 +0000511 for (unsigned i = 0; i != NumIntermediates; ++i) {
Dan Gohmanf0cbcd42008-09-03 16:12:24 +0000512 if (IntermediateVT.isVector())
Chris Lattnera13b8602010-08-24 23:10:06 +0000513 Ops[i] = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL,
Dan Gohmanf0cbcd42008-09-03 16:12:24 +0000514 IntermediateVT, Val,
Chris Lattnera13b8602010-08-24 23:10:06 +0000515 DAG.getIntPtrConstant(i * (NumElements / NumIntermediates)));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +0000516 else
Chris Lattnera13b8602010-08-24 23:10:06 +0000517 Ops[i] = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL,
Chris Lattnere6f7c262010-08-25 22:49:25 +0000518 IntermediateVT, Val, DAG.getIntPtrConstant(i));
Bill Wendling3ea3c242009-12-22 02:10:19 +0000519 }
Michael J. Spencere70c5262010-10-16 08:25:21 +0000520
Dan Gohmanf0cbcd42008-09-03 16:12:24 +0000521 // Split the intermediate operands into legal parts.
522 if (NumParts == NumIntermediates) {
523 // If the register was not expanded, promote or copy the value,
524 // as appropriate.
525 for (unsigned i = 0; i != NumParts; ++i)
Chris Lattnera13b8602010-08-24 23:10:06 +0000526 getCopyToParts(DAG, DL, Ops[i], &Parts[i], 1, PartVT);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +0000527 } else if (NumParts > 0) {
528 // If the intermediate type was expanded, split each the value into
529 // legal parts.
530 assert(NumParts % NumIntermediates == 0 &&
531 "Must expand into a divisible number of parts!");
532 unsigned Factor = NumParts / NumIntermediates;
533 for (unsigned i = 0; i != NumIntermediates; ++i)
Chris Lattnera13b8602010-08-24 23:10:06 +0000534 getCopyToParts(DAG, DL, Ops[i], &Parts[i*Factor], Factor, PartVT);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +0000535 }
536}
537
Chris Lattnera13b8602010-08-24 23:10:06 +0000538
539
540
Dan Gohman462f6b52010-05-29 17:53:24 +0000541namespace {
542 /// RegsForValue - This struct represents the registers (physical or virtual)
543 /// that a particular set of values is assigned, and the type information
544 /// about the value. The most common situation is to represent one value at a
545 /// time, but struct or array values are handled element-wise as multiple
546 /// values. The splitting of aggregates is performed recursively, so that we
547 /// never have aggregate-typed registers. The values at this point do not
548 /// necessarily have legal types, so each value may require one or more
549 /// registers of some legal type.
550 ///
551 struct RegsForValue {
552 /// ValueVTs - The value types of the values, which may not be legal, and
553 /// may need be promoted or synthesized from one or more registers.
554 ///
555 SmallVector<EVT, 4> ValueVTs;
556
557 /// RegVTs - The value types of the registers. This is the same size as
558 /// ValueVTs and it records, for each value, what the type of the assigned
559 /// register or registers are. (Individual values are never synthesized
560 /// from more than one type of register.)
561 ///
562 /// With virtual registers, the contents of RegVTs is redundant with TLI's
563 /// getRegisterType member function, however when with physical registers
564 /// it is necessary to have a separate record of the types.
565 ///
566 SmallVector<EVT, 4> RegVTs;
567
568 /// Regs - This list holds the registers assigned to the values.
569 /// Each legal or promoted value requires one register, and each
570 /// expanded value requires multiple registers.
571 ///
572 SmallVector<unsigned, 4> Regs;
573
574 RegsForValue() {}
575
576 RegsForValue(const SmallVector<unsigned, 4> &regs,
577 EVT regvt, EVT valuevt)
578 : ValueVTs(1, valuevt), RegVTs(1, regvt), Regs(regs) {}
579
Dan Gohman462f6b52010-05-29 17:53:24 +0000580 RegsForValue(LLVMContext &Context, const TargetLowering &tli,
581 unsigned Reg, const Type *Ty) {
582 ComputeValueVTs(tli, Ty, ValueVTs);
583
584 for (unsigned Value = 0, e = ValueVTs.size(); Value != e; ++Value) {
585 EVT ValueVT = ValueVTs[Value];
586 unsigned NumRegs = tli.getNumRegisters(Context, ValueVT);
587 EVT RegisterVT = tli.getRegisterType(Context, ValueVT);
588 for (unsigned i = 0; i != NumRegs; ++i)
589 Regs.push_back(Reg + i);
590 RegVTs.push_back(RegisterVT);
591 Reg += NumRegs;
592 }
593 }
594
595 /// areValueTypesLegal - Return true if types of all the values are legal.
596 bool areValueTypesLegal(const TargetLowering &TLI) {
597 for (unsigned Value = 0, e = ValueVTs.size(); Value != e; ++Value) {
598 EVT RegisterVT = RegVTs[Value];
599 if (!TLI.isTypeLegal(RegisterVT))
600 return false;
601 }
602 return true;
603 }
604
605 /// append - Add the specified values to this one.
606 void append(const RegsForValue &RHS) {
607 ValueVTs.append(RHS.ValueVTs.begin(), RHS.ValueVTs.end());
608 RegVTs.append(RHS.RegVTs.begin(), RHS.RegVTs.end());
609 Regs.append(RHS.Regs.begin(), RHS.Regs.end());
610 }
611
612 /// getCopyFromRegs - Emit a series of CopyFromReg nodes that copies from
613 /// this value and returns the result as a ValueVTs value. This uses
614 /// Chain/Flag as the input and updates them for the output Chain/Flag.
615 /// If the Flag pointer is NULL, no flag is used.
616 SDValue getCopyFromRegs(SelectionDAG &DAG, FunctionLoweringInfo &FuncInfo,
617 DebugLoc dl,
618 SDValue &Chain, SDValue *Flag) const;
619
620 /// getCopyToRegs - Emit a series of CopyToReg nodes that copies the
621 /// specified value into the registers specified by this object. This uses
622 /// Chain/Flag as the input and updates them for the output Chain/Flag.
623 /// If the Flag pointer is NULL, no flag is used.
624 void getCopyToRegs(SDValue Val, SelectionDAG &DAG, DebugLoc dl,
625 SDValue &Chain, SDValue *Flag) const;
626
627 /// AddInlineAsmOperands - Add this value to the specified inlineasm node
628 /// operand list. This adds the code marker, matching input operand index
629 /// (if applicable), and includes the number of values added into it.
630 void AddInlineAsmOperands(unsigned Kind,
631 bool HasMatching, unsigned MatchingIdx,
632 SelectionDAG &DAG,
633 std::vector<SDValue> &Ops) const;
634 };
635}
636
637/// getCopyFromRegs - Emit a series of CopyFromReg nodes that copies from
638/// this value and returns the result as a ValueVT value. This uses
639/// Chain/Flag as the input and updates them for the output Chain/Flag.
640/// If the Flag pointer is NULL, no flag is used.
641SDValue RegsForValue::getCopyFromRegs(SelectionDAG &DAG,
642 FunctionLoweringInfo &FuncInfo,
643 DebugLoc dl,
644 SDValue &Chain, SDValue *Flag) const {
Dan Gohman7da5d3f2010-07-26 18:15:41 +0000645 // A Value with type {} or [0 x %t] needs no registers.
646 if (ValueVTs.empty())
647 return SDValue();
648
Dan Gohman462f6b52010-05-29 17:53:24 +0000649 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
650
651 // Assemble the legal parts into the final values.
652 SmallVector<SDValue, 4> Values(ValueVTs.size());
653 SmallVector<SDValue, 8> Parts;
654 for (unsigned Value = 0, Part = 0, e = ValueVTs.size(); Value != e; ++Value) {
655 // Copy the legal parts from the registers.
656 EVT ValueVT = ValueVTs[Value];
657 unsigned NumRegs = TLI.getNumRegisters(*DAG.getContext(), ValueVT);
658 EVT RegisterVT = RegVTs[Value];
659
660 Parts.resize(NumRegs);
661 for (unsigned i = 0; i != NumRegs; ++i) {
662 SDValue P;
663 if (Flag == 0) {
664 P = DAG.getCopyFromReg(Chain, dl, Regs[Part+i], RegisterVT);
665 } else {
666 P = DAG.getCopyFromReg(Chain, dl, Regs[Part+i], RegisterVT, *Flag);
667 *Flag = P.getValue(2);
668 }
669
670 Chain = P.getValue(1);
Chris Lattnerd5b4db92010-12-13 01:11:17 +0000671 Parts[i] = P;
Dan Gohman462f6b52010-05-29 17:53:24 +0000672
673 // If the source register was virtual and if we know something about it,
674 // add an assert node.
Chris Lattnerd5b4db92010-12-13 01:11:17 +0000675 if (!TargetRegisterInfo::isVirtualRegister(Regs[Part+i]) ||
Cameron Zwariche1497b92011-02-24 10:00:08 +0000676 !RegisterVT.isInteger() || RegisterVT.isVector())
Chris Lattnerd5b4db92010-12-13 01:11:17 +0000677 continue;
Cameron Zwariche1497b92011-02-24 10:00:08 +0000678
679 const FunctionLoweringInfo::LiveOutInfo *LOI =
680 FuncInfo.GetLiveOutRegInfo(Regs[Part+i]);
681 if (!LOI)
682 continue;
Dan Gohman462f6b52010-05-29 17:53:24 +0000683
Chris Lattnerd5b4db92010-12-13 01:11:17 +0000684 unsigned RegSize = RegisterVT.getSizeInBits();
Cameron Zwariche1497b92011-02-24 10:00:08 +0000685 unsigned NumSignBits = LOI->NumSignBits;
686 unsigned NumZeroBits = LOI->KnownZero.countLeadingOnes();
Dan Gohman462f6b52010-05-29 17:53:24 +0000687
Chris Lattnerd5b4db92010-12-13 01:11:17 +0000688 // FIXME: We capture more information than the dag can represent. For
689 // now, just use the tightest assertzext/assertsext possible.
690 bool isSExt = true;
691 EVT FromVT(MVT::Other);
692 if (NumSignBits == RegSize)
693 isSExt = true, FromVT = MVT::i1; // ASSERT SEXT 1
694 else if (NumZeroBits >= RegSize-1)
695 isSExt = false, FromVT = MVT::i1; // ASSERT ZEXT 1
696 else if (NumSignBits > RegSize-8)
697 isSExt = true, FromVT = MVT::i8; // ASSERT SEXT 8
698 else if (NumZeroBits >= RegSize-8)
699 isSExt = false, FromVT = MVT::i8; // ASSERT ZEXT 8
700 else if (NumSignBits > RegSize-16)
701 isSExt = true, FromVT = MVT::i16; // ASSERT SEXT 16
702 else if (NumZeroBits >= RegSize-16)
703 isSExt = false, FromVT = MVT::i16; // ASSERT ZEXT 16
704 else if (NumSignBits > RegSize-32)
705 isSExt = true, FromVT = MVT::i32; // ASSERT SEXT 32
706 else if (NumZeroBits >= RegSize-32)
707 isSExt = false, FromVT = MVT::i32; // ASSERT ZEXT 32
708 else
709 continue;
Dan Gohman462f6b52010-05-29 17:53:24 +0000710
Chris Lattnerd5b4db92010-12-13 01:11:17 +0000711 // Add an assertion node.
712 assert(FromVT != MVT::Other);
713 Parts[i] = DAG.getNode(isSExt ? ISD::AssertSext : ISD::AssertZext, dl,
714 RegisterVT, P, DAG.getValueType(FromVT));
Dan Gohman462f6b52010-05-29 17:53:24 +0000715 }
716
717 Values[Value] = getCopyFromParts(DAG, dl, Parts.begin(),
718 NumRegs, RegisterVT, ValueVT);
719 Part += NumRegs;
720 Parts.clear();
721 }
722
723 return DAG.getNode(ISD::MERGE_VALUES, dl,
724 DAG.getVTList(&ValueVTs[0], ValueVTs.size()),
725 &Values[0], ValueVTs.size());
726}
727
728/// getCopyToRegs - Emit a series of CopyToReg nodes that copies the
729/// specified value into the registers specified by this object. This uses
730/// Chain/Flag as the input and updates them for the output Chain/Flag.
731/// If the Flag pointer is NULL, no flag is used.
732void RegsForValue::getCopyToRegs(SDValue Val, SelectionDAG &DAG, DebugLoc dl,
733 SDValue &Chain, SDValue *Flag) const {
734 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
735
736 // Get the list of the values's legal parts.
737 unsigned NumRegs = Regs.size();
738 SmallVector<SDValue, 8> Parts(NumRegs);
739 for (unsigned Value = 0, Part = 0, e = ValueVTs.size(); Value != e; ++Value) {
740 EVT ValueVT = ValueVTs[Value];
741 unsigned NumParts = TLI.getNumRegisters(*DAG.getContext(), ValueVT);
742 EVT RegisterVT = RegVTs[Value];
743
Chris Lattner3ac18842010-08-24 23:20:40 +0000744 getCopyToParts(DAG, dl, Val.getValue(Val.getResNo() + Value),
Dan Gohman462f6b52010-05-29 17:53:24 +0000745 &Parts[Part], NumParts, RegisterVT);
746 Part += NumParts;
747 }
748
749 // Copy the parts into the registers.
750 SmallVector<SDValue, 8> Chains(NumRegs);
751 for (unsigned i = 0; i != NumRegs; ++i) {
752 SDValue Part;
753 if (Flag == 0) {
754 Part = DAG.getCopyToReg(Chain, dl, Regs[i], Parts[i]);
755 } else {
756 Part = DAG.getCopyToReg(Chain, dl, Regs[i], Parts[i], *Flag);
757 *Flag = Part.getValue(1);
758 }
759
760 Chains[i] = Part.getValue(0);
761 }
762
763 if (NumRegs == 1 || Flag)
764 // If NumRegs > 1 && Flag is used then the use of the last CopyToReg is
765 // flagged to it. That is the CopyToReg nodes and the user are considered
766 // a single scheduling unit. If we create a TokenFactor and return it as
767 // chain, then the TokenFactor is both a predecessor (operand) of the
768 // user as well as a successor (the TF operands are flagged to the user).
769 // c1, f1 = CopyToReg
770 // c2, f2 = CopyToReg
771 // c3 = TokenFactor c1, c2
772 // ...
773 // = op c3, ..., f2
774 Chain = Chains[NumRegs-1];
775 else
776 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, &Chains[0], NumRegs);
777}
778
779/// AddInlineAsmOperands - Add this value to the specified inlineasm node
780/// operand list. This adds the code marker and includes the number of
781/// values added into it.
782void RegsForValue::AddInlineAsmOperands(unsigned Code, bool HasMatching,
783 unsigned MatchingIdx,
784 SelectionDAG &DAG,
785 std::vector<SDValue> &Ops) const {
786 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
787
788 unsigned Flag = InlineAsm::getFlagWord(Code, Regs.size());
789 if (HasMatching)
790 Flag = InlineAsm::getFlagWordForMatchingOp(Flag, MatchingIdx);
791 SDValue Res = DAG.getTargetConstant(Flag, MVT::i32);
792 Ops.push_back(Res);
793
794 for (unsigned Value = 0, Reg = 0, e = ValueVTs.size(); Value != e; ++Value) {
795 unsigned NumRegs = TLI.getNumRegisters(*DAG.getContext(), ValueVTs[Value]);
796 EVT RegisterVT = RegVTs[Value];
797 for (unsigned i = 0; i != NumRegs; ++i) {
798 assert(Reg < Regs.size() && "Mismatch in # registers expected");
799 Ops.push_back(DAG.getRegister(Regs[Reg++], RegisterVT));
800 }
801 }
802}
Dan Gohmanf0cbcd42008-09-03 16:12:24 +0000803
Dan Gohman2048b852009-11-23 18:04:58 +0000804void SelectionDAGBuilder::init(GCFunctionInfo *gfi, AliasAnalysis &aa) {
Dan Gohmanf0cbcd42008-09-03 16:12:24 +0000805 AA = &aa;
806 GFI = gfi;
807 TD = DAG.getTarget().getTargetData();
808}
809
Dan Gohmanb02b62a2010-04-14 18:24:06 +0000810/// clear - Clear out the current SelectionDAG and the associated
Dan Gohman2048b852009-11-23 18:04:58 +0000811/// state and prepare this SelectionDAGBuilder object to be used
Dan Gohmanf0cbcd42008-09-03 16:12:24 +0000812/// for a new block. This doesn't clear out information about
813/// additional blocks that are needed to complete switch lowering
814/// or PHI node updating; that information is cleared out as it is
815/// consumed.
Dan Gohman2048b852009-11-23 18:04:58 +0000816void SelectionDAGBuilder::clear() {
Dan Gohmanf0cbcd42008-09-03 16:12:24 +0000817 NodeMap.clear();
Devang Patel9126c0d2010-06-01 19:59:01 +0000818 UnusedArgNodeMap.clear();
Dan Gohmanf0cbcd42008-09-03 16:12:24 +0000819 PendingLoads.clear();
820 PendingExports.clear();
Chris Lattnera4f2bb02010-04-02 20:17:23 +0000821 CurDebugLoc = DebugLoc();
Dan Gohman98ca4f22009-08-05 01:29:28 +0000822 HasTailCall = false;
Dan Gohmanf0cbcd42008-09-03 16:12:24 +0000823}
824
Devang Patel23385752011-05-23 17:44:13 +0000825/// clearDanglingDebugInfo - Clear the dangling debug information
826/// map. This function is seperated from the clear so that debug
827/// information that is dangling in a basic block can be properly
828/// resolved in a different basic block. This allows the
829/// SelectionDAG to resolve dangling debug information attached
830/// to PHI nodes.
831void SelectionDAGBuilder::clearDanglingDebugInfo() {
832 DanglingDebugInfoMap.clear();
833}
834
Dan Gohmanf0cbcd42008-09-03 16:12:24 +0000835/// getRoot - Return the current virtual root of the Selection DAG,
836/// flushing any PendingLoad items. This must be done before emitting
837/// a store or any other node that may need to be ordered after any
838/// prior load instructions.
839///
Dan Gohman2048b852009-11-23 18:04:58 +0000840SDValue SelectionDAGBuilder::getRoot() {
Dan Gohmanf0cbcd42008-09-03 16:12:24 +0000841 if (PendingLoads.empty())
842 return DAG.getRoot();
843
844 if (PendingLoads.size() == 1) {
845 SDValue Root = PendingLoads[0];
846 DAG.setRoot(Root);
847 PendingLoads.clear();
848 return Root;
849 }
850
851 // Otherwise, we have to make a token factor node.
Owen Anderson825b72b2009-08-11 20:47:22 +0000852 SDValue Root = DAG.getNode(ISD::TokenFactor, getCurDebugLoc(), MVT::Other,
Dan Gohmanf0cbcd42008-09-03 16:12:24 +0000853 &PendingLoads[0], PendingLoads.size());
854 PendingLoads.clear();
855 DAG.setRoot(Root);
856 return Root;
857}
858
859/// getControlRoot - Similar to getRoot, but instead of flushing all the
860/// PendingLoad items, flush all the PendingExports items. It is necessary
861/// to do this before emitting a terminator instruction.
862///
Dan Gohman2048b852009-11-23 18:04:58 +0000863SDValue SelectionDAGBuilder::getControlRoot() {
Dan Gohmanf0cbcd42008-09-03 16:12:24 +0000864 SDValue Root = DAG.getRoot();
865
866 if (PendingExports.empty())
867 return Root;
868
869 // Turn all of the CopyToReg chains into one factored node.
870 if (Root.getOpcode() != ISD::EntryToken) {
871 unsigned i = 0, e = PendingExports.size();
872 for (; i != e; ++i) {
873 assert(PendingExports[i].getNode()->getNumOperands() > 1);
874 if (PendingExports[i].getNode()->getOperand(0) == Root)
875 break; // Don't add the root if we already indirectly depend on it.
876 }
877
878 if (i == e)
879 PendingExports.push_back(Root);
880 }
881
Owen Anderson825b72b2009-08-11 20:47:22 +0000882 Root = DAG.getNode(ISD::TokenFactor, getCurDebugLoc(), MVT::Other,
Dan Gohmanf0cbcd42008-09-03 16:12:24 +0000883 &PendingExports[0],
884 PendingExports.size());
885 PendingExports.clear();
886 DAG.setRoot(Root);
887 return Root;
888}
889
Bill Wendling4533cac2010-01-28 21:51:40 +0000890void SelectionDAGBuilder::AssignOrderingToNode(const SDNode *Node) {
891 if (DAG.GetOrdering(Node) != 0) return; // Already has ordering.
892 DAG.AssignOrdering(Node, SDNodeOrder);
893
894 for (unsigned I = 0, E = Node->getNumOperands(); I != E; ++I)
895 AssignOrderingToNode(Node->getOperand(I).getNode());
896}
897
Dan Gohman46510a72010-04-15 01:51:59 +0000898void SelectionDAGBuilder::visit(const Instruction &I) {
Dan Gohmanc105a2b2010-04-22 20:55:53 +0000899 // Set up outgoing PHI node register values before emitting the terminator.
900 if (isa<TerminatorInst>(&I))
901 HandlePHINodesInSuccessorBlocks(I.getParent());
902
Dan Gohman8ba3aa72010-04-20 00:48:35 +0000903 CurDebugLoc = I.getDebugLoc();
904
Dan Gohmanf0cbcd42008-09-03 16:12:24 +0000905 visit(I.getOpcode(), I);
Dan Gohman8ba3aa72010-04-20 00:48:35 +0000906
Dan Gohman92884f72010-04-20 15:03:56 +0000907 if (!isa<TerminatorInst>(&I) && !HasTailCall)
908 CopyToExportRegsIfNeeded(&I);
909
Dan Gohman8ba3aa72010-04-20 00:48:35 +0000910 CurDebugLoc = DebugLoc();
Dan Gohmanf0cbcd42008-09-03 16:12:24 +0000911}
912
Dan Gohmanba5be5c2010-04-20 15:00:41 +0000913void SelectionDAGBuilder::visitPHI(const PHINode &) {
914 llvm_unreachable("SelectionDAGBuilder shouldn't visit PHI nodes!");
915}
916
Dan Gohman46510a72010-04-15 01:51:59 +0000917void SelectionDAGBuilder::visit(unsigned Opcode, const User &I) {
Dan Gohmanf0cbcd42008-09-03 16:12:24 +0000918 // Note: this doesn't use InstVisitor, because it has to work with
919 // ConstantExpr's in addition to instructions.
920 switch (Opcode) {
Torok Edwinc23197a2009-07-14 16:55:14 +0000921 default: llvm_unreachable("Unknown instruction type encountered!");
Dan Gohmanf0cbcd42008-09-03 16:12:24 +0000922 // Build the switch statement using the Instruction.def file.
923#define HANDLE_INST(NUM, OPCODE, CLASS) \
Bill Wendling4533cac2010-01-28 21:51:40 +0000924 case Instruction::OPCODE: visit##OPCODE((CLASS&)I); break;
Dan Gohmanf0cbcd42008-09-03 16:12:24 +0000925#include "llvm/Instruction.def"
926 }
Bill Wendling4533cac2010-01-28 21:51:40 +0000927
928 // Assign the ordering to the freshly created DAG nodes.
929 if (NodeMap.count(&I)) {
930 ++SDNodeOrder;
931 AssignOrderingToNode(getValue(&I).getNode());
932 }
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +0000933}
Dan Gohmanf0cbcd42008-09-03 16:12:24 +0000934
Dale Johannesenbdc09d92010-07-16 00:02:08 +0000935// resolveDanglingDebugInfo - if we saw an earlier dbg_value referring to V,
936// generate the debug data structures now that we've seen its definition.
937void SelectionDAGBuilder::resolveDanglingDebugInfo(const Value *V,
938 SDValue Val) {
939 DanglingDebugInfo &DDI = DanglingDebugInfoMap[V];
Devang Patel4cf81c42010-08-26 23:35:15 +0000940 if (DDI.getDI()) {
941 const DbgValueInst *DI = DDI.getDI();
Dale Johannesenbdc09d92010-07-16 00:02:08 +0000942 DebugLoc dl = DDI.getdl();
943 unsigned DbgSDNodeOrder = DDI.getSDNodeOrder();
Devang Patel4cf81c42010-08-26 23:35:15 +0000944 MDNode *Variable = DI->getVariable();
945 uint64_t Offset = DI->getOffset();
Dale Johannesenbdc09d92010-07-16 00:02:08 +0000946 SDDbgValue *SDV;
947 if (Val.getNode()) {
Devang Patel78a06e52010-08-25 20:39:26 +0000948 if (!EmitFuncArgumentDbgValue(V, Variable, Offset, Val)) {
Dale Johannesenbdc09d92010-07-16 00:02:08 +0000949 SDV = DAG.getDbgValue(Variable, Val.getNode(),
950 Val.getResNo(), Offset, dl, DbgSDNodeOrder);
951 DAG.AddDbgValue(SDV, Val.getNode(), false);
952 }
Owen Anderson95771af2011-02-25 21:41:48 +0000953 } else
Devang Patelafeaae72010-12-06 22:39:26 +0000954 DEBUG(dbgs() << "Dropping debug info for " << DI);
Dale Johannesenbdc09d92010-07-16 00:02:08 +0000955 DanglingDebugInfoMap[V] = DanglingDebugInfo();
956 }
957}
958
Dan Gohman28a17352010-07-01 01:59:43 +0000959// getValue - Return an SDValue for the given Value.
Dan Gohman2048b852009-11-23 18:04:58 +0000960SDValue SelectionDAGBuilder::getValue(const Value *V) {
Dan Gohman28a17352010-07-01 01:59:43 +0000961 // If we already have an SDValue for this value, use it. It's important
962 // to do this first, so that we don't create a CopyFromReg if we already
963 // have a regular SDValue.
Dan Gohmanf0cbcd42008-09-03 16:12:24 +0000964 SDValue &N = NodeMap[V];
965 if (N.getNode()) return N;
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +0000966
Dan Gohman28a17352010-07-01 01:59:43 +0000967 // If there's a virtual register allocated and initialized for this
968 // value, use it.
969 DenseMap<const Value *, unsigned>::iterator It = FuncInfo.ValueMap.find(V);
970 if (It != FuncInfo.ValueMap.end()) {
971 unsigned InReg = It->second;
972 RegsForValue RFV(*DAG.getContext(), TLI, InReg, V->getType());
973 SDValue Chain = DAG.getEntryNode();
Devang Patel8f314282011-01-25 18:09:58 +0000974 N = RFV.getCopyFromRegs(DAG, FuncInfo, getCurDebugLoc(), Chain,NULL);
975 resolveDanglingDebugInfo(V, N);
976 return N;
Dan Gohman28a17352010-07-01 01:59:43 +0000977 }
978
979 // Otherwise create a new SDValue and remember it.
980 SDValue Val = getValueImpl(V);
981 NodeMap[V] = Val;
Dale Johannesenbdc09d92010-07-16 00:02:08 +0000982 resolveDanglingDebugInfo(V, Val);
Dan Gohman28a17352010-07-01 01:59:43 +0000983 return Val;
984}
985
986/// getNonRegisterValue - Return an SDValue for the given Value, but
987/// don't look in FuncInfo.ValueMap for a virtual register.
988SDValue SelectionDAGBuilder::getNonRegisterValue(const Value *V) {
989 // If we already have an SDValue for this value, use it.
990 SDValue &N = NodeMap[V];
991 if (N.getNode()) return N;
992
993 // Otherwise create a new SDValue and remember it.
994 SDValue Val = getValueImpl(V);
995 NodeMap[V] = Val;
Dale Johannesenbdc09d92010-07-16 00:02:08 +0000996 resolveDanglingDebugInfo(V, Val);
Dan Gohman28a17352010-07-01 01:59:43 +0000997 return Val;
998}
999
Dale Johannesenbdc09d92010-07-16 00:02:08 +00001000/// getValueImpl - Helper function for getValue and getNonRegisterValue.
Dan Gohman28a17352010-07-01 01:59:43 +00001001/// Create an SDValue for the given value.
1002SDValue SelectionDAGBuilder::getValueImpl(const Value *V) {
Dan Gohman383b5f62010-04-17 15:32:28 +00001003 if (const Constant *C = dyn_cast<Constant>(V)) {
Owen Andersone50ed302009-08-10 22:56:29 +00001004 EVT VT = TLI.getValueType(V->getType(), true);
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00001005
Dan Gohman383b5f62010-04-17 15:32:28 +00001006 if (const ConstantInt *CI = dyn_cast<ConstantInt>(C))
Dan Gohman28a17352010-07-01 01:59:43 +00001007 return DAG.getConstant(*CI, VT);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001008
Dan Gohman383b5f62010-04-17 15:32:28 +00001009 if (const GlobalValue *GV = dyn_cast<GlobalValue>(C))
Devang Patel0d881da2010-07-06 22:08:15 +00001010 return DAG.getGlobalAddress(GV, getCurDebugLoc(), VT);
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00001011
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001012 if (isa<ConstantPointerNull>(C))
Dan Gohman28a17352010-07-01 01:59:43 +00001013 return DAG.getConstant(0, TLI.getPointerTy());
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00001014
Dan Gohman383b5f62010-04-17 15:32:28 +00001015 if (const ConstantFP *CFP = dyn_cast<ConstantFP>(C))
Dan Gohman28a17352010-07-01 01:59:43 +00001016 return DAG.getConstantFP(*CFP, VT);
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00001017
Nate Begeman9008ca62009-04-27 18:41:29 +00001018 if (isa<UndefValue>(C) && !V->getType()->isAggregateType())
Dan Gohman28a17352010-07-01 01:59:43 +00001019 return DAG.getUNDEF(VT);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001020
Dan Gohman383b5f62010-04-17 15:32:28 +00001021 if (const ConstantExpr *CE = dyn_cast<ConstantExpr>(C)) {
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001022 visit(CE->getOpcode(), *CE);
1023 SDValue N1 = NodeMap[V];
Dan Gohmanac7d05c2010-04-16 16:55:18 +00001024 assert(N1.getNode() && "visit didn't populate the NodeMap!");
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001025 return N1;
1026 }
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00001027
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001028 if (isa<ConstantStruct>(C) || isa<ConstantArray>(C)) {
1029 SmallVector<SDValue, 4> Constants;
1030 for (User::const_op_iterator OI = C->op_begin(), OE = C->op_end();
1031 OI != OE; ++OI) {
1032 SDNode *Val = getValue(*OI).getNode();
Dan Gohmaned48caf2009-09-08 01:44:02 +00001033 // If the operand is an empty aggregate, there are no values.
1034 if (!Val) continue;
1035 // Add each leaf value from the operand to the Constants list
1036 // to form a flattened list of all the values.
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001037 for (unsigned i = 0, e = Val->getNumValues(); i != e; ++i)
1038 Constants.push_back(SDValue(Val, i));
1039 }
Bill Wendling87710f02009-12-21 23:47:40 +00001040
Bill Wendling4533cac2010-01-28 21:51:40 +00001041 return DAG.getMergeValues(&Constants[0], Constants.size(),
1042 getCurDebugLoc());
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001043 }
1044
Duncan Sands1df98592010-02-16 11:11:14 +00001045 if (C->getType()->isStructTy() || C->getType()->isArrayTy()) {
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001046 assert((isa<ConstantAggregateZero>(C) || isa<UndefValue>(C)) &&
1047 "Unknown struct or array constant!");
1048
Owen Andersone50ed302009-08-10 22:56:29 +00001049 SmallVector<EVT, 4> ValueVTs;
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001050 ComputeValueVTs(TLI, C->getType(), ValueVTs);
1051 unsigned NumElts = ValueVTs.size();
1052 if (NumElts == 0)
1053 return SDValue(); // empty struct
1054 SmallVector<SDValue, 4> Constants(NumElts);
1055 for (unsigned i = 0; i != NumElts; ++i) {
Owen Andersone50ed302009-08-10 22:56:29 +00001056 EVT EltVT = ValueVTs[i];
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001057 if (isa<UndefValue>(C))
Dale Johannesene8d72302009-02-06 23:05:02 +00001058 Constants[i] = DAG.getUNDEF(EltVT);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001059 else if (EltVT.isFloatingPoint())
1060 Constants[i] = DAG.getConstantFP(0, EltVT);
1061 else
1062 Constants[i] = DAG.getConstant(0, EltVT);
1063 }
Bill Wendling87710f02009-12-21 23:47:40 +00001064
Bill Wendling4533cac2010-01-28 21:51:40 +00001065 return DAG.getMergeValues(&Constants[0], NumElts,
1066 getCurDebugLoc());
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001067 }
1068
Dan Gohman383b5f62010-04-17 15:32:28 +00001069 if (const BlockAddress *BA = dyn_cast<BlockAddress>(C))
Dan Gohman29cbade2009-11-20 23:18:13 +00001070 return DAG.getBlockAddress(BA, VT);
Dan Gohman8c2b5252009-10-30 01:27:03 +00001071
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001072 const VectorType *VecTy = cast<VectorType>(V->getType());
1073 unsigned NumElements = VecTy->getNumElements();
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00001074
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001075 // Now that we know the number and type of the elements, get that number of
1076 // elements into the Ops array based on what kind of constant it is.
1077 SmallVector<SDValue, 16> Ops;
Dan Gohman383b5f62010-04-17 15:32:28 +00001078 if (const ConstantVector *CP = dyn_cast<ConstantVector>(C)) {
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001079 for (unsigned i = 0; i != NumElements; ++i)
1080 Ops.push_back(getValue(CP->getOperand(i)));
1081 } else {
Nate Begeman9008ca62009-04-27 18:41:29 +00001082 assert(isa<ConstantAggregateZero>(C) && "Unknown vector constant!");
Owen Andersone50ed302009-08-10 22:56:29 +00001083 EVT EltVT = TLI.getValueType(VecTy->getElementType());
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001084
1085 SDValue Op;
Nate Begeman9008ca62009-04-27 18:41:29 +00001086 if (EltVT.isFloatingPoint())
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001087 Op = DAG.getConstantFP(0, EltVT);
1088 else
1089 Op = DAG.getConstant(0, EltVT);
1090 Ops.assign(NumElements, Op);
1091 }
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00001092
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001093 // Create a BUILD_VECTOR node.
Bill Wendling4533cac2010-01-28 21:51:40 +00001094 return NodeMap[V] = DAG.getNode(ISD::BUILD_VECTOR, getCurDebugLoc(),
1095 VT, &Ops[0], Ops.size());
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001096 }
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00001097
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001098 // If this is a static alloca, generate it as the frameindex instead of
1099 // computation.
1100 if (const AllocaInst *AI = dyn_cast<AllocaInst>(V)) {
1101 DenseMap<const AllocaInst*, int>::iterator SI =
1102 FuncInfo.StaticAllocaMap.find(AI);
1103 if (SI != FuncInfo.StaticAllocaMap.end())
1104 return DAG.getFrameIndex(SI->second, TLI.getPointerTy());
1105 }
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00001106
Dan Gohman28a17352010-07-01 01:59:43 +00001107 // If this is an instruction which fast-isel has deferred, select it now.
1108 if (const Instruction *Inst = dyn_cast<Instruction>(V)) {
Dan Gohman84023e02010-07-10 09:00:22 +00001109 unsigned InReg = FuncInfo.InitializeRegForValue(Inst);
1110 RegsForValue RFV(*DAG.getContext(), TLI, InReg, Inst->getType());
1111 SDValue Chain = DAG.getEntryNode();
1112 return RFV.getCopyFromRegs(DAG, FuncInfo, getCurDebugLoc(), Chain, NULL);
Dan Gohman28a17352010-07-01 01:59:43 +00001113 }
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00001114
Dan Gohman28a17352010-07-01 01:59:43 +00001115 llvm_unreachable("Can't get register for value!");
1116 return SDValue();
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001117}
1118
Dan Gohman46510a72010-04-15 01:51:59 +00001119void SelectionDAGBuilder::visitRet(const ReturnInst &I) {
Dan Gohman98ca4f22009-08-05 01:29:28 +00001120 SDValue Chain = getControlRoot();
1121 SmallVector<ISD::OutputArg, 8> Outs;
Dan Gohmanc9403652010-07-07 15:54:55 +00001122 SmallVector<SDValue, 8> OutVals;
Mikhail Glushenkovb3c01992010-01-01 04:41:22 +00001123
Dan Gohman7451d3e2010-05-29 17:03:36 +00001124 if (!FuncInfo.CanLowerReturn) {
1125 unsigned DemoteReg = FuncInfo.DemoteRegister;
Kenneth Uildriksc158dde2009-11-11 19:59:24 +00001126 const Function *F = I.getParent()->getParent();
1127
1128 // Emit a store of the return value through the virtual register.
1129 // Leave Outs empty so that LowerReturn won't try to load return
1130 // registers the usual way.
1131 SmallVector<EVT, 1> PtrValueVTs;
Mikhail Glushenkovb3c01992010-01-01 04:41:22 +00001132 ComputeValueVTs(TLI, PointerType::getUnqual(F->getReturnType()),
Kenneth Uildriksc158dde2009-11-11 19:59:24 +00001133 PtrValueVTs);
1134
1135 SDValue RetPtr = DAG.getRegister(DemoteReg, PtrValueVTs[0]);
1136 SDValue RetOp = getValue(I.getOperand(0));
Mikhail Glushenkovb3c01992010-01-01 04:41:22 +00001137
Owen Andersone50ed302009-08-10 22:56:29 +00001138 SmallVector<EVT, 4> ValueVTs;
Kenneth Uildriksc158dde2009-11-11 19:59:24 +00001139 SmallVector<uint64_t, 4> Offsets;
1140 ComputeValueVTs(TLI, I.getOperand(0)->getType(), ValueVTs, &Offsets);
Dan Gohman7ea1ca62008-10-21 20:00:42 +00001141 unsigned NumValues = ValueVTs.size();
Dan Gohman7ea1ca62008-10-21 20:00:42 +00001142
Kenneth Uildriksc158dde2009-11-11 19:59:24 +00001143 SmallVector<SDValue, 4> Chains(NumValues);
Bill Wendling87710f02009-12-21 23:47:40 +00001144 for (unsigned i = 0; i != NumValues; ++i) {
Chris Lattnera13b8602010-08-24 23:10:06 +00001145 SDValue Add = DAG.getNode(ISD::ADD, getCurDebugLoc(),
1146 RetPtr.getValueType(), RetPtr,
1147 DAG.getIntPtrConstant(Offsets[i]));
Bill Wendling87710f02009-12-21 23:47:40 +00001148 Chains[i] =
1149 DAG.getStore(Chain, getCurDebugLoc(),
1150 SDValue(RetOp.getNode(), RetOp.getResNo() + i),
Chris Lattner84bd98a2010-09-21 18:58:22 +00001151 // FIXME: better loc info would be nice.
1152 Add, MachinePointerInfo(), false, false, 0);
Bill Wendling87710f02009-12-21 23:47:40 +00001153 }
1154
Kenneth Uildriksc158dde2009-11-11 19:59:24 +00001155 Chain = DAG.getNode(ISD::TokenFactor, getCurDebugLoc(),
1156 MVT::Other, &Chains[0], NumValues);
Chris Lattner25d58372010-02-28 18:53:13 +00001157 } else if (I.getNumOperands() != 0) {
1158 SmallVector<EVT, 4> ValueVTs;
1159 ComputeValueVTs(TLI, I.getOperand(0)->getType(), ValueVTs);
1160 unsigned NumValues = ValueVTs.size();
1161 if (NumValues) {
1162 SDValue RetOp = getValue(I.getOperand(0));
Kenneth Uildriksc158dde2009-11-11 19:59:24 +00001163 for (unsigned j = 0, f = NumValues; j != f; ++j) {
1164 EVT VT = ValueVTs[j];
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001165
Kenneth Uildriksc158dde2009-11-11 19:59:24 +00001166 ISD::NodeType ExtendKind = ISD::ANY_EXTEND;
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00001167
Kenneth Uildriksc158dde2009-11-11 19:59:24 +00001168 const Function *F = I.getParent()->getParent();
1169 if (F->paramHasAttr(0, Attribute::SExt))
1170 ExtendKind = ISD::SIGN_EXTEND;
1171 else if (F->paramHasAttr(0, Attribute::ZExt))
1172 ExtendKind = ISD::ZERO_EXTEND;
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001173
Cameron Zwarich7bbf0ee2011-03-17 14:53:37 +00001174 if (ExtendKind != ISD::ANY_EXTEND && VT.isInteger())
1175 VT = TLI.getTypeForExtArgOrReturn(*DAG.getContext(), VT, ExtendKind);
Kenneth Uildriksc158dde2009-11-11 19:59:24 +00001176
1177 unsigned NumParts = TLI.getNumRegisters(*DAG.getContext(), VT);
1178 EVT PartVT = TLI.getRegisterType(*DAG.getContext(), VT);
1179 SmallVector<SDValue, 4> Parts(NumParts);
Bill Wendling46ada192010-03-02 01:55:18 +00001180 getCopyToParts(DAG, getCurDebugLoc(),
Kenneth Uildriksc158dde2009-11-11 19:59:24 +00001181 SDValue(RetOp.getNode(), RetOp.getResNo() + j),
1182 &Parts[0], NumParts, PartVT, ExtendKind);
1183
1184 // 'inreg' on function refers to return value
1185 ISD::ArgFlagsTy Flags = ISD::ArgFlagsTy();
1186 if (F->paramHasAttr(0, Attribute::InReg))
1187 Flags.setInReg();
1188
1189 // Propagate extension type if any
Cameron Zwarich8df6bf52011-03-16 22:20:07 +00001190 if (ExtendKind == ISD::SIGN_EXTEND)
Kenneth Uildriksc158dde2009-11-11 19:59:24 +00001191 Flags.setSExt();
Cameron Zwarich8df6bf52011-03-16 22:20:07 +00001192 else if (ExtendKind == ISD::ZERO_EXTEND)
Kenneth Uildriksc158dde2009-11-11 19:59:24 +00001193 Flags.setZExt();
1194
Dan Gohmanc9403652010-07-07 15:54:55 +00001195 for (unsigned i = 0; i < NumParts; ++i) {
1196 Outs.push_back(ISD::OutputArg(Flags, Parts[i].getValueType(),
1197 /*isfixed=*/true));
1198 OutVals.push_back(Parts[i]);
1199 }
Evan Cheng3927f432009-03-25 20:20:11 +00001200 }
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001201 }
1202 }
Dan Gohman98ca4f22009-08-05 01:29:28 +00001203
1204 bool isVarArg = DAG.getMachineFunction().getFunction()->isVarArg();
Sandeep Patel65c3c8f2009-09-02 08:44:58 +00001205 CallingConv::ID CallConv =
1206 DAG.getMachineFunction().getFunction()->getCallingConv();
Dan Gohman98ca4f22009-08-05 01:29:28 +00001207 Chain = TLI.LowerReturn(Chain, CallConv, isVarArg,
Dan Gohmanc9403652010-07-07 15:54:55 +00001208 Outs, OutVals, getCurDebugLoc(), DAG);
Dan Gohman5e866062009-08-06 15:37:27 +00001209
1210 // Verify that the target's LowerReturn behaved as expected.
Owen Anderson825b72b2009-08-11 20:47:22 +00001211 assert(Chain.getNode() && Chain.getValueType() == MVT::Other &&
Dan Gohman5e866062009-08-06 15:37:27 +00001212 "LowerReturn didn't return a valid chain!");
1213
1214 // Update the DAG with the new chain value resulting from return lowering.
Dan Gohman98ca4f22009-08-05 01:29:28 +00001215 DAG.setRoot(Chain);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001216}
1217
Dan Gohmanad62f532009-04-23 23:13:24 +00001218/// CopyToExportRegsIfNeeded - If the given value has virtual registers
1219/// created for it, emit nodes to copy the value into the virtual
1220/// registers.
Dan Gohman46510a72010-04-15 01:51:59 +00001221void SelectionDAGBuilder::CopyToExportRegsIfNeeded(const Value *V) {
Rafael Espindola3fa82832011-05-13 15:18:06 +00001222 // Skip empty types
1223 if (V->getType()->isEmptyTy())
1224 return;
1225
Dan Gohman33b7a292010-04-16 17:15:02 +00001226 DenseMap<const Value *, unsigned>::iterator VMI = FuncInfo.ValueMap.find(V);
1227 if (VMI != FuncInfo.ValueMap.end()) {
1228 assert(!V->use_empty() && "Unused value assigned virtual registers!");
1229 CopyValueToVirtualRegister(V, VMI->second);
Dan Gohmanad62f532009-04-23 23:13:24 +00001230 }
1231}
1232
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001233/// ExportFromCurrentBlock - If this condition isn't known to be exported from
1234/// the current basic block, add it to ValueMap now so that we'll get a
1235/// CopyTo/FromReg.
Dan Gohman46510a72010-04-15 01:51:59 +00001236void SelectionDAGBuilder::ExportFromCurrentBlock(const Value *V) {
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001237 // No need to export constants.
1238 if (!isa<Instruction>(V) && !isa<Argument>(V)) return;
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00001239
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001240 // Already exported?
1241 if (FuncInfo.isExportedInst(V)) return;
1242
1243 unsigned Reg = FuncInfo.InitializeRegForValue(V);
1244 CopyValueToVirtualRegister(V, Reg);
1245}
1246
Dan Gohman46510a72010-04-15 01:51:59 +00001247bool SelectionDAGBuilder::isExportableFromCurrentBlock(const Value *V,
Dan Gohman2048b852009-11-23 18:04:58 +00001248 const BasicBlock *FromBB) {
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001249 // The operands of the setcc have to be in this block. We don't know
1250 // how to export them from some other block.
Dan Gohman46510a72010-04-15 01:51:59 +00001251 if (const Instruction *VI = dyn_cast<Instruction>(V)) {
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001252 // Can export from current BB.
1253 if (VI->getParent() == FromBB)
1254 return true;
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00001255
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001256 // Is already exported, noop.
1257 return FuncInfo.isExportedInst(V);
1258 }
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00001259
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001260 // If this is an argument, we can export it if the BB is the entry block or
1261 // if it is already exported.
1262 if (isa<Argument>(V)) {
1263 if (FromBB == &FromBB->getParent()->getEntryBlock())
1264 return true;
1265
1266 // Otherwise, can only export this if it is already exported.
1267 return FuncInfo.isExportedInst(V);
1268 }
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00001269
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001270 // Otherwise, constants can always be exported.
1271 return true;
1272}
1273
Jakub Staszak7cc2b072011-06-16 20:22:37 +00001274/// Return branch probability calculated by BranchProbabilityInfo for IR blocks.
1275uint32_t SelectionDAGBuilder::getEdgeWeight(MachineBasicBlock *Src,
1276 MachineBasicBlock *Dst) {
1277 BranchProbabilityInfo *BPI = FuncInfo.BPI;
1278 if (!BPI)
1279 return 0;
1280 BasicBlock *SrcBB = const_cast<BasicBlock*>(Src->getBasicBlock());
1281 BasicBlock *DstBB = const_cast<BasicBlock*>(Dst->getBasicBlock());
1282 return BPI->getEdgeWeight(SrcBB, DstBB);
1283}
1284
1285void SelectionDAGBuilder::addSuccessorWithWeight(MachineBasicBlock *Src,
1286 MachineBasicBlock *Dst) {
1287 uint32_t weight = getEdgeWeight(Src, Dst);
1288 Src->addSuccessor(Dst, weight);
1289}
1290
1291
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001292static bool InBlock(const Value *V, const BasicBlock *BB) {
1293 if (const Instruction *I = dyn_cast<Instruction>(V))
1294 return I->getParent() == BB;
1295 return true;
1296}
1297
Dan Gohmanc2277342008-10-17 21:16:08 +00001298/// EmitBranchForMergedCondition - Helper method for FindMergedConditions.
1299/// This function emits a branch and is used at the leaves of an OR or an
1300/// AND operator tree.
1301///
1302void
Dan Gohman46510a72010-04-15 01:51:59 +00001303SelectionDAGBuilder::EmitBranchForMergedCondition(const Value *Cond,
Dan Gohman2048b852009-11-23 18:04:58 +00001304 MachineBasicBlock *TBB,
1305 MachineBasicBlock *FBB,
Dan Gohman99be8ae2010-04-19 22:41:47 +00001306 MachineBasicBlock *CurBB,
1307 MachineBasicBlock *SwitchBB) {
Dan Gohmanc2277342008-10-17 21:16:08 +00001308 const BasicBlock *BB = CurBB->getBasicBlock();
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001309
Dan Gohmanc2277342008-10-17 21:16:08 +00001310 // If the leaf of the tree is a comparison, merge the condition into
1311 // the caseblock.
Dan Gohman46510a72010-04-15 01:51:59 +00001312 if (const CmpInst *BOp = dyn_cast<CmpInst>(Cond)) {
Dan Gohmanc2277342008-10-17 21:16:08 +00001313 // The operands of the cmp have to be in this block. We don't know
1314 // how to export them from some other block. If this is the first block
1315 // of the sequence, no exporting is needed.
Dan Gohman99be8ae2010-04-19 22:41:47 +00001316 if (CurBB == SwitchBB ||
Dan Gohmanc2277342008-10-17 21:16:08 +00001317 (isExportableFromCurrentBlock(BOp->getOperand(0), BB) &&
1318 isExportableFromCurrentBlock(BOp->getOperand(1), BB))) {
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001319 ISD::CondCode Condition;
Dan Gohman46510a72010-04-15 01:51:59 +00001320 if (const ICmpInst *IC = dyn_cast<ICmpInst>(Cond)) {
Dan Gohman8c1a6ca2008-10-17 18:18:45 +00001321 Condition = getICmpCondCode(IC->getPredicate());
Dan Gohman46510a72010-04-15 01:51:59 +00001322 } else if (const FCmpInst *FC = dyn_cast<FCmpInst>(Cond)) {
Dan Gohman8c1a6ca2008-10-17 18:18:45 +00001323 Condition = getFCmpCondCode(FC->getPredicate());
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001324 } else {
1325 Condition = ISD::SETEQ; // silence warning.
Torok Edwinc23197a2009-07-14 16:55:14 +00001326 llvm_unreachable("Unknown compare instruction");
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001327 }
Dan Gohmanc2277342008-10-17 21:16:08 +00001328
1329 CaseBlock CB(Condition, BOp->getOperand(0),
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001330 BOp->getOperand(1), NULL, TBB, FBB, CurBB);
1331 SwitchCases.push_back(CB);
1332 return;
1333 }
Dan Gohmanc2277342008-10-17 21:16:08 +00001334 }
1335
1336 // Create a CaseBlock record representing this branch.
Owen Anderson5defacc2009-07-31 17:39:07 +00001337 CaseBlock CB(ISD::SETEQ, Cond, ConstantInt::getTrue(*DAG.getContext()),
Dan Gohmanc2277342008-10-17 21:16:08 +00001338 NULL, TBB, FBB, CurBB);
1339 SwitchCases.push_back(CB);
1340}
1341
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00001342/// FindMergedConditions - If Cond is an expression like
Dan Gohman46510a72010-04-15 01:51:59 +00001343void SelectionDAGBuilder::FindMergedConditions(const Value *Cond,
Dan Gohman2048b852009-11-23 18:04:58 +00001344 MachineBasicBlock *TBB,
1345 MachineBasicBlock *FBB,
1346 MachineBasicBlock *CurBB,
Dan Gohman99be8ae2010-04-19 22:41:47 +00001347 MachineBasicBlock *SwitchBB,
Dan Gohman2048b852009-11-23 18:04:58 +00001348 unsigned Opc) {
Dan Gohmanc2277342008-10-17 21:16:08 +00001349 // If this node is not part of the or/and tree, emit it as a branch.
Dan Gohman46510a72010-04-15 01:51:59 +00001350 const Instruction *BOp = dyn_cast<Instruction>(Cond);
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00001351 if (!BOp || !(isa<BinaryOperator>(BOp) || isa<CmpInst>(BOp)) ||
Dan Gohmanc2277342008-10-17 21:16:08 +00001352 (unsigned)BOp->getOpcode() != Opc || !BOp->hasOneUse() ||
1353 BOp->getParent() != CurBB->getBasicBlock() ||
1354 !InBlock(BOp->getOperand(0), CurBB->getBasicBlock()) ||
1355 !InBlock(BOp->getOperand(1), CurBB->getBasicBlock())) {
Dan Gohman99be8ae2010-04-19 22:41:47 +00001356 EmitBranchForMergedCondition(Cond, TBB, FBB, CurBB, SwitchBB);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001357 return;
1358 }
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00001359
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001360 // Create TmpBB after CurBB.
1361 MachineFunction::iterator BBI = CurBB;
1362 MachineFunction &MF = DAG.getMachineFunction();
1363 MachineBasicBlock *TmpBB = MF.CreateMachineBasicBlock(CurBB->getBasicBlock());
1364 CurBB->getParent()->insert(++BBI, TmpBB);
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00001365
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001366 if (Opc == Instruction::Or) {
1367 // Codegen X | Y as:
1368 // jmp_if_X TBB
1369 // jmp TmpBB
1370 // TmpBB:
1371 // jmp_if_Y TBB
1372 // jmp FBB
1373 //
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00001374
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001375 // Emit the LHS condition.
Dan Gohman99be8ae2010-04-19 22:41:47 +00001376 FindMergedConditions(BOp->getOperand(0), TBB, TmpBB, CurBB, SwitchBB, Opc);
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00001377
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001378 // Emit the RHS condition into TmpBB.
Dan Gohman99be8ae2010-04-19 22:41:47 +00001379 FindMergedConditions(BOp->getOperand(1), TBB, FBB, TmpBB, SwitchBB, Opc);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001380 } else {
1381 assert(Opc == Instruction::And && "Unknown merge op!");
1382 // Codegen X & Y as:
1383 // jmp_if_X TmpBB
1384 // jmp FBB
1385 // TmpBB:
1386 // jmp_if_Y TBB
1387 // jmp FBB
1388 //
1389 // This requires creation of TmpBB after CurBB.
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00001390
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001391 // Emit the LHS condition.
Dan Gohman99be8ae2010-04-19 22:41:47 +00001392 FindMergedConditions(BOp->getOperand(0), TmpBB, FBB, CurBB, SwitchBB, Opc);
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00001393
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001394 // Emit the RHS condition into TmpBB.
Dan Gohman99be8ae2010-04-19 22:41:47 +00001395 FindMergedConditions(BOp->getOperand(1), TBB, FBB, TmpBB, SwitchBB, Opc);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001396 }
1397}
1398
1399/// If the set of cases should be emitted as a series of branches, return true.
1400/// If we should emit this as a bunch of and/or'd together conditions, return
1401/// false.
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00001402bool
Dan Gohman2048b852009-11-23 18:04:58 +00001403SelectionDAGBuilder::ShouldEmitAsBranches(const std::vector<CaseBlock> &Cases){
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001404 if (Cases.size() != 2) return true;
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00001405
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001406 // If this is two comparisons of the same values or'd or and'd together, they
1407 // will get folded into a single comparison, so don't emit two blocks.
1408 if ((Cases[0].CmpLHS == Cases[1].CmpLHS &&
1409 Cases[0].CmpRHS == Cases[1].CmpRHS) ||
1410 (Cases[0].CmpRHS == Cases[1].CmpLHS &&
1411 Cases[0].CmpLHS == Cases[1].CmpRHS)) {
1412 return false;
1413 }
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00001414
Chris Lattner133ce872010-01-02 00:00:03 +00001415 // Handle: (X != null) | (Y != null) --> (X|Y) != 0
1416 // Handle: (X == null) & (Y == null) --> (X|Y) == 0
1417 if (Cases[0].CmpRHS == Cases[1].CmpRHS &&
1418 Cases[0].CC == Cases[1].CC &&
1419 isa<Constant>(Cases[0].CmpRHS) &&
1420 cast<Constant>(Cases[0].CmpRHS)->isNullValue()) {
1421 if (Cases[0].CC == ISD::SETEQ && Cases[0].TrueBB == Cases[1].ThisBB)
1422 return false;
1423 if (Cases[0].CC == ISD::SETNE && Cases[0].FalseBB == Cases[1].ThisBB)
1424 return false;
1425 }
Michael J. Spencere70c5262010-10-16 08:25:21 +00001426
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001427 return true;
1428}
1429
Dan Gohman46510a72010-04-15 01:51:59 +00001430void SelectionDAGBuilder::visitBr(const BranchInst &I) {
Dan Gohman84023e02010-07-10 09:00:22 +00001431 MachineBasicBlock *BrMBB = FuncInfo.MBB;
Dan Gohman99be8ae2010-04-19 22:41:47 +00001432
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001433 // Update machine-CFG edges.
1434 MachineBasicBlock *Succ0MBB = FuncInfo.MBBMap[I.getSuccessor(0)];
1435
1436 // Figure out which block is immediately after the current one.
1437 MachineBasicBlock *NextBlock = 0;
Dan Gohman99be8ae2010-04-19 22:41:47 +00001438 MachineFunction::iterator BBI = BrMBB;
Dan Gohman0d24bfb2009-08-15 02:06:22 +00001439 if (++BBI != FuncInfo.MF->end())
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001440 NextBlock = BBI;
1441
1442 if (I.isUnconditional()) {
1443 // Update machine-CFG edges.
Dan Gohman99be8ae2010-04-19 22:41:47 +00001444 BrMBB->addSuccessor(Succ0MBB);
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00001445
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001446 // If this is not a fall-through branch, emit the branch.
Bill Wendling4533cac2010-01-28 21:51:40 +00001447 if (Succ0MBB != NextBlock)
1448 DAG.setRoot(DAG.getNode(ISD::BR, getCurDebugLoc(),
Owen Anderson825b72b2009-08-11 20:47:22 +00001449 MVT::Other, getControlRoot(),
Bill Wendling4533cac2010-01-28 21:51:40 +00001450 DAG.getBasicBlock(Succ0MBB)));
Bill Wendling3b7a41c2009-12-21 19:59:38 +00001451
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001452 return;
1453 }
1454
1455 // If this condition is one of the special cases we handle, do special stuff
1456 // now.
Dan Gohman46510a72010-04-15 01:51:59 +00001457 const Value *CondVal = I.getCondition();
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001458 MachineBasicBlock *Succ1MBB = FuncInfo.MBBMap[I.getSuccessor(1)];
1459
1460 // If this is a series of conditions that are or'd or and'd together, emit
1461 // this as a sequence of branches instead of setcc's with and/or operations.
Chris Lattnerde189be2010-11-30 18:12:52 +00001462 // As long as jumps are not expensive, this should improve performance.
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001463 // For example, instead of something like:
1464 // cmp A, B
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00001465 // C = seteq
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001466 // cmp D, E
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00001467 // F = setle
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001468 // or C, F
1469 // jnz foo
1470 // Emit:
1471 // cmp A, B
1472 // je foo
1473 // cmp D, E
1474 // jle foo
1475 //
Dan Gohman46510a72010-04-15 01:51:59 +00001476 if (const BinaryOperator *BOp = dyn_cast<BinaryOperator>(CondVal)) {
Owen Anderson95771af2011-02-25 21:41:48 +00001477 if (!TLI.isJumpExpensive() &&
Chris Lattnerde189be2010-11-30 18:12:52 +00001478 BOp->hasOneUse() &&
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001479 (BOp->getOpcode() == Instruction::And ||
1480 BOp->getOpcode() == Instruction::Or)) {
Dan Gohman99be8ae2010-04-19 22:41:47 +00001481 FindMergedConditions(BOp, Succ0MBB, Succ1MBB, BrMBB, BrMBB,
1482 BOp->getOpcode());
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001483 // If the compares in later blocks need to use values not currently
1484 // exported from this block, export them now. This block should always
1485 // be the first entry.
Dan Gohman99be8ae2010-04-19 22:41:47 +00001486 assert(SwitchCases[0].ThisBB == BrMBB && "Unexpected lowering!");
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00001487
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001488 // Allow some cases to be rejected.
1489 if (ShouldEmitAsBranches(SwitchCases)) {
1490 for (unsigned i = 1, e = SwitchCases.size(); i != e; ++i) {
1491 ExportFromCurrentBlock(SwitchCases[i].CmpLHS);
1492 ExportFromCurrentBlock(SwitchCases[i].CmpRHS);
1493 }
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00001494
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001495 // Emit the branch for this block.
Dan Gohman99be8ae2010-04-19 22:41:47 +00001496 visitSwitchCase(SwitchCases[0], BrMBB);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001497 SwitchCases.erase(SwitchCases.begin());
1498 return;
1499 }
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00001500
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001501 // Okay, we decided not to do this, remove any inserted MBB's and clear
1502 // SwitchCases.
1503 for (unsigned i = 1, e = SwitchCases.size(); i != e; ++i)
Dan Gohman0d24bfb2009-08-15 02:06:22 +00001504 FuncInfo.MF->erase(SwitchCases[i].ThisBB);
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00001505
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001506 SwitchCases.clear();
1507 }
1508 }
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00001509
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001510 // Create a CaseBlock record representing this branch.
Owen Anderson5defacc2009-07-31 17:39:07 +00001511 CaseBlock CB(ISD::SETEQ, CondVal, ConstantInt::getTrue(*DAG.getContext()),
Dan Gohman99be8ae2010-04-19 22:41:47 +00001512 NULL, Succ0MBB, Succ1MBB, BrMBB);
Bill Wendling3b7a41c2009-12-21 19:59:38 +00001513
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001514 // Use visitSwitchCase to actually insert the fast branch sequence for this
1515 // cond branch.
Dan Gohman99be8ae2010-04-19 22:41:47 +00001516 visitSwitchCase(CB, BrMBB);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001517}
1518
1519/// visitSwitchCase - Emits the necessary code to represent a single node in
1520/// the binary search tree resulting from lowering a switch instruction.
Dan Gohman99be8ae2010-04-19 22:41:47 +00001521void SelectionDAGBuilder::visitSwitchCase(CaseBlock &CB,
1522 MachineBasicBlock *SwitchBB) {
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001523 SDValue Cond;
1524 SDValue CondLHS = getValue(CB.CmpLHS);
Dale Johannesenf5d97892009-02-04 01:48:28 +00001525 DebugLoc dl = getCurDebugLoc();
Anton Korobeynikov23218582008-12-23 22:25:27 +00001526
1527 // Build the setcc now.
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001528 if (CB.CmpMHS == NULL) {
1529 // Fold "(X == true)" to X and "(X == false)" to !X to
1530 // handle common cases produced by branch lowering.
Owen Anderson5defacc2009-07-31 17:39:07 +00001531 if (CB.CmpRHS == ConstantInt::getTrue(*DAG.getContext()) &&
Owen Andersonf53c3712009-07-21 02:47:59 +00001532 CB.CC == ISD::SETEQ)
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001533 Cond = CondLHS;
Owen Anderson5defacc2009-07-31 17:39:07 +00001534 else if (CB.CmpRHS == ConstantInt::getFalse(*DAG.getContext()) &&
Owen Andersonf53c3712009-07-21 02:47:59 +00001535 CB.CC == ISD::SETEQ) {
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001536 SDValue True = DAG.getConstant(1, CondLHS.getValueType());
Dale Johannesenf5d97892009-02-04 01:48:28 +00001537 Cond = DAG.getNode(ISD::XOR, dl, CondLHS.getValueType(), CondLHS, True);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001538 } else
Owen Anderson825b72b2009-08-11 20:47:22 +00001539 Cond = DAG.getSetCC(dl, MVT::i1, CondLHS, getValue(CB.CmpRHS), CB.CC);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001540 } else {
1541 assert(CB.CC == ISD::SETLE && "Can handle only LE ranges now");
1542
Anton Korobeynikov23218582008-12-23 22:25:27 +00001543 const APInt& Low = cast<ConstantInt>(CB.CmpLHS)->getValue();
1544 const APInt& High = cast<ConstantInt>(CB.CmpRHS)->getValue();
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001545
1546 SDValue CmpOp = getValue(CB.CmpMHS);
Owen Andersone50ed302009-08-10 22:56:29 +00001547 EVT VT = CmpOp.getValueType();
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001548
1549 if (cast<ConstantInt>(CB.CmpLHS)->isMinValue(true)) {
Owen Anderson825b72b2009-08-11 20:47:22 +00001550 Cond = DAG.getSetCC(dl, MVT::i1, CmpOp, DAG.getConstant(High, VT),
Dale Johannesenf5d97892009-02-04 01:48:28 +00001551 ISD::SETLE);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001552 } else {
Dale Johannesenf5d97892009-02-04 01:48:28 +00001553 SDValue SUB = DAG.getNode(ISD::SUB, dl,
Dale Johannesenfa42dea2009-01-30 01:34:22 +00001554 VT, CmpOp, DAG.getConstant(Low, VT));
Owen Anderson825b72b2009-08-11 20:47:22 +00001555 Cond = DAG.getSetCC(dl, MVT::i1, SUB,
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001556 DAG.getConstant(High-Low, VT), ISD::SETULE);
1557 }
1558 }
Anton Korobeynikov23218582008-12-23 22:25:27 +00001559
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001560 // Update successor info
Jakub Staszak7cc2b072011-06-16 20:22:37 +00001561 addSuccessorWithWeight(SwitchBB, CB.TrueBB);
1562 addSuccessorWithWeight(SwitchBB, CB.FalseBB);
Anton Korobeynikov23218582008-12-23 22:25:27 +00001563
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001564 // Set NextBlock to be the MBB immediately after the current one, if any.
1565 // This is used to avoid emitting unnecessary branches to the next block.
1566 MachineBasicBlock *NextBlock = 0;
Dan Gohman99be8ae2010-04-19 22:41:47 +00001567 MachineFunction::iterator BBI = SwitchBB;
Dan Gohman0d24bfb2009-08-15 02:06:22 +00001568 if (++BBI != FuncInfo.MF->end())
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001569 NextBlock = BBI;
Anton Korobeynikov23218582008-12-23 22:25:27 +00001570
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001571 // If the lhs block is the next block, invert the condition so that we can
1572 // fall through to the lhs instead of the rhs block.
1573 if (CB.TrueBB == NextBlock) {
1574 std::swap(CB.TrueBB, CB.FalseBB);
1575 SDValue True = DAG.getConstant(1, Cond.getValueType());
Dale Johannesenf5d97892009-02-04 01:48:28 +00001576 Cond = DAG.getNode(ISD::XOR, dl, Cond.getValueType(), Cond, True);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001577 }
Bill Wendling3b7a41c2009-12-21 19:59:38 +00001578
Dale Johannesenf5d97892009-02-04 01:48:28 +00001579 SDValue BrCond = DAG.getNode(ISD::BRCOND, dl,
Owen Anderson825b72b2009-08-11 20:47:22 +00001580 MVT::Other, getControlRoot(), Cond,
Dale Johannesenfa42dea2009-01-30 01:34:22 +00001581 DAG.getBasicBlock(CB.TrueBB));
Bill Wendling87710f02009-12-21 23:47:40 +00001582
Evan Cheng266a99d2010-09-23 06:51:55 +00001583 // Insert the false branch. Do this even if it's a fall through branch,
1584 // this makes it easier to do DAG optimizations which require inverting
1585 // the branch condition.
1586 BrCond = DAG.getNode(ISD::BR, dl, MVT::Other, BrCond,
1587 DAG.getBasicBlock(CB.FalseBB));
Bill Wendling3b7a41c2009-12-21 19:59:38 +00001588
1589 DAG.setRoot(BrCond);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001590}
1591
1592/// visitJumpTable - Emit JumpTable node in the current MBB
Dan Gohman2048b852009-11-23 18:04:58 +00001593void SelectionDAGBuilder::visitJumpTable(JumpTable &JT) {
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001594 // Emit the code for the jump table
1595 assert(JT.Reg != -1U && "Should lower JT Header first!");
Owen Andersone50ed302009-08-10 22:56:29 +00001596 EVT PTy = TLI.getPointerTy();
Dale Johannesena04b7572009-02-03 23:04:43 +00001597 SDValue Index = DAG.getCopyFromReg(getControlRoot(), getCurDebugLoc(),
1598 JT.Reg, PTy);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001599 SDValue Table = DAG.getJumpTable(JT.JTI, PTy);
Bill Wendling3b7a41c2009-12-21 19:59:38 +00001600 SDValue BrJumpTable = DAG.getNode(ISD::BR_JT, getCurDebugLoc(),
1601 MVT::Other, Index.getValue(1),
1602 Table, Index);
1603 DAG.setRoot(BrJumpTable);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001604}
1605
1606/// visitJumpTableHeader - This function emits necessary code to produce index
1607/// in the JumpTable from switch case.
Dan Gohman2048b852009-11-23 18:04:58 +00001608void SelectionDAGBuilder::visitJumpTableHeader(JumpTable &JT,
Dan Gohman99be8ae2010-04-19 22:41:47 +00001609 JumpTableHeader &JTH,
1610 MachineBasicBlock *SwitchBB) {
Anton Korobeynikov1bfe2372008-12-23 22:25:45 +00001611 // Subtract the lowest switch case value from the value being switched on and
1612 // conditional branch to default mbb if the result is greater than the
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001613 // difference between smallest and largest cases.
1614 SDValue SwitchOp = getValue(JTH.SValue);
Owen Andersone50ed302009-08-10 22:56:29 +00001615 EVT VT = SwitchOp.getValueType();
Bill Wendling87710f02009-12-21 23:47:40 +00001616 SDValue Sub = DAG.getNode(ISD::SUB, getCurDebugLoc(), VT, SwitchOp,
Anton Korobeynikov1bfe2372008-12-23 22:25:45 +00001617 DAG.getConstant(JTH.First, VT));
Anton Korobeynikov23218582008-12-23 22:25:27 +00001618
Anton Korobeynikov1bfe2372008-12-23 22:25:45 +00001619 // The SDNode we just created, which holds the value being switched on minus
Dan Gohmanf451cb82010-02-10 16:03:48 +00001620 // the smallest case value, needs to be copied to a virtual register so it
Anton Korobeynikov1bfe2372008-12-23 22:25:45 +00001621 // can be used as an index into the jump table in a subsequent basic block.
1622 // This value may be smaller or larger than the target's pointer type, and
1623 // therefore require extension or truncating.
Bill Wendling87710f02009-12-21 23:47:40 +00001624 SwitchOp = DAG.getZExtOrTrunc(Sub, getCurDebugLoc(), TLI.getPointerTy());
Anton Korobeynikov23218582008-12-23 22:25:27 +00001625
Dan Gohman89496d02010-07-02 00:10:16 +00001626 unsigned JumpTableReg = FuncInfo.CreateReg(TLI.getPointerTy());
Dale Johannesena04b7572009-02-03 23:04:43 +00001627 SDValue CopyTo = DAG.getCopyToReg(getControlRoot(), getCurDebugLoc(),
1628 JumpTableReg, SwitchOp);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001629 JT.Reg = JumpTableReg;
1630
Anton Korobeynikov1bfe2372008-12-23 22:25:45 +00001631 // Emit the range check for the jump table, and branch to the default block
1632 // for the switch statement if the value being switched on exceeds the largest
1633 // case in the switch.
Dale Johannesenf5d97892009-02-04 01:48:28 +00001634 SDValue CMP = DAG.getSetCC(getCurDebugLoc(),
Bill Wendling87710f02009-12-21 23:47:40 +00001635 TLI.getSetCCResultType(Sub.getValueType()), Sub,
Anton Korobeynikov1bfe2372008-12-23 22:25:45 +00001636 DAG.getConstant(JTH.Last-JTH.First,VT),
1637 ISD::SETUGT);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001638
1639 // Set NextBlock to be the MBB immediately after the current one, if any.
1640 // This is used to avoid emitting unnecessary branches to the next block.
1641 MachineBasicBlock *NextBlock = 0;
Dan Gohman99be8ae2010-04-19 22:41:47 +00001642 MachineFunction::iterator BBI = SwitchBB;
Bill Wendling87710f02009-12-21 23:47:40 +00001643
Dan Gohman0d24bfb2009-08-15 02:06:22 +00001644 if (++BBI != FuncInfo.MF->end())
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001645 NextBlock = BBI;
1646
Dale Johannesen66978ee2009-01-31 02:22:37 +00001647 SDValue BrCond = DAG.getNode(ISD::BRCOND, getCurDebugLoc(),
Owen Anderson825b72b2009-08-11 20:47:22 +00001648 MVT::Other, CopyTo, CMP,
Anton Korobeynikov1bfe2372008-12-23 22:25:45 +00001649 DAG.getBasicBlock(JT.Default));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001650
Bill Wendling4533cac2010-01-28 21:51:40 +00001651 if (JT.MBB != NextBlock)
Bill Wendling3b7a41c2009-12-21 19:59:38 +00001652 BrCond = DAG.getNode(ISD::BR, getCurDebugLoc(), MVT::Other, BrCond,
1653 DAG.getBasicBlock(JT.MBB));
Bill Wendling3b7a41c2009-12-21 19:59:38 +00001654
Bill Wendling87710f02009-12-21 23:47:40 +00001655 DAG.setRoot(BrCond);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001656}
1657
1658/// visitBitTestHeader - This function emits necessary code to produce value
1659/// suitable for "bit tests"
Dan Gohman99be8ae2010-04-19 22:41:47 +00001660void SelectionDAGBuilder::visitBitTestHeader(BitTestBlock &B,
1661 MachineBasicBlock *SwitchBB) {
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001662 // Subtract the minimum value
1663 SDValue SwitchOp = getValue(B.SValue);
Owen Andersone50ed302009-08-10 22:56:29 +00001664 EVT VT = SwitchOp.getValueType();
Bill Wendling87710f02009-12-21 23:47:40 +00001665 SDValue Sub = DAG.getNode(ISD::SUB, getCurDebugLoc(), VT, SwitchOp,
Anton Korobeynikov1bfe2372008-12-23 22:25:45 +00001666 DAG.getConstant(B.First, VT));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001667
1668 // Check range
Dale Johannesenf5d97892009-02-04 01:48:28 +00001669 SDValue RangeCmp = DAG.getSetCC(getCurDebugLoc(),
Bill Wendling87710f02009-12-21 23:47:40 +00001670 TLI.getSetCCResultType(Sub.getValueType()),
1671 Sub, DAG.getConstant(B.Range, VT),
Anton Korobeynikov1bfe2372008-12-23 22:25:45 +00001672 ISD::SETUGT);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001673
Evan Chengd08e5b42011-01-06 01:02:44 +00001674 // Determine the type of the test operands.
1675 bool UsePtrType = false;
1676 if (!TLI.isTypeLegal(VT))
1677 UsePtrType = true;
1678 else {
1679 for (unsigned i = 0, e = B.Cases.size(); i != e; ++i)
1680 if ((uint64_t)((int64_t)B.Cases[i].Mask >> VT.getSizeInBits()) + 1 >= 2) {
1681 // Switch table case range are encoded into series of masks.
1682 // Just use pointer type, it's guaranteed to fit.
1683 UsePtrType = true;
1684 break;
1685 }
1686 }
1687 if (UsePtrType) {
1688 VT = TLI.getPointerTy();
1689 Sub = DAG.getZExtOrTrunc(Sub, getCurDebugLoc(), VT);
1690 }
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001691
Evan Chengd08e5b42011-01-06 01:02:44 +00001692 B.RegVT = VT;
1693 B.Reg = FuncInfo.CreateReg(VT);
Dale Johannesena04b7572009-02-03 23:04:43 +00001694 SDValue CopyTo = DAG.getCopyToReg(getControlRoot(), getCurDebugLoc(),
Evan Chengd08e5b42011-01-06 01:02:44 +00001695 B.Reg, Sub);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001696
1697 // Set NextBlock to be the MBB immediately after the current one, if any.
1698 // This is used to avoid emitting unnecessary branches to the next block.
1699 MachineBasicBlock *NextBlock = 0;
Dan Gohman99be8ae2010-04-19 22:41:47 +00001700 MachineFunction::iterator BBI = SwitchBB;
Dan Gohman0d24bfb2009-08-15 02:06:22 +00001701 if (++BBI != FuncInfo.MF->end())
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001702 NextBlock = BBI;
1703
1704 MachineBasicBlock* MBB = B.Cases[0].ThisBB;
1705
Jakub Staszak7cc2b072011-06-16 20:22:37 +00001706 addSuccessorWithWeight(SwitchBB, B.Default);
1707 addSuccessorWithWeight(SwitchBB, MBB);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001708
Dale Johannesen66978ee2009-01-31 02:22:37 +00001709 SDValue BrRange = DAG.getNode(ISD::BRCOND, getCurDebugLoc(),
Owen Anderson825b72b2009-08-11 20:47:22 +00001710 MVT::Other, CopyTo, RangeCmp,
Anton Korobeynikov1bfe2372008-12-23 22:25:45 +00001711 DAG.getBasicBlock(B.Default));
Anton Korobeynikov23218582008-12-23 22:25:27 +00001712
Evan Cheng8c1f4322010-09-23 18:32:19 +00001713 if (MBB != NextBlock)
1714 BrRange = DAG.getNode(ISD::BR, getCurDebugLoc(), MVT::Other, CopyTo,
1715 DAG.getBasicBlock(MBB));
Bill Wendling3b7a41c2009-12-21 19:59:38 +00001716
Bill Wendling87710f02009-12-21 23:47:40 +00001717 DAG.setRoot(BrRange);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001718}
1719
1720/// visitBitTestCase - this function produces one "bit test"
Evan Chengd08e5b42011-01-06 01:02:44 +00001721void SelectionDAGBuilder::visitBitTestCase(BitTestBlock &BB,
1722 MachineBasicBlock* NextMBB,
Dan Gohman2048b852009-11-23 18:04:58 +00001723 unsigned Reg,
Dan Gohman99be8ae2010-04-19 22:41:47 +00001724 BitTestCase &B,
1725 MachineBasicBlock *SwitchBB) {
Evan Chengd08e5b42011-01-06 01:02:44 +00001726 EVT VT = BB.RegVT;
1727 SDValue ShiftOp = DAG.getCopyFromReg(getControlRoot(), getCurDebugLoc(),
1728 Reg, VT);
Dan Gohman8e0163a2010-06-24 02:06:24 +00001729 SDValue Cmp;
1730 if (CountPopulation_64(B.Mask) == 1) {
1731 // Testing for a single bit; just compare the shift count with what it
1732 // would need to be to shift a 1 bit in that position.
1733 Cmp = DAG.getSetCC(getCurDebugLoc(),
Evan Chengd08e5b42011-01-06 01:02:44 +00001734 TLI.getSetCCResultType(VT),
Dan Gohman8e0163a2010-06-24 02:06:24 +00001735 ShiftOp,
Evan Chengd08e5b42011-01-06 01:02:44 +00001736 DAG.getConstant(CountTrailingZeros_64(B.Mask), VT),
Dan Gohman8e0163a2010-06-24 02:06:24 +00001737 ISD::SETEQ);
1738 } else {
1739 // Make desired shift
Evan Chengd08e5b42011-01-06 01:02:44 +00001740 SDValue SwitchVal = DAG.getNode(ISD::SHL, getCurDebugLoc(), VT,
1741 DAG.getConstant(1, VT), ShiftOp);
Anton Korobeynikov23218582008-12-23 22:25:27 +00001742
Dan Gohman8e0163a2010-06-24 02:06:24 +00001743 // Emit bit tests and jumps
1744 SDValue AndOp = DAG.getNode(ISD::AND, getCurDebugLoc(),
Evan Chengd08e5b42011-01-06 01:02:44 +00001745 VT, SwitchVal, DAG.getConstant(B.Mask, VT));
Dan Gohman8e0163a2010-06-24 02:06:24 +00001746 Cmp = DAG.getSetCC(getCurDebugLoc(),
Evan Chengd08e5b42011-01-06 01:02:44 +00001747 TLI.getSetCCResultType(VT),
1748 AndOp, DAG.getConstant(0, VT),
Dan Gohman8e0163a2010-06-24 02:06:24 +00001749 ISD::SETNE);
1750 }
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001751
Jakub Staszak7cc2b072011-06-16 20:22:37 +00001752 addSuccessorWithWeight(SwitchBB, B.TargetBB);
1753 addSuccessorWithWeight(SwitchBB, NextMBB);
Anton Korobeynikov23218582008-12-23 22:25:27 +00001754
Dale Johannesen66978ee2009-01-31 02:22:37 +00001755 SDValue BrAnd = DAG.getNode(ISD::BRCOND, getCurDebugLoc(),
Owen Anderson825b72b2009-08-11 20:47:22 +00001756 MVT::Other, getControlRoot(),
Dan Gohman8e0163a2010-06-24 02:06:24 +00001757 Cmp, DAG.getBasicBlock(B.TargetBB));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001758
1759 // Set NextBlock to be the MBB immediately after the current one, if any.
1760 // This is used to avoid emitting unnecessary branches to the next block.
1761 MachineBasicBlock *NextBlock = 0;
Dan Gohman99be8ae2010-04-19 22:41:47 +00001762 MachineFunction::iterator BBI = SwitchBB;
Dan Gohman0d24bfb2009-08-15 02:06:22 +00001763 if (++BBI != FuncInfo.MF->end())
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001764 NextBlock = BBI;
1765
Evan Cheng8c1f4322010-09-23 18:32:19 +00001766 if (NextMBB != NextBlock)
1767 BrAnd = DAG.getNode(ISD::BR, getCurDebugLoc(), MVT::Other, BrAnd,
1768 DAG.getBasicBlock(NextMBB));
Bill Wendling0777e922009-12-21 21:59:52 +00001769
Bill Wendling87710f02009-12-21 23:47:40 +00001770 DAG.setRoot(BrAnd);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001771}
1772
Dan Gohman46510a72010-04-15 01:51:59 +00001773void SelectionDAGBuilder::visitInvoke(const InvokeInst &I) {
Dan Gohman84023e02010-07-10 09:00:22 +00001774 MachineBasicBlock *InvokeMBB = FuncInfo.MBB;
Dan Gohman99be8ae2010-04-19 22:41:47 +00001775
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001776 // Retrieve successors.
1777 MachineBasicBlock *Return = FuncInfo.MBBMap[I.getSuccessor(0)];
1778 MachineBasicBlock *LandingPad = FuncInfo.MBBMap[I.getSuccessor(1)];
1779
Gabor Greifb67e6b32009-01-15 11:10:44 +00001780 const Value *Callee(I.getCalledValue());
1781 if (isa<InlineAsm>(Callee))
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001782 visitInlineAsm(&I);
1783 else
Gabor Greifb67e6b32009-01-15 11:10:44 +00001784 LowerCallTo(&I, getValue(Callee), false, LandingPad);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001785
1786 // If the value of the invoke is used outside of its defining block, make it
1787 // available as a virtual register.
Dan Gohmanad62f532009-04-23 23:13:24 +00001788 CopyToExportRegsIfNeeded(&I);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001789
1790 // Update successor info
Dan Gohman99be8ae2010-04-19 22:41:47 +00001791 InvokeMBB->addSuccessor(Return);
1792 InvokeMBB->addSuccessor(LandingPad);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001793
1794 // Drop into normal successor.
Bill Wendling4533cac2010-01-28 21:51:40 +00001795 DAG.setRoot(DAG.getNode(ISD::BR, getCurDebugLoc(),
1796 MVT::Other, getControlRoot(),
1797 DAG.getBasicBlock(Return)));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001798}
1799
Dan Gohman46510a72010-04-15 01:51:59 +00001800void SelectionDAGBuilder::visitUnwind(const UnwindInst &I) {
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001801}
1802
1803/// handleSmallSwitchCaseRange - Emit a series of specific tests (suitable for
1804/// small case ranges).
Dan Gohman2048b852009-11-23 18:04:58 +00001805bool SelectionDAGBuilder::handleSmallSwitchRange(CaseRec& CR,
1806 CaseRecVector& WorkList,
Dan Gohman46510a72010-04-15 01:51:59 +00001807 const Value* SV,
Dan Gohman99be8ae2010-04-19 22:41:47 +00001808 MachineBasicBlock *Default,
1809 MachineBasicBlock *SwitchBB) {
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001810 Case& BackCase = *(CR.Range.second-1);
Anton Korobeynikov23218582008-12-23 22:25:27 +00001811
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001812 // Size is the number of Cases represented by this range.
Anton Korobeynikov23218582008-12-23 22:25:27 +00001813 size_t Size = CR.Range.second - CR.Range.first;
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001814 if (Size > 3)
Anton Korobeynikov23218582008-12-23 22:25:27 +00001815 return false;
1816
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001817 // Get the MachineFunction which holds the current MBB. This is used when
1818 // inserting any additional MBBs necessary to represent the switch.
Dan Gohman0d24bfb2009-08-15 02:06:22 +00001819 MachineFunction *CurMF = FuncInfo.MF;
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001820
1821 // Figure out which block is immediately after the current one.
1822 MachineBasicBlock *NextBlock = 0;
1823 MachineFunction::iterator BBI = CR.CaseBB;
1824
Dan Gohman0d24bfb2009-08-15 02:06:22 +00001825 if (++BBI != FuncInfo.MF->end())
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001826 NextBlock = BBI;
1827
Benjamin Kramerce750f02010-11-22 09:45:38 +00001828 // If any two of the cases has the same destination, and if one value
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001829 // is the same as the other, but has one bit unset that the other has set,
1830 // use bit manipulation to do two compares at once. For example:
1831 // "if (X == 6 || X == 4)" -> "if ((X|2) == 6)"
Benjamin Kramerce750f02010-11-22 09:45:38 +00001832 // TODO: This could be extended to merge any 2 cases in switches with 3 cases.
1833 // TODO: Handle cases where CR.CaseBB != SwitchBB.
1834 if (Size == 2 && CR.CaseBB == SwitchBB) {
1835 Case &Small = *CR.Range.first;
1836 Case &Big = *(CR.Range.second-1);
1837
1838 if (Small.Low == Small.High && Big.Low == Big.High && Small.BB == Big.BB) {
1839 const APInt& SmallValue = cast<ConstantInt>(Small.Low)->getValue();
1840 const APInt& BigValue = cast<ConstantInt>(Big.Low)->getValue();
1841
1842 // Check that there is only one bit different.
1843 if (BigValue.countPopulation() == SmallValue.countPopulation() + 1 &&
1844 (SmallValue | BigValue) == BigValue) {
1845 // Isolate the common bit.
1846 APInt CommonBit = BigValue & ~SmallValue;
1847 assert((SmallValue | CommonBit) == BigValue &&
1848 CommonBit.countPopulation() == 1 && "Not a common bit?");
1849
1850 SDValue CondLHS = getValue(SV);
1851 EVT VT = CondLHS.getValueType();
1852 DebugLoc DL = getCurDebugLoc();
1853
1854 SDValue Or = DAG.getNode(ISD::OR, DL, VT, CondLHS,
1855 DAG.getConstant(CommonBit, VT));
1856 SDValue Cond = DAG.getSetCC(DL, MVT::i1,
1857 Or, DAG.getConstant(BigValue, VT),
1858 ISD::SETEQ);
1859
1860 // Update successor info.
1861 SwitchBB->addSuccessor(Small.BB);
1862 SwitchBB->addSuccessor(Default);
1863
1864 // Insert the true branch.
1865 SDValue BrCond = DAG.getNode(ISD::BRCOND, DL, MVT::Other,
1866 getControlRoot(), Cond,
1867 DAG.getBasicBlock(Small.BB));
1868
1869 // Insert the false branch.
1870 BrCond = DAG.getNode(ISD::BR, DL, MVT::Other, BrCond,
1871 DAG.getBasicBlock(Default));
1872
1873 DAG.setRoot(BrCond);
1874 return true;
1875 }
1876 }
1877 }
Anton Korobeynikov23218582008-12-23 22:25:27 +00001878
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001879 // Rearrange the case blocks so that the last one falls through if possible.
1880 if (NextBlock && Default != NextBlock && BackCase.BB != NextBlock) {
1881 // The last case block won't fall through into 'NextBlock' if we emit the
1882 // branches in this order. See if rearranging a case value would help.
1883 for (CaseItr I = CR.Range.first, E = CR.Range.second-1; I != E; ++I) {
1884 if (I->BB == NextBlock) {
1885 std::swap(*I, BackCase);
1886 break;
1887 }
1888 }
1889 }
Anton Korobeynikov23218582008-12-23 22:25:27 +00001890
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001891 // Create a CaseBlock record representing a conditional branch to
1892 // the Case's target mbb if the value being switched on SV is equal
1893 // to C.
1894 MachineBasicBlock *CurBlock = CR.CaseBB;
1895 for (CaseItr I = CR.Range.first, E = CR.Range.second; I != E; ++I) {
1896 MachineBasicBlock *FallThrough;
1897 if (I != E-1) {
1898 FallThrough = CurMF->CreateMachineBasicBlock(CurBlock->getBasicBlock());
1899 CurMF->insert(BBI, FallThrough);
Dan Gohman8e5c0da2009-04-09 02:33:36 +00001900
1901 // Put SV in a virtual register to make it available from the new blocks.
1902 ExportFromCurrentBlock(SV);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001903 } else {
1904 // If the last case doesn't match, go to the default block.
1905 FallThrough = Default;
1906 }
1907
Dan Gohman46510a72010-04-15 01:51:59 +00001908 const Value *RHS, *LHS, *MHS;
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001909 ISD::CondCode CC;
1910 if (I->High == I->Low) {
1911 // This is just small small case range :) containing exactly 1 case
1912 CC = ISD::SETEQ;
1913 LHS = SV; RHS = I->High; MHS = NULL;
1914 } else {
1915 CC = ISD::SETLE;
1916 LHS = I->Low; MHS = SV; RHS = I->High;
1917 }
1918 CaseBlock CB(CC, LHS, RHS, MHS, I->BB, FallThrough, CurBlock);
Anton Korobeynikov23218582008-12-23 22:25:27 +00001919
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001920 // If emitting the first comparison, just call visitSwitchCase to emit the
1921 // code into the current block. Otherwise, push the CaseBlock onto the
1922 // vector to be later processed by SDISel, and insert the node's MBB
1923 // before the next MBB.
Dan Gohman99be8ae2010-04-19 22:41:47 +00001924 if (CurBlock == SwitchBB)
1925 visitSwitchCase(CB, SwitchBB);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001926 else
1927 SwitchCases.push_back(CB);
Anton Korobeynikov23218582008-12-23 22:25:27 +00001928
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001929 CurBlock = FallThrough;
1930 }
1931
1932 return true;
1933}
1934
1935static inline bool areJTsAllowed(const TargetLowering &TLI) {
1936 return !DisableJumpTables &&
Owen Anderson825b72b2009-08-11 20:47:22 +00001937 (TLI.isOperationLegalOrCustom(ISD::BR_JT, MVT::Other) ||
1938 TLI.isOperationLegalOrCustom(ISD::BRIND, MVT::Other));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001939}
Anton Korobeynikov23218582008-12-23 22:25:27 +00001940
Anton Korobeynikove2f95e92008-12-23 22:26:01 +00001941static APInt ComputeRange(const APInt &First, const APInt &Last) {
Anton Korobeynikove2f95e92008-12-23 22:26:01 +00001942 uint32_t BitWidth = std::max(Last.getBitWidth(), First.getBitWidth()) + 1;
Jay Foad40f8f622010-12-07 08:25:19 +00001943 APInt LastExt = Last.sext(BitWidth), FirstExt = First.sext(BitWidth);
Anton Korobeynikove2f95e92008-12-23 22:26:01 +00001944 return (LastExt - FirstExt + 1ULL);
1945}
1946
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001947/// handleJTSwitchCase - Emit jumptable for current switch case range
Dan Gohman2048b852009-11-23 18:04:58 +00001948bool SelectionDAGBuilder::handleJTSwitchCase(CaseRec& CR,
1949 CaseRecVector& WorkList,
Dan Gohman46510a72010-04-15 01:51:59 +00001950 const Value* SV,
Dan Gohman99be8ae2010-04-19 22:41:47 +00001951 MachineBasicBlock* Default,
1952 MachineBasicBlock *SwitchBB) {
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001953 Case& FrontCase = *CR.Range.first;
1954 Case& BackCase = *(CR.Range.second-1);
1955
Chris Lattnere880efe2009-11-07 07:50:34 +00001956 const APInt &First = cast<ConstantInt>(FrontCase.Low)->getValue();
1957 const APInt &Last = cast<ConstantInt>(BackCase.High)->getValue();
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001958
Chris Lattnere880efe2009-11-07 07:50:34 +00001959 APInt TSize(First.getBitWidth(), 0);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001960 for (CaseItr I = CR.Range.first, E = CR.Range.second;
1961 I!=E; ++I)
1962 TSize += I->size();
1963
Dan Gohmane0567812010-04-08 23:03:40 +00001964 if (!areJTsAllowed(TLI) || TSize.ult(4))
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001965 return false;
Anton Korobeynikov23218582008-12-23 22:25:27 +00001966
Anton Korobeynikove2f95e92008-12-23 22:26:01 +00001967 APInt Range = ComputeRange(First, Last);
Chris Lattnere880efe2009-11-07 07:50:34 +00001968 double Density = TSize.roundToDouble() / Range.roundToDouble();
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001969 if (Density < 0.4)
1970 return false;
1971
David Greene4b69d992010-01-05 01:24:57 +00001972 DEBUG(dbgs() << "Lowering jump table\n"
Anton Korobeynikov56d245b2008-12-23 22:26:18 +00001973 << "First entry: " << First << ". Last entry: " << Last << '\n'
1974 << "Range: " << Range
Jim Grosbach3fc83172011-02-25 03:59:03 +00001975 << ". Size: " << TSize << ". Density: " << Density << "\n\n");
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001976
1977 // Get the MachineFunction which holds the current MBB. This is used when
1978 // inserting any additional MBBs necessary to represent the switch.
Dan Gohman0d24bfb2009-08-15 02:06:22 +00001979 MachineFunction *CurMF = FuncInfo.MF;
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001980
1981 // Figure out which block is immediately after the current one.
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001982 MachineFunction::iterator BBI = CR.CaseBB;
Duncan Sands51498522009-09-06 18:03:32 +00001983 ++BBI;
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001984
1985 const BasicBlock *LLVMBB = CR.CaseBB->getBasicBlock();
1986
1987 // Create a new basic block to hold the code for loading the address
1988 // of the jump table, and jumping to it. Update successor information;
1989 // we will either branch to the default case for the switch, or the jump
1990 // table.
1991 MachineBasicBlock *JumpTableBB = CurMF->CreateMachineBasicBlock(LLVMBB);
1992 CurMF->insert(BBI, JumpTableBB);
Jakub Staszak7cc2b072011-06-16 20:22:37 +00001993
1994 addSuccessorWithWeight(CR.CaseBB, Default);
1995 addSuccessorWithWeight(CR.CaseBB, JumpTableBB);
Anton Korobeynikov23218582008-12-23 22:25:27 +00001996
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001997 // Build a vector of destination BBs, corresponding to each target
1998 // of the jump table. If the value of the jump table slot corresponds to
1999 // a case statement, push the case's BB onto the vector, otherwise, push
2000 // the default BB.
2001 std::vector<MachineBasicBlock*> DestBBs;
Anton Korobeynikov23218582008-12-23 22:25:27 +00002002 APInt TEI = First;
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002003 for (CaseItr I = CR.Range.first, E = CR.Range.second; I != E; ++TEI) {
Chris Lattner071c62f2010-01-25 23:26:13 +00002004 const APInt &Low = cast<ConstantInt>(I->Low)->getValue();
2005 const APInt &High = cast<ConstantInt>(I->High)->getValue();
Anton Korobeynikov23218582008-12-23 22:25:27 +00002006
2007 if (Low.sle(TEI) && TEI.sle(High)) {
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002008 DestBBs.push_back(I->BB);
2009 if (TEI==High)
2010 ++I;
2011 } else {
2012 DestBBs.push_back(Default);
2013 }
2014 }
Anton Korobeynikov23218582008-12-23 22:25:27 +00002015
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002016 // Update successor info. Add one edge to each unique successor.
Anton Korobeynikov23218582008-12-23 22:25:27 +00002017 BitVector SuccsHandled(CR.CaseBB->getParent()->getNumBlockIDs());
2018 for (std::vector<MachineBasicBlock*>::iterator I = DestBBs.begin(),
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002019 E = DestBBs.end(); I != E; ++I) {
2020 if (!SuccsHandled[(*I)->getNumber()]) {
2021 SuccsHandled[(*I)->getNumber()] = true;
Jakub Staszak7cc2b072011-06-16 20:22:37 +00002022 addSuccessorWithWeight(JumpTableBB, *I);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002023 }
2024 }
Anton Korobeynikov23218582008-12-23 22:25:27 +00002025
Bob Wilsond1ec31d2010-03-18 18:42:41 +00002026 // Create a jump table index for this jump table.
Chris Lattner071c62f2010-01-25 23:26:13 +00002027 unsigned JTEncoding = TLI.getJumpTableEncoding();
2028 unsigned JTI = CurMF->getOrCreateJumpTableInfo(JTEncoding)
Bob Wilsond1ec31d2010-03-18 18:42:41 +00002029 ->createJumpTableIndex(DestBBs);
Anton Korobeynikov23218582008-12-23 22:25:27 +00002030
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002031 // Set the jump table information so that we can codegen it as a second
2032 // MachineBasicBlock
2033 JumpTable JT(-1U, JTI, JumpTableBB, Default);
Dan Gohman99be8ae2010-04-19 22:41:47 +00002034 JumpTableHeader JTH(First, Last, SV, CR.CaseBB, (CR.CaseBB == SwitchBB));
2035 if (CR.CaseBB == SwitchBB)
2036 visitJumpTableHeader(JT, JTH, SwitchBB);
Anton Korobeynikov23218582008-12-23 22:25:27 +00002037
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002038 JTCases.push_back(JumpTableBlock(JTH, JT));
2039
2040 return true;
2041}
2042
2043/// handleBTSplitSwitchCase - emit comparison and split binary search tree into
2044/// 2 subtrees.
Dan Gohman2048b852009-11-23 18:04:58 +00002045bool SelectionDAGBuilder::handleBTSplitSwitchCase(CaseRec& CR,
2046 CaseRecVector& WorkList,
Dan Gohman46510a72010-04-15 01:51:59 +00002047 const Value* SV,
Dan Gohman99be8ae2010-04-19 22:41:47 +00002048 MachineBasicBlock *Default,
2049 MachineBasicBlock *SwitchBB) {
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002050 // Get the MachineFunction which holds the current MBB. This is used when
2051 // inserting any additional MBBs necessary to represent the switch.
Dan Gohman0d24bfb2009-08-15 02:06:22 +00002052 MachineFunction *CurMF = FuncInfo.MF;
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002053
2054 // Figure out which block is immediately after the current one.
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002055 MachineFunction::iterator BBI = CR.CaseBB;
Duncan Sands51498522009-09-06 18:03:32 +00002056 ++BBI;
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002057
2058 Case& FrontCase = *CR.Range.first;
2059 Case& BackCase = *(CR.Range.second-1);
2060 const BasicBlock *LLVMBB = CR.CaseBB->getBasicBlock();
2061
2062 // Size is the number of Cases represented by this range.
2063 unsigned Size = CR.Range.second - CR.Range.first;
2064
Chris Lattnere880efe2009-11-07 07:50:34 +00002065 const APInt &First = cast<ConstantInt>(FrontCase.Low)->getValue();
2066 const APInt &Last = cast<ConstantInt>(BackCase.High)->getValue();
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002067 double FMetric = 0;
2068 CaseItr Pivot = CR.Range.first + Size/2;
2069
2070 // Select optimal pivot, maximizing sum density of LHS and RHS. This will
2071 // (heuristically) allow us to emit JumpTable's later.
Chris Lattnere880efe2009-11-07 07:50:34 +00002072 APInt TSize(First.getBitWidth(), 0);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002073 for (CaseItr I = CR.Range.first, E = CR.Range.second;
2074 I!=E; ++I)
2075 TSize += I->size();
2076
Chris Lattnere880efe2009-11-07 07:50:34 +00002077 APInt LSize = FrontCase.size();
2078 APInt RSize = TSize-LSize;
David Greene4b69d992010-01-05 01:24:57 +00002079 DEBUG(dbgs() << "Selecting best pivot: \n"
Anton Korobeynikov56d245b2008-12-23 22:26:18 +00002080 << "First: " << First << ", Last: " << Last <<'\n'
2081 << "LSize: " << LSize << ", RSize: " << RSize << '\n');
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002082 for (CaseItr I = CR.Range.first, J=I+1, E = CR.Range.second;
2083 J!=E; ++I, ++J) {
Chris Lattnere880efe2009-11-07 07:50:34 +00002084 const APInt &LEnd = cast<ConstantInt>(I->High)->getValue();
2085 const APInt &RBegin = cast<ConstantInt>(J->Low)->getValue();
Anton Korobeynikove2f95e92008-12-23 22:26:01 +00002086 APInt Range = ComputeRange(LEnd, RBegin);
2087 assert((Range - 2ULL).isNonNegative() &&
2088 "Invalid case distance");
Chris Lattnerc3e4e592011-04-09 06:57:13 +00002089 // Use volatile double here to avoid excess precision issues on some hosts,
2090 // e.g. that use 80-bit X87 registers.
2091 volatile double LDensity =
2092 (double)LSize.roundToDouble() /
Chris Lattnere880efe2009-11-07 07:50:34 +00002093 (LEnd - First + 1ULL).roundToDouble();
Chris Lattnerc3e4e592011-04-09 06:57:13 +00002094 volatile double RDensity =
2095 (double)RSize.roundToDouble() /
Chris Lattnere880efe2009-11-07 07:50:34 +00002096 (Last - RBegin + 1ULL).roundToDouble();
Anton Korobeynikove2f95e92008-12-23 22:26:01 +00002097 double Metric = Range.logBase2()*(LDensity+RDensity);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002098 // Should always split in some non-trivial place
David Greene4b69d992010-01-05 01:24:57 +00002099 DEBUG(dbgs() <<"=>Step\n"
Anton Korobeynikov56d245b2008-12-23 22:26:18 +00002100 << "LEnd: " << LEnd << ", RBegin: " << RBegin << '\n'
2101 << "LDensity: " << LDensity
2102 << ", RDensity: " << RDensity << '\n'
2103 << "Metric: " << Metric << '\n');
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002104 if (FMetric < Metric) {
2105 Pivot = J;
2106 FMetric = Metric;
David Greene4b69d992010-01-05 01:24:57 +00002107 DEBUG(dbgs() << "Current metric set to: " << FMetric << '\n');
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002108 }
2109
2110 LSize += J->size();
2111 RSize -= J->size();
2112 }
2113 if (areJTsAllowed(TLI)) {
2114 // If our case is dense we *really* should handle it earlier!
2115 assert((FMetric > 0) && "Should handle dense range earlier!");
2116 } else {
2117 Pivot = CR.Range.first + Size/2;
2118 }
Anton Korobeynikov23218582008-12-23 22:25:27 +00002119
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002120 CaseRange LHSR(CR.Range.first, Pivot);
2121 CaseRange RHSR(Pivot, CR.Range.second);
2122 Constant *C = Pivot->Low;
2123 MachineBasicBlock *FalseBB = 0, *TrueBB = 0;
Anton Korobeynikov23218582008-12-23 22:25:27 +00002124
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002125 // We know that we branch to the LHS if the Value being switched on is
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00002126 // less than the Pivot value, C. We use this to optimize our binary
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002127 // tree a bit, by recognizing that if SV is greater than or equal to the
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00002128 // LHS's Case Value, and that Case Value is exactly one less than the
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002129 // Pivot's Value, then we can branch directly to the LHS's Target,
2130 // rather than creating a leaf node for it.
2131 if ((LHSR.second - LHSR.first) == 1 &&
2132 LHSR.first->High == CR.GE &&
Anton Korobeynikov23218582008-12-23 22:25:27 +00002133 cast<ConstantInt>(C)->getValue() ==
2134 (cast<ConstantInt>(CR.GE)->getValue() + 1LL)) {
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002135 TrueBB = LHSR.first->BB;
2136 } else {
2137 TrueBB = CurMF->CreateMachineBasicBlock(LLVMBB);
2138 CurMF->insert(BBI, TrueBB);
2139 WorkList.push_back(CaseRec(TrueBB, C, CR.GE, LHSR));
Dan Gohman8e5c0da2009-04-09 02:33:36 +00002140
2141 // Put SV in a virtual register to make it available from the new blocks.
2142 ExportFromCurrentBlock(SV);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002143 }
Anton Korobeynikov23218582008-12-23 22:25:27 +00002144
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002145 // Similar to the optimization above, if the Value being switched on is
2146 // known to be less than the Constant CR.LT, and the current Case Value
2147 // is CR.LT - 1, then we can branch directly to the target block for
2148 // the current Case Value, rather than emitting a RHS leaf node for it.
2149 if ((RHSR.second - RHSR.first) == 1 && CR.LT &&
Anton Korobeynikov23218582008-12-23 22:25:27 +00002150 cast<ConstantInt>(RHSR.first->Low)->getValue() ==
2151 (cast<ConstantInt>(CR.LT)->getValue() - 1LL)) {
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002152 FalseBB = RHSR.first->BB;
2153 } else {
2154 FalseBB = CurMF->CreateMachineBasicBlock(LLVMBB);
2155 CurMF->insert(BBI, FalseBB);
2156 WorkList.push_back(CaseRec(FalseBB,CR.LT,C,RHSR));
Dan Gohman8e5c0da2009-04-09 02:33:36 +00002157
2158 // Put SV in a virtual register to make it available from the new blocks.
2159 ExportFromCurrentBlock(SV);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002160 }
2161
2162 // Create a CaseBlock record representing a conditional branch to
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00002163 // the LHS node if the value being switched on SV is less than C.
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002164 // Otherwise, branch to LHS.
2165 CaseBlock CB(ISD::SETLT, SV, C, NULL, TrueBB, FalseBB, CR.CaseBB);
2166
Dan Gohman99be8ae2010-04-19 22:41:47 +00002167 if (CR.CaseBB == SwitchBB)
2168 visitSwitchCase(CB, SwitchBB);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002169 else
2170 SwitchCases.push_back(CB);
2171
2172 return true;
2173}
2174
2175/// handleBitTestsSwitchCase - if current case range has few destination and
2176/// range span less, than machine word bitwidth, encode case range into series
2177/// of masks and emit bit tests with these masks.
Dan Gohman2048b852009-11-23 18:04:58 +00002178bool SelectionDAGBuilder::handleBitTestsSwitchCase(CaseRec& CR,
2179 CaseRecVector& WorkList,
Dan Gohman46510a72010-04-15 01:51:59 +00002180 const Value* SV,
Dan Gohman99be8ae2010-04-19 22:41:47 +00002181 MachineBasicBlock* Default,
2182 MachineBasicBlock *SwitchBB){
Owen Andersone50ed302009-08-10 22:56:29 +00002183 EVT PTy = TLI.getPointerTy();
Owen Anderson77547be2009-08-10 18:56:59 +00002184 unsigned IntPtrBits = PTy.getSizeInBits();
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002185
2186 Case& FrontCase = *CR.Range.first;
2187 Case& BackCase = *(CR.Range.second-1);
2188
2189 // Get the MachineFunction which holds the current MBB. This is used when
2190 // inserting any additional MBBs necessary to represent the switch.
Dan Gohman0d24bfb2009-08-15 02:06:22 +00002191 MachineFunction *CurMF = FuncInfo.MF;
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002192
Anton Korobeynikovd34167a2009-05-08 18:51:34 +00002193 // If target does not have legal shift left, do not emit bit tests at all.
2194 if (!TLI.isOperationLegal(ISD::SHL, TLI.getPointerTy()))
2195 return false;
2196
Anton Korobeynikov23218582008-12-23 22:25:27 +00002197 size_t numCmps = 0;
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002198 for (CaseItr I = CR.Range.first, E = CR.Range.second;
2199 I!=E; ++I) {
2200 // Single case counts one, case range - two.
Anton Korobeynikov23218582008-12-23 22:25:27 +00002201 numCmps += (I->Low == I->High ? 1 : 2);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002202 }
Anton Korobeynikov23218582008-12-23 22:25:27 +00002203
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002204 // Count unique destinations
2205 SmallSet<MachineBasicBlock*, 4> Dests;
2206 for (CaseItr I = CR.Range.first, E = CR.Range.second; I!=E; ++I) {
2207 Dests.insert(I->BB);
2208 if (Dests.size() > 3)
2209 // Don't bother the code below, if there are too much unique destinations
2210 return false;
2211 }
David Greene4b69d992010-01-05 01:24:57 +00002212 DEBUG(dbgs() << "Total number of unique destinations: "
Mikhail Glushenkovb3c01992010-01-01 04:41:22 +00002213 << Dests.size() << '\n'
2214 << "Total number of comparisons: " << numCmps << '\n');
Anton Korobeynikov23218582008-12-23 22:25:27 +00002215
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002216 // Compute span of values.
Anton Korobeynikov23218582008-12-23 22:25:27 +00002217 const APInt& minValue = cast<ConstantInt>(FrontCase.Low)->getValue();
2218 const APInt& maxValue = cast<ConstantInt>(BackCase.High)->getValue();
Anton Korobeynikove2f95e92008-12-23 22:26:01 +00002219 APInt cmpRange = maxValue - minValue;
2220
David Greene4b69d992010-01-05 01:24:57 +00002221 DEBUG(dbgs() << "Compare range: " << cmpRange << '\n'
Anton Korobeynikov56d245b2008-12-23 22:26:18 +00002222 << "Low bound: " << minValue << '\n'
2223 << "High bound: " << maxValue << '\n');
Anton Korobeynikov23218582008-12-23 22:25:27 +00002224
Dan Gohmane0567812010-04-08 23:03:40 +00002225 if (cmpRange.uge(IntPtrBits) ||
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002226 (!(Dests.size() == 1 && numCmps >= 3) &&
2227 !(Dests.size() == 2 && numCmps >= 5) &&
2228 !(Dests.size() >= 3 && numCmps >= 6)))
2229 return false;
Anton Korobeynikov23218582008-12-23 22:25:27 +00002230
David Greene4b69d992010-01-05 01:24:57 +00002231 DEBUG(dbgs() << "Emitting bit tests\n");
Anton Korobeynikov23218582008-12-23 22:25:27 +00002232 APInt lowBound = APInt::getNullValue(cmpRange.getBitWidth());
2233
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002234 // Optimize the case where all the case values fit in a
2235 // word without having to subtract minValue. In this case,
2236 // we can optimize away the subtraction.
Dan Gohmane0567812010-04-08 23:03:40 +00002237 if (minValue.isNonNegative() && maxValue.slt(IntPtrBits)) {
Anton Korobeynikov23218582008-12-23 22:25:27 +00002238 cmpRange = maxValue;
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002239 } else {
Anton Korobeynikov23218582008-12-23 22:25:27 +00002240 lowBound = minValue;
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002241 }
Anton Korobeynikov23218582008-12-23 22:25:27 +00002242
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002243 CaseBitsVector CasesBits;
2244 unsigned i, count = 0;
2245
2246 for (CaseItr I = CR.Range.first, E = CR.Range.second; I!=E; ++I) {
2247 MachineBasicBlock* Dest = I->BB;
2248 for (i = 0; i < count; ++i)
2249 if (Dest == CasesBits[i].BB)
2250 break;
Anton Korobeynikov23218582008-12-23 22:25:27 +00002251
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002252 if (i == count) {
2253 assert((count < 3) && "Too much destinations to test!");
2254 CasesBits.push_back(CaseBits(0, Dest, 0));
2255 count++;
2256 }
Anton Korobeynikov23218582008-12-23 22:25:27 +00002257
2258 const APInt& lowValue = cast<ConstantInt>(I->Low)->getValue();
2259 const APInt& highValue = cast<ConstantInt>(I->High)->getValue();
2260
2261 uint64_t lo = (lowValue - lowBound).getZExtValue();
2262 uint64_t hi = (highValue - lowBound).getZExtValue();
2263
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002264 for (uint64_t j = lo; j <= hi; j++) {
2265 CasesBits[i].Mask |= 1ULL << j;
2266 CasesBits[i].Bits++;
2267 }
Anton Korobeynikov23218582008-12-23 22:25:27 +00002268
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002269 }
2270 std::sort(CasesBits.begin(), CasesBits.end(), CaseBitsCmp());
Anton Korobeynikov23218582008-12-23 22:25:27 +00002271
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002272 BitTestInfo BTC;
2273
2274 // Figure out which block is immediately after the current one.
2275 MachineFunction::iterator BBI = CR.CaseBB;
2276 ++BBI;
2277
2278 const BasicBlock *LLVMBB = CR.CaseBB->getBasicBlock();
2279
David Greene4b69d992010-01-05 01:24:57 +00002280 DEBUG(dbgs() << "Cases:\n");
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002281 for (unsigned i = 0, e = CasesBits.size(); i!=e; ++i) {
David Greene4b69d992010-01-05 01:24:57 +00002282 DEBUG(dbgs() << "Mask: " << CasesBits[i].Mask
Anton Korobeynikov56d245b2008-12-23 22:26:18 +00002283 << ", Bits: " << CasesBits[i].Bits
2284 << ", BB: " << CasesBits[i].BB << '\n');
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002285
2286 MachineBasicBlock *CaseBB = CurMF->CreateMachineBasicBlock(LLVMBB);
2287 CurMF->insert(BBI, CaseBB);
2288 BTC.push_back(BitTestCase(CasesBits[i].Mask,
2289 CaseBB,
2290 CasesBits[i].BB));
Dan Gohman8e5c0da2009-04-09 02:33:36 +00002291
2292 // Put SV in a virtual register to make it available from the new blocks.
2293 ExportFromCurrentBlock(SV);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002294 }
Anton Korobeynikov23218582008-12-23 22:25:27 +00002295
2296 BitTestBlock BTB(lowBound, cmpRange, SV,
Evan Chengd08e5b42011-01-06 01:02:44 +00002297 -1U, MVT::Other, (CR.CaseBB == SwitchBB),
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002298 CR.CaseBB, Default, BTC);
2299
Dan Gohman99be8ae2010-04-19 22:41:47 +00002300 if (CR.CaseBB == SwitchBB)
2301 visitBitTestHeader(BTB, SwitchBB);
Anton Korobeynikov23218582008-12-23 22:25:27 +00002302
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002303 BitTestCases.push_back(BTB);
2304
2305 return true;
2306}
2307
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002308/// Clusterify - Transform simple list of Cases into list of CaseRange's
Dan Gohman2048b852009-11-23 18:04:58 +00002309size_t SelectionDAGBuilder::Clusterify(CaseVector& Cases,
2310 const SwitchInst& SI) {
Anton Korobeynikov23218582008-12-23 22:25:27 +00002311 size_t numCmps = 0;
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002312
2313 // Start with "simple" cases
Anton Korobeynikov23218582008-12-23 22:25:27 +00002314 for (size_t i = 1; i < SI.getNumSuccessors(); ++i) {
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002315 MachineBasicBlock *SMBB = FuncInfo.MBBMap[SI.getSuccessor(i)];
2316 Cases.push_back(Case(SI.getSuccessorValue(i),
2317 SI.getSuccessorValue(i),
2318 SMBB));
2319 }
2320 std::sort(Cases.begin(), Cases.end(), CaseCmp());
2321
2322 // Merge case into clusters
Anton Korobeynikov23218582008-12-23 22:25:27 +00002323 if (Cases.size() >= 2)
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002324 // Must recompute end() each iteration because it may be
2325 // invalidated by erase if we hold on to it
Nick Lewyckyed4efd32011-01-28 04:00:15 +00002326 for (CaseItr I = Cases.begin(), J = llvm::next(Cases.begin());
2327 J != Cases.end(); ) {
Anton Korobeynikov23218582008-12-23 22:25:27 +00002328 const APInt& nextValue = cast<ConstantInt>(J->Low)->getValue();
2329 const APInt& currentValue = cast<ConstantInt>(I->High)->getValue();
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002330 MachineBasicBlock* nextBB = J->BB;
2331 MachineBasicBlock* currentBB = I->BB;
2332
2333 // If the two neighboring cases go to the same destination, merge them
2334 // into a single case.
Anton Korobeynikov23218582008-12-23 22:25:27 +00002335 if ((nextValue - currentValue == 1) && (currentBB == nextBB)) {
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002336 I->High = J->High;
2337 J = Cases.erase(J);
2338 } else {
2339 I = J++;
2340 }
2341 }
2342
2343 for (CaseItr I=Cases.begin(), E=Cases.end(); I!=E; ++I, ++numCmps) {
2344 if (I->Low != I->High)
2345 // A range counts double, since it requires two compares.
2346 ++numCmps;
2347 }
2348
2349 return numCmps;
2350}
2351
Jakob Stoklund Olesen2622f462010-09-30 19:44:31 +00002352void SelectionDAGBuilder::UpdateSplitBlock(MachineBasicBlock *First,
2353 MachineBasicBlock *Last) {
2354 // Update JTCases.
2355 for (unsigned i = 0, e = JTCases.size(); i != e; ++i)
2356 if (JTCases[i].first.HeaderBB == First)
2357 JTCases[i].first.HeaderBB = Last;
2358
2359 // Update BitTestCases.
2360 for (unsigned i = 0, e = BitTestCases.size(); i != e; ++i)
2361 if (BitTestCases[i].Parent == First)
2362 BitTestCases[i].Parent = Last;
2363}
2364
Dan Gohman46510a72010-04-15 01:51:59 +00002365void SelectionDAGBuilder::visitSwitch(const SwitchInst &SI) {
Dan Gohman84023e02010-07-10 09:00:22 +00002366 MachineBasicBlock *SwitchMBB = FuncInfo.MBB;
Dan Gohman99be8ae2010-04-19 22:41:47 +00002367
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002368 // Figure out which block is immediately after the current one.
2369 MachineBasicBlock *NextBlock = 0;
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002370 MachineBasicBlock *Default = FuncInfo.MBBMap[SI.getDefaultDest()];
2371
2372 // If there is only the default destination, branch to it if it is not the
2373 // next basic block. Otherwise, just fall through.
2374 if (SI.getNumOperands() == 2) {
2375 // Update machine-CFG edges.
2376
2377 // If this is not a fall-through branch, emit the branch.
Dan Gohman99be8ae2010-04-19 22:41:47 +00002378 SwitchMBB->addSuccessor(Default);
Bill Wendling4533cac2010-01-28 21:51:40 +00002379 if (Default != NextBlock)
2380 DAG.setRoot(DAG.getNode(ISD::BR, getCurDebugLoc(),
2381 MVT::Other, getControlRoot(),
2382 DAG.getBasicBlock(Default)));
Bill Wendling49fcff82009-12-21 22:30:11 +00002383
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002384 return;
2385 }
Anton Korobeynikov23218582008-12-23 22:25:27 +00002386
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002387 // If there are any non-default case statements, create a vector of Cases
2388 // representing each one, and sort the vector so that we can efficiently
2389 // create a binary search tree from them.
2390 CaseVector Cases;
Anton Korobeynikov23218582008-12-23 22:25:27 +00002391 size_t numCmps = Clusterify(Cases, SI);
David Greene4b69d992010-01-05 01:24:57 +00002392 DEBUG(dbgs() << "Clusterify finished. Total clusters: " << Cases.size()
Anton Korobeynikov56d245b2008-12-23 22:26:18 +00002393 << ". Total compares: " << numCmps << '\n');
Devang Patel8a84e442009-01-05 17:31:22 +00002394 numCmps = 0;
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002395
2396 // Get the Value to be switched on and default basic blocks, which will be
2397 // inserted into CaseBlock records, representing basic blocks in the binary
2398 // search tree.
Dan Gohman46510a72010-04-15 01:51:59 +00002399 const Value *SV = SI.getOperand(0);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002400
2401 // Push the initial CaseRec onto the worklist
2402 CaseRecVector WorkList;
Dan Gohman99be8ae2010-04-19 22:41:47 +00002403 WorkList.push_back(CaseRec(SwitchMBB,0,0,
2404 CaseRange(Cases.begin(),Cases.end())));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002405
2406 while (!WorkList.empty()) {
2407 // Grab a record representing a case range to process off the worklist
2408 CaseRec CR = WorkList.back();
2409 WorkList.pop_back();
2410
Dan Gohman99be8ae2010-04-19 22:41:47 +00002411 if (handleBitTestsSwitchCase(CR, WorkList, SV, Default, SwitchMBB))
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002412 continue;
Anton Korobeynikov23218582008-12-23 22:25:27 +00002413
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002414 // If the range has few cases (two or less) emit a series of specific
2415 // tests.
Dan Gohman99be8ae2010-04-19 22:41:47 +00002416 if (handleSmallSwitchRange(CR, WorkList, SV, Default, SwitchMBB))
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002417 continue;
Anton Korobeynikov23218582008-12-23 22:25:27 +00002418
Anton Korobeynikove2f95e92008-12-23 22:26:01 +00002419 // If the switch has more than 5 blocks, and at least 40% dense, and the
2420 // target supports indirect branches, then emit a jump table rather than
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002421 // lowering the switch to a binary tree of conditional branches.
Dan Gohman99be8ae2010-04-19 22:41:47 +00002422 if (handleJTSwitchCase(CR, WorkList, SV, Default, SwitchMBB))
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002423 continue;
Anton Korobeynikov23218582008-12-23 22:25:27 +00002424
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002425 // Emit binary tree. We need to pick a pivot, and push left and right ranges
2426 // onto the worklist. Leafs are handled via handleSmallSwitchRange() call.
Dan Gohman99be8ae2010-04-19 22:41:47 +00002427 handleBTSplitSwitchCase(CR, WorkList, SV, Default, SwitchMBB);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002428 }
2429}
2430
Dan Gohman46510a72010-04-15 01:51:59 +00002431void SelectionDAGBuilder::visitIndirectBr(const IndirectBrInst &I) {
Dan Gohman84023e02010-07-10 09:00:22 +00002432 MachineBasicBlock *IndirectBrMBB = FuncInfo.MBB;
Dan Gohman99be8ae2010-04-19 22:41:47 +00002433
Jakob Stoklund Olesen598b24c2010-02-11 00:34:18 +00002434 // Update machine-CFG edges with unique successors.
Jakob Stoklund Olesenb5b90ed2010-02-11 18:06:56 +00002435 SmallVector<BasicBlock*, 32> succs;
Jakob Stoklund Olesen598b24c2010-02-11 00:34:18 +00002436 succs.reserve(I.getNumSuccessors());
Dan Gohmaneef55dc2009-10-27 22:10:34 +00002437 for (unsigned i = 0, e = I.getNumSuccessors(); i != e; ++i)
Jakob Stoklund Olesen598b24c2010-02-11 00:34:18 +00002438 succs.push_back(I.getSuccessor(i));
Jakob Stoklund Olesenb5b90ed2010-02-11 18:06:56 +00002439 array_pod_sort(succs.begin(), succs.end());
Jakob Stoklund Olesen598b24c2010-02-11 00:34:18 +00002440 succs.erase(std::unique(succs.begin(), succs.end()), succs.end());
Jakub Staszak7cc2b072011-06-16 20:22:37 +00002441 for (unsigned i = 0, e = succs.size(); i != e; ++i) {
2442 MachineBasicBlock *Succ = FuncInfo.MBBMap[succs[i]];
2443 addSuccessorWithWeight(IndirectBrMBB, Succ);
2444 }
Dan Gohmaneef55dc2009-10-27 22:10:34 +00002445
Bill Wendling4533cac2010-01-28 21:51:40 +00002446 DAG.setRoot(DAG.getNode(ISD::BRIND, getCurDebugLoc(),
2447 MVT::Other, getControlRoot(),
2448 getValue(I.getAddress())));
Bill Wendling49fcff82009-12-21 22:30:11 +00002449}
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002450
Dan Gohman46510a72010-04-15 01:51:59 +00002451void SelectionDAGBuilder::visitFSub(const User &I) {
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002452 // -0.0 - X --> fneg
2453 const Type *Ty = I.getType();
Chris Lattner2ca5c862011-02-15 00:14:00 +00002454 if (isa<Constant>(I.getOperand(0)) &&
2455 I.getOperand(0) == ConstantFP::getZeroValueForNegation(Ty)) {
2456 SDValue Op2 = getValue(I.getOperand(1));
2457 setValue(&I, DAG.getNode(ISD::FNEG, getCurDebugLoc(),
2458 Op2.getValueType(), Op2));
2459 return;
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002460 }
Bill Wendling49fcff82009-12-21 22:30:11 +00002461
Dan Gohmanae3a0be2009-06-04 22:49:04 +00002462 visitBinary(I, ISD::FSUB);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002463}
2464
Dan Gohman46510a72010-04-15 01:51:59 +00002465void SelectionDAGBuilder::visitBinary(const User &I, unsigned OpCode) {
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002466 SDValue Op1 = getValue(I.getOperand(0));
2467 SDValue Op2 = getValue(I.getOperand(1));
Bill Wendling4533cac2010-01-28 21:51:40 +00002468 setValue(&I, DAG.getNode(OpCode, getCurDebugLoc(),
2469 Op1.getValueType(), Op1, Op2));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002470}
2471
Dan Gohman46510a72010-04-15 01:51:59 +00002472void SelectionDAGBuilder::visitShift(const User &I, unsigned Opcode) {
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002473 SDValue Op1 = getValue(I.getOperand(0));
2474 SDValue Op2 = getValue(I.getOperand(1));
Owen Anderson95771af2011-02-25 21:41:48 +00002475
2476 MVT ShiftTy = TLI.getShiftAmountTy(Op2.getValueType());
2477
Chris Lattnerd3027732011-02-13 09:02:52 +00002478 // Coerce the shift amount to the right type if we can.
2479 if (!I.getType()->isVectorTy() && Op2.getValueType() != ShiftTy) {
Chris Lattner915eeb42011-02-13 09:10:56 +00002480 unsigned ShiftSize = ShiftTy.getSizeInBits();
2481 unsigned Op2Size = Op2.getValueType().getSizeInBits();
Chris Lattnerd3027732011-02-13 09:02:52 +00002482 DebugLoc DL = getCurDebugLoc();
Owen Anderson95771af2011-02-25 21:41:48 +00002483
Dan Gohman57fc82d2009-04-09 03:51:29 +00002484 // If the operand is smaller than the shift count type, promote it.
Chris Lattnerd3027732011-02-13 09:02:52 +00002485 if (ShiftSize > Op2Size)
2486 Op2 = DAG.getNode(ISD::ZERO_EXTEND, DL, ShiftTy, Op2);
Owen Anderson95771af2011-02-25 21:41:48 +00002487
Dan Gohman57fc82d2009-04-09 03:51:29 +00002488 // If the operand is larger than the shift count type but the shift
2489 // count type has enough bits to represent any shift value, truncate
2490 // it now. This is a common case and it exposes the truncate to
2491 // optimization early.
Chris Lattnerd3027732011-02-13 09:02:52 +00002492 else if (ShiftSize >= Log2_32_Ceil(Op2.getValueType().getSizeInBits()))
2493 Op2 = DAG.getNode(ISD::TRUNCATE, DL, ShiftTy, Op2);
2494 // Otherwise we'll need to temporarily settle for some other convenient
Chris Lattnere0751182011-02-13 19:09:16 +00002495 // type. Type legalization will make adjustments once the shiftee is split.
Chris Lattnerd3027732011-02-13 09:02:52 +00002496 else
Chris Lattnere0751182011-02-13 19:09:16 +00002497 Op2 = DAG.getZExtOrTrunc(Op2, DL, MVT::i32);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002498 }
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00002499
Bill Wendling4533cac2010-01-28 21:51:40 +00002500 setValue(&I, DAG.getNode(Opcode, getCurDebugLoc(),
2501 Op1.getValueType(), Op1, Op2));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002502}
2503
Dan Gohman46510a72010-04-15 01:51:59 +00002504void SelectionDAGBuilder::visitICmp(const User &I) {
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002505 ICmpInst::Predicate predicate = ICmpInst::BAD_ICMP_PREDICATE;
Dan Gohman46510a72010-04-15 01:51:59 +00002506 if (const ICmpInst *IC = dyn_cast<ICmpInst>(&I))
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002507 predicate = IC->getPredicate();
Dan Gohman46510a72010-04-15 01:51:59 +00002508 else if (const ConstantExpr *IC = dyn_cast<ConstantExpr>(&I))
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002509 predicate = ICmpInst::Predicate(IC->getPredicate());
2510 SDValue Op1 = getValue(I.getOperand(0));
2511 SDValue Op2 = getValue(I.getOperand(1));
Dan Gohman8c1a6ca2008-10-17 18:18:45 +00002512 ISD::CondCode Opcode = getICmpCondCode(predicate);
Mikhail Glushenkovb3c01992010-01-01 04:41:22 +00002513
Owen Andersone50ed302009-08-10 22:56:29 +00002514 EVT DestVT = TLI.getValueType(I.getType());
Bill Wendling4533cac2010-01-28 21:51:40 +00002515 setValue(&I, DAG.getSetCC(getCurDebugLoc(), DestVT, Op1, Op2, Opcode));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002516}
2517
Dan Gohman46510a72010-04-15 01:51:59 +00002518void SelectionDAGBuilder::visitFCmp(const User &I) {
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002519 FCmpInst::Predicate predicate = FCmpInst::BAD_FCMP_PREDICATE;
Dan Gohman46510a72010-04-15 01:51:59 +00002520 if (const FCmpInst *FC = dyn_cast<FCmpInst>(&I))
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002521 predicate = FC->getPredicate();
Dan Gohman46510a72010-04-15 01:51:59 +00002522 else if (const ConstantExpr *FC = dyn_cast<ConstantExpr>(&I))
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002523 predicate = FCmpInst::Predicate(FC->getPredicate());
2524 SDValue Op1 = getValue(I.getOperand(0));
2525 SDValue Op2 = getValue(I.getOperand(1));
Dan Gohman8c1a6ca2008-10-17 18:18:45 +00002526 ISD::CondCode Condition = getFCmpCondCode(predicate);
Owen Andersone50ed302009-08-10 22:56:29 +00002527 EVT DestVT = TLI.getValueType(I.getType());
Bill Wendling4533cac2010-01-28 21:51:40 +00002528 setValue(&I, DAG.getSetCC(getCurDebugLoc(), DestVT, Op1, Op2, Condition));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002529}
2530
Dan Gohman46510a72010-04-15 01:51:59 +00002531void SelectionDAGBuilder::visitSelect(const User &I) {
Owen Andersone50ed302009-08-10 22:56:29 +00002532 SmallVector<EVT, 4> ValueVTs;
Dan Gohman7ea1ca62008-10-21 20:00:42 +00002533 ComputeValueVTs(TLI, I.getType(), ValueVTs);
2534 unsigned NumValues = ValueVTs.size();
Bill Wendling49fcff82009-12-21 22:30:11 +00002535 if (NumValues == 0) return;
Dan Gohman7ea1ca62008-10-21 20:00:42 +00002536
Bill Wendling49fcff82009-12-21 22:30:11 +00002537 SmallVector<SDValue, 4> Values(NumValues);
2538 SDValue Cond = getValue(I.getOperand(0));
2539 SDValue TrueVal = getValue(I.getOperand(1));
2540 SDValue FalseVal = getValue(I.getOperand(2));
Dan Gohman7ea1ca62008-10-21 20:00:42 +00002541
Bill Wendling4533cac2010-01-28 21:51:40 +00002542 for (unsigned i = 0; i != NumValues; ++i)
Bill Wendling49fcff82009-12-21 22:30:11 +00002543 Values[i] = DAG.getNode(ISD::SELECT, getCurDebugLoc(),
Chris Lattnerb3e87b22010-03-12 07:15:36 +00002544 TrueVal.getNode()->getValueType(TrueVal.getResNo()+i),
2545 Cond,
Bill Wendling49fcff82009-12-21 22:30:11 +00002546 SDValue(TrueVal.getNode(),
2547 TrueVal.getResNo() + i),
2548 SDValue(FalseVal.getNode(),
2549 FalseVal.getResNo() + i));
2550
Bill Wendling4533cac2010-01-28 21:51:40 +00002551 setValue(&I, DAG.getNode(ISD::MERGE_VALUES, getCurDebugLoc(),
2552 DAG.getVTList(&ValueVTs[0], NumValues),
2553 &Values[0], NumValues));
Bill Wendling49fcff82009-12-21 22:30:11 +00002554}
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002555
Dan Gohman46510a72010-04-15 01:51:59 +00002556void SelectionDAGBuilder::visitTrunc(const User &I) {
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002557 // TruncInst cannot be a no-op cast because sizeof(src) > sizeof(dest).
2558 SDValue N = getValue(I.getOperand(0));
Owen Andersone50ed302009-08-10 22:56:29 +00002559 EVT DestVT = TLI.getValueType(I.getType());
Bill Wendling4533cac2010-01-28 21:51:40 +00002560 setValue(&I, DAG.getNode(ISD::TRUNCATE, getCurDebugLoc(), DestVT, N));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002561}
2562
Dan Gohman46510a72010-04-15 01:51:59 +00002563void SelectionDAGBuilder::visitZExt(const User &I) {
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002564 // ZExt cannot be a no-op cast because sizeof(src) < sizeof(dest).
2565 // ZExt also can't be a cast to bool for same reason. So, nothing much to do
2566 SDValue N = getValue(I.getOperand(0));
Owen Andersone50ed302009-08-10 22:56:29 +00002567 EVT DestVT = TLI.getValueType(I.getType());
Bill Wendling4533cac2010-01-28 21:51:40 +00002568 setValue(&I, DAG.getNode(ISD::ZERO_EXTEND, getCurDebugLoc(), DestVT, N));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002569}
2570
Dan Gohman46510a72010-04-15 01:51:59 +00002571void SelectionDAGBuilder::visitSExt(const User &I) {
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002572 // SExt cannot be a no-op cast because sizeof(src) < sizeof(dest).
2573 // SExt also can't be a cast to bool for same reason. So, nothing much to do
2574 SDValue N = getValue(I.getOperand(0));
Owen Andersone50ed302009-08-10 22:56:29 +00002575 EVT DestVT = TLI.getValueType(I.getType());
Bill Wendling4533cac2010-01-28 21:51:40 +00002576 setValue(&I, DAG.getNode(ISD::SIGN_EXTEND, getCurDebugLoc(), DestVT, N));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002577}
2578
Dan Gohman46510a72010-04-15 01:51:59 +00002579void SelectionDAGBuilder::visitFPTrunc(const User &I) {
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002580 // FPTrunc is never a no-op cast, no need to check
2581 SDValue N = getValue(I.getOperand(0));
Owen Andersone50ed302009-08-10 22:56:29 +00002582 EVT DestVT = TLI.getValueType(I.getType());
Bill Wendling4533cac2010-01-28 21:51:40 +00002583 setValue(&I, DAG.getNode(ISD::FP_ROUND, getCurDebugLoc(),
2584 DestVT, N, DAG.getIntPtrConstant(0)));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002585}
2586
Dan Gohman46510a72010-04-15 01:51:59 +00002587void SelectionDAGBuilder::visitFPExt(const User &I){
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002588 // FPTrunc is never a no-op cast, no need to check
2589 SDValue N = getValue(I.getOperand(0));
Owen Andersone50ed302009-08-10 22:56:29 +00002590 EVT DestVT = TLI.getValueType(I.getType());
Bill Wendling4533cac2010-01-28 21:51:40 +00002591 setValue(&I, DAG.getNode(ISD::FP_EXTEND, getCurDebugLoc(), DestVT, N));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002592}
2593
Dan Gohman46510a72010-04-15 01:51:59 +00002594void SelectionDAGBuilder::visitFPToUI(const User &I) {
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002595 // FPToUI is never a no-op cast, no need to check
2596 SDValue N = getValue(I.getOperand(0));
Owen Andersone50ed302009-08-10 22:56:29 +00002597 EVT DestVT = TLI.getValueType(I.getType());
Bill Wendling4533cac2010-01-28 21:51:40 +00002598 setValue(&I, DAG.getNode(ISD::FP_TO_UINT, getCurDebugLoc(), DestVT, N));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002599}
2600
Dan Gohman46510a72010-04-15 01:51:59 +00002601void SelectionDAGBuilder::visitFPToSI(const User &I) {
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002602 // FPToSI is never a no-op cast, no need to check
2603 SDValue N = getValue(I.getOperand(0));
Owen Andersone50ed302009-08-10 22:56:29 +00002604 EVT DestVT = TLI.getValueType(I.getType());
Bill Wendling4533cac2010-01-28 21:51:40 +00002605 setValue(&I, DAG.getNode(ISD::FP_TO_SINT, getCurDebugLoc(), DestVT, N));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002606}
2607
Dan Gohman46510a72010-04-15 01:51:59 +00002608void SelectionDAGBuilder::visitUIToFP(const User &I) {
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002609 // UIToFP is never a no-op cast, no need to check
2610 SDValue N = getValue(I.getOperand(0));
Owen Andersone50ed302009-08-10 22:56:29 +00002611 EVT DestVT = TLI.getValueType(I.getType());
Bill Wendling4533cac2010-01-28 21:51:40 +00002612 setValue(&I, DAG.getNode(ISD::UINT_TO_FP, getCurDebugLoc(), DestVT, N));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002613}
2614
Dan Gohman46510a72010-04-15 01:51:59 +00002615void SelectionDAGBuilder::visitSIToFP(const User &I){
Bill Wendling181b6272008-10-19 20:34:04 +00002616 // SIToFP is never a no-op cast, no need to check
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002617 SDValue N = getValue(I.getOperand(0));
Owen Andersone50ed302009-08-10 22:56:29 +00002618 EVT DestVT = TLI.getValueType(I.getType());
Bill Wendling4533cac2010-01-28 21:51:40 +00002619 setValue(&I, DAG.getNode(ISD::SINT_TO_FP, getCurDebugLoc(), DestVT, N));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002620}
2621
Dan Gohman46510a72010-04-15 01:51:59 +00002622void SelectionDAGBuilder::visitPtrToInt(const User &I) {
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002623 // What to do depends on the size of the integer and the size of the pointer.
2624 // We can either truncate, zero extend, or no-op, accordingly.
2625 SDValue N = getValue(I.getOperand(0));
Owen Andersone50ed302009-08-10 22:56:29 +00002626 EVT DestVT = TLI.getValueType(I.getType());
Bill Wendling4533cac2010-01-28 21:51:40 +00002627 setValue(&I, DAG.getZExtOrTrunc(N, getCurDebugLoc(), DestVT));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002628}
2629
Dan Gohman46510a72010-04-15 01:51:59 +00002630void SelectionDAGBuilder::visitIntToPtr(const User &I) {
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002631 // What to do depends on the size of the integer and the size of the pointer.
2632 // We can either truncate, zero extend, or no-op, accordingly.
2633 SDValue N = getValue(I.getOperand(0));
Owen Andersone50ed302009-08-10 22:56:29 +00002634 EVT DestVT = TLI.getValueType(I.getType());
Bill Wendling4533cac2010-01-28 21:51:40 +00002635 setValue(&I, DAG.getZExtOrTrunc(N, getCurDebugLoc(), DestVT));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002636}
2637
Dan Gohman46510a72010-04-15 01:51:59 +00002638void SelectionDAGBuilder::visitBitCast(const User &I) {
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002639 SDValue N = getValue(I.getOperand(0));
Owen Andersone50ed302009-08-10 22:56:29 +00002640 EVT DestVT = TLI.getValueType(I.getType());
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002641
Bill Wendling49fcff82009-12-21 22:30:11 +00002642 // BitCast assures us that source and destination are the same size so this is
Wesley Peckbf17cfa2010-11-23 03:31:01 +00002643 // either a BITCAST or a no-op.
Bill Wendling4533cac2010-01-28 21:51:40 +00002644 if (DestVT != N.getValueType())
Wesley Peckbf17cfa2010-11-23 03:31:01 +00002645 setValue(&I, DAG.getNode(ISD::BITCAST, getCurDebugLoc(),
Bill Wendling4533cac2010-01-28 21:51:40 +00002646 DestVT, N)); // convert types.
2647 else
Bill Wendling49fcff82009-12-21 22:30:11 +00002648 setValue(&I, N); // noop cast.
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002649}
2650
Dan Gohman46510a72010-04-15 01:51:59 +00002651void SelectionDAGBuilder::visitInsertElement(const User &I) {
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002652 SDValue InVec = getValue(I.getOperand(0));
2653 SDValue InVal = getValue(I.getOperand(1));
Scott Michelfdc40a02009-02-17 22:15:04 +00002654 SDValue InIdx = DAG.getNode(ISD::ZERO_EXTEND, getCurDebugLoc(),
Bill Wendling87710f02009-12-21 23:47:40 +00002655 TLI.getPointerTy(),
2656 getValue(I.getOperand(2)));
Bill Wendling4533cac2010-01-28 21:51:40 +00002657 setValue(&I, DAG.getNode(ISD::INSERT_VECTOR_ELT, getCurDebugLoc(),
2658 TLI.getValueType(I.getType()),
2659 InVec, InVal, InIdx));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002660}
2661
Dan Gohman46510a72010-04-15 01:51:59 +00002662void SelectionDAGBuilder::visitExtractElement(const User &I) {
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002663 SDValue InVec = getValue(I.getOperand(0));
Scott Michelfdc40a02009-02-17 22:15:04 +00002664 SDValue InIdx = DAG.getNode(ISD::ZERO_EXTEND, getCurDebugLoc(),
Bill Wendling87710f02009-12-21 23:47:40 +00002665 TLI.getPointerTy(),
2666 getValue(I.getOperand(1)));
Bill Wendling4533cac2010-01-28 21:51:40 +00002667 setValue(&I, DAG.getNode(ISD::EXTRACT_VECTOR_ELT, getCurDebugLoc(),
2668 TLI.getValueType(I.getType()), InVec, InIdx));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002669}
2670
Mon P Wangaeb06d22008-11-10 04:46:22 +00002671// Utility for visitShuffleVector - Returns true if the mask is mask starting
2672// from SIndx and increasing to the element length (undefs are allowed).
Nate Begeman5a5ca152009-04-29 05:20:52 +00002673static bool SequentialMask(SmallVectorImpl<int> &Mask, unsigned SIndx) {
2674 unsigned MaskNumElts = Mask.size();
2675 for (unsigned i = 0; i != MaskNumElts; ++i)
2676 if ((Mask[i] >= 0) && (Mask[i] != (int)(i + SIndx)))
Nate Begeman9008ca62009-04-27 18:41:29 +00002677 return false;
Mon P Wangaeb06d22008-11-10 04:46:22 +00002678 return true;
2679}
2680
Dan Gohman46510a72010-04-15 01:51:59 +00002681void SelectionDAGBuilder::visitShuffleVector(const User &I) {
Nate Begeman9008ca62009-04-27 18:41:29 +00002682 SmallVector<int, 8> Mask;
Mon P Wang230e4fa2008-11-21 04:25:21 +00002683 SDValue Src1 = getValue(I.getOperand(0));
2684 SDValue Src2 = getValue(I.getOperand(1));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002685
Nate Begeman9008ca62009-04-27 18:41:29 +00002686 // Convert the ConstantVector mask operand into an array of ints, with -1
2687 // representing undef values.
2688 SmallVector<Constant*, 8> MaskElts;
Chris Lattnerb29d5962010-02-01 20:48:08 +00002689 cast<Constant>(I.getOperand(2))->getVectorElements(MaskElts);
Nate Begeman5a5ca152009-04-29 05:20:52 +00002690 unsigned MaskNumElts = MaskElts.size();
2691 for (unsigned i = 0; i != MaskNumElts; ++i) {
Nate Begeman9008ca62009-04-27 18:41:29 +00002692 if (isa<UndefValue>(MaskElts[i]))
2693 Mask.push_back(-1);
2694 else
2695 Mask.push_back(cast<ConstantInt>(MaskElts[i])->getSExtValue());
2696 }
Mikhail Glushenkovb3c01992010-01-01 04:41:22 +00002697
Owen Andersone50ed302009-08-10 22:56:29 +00002698 EVT VT = TLI.getValueType(I.getType());
2699 EVT SrcVT = Src1.getValueType();
Nate Begeman5a5ca152009-04-29 05:20:52 +00002700 unsigned SrcNumElts = SrcVT.getVectorNumElements();
Mon P Wangaeb06d22008-11-10 04:46:22 +00002701
Mon P Wangc7849c22008-11-16 05:06:27 +00002702 if (SrcNumElts == MaskNumElts) {
Bill Wendling4533cac2010-01-28 21:51:40 +00002703 setValue(&I, DAG.getVectorShuffle(VT, getCurDebugLoc(), Src1, Src2,
2704 &Mask[0]));
Mon P Wangaeb06d22008-11-10 04:46:22 +00002705 return;
2706 }
2707
2708 // Normalize the shuffle vector since mask and vector length don't match.
Mon P Wangc7849c22008-11-16 05:06:27 +00002709 if (SrcNumElts < MaskNumElts && MaskNumElts % SrcNumElts == 0) {
2710 // Mask is longer than the source vectors and is a multiple of the source
2711 // vectors. We can use concatenate vector to make the mask and vectors
Mon P Wang230e4fa2008-11-21 04:25:21 +00002712 // lengths match.
Mon P Wangc7849c22008-11-16 05:06:27 +00002713 if (SrcNumElts*2 == MaskNumElts && SequentialMask(Mask, 0)) {
2714 // The shuffle is concatenating two vectors together.
Bill Wendling4533cac2010-01-28 21:51:40 +00002715 setValue(&I, DAG.getNode(ISD::CONCAT_VECTORS, getCurDebugLoc(),
2716 VT, Src1, Src2));
Mon P Wangaeb06d22008-11-10 04:46:22 +00002717 return;
2718 }
2719
Mon P Wangc7849c22008-11-16 05:06:27 +00002720 // Pad both vectors with undefs to make them the same length as the mask.
2721 unsigned NumConcat = MaskNumElts / SrcNumElts;
Nate Begeman9008ca62009-04-27 18:41:29 +00002722 bool Src1U = Src1.getOpcode() == ISD::UNDEF;
2723 bool Src2U = Src2.getOpcode() == ISD::UNDEF;
Dale Johannesene8d72302009-02-06 23:05:02 +00002724 SDValue UndefVal = DAG.getUNDEF(SrcVT);
Mon P Wangaeb06d22008-11-10 04:46:22 +00002725
Nate Begeman9008ca62009-04-27 18:41:29 +00002726 SmallVector<SDValue, 8> MOps1(NumConcat, UndefVal);
2727 SmallVector<SDValue, 8> MOps2(NumConcat, UndefVal);
Mon P Wang230e4fa2008-11-21 04:25:21 +00002728 MOps1[0] = Src1;
2729 MOps2[0] = Src2;
Mikhail Glushenkovb3c01992010-01-01 04:41:22 +00002730
2731 Src1 = Src1U ? DAG.getUNDEF(VT) : DAG.getNode(ISD::CONCAT_VECTORS,
2732 getCurDebugLoc(), VT,
Nate Begeman9008ca62009-04-27 18:41:29 +00002733 &MOps1[0], NumConcat);
2734 Src2 = Src2U ? DAG.getUNDEF(VT) : DAG.getNode(ISD::CONCAT_VECTORS,
Mikhail Glushenkovb3c01992010-01-01 04:41:22 +00002735 getCurDebugLoc(), VT,
Nate Begeman9008ca62009-04-27 18:41:29 +00002736 &MOps2[0], NumConcat);
Mon P Wang230e4fa2008-11-21 04:25:21 +00002737
Mon P Wangaeb06d22008-11-10 04:46:22 +00002738 // Readjust mask for new input vector length.
Nate Begeman9008ca62009-04-27 18:41:29 +00002739 SmallVector<int, 8> MappedOps;
Nate Begeman5a5ca152009-04-29 05:20:52 +00002740 for (unsigned i = 0; i != MaskNumElts; ++i) {
Nate Begeman9008ca62009-04-27 18:41:29 +00002741 int Idx = Mask[i];
Nate Begeman5a5ca152009-04-29 05:20:52 +00002742 if (Idx < (int)SrcNumElts)
Nate Begeman9008ca62009-04-27 18:41:29 +00002743 MappedOps.push_back(Idx);
2744 else
2745 MappedOps.push_back(Idx + MaskNumElts - SrcNumElts);
Mon P Wangaeb06d22008-11-10 04:46:22 +00002746 }
Bill Wendlingb85b6e82009-12-21 22:42:14 +00002747
Bill Wendling4533cac2010-01-28 21:51:40 +00002748 setValue(&I, DAG.getVectorShuffle(VT, getCurDebugLoc(), Src1, Src2,
2749 &MappedOps[0]));
Mon P Wangaeb06d22008-11-10 04:46:22 +00002750 return;
2751 }
2752
Mon P Wangc7849c22008-11-16 05:06:27 +00002753 if (SrcNumElts > MaskNumElts) {
Mon P Wangc7849c22008-11-16 05:06:27 +00002754 // Analyze the access pattern of the vector to see if we can extract
2755 // two subvectors and do the shuffle. The analysis is done by calculating
2756 // the range of elements the mask access on both vectors.
2757 int MinRange[2] = { SrcNumElts+1, SrcNumElts+1};
2758 int MaxRange[2] = {-1, -1};
2759
Nate Begeman5a5ca152009-04-29 05:20:52 +00002760 for (unsigned i = 0; i != MaskNumElts; ++i) {
Nate Begeman9008ca62009-04-27 18:41:29 +00002761 int Idx = Mask[i];
2762 int Input = 0;
2763 if (Idx < 0)
2764 continue;
Mikhail Glushenkovb3c01992010-01-01 04:41:22 +00002765
Nate Begeman5a5ca152009-04-29 05:20:52 +00002766 if (Idx >= (int)SrcNumElts) {
Nate Begeman9008ca62009-04-27 18:41:29 +00002767 Input = 1;
2768 Idx -= SrcNumElts;
Mon P Wangaeb06d22008-11-10 04:46:22 +00002769 }
Nate Begeman9008ca62009-04-27 18:41:29 +00002770 if (Idx > MaxRange[Input])
2771 MaxRange[Input] = Idx;
2772 if (Idx < MinRange[Input])
2773 MinRange[Input] = Idx;
Mon P Wangaeb06d22008-11-10 04:46:22 +00002774 }
Mon P Wangaeb06d22008-11-10 04:46:22 +00002775
Mon P Wangc7849c22008-11-16 05:06:27 +00002776 // Check if the access is smaller than the vector size and can we find
2777 // a reasonable extract index.
Mikhail Glushenkovb3c01992010-01-01 04:41:22 +00002778 int RangeUse[2] = { 2, 2 }; // 0 = Unused, 1 = Extract, 2 = Can not
2779 // Extract.
Mon P Wangc7849c22008-11-16 05:06:27 +00002780 int StartIdx[2]; // StartIdx to extract from
2781 for (int Input=0; Input < 2; ++Input) {
Nate Begeman5a5ca152009-04-29 05:20:52 +00002782 if (MinRange[Input] == (int)(SrcNumElts+1) && MaxRange[Input] == -1) {
Mon P Wangc7849c22008-11-16 05:06:27 +00002783 RangeUse[Input] = 0; // Unused
2784 StartIdx[Input] = 0;
Nate Begeman5a5ca152009-04-29 05:20:52 +00002785 } else if (MaxRange[Input] - MinRange[Input] < (int)MaskNumElts) {
Mon P Wangc7849c22008-11-16 05:06:27 +00002786 // Fits within range but we should see if we can find a good
Mon P Wang230e4fa2008-11-21 04:25:21 +00002787 // start index that is a multiple of the mask length.
Nate Begeman5a5ca152009-04-29 05:20:52 +00002788 if (MaxRange[Input] < (int)MaskNumElts) {
Mon P Wangc7849c22008-11-16 05:06:27 +00002789 RangeUse[Input] = 1; // Extract from beginning of the vector
2790 StartIdx[Input] = 0;
2791 } else {
2792 StartIdx[Input] = (MinRange[Input]/MaskNumElts)*MaskNumElts;
Nate Begeman5a5ca152009-04-29 05:20:52 +00002793 if (MaxRange[Input] - StartIdx[Input] < (int)MaskNumElts &&
Bob Wilson5e8b8332011-01-07 04:59:04 +00002794 StartIdx[Input] + MaskNumElts <= SrcNumElts)
Mon P Wangc7849c22008-11-16 05:06:27 +00002795 RangeUse[Input] = 1; // Extract from a multiple of the mask length.
Mon P Wangc7849c22008-11-16 05:06:27 +00002796 }
Mon P Wang230e4fa2008-11-21 04:25:21 +00002797 }
Mon P Wangc7849c22008-11-16 05:06:27 +00002798 }
2799
Bill Wendling636e2582009-08-21 18:16:06 +00002800 if (RangeUse[0] == 0 && RangeUse[1] == 0) {
Bill Wendling4533cac2010-01-28 21:51:40 +00002801 setValue(&I, DAG.getUNDEF(VT)); // Vectors are not used.
Mon P Wangc7849c22008-11-16 05:06:27 +00002802 return;
2803 }
2804 else if (RangeUse[0] < 2 && RangeUse[1] < 2) {
2805 // Extract appropriate subvector and generate a vector shuffle
2806 for (int Input=0; Input < 2; ++Input) {
Bill Wendling87710f02009-12-21 23:47:40 +00002807 SDValue &Src = Input == 0 ? Src1 : Src2;
Bill Wendlingb85b6e82009-12-21 22:42:14 +00002808 if (RangeUse[Input] == 0)
Dale Johannesene8d72302009-02-06 23:05:02 +00002809 Src = DAG.getUNDEF(VT);
Bill Wendlingb85b6e82009-12-21 22:42:14 +00002810 else
Dale Johannesen66978ee2009-01-31 02:22:37 +00002811 Src = DAG.getNode(ISD::EXTRACT_SUBVECTOR, getCurDebugLoc(), VT,
Dale Johannesenfa42dea2009-01-30 01:34:22 +00002812 Src, DAG.getIntPtrConstant(StartIdx[Input]));
Mon P Wangaeb06d22008-11-10 04:46:22 +00002813 }
Bill Wendlingb85b6e82009-12-21 22:42:14 +00002814
Mon P Wangc7849c22008-11-16 05:06:27 +00002815 // Calculate new mask.
Nate Begeman9008ca62009-04-27 18:41:29 +00002816 SmallVector<int, 8> MappedOps;
Nate Begeman5a5ca152009-04-29 05:20:52 +00002817 for (unsigned i = 0; i != MaskNumElts; ++i) {
Nate Begeman9008ca62009-04-27 18:41:29 +00002818 int Idx = Mask[i];
2819 if (Idx < 0)
2820 MappedOps.push_back(Idx);
Nate Begeman5a5ca152009-04-29 05:20:52 +00002821 else if (Idx < (int)SrcNumElts)
Nate Begeman9008ca62009-04-27 18:41:29 +00002822 MappedOps.push_back(Idx - StartIdx[0]);
2823 else
2824 MappedOps.push_back(Idx - SrcNumElts - StartIdx[1] + MaskNumElts);
Mon P Wangc7849c22008-11-16 05:06:27 +00002825 }
Bill Wendlingb85b6e82009-12-21 22:42:14 +00002826
Bill Wendling4533cac2010-01-28 21:51:40 +00002827 setValue(&I, DAG.getVectorShuffle(VT, getCurDebugLoc(), Src1, Src2,
2828 &MappedOps[0]));
Mon P Wangc7849c22008-11-16 05:06:27 +00002829 return;
Mon P Wangaeb06d22008-11-10 04:46:22 +00002830 }
2831 }
2832
Mon P Wangc7849c22008-11-16 05:06:27 +00002833 // We can't use either concat vectors or extract subvectors so fall back to
2834 // replacing the shuffle with extract and build vector.
2835 // to insert and build vector.
Owen Andersone50ed302009-08-10 22:56:29 +00002836 EVT EltVT = VT.getVectorElementType();
2837 EVT PtrVT = TLI.getPointerTy();
Mon P Wangaeb06d22008-11-10 04:46:22 +00002838 SmallVector<SDValue,8> Ops;
Nate Begeman5a5ca152009-04-29 05:20:52 +00002839 for (unsigned i = 0; i != MaskNumElts; ++i) {
Nate Begeman9008ca62009-04-27 18:41:29 +00002840 if (Mask[i] < 0) {
Dale Johannesene8d72302009-02-06 23:05:02 +00002841 Ops.push_back(DAG.getUNDEF(EltVT));
Mon P Wangaeb06d22008-11-10 04:46:22 +00002842 } else {
Nate Begeman9008ca62009-04-27 18:41:29 +00002843 int Idx = Mask[i];
Bill Wendlingb85b6e82009-12-21 22:42:14 +00002844 SDValue Res;
2845
Nate Begeman5a5ca152009-04-29 05:20:52 +00002846 if (Idx < (int)SrcNumElts)
Bill Wendlingb85b6e82009-12-21 22:42:14 +00002847 Res = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, getCurDebugLoc(),
2848 EltVT, Src1, DAG.getConstant(Idx, PtrVT));
Mon P Wangaeb06d22008-11-10 04:46:22 +00002849 else
Bill Wendlingb85b6e82009-12-21 22:42:14 +00002850 Res = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, getCurDebugLoc(),
2851 EltVT, Src2,
2852 DAG.getConstant(Idx - SrcNumElts, PtrVT));
2853
2854 Ops.push_back(Res);
Mon P Wangaeb06d22008-11-10 04:46:22 +00002855 }
2856 }
Bill Wendlingb85b6e82009-12-21 22:42:14 +00002857
Bill Wendling4533cac2010-01-28 21:51:40 +00002858 setValue(&I, DAG.getNode(ISD::BUILD_VECTOR, getCurDebugLoc(),
2859 VT, &Ops[0], Ops.size()));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002860}
2861
Dan Gohman46510a72010-04-15 01:51:59 +00002862void SelectionDAGBuilder::visitInsertValue(const InsertValueInst &I) {
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002863 const Value *Op0 = I.getOperand(0);
2864 const Value *Op1 = I.getOperand(1);
2865 const Type *AggTy = I.getType();
2866 const Type *ValTy = Op1->getType();
2867 bool IntoUndef = isa<UndefValue>(Op0);
2868 bool FromUndef = isa<UndefValue>(Op1);
2869
Dan Gohman0dadb152010-10-06 16:18:29 +00002870 unsigned LinearIndex = ComputeLinearIndex(AggTy, I.idx_begin(), I.idx_end());
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002871
Owen Andersone50ed302009-08-10 22:56:29 +00002872 SmallVector<EVT, 4> AggValueVTs;
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002873 ComputeValueVTs(TLI, AggTy, AggValueVTs);
Owen Andersone50ed302009-08-10 22:56:29 +00002874 SmallVector<EVT, 4> ValValueVTs;
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002875 ComputeValueVTs(TLI, ValTy, ValValueVTs);
2876
2877 unsigned NumAggValues = AggValueVTs.size();
2878 unsigned NumValValues = ValValueVTs.size();
2879 SmallVector<SDValue, 4> Values(NumAggValues);
2880
2881 SDValue Agg = getValue(Op0);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002882 unsigned i = 0;
2883 // Copy the beginning value(s) from the original aggregate.
2884 for (; i != LinearIndex; ++i)
Dale Johannesene8d72302009-02-06 23:05:02 +00002885 Values[i] = IntoUndef ? DAG.getUNDEF(AggValueVTs[i]) :
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002886 SDValue(Agg.getNode(), Agg.getResNo() + i);
2887 // Copy values from the inserted value(s).
Rafael Espindola3fa82832011-05-13 15:18:06 +00002888 if (NumValValues) {
2889 SDValue Val = getValue(Op1);
2890 for (; i != LinearIndex + NumValValues; ++i)
2891 Values[i] = FromUndef ? DAG.getUNDEF(AggValueVTs[i]) :
2892 SDValue(Val.getNode(), Val.getResNo() + i - LinearIndex);
2893 }
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002894 // Copy remaining value(s) from the original aggregate.
2895 for (; i != NumAggValues; ++i)
Dale Johannesene8d72302009-02-06 23:05:02 +00002896 Values[i] = IntoUndef ? DAG.getUNDEF(AggValueVTs[i]) :
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002897 SDValue(Agg.getNode(), Agg.getResNo() + i);
2898
Bill Wendling4533cac2010-01-28 21:51:40 +00002899 setValue(&I, DAG.getNode(ISD::MERGE_VALUES, getCurDebugLoc(),
2900 DAG.getVTList(&AggValueVTs[0], NumAggValues),
2901 &Values[0], NumAggValues));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002902}
2903
Dan Gohman46510a72010-04-15 01:51:59 +00002904void SelectionDAGBuilder::visitExtractValue(const ExtractValueInst &I) {
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002905 const Value *Op0 = I.getOperand(0);
2906 const Type *AggTy = Op0->getType();
2907 const Type *ValTy = I.getType();
2908 bool OutOfUndef = isa<UndefValue>(Op0);
2909
Dan Gohman0dadb152010-10-06 16:18:29 +00002910 unsigned LinearIndex = ComputeLinearIndex(AggTy, I.idx_begin(), I.idx_end());
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002911
Owen Andersone50ed302009-08-10 22:56:29 +00002912 SmallVector<EVT, 4> ValValueVTs;
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002913 ComputeValueVTs(TLI, ValTy, ValValueVTs);
2914
2915 unsigned NumValValues = ValValueVTs.size();
Rafael Espindola3fa82832011-05-13 15:18:06 +00002916
2917 // Ignore a extractvalue that produces an empty object
2918 if (!NumValValues) {
2919 setValue(&I, DAG.getUNDEF(MVT(MVT::Other)));
2920 return;
2921 }
2922
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002923 SmallVector<SDValue, 4> Values(NumValValues);
2924
2925 SDValue Agg = getValue(Op0);
2926 // Copy out the selected value(s).
2927 for (unsigned i = LinearIndex; i != LinearIndex + NumValValues; ++i)
2928 Values[i - LinearIndex] =
Bill Wendlingf0a2d0c2008-11-20 07:24:30 +00002929 OutOfUndef ?
Dale Johannesene8d72302009-02-06 23:05:02 +00002930 DAG.getUNDEF(Agg.getNode()->getValueType(Agg.getResNo() + i)) :
Bill Wendlingf0a2d0c2008-11-20 07:24:30 +00002931 SDValue(Agg.getNode(), Agg.getResNo() + i);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002932
Bill Wendling4533cac2010-01-28 21:51:40 +00002933 setValue(&I, DAG.getNode(ISD::MERGE_VALUES, getCurDebugLoc(),
2934 DAG.getVTList(&ValValueVTs[0], NumValValues),
2935 &Values[0], NumValValues));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002936}
2937
Dan Gohman46510a72010-04-15 01:51:59 +00002938void SelectionDAGBuilder::visitGetElementPtr(const User &I) {
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002939 SDValue N = getValue(I.getOperand(0));
2940 const Type *Ty = I.getOperand(0)->getType();
2941
Dan Gohman46510a72010-04-15 01:51:59 +00002942 for (GetElementPtrInst::const_op_iterator OI = I.op_begin()+1, E = I.op_end();
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002943 OI != E; ++OI) {
Dan Gohman46510a72010-04-15 01:51:59 +00002944 const Value *Idx = *OI;
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002945 if (const StructType *StTy = dyn_cast<StructType>(Ty)) {
2946 unsigned Field = cast<ConstantInt>(Idx)->getZExtValue();
2947 if (Field) {
2948 // N = N + Offset
2949 uint64_t Offset = TD->getStructLayout(StTy)->getElementOffset(Field);
Dale Johannesen66978ee2009-01-31 02:22:37 +00002950 N = DAG.getNode(ISD::ADD, getCurDebugLoc(), N.getValueType(), N,
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002951 DAG.getIntPtrConstant(Offset));
2952 }
Bill Wendlinge1a90422009-12-21 23:10:19 +00002953
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002954 Ty = StTy->getElementType(Field);
2955 } else {
2956 Ty = cast<SequentialType>(Ty)->getElementType();
2957
2958 // If this is a constant subscript, handle it quickly.
Dan Gohman46510a72010-04-15 01:51:59 +00002959 if (const ConstantInt *CI = dyn_cast<ConstantInt>(Idx)) {
Dan Gohmane368b462010-06-18 14:22:04 +00002960 if (CI->isZero()) continue;
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00002961 uint64_t Offs =
Duncan Sands777d2302009-05-09 07:06:46 +00002962 TD->getTypeAllocSize(Ty)*cast<ConstantInt>(CI)->getSExtValue();
Evan Cheng65b52df2009-02-09 21:01:06 +00002963 SDValue OffsVal;
Owen Andersone50ed302009-08-10 22:56:29 +00002964 EVT PTy = TLI.getPointerTy();
Owen Anderson77547be2009-08-10 18:56:59 +00002965 unsigned PtrBits = PTy.getSizeInBits();
Bill Wendlinge1a90422009-12-21 23:10:19 +00002966 if (PtrBits < 64)
Evan Cheng65b52df2009-02-09 21:01:06 +00002967 OffsVal = DAG.getNode(ISD::TRUNCATE, getCurDebugLoc(),
2968 TLI.getPointerTy(),
Owen Anderson825b72b2009-08-11 20:47:22 +00002969 DAG.getConstant(Offs, MVT::i64));
Bill Wendlinge1a90422009-12-21 23:10:19 +00002970 else
Evan Chengb1032a82009-02-09 20:54:38 +00002971 OffsVal = DAG.getIntPtrConstant(Offs);
Bill Wendlinge1a90422009-12-21 23:10:19 +00002972
Dale Johannesen66978ee2009-01-31 02:22:37 +00002973 N = DAG.getNode(ISD::ADD, getCurDebugLoc(), N.getValueType(), N,
Evan Chengb1032a82009-02-09 20:54:38 +00002974 OffsVal);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002975 continue;
2976 }
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00002977
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002978 // N = N + Idx * ElementSize;
Dan Gohman7abbd042009-10-23 17:57:43 +00002979 APInt ElementSize = APInt(TLI.getPointerTy().getSizeInBits(),
2980 TD->getTypeAllocSize(Ty));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002981 SDValue IdxN = getValue(Idx);
2982
2983 // If the index is smaller or larger than intptr_t, truncate or extend
2984 // it.
Duncan Sands3a66a682009-10-13 21:04:12 +00002985 IdxN = DAG.getSExtOrTrunc(IdxN, getCurDebugLoc(), N.getValueType());
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002986
2987 // If this is a multiply by a power of two, turn it into a shl
2988 // immediately. This is a very common case.
2989 if (ElementSize != 1) {
Dan Gohman7abbd042009-10-23 17:57:43 +00002990 if (ElementSize.isPowerOf2()) {
2991 unsigned Amt = ElementSize.logBase2();
Scott Michelfdc40a02009-02-17 22:15:04 +00002992 IdxN = DAG.getNode(ISD::SHL, getCurDebugLoc(),
Dale Johannesenfa42dea2009-01-30 01:34:22 +00002993 N.getValueType(), IdxN,
Duncan Sands92abc622009-01-31 15:50:11 +00002994 DAG.getConstant(Amt, TLI.getPointerTy()));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002995 } else {
Dan Gohman7abbd042009-10-23 17:57:43 +00002996 SDValue Scale = DAG.getConstant(ElementSize, TLI.getPointerTy());
Scott Michelfdc40a02009-02-17 22:15:04 +00002997 IdxN = DAG.getNode(ISD::MUL, getCurDebugLoc(),
Dale Johannesenfa42dea2009-01-30 01:34:22 +00002998 N.getValueType(), IdxN, Scale);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002999 }
3000 }
3001
Scott Michelfdc40a02009-02-17 22:15:04 +00003002 N = DAG.getNode(ISD::ADD, getCurDebugLoc(),
Dale Johannesenfa42dea2009-01-30 01:34:22 +00003003 N.getValueType(), N, IdxN);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00003004 }
3005 }
Bill Wendlinge1a90422009-12-21 23:10:19 +00003006
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00003007 setValue(&I, N);
3008}
3009
Dan Gohman46510a72010-04-15 01:51:59 +00003010void SelectionDAGBuilder::visitAlloca(const AllocaInst &I) {
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00003011 // If this is a fixed sized alloca in the entry block of the function,
3012 // allocate it statically on the stack.
3013 if (FuncInfo.StaticAllocaMap.count(&I))
3014 return; // getValue will auto-populate this.
3015
3016 const Type *Ty = I.getAllocatedType();
Duncan Sands777d2302009-05-09 07:06:46 +00003017 uint64_t TySize = TLI.getTargetData()->getTypeAllocSize(Ty);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00003018 unsigned Align =
3019 std::max((unsigned)TLI.getTargetData()->getPrefTypeAlignment(Ty),
3020 I.getAlignment());
3021
3022 SDValue AllocSize = getValue(I.getArraySize());
Mikhail Glushenkovb3c01992010-01-01 04:41:22 +00003023
Owen Andersone50ed302009-08-10 22:56:29 +00003024 EVT IntPtr = TLI.getPointerTy();
Dan Gohmanf75a7d32010-05-28 01:14:11 +00003025 if (AllocSize.getValueType() != IntPtr)
3026 AllocSize = DAG.getZExtOrTrunc(AllocSize, getCurDebugLoc(), IntPtr);
3027
3028 AllocSize = DAG.getNode(ISD::MUL, getCurDebugLoc(), IntPtr,
3029 AllocSize,
3030 DAG.getConstant(TySize, IntPtr));
Mikhail Glushenkovb3c01992010-01-01 04:41:22 +00003031
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00003032 // Handle alignment. If the requested alignment is less than or equal to
3033 // the stack alignment, ignore it. If the size is greater than or equal to
3034 // the stack alignment, we note this in the DYNAMIC_STACKALLOC node.
Anton Korobeynikov16c29b52011-01-10 12:39:04 +00003035 unsigned StackAlign = TM.getFrameLowering()->getStackAlignment();
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00003036 if (Align <= StackAlign)
3037 Align = 0;
3038
3039 // Round the size of the allocation up to the stack alignment size
3040 // by add SA-1 to the size.
Scott Michelfdc40a02009-02-17 22:15:04 +00003041 AllocSize = DAG.getNode(ISD::ADD, getCurDebugLoc(),
Dale Johannesenfa42dea2009-01-30 01:34:22 +00003042 AllocSize.getValueType(), AllocSize,
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00003043 DAG.getIntPtrConstant(StackAlign-1));
Bill Wendling856ff412009-12-22 00:12:37 +00003044
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00003045 // Mask out the low bits for alignment purposes.
Scott Michelfdc40a02009-02-17 22:15:04 +00003046 AllocSize = DAG.getNode(ISD::AND, getCurDebugLoc(),
Dale Johannesenfa42dea2009-01-30 01:34:22 +00003047 AllocSize.getValueType(), AllocSize,
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00003048 DAG.getIntPtrConstant(~(uint64_t)(StackAlign-1)));
3049
3050 SDValue Ops[] = { getRoot(), AllocSize, DAG.getIntPtrConstant(Align) };
Owen Anderson825b72b2009-08-11 20:47:22 +00003051 SDVTList VTs = DAG.getVTList(AllocSize.getValueType(), MVT::Other);
Scott Michelfdc40a02009-02-17 22:15:04 +00003052 SDValue DSA = DAG.getNode(ISD::DYNAMIC_STACKALLOC, getCurDebugLoc(),
Dan Gohmanfc166572009-04-09 23:54:40 +00003053 VTs, Ops, 3);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00003054 setValue(&I, DSA);
3055 DAG.setRoot(DSA.getValue(1));
Bill Wendling856ff412009-12-22 00:12:37 +00003056
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00003057 // Inform the Frame Information that we have just allocated a variable-sized
3058 // object.
Eric Christopher2b8271e2010-07-17 00:28:22 +00003059 FuncInfo.MF->getFrameInfo()->CreateVariableSizedObject(Align ? Align : 1);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00003060}
3061
Dan Gohman46510a72010-04-15 01:51:59 +00003062void SelectionDAGBuilder::visitLoad(const LoadInst &I) {
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00003063 const Value *SV = I.getOperand(0);
3064 SDValue Ptr = getValue(SV);
3065
3066 const Type *Ty = I.getType();
David Greene1e559442010-02-15 17:00:31 +00003067
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00003068 bool isVolatile = I.isVolatile();
David Greene1e559442010-02-15 17:00:31 +00003069 bool isNonTemporal = I.getMetadata("nontemporal") != 0;
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00003070 unsigned Alignment = I.getAlignment();
Dan Gohmanf96e4bd2010-10-20 00:31:05 +00003071 const MDNode *TBAAInfo = I.getMetadata(LLVMContext::MD_tbaa);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00003072
Owen Andersone50ed302009-08-10 22:56:29 +00003073 SmallVector<EVT, 4> ValueVTs;
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00003074 SmallVector<uint64_t, 4> Offsets;
3075 ComputeValueVTs(TLI, Ty, ValueVTs, &Offsets);
3076 unsigned NumValues = ValueVTs.size();
3077 if (NumValues == 0)
3078 return;
3079
3080 SDValue Root;
3081 bool ConstantMemory = false;
Andrew Trickde91f3c2010-11-12 17:50:46 +00003082 if (I.isVolatile() || NumValues > MaxParallelChains)
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00003083 // Serialize volatile loads with other side effects.
3084 Root = getRoot();
Dan Gohmanf96e4bd2010-10-20 00:31:05 +00003085 else if (AA->pointsToConstantMemory(
3086 AliasAnalysis::Location(SV, AA->getTypeStoreSize(Ty), TBAAInfo))) {
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00003087 // Do not serialize (non-volatile) loads of constant memory with anything.
3088 Root = DAG.getEntryNode();
3089 ConstantMemory = true;
3090 } else {
3091 // Do not serialize non-volatile loads against each other.
3092 Root = DAG.getRoot();
3093 }
Wesley Peckbf17cfa2010-11-23 03:31:01 +00003094
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00003095 SmallVector<SDValue, 4> Values(NumValues);
Andrew Trickde91f3c2010-11-12 17:50:46 +00003096 SmallVector<SDValue, 4> Chains(std::min(unsigned(MaxParallelChains),
3097 NumValues));
Owen Andersone50ed302009-08-10 22:56:29 +00003098 EVT PtrVT = Ptr.getValueType();
Andrew Trickde91f3c2010-11-12 17:50:46 +00003099 unsigned ChainI = 0;
3100 for (unsigned i = 0; i != NumValues; ++i, ++ChainI) {
3101 // Serializing loads here may result in excessive register pressure, and
3102 // TokenFactor places arbitrary choke points on the scheduler. SD scheduling
3103 // could recover a bit by hoisting nodes upward in the chain by recognizing
3104 // they are side-effect free or do not alias. The optimizer should really
3105 // avoid this case by converting large object/array copies to llvm.memcpy
3106 // (MaxParallelChains should always remain as failsafe).
3107 if (ChainI == MaxParallelChains) {
3108 assert(PendingLoads.empty() && "PendingLoads must be serialized first");
3109 SDValue Chain = DAG.getNode(ISD::TokenFactor, getCurDebugLoc(),
3110 MVT::Other, &Chains[0], ChainI);
3111 Root = Chain;
3112 ChainI = 0;
3113 }
Bill Wendling856ff412009-12-22 00:12:37 +00003114 SDValue A = DAG.getNode(ISD::ADD, getCurDebugLoc(),
3115 PtrVT, Ptr,
3116 DAG.getConstant(Offsets[i], PtrVT));
Dale Johannesen66978ee2009-01-31 02:22:37 +00003117 SDValue L = DAG.getLoad(ValueVTs[i], getCurDebugLoc(), Root,
Michael J. Spencere70c5262010-10-16 08:25:21 +00003118 A, MachinePointerInfo(SV, Offsets[i]), isVolatile,
Dan Gohmanf96e4bd2010-10-20 00:31:05 +00003119 isNonTemporal, Alignment, TBAAInfo);
Bill Wendling856ff412009-12-22 00:12:37 +00003120
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00003121 Values[i] = L;
Andrew Trickde91f3c2010-11-12 17:50:46 +00003122 Chains[ChainI] = L.getValue(1);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00003123 }
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00003124
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00003125 if (!ConstantMemory) {
Scott Michelfdc40a02009-02-17 22:15:04 +00003126 SDValue Chain = DAG.getNode(ISD::TokenFactor, getCurDebugLoc(),
Andrew Trickde91f3c2010-11-12 17:50:46 +00003127 MVT::Other, &Chains[0], ChainI);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00003128 if (isVolatile)
3129 DAG.setRoot(Chain);
3130 else
3131 PendingLoads.push_back(Chain);
3132 }
3133
Bill Wendling4533cac2010-01-28 21:51:40 +00003134 setValue(&I, DAG.getNode(ISD::MERGE_VALUES, getCurDebugLoc(),
3135 DAG.getVTList(&ValueVTs[0], NumValues),
3136 &Values[0], NumValues));
Bill Wendling856ff412009-12-22 00:12:37 +00003137}
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00003138
Dan Gohman46510a72010-04-15 01:51:59 +00003139void SelectionDAGBuilder::visitStore(const StoreInst &I) {
3140 const Value *SrcV = I.getOperand(0);
3141 const Value *PtrV = I.getOperand(1);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00003142
Owen Andersone50ed302009-08-10 22:56:29 +00003143 SmallVector<EVT, 4> ValueVTs;
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00003144 SmallVector<uint64_t, 4> Offsets;
3145 ComputeValueVTs(TLI, SrcV->getType(), ValueVTs, &Offsets);
3146 unsigned NumValues = ValueVTs.size();
3147 if (NumValues == 0)
3148 return;
3149
3150 // Get the lowered operands. Note that we do this after
3151 // checking if NumResults is zero, because with zero results
3152 // the operands won't have values in the map.
3153 SDValue Src = getValue(SrcV);
3154 SDValue Ptr = getValue(PtrV);
3155
3156 SDValue Root = getRoot();
Andrew Trickde91f3c2010-11-12 17:50:46 +00003157 SmallVector<SDValue, 4> Chains(std::min(unsigned(MaxParallelChains),
3158 NumValues));
Owen Andersone50ed302009-08-10 22:56:29 +00003159 EVT PtrVT = Ptr.getValueType();
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00003160 bool isVolatile = I.isVolatile();
David Greene1e559442010-02-15 17:00:31 +00003161 bool isNonTemporal = I.getMetadata("nontemporal") != 0;
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00003162 unsigned Alignment = I.getAlignment();
Dan Gohmanf96e4bd2010-10-20 00:31:05 +00003163 const MDNode *TBAAInfo = I.getMetadata(LLVMContext::MD_tbaa);
Bill Wendling856ff412009-12-22 00:12:37 +00003164
Andrew Trickde91f3c2010-11-12 17:50:46 +00003165 unsigned ChainI = 0;
3166 for (unsigned i = 0; i != NumValues; ++i, ++ChainI) {
3167 // See visitLoad comments.
3168 if (ChainI == MaxParallelChains) {
3169 SDValue Chain = DAG.getNode(ISD::TokenFactor, getCurDebugLoc(),
3170 MVT::Other, &Chains[0], ChainI);
3171 Root = Chain;
3172 ChainI = 0;
3173 }
Bill Wendling856ff412009-12-22 00:12:37 +00003174 SDValue Add = DAG.getNode(ISD::ADD, getCurDebugLoc(), PtrVT, Ptr,
3175 DAG.getConstant(Offsets[i], PtrVT));
Andrew Trickde91f3c2010-11-12 17:50:46 +00003176 SDValue St = DAG.getStore(Root, getCurDebugLoc(),
3177 SDValue(Src.getNode(), Src.getResNo() + i),
3178 Add, MachinePointerInfo(PtrV, Offsets[i]),
3179 isVolatile, isNonTemporal, Alignment, TBAAInfo);
3180 Chains[ChainI] = St;
Bill Wendling856ff412009-12-22 00:12:37 +00003181 }
3182
Devang Patel7e13efa2010-10-26 22:14:52 +00003183 SDValue StoreNode = DAG.getNode(ISD::TokenFactor, getCurDebugLoc(),
Andrew Trickde91f3c2010-11-12 17:50:46 +00003184 MVT::Other, &Chains[0], ChainI);
Devang Patel7e13efa2010-10-26 22:14:52 +00003185 ++SDNodeOrder;
3186 AssignOrderingToNode(StoreNode.getNode());
3187 DAG.setRoot(StoreNode);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00003188}
3189
3190/// visitTargetIntrinsic - Lower a call of a target intrinsic to an INTRINSIC
3191/// node.
Dan Gohman46510a72010-04-15 01:51:59 +00003192void SelectionDAGBuilder::visitTargetIntrinsic(const CallInst &I,
Dan Gohman2048b852009-11-23 18:04:58 +00003193 unsigned Intrinsic) {
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00003194 bool HasChain = !I.doesNotAccessMemory();
3195 bool OnlyLoad = HasChain && I.onlyReadsMemory();
3196
3197 // Build the operand list.
3198 SmallVector<SDValue, 8> Ops;
3199 if (HasChain) { // If this intrinsic has side-effects, chainify it.
3200 if (OnlyLoad) {
3201 // We don't need to serialize loads against other loads.
3202 Ops.push_back(DAG.getRoot());
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00003203 } else {
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00003204 Ops.push_back(getRoot());
3205 }
3206 }
Mon P Wang3efcd4a2008-11-01 20:24:53 +00003207
3208 // Info is set by getTgtMemInstrinsic
3209 TargetLowering::IntrinsicInfo Info;
3210 bool IsTgtIntrinsic = TLI.getTgtMemIntrinsic(Info, I, Intrinsic);
3211
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00003212 // Add the intrinsic ID as an integer operand if it's not a target intrinsic.
Bob Wilson65ffec42010-09-21 17:56:22 +00003213 if (!IsTgtIntrinsic || Info.opc == ISD::INTRINSIC_VOID ||
3214 Info.opc == ISD::INTRINSIC_W_CHAIN)
Mon P Wang3efcd4a2008-11-01 20:24:53 +00003215 Ops.push_back(DAG.getConstant(Intrinsic, TLI.getPointerTy()));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00003216
3217 // Add all operands of the call to the operand list.
Gabor Greif0635f352010-06-25 09:38:13 +00003218 for (unsigned i = 0, e = I.getNumArgOperands(); i != e; ++i) {
3219 SDValue Op = getValue(I.getArgOperand(i));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00003220 assert(TLI.isTypeLegal(Op.getValueType()) &&
3221 "Intrinsic uses a non-legal type?");
3222 Ops.push_back(Op);
3223 }
3224
Owen Andersone50ed302009-08-10 22:56:29 +00003225 SmallVector<EVT, 4> ValueVTs;
Bob Wilson8d919552009-07-31 22:41:21 +00003226 ComputeValueVTs(TLI, I.getType(), ValueVTs);
3227#ifndef NDEBUG
3228 for (unsigned Val = 0, E = ValueVTs.size(); Val != E; ++Val) {
3229 assert(TLI.isTypeLegal(ValueVTs[Val]) &&
3230 "Intrinsic uses a non-legal type?");
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00003231 }
Bob Wilson8d919552009-07-31 22:41:21 +00003232#endif // NDEBUG
Bill Wendling856ff412009-12-22 00:12:37 +00003233
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00003234 if (HasChain)
Owen Anderson825b72b2009-08-11 20:47:22 +00003235 ValueVTs.push_back(MVT::Other);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00003236
Bob Wilson8d919552009-07-31 22:41:21 +00003237 SDVTList VTs = DAG.getVTList(ValueVTs.data(), ValueVTs.size());
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00003238
3239 // Create the node.
3240 SDValue Result;
Mon P Wang3efcd4a2008-11-01 20:24:53 +00003241 if (IsTgtIntrinsic) {
3242 // This is target intrinsic that touches memory
Dale Johannesen66978ee2009-01-31 02:22:37 +00003243 Result = DAG.getMemIntrinsicNode(Info.opc, getCurDebugLoc(),
Dan Gohmanfc166572009-04-09 23:54:40 +00003244 VTs, &Ops[0], Ops.size(),
Chris Lattnere9ba5dd2010-09-21 04:57:15 +00003245 Info.memVT,
3246 MachinePointerInfo(Info.ptrVal, Info.offset),
Mon P Wang3efcd4a2008-11-01 20:24:53 +00003247 Info.align, Info.vol,
3248 Info.readMem, Info.writeMem);
Bill Wendling856ff412009-12-22 00:12:37 +00003249 } else if (!HasChain) {
Scott Michelfdc40a02009-02-17 22:15:04 +00003250 Result = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, getCurDebugLoc(),
Dan Gohmanfc166572009-04-09 23:54:40 +00003251 VTs, &Ops[0], Ops.size());
Benjamin Kramerf0127052010-01-05 13:12:22 +00003252 } else if (!I.getType()->isVoidTy()) {
Scott Michelfdc40a02009-02-17 22:15:04 +00003253 Result = DAG.getNode(ISD::INTRINSIC_W_CHAIN, getCurDebugLoc(),
Dan Gohmanfc166572009-04-09 23:54:40 +00003254 VTs, &Ops[0], Ops.size());
Bill Wendling856ff412009-12-22 00:12:37 +00003255 } else {
Scott Michelfdc40a02009-02-17 22:15:04 +00003256 Result = DAG.getNode(ISD::INTRINSIC_VOID, getCurDebugLoc(),
Dan Gohmanfc166572009-04-09 23:54:40 +00003257 VTs, &Ops[0], Ops.size());
Bill Wendling856ff412009-12-22 00:12:37 +00003258 }
3259
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00003260 if (HasChain) {
3261 SDValue Chain = Result.getValue(Result.getNode()->getNumValues()-1);
3262 if (OnlyLoad)
3263 PendingLoads.push_back(Chain);
3264 else
3265 DAG.setRoot(Chain);
3266 }
Bill Wendling856ff412009-12-22 00:12:37 +00003267
Benjamin Kramerf0127052010-01-05 13:12:22 +00003268 if (!I.getType()->isVoidTy()) {
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00003269 if (const VectorType *PTy = dyn_cast<VectorType>(I.getType())) {
Owen Andersone50ed302009-08-10 22:56:29 +00003270 EVT VT = TLI.getValueType(PTy);
Wesley Peckbf17cfa2010-11-23 03:31:01 +00003271 Result = DAG.getNode(ISD::BITCAST, getCurDebugLoc(), VT, Result);
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00003272 }
Bill Wendling856ff412009-12-22 00:12:37 +00003273
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00003274 setValue(&I, Result);
3275 }
3276}
3277
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003278/// GetSignificand - Get the significand and build it into a floating-point
3279/// number with exponent of 1:
3280///
3281/// Op = (Op & 0x007fffff) | 0x3f800000;
3282///
3283/// where Op is the hexidecimal representation of floating point value.
Bill Wendling39150252008-09-09 20:39:27 +00003284static SDValue
Bill Wendling46ada192010-03-02 01:55:18 +00003285GetSignificand(SelectionDAG &DAG, SDValue Op, DebugLoc dl) {
Owen Anderson825b72b2009-08-11 20:47:22 +00003286 SDValue t1 = DAG.getNode(ISD::AND, dl, MVT::i32, Op,
3287 DAG.getConstant(0x007fffff, MVT::i32));
3288 SDValue t2 = DAG.getNode(ISD::OR, dl, MVT::i32, t1,
3289 DAG.getConstant(0x3f800000, MVT::i32));
Wesley Peckbf17cfa2010-11-23 03:31:01 +00003290 return DAG.getNode(ISD::BITCAST, dl, MVT::f32, t2);
Bill Wendling39150252008-09-09 20:39:27 +00003291}
3292
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003293/// GetExponent - Get the exponent:
3294///
Bill Wendlinge9a72862009-01-20 21:17:57 +00003295/// (float)(int)(((Op & 0x7f800000) >> 23) - 127);
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003296///
3297/// where Op is the hexidecimal representation of floating point value.
Bill Wendling39150252008-09-09 20:39:27 +00003298static SDValue
Dale Johannesen66978ee2009-01-31 02:22:37 +00003299GetExponent(SelectionDAG &DAG, SDValue Op, const TargetLowering &TLI,
Bill Wendling46ada192010-03-02 01:55:18 +00003300 DebugLoc dl) {
Owen Anderson825b72b2009-08-11 20:47:22 +00003301 SDValue t0 = DAG.getNode(ISD::AND, dl, MVT::i32, Op,
3302 DAG.getConstant(0x7f800000, MVT::i32));
3303 SDValue t1 = DAG.getNode(ISD::SRL, dl, MVT::i32, t0,
Duncan Sands92abc622009-01-31 15:50:11 +00003304 DAG.getConstant(23, TLI.getPointerTy()));
Owen Anderson825b72b2009-08-11 20:47:22 +00003305 SDValue t2 = DAG.getNode(ISD::SUB, dl, MVT::i32, t1,
3306 DAG.getConstant(127, MVT::i32));
Bill Wendling4533cac2010-01-28 21:51:40 +00003307 return DAG.getNode(ISD::SINT_TO_FP, dl, MVT::f32, t2);
Bill Wendling39150252008-09-09 20:39:27 +00003308}
3309
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003310/// getF32Constant - Get 32-bit floating point constant.
3311static SDValue
3312getF32Constant(SelectionDAG &DAG, unsigned Flt) {
Owen Anderson825b72b2009-08-11 20:47:22 +00003313 return DAG.getConstantFP(APFloat(APInt(32, Flt)), MVT::f32);
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003314}
3315
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00003316/// Inlined utility function to implement binary input atomic intrinsics for
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00003317/// visitIntrinsicCall: I is a call instruction
3318/// Op is the associated NodeType for I
3319const char *
Dan Gohman46510a72010-04-15 01:51:59 +00003320SelectionDAGBuilder::implVisitBinaryAtomic(const CallInst& I,
3321 ISD::NodeType Op) {
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00003322 SDValue Root = getRoot();
Dan Gohman0b1d4a72008-12-23 21:37:04 +00003323 SDValue L =
Dale Johannesen66978ee2009-01-31 02:22:37 +00003324 DAG.getAtomic(Op, getCurDebugLoc(),
Gabor Greif0635f352010-06-25 09:38:13 +00003325 getValue(I.getArgOperand(1)).getValueType().getSimpleVT(),
Dan Gohman0b1d4a72008-12-23 21:37:04 +00003326 Root,
Gabor Greif0635f352010-06-25 09:38:13 +00003327 getValue(I.getArgOperand(0)),
3328 getValue(I.getArgOperand(1)),
3329 I.getArgOperand(0));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00003330 setValue(&I, L);
3331 DAG.setRoot(L.getValue(1));
3332 return 0;
3333}
3334
Bill Wendling2ce4e5c2008-12-10 00:28:22 +00003335// implVisitAluOverflow - Lower arithmetic overflow instrinsics.
Bill Wendling74c37652008-12-09 22:08:41 +00003336const char *
Dan Gohman46510a72010-04-15 01:51:59 +00003337SelectionDAGBuilder::implVisitAluOverflow(const CallInst &I, ISD::NodeType Op) {
Gabor Greif0635f352010-06-25 09:38:13 +00003338 SDValue Op1 = getValue(I.getArgOperand(0));
3339 SDValue Op2 = getValue(I.getArgOperand(1));
Bill Wendling74c37652008-12-09 22:08:41 +00003340
Owen Anderson825b72b2009-08-11 20:47:22 +00003341 SDVTList VTs = DAG.getVTList(Op1.getValueType(), MVT::i1);
Bill Wendling4533cac2010-01-28 21:51:40 +00003342 setValue(&I, DAG.getNode(Op, getCurDebugLoc(), VTs, Op1, Op2));
Bill Wendling2ce4e5c2008-12-10 00:28:22 +00003343 return 0;
3344}
Bill Wendling74c37652008-12-09 22:08:41 +00003345
Bill Wendlingb4ec2832008-09-09 22:13:54 +00003346/// visitExp - Lower an exp intrinsic. Handles the special sequences for
3347/// limited-precision mode.
Dale Johannesen59e577f2008-09-05 18:38:42 +00003348void
Dan Gohman46510a72010-04-15 01:51:59 +00003349SelectionDAGBuilder::visitExp(const CallInst &I) {
Dale Johannesen59e577f2008-09-05 18:38:42 +00003350 SDValue result;
Dale Johannesen66978ee2009-01-31 02:22:37 +00003351 DebugLoc dl = getCurDebugLoc();
Bill Wendlingb4ec2832008-09-09 22:13:54 +00003352
Gabor Greif0635f352010-06-25 09:38:13 +00003353 if (getValue(I.getArgOperand(0)).getValueType() == MVT::f32 &&
Bill Wendlingb4ec2832008-09-09 22:13:54 +00003354 LimitFloatPrecision > 0 && LimitFloatPrecision <= 18) {
Gabor Greif0635f352010-06-25 09:38:13 +00003355 SDValue Op = getValue(I.getArgOperand(0));
Bill Wendlingb4ec2832008-09-09 22:13:54 +00003356
3357 // Put the exponent in the right bit position for later addition to the
3358 // final result:
3359 //
3360 // #define LOG2OFe 1.4426950f
3361 // IntegerPartOfX = ((int32_t)(X * LOG2OFe));
Owen Anderson825b72b2009-08-11 20:47:22 +00003362 SDValue t0 = DAG.getNode(ISD::FMUL, dl, MVT::f32, Op,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003363 getF32Constant(DAG, 0x3fb8aa3b));
Owen Anderson825b72b2009-08-11 20:47:22 +00003364 SDValue IntegerPartOfX = DAG.getNode(ISD::FP_TO_SINT, dl, MVT::i32, t0);
Bill Wendlingb4ec2832008-09-09 22:13:54 +00003365
3366 // FractionalPartOfX = (X * LOG2OFe) - (float)IntegerPartOfX;
Owen Anderson825b72b2009-08-11 20:47:22 +00003367 SDValue t1 = DAG.getNode(ISD::SINT_TO_FP, dl, MVT::f32, IntegerPartOfX);
3368 SDValue X = DAG.getNode(ISD::FSUB, dl, MVT::f32, t0, t1);
Bill Wendlingb4ec2832008-09-09 22:13:54 +00003369
3370 // IntegerPartOfX <<= 23;
Owen Anderson825b72b2009-08-11 20:47:22 +00003371 IntegerPartOfX = DAG.getNode(ISD::SHL, dl, MVT::i32, IntegerPartOfX,
Duncan Sands92abc622009-01-31 15:50:11 +00003372 DAG.getConstant(23, TLI.getPointerTy()));
Bill Wendling856ff412009-12-22 00:12:37 +00003373
Bill Wendlingb4ec2832008-09-09 22:13:54 +00003374 if (LimitFloatPrecision <= 6) {
3375 // For floating-point precision of 6:
3376 //
3377 // TwoToFractionalPartOfX =
3378 // 0.997535578f +
3379 // (0.735607626f + 0.252464424f * x) * x;
3380 //
3381 // error 0.0144103317, which is 6 bits
Owen Anderson825b72b2009-08-11 20:47:22 +00003382 SDValue t2 = DAG.getNode(ISD::FMUL, dl, MVT::f32, X,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003383 getF32Constant(DAG, 0x3e814304));
Owen Anderson825b72b2009-08-11 20:47:22 +00003384 SDValue t3 = DAG.getNode(ISD::FADD, dl, MVT::f32, t2,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003385 getF32Constant(DAG, 0x3f3c50c8));
Owen Anderson825b72b2009-08-11 20:47:22 +00003386 SDValue t4 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t3, X);
3387 SDValue t5 = DAG.getNode(ISD::FADD, dl, MVT::f32, t4,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003388 getF32Constant(DAG, 0x3f7f5e7e));
Wesley Peckbf17cfa2010-11-23 03:31:01 +00003389 SDValue TwoToFracPartOfX = DAG.getNode(ISD::BITCAST, dl,MVT::i32, t5);
Bill Wendlingb4ec2832008-09-09 22:13:54 +00003390
3391 // Add the exponent into the result in integer domain.
Owen Anderson825b72b2009-08-11 20:47:22 +00003392 SDValue t6 = DAG.getNode(ISD::ADD, dl, MVT::i32,
Bill Wendlingb4ec2832008-09-09 22:13:54 +00003393 TwoToFracPartOfX, IntegerPartOfX);
3394
Wesley Peckbf17cfa2010-11-23 03:31:01 +00003395 result = DAG.getNode(ISD::BITCAST, dl, MVT::f32, t6);
Bill Wendlingb4ec2832008-09-09 22:13:54 +00003396 } else if (LimitFloatPrecision > 6 && LimitFloatPrecision <= 12) {
3397 // For floating-point precision of 12:
3398 //
3399 // TwoToFractionalPartOfX =
3400 // 0.999892986f +
3401 // (0.696457318f +
3402 // (0.224338339f + 0.792043434e-1f * x) * x) * x;
3403 //
3404 // 0.000107046256 error, which is 13 to 14 bits
Owen Anderson825b72b2009-08-11 20:47:22 +00003405 SDValue t2 = DAG.getNode(ISD::FMUL, dl, MVT::f32, X,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003406 getF32Constant(DAG, 0x3da235e3));
Owen Anderson825b72b2009-08-11 20:47:22 +00003407 SDValue t3 = DAG.getNode(ISD::FADD, dl, MVT::f32, t2,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003408 getF32Constant(DAG, 0x3e65b8f3));
Owen Anderson825b72b2009-08-11 20:47:22 +00003409 SDValue t4 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t3, X);
3410 SDValue t5 = DAG.getNode(ISD::FADD, dl, MVT::f32, t4,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003411 getF32Constant(DAG, 0x3f324b07));
Owen Anderson825b72b2009-08-11 20:47:22 +00003412 SDValue t6 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t5, X);
3413 SDValue t7 = DAG.getNode(ISD::FADD, dl, MVT::f32, t6,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003414 getF32Constant(DAG, 0x3f7ff8fd));
Wesley Peckbf17cfa2010-11-23 03:31:01 +00003415 SDValue TwoToFracPartOfX = DAG.getNode(ISD::BITCAST, dl,MVT::i32, t7);
Bill Wendlingb4ec2832008-09-09 22:13:54 +00003416
3417 // Add the exponent into the result in integer domain.
Owen Anderson825b72b2009-08-11 20:47:22 +00003418 SDValue t8 = DAG.getNode(ISD::ADD, dl, MVT::i32,
Bill Wendlingb4ec2832008-09-09 22:13:54 +00003419 TwoToFracPartOfX, IntegerPartOfX);
3420
Wesley Peckbf17cfa2010-11-23 03:31:01 +00003421 result = DAG.getNode(ISD::BITCAST, dl, MVT::f32, t8);
Bill Wendlingb4ec2832008-09-09 22:13:54 +00003422 } else { // LimitFloatPrecision > 12 && LimitFloatPrecision <= 18
3423 // For floating-point precision of 18:
3424 //
3425 // TwoToFractionalPartOfX =
3426 // 0.999999982f +
3427 // (0.693148872f +
3428 // (0.240227044f +
3429 // (0.554906021e-1f +
3430 // (0.961591928e-2f +
3431 // (0.136028312e-2f + 0.157059148e-3f *x)*x)*x)*x)*x)*x;
3432 //
3433 // error 2.47208000*10^(-7), which is better than 18 bits
Owen Anderson825b72b2009-08-11 20:47:22 +00003434 SDValue t2 = DAG.getNode(ISD::FMUL, dl, MVT::f32, X,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003435 getF32Constant(DAG, 0x3924b03e));
Owen Anderson825b72b2009-08-11 20:47:22 +00003436 SDValue t3 = DAG.getNode(ISD::FADD, dl, MVT::f32, t2,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003437 getF32Constant(DAG, 0x3ab24b87));
Owen Anderson825b72b2009-08-11 20:47:22 +00003438 SDValue t4 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t3, X);
3439 SDValue t5 = DAG.getNode(ISD::FADD, dl, MVT::f32, t4,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003440 getF32Constant(DAG, 0x3c1d8c17));
Owen Anderson825b72b2009-08-11 20:47:22 +00003441 SDValue t6 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t5, X);
3442 SDValue t7 = DAG.getNode(ISD::FADD, dl, MVT::f32, t6,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003443 getF32Constant(DAG, 0x3d634a1d));
Owen Anderson825b72b2009-08-11 20:47:22 +00003444 SDValue t8 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t7, X);
3445 SDValue t9 = DAG.getNode(ISD::FADD, dl, MVT::f32, t8,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003446 getF32Constant(DAG, 0x3e75fe14));
Owen Anderson825b72b2009-08-11 20:47:22 +00003447 SDValue t10 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t9, X);
3448 SDValue t11 = DAG.getNode(ISD::FADD, dl, MVT::f32, t10,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003449 getF32Constant(DAG, 0x3f317234));
Owen Anderson825b72b2009-08-11 20:47:22 +00003450 SDValue t12 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t11, X);
3451 SDValue t13 = DAG.getNode(ISD::FADD, dl, MVT::f32, t12,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003452 getF32Constant(DAG, 0x3f800000));
Wesley Peckbf17cfa2010-11-23 03:31:01 +00003453 SDValue TwoToFracPartOfX = DAG.getNode(ISD::BITCAST, dl,
Owen Anderson825b72b2009-08-11 20:47:22 +00003454 MVT::i32, t13);
Bill Wendlingb4ec2832008-09-09 22:13:54 +00003455
3456 // Add the exponent into the result in integer domain.
Owen Anderson825b72b2009-08-11 20:47:22 +00003457 SDValue t14 = DAG.getNode(ISD::ADD, dl, MVT::i32,
Bill Wendlingb4ec2832008-09-09 22:13:54 +00003458 TwoToFracPartOfX, IntegerPartOfX);
3459
Wesley Peckbf17cfa2010-11-23 03:31:01 +00003460 result = DAG.getNode(ISD::BITCAST, dl, MVT::f32, t14);
Bill Wendlingb4ec2832008-09-09 22:13:54 +00003461 }
3462 } else {
3463 // No special expansion.
Dale Johannesenfa42dea2009-01-30 01:34:22 +00003464 result = DAG.getNode(ISD::FEXP, dl,
Gabor Greif0635f352010-06-25 09:38:13 +00003465 getValue(I.getArgOperand(0)).getValueType(),
3466 getValue(I.getArgOperand(0)));
Bill Wendlingb4ec2832008-09-09 22:13:54 +00003467 }
3468
Dale Johannesen59e577f2008-09-05 18:38:42 +00003469 setValue(&I, result);
3470}
3471
Bill Wendling39150252008-09-09 20:39:27 +00003472/// visitLog - Lower a log intrinsic. Handles the special sequences for
3473/// limited-precision mode.
Dale Johannesen59e577f2008-09-05 18:38:42 +00003474void
Dan Gohman46510a72010-04-15 01:51:59 +00003475SelectionDAGBuilder::visitLog(const CallInst &I) {
Dale Johannesen59e577f2008-09-05 18:38:42 +00003476 SDValue result;
Dale Johannesen66978ee2009-01-31 02:22:37 +00003477 DebugLoc dl = getCurDebugLoc();
Bill Wendling39150252008-09-09 20:39:27 +00003478
Gabor Greif0635f352010-06-25 09:38:13 +00003479 if (getValue(I.getArgOperand(0)).getValueType() == MVT::f32 &&
Bill Wendling39150252008-09-09 20:39:27 +00003480 LimitFloatPrecision > 0 && LimitFloatPrecision <= 18) {
Gabor Greif0635f352010-06-25 09:38:13 +00003481 SDValue Op = getValue(I.getArgOperand(0));
Wesley Peckbf17cfa2010-11-23 03:31:01 +00003482 SDValue Op1 = DAG.getNode(ISD::BITCAST, dl, MVT::i32, Op);
Bill Wendling39150252008-09-09 20:39:27 +00003483
3484 // Scale the exponent by log(2) [0.69314718f].
Bill Wendling46ada192010-03-02 01:55:18 +00003485 SDValue Exp = GetExponent(DAG, Op1, TLI, dl);
Owen Anderson825b72b2009-08-11 20:47:22 +00003486 SDValue LogOfExponent = DAG.getNode(ISD::FMUL, dl, MVT::f32, Exp,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003487 getF32Constant(DAG, 0x3f317218));
Bill Wendling39150252008-09-09 20:39:27 +00003488
3489 // Get the significand and build it into a floating-point number with
3490 // exponent of 1.
Bill Wendling46ada192010-03-02 01:55:18 +00003491 SDValue X = GetSignificand(DAG, Op1, dl);
Bill Wendling39150252008-09-09 20:39:27 +00003492
3493 if (LimitFloatPrecision <= 6) {
3494 // For floating-point precision of 6:
3495 //
3496 // LogofMantissa =
3497 // -1.1609546f +
3498 // (1.4034025f - 0.23903021f * x) * x;
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00003499 //
Bill Wendling39150252008-09-09 20:39:27 +00003500 // error 0.0034276066, which is better than 8 bits
Owen Anderson825b72b2009-08-11 20:47:22 +00003501 SDValue t0 = DAG.getNode(ISD::FMUL, dl, MVT::f32, X,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003502 getF32Constant(DAG, 0xbe74c456));
Owen Anderson825b72b2009-08-11 20:47:22 +00003503 SDValue t1 = DAG.getNode(ISD::FADD, dl, MVT::f32, t0,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003504 getF32Constant(DAG, 0x3fb3a2b1));
Owen Anderson825b72b2009-08-11 20:47:22 +00003505 SDValue t2 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t1, X);
3506 SDValue LogOfMantissa = DAG.getNode(ISD::FSUB, dl, MVT::f32, t2,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003507 getF32Constant(DAG, 0x3f949a29));
Bill Wendling39150252008-09-09 20:39:27 +00003508
Scott Michelfdc40a02009-02-17 22:15:04 +00003509 result = DAG.getNode(ISD::FADD, dl,
Owen Anderson825b72b2009-08-11 20:47:22 +00003510 MVT::f32, LogOfExponent, LogOfMantissa);
Bill Wendling39150252008-09-09 20:39:27 +00003511 } else if (LimitFloatPrecision > 6 && LimitFloatPrecision <= 12) {
3512 // For floating-point precision of 12:
3513 //
3514 // LogOfMantissa =
3515 // -1.7417939f +
3516 // (2.8212026f +
3517 // (-1.4699568f +
3518 // (0.44717955f - 0.56570851e-1f * x) * x) * x) * x;
3519 //
3520 // error 0.000061011436, which is 14 bits
Owen Anderson825b72b2009-08-11 20:47:22 +00003521 SDValue t0 = DAG.getNode(ISD::FMUL, dl, MVT::f32, X,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003522 getF32Constant(DAG, 0xbd67b6d6));
Owen Anderson825b72b2009-08-11 20:47:22 +00003523 SDValue t1 = DAG.getNode(ISD::FADD, dl, MVT::f32, t0,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003524 getF32Constant(DAG, 0x3ee4f4b8));
Owen Anderson825b72b2009-08-11 20:47:22 +00003525 SDValue t2 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t1, X);
3526 SDValue t3 = DAG.getNode(ISD::FSUB, dl, MVT::f32, t2,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003527 getF32Constant(DAG, 0x3fbc278b));
Owen Anderson825b72b2009-08-11 20:47:22 +00003528 SDValue t4 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t3, X);
3529 SDValue t5 = DAG.getNode(ISD::FADD, dl, MVT::f32, t4,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003530 getF32Constant(DAG, 0x40348e95));
Owen Anderson825b72b2009-08-11 20:47:22 +00003531 SDValue t6 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t5, X);
3532 SDValue LogOfMantissa = DAG.getNode(ISD::FSUB, dl, MVT::f32, t6,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003533 getF32Constant(DAG, 0x3fdef31a));
Bill Wendling39150252008-09-09 20:39:27 +00003534
Scott Michelfdc40a02009-02-17 22:15:04 +00003535 result = DAG.getNode(ISD::FADD, dl,
Owen Anderson825b72b2009-08-11 20:47:22 +00003536 MVT::f32, LogOfExponent, LogOfMantissa);
Bill Wendling39150252008-09-09 20:39:27 +00003537 } else { // LimitFloatPrecision > 12 && LimitFloatPrecision <= 18
3538 // For floating-point precision of 18:
3539 //
3540 // LogOfMantissa =
3541 // -2.1072184f +
3542 // (4.2372794f +
3543 // (-3.7029485f +
3544 // (2.2781945f +
3545 // (-0.87823314f +
3546 // (0.19073739f - 0.17809712e-1f * x) * x) * x) * x) * x)*x;
3547 //
3548 // error 0.0000023660568, which is better than 18 bits
Owen Anderson825b72b2009-08-11 20:47:22 +00003549 SDValue t0 = DAG.getNode(ISD::FMUL, dl, MVT::f32, X,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003550 getF32Constant(DAG, 0xbc91e5ac));
Owen Anderson825b72b2009-08-11 20:47:22 +00003551 SDValue t1 = DAG.getNode(ISD::FADD, dl, MVT::f32, t0,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003552 getF32Constant(DAG, 0x3e4350aa));
Owen Anderson825b72b2009-08-11 20:47:22 +00003553 SDValue t2 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t1, X);
3554 SDValue t3 = DAG.getNode(ISD::FSUB, dl, MVT::f32, t2,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003555 getF32Constant(DAG, 0x3f60d3e3));
Owen Anderson825b72b2009-08-11 20:47:22 +00003556 SDValue t4 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t3, X);
3557 SDValue t5 = DAG.getNode(ISD::FADD, dl, MVT::f32, t4,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003558 getF32Constant(DAG, 0x4011cdf0));
Owen Anderson825b72b2009-08-11 20:47:22 +00003559 SDValue t6 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t5, X);
3560 SDValue t7 = DAG.getNode(ISD::FSUB, dl, MVT::f32, t6,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003561 getF32Constant(DAG, 0x406cfd1c));
Owen Anderson825b72b2009-08-11 20:47:22 +00003562 SDValue t8 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t7, X);
3563 SDValue t9 = DAG.getNode(ISD::FADD, dl, MVT::f32, t8,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003564 getF32Constant(DAG, 0x408797cb));
Owen Anderson825b72b2009-08-11 20:47:22 +00003565 SDValue t10 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t9, X);
3566 SDValue LogOfMantissa = DAG.getNode(ISD::FSUB, dl, MVT::f32, t10,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003567 getF32Constant(DAG, 0x4006dcab));
Bill Wendling39150252008-09-09 20:39:27 +00003568
Scott Michelfdc40a02009-02-17 22:15:04 +00003569 result = DAG.getNode(ISD::FADD, dl,
Owen Anderson825b72b2009-08-11 20:47:22 +00003570 MVT::f32, LogOfExponent, LogOfMantissa);
Bill Wendling39150252008-09-09 20:39:27 +00003571 }
3572 } else {
3573 // No special expansion.
Dale Johannesenfa42dea2009-01-30 01:34:22 +00003574 result = DAG.getNode(ISD::FLOG, dl,
Gabor Greif0635f352010-06-25 09:38:13 +00003575 getValue(I.getArgOperand(0)).getValueType(),
3576 getValue(I.getArgOperand(0)));
Bill Wendling39150252008-09-09 20:39:27 +00003577 }
3578
Dale Johannesen59e577f2008-09-05 18:38:42 +00003579 setValue(&I, result);
3580}
3581
Bill Wendling3eb59402008-09-09 00:28:24 +00003582/// visitLog2 - Lower a log2 intrinsic. Handles the special sequences for
3583/// limited-precision mode.
Dale Johannesen59e577f2008-09-05 18:38:42 +00003584void
Dan Gohman46510a72010-04-15 01:51:59 +00003585SelectionDAGBuilder::visitLog2(const CallInst &I) {
Dale Johannesen59e577f2008-09-05 18:38:42 +00003586 SDValue result;
Dale Johannesen66978ee2009-01-31 02:22:37 +00003587 DebugLoc dl = getCurDebugLoc();
Bill Wendling3eb59402008-09-09 00:28:24 +00003588
Gabor Greif0635f352010-06-25 09:38:13 +00003589 if (getValue(I.getArgOperand(0)).getValueType() == MVT::f32 &&
Bill Wendling3eb59402008-09-09 00:28:24 +00003590 LimitFloatPrecision > 0 && LimitFloatPrecision <= 18) {
Gabor Greif0635f352010-06-25 09:38:13 +00003591 SDValue Op = getValue(I.getArgOperand(0));
Wesley Peckbf17cfa2010-11-23 03:31:01 +00003592 SDValue Op1 = DAG.getNode(ISD::BITCAST, dl, MVT::i32, Op);
Bill Wendling3eb59402008-09-09 00:28:24 +00003593
Bill Wendling39150252008-09-09 20:39:27 +00003594 // Get the exponent.
Bill Wendling46ada192010-03-02 01:55:18 +00003595 SDValue LogOfExponent = GetExponent(DAG, Op1, TLI, dl);
Bill Wendling856ff412009-12-22 00:12:37 +00003596
Bill Wendling3eb59402008-09-09 00:28:24 +00003597 // Get the significand and build it into a floating-point number with
Bill Wendling39150252008-09-09 20:39:27 +00003598 // exponent of 1.
Bill Wendling46ada192010-03-02 01:55:18 +00003599 SDValue X = GetSignificand(DAG, Op1, dl);
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00003600
Bill Wendling3eb59402008-09-09 00:28:24 +00003601 // Different possible minimax approximations of significand in
3602 // floating-point for various degrees of accuracy over [1,2].
3603 if (LimitFloatPrecision <= 6) {
3604 // For floating-point precision of 6:
3605 //
3606 // Log2ofMantissa = -1.6749035f + (2.0246817f - .34484768f * x) * x;
3607 //
3608 // error 0.0049451742, which is more than 7 bits
Owen Anderson825b72b2009-08-11 20:47:22 +00003609 SDValue t0 = DAG.getNode(ISD::FMUL, dl, MVT::f32, X,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003610 getF32Constant(DAG, 0xbeb08fe0));
Owen Anderson825b72b2009-08-11 20:47:22 +00003611 SDValue t1 = DAG.getNode(ISD::FADD, dl, MVT::f32, t0,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003612 getF32Constant(DAG, 0x40019463));
Owen Anderson825b72b2009-08-11 20:47:22 +00003613 SDValue t2 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t1, X);
3614 SDValue Log2ofMantissa = DAG.getNode(ISD::FSUB, dl, MVT::f32, t2,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003615 getF32Constant(DAG, 0x3fd6633d));
Bill Wendling3eb59402008-09-09 00:28:24 +00003616
Scott Michelfdc40a02009-02-17 22:15:04 +00003617 result = DAG.getNode(ISD::FADD, dl,
Owen Anderson825b72b2009-08-11 20:47:22 +00003618 MVT::f32, LogOfExponent, Log2ofMantissa);
Bill Wendling3eb59402008-09-09 00:28:24 +00003619 } else if (LimitFloatPrecision > 6 && LimitFloatPrecision <= 12) {
3620 // For floating-point precision of 12:
3621 //
3622 // Log2ofMantissa =
3623 // -2.51285454f +
3624 // (4.07009056f +
3625 // (-2.12067489f +
3626 // (.645142248f - 0.816157886e-1f * x) * x) * x) * x;
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00003627 //
Bill Wendling3eb59402008-09-09 00:28:24 +00003628 // error 0.0000876136000, which is better than 13 bits
Owen Anderson825b72b2009-08-11 20:47:22 +00003629 SDValue t0 = DAG.getNode(ISD::FMUL, dl, MVT::f32, X,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003630 getF32Constant(DAG, 0xbda7262e));
Owen Anderson825b72b2009-08-11 20:47:22 +00003631 SDValue t1 = DAG.getNode(ISD::FADD, dl, MVT::f32, t0,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003632 getF32Constant(DAG, 0x3f25280b));
Owen Anderson825b72b2009-08-11 20:47:22 +00003633 SDValue t2 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t1, X);
3634 SDValue t3 = DAG.getNode(ISD::FSUB, dl, MVT::f32, t2,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003635 getF32Constant(DAG, 0x4007b923));
Owen Anderson825b72b2009-08-11 20:47:22 +00003636 SDValue t4 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t3, X);
3637 SDValue t5 = DAG.getNode(ISD::FADD, dl, MVT::f32, t4,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003638 getF32Constant(DAG, 0x40823e2f));
Owen Anderson825b72b2009-08-11 20:47:22 +00003639 SDValue t6 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t5, X);
3640 SDValue Log2ofMantissa = DAG.getNode(ISD::FSUB, dl, MVT::f32, t6,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003641 getF32Constant(DAG, 0x4020d29c));
Bill Wendling3eb59402008-09-09 00:28:24 +00003642
Scott Michelfdc40a02009-02-17 22:15:04 +00003643 result = DAG.getNode(ISD::FADD, dl,
Owen Anderson825b72b2009-08-11 20:47:22 +00003644 MVT::f32, LogOfExponent, Log2ofMantissa);
Bill Wendling3eb59402008-09-09 00:28:24 +00003645 } else { // LimitFloatPrecision > 12 && LimitFloatPrecision <= 18
3646 // For floating-point precision of 18:
3647 //
3648 // Log2ofMantissa =
3649 // -3.0400495f +
3650 // (6.1129976f +
3651 // (-5.3420409f +
3652 // (3.2865683f +
3653 // (-1.2669343f +
3654 // (0.27515199f -
3655 // 0.25691327e-1f * x) * x) * x) * x) * x) * x;
3656 //
3657 // error 0.0000018516, which is better than 18 bits
Owen Anderson825b72b2009-08-11 20:47:22 +00003658 SDValue t0 = DAG.getNode(ISD::FMUL, dl, MVT::f32, X,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003659 getF32Constant(DAG, 0xbcd2769e));
Owen Anderson825b72b2009-08-11 20:47:22 +00003660 SDValue t1 = DAG.getNode(ISD::FADD, dl, MVT::f32, t0,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003661 getF32Constant(DAG, 0x3e8ce0b9));
Owen Anderson825b72b2009-08-11 20:47:22 +00003662 SDValue t2 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t1, X);
3663 SDValue t3 = DAG.getNode(ISD::FSUB, dl, MVT::f32, t2,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003664 getF32Constant(DAG, 0x3fa22ae7));
Owen Anderson825b72b2009-08-11 20:47:22 +00003665 SDValue t4 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t3, X);
3666 SDValue t5 = DAG.getNode(ISD::FADD, dl, MVT::f32, t4,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003667 getF32Constant(DAG, 0x40525723));
Owen Anderson825b72b2009-08-11 20:47:22 +00003668 SDValue t6 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t5, X);
3669 SDValue t7 = DAG.getNode(ISD::FSUB, dl, MVT::f32, t6,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003670 getF32Constant(DAG, 0x40aaf200));
Owen Anderson825b72b2009-08-11 20:47:22 +00003671 SDValue t8 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t7, X);
3672 SDValue t9 = DAG.getNode(ISD::FADD, dl, MVT::f32, t8,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003673 getF32Constant(DAG, 0x40c39dad));
Owen Anderson825b72b2009-08-11 20:47:22 +00003674 SDValue t10 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t9, X);
3675 SDValue Log2ofMantissa = DAG.getNode(ISD::FSUB, dl, MVT::f32, t10,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003676 getF32Constant(DAG, 0x4042902c));
Bill Wendling3eb59402008-09-09 00:28:24 +00003677
Scott Michelfdc40a02009-02-17 22:15:04 +00003678 result = DAG.getNode(ISD::FADD, dl,
Owen Anderson825b72b2009-08-11 20:47:22 +00003679 MVT::f32, LogOfExponent, Log2ofMantissa);
Bill Wendling3eb59402008-09-09 00:28:24 +00003680 }
Dale Johannesen853244f2008-09-05 23:49:37 +00003681 } else {
Bill Wendling3eb59402008-09-09 00:28:24 +00003682 // No special expansion.
Dale Johannesenfa42dea2009-01-30 01:34:22 +00003683 result = DAG.getNode(ISD::FLOG2, dl,
Gabor Greif0635f352010-06-25 09:38:13 +00003684 getValue(I.getArgOperand(0)).getValueType(),
3685 getValue(I.getArgOperand(0)));
Dale Johannesen853244f2008-09-05 23:49:37 +00003686 }
Bill Wendling3eb59402008-09-09 00:28:24 +00003687
Dale Johannesen59e577f2008-09-05 18:38:42 +00003688 setValue(&I, result);
3689}
3690
Bill Wendling3eb59402008-09-09 00:28:24 +00003691/// visitLog10 - Lower a log10 intrinsic. Handles the special sequences for
3692/// limited-precision mode.
Dale Johannesen59e577f2008-09-05 18:38:42 +00003693void
Dan Gohman46510a72010-04-15 01:51:59 +00003694SelectionDAGBuilder::visitLog10(const CallInst &I) {
Dale Johannesen59e577f2008-09-05 18:38:42 +00003695 SDValue result;
Dale Johannesen66978ee2009-01-31 02:22:37 +00003696 DebugLoc dl = getCurDebugLoc();
Bill Wendling181b6272008-10-19 20:34:04 +00003697
Gabor Greif0635f352010-06-25 09:38:13 +00003698 if (getValue(I.getArgOperand(0)).getValueType() == MVT::f32 &&
Bill Wendling3eb59402008-09-09 00:28:24 +00003699 LimitFloatPrecision > 0 && LimitFloatPrecision <= 18) {
Gabor Greif0635f352010-06-25 09:38:13 +00003700 SDValue Op = getValue(I.getArgOperand(0));
Wesley Peckbf17cfa2010-11-23 03:31:01 +00003701 SDValue Op1 = DAG.getNode(ISD::BITCAST, dl, MVT::i32, Op);
Bill Wendling3eb59402008-09-09 00:28:24 +00003702
Bill Wendling39150252008-09-09 20:39:27 +00003703 // Scale the exponent by log10(2) [0.30102999f].
Bill Wendling46ada192010-03-02 01:55:18 +00003704 SDValue Exp = GetExponent(DAG, Op1, TLI, dl);
Owen Anderson825b72b2009-08-11 20:47:22 +00003705 SDValue LogOfExponent = DAG.getNode(ISD::FMUL, dl, MVT::f32, Exp,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003706 getF32Constant(DAG, 0x3e9a209a));
Bill Wendling3eb59402008-09-09 00:28:24 +00003707
3708 // Get the significand and build it into a floating-point number with
Bill Wendling39150252008-09-09 20:39:27 +00003709 // exponent of 1.
Bill Wendling46ada192010-03-02 01:55:18 +00003710 SDValue X = GetSignificand(DAG, Op1, dl);
Bill Wendling3eb59402008-09-09 00:28:24 +00003711
3712 if (LimitFloatPrecision <= 6) {
Bill Wendlingbd297bc2008-09-09 18:42:23 +00003713 // For floating-point precision of 6:
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00003714 //
Bill Wendlingbd297bc2008-09-09 18:42:23 +00003715 // Log10ofMantissa =
3716 // -0.50419619f +
3717 // (0.60948995f - 0.10380950f * x) * x;
3718 //
3719 // error 0.0014886165, which is 6 bits
Owen Anderson825b72b2009-08-11 20:47:22 +00003720 SDValue t0 = DAG.getNode(ISD::FMUL, dl, MVT::f32, X,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003721 getF32Constant(DAG, 0xbdd49a13));
Owen Anderson825b72b2009-08-11 20:47:22 +00003722 SDValue t1 = DAG.getNode(ISD::FADD, dl, MVT::f32, t0,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003723 getF32Constant(DAG, 0x3f1c0789));
Owen Anderson825b72b2009-08-11 20:47:22 +00003724 SDValue t2 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t1, X);
3725 SDValue Log10ofMantissa = DAG.getNode(ISD::FSUB, dl, MVT::f32, t2,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003726 getF32Constant(DAG, 0x3f011300));
Bill Wendlingbd297bc2008-09-09 18:42:23 +00003727
Scott Michelfdc40a02009-02-17 22:15:04 +00003728 result = DAG.getNode(ISD::FADD, dl,
Owen Anderson825b72b2009-08-11 20:47:22 +00003729 MVT::f32, LogOfExponent, Log10ofMantissa);
Bill Wendling3eb59402008-09-09 00:28:24 +00003730 } else if (LimitFloatPrecision > 6 && LimitFloatPrecision <= 12) {
3731 // For floating-point precision of 12:
3732 //
3733 // Log10ofMantissa =
3734 // -0.64831180f +
3735 // (0.91751397f +
3736 // (-0.31664806f + 0.47637168e-1f * x) * x) * x;
3737 //
3738 // error 0.00019228036, which is better than 12 bits
Owen Anderson825b72b2009-08-11 20:47:22 +00003739 SDValue t0 = DAG.getNode(ISD::FMUL, dl, MVT::f32, X,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003740 getF32Constant(DAG, 0x3d431f31));
Owen Anderson825b72b2009-08-11 20:47:22 +00003741 SDValue t1 = DAG.getNode(ISD::FSUB, dl, MVT::f32, t0,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003742 getF32Constant(DAG, 0x3ea21fb2));
Owen Anderson825b72b2009-08-11 20:47:22 +00003743 SDValue t2 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t1, X);
3744 SDValue t3 = DAG.getNode(ISD::FADD, dl, MVT::f32, t2,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003745 getF32Constant(DAG, 0x3f6ae232));
Owen Anderson825b72b2009-08-11 20:47:22 +00003746 SDValue t4 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t3, X);
3747 SDValue Log10ofMantissa = DAG.getNode(ISD::FSUB, dl, MVT::f32, t4,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003748 getF32Constant(DAG, 0x3f25f7c3));
Bill Wendling3eb59402008-09-09 00:28:24 +00003749
Scott Michelfdc40a02009-02-17 22:15:04 +00003750 result = DAG.getNode(ISD::FADD, dl,
Owen Anderson825b72b2009-08-11 20:47:22 +00003751 MVT::f32, LogOfExponent, Log10ofMantissa);
Bill Wendling3eb59402008-09-09 00:28:24 +00003752 } else { // LimitFloatPrecision > 12 && LimitFloatPrecision <= 18
Bill Wendlingbd297bc2008-09-09 18:42:23 +00003753 // For floating-point precision of 18:
3754 //
3755 // Log10ofMantissa =
3756 // -0.84299375f +
3757 // (1.5327582f +
3758 // (-1.0688956f +
3759 // (0.49102474f +
3760 // (-0.12539807f + 0.13508273e-1f * x) * x) * x) * x) * x;
3761 //
3762 // error 0.0000037995730, which is better than 18 bits
Owen Anderson825b72b2009-08-11 20:47:22 +00003763 SDValue t0 = DAG.getNode(ISD::FMUL, dl, MVT::f32, X,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003764 getF32Constant(DAG, 0x3c5d51ce));
Owen Anderson825b72b2009-08-11 20:47:22 +00003765 SDValue t1 = DAG.getNode(ISD::FSUB, dl, MVT::f32, t0,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003766 getF32Constant(DAG, 0x3e00685a));
Owen Anderson825b72b2009-08-11 20:47:22 +00003767 SDValue t2 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t1, X);
3768 SDValue t3 = DAG.getNode(ISD::FADD, dl, MVT::f32, t2,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003769 getF32Constant(DAG, 0x3efb6798));
Owen Anderson825b72b2009-08-11 20:47:22 +00003770 SDValue t4 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t3, X);
3771 SDValue t5 = DAG.getNode(ISD::FSUB, dl, MVT::f32, t4,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003772 getF32Constant(DAG, 0x3f88d192));
Owen Anderson825b72b2009-08-11 20:47:22 +00003773 SDValue t6 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t5, X);
3774 SDValue t7 = DAG.getNode(ISD::FADD, dl, MVT::f32, t6,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003775 getF32Constant(DAG, 0x3fc4316c));
Owen Anderson825b72b2009-08-11 20:47:22 +00003776 SDValue t8 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t7, X);
3777 SDValue Log10ofMantissa = DAG.getNode(ISD::FSUB, dl, MVT::f32, t8,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003778 getF32Constant(DAG, 0x3f57ce70));
Bill Wendlingbd297bc2008-09-09 18:42:23 +00003779
Scott Michelfdc40a02009-02-17 22:15:04 +00003780 result = DAG.getNode(ISD::FADD, dl,
Owen Anderson825b72b2009-08-11 20:47:22 +00003781 MVT::f32, LogOfExponent, Log10ofMantissa);
Bill Wendling3eb59402008-09-09 00:28:24 +00003782 }
Dale Johannesen852680a2008-09-05 21:27:19 +00003783 } else {
Bill Wendling3eb59402008-09-09 00:28:24 +00003784 // No special expansion.
Dale Johannesenfa42dea2009-01-30 01:34:22 +00003785 result = DAG.getNode(ISD::FLOG10, dl,
Gabor Greif0635f352010-06-25 09:38:13 +00003786 getValue(I.getArgOperand(0)).getValueType(),
3787 getValue(I.getArgOperand(0)));
Dale Johannesen852680a2008-09-05 21:27:19 +00003788 }
Bill Wendling3eb59402008-09-09 00:28:24 +00003789
Dale Johannesen59e577f2008-09-05 18:38:42 +00003790 setValue(&I, result);
3791}
3792
Bill Wendlinge10c8142008-09-09 22:39:21 +00003793/// visitExp2 - Lower an exp2 intrinsic. Handles the special sequences for
3794/// limited-precision mode.
Dale Johannesen601d3c02008-09-05 01:48:15 +00003795void
Dan Gohman46510a72010-04-15 01:51:59 +00003796SelectionDAGBuilder::visitExp2(const CallInst &I) {
Dale Johannesen601d3c02008-09-05 01:48:15 +00003797 SDValue result;
Dale Johannesen66978ee2009-01-31 02:22:37 +00003798 DebugLoc dl = getCurDebugLoc();
Bill Wendlinge10c8142008-09-09 22:39:21 +00003799
Gabor Greif0635f352010-06-25 09:38:13 +00003800 if (getValue(I.getArgOperand(0)).getValueType() == MVT::f32 &&
Bill Wendlinge10c8142008-09-09 22:39:21 +00003801 LimitFloatPrecision > 0 && LimitFloatPrecision <= 18) {
Gabor Greif0635f352010-06-25 09:38:13 +00003802 SDValue Op = getValue(I.getArgOperand(0));
Bill Wendlinge10c8142008-09-09 22:39:21 +00003803
Owen Anderson825b72b2009-08-11 20:47:22 +00003804 SDValue IntegerPartOfX = DAG.getNode(ISD::FP_TO_SINT, dl, MVT::i32, Op);
Bill Wendlinge10c8142008-09-09 22:39:21 +00003805
3806 // FractionalPartOfX = x - (float)IntegerPartOfX;
Owen Anderson825b72b2009-08-11 20:47:22 +00003807 SDValue t1 = DAG.getNode(ISD::SINT_TO_FP, dl, MVT::f32, IntegerPartOfX);
3808 SDValue X = DAG.getNode(ISD::FSUB, dl, MVT::f32, Op, t1);
Bill Wendlinge10c8142008-09-09 22:39:21 +00003809
3810 // IntegerPartOfX <<= 23;
Owen Anderson825b72b2009-08-11 20:47:22 +00003811 IntegerPartOfX = DAG.getNode(ISD::SHL, dl, MVT::i32, IntegerPartOfX,
Duncan Sands92abc622009-01-31 15:50:11 +00003812 DAG.getConstant(23, TLI.getPointerTy()));
Bill Wendlinge10c8142008-09-09 22:39:21 +00003813
3814 if (LimitFloatPrecision <= 6) {
3815 // For floating-point precision of 6:
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00003816 //
Bill Wendlinge10c8142008-09-09 22:39:21 +00003817 // TwoToFractionalPartOfX =
3818 // 0.997535578f +
3819 // (0.735607626f + 0.252464424f * x) * x;
3820 //
3821 // error 0.0144103317, which is 6 bits
Owen Anderson825b72b2009-08-11 20:47:22 +00003822 SDValue t2 = DAG.getNode(ISD::FMUL, dl, MVT::f32, X,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003823 getF32Constant(DAG, 0x3e814304));
Owen Anderson825b72b2009-08-11 20:47:22 +00003824 SDValue t3 = DAG.getNode(ISD::FADD, dl, MVT::f32, t2,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003825 getF32Constant(DAG, 0x3f3c50c8));
Owen Anderson825b72b2009-08-11 20:47:22 +00003826 SDValue t4 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t3, X);
3827 SDValue t5 = DAG.getNode(ISD::FADD, dl, MVT::f32, t4,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003828 getF32Constant(DAG, 0x3f7f5e7e));
Wesley Peckbf17cfa2010-11-23 03:31:01 +00003829 SDValue t6 = DAG.getNode(ISD::BITCAST, dl, MVT::i32, t5);
Bill Wendlinge10c8142008-09-09 22:39:21 +00003830 SDValue TwoToFractionalPartOfX =
Owen Anderson825b72b2009-08-11 20:47:22 +00003831 DAG.getNode(ISD::ADD, dl, MVT::i32, t6, IntegerPartOfX);
Bill Wendlinge10c8142008-09-09 22:39:21 +00003832
Wesley Peckbf17cfa2010-11-23 03:31:01 +00003833 result = DAG.getNode(ISD::BITCAST, dl,
Owen Anderson825b72b2009-08-11 20:47:22 +00003834 MVT::f32, TwoToFractionalPartOfX);
Bill Wendlinge10c8142008-09-09 22:39:21 +00003835 } else if (LimitFloatPrecision > 6 && LimitFloatPrecision <= 12) {
3836 // For floating-point precision of 12:
3837 //
3838 // TwoToFractionalPartOfX =
3839 // 0.999892986f +
3840 // (0.696457318f +
3841 // (0.224338339f + 0.792043434e-1f * x) * x) * x;
3842 //
3843 // error 0.000107046256, which is 13 to 14 bits
Owen Anderson825b72b2009-08-11 20:47:22 +00003844 SDValue t2 = DAG.getNode(ISD::FMUL, dl, MVT::f32, X,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003845 getF32Constant(DAG, 0x3da235e3));
Owen Anderson825b72b2009-08-11 20:47:22 +00003846 SDValue t3 = DAG.getNode(ISD::FADD, dl, MVT::f32, t2,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003847 getF32Constant(DAG, 0x3e65b8f3));
Owen Anderson825b72b2009-08-11 20:47:22 +00003848 SDValue t4 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t3, X);
3849 SDValue t5 = DAG.getNode(ISD::FADD, dl, MVT::f32, t4,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003850 getF32Constant(DAG, 0x3f324b07));
Owen Anderson825b72b2009-08-11 20:47:22 +00003851 SDValue t6 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t5, X);
3852 SDValue t7 = DAG.getNode(ISD::FADD, dl, MVT::f32, t6,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003853 getF32Constant(DAG, 0x3f7ff8fd));
Wesley Peckbf17cfa2010-11-23 03:31:01 +00003854 SDValue t8 = DAG.getNode(ISD::BITCAST, dl, MVT::i32, t7);
Bill Wendlinge10c8142008-09-09 22:39:21 +00003855 SDValue TwoToFractionalPartOfX =
Owen Anderson825b72b2009-08-11 20:47:22 +00003856 DAG.getNode(ISD::ADD, dl, MVT::i32, t8, IntegerPartOfX);
Bill Wendlinge10c8142008-09-09 22:39:21 +00003857
Wesley Peckbf17cfa2010-11-23 03:31:01 +00003858 result = DAG.getNode(ISD::BITCAST, dl,
Owen Anderson825b72b2009-08-11 20:47:22 +00003859 MVT::f32, TwoToFractionalPartOfX);
Bill Wendlinge10c8142008-09-09 22:39:21 +00003860 } else { // LimitFloatPrecision > 12 && LimitFloatPrecision <= 18
3861 // For floating-point precision of 18:
3862 //
3863 // TwoToFractionalPartOfX =
3864 // 0.999999982f +
3865 // (0.693148872f +
3866 // (0.240227044f +
3867 // (0.554906021e-1f +
3868 // (0.961591928e-2f +
3869 // (0.136028312e-2f + 0.157059148e-3f *x)*x)*x)*x)*x)*x;
3870 // error 2.47208000*10^(-7), which is better than 18 bits
Owen Anderson825b72b2009-08-11 20:47:22 +00003871 SDValue t2 = DAG.getNode(ISD::FMUL, dl, MVT::f32, X,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003872 getF32Constant(DAG, 0x3924b03e));
Owen Anderson825b72b2009-08-11 20:47:22 +00003873 SDValue t3 = DAG.getNode(ISD::FADD, dl, MVT::f32, t2,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003874 getF32Constant(DAG, 0x3ab24b87));
Owen Anderson825b72b2009-08-11 20:47:22 +00003875 SDValue t4 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t3, X);
3876 SDValue t5 = DAG.getNode(ISD::FADD, dl, MVT::f32, t4,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003877 getF32Constant(DAG, 0x3c1d8c17));
Owen Anderson825b72b2009-08-11 20:47:22 +00003878 SDValue t6 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t5, X);
3879 SDValue t7 = DAG.getNode(ISD::FADD, dl, MVT::f32, t6,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003880 getF32Constant(DAG, 0x3d634a1d));
Owen Anderson825b72b2009-08-11 20:47:22 +00003881 SDValue t8 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t7, X);
3882 SDValue t9 = DAG.getNode(ISD::FADD, dl, MVT::f32, t8,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003883 getF32Constant(DAG, 0x3e75fe14));
Owen Anderson825b72b2009-08-11 20:47:22 +00003884 SDValue t10 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t9, X);
3885 SDValue t11 = DAG.getNode(ISD::FADD, dl, MVT::f32, t10,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003886 getF32Constant(DAG, 0x3f317234));
Owen Anderson825b72b2009-08-11 20:47:22 +00003887 SDValue t12 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t11, X);
3888 SDValue t13 = DAG.getNode(ISD::FADD, dl, MVT::f32, t12,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003889 getF32Constant(DAG, 0x3f800000));
Wesley Peckbf17cfa2010-11-23 03:31:01 +00003890 SDValue t14 = DAG.getNode(ISD::BITCAST, dl, MVT::i32, t13);
Bill Wendlinge10c8142008-09-09 22:39:21 +00003891 SDValue TwoToFractionalPartOfX =
Owen Anderson825b72b2009-08-11 20:47:22 +00003892 DAG.getNode(ISD::ADD, dl, MVT::i32, t14, IntegerPartOfX);
Bill Wendlinge10c8142008-09-09 22:39:21 +00003893
Wesley Peckbf17cfa2010-11-23 03:31:01 +00003894 result = DAG.getNode(ISD::BITCAST, dl,
Owen Anderson825b72b2009-08-11 20:47:22 +00003895 MVT::f32, TwoToFractionalPartOfX);
Bill Wendlinge10c8142008-09-09 22:39:21 +00003896 }
Dale Johannesen601d3c02008-09-05 01:48:15 +00003897 } else {
Bill Wendling3eb59402008-09-09 00:28:24 +00003898 // No special expansion.
Dale Johannesenfa42dea2009-01-30 01:34:22 +00003899 result = DAG.getNode(ISD::FEXP2, dl,
Gabor Greif0635f352010-06-25 09:38:13 +00003900 getValue(I.getArgOperand(0)).getValueType(),
3901 getValue(I.getArgOperand(0)));
Dale Johannesen601d3c02008-09-05 01:48:15 +00003902 }
Bill Wendlinge10c8142008-09-09 22:39:21 +00003903
Dale Johannesen601d3c02008-09-05 01:48:15 +00003904 setValue(&I, result);
3905}
3906
Bill Wendlingaeb5c7b2008-09-10 00:20:20 +00003907/// visitPow - Lower a pow intrinsic. Handles the special sequences for
3908/// limited-precision mode with x == 10.0f.
3909void
Dan Gohman46510a72010-04-15 01:51:59 +00003910SelectionDAGBuilder::visitPow(const CallInst &I) {
Bill Wendlingaeb5c7b2008-09-10 00:20:20 +00003911 SDValue result;
Gabor Greif0635f352010-06-25 09:38:13 +00003912 const Value *Val = I.getArgOperand(0);
Dale Johannesen66978ee2009-01-31 02:22:37 +00003913 DebugLoc dl = getCurDebugLoc();
Bill Wendlingaeb5c7b2008-09-10 00:20:20 +00003914 bool IsExp10 = false;
3915
Owen Anderson825b72b2009-08-11 20:47:22 +00003916 if (getValue(Val).getValueType() == MVT::f32 &&
Gabor Greif0635f352010-06-25 09:38:13 +00003917 getValue(I.getArgOperand(1)).getValueType() == MVT::f32 &&
Bill Wendlingaeb5c7b2008-09-10 00:20:20 +00003918 LimitFloatPrecision > 0 && LimitFloatPrecision <= 18) {
3919 if (Constant *C = const_cast<Constant*>(dyn_cast<Constant>(Val))) {
3920 if (ConstantFP *CFP = dyn_cast<ConstantFP>(C)) {
3921 APFloat Ten(10.0f);
3922 IsExp10 = CFP->getValueAPF().bitwiseIsEqual(Ten);
3923 }
3924 }
3925 }
3926
3927 if (IsExp10 && LimitFloatPrecision > 0 && LimitFloatPrecision <= 18) {
Gabor Greif0635f352010-06-25 09:38:13 +00003928 SDValue Op = getValue(I.getArgOperand(1));
Bill Wendlingaeb5c7b2008-09-10 00:20:20 +00003929
3930 // Put the exponent in the right bit position for later addition to the
3931 // final result:
3932 //
3933 // #define LOG2OF10 3.3219281f
3934 // IntegerPartOfX = (int32_t)(x * LOG2OF10);
Owen Anderson825b72b2009-08-11 20:47:22 +00003935 SDValue t0 = DAG.getNode(ISD::FMUL, dl, MVT::f32, Op,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003936 getF32Constant(DAG, 0x40549a78));
Owen Anderson825b72b2009-08-11 20:47:22 +00003937 SDValue IntegerPartOfX = DAG.getNode(ISD::FP_TO_SINT, dl, MVT::i32, t0);
Bill Wendlingaeb5c7b2008-09-10 00:20:20 +00003938
3939 // FractionalPartOfX = x - (float)IntegerPartOfX;
Owen Anderson825b72b2009-08-11 20:47:22 +00003940 SDValue t1 = DAG.getNode(ISD::SINT_TO_FP, dl, MVT::f32, IntegerPartOfX);
3941 SDValue X = DAG.getNode(ISD::FSUB, dl, MVT::f32, t0, t1);
Bill Wendlingaeb5c7b2008-09-10 00:20:20 +00003942
3943 // IntegerPartOfX <<= 23;
Owen Anderson825b72b2009-08-11 20:47:22 +00003944 IntegerPartOfX = DAG.getNode(ISD::SHL, dl, MVT::i32, IntegerPartOfX,
Duncan Sands92abc622009-01-31 15:50:11 +00003945 DAG.getConstant(23, TLI.getPointerTy()));
Bill Wendlingaeb5c7b2008-09-10 00:20:20 +00003946
3947 if (LimitFloatPrecision <= 6) {
3948 // For floating-point precision of 6:
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00003949 //
Bill Wendlingaeb5c7b2008-09-10 00:20:20 +00003950 // twoToFractionalPartOfX =
3951 // 0.997535578f +
3952 // (0.735607626f + 0.252464424f * x) * x;
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00003953 //
Bill Wendlingaeb5c7b2008-09-10 00:20:20 +00003954 // error 0.0144103317, which is 6 bits
Owen Anderson825b72b2009-08-11 20:47:22 +00003955 SDValue t2 = DAG.getNode(ISD::FMUL, dl, MVT::f32, X,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003956 getF32Constant(DAG, 0x3e814304));
Owen Anderson825b72b2009-08-11 20:47:22 +00003957 SDValue t3 = DAG.getNode(ISD::FADD, dl, MVT::f32, t2,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003958 getF32Constant(DAG, 0x3f3c50c8));
Owen Anderson825b72b2009-08-11 20:47:22 +00003959 SDValue t4 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t3, X);
3960 SDValue t5 = DAG.getNode(ISD::FADD, dl, MVT::f32, t4,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003961 getF32Constant(DAG, 0x3f7f5e7e));
Wesley Peckbf17cfa2010-11-23 03:31:01 +00003962 SDValue t6 = DAG.getNode(ISD::BITCAST, dl, MVT::i32, t5);
Bill Wendlingaeb5c7b2008-09-10 00:20:20 +00003963 SDValue TwoToFractionalPartOfX =
Owen Anderson825b72b2009-08-11 20:47:22 +00003964 DAG.getNode(ISD::ADD, dl, MVT::i32, t6, IntegerPartOfX);
Bill Wendlingaeb5c7b2008-09-10 00:20:20 +00003965
Wesley Peckbf17cfa2010-11-23 03:31:01 +00003966 result = DAG.getNode(ISD::BITCAST, dl,
Owen Anderson825b72b2009-08-11 20:47:22 +00003967 MVT::f32, TwoToFractionalPartOfX);
Bill Wendlingaeb5c7b2008-09-10 00:20:20 +00003968 } else if (LimitFloatPrecision > 6 && LimitFloatPrecision <= 12) {
3969 // For floating-point precision of 12:
3970 //
3971 // TwoToFractionalPartOfX =
3972 // 0.999892986f +
3973 // (0.696457318f +
3974 // (0.224338339f + 0.792043434e-1f * x) * x) * x;
3975 //
3976 // error 0.000107046256, which is 13 to 14 bits
Owen Anderson825b72b2009-08-11 20:47:22 +00003977 SDValue t2 = DAG.getNode(ISD::FMUL, dl, MVT::f32, X,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003978 getF32Constant(DAG, 0x3da235e3));
Owen Anderson825b72b2009-08-11 20:47:22 +00003979 SDValue t3 = DAG.getNode(ISD::FADD, dl, MVT::f32, t2,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003980 getF32Constant(DAG, 0x3e65b8f3));
Owen Anderson825b72b2009-08-11 20:47:22 +00003981 SDValue t4 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t3, X);
3982 SDValue t5 = DAG.getNode(ISD::FADD, dl, MVT::f32, t4,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003983 getF32Constant(DAG, 0x3f324b07));
Owen Anderson825b72b2009-08-11 20:47:22 +00003984 SDValue t6 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t5, X);
3985 SDValue t7 = DAG.getNode(ISD::FADD, dl, MVT::f32, t6,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003986 getF32Constant(DAG, 0x3f7ff8fd));
Wesley Peckbf17cfa2010-11-23 03:31:01 +00003987 SDValue t8 = DAG.getNode(ISD::BITCAST, dl, MVT::i32, t7);
Bill Wendlingaeb5c7b2008-09-10 00:20:20 +00003988 SDValue TwoToFractionalPartOfX =
Owen Anderson825b72b2009-08-11 20:47:22 +00003989 DAG.getNode(ISD::ADD, dl, MVT::i32, t8, IntegerPartOfX);
Bill Wendlingaeb5c7b2008-09-10 00:20:20 +00003990
Wesley Peckbf17cfa2010-11-23 03:31:01 +00003991 result = DAG.getNode(ISD::BITCAST, dl,
Owen Anderson825b72b2009-08-11 20:47:22 +00003992 MVT::f32, TwoToFractionalPartOfX);
Bill Wendlingaeb5c7b2008-09-10 00:20:20 +00003993 } else { // LimitFloatPrecision > 12 && LimitFloatPrecision <= 18
3994 // For floating-point precision of 18:
3995 //
3996 // TwoToFractionalPartOfX =
3997 // 0.999999982f +
3998 // (0.693148872f +
3999 // (0.240227044f +
4000 // (0.554906021e-1f +
4001 // (0.961591928e-2f +
4002 // (0.136028312e-2f + 0.157059148e-3f *x)*x)*x)*x)*x)*x;
4003 // error 2.47208000*10^(-7), which is better than 18 bits
Owen Anderson825b72b2009-08-11 20:47:22 +00004004 SDValue t2 = DAG.getNode(ISD::FMUL, dl, MVT::f32, X,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00004005 getF32Constant(DAG, 0x3924b03e));
Owen Anderson825b72b2009-08-11 20:47:22 +00004006 SDValue t3 = DAG.getNode(ISD::FADD, dl, MVT::f32, t2,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00004007 getF32Constant(DAG, 0x3ab24b87));
Owen Anderson825b72b2009-08-11 20:47:22 +00004008 SDValue t4 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t3, X);
4009 SDValue t5 = DAG.getNode(ISD::FADD, dl, MVT::f32, t4,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00004010 getF32Constant(DAG, 0x3c1d8c17));
Owen Anderson825b72b2009-08-11 20:47:22 +00004011 SDValue t6 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t5, X);
4012 SDValue t7 = DAG.getNode(ISD::FADD, dl, MVT::f32, t6,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00004013 getF32Constant(DAG, 0x3d634a1d));
Owen Anderson825b72b2009-08-11 20:47:22 +00004014 SDValue t8 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t7, X);
4015 SDValue t9 = DAG.getNode(ISD::FADD, dl, MVT::f32, t8,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00004016 getF32Constant(DAG, 0x3e75fe14));
Owen Anderson825b72b2009-08-11 20:47:22 +00004017 SDValue t10 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t9, X);
4018 SDValue t11 = DAG.getNode(ISD::FADD, dl, MVT::f32, t10,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00004019 getF32Constant(DAG, 0x3f317234));
Owen Anderson825b72b2009-08-11 20:47:22 +00004020 SDValue t12 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t11, X);
4021 SDValue t13 = DAG.getNode(ISD::FADD, dl, MVT::f32, t12,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00004022 getF32Constant(DAG, 0x3f800000));
Wesley Peckbf17cfa2010-11-23 03:31:01 +00004023 SDValue t14 = DAG.getNode(ISD::BITCAST, dl, MVT::i32, t13);
Bill Wendlingaeb5c7b2008-09-10 00:20:20 +00004024 SDValue TwoToFractionalPartOfX =
Owen Anderson825b72b2009-08-11 20:47:22 +00004025 DAG.getNode(ISD::ADD, dl, MVT::i32, t14, IntegerPartOfX);
Bill Wendlingaeb5c7b2008-09-10 00:20:20 +00004026
Wesley Peckbf17cfa2010-11-23 03:31:01 +00004027 result = DAG.getNode(ISD::BITCAST, dl,
Owen Anderson825b72b2009-08-11 20:47:22 +00004028 MVT::f32, TwoToFractionalPartOfX);
Bill Wendlingaeb5c7b2008-09-10 00:20:20 +00004029 }
4030 } else {
4031 // No special expansion.
Dale Johannesenfa42dea2009-01-30 01:34:22 +00004032 result = DAG.getNode(ISD::FPOW, dl,
Gabor Greif0635f352010-06-25 09:38:13 +00004033 getValue(I.getArgOperand(0)).getValueType(),
4034 getValue(I.getArgOperand(0)),
4035 getValue(I.getArgOperand(1)));
Bill Wendlingaeb5c7b2008-09-10 00:20:20 +00004036 }
4037
4038 setValue(&I, result);
4039}
4040
Chris Lattnerf031e8a2010-01-01 03:32:16 +00004041
4042/// ExpandPowI - Expand a llvm.powi intrinsic.
4043static SDValue ExpandPowI(DebugLoc DL, SDValue LHS, SDValue RHS,
4044 SelectionDAG &DAG) {
4045 // If RHS is a constant, we can expand this out to a multiplication tree,
4046 // otherwise we end up lowering to a call to __powidf2 (for example). When
4047 // optimizing for size, we only want to do this if the expansion would produce
4048 // a small number of multiplies, otherwise we do the full expansion.
4049 if (ConstantSDNode *RHSC = dyn_cast<ConstantSDNode>(RHS)) {
4050 // Get the exponent as a positive value.
4051 unsigned Val = RHSC->getSExtValue();
4052 if ((int)Val < 0) Val = -Val;
Mikhail Glushenkovb3c01992010-01-01 04:41:22 +00004053
Chris Lattnerf031e8a2010-01-01 03:32:16 +00004054 // powi(x, 0) -> 1.0
4055 if (Val == 0)
4056 return DAG.getConstantFP(1.0, LHS.getValueType());
4057
Dan Gohmanae541aa2010-04-15 04:33:49 +00004058 const Function *F = DAG.getMachineFunction().getFunction();
Chris Lattnerf031e8a2010-01-01 03:32:16 +00004059 if (!F->hasFnAttr(Attribute::OptimizeForSize) ||
4060 // If optimizing for size, don't insert too many multiplies. This
4061 // inserts up to 5 multiplies.
4062 CountPopulation_32(Val)+Log2_32(Val) < 7) {
4063 // We use the simple binary decomposition method to generate the multiply
Mikhail Glushenkovb3c01992010-01-01 04:41:22 +00004064 // sequence. There are more optimal ways to do this (for example,
Chris Lattnerf031e8a2010-01-01 03:32:16 +00004065 // powi(x,15) generates one more multiply than it should), but this has
4066 // the benefit of being both really simple and much better than a libcall.
4067 SDValue Res; // Logically starts equal to 1.0
4068 SDValue CurSquare = LHS;
4069 while (Val) {
Mikhail Glushenkovbfdfea82010-01-01 04:41:36 +00004070 if (Val & 1) {
Chris Lattnerf031e8a2010-01-01 03:32:16 +00004071 if (Res.getNode())
4072 Res = DAG.getNode(ISD::FMUL, DL,Res.getValueType(), Res, CurSquare);
4073 else
4074 Res = CurSquare; // 1.0*CurSquare.
Mikhail Glushenkovbfdfea82010-01-01 04:41:36 +00004075 }
Mikhail Glushenkovb3c01992010-01-01 04:41:22 +00004076
Chris Lattnerf031e8a2010-01-01 03:32:16 +00004077 CurSquare = DAG.getNode(ISD::FMUL, DL, CurSquare.getValueType(),
4078 CurSquare, CurSquare);
4079 Val >>= 1;
4080 }
Mikhail Glushenkovb3c01992010-01-01 04:41:22 +00004081
Chris Lattnerf031e8a2010-01-01 03:32:16 +00004082 // If the original was negative, invert the result, producing 1/(x*x*x).
4083 if (RHSC->getSExtValue() < 0)
4084 Res = DAG.getNode(ISD::FDIV, DL, LHS.getValueType(),
4085 DAG.getConstantFP(1.0, LHS.getValueType()), Res);
4086 return Res;
4087 }
4088 }
4089
4090 // Otherwise, expand to a libcall.
4091 return DAG.getNode(ISD::FPOWI, DL, LHS.getValueType(), LHS, RHS);
4092}
4093
Devang Patel227dfdb2011-05-16 21:24:05 +00004094// getTruncatedArgReg - Find underlying register used for an truncated
4095// argument.
4096static unsigned getTruncatedArgReg(const SDValue &N) {
4097 if (N.getOpcode() != ISD::TRUNCATE)
4098 return 0;
4099
4100 const SDValue &Ext = N.getOperand(0);
4101 if (Ext.getOpcode() == ISD::AssertZext || Ext.getOpcode() == ISD::AssertSext){
4102 const SDValue &CFR = Ext.getOperand(0);
4103 if (CFR.getOpcode() == ISD::CopyFromReg)
4104 return cast<RegisterSDNode>(CFR.getOperand(1))->getReg();
4105 else
4106 if (CFR.getOpcode() == ISD::TRUNCATE)
4107 return getTruncatedArgReg(CFR);
4108 }
4109 return 0;
4110}
4111
Evan Cheng2ad0fcf2010-04-28 23:08:54 +00004112/// EmitFuncArgumentDbgValue - If the DbgValueInst is a dbg_value of a function
4113/// argument, create the corresponding DBG_VALUE machine instruction for it now.
4114/// At the end of instruction selection, they will be inserted to the entry BB.
Evan Cheng9e8a2b92010-04-29 01:40:30 +00004115bool
Devang Patel78a06e52010-08-25 20:39:26 +00004116SelectionDAGBuilder::EmitFuncArgumentDbgValue(const Value *V, MDNode *Variable,
Michael J. Spencere70c5262010-10-16 08:25:21 +00004117 int64_t Offset,
Dan Gohman5d11ea32010-05-01 00:33:16 +00004118 const SDValue &N) {
Devang Patel0b48ead2010-08-31 22:22:42 +00004119 const Argument *Arg = dyn_cast<Argument>(V);
4120 if (!Arg)
Evan Cheng9e8a2b92010-04-29 01:40:30 +00004121 return false;
Evan Cheng2ad0fcf2010-04-28 23:08:54 +00004122
Devang Patel719f6a92010-04-29 20:40:36 +00004123 MachineFunction &MF = DAG.getMachineFunction();
Devang Patela90b3052010-11-02 17:01:30 +00004124 const TargetInstrInfo *TII = DAG.getTarget().getInstrInfo();
4125 const TargetRegisterInfo *TRI = DAG.getTarget().getRegisterInfo();
4126
Devang Patela83ce982010-04-29 18:50:36 +00004127 // Ignore inlined function arguments here.
4128 DIVariable DV(Variable);
Devang Patel719f6a92010-04-29 20:40:36 +00004129 if (DV.isInlinedFnArgument(MF.getFunction()))
Devang Patela83ce982010-04-29 18:50:36 +00004130 return false;
4131
Evan Cheng2ad0fcf2010-04-28 23:08:54 +00004132 unsigned Reg = 0;
Devang Patel0b48ead2010-08-31 22:22:42 +00004133 if (Arg->hasByValAttr()) {
4134 // Byval arguments' frame index is recorded during argument lowering.
4135 // Use this info directly.
Devang Patel0b48ead2010-08-31 22:22:42 +00004136 Reg = TRI->getFrameRegister(MF);
4137 Offset = FuncInfo.getByValArgumentFrameIndex(Arg);
Devang Patel27f46cd2010-10-01 19:00:44 +00004138 // If byval argument ofset is not recorded then ignore this.
4139 if (!Offset)
4140 Reg = 0;
Devang Patel0b48ead2010-08-31 22:22:42 +00004141 }
4142
Devang Patel227dfdb2011-05-16 21:24:05 +00004143 if (N.getNode()) {
4144 if (N.getOpcode() == ISD::CopyFromReg)
4145 Reg = cast<RegisterSDNode>(N.getOperand(1))->getReg();
4146 else
4147 Reg = getTruncatedArgReg(N);
4148 if (Reg && TargetRegisterInfo::isVirtualRegister(Reg)) {
Evan Cheng2ad0fcf2010-04-28 23:08:54 +00004149 MachineRegisterInfo &RegInfo = MF.getRegInfo();
4150 unsigned PR = RegInfo.getLiveInPhysReg(Reg);
4151 if (PR)
4152 Reg = PR;
4153 }
4154 }
4155
Evan Chenga36acad2010-04-29 06:33:38 +00004156 if (!Reg) {
Devang Patela90b3052010-11-02 17:01:30 +00004157 // Check if ValueMap has reg number.
Evan Chenga36acad2010-04-29 06:33:38 +00004158 DenseMap<const Value *, unsigned>::iterator VMI = FuncInfo.ValueMap.find(V);
Devang Patel8bc9ef72010-11-02 17:19:03 +00004159 if (VMI != FuncInfo.ValueMap.end())
4160 Reg = VMI->second;
Evan Chenga36acad2010-04-29 06:33:38 +00004161 }
Wesley Peckbf17cfa2010-11-23 03:31:01 +00004162
Devang Patel8bc9ef72010-11-02 17:19:03 +00004163 if (!Reg && N.getNode()) {
Devang Patela90b3052010-11-02 17:01:30 +00004164 // Check if frame index is available.
4165 if (LoadSDNode *LNode = dyn_cast<LoadSDNode>(N.getNode()))
Wesley Peckbf17cfa2010-11-23 03:31:01 +00004166 if (FrameIndexSDNode *FINode =
Devang Patela90b3052010-11-02 17:01:30 +00004167 dyn_cast<FrameIndexSDNode>(LNode->getBasePtr().getNode())) {
4168 Reg = TRI->getFrameRegister(MF);
4169 Offset = FINode->getIndex();
4170 }
Devang Patel8bc9ef72010-11-02 17:19:03 +00004171 }
4172
4173 if (!Reg)
4174 return false;
Devang Patela90b3052010-11-02 17:01:30 +00004175
Evan Cheng2ad0fcf2010-04-28 23:08:54 +00004176 MachineInstrBuilder MIB = BuildMI(MF, getCurDebugLoc(),
4177 TII->get(TargetOpcode::DBG_VALUE))
Evan Chenga36acad2010-04-29 06:33:38 +00004178 .addReg(Reg, RegState::Debug).addImm(Offset).addMetadata(Variable);
Evan Cheng2ad0fcf2010-04-28 23:08:54 +00004179 FuncInfo.ArgDbgValues.push_back(&*MIB);
Evan Cheng9e8a2b92010-04-29 01:40:30 +00004180 return true;
Evan Cheng2ad0fcf2010-04-28 23:08:54 +00004181}
Chris Lattnerf031e8a2010-01-01 03:32:16 +00004182
Douglas Gregor7d9663c2010-05-11 06:17:44 +00004183// VisualStudio defines setjmp as _setjmp
Michael J. Spencer1f409602010-09-24 19:48:47 +00004184#if defined(_MSC_VER) && defined(setjmp) && \
4185 !defined(setjmp_undefined_for_msvc)
4186# pragma push_macro("setjmp")
4187# undef setjmp
4188# define setjmp_undefined_for_msvc
Douglas Gregor7d9663c2010-05-11 06:17:44 +00004189#endif
4190
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004191/// visitIntrinsicCall - Lower the call to the specified intrinsic function. If
4192/// we want to emit this as a call to a named external function, return the name
4193/// otherwise lower it and return null.
4194const char *
Dan Gohman46510a72010-04-15 01:51:59 +00004195SelectionDAGBuilder::visitIntrinsicCall(const CallInst &I, unsigned Intrinsic) {
Dale Johannesen66978ee2009-01-31 02:22:37 +00004196 DebugLoc dl = getCurDebugLoc();
Bill Wendlingd0283fa2009-12-22 00:40:51 +00004197 SDValue Res;
4198
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004199 switch (Intrinsic) {
4200 default:
4201 // By default, turn this into a target intrinsic node.
4202 visitTargetIntrinsic(I, Intrinsic);
4203 return 0;
4204 case Intrinsic::vastart: visitVAStart(I); return 0;
4205 case Intrinsic::vaend: visitVAEnd(I); return 0;
4206 case Intrinsic::vacopy: visitVACopy(I); return 0;
4207 case Intrinsic::returnaddress:
Bill Wendling4533cac2010-01-28 21:51:40 +00004208 setValue(&I, DAG.getNode(ISD::RETURNADDR, dl, TLI.getPointerTy(),
Gabor Greif0635f352010-06-25 09:38:13 +00004209 getValue(I.getArgOperand(0))));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004210 return 0;
Bill Wendlingd5d81912008-09-26 22:10:44 +00004211 case Intrinsic::frameaddress:
Bill Wendling4533cac2010-01-28 21:51:40 +00004212 setValue(&I, DAG.getNode(ISD::FRAMEADDR, dl, TLI.getPointerTy(),
Gabor Greif0635f352010-06-25 09:38:13 +00004213 getValue(I.getArgOperand(0))));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004214 return 0;
4215 case Intrinsic::setjmp:
4216 return "_setjmp"+!TLI.usesUnderscoreSetJmp();
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004217 case Intrinsic::longjmp:
4218 return "_longjmp"+!TLI.usesUnderscoreLongJmp();
Chris Lattner824b9582008-11-21 16:42:48 +00004219 case Intrinsic::memcpy: {
Mon P Wang20adc9d2010-04-04 03:10:48 +00004220 // Assert for address < 256 since we support only user defined address
4221 // spaces.
Gabor Greif0635f352010-06-25 09:38:13 +00004222 assert(cast<PointerType>(I.getArgOperand(0)->getType())->getAddressSpace()
Mon P Wang20adc9d2010-04-04 03:10:48 +00004223 < 256 &&
Gabor Greif0635f352010-06-25 09:38:13 +00004224 cast<PointerType>(I.getArgOperand(1)->getType())->getAddressSpace()
Mon P Wang20adc9d2010-04-04 03:10:48 +00004225 < 256 &&
4226 "Unknown address space");
Gabor Greif0635f352010-06-25 09:38:13 +00004227 SDValue Op1 = getValue(I.getArgOperand(0));
4228 SDValue Op2 = getValue(I.getArgOperand(1));
4229 SDValue Op3 = getValue(I.getArgOperand(2));
4230 unsigned Align = cast<ConstantInt>(I.getArgOperand(3))->getZExtValue();
4231 bool isVol = cast<ConstantInt>(I.getArgOperand(4))->getZExtValue();
Mon P Wang20adc9d2010-04-04 03:10:48 +00004232 DAG.setRoot(DAG.getMemcpy(getRoot(), dl, Op1, Op2, Op3, Align, isVol, false,
Chris Lattnere72f2022010-09-21 05:40:29 +00004233 MachinePointerInfo(I.getArgOperand(0)),
4234 MachinePointerInfo(I.getArgOperand(1))));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004235 return 0;
4236 }
Chris Lattner824b9582008-11-21 16:42:48 +00004237 case Intrinsic::memset: {
Mon P Wang20adc9d2010-04-04 03:10:48 +00004238 // Assert for address < 256 since we support only user defined address
4239 // spaces.
Gabor Greif0635f352010-06-25 09:38:13 +00004240 assert(cast<PointerType>(I.getArgOperand(0)->getType())->getAddressSpace()
Mon P Wang20adc9d2010-04-04 03:10:48 +00004241 < 256 &&
4242 "Unknown address space");
Gabor Greif0635f352010-06-25 09:38:13 +00004243 SDValue Op1 = getValue(I.getArgOperand(0));
4244 SDValue Op2 = getValue(I.getArgOperand(1));
4245 SDValue Op3 = getValue(I.getArgOperand(2));
4246 unsigned Align = cast<ConstantInt>(I.getArgOperand(3))->getZExtValue();
4247 bool isVol = cast<ConstantInt>(I.getArgOperand(4))->getZExtValue();
Mon P Wang20adc9d2010-04-04 03:10:48 +00004248 DAG.setRoot(DAG.getMemset(getRoot(), dl, Op1, Op2, Op3, Align, isVol,
Chris Lattnere72f2022010-09-21 05:40:29 +00004249 MachinePointerInfo(I.getArgOperand(0))));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004250 return 0;
4251 }
Chris Lattner824b9582008-11-21 16:42:48 +00004252 case Intrinsic::memmove: {
Mon P Wang20adc9d2010-04-04 03:10:48 +00004253 // Assert for address < 256 since we support only user defined address
4254 // spaces.
Gabor Greif0635f352010-06-25 09:38:13 +00004255 assert(cast<PointerType>(I.getArgOperand(0)->getType())->getAddressSpace()
Mon P Wang20adc9d2010-04-04 03:10:48 +00004256 < 256 &&
Gabor Greif0635f352010-06-25 09:38:13 +00004257 cast<PointerType>(I.getArgOperand(1)->getType())->getAddressSpace()
Mon P Wang20adc9d2010-04-04 03:10:48 +00004258 < 256 &&
4259 "Unknown address space");
Gabor Greif0635f352010-06-25 09:38:13 +00004260 SDValue Op1 = getValue(I.getArgOperand(0));
4261 SDValue Op2 = getValue(I.getArgOperand(1));
4262 SDValue Op3 = getValue(I.getArgOperand(2));
4263 unsigned Align = cast<ConstantInt>(I.getArgOperand(3))->getZExtValue();
4264 bool isVol = cast<ConstantInt>(I.getArgOperand(4))->getZExtValue();
Mon P Wang20adc9d2010-04-04 03:10:48 +00004265 DAG.setRoot(DAG.getMemmove(getRoot(), dl, Op1, Op2, Op3, Align, isVol,
Chris Lattnere72f2022010-09-21 05:40:29 +00004266 MachinePointerInfo(I.getArgOperand(0)),
4267 MachinePointerInfo(I.getArgOperand(1))));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004268 return 0;
4269 }
Bill Wendling92c1e122009-02-13 02:16:35 +00004270 case Intrinsic::dbg_declare: {
Dan Gohman46510a72010-04-15 01:51:59 +00004271 const DbgDeclareInst &DI = cast<DbgDeclareInst>(I);
Devang Patelac1ceb32009-10-09 22:42:28 +00004272 MDNode *Variable = DI.getVariable();
Dan Gohman46510a72010-04-15 01:51:59 +00004273 const Value *Address = DI.getAddress();
Devang Patel8e741ed2010-09-02 21:02:27 +00004274 if (!Address || !DIVariable(DI.getVariable()).Verify())
Dale Johannesen8ac38f22010-02-08 21:53:27 +00004275 return 0;
Dale Johannesenfdb42fa2010-04-26 20:06:49 +00004276
4277 // Build an entry in DbgOrdering. Debug info input nodes get an SDNodeOrder
4278 // but do not always have a corresponding SDNode built. The SDNodeOrder
4279 // absolute, but not relative, values are different depending on whether
4280 // debug info exists.
4281 ++SDNodeOrder;
Devang Patel3f74a112010-09-02 21:29:42 +00004282
4283 // Check if address has undef value.
4284 if (isa<UndefValue>(Address) ||
4285 (Address->use_empty() && !isa<Argument>(Address))) {
Devang Patelafeaae72010-12-06 22:39:26 +00004286 DEBUG(dbgs() << "Dropping debug info for " << DI);
Devang Patel3f74a112010-09-02 21:29:42 +00004287 return 0;
4288 }
4289
Dale Johannesenfdb42fa2010-04-26 20:06:49 +00004290 SDValue &N = NodeMap[Address];
Devang Patel0b48ead2010-08-31 22:22:42 +00004291 if (!N.getNode() && isa<Argument>(Address))
4292 // Check unused arguments map.
4293 N = UnusedArgNodeMap[Address];
Dale Johannesenfdb42fa2010-04-26 20:06:49 +00004294 SDDbgValue *SDV;
4295 if (N.getNode()) {
Devang Patel8e741ed2010-09-02 21:02:27 +00004296 // Parameters are handled specially.
Michael J. Spencere70c5262010-10-16 08:25:21 +00004297 bool isParameter =
Devang Patel8e741ed2010-09-02 21:02:27 +00004298 DIVariable(Variable).getTag() == dwarf::DW_TAG_arg_variable;
4299 if (const BitCastInst *BCI = dyn_cast<BitCastInst>(Address))
4300 Address = BCI->getOperand(0);
4301 const AllocaInst *AI = dyn_cast<AllocaInst>(Address);
4302
Dale Johannesenfdb42fa2010-04-26 20:06:49 +00004303 if (isParameter && !AI) {
4304 FrameIndexSDNode *FINode = dyn_cast<FrameIndexSDNode>(N.getNode());
4305 if (FINode)
4306 // Byval parameter. We have a frame index at this point.
4307 SDV = DAG.getDbgValue(Variable, FINode->getIndex(),
4308 0, dl, SDNodeOrder);
Devang Patelafeaae72010-12-06 22:39:26 +00004309 else {
Devang Patel227dfdb2011-05-16 21:24:05 +00004310 // Address is an argument, so try to emit its dbg value using
4311 // virtual register info from the FuncInfo.ValueMap.
4312 EmitFuncArgumentDbgValue(Address, Variable, 0, N);
Dale Johannesenfdb42fa2010-04-26 20:06:49 +00004313 return 0;
Devang Patelafeaae72010-12-06 22:39:26 +00004314 }
Dale Johannesenfdb42fa2010-04-26 20:06:49 +00004315 } else if (AI)
4316 SDV = DAG.getDbgValue(Variable, N.getNode(), N.getResNo(),
4317 0, dl, SDNodeOrder);
Devang Patelafeaae72010-12-06 22:39:26 +00004318 else {
Dale Johannesenfdb42fa2010-04-26 20:06:49 +00004319 // Can't do anything with other non-AI cases yet.
Devang Patelafeaae72010-12-06 22:39:26 +00004320 DEBUG(dbgs() << "Dropping debug info for " << DI);
Dale Johannesenfdb42fa2010-04-26 20:06:49 +00004321 return 0;
Devang Patelafeaae72010-12-06 22:39:26 +00004322 }
Dale Johannesenfdb42fa2010-04-26 20:06:49 +00004323 DAG.AddDbgValue(SDV, N.getNode(), isParameter);
4324 } else {
Gabor Greiffb4032f2010-10-01 10:32:19 +00004325 // If Address is an argument then try to emit its dbg value using
Michael J. Spencere70c5262010-10-16 08:25:21 +00004326 // virtual register info from the FuncInfo.ValueMap.
Devang Patel6cd467b2010-08-26 22:53:27 +00004327 if (!EmitFuncArgumentDbgValue(Address, Variable, 0, N)) {
Devang Patel1397fdc2010-09-15 14:48:53 +00004328 // If variable is pinned by a alloca in dominating bb then
4329 // use StaticAllocaMap.
4330 if (const AllocaInst *AI = dyn_cast<AllocaInst>(Address)) {
Devang Patel27ede1b2010-09-15 18:13:55 +00004331 if (AI->getParent() != DI.getParent()) {
4332 DenseMap<const AllocaInst*, int>::iterator SI =
4333 FuncInfo.StaticAllocaMap.find(AI);
4334 if (SI != FuncInfo.StaticAllocaMap.end()) {
4335 SDV = DAG.getDbgValue(Variable, SI->second,
4336 0, dl, SDNodeOrder);
4337 DAG.AddDbgValue(SDV, 0, false);
4338 return 0;
4339 }
Devang Patel1397fdc2010-09-15 14:48:53 +00004340 }
4341 }
Devang Patelafeaae72010-12-06 22:39:26 +00004342 DEBUG(dbgs() << "Dropping debug info for " << DI);
Devang Patel6cd467b2010-08-26 22:53:27 +00004343 }
Dale Johannesenfdb42fa2010-04-26 20:06:49 +00004344 }
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004345 return 0;
Bill Wendling92c1e122009-02-13 02:16:35 +00004346 }
Dale Johannesen904c2fa2010-02-01 19:54:53 +00004347 case Intrinsic::dbg_value: {
Dan Gohman46510a72010-04-15 01:51:59 +00004348 const DbgValueInst &DI = cast<DbgValueInst>(I);
Devang Patel02f0dbd2010-05-07 22:04:20 +00004349 if (!DIVariable(DI.getVariable()).Verify())
Dale Johannesen904c2fa2010-02-01 19:54:53 +00004350 return 0;
4351
4352 MDNode *Variable = DI.getVariable();
Devang Patel00190342010-03-15 19:15:44 +00004353 uint64_t Offset = DI.getOffset();
Dan Gohman46510a72010-04-15 01:51:59 +00004354 const Value *V = DI.getValue();
Dale Johannesen904c2fa2010-02-01 19:54:53 +00004355 if (!V)
4356 return 0;
Devang Patel00190342010-03-15 19:15:44 +00004357
4358 // Build an entry in DbgOrdering. Debug info input nodes get an SDNodeOrder
4359 // but do not always have a corresponding SDNode built. The SDNodeOrder
4360 // absolute, but not relative, values are different depending on whether
4361 // debug info exists.
4362 ++SDNodeOrder;
Dale Johannesenfdb42fa2010-04-26 20:06:49 +00004363 SDDbgValue *SDV;
Devang Patel00190342010-03-15 19:15:44 +00004364 if (isa<ConstantInt>(V) || isa<ConstantFP>(V)) {
Dale Johannesenfdb42fa2010-04-26 20:06:49 +00004365 SDV = DAG.getDbgValue(Variable, V, Offset, dl, SDNodeOrder);
4366 DAG.AddDbgValue(SDV, 0, false);
Devang Patel00190342010-03-15 19:15:44 +00004367 } else {
Dale Johannesenbdc09d92010-07-16 00:02:08 +00004368 // Do not use getValue() in here; we don't want to generate code at
4369 // this point if it hasn't been done yet.
Devang Patel9126c0d2010-06-01 19:59:01 +00004370 SDValue N = NodeMap[V];
4371 if (!N.getNode() && isa<Argument>(V))
4372 // Check unused arguments map.
4373 N = UnusedArgNodeMap[V];
Dale Johannesenfdb42fa2010-04-26 20:06:49 +00004374 if (N.getNode()) {
Devang Patel78a06e52010-08-25 20:39:26 +00004375 if (!EmitFuncArgumentDbgValue(V, Variable, Offset, N)) {
Evan Cheng9e8a2b92010-04-29 01:40:30 +00004376 SDV = DAG.getDbgValue(Variable, N.getNode(),
4377 N.getResNo(), Offset, dl, SDNodeOrder);
4378 DAG.AddDbgValue(SDV, N.getNode(), false);
4379 }
Devang Patela778f5c2011-02-18 22:43:42 +00004380 } else if (!V->use_empty() ) {
Dale Johannesenbdc09d92010-07-16 00:02:08 +00004381 // Do not call getValue(V) yet, as we don't want to generate code.
4382 // Remember it for later.
4383 DanglingDebugInfo DDI(&DI, dl, SDNodeOrder);
4384 DanglingDebugInfoMap[V] = DDI;
Devang Patel0991dfb2010-08-27 22:25:51 +00004385 } else {
Devang Patel00190342010-03-15 19:15:44 +00004386 // We may expand this to cover more cases. One case where we have no
Devang Patelafeaae72010-12-06 22:39:26 +00004387 // data available is an unreferenced parameter.
4388 DEBUG(dbgs() << "Dropping debug info for " << DI);
Dale Johannesenfdb42fa2010-04-26 20:06:49 +00004389 }
Devang Patel00190342010-03-15 19:15:44 +00004390 }
4391
4392 // Build a debug info table entry.
Dan Gohman46510a72010-04-15 01:51:59 +00004393 if (const BitCastInst *BCI = dyn_cast<BitCastInst>(V))
Dale Johannesen904c2fa2010-02-01 19:54:53 +00004394 V = BCI->getOperand(0);
Dan Gohman46510a72010-04-15 01:51:59 +00004395 const AllocaInst *AI = dyn_cast<AllocaInst>(V);
Dale Johannesen904c2fa2010-02-01 19:54:53 +00004396 // Don't handle byval struct arguments or VLAs, for example.
4397 if (!AI)
4398 return 0;
4399 DenseMap<const AllocaInst*, int>::iterator SI =
4400 FuncInfo.StaticAllocaMap.find(AI);
4401 if (SI == FuncInfo.StaticAllocaMap.end())
4402 return 0; // VLAs.
4403 int FI = SI->second;
Michael J. Spencere70c5262010-10-16 08:25:21 +00004404
Chris Lattner512063d2010-04-05 06:19:28 +00004405 MachineModuleInfo &MMI = DAG.getMachineFunction().getMMI();
4406 if (!DI.getDebugLoc().isUnknown() && MMI.hasDebugInfo())
4407 MMI.setVariableDbgInfo(Variable, FI, DI.getDebugLoc());
Dale Johannesen904c2fa2010-02-01 19:54:53 +00004408 return 0;
4409 }
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004410 case Intrinsic::eh_exception: {
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004411 // Insert the EXCEPTIONADDR instruction.
Dan Gohman84023e02010-07-10 09:00:22 +00004412 assert(FuncInfo.MBB->isLandingPad() &&
Dan Gohman99be8ae2010-04-19 22:41:47 +00004413 "Call to eh.exception not in landing pad!");
Owen Anderson825b72b2009-08-11 20:47:22 +00004414 SDVTList VTs = DAG.getVTList(TLI.getPointerTy(), MVT::Other);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004415 SDValue Ops[1];
4416 Ops[0] = DAG.getRoot();
Dale Johannesenfa42dea2009-01-30 01:34:22 +00004417 SDValue Op = DAG.getNode(ISD::EXCEPTIONADDR, dl, VTs, Ops, 1);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004418 setValue(&I, Op);
4419 DAG.setRoot(Op.getValue(1));
4420 return 0;
4421 }
4422
Duncan Sandsb01bbdc2009-10-14 16:11:37 +00004423 case Intrinsic::eh_selector: {
Dan Gohman84023e02010-07-10 09:00:22 +00004424 MachineBasicBlock *CallMBB = FuncInfo.MBB;
Chris Lattner512063d2010-04-05 06:19:28 +00004425 MachineModuleInfo &MMI = DAG.getMachineFunction().getMMI();
Dan Gohman99be8ae2010-04-19 22:41:47 +00004426 if (CallMBB->isLandingPad())
4427 AddCatchInfo(I, &MMI, CallMBB);
Chris Lattner3a5815f2009-09-17 23:54:54 +00004428 else {
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004429#ifndef NDEBUG
Chris Lattner3a5815f2009-09-17 23:54:54 +00004430 FuncInfo.CatchInfoLost.insert(&I);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004431#endif
Chris Lattner3a5815f2009-09-17 23:54:54 +00004432 // FIXME: Mark exception selector register as live in. Hack for PR1508.
4433 unsigned Reg = TLI.getExceptionSelectorRegister();
Dan Gohman84023e02010-07-10 09:00:22 +00004434 if (Reg) FuncInfo.MBB->addLiveIn(Reg);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004435 }
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00004436
Chris Lattner3a5815f2009-09-17 23:54:54 +00004437 // Insert the EHSELECTION instruction.
4438 SDVTList VTs = DAG.getVTList(TLI.getPointerTy(), MVT::Other);
4439 SDValue Ops[2];
Gabor Greif0635f352010-06-25 09:38:13 +00004440 Ops[0] = getValue(I.getArgOperand(0));
Chris Lattner3a5815f2009-09-17 23:54:54 +00004441 Ops[1] = getRoot();
4442 SDValue Op = DAG.getNode(ISD::EHSELECTION, dl, VTs, Ops, 2);
Chris Lattner3a5815f2009-09-17 23:54:54 +00004443 DAG.setRoot(Op.getValue(1));
Bill Wendling4533cac2010-01-28 21:51:40 +00004444 setValue(&I, DAG.getSExtOrTrunc(Op, dl, MVT::i32));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004445 return 0;
4446 }
4447
Duncan Sandsb01bbdc2009-10-14 16:11:37 +00004448 case Intrinsic::eh_typeid_for: {
Chris Lattner512063d2010-04-05 06:19:28 +00004449 // Find the type id for the given typeinfo.
Gabor Greif0635f352010-06-25 09:38:13 +00004450 GlobalVariable *GV = ExtractTypeInfo(I.getArgOperand(0));
Chris Lattner512063d2010-04-05 06:19:28 +00004451 unsigned TypeID = DAG.getMachineFunction().getMMI().getTypeIDFor(GV);
4452 Res = DAG.getConstant(TypeID, MVT::i32);
Bill Wendlingd0283fa2009-12-22 00:40:51 +00004453 setValue(&I, Res);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004454 return 0;
4455 }
4456
Anton Korobeynikova0e8a1e2008-09-08 21:13:56 +00004457 case Intrinsic::eh_return_i32:
4458 case Intrinsic::eh_return_i64:
Chris Lattner512063d2010-04-05 06:19:28 +00004459 DAG.getMachineFunction().getMMI().setCallsEHReturn(true);
4460 DAG.setRoot(DAG.getNode(ISD::EH_RETURN, dl,
4461 MVT::Other,
4462 getControlRoot(),
Gabor Greif0635f352010-06-25 09:38:13 +00004463 getValue(I.getArgOperand(0)),
4464 getValue(I.getArgOperand(1))));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004465 return 0;
Anton Korobeynikova0e8a1e2008-09-08 21:13:56 +00004466 case Intrinsic::eh_unwind_init:
Chris Lattner512063d2010-04-05 06:19:28 +00004467 DAG.getMachineFunction().getMMI().setCallsUnwindInit(true);
Anton Korobeynikova0e8a1e2008-09-08 21:13:56 +00004468 return 0;
Anton Korobeynikova0e8a1e2008-09-08 21:13:56 +00004469 case Intrinsic::eh_dwarf_cfa: {
Gabor Greif0635f352010-06-25 09:38:13 +00004470 SDValue CfaArg = DAG.getSExtOrTrunc(getValue(I.getArgOperand(0)), dl,
Duncan Sands3a66a682009-10-13 21:04:12 +00004471 TLI.getPointerTy());
Dale Johannesenfa42dea2009-01-30 01:34:22 +00004472 SDValue Offset = DAG.getNode(ISD::ADD, dl,
Anton Korobeynikova0e8a1e2008-09-08 21:13:56 +00004473 TLI.getPointerTy(),
Dale Johannesenfa42dea2009-01-30 01:34:22 +00004474 DAG.getNode(ISD::FRAME_TO_ARGS_OFFSET, dl,
Anton Korobeynikova0e8a1e2008-09-08 21:13:56 +00004475 TLI.getPointerTy()),
4476 CfaArg);
Bill Wendlingd0283fa2009-12-22 00:40:51 +00004477 SDValue FA = DAG.getNode(ISD::FRAMEADDR, dl,
Anton Korobeynikova0e8a1e2008-09-08 21:13:56 +00004478 TLI.getPointerTy(),
Bill Wendlingd0283fa2009-12-22 00:40:51 +00004479 DAG.getConstant(0, TLI.getPointerTy()));
Bill Wendling4533cac2010-01-28 21:51:40 +00004480 setValue(&I, DAG.getNode(ISD::ADD, dl, TLI.getPointerTy(),
4481 FA, Offset));
Anton Korobeynikova0e8a1e2008-09-08 21:13:56 +00004482 return 0;
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004483 }
Jim Grosbachca752c92010-01-28 01:45:32 +00004484 case Intrinsic::eh_sjlj_callsite: {
Chris Lattner512063d2010-04-05 06:19:28 +00004485 MachineModuleInfo &MMI = DAG.getMachineFunction().getMMI();
Gabor Greif0635f352010-06-25 09:38:13 +00004486 ConstantInt *CI = dyn_cast<ConstantInt>(I.getArgOperand(0));
Jim Grosbachca752c92010-01-28 01:45:32 +00004487 assert(CI && "Non-constant call site value in eh.sjlj.callsite!");
Chris Lattner512063d2010-04-05 06:19:28 +00004488 assert(MMI.getCurrentCallSite() == 0 && "Overlapping call sites!");
Jim Grosbachca752c92010-01-28 01:45:32 +00004489
Chris Lattner512063d2010-04-05 06:19:28 +00004490 MMI.setCurrentCallSite(CI->getZExtValue());
Jim Grosbachca752c92010-01-28 01:45:32 +00004491 return 0;
4492 }
Jim Grosbach23ff7cf2010-05-26 20:22:18 +00004493 case Intrinsic::eh_sjlj_setjmp: {
4494 setValue(&I, DAG.getNode(ISD::EH_SJLJ_SETJMP, dl, MVT::i32, getRoot(),
Gabor Greif0635f352010-06-25 09:38:13 +00004495 getValue(I.getArgOperand(0))));
Jim Grosbach23ff7cf2010-05-26 20:22:18 +00004496 return 0;
4497 }
Jim Grosbach5eb19512010-05-22 01:06:18 +00004498 case Intrinsic::eh_sjlj_longjmp: {
Jim Grosbach23ff7cf2010-05-26 20:22:18 +00004499 DAG.setRoot(DAG.getNode(ISD::EH_SJLJ_LONGJMP, dl, MVT::Other,
Jim Grosbache4ad3872010-10-19 23:27:08 +00004500 getRoot(), getValue(I.getArgOperand(0))));
4501 return 0;
4502 }
4503 case Intrinsic::eh_sjlj_dispatch_setup: {
4504 DAG.setRoot(DAG.getNode(ISD::EH_SJLJ_DISPATCHSETUP, dl, MVT::Other,
Bill Wendling61512ba2011-05-11 01:11:55 +00004505 getRoot(), getValue(I.getArgOperand(0))));
Jim Grosbach5eb19512010-05-22 01:06:18 +00004506 return 0;
4507 }
Jim Grosbachca752c92010-01-28 01:45:32 +00004508
Dale Johannesen0488fb62010-09-30 23:57:10 +00004509 case Intrinsic::x86_mmx_pslli_w:
4510 case Intrinsic::x86_mmx_pslli_d:
4511 case Intrinsic::x86_mmx_pslli_q:
4512 case Intrinsic::x86_mmx_psrli_w:
4513 case Intrinsic::x86_mmx_psrli_d:
4514 case Intrinsic::x86_mmx_psrli_q:
4515 case Intrinsic::x86_mmx_psrai_w:
4516 case Intrinsic::x86_mmx_psrai_d: {
4517 SDValue ShAmt = getValue(I.getArgOperand(1));
4518 if (isa<ConstantSDNode>(ShAmt)) {
4519 visitTargetIntrinsic(I, Intrinsic);
4520 return 0;
4521 }
4522 unsigned NewIntrinsic = 0;
4523 EVT ShAmtVT = MVT::v2i32;
4524 switch (Intrinsic) {
4525 case Intrinsic::x86_mmx_pslli_w:
4526 NewIntrinsic = Intrinsic::x86_mmx_psll_w;
4527 break;
4528 case Intrinsic::x86_mmx_pslli_d:
4529 NewIntrinsic = Intrinsic::x86_mmx_psll_d;
4530 break;
4531 case Intrinsic::x86_mmx_pslli_q:
4532 NewIntrinsic = Intrinsic::x86_mmx_psll_q;
4533 break;
4534 case Intrinsic::x86_mmx_psrli_w:
4535 NewIntrinsic = Intrinsic::x86_mmx_psrl_w;
4536 break;
4537 case Intrinsic::x86_mmx_psrli_d:
4538 NewIntrinsic = Intrinsic::x86_mmx_psrl_d;
4539 break;
4540 case Intrinsic::x86_mmx_psrli_q:
4541 NewIntrinsic = Intrinsic::x86_mmx_psrl_q;
4542 break;
4543 case Intrinsic::x86_mmx_psrai_w:
4544 NewIntrinsic = Intrinsic::x86_mmx_psra_w;
4545 break;
4546 case Intrinsic::x86_mmx_psrai_d:
4547 NewIntrinsic = Intrinsic::x86_mmx_psra_d;
4548 break;
4549 default: llvm_unreachable("Impossible intrinsic"); // Can't reach here.
4550 }
4551
4552 // The vector shift intrinsics with scalars uses 32b shift amounts but
4553 // the sse2/mmx shift instructions reads 64 bits. Set the upper 32 bits
4554 // to be zero.
4555 // We must do this early because v2i32 is not a legal type.
4556 DebugLoc dl = getCurDebugLoc();
4557 SDValue ShOps[2];
4558 ShOps[0] = ShAmt;
4559 ShOps[1] = DAG.getConstant(0, MVT::i32);
4560 ShAmt = DAG.getNode(ISD::BUILD_VECTOR, dl, ShAmtVT, &ShOps[0], 2);
4561 EVT DestVT = TLI.getValueType(I.getType());
Wesley Peckbf17cfa2010-11-23 03:31:01 +00004562 ShAmt = DAG.getNode(ISD::BITCAST, dl, DestVT, ShAmt);
Dale Johannesen0488fb62010-09-30 23:57:10 +00004563 Res = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, DestVT,
4564 DAG.getConstant(NewIntrinsic, MVT::i32),
4565 getValue(I.getArgOperand(0)), ShAmt);
4566 setValue(&I, Res);
4567 return 0;
4568 }
Mon P Wang77cdf302008-11-10 20:54:11 +00004569 case Intrinsic::convertff:
4570 case Intrinsic::convertfsi:
4571 case Intrinsic::convertfui:
4572 case Intrinsic::convertsif:
4573 case Intrinsic::convertuif:
4574 case Intrinsic::convertss:
4575 case Intrinsic::convertsu:
4576 case Intrinsic::convertus:
4577 case Intrinsic::convertuu: {
4578 ISD::CvtCode Code = ISD::CVT_INVALID;
4579 switch (Intrinsic) {
4580 case Intrinsic::convertff: Code = ISD::CVT_FF; break;
4581 case Intrinsic::convertfsi: Code = ISD::CVT_FS; break;
4582 case Intrinsic::convertfui: Code = ISD::CVT_FU; break;
4583 case Intrinsic::convertsif: Code = ISD::CVT_SF; break;
4584 case Intrinsic::convertuif: Code = ISD::CVT_UF; break;
4585 case Intrinsic::convertss: Code = ISD::CVT_SS; break;
4586 case Intrinsic::convertsu: Code = ISD::CVT_SU; break;
4587 case Intrinsic::convertus: Code = ISD::CVT_US; break;
4588 case Intrinsic::convertuu: Code = ISD::CVT_UU; break;
4589 }
Owen Andersone50ed302009-08-10 22:56:29 +00004590 EVT DestVT = TLI.getValueType(I.getType());
Gabor Greif0635f352010-06-25 09:38:13 +00004591 const Value *Op1 = I.getArgOperand(0);
Bill Wendlingd0283fa2009-12-22 00:40:51 +00004592 Res = DAG.getConvertRndSat(DestVT, getCurDebugLoc(), getValue(Op1),
4593 DAG.getValueType(DestVT),
4594 DAG.getValueType(getValue(Op1).getValueType()),
Gabor Greif0635f352010-06-25 09:38:13 +00004595 getValue(I.getArgOperand(1)),
4596 getValue(I.getArgOperand(2)),
Bill Wendlingd0283fa2009-12-22 00:40:51 +00004597 Code);
4598 setValue(&I, Res);
Mon P Wang77cdf302008-11-10 20:54:11 +00004599 return 0;
4600 }
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004601 case Intrinsic::sqrt:
Bill Wendling4533cac2010-01-28 21:51:40 +00004602 setValue(&I, DAG.getNode(ISD::FSQRT, dl,
Gabor Greif0635f352010-06-25 09:38:13 +00004603 getValue(I.getArgOperand(0)).getValueType(),
4604 getValue(I.getArgOperand(0))));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004605 return 0;
4606 case Intrinsic::powi:
Gabor Greif0635f352010-06-25 09:38:13 +00004607 setValue(&I, ExpandPowI(dl, getValue(I.getArgOperand(0)),
4608 getValue(I.getArgOperand(1)), DAG));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004609 return 0;
4610 case Intrinsic::sin:
Bill Wendling4533cac2010-01-28 21:51:40 +00004611 setValue(&I, DAG.getNode(ISD::FSIN, dl,
Gabor Greif0635f352010-06-25 09:38:13 +00004612 getValue(I.getArgOperand(0)).getValueType(),
4613 getValue(I.getArgOperand(0))));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004614 return 0;
4615 case Intrinsic::cos:
Bill Wendling4533cac2010-01-28 21:51:40 +00004616 setValue(&I, DAG.getNode(ISD::FCOS, dl,
Gabor Greif0635f352010-06-25 09:38:13 +00004617 getValue(I.getArgOperand(0)).getValueType(),
4618 getValue(I.getArgOperand(0))));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004619 return 0;
Dale Johannesen7794f2a2008-09-04 00:47:13 +00004620 case Intrinsic::log:
Dale Johannesen59e577f2008-09-05 18:38:42 +00004621 visitLog(I);
Dale Johannesen7794f2a2008-09-04 00:47:13 +00004622 return 0;
4623 case Intrinsic::log2:
Dale Johannesen59e577f2008-09-05 18:38:42 +00004624 visitLog2(I);
Dale Johannesen7794f2a2008-09-04 00:47:13 +00004625 return 0;
4626 case Intrinsic::log10:
Dale Johannesen59e577f2008-09-05 18:38:42 +00004627 visitLog10(I);
Dale Johannesen7794f2a2008-09-04 00:47:13 +00004628 return 0;
4629 case Intrinsic::exp:
Dale Johannesen59e577f2008-09-05 18:38:42 +00004630 visitExp(I);
Dale Johannesen7794f2a2008-09-04 00:47:13 +00004631 return 0;
4632 case Intrinsic::exp2:
Dale Johannesen601d3c02008-09-05 01:48:15 +00004633 visitExp2(I);
Dale Johannesen7794f2a2008-09-04 00:47:13 +00004634 return 0;
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004635 case Intrinsic::pow:
Bill Wendlingaeb5c7b2008-09-10 00:20:20 +00004636 visitPow(I);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004637 return 0;
Anton Korobeynikovbe5b0322010-03-14 18:42:15 +00004638 case Intrinsic::convert_to_fp16:
4639 setValue(&I, DAG.getNode(ISD::FP32_TO_FP16, dl,
Gabor Greif0635f352010-06-25 09:38:13 +00004640 MVT::i16, getValue(I.getArgOperand(0))));
Anton Korobeynikovbe5b0322010-03-14 18:42:15 +00004641 return 0;
4642 case Intrinsic::convert_from_fp16:
4643 setValue(&I, DAG.getNode(ISD::FP16_TO_FP32, dl,
Gabor Greif0635f352010-06-25 09:38:13 +00004644 MVT::f32, getValue(I.getArgOperand(0))));
Anton Korobeynikovbe5b0322010-03-14 18:42:15 +00004645 return 0;
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004646 case Intrinsic::pcmarker: {
Gabor Greif0635f352010-06-25 09:38:13 +00004647 SDValue Tmp = getValue(I.getArgOperand(0));
Bill Wendling4533cac2010-01-28 21:51:40 +00004648 DAG.setRoot(DAG.getNode(ISD::PCMARKER, dl, MVT::Other, getRoot(), Tmp));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004649 return 0;
4650 }
4651 case Intrinsic::readcyclecounter: {
4652 SDValue Op = getRoot();
Bill Wendlingd0283fa2009-12-22 00:40:51 +00004653 Res = DAG.getNode(ISD::READCYCLECOUNTER, dl,
4654 DAG.getVTList(MVT::i64, MVT::Other),
4655 &Op, 1);
4656 setValue(&I, Res);
4657 DAG.setRoot(Res.getValue(1));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004658 return 0;
4659 }
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004660 case Intrinsic::bswap:
Bill Wendling4533cac2010-01-28 21:51:40 +00004661 setValue(&I, DAG.getNode(ISD::BSWAP, dl,
Gabor Greif0635f352010-06-25 09:38:13 +00004662 getValue(I.getArgOperand(0)).getValueType(),
4663 getValue(I.getArgOperand(0))));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004664 return 0;
4665 case Intrinsic::cttz: {
Gabor Greif0635f352010-06-25 09:38:13 +00004666 SDValue Arg = getValue(I.getArgOperand(0));
Owen Andersone50ed302009-08-10 22:56:29 +00004667 EVT Ty = Arg.getValueType();
Bill Wendling4533cac2010-01-28 21:51:40 +00004668 setValue(&I, DAG.getNode(ISD::CTTZ, dl, Ty, Arg));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004669 return 0;
4670 }
4671 case Intrinsic::ctlz: {
Gabor Greif0635f352010-06-25 09:38:13 +00004672 SDValue Arg = getValue(I.getArgOperand(0));
Owen Andersone50ed302009-08-10 22:56:29 +00004673 EVT Ty = Arg.getValueType();
Bill Wendling4533cac2010-01-28 21:51:40 +00004674 setValue(&I, DAG.getNode(ISD::CTLZ, dl, Ty, Arg));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004675 return 0;
4676 }
4677 case Intrinsic::ctpop: {
Gabor Greif0635f352010-06-25 09:38:13 +00004678 SDValue Arg = getValue(I.getArgOperand(0));
Owen Andersone50ed302009-08-10 22:56:29 +00004679 EVT Ty = Arg.getValueType();
Bill Wendling4533cac2010-01-28 21:51:40 +00004680 setValue(&I, DAG.getNode(ISD::CTPOP, dl, Ty, Arg));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004681 return 0;
4682 }
4683 case Intrinsic::stacksave: {
4684 SDValue Op = getRoot();
Bill Wendlingd0283fa2009-12-22 00:40:51 +00004685 Res = DAG.getNode(ISD::STACKSAVE, dl,
4686 DAG.getVTList(TLI.getPointerTy(), MVT::Other), &Op, 1);
4687 setValue(&I, Res);
4688 DAG.setRoot(Res.getValue(1));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004689 return 0;
4690 }
4691 case Intrinsic::stackrestore: {
Gabor Greif0635f352010-06-25 09:38:13 +00004692 Res = getValue(I.getArgOperand(0));
Bill Wendling4533cac2010-01-28 21:51:40 +00004693 DAG.setRoot(DAG.getNode(ISD::STACKRESTORE, dl, MVT::Other, getRoot(), Res));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004694 return 0;
4695 }
Bill Wendling57344502008-11-18 11:01:33 +00004696 case Intrinsic::stackprotector: {
Bill Wendlingb2a42982008-11-06 02:29:10 +00004697 // Emit code into the DAG to store the stack guard onto the stack.
4698 MachineFunction &MF = DAG.getMachineFunction();
4699 MachineFrameInfo *MFI = MF.getFrameInfo();
Owen Andersone50ed302009-08-10 22:56:29 +00004700 EVT PtrTy = TLI.getPointerTy();
Bill Wendlingb2a42982008-11-06 02:29:10 +00004701
Gabor Greif0635f352010-06-25 09:38:13 +00004702 SDValue Src = getValue(I.getArgOperand(0)); // The guard's value.
4703 AllocaInst *Slot = cast<AllocaInst>(I.getArgOperand(1));
Bill Wendlingb2a42982008-11-06 02:29:10 +00004704
Bill Wendlingb7c6ebc2008-11-07 01:23:58 +00004705 int FI = FuncInfo.StaticAllocaMap[Slot];
Bill Wendlingb2a42982008-11-06 02:29:10 +00004706 MFI->setStackProtectorIndex(FI);
4707
4708 SDValue FIN = DAG.getFrameIndex(FI, PtrTy);
4709
4710 // Store the stack protector onto the stack.
Bill Wendlingd0283fa2009-12-22 00:40:51 +00004711 Res = DAG.getStore(getRoot(), getCurDebugLoc(), Src, FIN,
Chris Lattner84bd98a2010-09-21 18:58:22 +00004712 MachinePointerInfo::getFixedStack(FI),
4713 true, false, 0);
Bill Wendlingd0283fa2009-12-22 00:40:51 +00004714 setValue(&I, Res);
4715 DAG.setRoot(Res);
Bill Wendlingb2a42982008-11-06 02:29:10 +00004716 return 0;
4717 }
Eric Christopher7b5e6172009-10-27 00:52:25 +00004718 case Intrinsic::objectsize: {
4719 // If we don't know by now, we're never going to know.
Gabor Greif0635f352010-06-25 09:38:13 +00004720 ConstantInt *CI = dyn_cast<ConstantInt>(I.getArgOperand(1));
Eric Christopher7b5e6172009-10-27 00:52:25 +00004721
4722 assert(CI && "Non-constant type in __builtin_object_size?");
4723
Gabor Greif0635f352010-06-25 09:38:13 +00004724 SDValue Arg = getValue(I.getCalledValue());
Eric Christopher7e5d2ff2009-10-28 21:32:16 +00004725 EVT Ty = Arg.getValueType();
4726
Dan Gohmane368b462010-06-18 14:22:04 +00004727 if (CI->isZero())
Bill Wendlingd0283fa2009-12-22 00:40:51 +00004728 Res = DAG.getConstant(-1ULL, Ty);
Eric Christopher7b5e6172009-10-27 00:52:25 +00004729 else
Bill Wendlingd0283fa2009-12-22 00:40:51 +00004730 Res = DAG.getConstant(0, Ty);
4731
4732 setValue(&I, Res);
Eric Christopher7b5e6172009-10-27 00:52:25 +00004733 return 0;
4734 }
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004735 case Intrinsic::var_annotation:
4736 // Discard annotate attributes
4737 return 0;
4738
4739 case Intrinsic::init_trampoline: {
Gabor Greif0635f352010-06-25 09:38:13 +00004740 const Function *F = cast<Function>(I.getArgOperand(1)->stripPointerCasts());
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004741
4742 SDValue Ops[6];
4743 Ops[0] = getRoot();
Gabor Greif0635f352010-06-25 09:38:13 +00004744 Ops[1] = getValue(I.getArgOperand(0));
4745 Ops[2] = getValue(I.getArgOperand(1));
4746 Ops[3] = getValue(I.getArgOperand(2));
4747 Ops[4] = DAG.getSrcValue(I.getArgOperand(0));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004748 Ops[5] = DAG.getSrcValue(F);
4749
Bill Wendlingd0283fa2009-12-22 00:40:51 +00004750 Res = DAG.getNode(ISD::TRAMPOLINE, dl,
4751 DAG.getVTList(TLI.getPointerTy(), MVT::Other),
4752 Ops, 6);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004753
Bill Wendlingd0283fa2009-12-22 00:40:51 +00004754 setValue(&I, Res);
4755 DAG.setRoot(Res.getValue(1));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004756 return 0;
4757 }
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004758 case Intrinsic::gcroot:
4759 if (GFI) {
Gabor Greif0635f352010-06-25 09:38:13 +00004760 const Value *Alloca = I.getArgOperand(0);
4761 const Constant *TypeMap = cast<Constant>(I.getArgOperand(1));
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00004762
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004763 FrameIndexSDNode *FI = cast<FrameIndexSDNode>(getValue(Alloca).getNode());
4764 GFI->addStackRoot(FI->getIndex(), TypeMap);
4765 }
4766 return 0;
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004767 case Intrinsic::gcread:
4768 case Intrinsic::gcwrite:
Torok Edwinc23197a2009-07-14 16:55:14 +00004769 llvm_unreachable("GC failed to lower gcread/gcwrite intrinsics!");
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004770 return 0;
Bill Wendlingd0283fa2009-12-22 00:40:51 +00004771 case Intrinsic::flt_rounds:
Bill Wendling4533cac2010-01-28 21:51:40 +00004772 setValue(&I, DAG.getNode(ISD::FLT_ROUNDS_, dl, MVT::i32));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004773 return 0;
Jakub Staszak9da99342011-07-06 18:22:43 +00004774
4775 case Intrinsic::expect: {
4776 // Just replace __builtin_expect(exp, c) with EXP.
4777 setValue(&I, getValue(I.getArgOperand(0)));
4778 return 0;
4779 }
4780
Evan Cheng4da0c7c2011-04-08 21:37:21 +00004781 case Intrinsic::trap: {
4782 StringRef TrapFuncName = getTrapFunctionName();
4783 if (TrapFuncName.empty()) {
4784 DAG.setRoot(DAG.getNode(ISD::TRAP, dl,MVT::Other, getRoot()));
4785 return 0;
4786 }
4787 TargetLowering::ArgListTy Args;
4788 std::pair<SDValue, SDValue> Result =
4789 TLI.LowerCallTo(getRoot(), I.getType(),
4790 false, false, false, false, 0, CallingConv::C,
4791 /*isTailCall=*/false, /*isReturnValueUsed=*/true,
4792 DAG.getExternalSymbol(TrapFuncName.data(), TLI.getPointerTy()),
4793 Args, DAG, getCurDebugLoc());
4794 DAG.setRoot(Result.second);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004795 return 0;
Evan Cheng4da0c7c2011-04-08 21:37:21 +00004796 }
Bill Wendlingef375462008-11-21 02:38:44 +00004797 case Intrinsic::uadd_with_overflow:
Bill Wendling74c37652008-12-09 22:08:41 +00004798 return implVisitAluOverflow(I, ISD::UADDO);
4799 case Intrinsic::sadd_with_overflow:
4800 return implVisitAluOverflow(I, ISD::SADDO);
4801 case Intrinsic::usub_with_overflow:
4802 return implVisitAluOverflow(I, ISD::USUBO);
4803 case Intrinsic::ssub_with_overflow:
4804 return implVisitAluOverflow(I, ISD::SSUBO);
4805 case Intrinsic::umul_with_overflow:
4806 return implVisitAluOverflow(I, ISD::UMULO);
4807 case Intrinsic::smul_with_overflow:
4808 return implVisitAluOverflow(I, ISD::SMULO);
Bill Wendling7cdc3c82008-11-21 02:03:52 +00004809
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004810 case Intrinsic::prefetch: {
Bruno Cardoso Lopes9a767332011-06-14 04:58:37 +00004811 SDValue Ops[5];
Dale Johannesen1de4aa92010-10-26 23:11:10 +00004812 unsigned rw = cast<ConstantInt>(I.getArgOperand(1))->getZExtValue();
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004813 Ops[0] = getRoot();
Gabor Greif0635f352010-06-25 09:38:13 +00004814 Ops[1] = getValue(I.getArgOperand(0));
4815 Ops[2] = getValue(I.getArgOperand(1));
4816 Ops[3] = getValue(I.getArgOperand(2));
Bruno Cardoso Lopes9a767332011-06-14 04:58:37 +00004817 Ops[4] = getValue(I.getArgOperand(3));
Dale Johannesen1de4aa92010-10-26 23:11:10 +00004818 DAG.setRoot(DAG.getMemIntrinsicNode(ISD::PREFETCH, dl,
4819 DAG.getVTList(MVT::Other),
Bruno Cardoso Lopes9a767332011-06-14 04:58:37 +00004820 &Ops[0], 5,
Dale Johannesen1de4aa92010-10-26 23:11:10 +00004821 EVT::getIntegerVT(*Context, 8),
4822 MachinePointerInfo(I.getArgOperand(0)),
4823 0, /* align */
4824 false, /* volatile */
4825 rw==0, /* read */
4826 rw==1)); /* write */
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004827 return 0;
4828 }
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004829 case Intrinsic::memory_barrier: {
4830 SDValue Ops[6];
4831 Ops[0] = getRoot();
4832 for (int x = 1; x < 6; ++x)
Gabor Greif0635f352010-06-25 09:38:13 +00004833 Ops[x] = getValue(I.getArgOperand(x - 1));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004834
Bill Wendling4533cac2010-01-28 21:51:40 +00004835 DAG.setRoot(DAG.getNode(ISD::MEMBARRIER, dl, MVT::Other, &Ops[0], 6));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004836 return 0;
4837 }
4838 case Intrinsic::atomic_cmp_swap: {
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00004839 SDValue Root = getRoot();
Dan Gohman0b1d4a72008-12-23 21:37:04 +00004840 SDValue L =
Dale Johannesen66978ee2009-01-31 02:22:37 +00004841 DAG.getAtomic(ISD::ATOMIC_CMP_SWAP, getCurDebugLoc(),
Gabor Greif0635f352010-06-25 09:38:13 +00004842 getValue(I.getArgOperand(1)).getValueType().getSimpleVT(),
Dan Gohman0b1d4a72008-12-23 21:37:04 +00004843 Root,
Gabor Greif0635f352010-06-25 09:38:13 +00004844 getValue(I.getArgOperand(0)),
4845 getValue(I.getArgOperand(1)),
4846 getValue(I.getArgOperand(2)),
Chris Lattner60bddc82010-09-21 04:53:42 +00004847 MachinePointerInfo(I.getArgOperand(0)));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004848 setValue(&I, L);
4849 DAG.setRoot(L.getValue(1));
4850 return 0;
4851 }
4852 case Intrinsic::atomic_load_add:
Dan Gohman0b1d4a72008-12-23 21:37:04 +00004853 return implVisitBinaryAtomic(I, ISD::ATOMIC_LOAD_ADD);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004854 case Intrinsic::atomic_load_sub:
Dan Gohman0b1d4a72008-12-23 21:37:04 +00004855 return implVisitBinaryAtomic(I, ISD::ATOMIC_LOAD_SUB);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004856 case Intrinsic::atomic_load_or:
Dan Gohman0b1d4a72008-12-23 21:37:04 +00004857 return implVisitBinaryAtomic(I, ISD::ATOMIC_LOAD_OR);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004858 case Intrinsic::atomic_load_xor:
Dan Gohman0b1d4a72008-12-23 21:37:04 +00004859 return implVisitBinaryAtomic(I, ISD::ATOMIC_LOAD_XOR);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004860 case Intrinsic::atomic_load_and:
Dan Gohman0b1d4a72008-12-23 21:37:04 +00004861 return implVisitBinaryAtomic(I, ISD::ATOMIC_LOAD_AND);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004862 case Intrinsic::atomic_load_nand:
Dan Gohman0b1d4a72008-12-23 21:37:04 +00004863 return implVisitBinaryAtomic(I, ISD::ATOMIC_LOAD_NAND);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004864 case Intrinsic::atomic_load_max:
Dan Gohman0b1d4a72008-12-23 21:37:04 +00004865 return implVisitBinaryAtomic(I, ISD::ATOMIC_LOAD_MAX);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004866 case Intrinsic::atomic_load_min:
Dan Gohman0b1d4a72008-12-23 21:37:04 +00004867 return implVisitBinaryAtomic(I, ISD::ATOMIC_LOAD_MIN);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004868 case Intrinsic::atomic_load_umin:
Dan Gohman0b1d4a72008-12-23 21:37:04 +00004869 return implVisitBinaryAtomic(I, ISD::ATOMIC_LOAD_UMIN);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004870 case Intrinsic::atomic_load_umax:
Dan Gohman0b1d4a72008-12-23 21:37:04 +00004871 return implVisitBinaryAtomic(I, ISD::ATOMIC_LOAD_UMAX);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004872 case Intrinsic::atomic_swap:
Dan Gohman0b1d4a72008-12-23 21:37:04 +00004873 return implVisitBinaryAtomic(I, ISD::ATOMIC_SWAP);
Duncan Sandsf07c9492009-11-10 09:08:09 +00004874
4875 case Intrinsic::invariant_start:
4876 case Intrinsic::lifetime_start:
4877 // Discard region information.
Bill Wendling4533cac2010-01-28 21:51:40 +00004878 setValue(&I, DAG.getUNDEF(TLI.getPointerTy()));
Duncan Sandsf07c9492009-11-10 09:08:09 +00004879 return 0;
4880 case Intrinsic::invariant_end:
4881 case Intrinsic::lifetime_end:
4882 // Discard region information.
4883 return 0;
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004884 }
4885}
4886
Dan Gohman46510a72010-04-15 01:51:59 +00004887void SelectionDAGBuilder::LowerCallTo(ImmutableCallSite CS, SDValue Callee,
Dan Gohman2048b852009-11-23 18:04:58 +00004888 bool isTailCall,
4889 MachineBasicBlock *LandingPad) {
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004890 const PointerType *PT = cast<PointerType>(CS.getCalledValue()->getType());
4891 const FunctionType *FTy = cast<FunctionType>(PT->getElementType());
Kenneth Uildriksc158dde2009-11-11 19:59:24 +00004892 const Type *RetTy = FTy->getReturnType();
Chris Lattner512063d2010-04-05 06:19:28 +00004893 MachineModuleInfo &MMI = DAG.getMachineFunction().getMMI();
Chris Lattner16112732010-03-14 01:41:15 +00004894 MCSymbol *BeginLabel = 0;
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004895
4896 TargetLowering::ArgListTy Args;
4897 TargetLowering::ArgListEntry Entry;
4898 Args.reserve(CS.arg_size());
Kenneth Uildriksc158dde2009-11-11 19:59:24 +00004899
4900 // Check whether the function can return without sret-demotion.
Dan Gohman84023e02010-07-10 09:00:22 +00004901 SmallVector<ISD::OutputArg, 4> Outs;
Kenneth Uildriksc158dde2009-11-11 19:59:24 +00004902 SmallVector<uint64_t, 4> Offsets;
Dan Gohman84023e02010-07-10 09:00:22 +00004903 GetReturnInfo(RetTy, CS.getAttributes().getRetAttributes(),
4904 Outs, TLI, &Offsets);
Kenneth Uildriksc158dde2009-11-11 19:59:24 +00004905
Mikhail Glushenkovb3c01992010-01-01 04:41:22 +00004906 bool CanLowerReturn = TLI.CanLowerReturn(CS.getCallingConv(),
Eric Christopher471e4222011-06-08 23:55:35 +00004907 DAG.getMachineFunction(),
4908 FTy->isVarArg(), Outs,
4909 FTy->getContext());
Kenneth Uildriksc158dde2009-11-11 19:59:24 +00004910
4911 SDValue DemoteStackSlot;
Chris Lattnerecf42c42010-09-21 16:36:31 +00004912 int DemoteStackIdx = -100;
Kenneth Uildriksc158dde2009-11-11 19:59:24 +00004913
4914 if (!CanLowerReturn) {
4915 uint64_t TySize = TLI.getTargetData()->getTypeAllocSize(
4916 FTy->getReturnType());
4917 unsigned Align = TLI.getTargetData()->getPrefTypeAlignment(
4918 FTy->getReturnType());
4919 MachineFunction &MF = DAG.getMachineFunction();
Chris Lattnerecf42c42010-09-21 16:36:31 +00004920 DemoteStackIdx = MF.getFrameInfo()->CreateStackObject(TySize, Align, false);
Kenneth Uildriksc158dde2009-11-11 19:59:24 +00004921 const Type *StackSlotPtrType = PointerType::getUnqual(FTy->getReturnType());
4922
Chris Lattnerecf42c42010-09-21 16:36:31 +00004923 DemoteStackSlot = DAG.getFrameIndex(DemoteStackIdx, TLI.getPointerTy());
Kenneth Uildriksc158dde2009-11-11 19:59:24 +00004924 Entry.Node = DemoteStackSlot;
4925 Entry.Ty = StackSlotPtrType;
4926 Entry.isSExt = false;
4927 Entry.isZExt = false;
4928 Entry.isInReg = false;
4929 Entry.isSRet = true;
4930 Entry.isNest = false;
4931 Entry.isByVal = false;
4932 Entry.Alignment = Align;
4933 Args.push_back(Entry);
4934 RetTy = Type::getVoidTy(FTy->getContext());
4935 }
4936
Dan Gohman46510a72010-04-15 01:51:59 +00004937 for (ImmutableCallSite::arg_iterator i = CS.arg_begin(), e = CS.arg_end();
Kenneth Uildriksc158dde2009-11-11 19:59:24 +00004938 i != e; ++i) {
Rafael Espindola3fa82832011-05-13 15:18:06 +00004939 const Value *V = *i;
4940
4941 // Skip empty types
4942 if (V->getType()->isEmptyTy())
4943 continue;
4944
4945 SDValue ArgNode = getValue(V);
4946 Entry.Node = ArgNode; Entry.Ty = V->getType();
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004947
4948 unsigned attrInd = i - CS.arg_begin() + 1;
Devang Patel05988662008-09-25 21:00:45 +00004949 Entry.isSExt = CS.paramHasAttr(attrInd, Attribute::SExt);
4950 Entry.isZExt = CS.paramHasAttr(attrInd, Attribute::ZExt);
4951 Entry.isInReg = CS.paramHasAttr(attrInd, Attribute::InReg);
4952 Entry.isSRet = CS.paramHasAttr(attrInd, Attribute::StructRet);
4953 Entry.isNest = CS.paramHasAttr(attrInd, Attribute::Nest);
4954 Entry.isByVal = CS.paramHasAttr(attrInd, Attribute::ByVal);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004955 Entry.Alignment = CS.getParamAlignment(attrInd);
4956 Args.push_back(Entry);
4957 }
4958
Chris Lattner512063d2010-04-05 06:19:28 +00004959 if (LandingPad) {
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004960 // Insert a label before the invoke call to mark the try range. This can be
4961 // used to detect deletion of the invoke via the MachineModuleInfo.
Chris Lattner512063d2010-04-05 06:19:28 +00004962 BeginLabel = MMI.getContext().CreateTempSymbol();
Jim Grosbach1b747ad2009-08-11 00:09:57 +00004963
Jim Grosbachca752c92010-01-28 01:45:32 +00004964 // For SjLj, keep track of which landing pads go with which invokes
4965 // so as to maintain the ordering of pads in the LSDA.
Chris Lattner512063d2010-04-05 06:19:28 +00004966 unsigned CallSiteIndex = MMI.getCurrentCallSite();
Jim Grosbachca752c92010-01-28 01:45:32 +00004967 if (CallSiteIndex) {
Chris Lattner512063d2010-04-05 06:19:28 +00004968 MMI.setCallSiteBeginLabel(BeginLabel, CallSiteIndex);
Jim Grosbachca752c92010-01-28 01:45:32 +00004969 // Now that the call site is handled, stop tracking it.
Chris Lattner512063d2010-04-05 06:19:28 +00004970 MMI.setCurrentCallSite(0);
Jim Grosbachca752c92010-01-28 01:45:32 +00004971 }
4972
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004973 // Both PendingLoads and PendingExports must be flushed here;
4974 // this call might not return.
4975 (void)getRoot();
Chris Lattner7561d482010-03-14 02:33:54 +00004976 DAG.setRoot(DAG.getEHLabel(getCurDebugLoc(), getControlRoot(), BeginLabel));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004977 }
4978
Dan Gohman98ca4f22009-08-05 01:29:28 +00004979 // Check if target-independent constraints permit a tail call here.
4980 // Target-dependent constraints are checked within TLI.LowerCallTo.
4981 if (isTailCall &&
Evan Cheng86809cc2010-02-03 03:28:02 +00004982 !isInTailCallPosition(CS, CS.getAttributes().getRetAttributes(), TLI))
Dan Gohman98ca4f22009-08-05 01:29:28 +00004983 isTailCall = false;
4984
Dan Gohmanbadcda42010-08-28 00:51:03 +00004985 // If there's a possibility that fast-isel has already selected some amount
4986 // of the current basic block, don't emit a tail call.
4987 if (isTailCall && EnableFastISel)
4988 isTailCall = false;
4989
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004990 std::pair<SDValue,SDValue> Result =
Kenneth Uildriksc158dde2009-11-11 19:59:24 +00004991 TLI.LowerCallTo(getRoot(), RetTy,
Devang Patel05988662008-09-25 21:00:45 +00004992 CS.paramHasAttr(0, Attribute::SExt),
Dale Johannesen86098bd2008-09-26 19:31:26 +00004993 CS.paramHasAttr(0, Attribute::ZExt), FTy->isVarArg(),
Tilmann Scheller6b61cd12009-07-03 06:44:53 +00004994 CS.paramHasAttr(0, Attribute::InReg), FTy->getNumParams(),
Dale Johannesen86098bd2008-09-26 19:31:26 +00004995 CS.getCallingConv(),
Dan Gohman98ca4f22009-08-05 01:29:28 +00004996 isTailCall,
4997 !CS.getInstruction()->use_empty(),
Bill Wendling46ada192010-03-02 01:55:18 +00004998 Callee, Args, DAG, getCurDebugLoc());
Dan Gohman98ca4f22009-08-05 01:29:28 +00004999 assert((isTailCall || Result.second.getNode()) &&
5000 "Non-null chain expected with non-tail call!");
5001 assert((Result.second.getNode() || !Result.first.getNode()) &&
5002 "Null value expected with tail call!");
Bill Wendlinge80ae832009-12-22 00:50:32 +00005003 if (Result.first.getNode()) {
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005004 setValue(CS.getInstruction(), Result.first);
Bill Wendlinge80ae832009-12-22 00:50:32 +00005005 } else if (!CanLowerReturn && Result.second.getNode()) {
Kenneth Uildriksc158dde2009-11-11 19:59:24 +00005006 // The instruction result is the result of loading from the
5007 // hidden sret parameter.
5008 SmallVector<EVT, 1> PVTs;
5009 const Type *PtrRetTy = PointerType::getUnqual(FTy->getReturnType());
5010
5011 ComputeValueVTs(TLI, PtrRetTy, PVTs);
5012 assert(PVTs.size() == 1 && "Pointers should fit in one register");
5013 EVT PtrVT = PVTs[0];
Dan Gohman84023e02010-07-10 09:00:22 +00005014 unsigned NumValues = Outs.size();
Kenneth Uildriksc158dde2009-11-11 19:59:24 +00005015 SmallVector<SDValue, 4> Values(NumValues);
5016 SmallVector<SDValue, 4> Chains(NumValues);
5017
5018 for (unsigned i = 0; i < NumValues; ++i) {
Bill Wendlinge80ae832009-12-22 00:50:32 +00005019 SDValue Add = DAG.getNode(ISD::ADD, getCurDebugLoc(), PtrVT,
5020 DemoteStackSlot,
5021 DAG.getConstant(Offsets[i], PtrVT));
Dan Gohman84023e02010-07-10 09:00:22 +00005022 SDValue L = DAG.getLoad(Outs[i].VT, getCurDebugLoc(), Result.second,
Chris Lattnerecf42c42010-09-21 16:36:31 +00005023 Add,
5024 MachinePointerInfo::getFixedStack(DemoteStackIdx, Offsets[i]),
5025 false, false, 1);
Kenneth Uildriksc158dde2009-11-11 19:59:24 +00005026 Values[i] = L;
5027 Chains[i] = L.getValue(1);
5028 }
Bill Wendlinge80ae832009-12-22 00:50:32 +00005029
Kenneth Uildriksc158dde2009-11-11 19:59:24 +00005030 SDValue Chain = DAG.getNode(ISD::TokenFactor, getCurDebugLoc(),
5031 MVT::Other, &Chains[0], NumValues);
5032 PendingLoads.push_back(Chain);
Michael J. Spencere70c5262010-10-16 08:25:21 +00005033
Kenneth Uildriks93ae4072010-01-16 23:37:33 +00005034 // Collect the legal value parts into potentially illegal values
5035 // that correspond to the original function's return values.
5036 SmallVector<EVT, 4> RetTys;
5037 RetTy = FTy->getReturnType();
5038 ComputeValueVTs(TLI, RetTy, RetTys);
5039 ISD::NodeType AssertOp = ISD::DELETED_NODE;
5040 SmallVector<SDValue, 4> ReturnValues;
5041 unsigned CurReg = 0;
5042 for (unsigned I = 0, E = RetTys.size(); I != E; ++I) {
5043 EVT VT = RetTys[I];
5044 EVT RegisterVT = TLI.getRegisterType(RetTy->getContext(), VT);
5045 unsigned NumRegs = TLI.getNumRegisters(RetTy->getContext(), VT);
Michael J. Spencere70c5262010-10-16 08:25:21 +00005046
Kenneth Uildriks93ae4072010-01-16 23:37:33 +00005047 SDValue ReturnValue =
Bill Wendling46ada192010-03-02 01:55:18 +00005048 getCopyFromParts(DAG, getCurDebugLoc(), &Values[CurReg], NumRegs,
Kenneth Uildriks93ae4072010-01-16 23:37:33 +00005049 RegisterVT, VT, AssertOp);
5050 ReturnValues.push_back(ReturnValue);
Kenneth Uildriks93ae4072010-01-16 23:37:33 +00005051 CurReg += NumRegs;
5052 }
Kenneth Uildriksc158dde2009-11-11 19:59:24 +00005053
Bill Wendling4533cac2010-01-28 21:51:40 +00005054 setValue(CS.getInstruction(),
5055 DAG.getNode(ISD::MERGE_VALUES, getCurDebugLoc(),
5056 DAG.getVTList(&RetTys[0], RetTys.size()),
5057 &ReturnValues[0], ReturnValues.size()));
Kenneth Uildriksc158dde2009-11-11 19:59:24 +00005058 }
Bill Wendlinge80ae832009-12-22 00:50:32 +00005059
Evan Chengc249e482011-04-01 19:57:01 +00005060 // Assign order to nodes here. If the call does not produce a result, it won't
5061 // be mapped to a SDNode and visit() will not assign it an order number.
Evan Cheng8380c032011-04-01 19:42:22 +00005062 if (!Result.second.getNode()) {
Evan Chengc249e482011-04-01 19:57:01 +00005063 // As a special case, a null chain means that a tail call has been emitted and
5064 // the DAG root is already updated.
Dan Gohman98ca4f22009-08-05 01:29:28 +00005065 HasTailCall = true;
Evan Cheng8380c032011-04-01 19:42:22 +00005066 ++SDNodeOrder;
5067 AssignOrderingToNode(DAG.getRoot().getNode());
5068 } else {
5069 DAG.setRoot(Result.second);
5070 ++SDNodeOrder;
5071 AssignOrderingToNode(Result.second.getNode());
5072 }
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005073
Chris Lattner512063d2010-04-05 06:19:28 +00005074 if (LandingPad) {
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005075 // Insert a label at the end of the invoke call to mark the try range. This
5076 // can be used to detect deletion of the invoke via the MachineModuleInfo.
Chris Lattner512063d2010-04-05 06:19:28 +00005077 MCSymbol *EndLabel = MMI.getContext().CreateTempSymbol();
Chris Lattner7561d482010-03-14 02:33:54 +00005078 DAG.setRoot(DAG.getEHLabel(getCurDebugLoc(), getRoot(), EndLabel));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005079
5080 // Inform MachineModuleInfo of range.
Chris Lattner512063d2010-04-05 06:19:28 +00005081 MMI.addInvoke(LandingPad, BeginLabel, EndLabel);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005082 }
5083}
5084
Chris Lattner8047d9a2009-12-24 00:37:38 +00005085/// IsOnlyUsedInZeroEqualityComparison - Return true if it only matters that the
5086/// value is equal or not-equal to zero.
Dan Gohman46510a72010-04-15 01:51:59 +00005087static bool IsOnlyUsedInZeroEqualityComparison(const Value *V) {
5088 for (Value::const_use_iterator UI = V->use_begin(), E = V->use_end();
Chris Lattner8047d9a2009-12-24 00:37:38 +00005089 UI != E; ++UI) {
Dan Gohman46510a72010-04-15 01:51:59 +00005090 if (const ICmpInst *IC = dyn_cast<ICmpInst>(*UI))
Chris Lattner8047d9a2009-12-24 00:37:38 +00005091 if (IC->isEquality())
Dan Gohman46510a72010-04-15 01:51:59 +00005092 if (const Constant *C = dyn_cast<Constant>(IC->getOperand(1)))
Chris Lattner8047d9a2009-12-24 00:37:38 +00005093 if (C->isNullValue())
5094 continue;
5095 // Unknown instruction.
5096 return false;
5097 }
5098 return true;
5099}
5100
Dan Gohman46510a72010-04-15 01:51:59 +00005101static SDValue getMemCmpLoad(const Value *PtrVal, MVT LoadVT,
5102 const Type *LoadTy,
Chris Lattner8047d9a2009-12-24 00:37:38 +00005103 SelectionDAGBuilder &Builder) {
Mikhail Glushenkovb3c01992010-01-01 04:41:22 +00005104
Chris Lattner8047d9a2009-12-24 00:37:38 +00005105 // Check to see if this load can be trivially constant folded, e.g. if the
5106 // input is from a string literal.
Dan Gohman46510a72010-04-15 01:51:59 +00005107 if (const Constant *LoadInput = dyn_cast<Constant>(PtrVal)) {
Chris Lattner8047d9a2009-12-24 00:37:38 +00005108 // Cast pointer to the type we really want to load.
Dan Gohman46510a72010-04-15 01:51:59 +00005109 LoadInput = ConstantExpr::getBitCast(const_cast<Constant *>(LoadInput),
Chris Lattner8047d9a2009-12-24 00:37:38 +00005110 PointerType::getUnqual(LoadTy));
Mikhail Glushenkovb3c01992010-01-01 04:41:22 +00005111
Dan Gohman46510a72010-04-15 01:51:59 +00005112 if (const Constant *LoadCst =
5113 ConstantFoldLoadFromConstPtr(const_cast<Constant *>(LoadInput),
5114 Builder.TD))
Chris Lattner8047d9a2009-12-24 00:37:38 +00005115 return Builder.getValue(LoadCst);
5116 }
Mikhail Glushenkovb3c01992010-01-01 04:41:22 +00005117
Chris Lattner8047d9a2009-12-24 00:37:38 +00005118 // Otherwise, we have to emit the load. If the pointer is to unfoldable but
5119 // still constant memory, the input chain can be the entry node.
5120 SDValue Root;
5121 bool ConstantMemory = false;
Mikhail Glushenkovb3c01992010-01-01 04:41:22 +00005122
Chris Lattner8047d9a2009-12-24 00:37:38 +00005123 // Do not serialize (non-volatile) loads of constant memory with anything.
5124 if (Builder.AA->pointsToConstantMemory(PtrVal)) {
5125 Root = Builder.DAG.getEntryNode();
5126 ConstantMemory = true;
5127 } else {
5128 // Do not serialize non-volatile loads against each other.
5129 Root = Builder.DAG.getRoot();
5130 }
Mikhail Glushenkovb3c01992010-01-01 04:41:22 +00005131
Chris Lattner8047d9a2009-12-24 00:37:38 +00005132 SDValue Ptr = Builder.getValue(PtrVal);
5133 SDValue LoadVal = Builder.DAG.getLoad(LoadVT, Builder.getCurDebugLoc(), Root,
Chris Lattnerecf42c42010-09-21 16:36:31 +00005134 Ptr, MachinePointerInfo(PtrVal),
David Greene1e559442010-02-15 17:00:31 +00005135 false /*volatile*/,
5136 false /*nontemporal*/, 1 /* align=1 */);
Mikhail Glushenkovb3c01992010-01-01 04:41:22 +00005137
Chris Lattner8047d9a2009-12-24 00:37:38 +00005138 if (!ConstantMemory)
5139 Builder.PendingLoads.push_back(LoadVal.getValue(1));
5140 return LoadVal;
5141}
5142
5143
5144/// visitMemCmpCall - See if we can lower a call to memcmp in an optimized form.
5145/// If so, return true and lower it, otherwise return false and it will be
5146/// lowered like a normal call.
Dan Gohman46510a72010-04-15 01:51:59 +00005147bool SelectionDAGBuilder::visitMemCmpCall(const CallInst &I) {
Chris Lattner8047d9a2009-12-24 00:37:38 +00005148 // Verify that the prototype makes sense. int memcmp(void*,void*,size_t)
Gabor Greif37387d52010-06-30 12:55:46 +00005149 if (I.getNumArgOperands() != 3)
Chris Lattner8047d9a2009-12-24 00:37:38 +00005150 return false;
Mikhail Glushenkovb3c01992010-01-01 04:41:22 +00005151
Gabor Greif0635f352010-06-25 09:38:13 +00005152 const Value *LHS = I.getArgOperand(0), *RHS = I.getArgOperand(1);
Duncan Sands1df98592010-02-16 11:11:14 +00005153 if (!LHS->getType()->isPointerTy() || !RHS->getType()->isPointerTy() ||
Gabor Greif0635f352010-06-25 09:38:13 +00005154 !I.getArgOperand(2)->getType()->isIntegerTy() ||
Duncan Sands1df98592010-02-16 11:11:14 +00005155 !I.getType()->isIntegerTy())
Mikhail Glushenkovb3c01992010-01-01 04:41:22 +00005156 return false;
5157
Gabor Greif0635f352010-06-25 09:38:13 +00005158 const ConstantInt *Size = dyn_cast<ConstantInt>(I.getArgOperand(2));
Mikhail Glushenkovb3c01992010-01-01 04:41:22 +00005159
Chris Lattner8047d9a2009-12-24 00:37:38 +00005160 // memcmp(S1,S2,2) != 0 -> (*(short*)LHS != *(short*)RHS) != 0
5161 // memcmp(S1,S2,4) != 0 -> (*(int*)LHS != *(int*)RHS) != 0
Chris Lattner04b091a2009-12-24 01:07:17 +00005162 if (Size && IsOnlyUsedInZeroEqualityComparison(&I)) {
5163 bool ActuallyDoIt = true;
5164 MVT LoadVT;
5165 const Type *LoadTy;
5166 switch (Size->getZExtValue()) {
5167 default:
5168 LoadVT = MVT::Other;
5169 LoadTy = 0;
5170 ActuallyDoIt = false;
5171 break;
5172 case 2:
5173 LoadVT = MVT::i16;
5174 LoadTy = Type::getInt16Ty(Size->getContext());
5175 break;
5176 case 4:
5177 LoadVT = MVT::i32;
Mikhail Glushenkovb3c01992010-01-01 04:41:22 +00005178 LoadTy = Type::getInt32Ty(Size->getContext());
Chris Lattner04b091a2009-12-24 01:07:17 +00005179 break;
5180 case 8:
5181 LoadVT = MVT::i64;
Mikhail Glushenkovb3c01992010-01-01 04:41:22 +00005182 LoadTy = Type::getInt64Ty(Size->getContext());
Chris Lattner04b091a2009-12-24 01:07:17 +00005183 break;
5184 /*
5185 case 16:
5186 LoadVT = MVT::v4i32;
Mikhail Glushenkovb3c01992010-01-01 04:41:22 +00005187 LoadTy = Type::getInt32Ty(Size->getContext());
Chris Lattner04b091a2009-12-24 01:07:17 +00005188 LoadTy = VectorType::get(LoadTy, 4);
5189 break;
5190 */
5191 }
Mikhail Glushenkovb3c01992010-01-01 04:41:22 +00005192
Chris Lattner04b091a2009-12-24 01:07:17 +00005193 // This turns into unaligned loads. We only do this if the target natively
5194 // supports the MVT we'll be loading or if it is small enough (<= 4) that
5195 // we'll only produce a small number of byte loads.
Mikhail Glushenkovb3c01992010-01-01 04:41:22 +00005196
Chris Lattner04b091a2009-12-24 01:07:17 +00005197 // Require that we can find a legal MVT, and only do this if the target
5198 // supports unaligned loads of that type. Expanding into byte loads would
5199 // bloat the code.
5200 if (ActuallyDoIt && Size->getZExtValue() > 4) {
5201 // TODO: Handle 5 byte compare as 4-byte + 1 byte.
5202 // TODO: Handle 8 byte compare on x86-32 as two 32-bit loads.
5203 if (!TLI.isTypeLegal(LoadVT) ||!TLI.allowsUnalignedMemoryAccesses(LoadVT))
5204 ActuallyDoIt = false;
5205 }
Mikhail Glushenkovb3c01992010-01-01 04:41:22 +00005206
Chris Lattner04b091a2009-12-24 01:07:17 +00005207 if (ActuallyDoIt) {
5208 SDValue LHSVal = getMemCmpLoad(LHS, LoadVT, LoadTy, *this);
5209 SDValue RHSVal = getMemCmpLoad(RHS, LoadVT, LoadTy, *this);
Mikhail Glushenkovb3c01992010-01-01 04:41:22 +00005210
Chris Lattner04b091a2009-12-24 01:07:17 +00005211 SDValue Res = DAG.getSetCC(getCurDebugLoc(), MVT::i1, LHSVal, RHSVal,
5212 ISD::SETNE);
5213 EVT CallVT = TLI.getValueType(I.getType(), true);
5214 setValue(&I, DAG.getZExtOrTrunc(Res, getCurDebugLoc(), CallVT));
5215 return true;
5216 }
Chris Lattner8047d9a2009-12-24 00:37:38 +00005217 }
Mikhail Glushenkovb3c01992010-01-01 04:41:22 +00005218
5219
Chris Lattner8047d9a2009-12-24 00:37:38 +00005220 return false;
5221}
5222
5223
Dan Gohman46510a72010-04-15 01:51:59 +00005224void SelectionDAGBuilder::visitCall(const CallInst &I) {
Chris Lattner598751e2010-07-05 05:36:21 +00005225 // Handle inline assembly differently.
5226 if (isa<InlineAsm>(I.getCalledValue())) {
5227 visitInlineAsm(&I);
5228 return;
5229 }
Michael J. Spencere70c5262010-10-16 08:25:21 +00005230
Michael J. Spencer391b43b2010-10-21 20:49:23 +00005231 // See if any floating point values are being passed to this function. This is
5232 // used to emit an undefined reference to fltused on Windows.
5233 const FunctionType *FT =
5234 cast<FunctionType>(I.getCalledValue()->getType()->getContainedType(0));
5235 MachineModuleInfo &MMI = DAG.getMachineFunction().getMMI();
5236 if (FT->isVarArg() &&
5237 !MMI.callsExternalVAFunctionWithFloatingPointArguments()) {
5238 for (unsigned i = 0, e = I.getNumArgOperands(); i != e; ++i) {
5239 const Type* T = I.getArgOperand(i)->getType();
Wesley Peckbf17cfa2010-11-23 03:31:01 +00005240 for (po_iterator<const Type*> i = po_begin(T), e = po_end(T);
Chris Lattnera29aae72010-11-12 17:24:29 +00005241 i != e; ++i) {
5242 if (!i->isFloatingPointTy()) continue;
5243 MMI.setCallsExternalVAFunctionWithFloatingPointArguments(true);
5244 break;
Michael J. Spencer391b43b2010-10-21 20:49:23 +00005245 }
5246 }
5247 }
5248
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005249 const char *RenameFn = 0;
5250 if (Function *F = I.getCalledFunction()) {
5251 if (F->isDeclaration()) {
Chris Lattner598751e2010-07-05 05:36:21 +00005252 if (const TargetIntrinsicInfo *II = TM.getIntrinsicInfo()) {
Dale Johannesen49de9822009-02-05 01:49:45 +00005253 if (unsigned IID = II->getIntrinsicID(F)) {
5254 RenameFn = visitIntrinsicCall(I, IID);
5255 if (!RenameFn)
5256 return;
5257 }
5258 }
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005259 if (unsigned IID = F->getIntrinsicID()) {
5260 RenameFn = visitIntrinsicCall(I, IID);
5261 if (!RenameFn)
5262 return;
5263 }
5264 }
5265
5266 // Check for well-known libc/libm calls. If the function is internal, it
5267 // can't be a library call.
Daniel Dunbarf0443c12009-07-26 08:34:35 +00005268 if (!F->hasLocalLinkage() && F->hasName()) {
5269 StringRef Name = F->getName();
Duncan Sandsd2c817e2010-03-14 21:08:40 +00005270 if (Name == "copysign" || Name == "copysignf" || Name == "copysignl") {
Gabor Greif37387d52010-06-30 12:55:46 +00005271 if (I.getNumArgOperands() == 2 && // Basic sanity checks.
Gabor Greif0635f352010-06-25 09:38:13 +00005272 I.getArgOperand(0)->getType()->isFloatingPointTy() &&
5273 I.getType() == I.getArgOperand(0)->getType() &&
5274 I.getType() == I.getArgOperand(1)->getType()) {
5275 SDValue LHS = getValue(I.getArgOperand(0));
5276 SDValue RHS = getValue(I.getArgOperand(1));
Bill Wendling0d580132009-12-23 01:28:19 +00005277 setValue(&I, DAG.getNode(ISD::FCOPYSIGN, getCurDebugLoc(),
5278 LHS.getValueType(), LHS, RHS));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005279 return;
5280 }
Daniel Dunbarf0443c12009-07-26 08:34:35 +00005281 } else if (Name == "fabs" || Name == "fabsf" || Name == "fabsl") {
Gabor Greif37387d52010-06-30 12:55:46 +00005282 if (I.getNumArgOperands() == 1 && // Basic sanity checks.
Gabor Greif0635f352010-06-25 09:38:13 +00005283 I.getArgOperand(0)->getType()->isFloatingPointTy() &&
5284 I.getType() == I.getArgOperand(0)->getType()) {
5285 SDValue Tmp = getValue(I.getArgOperand(0));
Bill Wendling0d580132009-12-23 01:28:19 +00005286 setValue(&I, DAG.getNode(ISD::FABS, getCurDebugLoc(),
5287 Tmp.getValueType(), Tmp));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005288 return;
5289 }
Daniel Dunbarf0443c12009-07-26 08:34:35 +00005290 } else if (Name == "sin" || Name == "sinf" || Name == "sinl") {
Gabor Greif37387d52010-06-30 12:55:46 +00005291 if (I.getNumArgOperands() == 1 && // Basic sanity checks.
Gabor Greif0635f352010-06-25 09:38:13 +00005292 I.getArgOperand(0)->getType()->isFloatingPointTy() &&
5293 I.getType() == I.getArgOperand(0)->getType() &&
Dale Johannesena45bfd32009-09-25 18:00:35 +00005294 I.onlyReadsMemory()) {
Gabor Greif0635f352010-06-25 09:38:13 +00005295 SDValue Tmp = getValue(I.getArgOperand(0));
Bill Wendling0d580132009-12-23 01:28:19 +00005296 setValue(&I, DAG.getNode(ISD::FSIN, getCurDebugLoc(),
5297 Tmp.getValueType(), Tmp));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005298 return;
5299 }
Daniel Dunbarf0443c12009-07-26 08:34:35 +00005300 } else if (Name == "cos" || Name == "cosf" || Name == "cosl") {
Gabor Greif37387d52010-06-30 12:55:46 +00005301 if (I.getNumArgOperands() == 1 && // Basic sanity checks.
Gabor Greif0635f352010-06-25 09:38:13 +00005302 I.getArgOperand(0)->getType()->isFloatingPointTy() &&
5303 I.getType() == I.getArgOperand(0)->getType() &&
Dale Johannesena45bfd32009-09-25 18:00:35 +00005304 I.onlyReadsMemory()) {
Gabor Greif0635f352010-06-25 09:38:13 +00005305 SDValue Tmp = getValue(I.getArgOperand(0));
Bill Wendling0d580132009-12-23 01:28:19 +00005306 setValue(&I, DAG.getNode(ISD::FCOS, getCurDebugLoc(),
5307 Tmp.getValueType(), Tmp));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005308 return;
5309 }
Dale Johannesen52fb79b2009-09-25 17:23:22 +00005310 } else if (Name == "sqrt" || Name == "sqrtf" || Name == "sqrtl") {
Gabor Greif37387d52010-06-30 12:55:46 +00005311 if (I.getNumArgOperands() == 1 && // Basic sanity checks.
Gabor Greif0635f352010-06-25 09:38:13 +00005312 I.getArgOperand(0)->getType()->isFloatingPointTy() &&
5313 I.getType() == I.getArgOperand(0)->getType() &&
Dale Johannesena45bfd32009-09-25 18:00:35 +00005314 I.onlyReadsMemory()) {
Gabor Greif0635f352010-06-25 09:38:13 +00005315 SDValue Tmp = getValue(I.getArgOperand(0));
Bill Wendling0d580132009-12-23 01:28:19 +00005316 setValue(&I, DAG.getNode(ISD::FSQRT, getCurDebugLoc(),
5317 Tmp.getValueType(), Tmp));
Dale Johannesen52fb79b2009-09-25 17:23:22 +00005318 return;
5319 }
Chris Lattner8047d9a2009-12-24 00:37:38 +00005320 } else if (Name == "memcmp") {
5321 if (visitMemCmpCall(I))
5322 return;
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005323 }
5324 }
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005325 }
Michael J. Spencere70c5262010-10-16 08:25:21 +00005326
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005327 SDValue Callee;
5328 if (!RenameFn)
Gabor Greif0635f352010-06-25 09:38:13 +00005329 Callee = getValue(I.getCalledValue());
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005330 else
Bill Wendling056292f2008-09-16 21:48:12 +00005331 Callee = DAG.getExternalSymbol(RenameFn, TLI.getPointerTy());
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005332
Bill Wendling0d580132009-12-23 01:28:19 +00005333 // Check if we can potentially perform a tail call. More detailed checking is
5334 // be done within LowerCallTo, after more information about the call is known.
Evan Cheng11e67932010-01-26 23:13:04 +00005335 LowerCallTo(&I, Callee, I.isTailCall());
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005336}
5337
Benjamin Kramer7d706ed2011-03-26 16:35:10 +00005338namespace {
Dan Gohman462f6b52010-05-29 17:53:24 +00005339
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005340/// AsmOperandInfo - This contains information for each constraint that we are
5341/// lowering.
Benjamin Kramer7d706ed2011-03-26 16:35:10 +00005342class SDISelAsmOperandInfo : public TargetLowering::AsmOperandInfo {
Cedric Venetaff9c272009-02-14 16:06:42 +00005343public:
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005344 /// CallOperand - If this is the result output operand or a clobber
5345 /// this is null, otherwise it is the incoming operand to the CallInst.
5346 /// This gets modified as the asm is processed.
5347 SDValue CallOperand;
5348
5349 /// AssignedRegs - If this is a register or register class operand, this
5350 /// contains the set of register corresponding to the operand.
5351 RegsForValue AssignedRegs;
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00005352
John Thompsoneac6e1d2010-09-13 18:15:37 +00005353 explicit SDISelAsmOperandInfo(const TargetLowering::AsmOperandInfo &info)
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005354 : TargetLowering::AsmOperandInfo(info), CallOperand(0,0) {
5355 }
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00005356
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005357 /// MarkAllocatedRegs - Once AssignedRegs is set, mark the assigned registers
5358 /// busy in OutputRegs/InputRegs.
5359 void MarkAllocatedRegs(bool isOutReg, bool isInReg,
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00005360 std::set<unsigned> &OutputRegs,
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005361 std::set<unsigned> &InputRegs,
5362 const TargetRegisterInfo &TRI) const {
5363 if (isOutReg) {
5364 for (unsigned i = 0, e = AssignedRegs.Regs.size(); i != e; ++i)
5365 MarkRegAndAliases(AssignedRegs.Regs[i], OutputRegs, TRI);
5366 }
5367 if (isInReg) {
5368 for (unsigned i = 0, e = AssignedRegs.Regs.size(); i != e; ++i)
5369 MarkRegAndAliases(AssignedRegs.Regs[i], InputRegs, TRI);
5370 }
5371 }
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00005372
Owen Andersone50ed302009-08-10 22:56:29 +00005373 /// getCallOperandValEVT - Return the EVT of the Value* that this operand
Chris Lattner81249c92008-10-17 17:05:25 +00005374 /// corresponds to. If there is no Value* for this operand, it returns
Owen Anderson825b72b2009-08-11 20:47:22 +00005375 /// MVT::Other.
Mikhail Glushenkovb3c01992010-01-01 04:41:22 +00005376 EVT getCallOperandValEVT(LLVMContext &Context,
Owen Anderson1d0be152009-08-13 21:58:54 +00005377 const TargetLowering &TLI,
Chris Lattner81249c92008-10-17 17:05:25 +00005378 const TargetData *TD) const {
Owen Anderson825b72b2009-08-11 20:47:22 +00005379 if (CallOperandVal == 0) return MVT::Other;
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00005380
Chris Lattner81249c92008-10-17 17:05:25 +00005381 if (isa<BasicBlock>(CallOperandVal))
5382 return TLI.getPointerTy();
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00005383
Chris Lattner81249c92008-10-17 17:05:25 +00005384 const llvm::Type *OpTy = CallOperandVal->getType();
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00005385
Eric Christophercef81b72011-05-09 20:04:43 +00005386 // FIXME: code duplicated from TargetLowering::ParseConstraints().
Chris Lattner81249c92008-10-17 17:05:25 +00005387 // If this is an indirect operand, the operand is a pointer to the
5388 // accessed type.
Bob Wilsone261b0c2009-12-22 18:34:19 +00005389 if (isIndirect) {
5390 const llvm::PointerType *PtrTy = dyn_cast<PointerType>(OpTy);
5391 if (!PtrTy)
Chris Lattner75361b62010-04-07 22:58:41 +00005392 report_fatal_error("Indirect operand for inline asm not a pointer!");
Bob Wilsone261b0c2009-12-22 18:34:19 +00005393 OpTy = PtrTy->getElementType();
5394 }
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00005395
Eric Christophercef81b72011-05-09 20:04:43 +00005396 // Look for vector wrapped in a struct. e.g. { <16 x i8> }.
5397 if (const StructType *STy = dyn_cast<StructType>(OpTy))
5398 if (STy->getNumElements() == 1)
5399 OpTy = STy->getElementType(0);
5400
Chris Lattner81249c92008-10-17 17:05:25 +00005401 // If OpTy is not a single value, it may be a struct/union that we
5402 // can tile with integers.
5403 if (!OpTy->isSingleValueType() && OpTy->isSized()) {
5404 unsigned BitSize = TD->getTypeSizeInBits(OpTy);
5405 switch (BitSize) {
5406 default: break;
5407 case 1:
5408 case 8:
5409 case 16:
5410 case 32:
5411 case 64:
Chris Lattnercfc14c12008-10-17 19:59:51 +00005412 case 128:
Owen Anderson1d0be152009-08-13 21:58:54 +00005413 OpTy = IntegerType::get(Context, BitSize);
Chris Lattner81249c92008-10-17 17:05:25 +00005414 break;
5415 }
5416 }
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00005417
Chris Lattner81249c92008-10-17 17:05:25 +00005418 return TLI.getValueType(OpTy, true);
5419 }
Michael J. Spencere70c5262010-10-16 08:25:21 +00005420
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005421private:
5422 /// MarkRegAndAliases - Mark the specified register and all aliases in the
5423 /// specified set.
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00005424 static void MarkRegAndAliases(unsigned Reg, std::set<unsigned> &Regs,
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005425 const TargetRegisterInfo &TRI) {
5426 assert(TargetRegisterInfo::isPhysicalRegister(Reg) && "Isn't a physreg");
5427 Regs.insert(Reg);
5428 if (const unsigned *Aliases = TRI.getAliasSet(Reg))
5429 for (; *Aliases; ++Aliases)
5430 Regs.insert(*Aliases);
5431 }
5432};
Dan Gohman462f6b52010-05-29 17:53:24 +00005433
John Thompson44ab89e2010-10-29 17:29:13 +00005434typedef SmallVector<SDISelAsmOperandInfo,16> SDISelAsmOperandInfoVector;
5435
Benjamin Kramer7d706ed2011-03-26 16:35:10 +00005436} // end anonymous namespace
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005437
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005438/// GetRegistersForValue - Assign registers (virtual or physical) for the
5439/// specified operand. We prefer to assign virtual registers, to allow the
Bob Wilson266d9452009-12-17 05:07:36 +00005440/// register allocator to handle the assignment process. However, if the asm
5441/// uses features that we can't model on machineinstrs, we have SDISel do the
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005442/// allocation. This produces generally horrible, but correct, code.
5443///
5444/// OpInfo describes the operand.
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005445/// Input and OutputRegs are the set of already allocated physical registers.
5446///
Benjamin Kramer7d706ed2011-03-26 16:35:10 +00005447static void GetRegistersForValue(SelectionDAG &DAG,
5448 const TargetLowering &TLI,
5449 DebugLoc DL,
5450 SDISelAsmOperandInfo &OpInfo,
5451 std::set<unsigned> &OutputRegs,
5452 std::set<unsigned> &InputRegs) {
5453 LLVMContext &Context = *DAG.getContext();
Owen Anderson23b9b192009-08-12 00:36:31 +00005454
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005455 // Compute whether this value requires an input register, an output register,
5456 // or both.
5457 bool isOutReg = false;
5458 bool isInReg = false;
5459 switch (OpInfo.Type) {
5460 case InlineAsm::isOutput:
5461 isOutReg = true;
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00005462
5463 // If there is an input constraint that matches this, we need to reserve
Dale Johannesen8e3455b2008-09-24 23:13:09 +00005464 // the input register so no other inputs allocate to it.
Chris Lattner6bdcda32008-10-17 16:47:46 +00005465 isInReg = OpInfo.hasMatchingInput();
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005466 break;
5467 case InlineAsm::isInput:
5468 isInReg = true;
5469 isOutReg = false;
5470 break;
5471 case InlineAsm::isClobber:
5472 isOutReg = true;
5473 isInReg = true;
5474 break;
5475 }
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00005476
5477
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005478 MachineFunction &MF = DAG.getMachineFunction();
5479 SmallVector<unsigned, 4> Regs;
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00005480
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005481 // If this is a constraint for a single physreg, or a constraint for a
5482 // register class, find it.
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00005483 std::pair<unsigned, const TargetRegisterClass*> PhysReg =
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005484 TLI.getRegForInlineAsmConstraint(OpInfo.ConstraintCode,
5485 OpInfo.ConstraintVT);
5486
5487 unsigned NumRegs = 1;
Owen Anderson825b72b2009-08-11 20:47:22 +00005488 if (OpInfo.ConstraintVT != MVT::Other) {
Chris Lattner01426e12008-10-21 00:45:36 +00005489 // If this is a FP input in an integer register (or visa versa) insert a bit
5490 // cast of the input value. More generally, handle any case where the input
5491 // value disagrees with the register class we plan to stick this in.
5492 if (OpInfo.Type == InlineAsm::isInput &&
5493 PhysReg.second && !PhysReg.second->hasType(OpInfo.ConstraintVT)) {
Owen Andersone50ed302009-08-10 22:56:29 +00005494 // Try to convert to the first EVT that the reg class contains. If the
Chris Lattner01426e12008-10-21 00:45:36 +00005495 // types are identical size, use a bitcast to convert (e.g. two differing
5496 // vector types).
Owen Andersone50ed302009-08-10 22:56:29 +00005497 EVT RegVT = *PhysReg.second->vt_begin();
Chris Lattner01426e12008-10-21 00:45:36 +00005498 if (RegVT.getSizeInBits() == OpInfo.ConstraintVT.getSizeInBits()) {
Benjamin Kramer7d706ed2011-03-26 16:35:10 +00005499 OpInfo.CallOperand = DAG.getNode(ISD::BITCAST, DL,
Dale Johannesenfa42dea2009-01-30 01:34:22 +00005500 RegVT, OpInfo.CallOperand);
Chris Lattner01426e12008-10-21 00:45:36 +00005501 OpInfo.ConstraintVT = RegVT;
5502 } else if (RegVT.isInteger() && OpInfo.ConstraintVT.isFloatingPoint()) {
5503 // If the input is a FP value and we want it in FP registers, do a
5504 // bitcast to the corresponding integer type. This turns an f64 value
5505 // into i64, which can be passed with two i32 values on a 32-bit
5506 // machine.
Mikhail Glushenkovb3c01992010-01-01 04:41:22 +00005507 RegVT = EVT::getIntegerVT(Context,
Owen Anderson23b9b192009-08-12 00:36:31 +00005508 OpInfo.ConstraintVT.getSizeInBits());
Benjamin Kramer7d706ed2011-03-26 16:35:10 +00005509 OpInfo.CallOperand = DAG.getNode(ISD::BITCAST, DL,
Dale Johannesenfa42dea2009-01-30 01:34:22 +00005510 RegVT, OpInfo.CallOperand);
Chris Lattner01426e12008-10-21 00:45:36 +00005511 OpInfo.ConstraintVT = RegVT;
5512 }
5513 }
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00005514
Owen Anderson23b9b192009-08-12 00:36:31 +00005515 NumRegs = TLI.getNumRegisters(Context, OpInfo.ConstraintVT);
Chris Lattner01426e12008-10-21 00:45:36 +00005516 }
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00005517
Owen Andersone50ed302009-08-10 22:56:29 +00005518 EVT RegVT;
5519 EVT ValueVT = OpInfo.ConstraintVT;
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005520
5521 // If this is a constraint for a specific physical register, like {r17},
5522 // assign it now.
Chris Lattnere2f7bf82009-03-24 15:27:37 +00005523 if (unsigned AssignedReg = PhysReg.first) {
5524 const TargetRegisterClass *RC = PhysReg.second;
Owen Anderson825b72b2009-08-11 20:47:22 +00005525 if (OpInfo.ConstraintVT == MVT::Other)
Chris Lattnere2f7bf82009-03-24 15:27:37 +00005526 ValueVT = *RC->vt_begin();
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00005527
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005528 // Get the actual register value type. This is important, because the user
5529 // may have asked for (e.g.) the AX register in i32 type. We need to
5530 // remember that AX is actually i16 to get the right extension.
Chris Lattnere2f7bf82009-03-24 15:27:37 +00005531 RegVT = *RC->vt_begin();
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00005532
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005533 // This is a explicit reference to a physical register.
Chris Lattnere2f7bf82009-03-24 15:27:37 +00005534 Regs.push_back(AssignedReg);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005535
5536 // If this is an expanded reference, add the rest of the regs to Regs.
5537 if (NumRegs != 1) {
Chris Lattnere2f7bf82009-03-24 15:27:37 +00005538 TargetRegisterClass::iterator I = RC->begin();
5539 for (; *I != AssignedReg; ++I)
5540 assert(I != RC->end() && "Didn't find reg!");
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00005541
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005542 // Already added the first reg.
5543 --NumRegs; ++I;
5544 for (; NumRegs; --NumRegs, ++I) {
Chris Lattnere2f7bf82009-03-24 15:27:37 +00005545 assert(I != RC->end() && "Ran out of registers to allocate!");
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005546 Regs.push_back(*I);
5547 }
5548 }
Bill Wendling651ad132009-12-22 01:25:10 +00005549
Dan Gohman7451d3e2010-05-29 17:03:36 +00005550 OpInfo.AssignedRegs = RegsForValue(Regs, RegVT, ValueVT);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005551 const TargetRegisterInfo *TRI = DAG.getTarget().getRegisterInfo();
5552 OpInfo.MarkAllocatedRegs(isOutReg, isInReg, OutputRegs, InputRegs, *TRI);
5553 return;
5554 }
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00005555
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005556 // Otherwise, if this was a reference to an LLVM register class, create vregs
5557 // for this reference.
Chris Lattnerb3b44842009-03-24 15:25:07 +00005558 if (const TargetRegisterClass *RC = PhysReg.second) {
5559 RegVT = *RC->vt_begin();
Owen Anderson825b72b2009-08-11 20:47:22 +00005560 if (OpInfo.ConstraintVT == MVT::Other)
Evan Chengfb112882009-03-23 08:01:15 +00005561 ValueVT = RegVT;
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005562
Evan Chengfb112882009-03-23 08:01:15 +00005563 // Create the appropriate number of virtual registers.
5564 MachineRegisterInfo &RegInfo = MF.getRegInfo();
5565 for (; NumRegs; --NumRegs)
Chris Lattnerb3b44842009-03-24 15:25:07 +00005566 Regs.push_back(RegInfo.createVirtualRegister(RC));
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00005567
Dan Gohman7451d3e2010-05-29 17:03:36 +00005568 OpInfo.AssignedRegs = RegsForValue(Regs, RegVT, ValueVT);
Evan Chengfb112882009-03-23 08:01:15 +00005569 return;
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005570 }
Mikhail Glushenkovb3c01992010-01-01 04:41:22 +00005571
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005572 // Otherwise, we couldn't allocate enough registers for this.
5573}
5574
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005575/// visitInlineAsm - Handle a call to an InlineAsm object.
5576///
Dan Gohman46510a72010-04-15 01:51:59 +00005577void SelectionDAGBuilder::visitInlineAsm(ImmutableCallSite CS) {
5578 const InlineAsm *IA = cast<InlineAsm>(CS.getCalledValue());
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005579
5580 /// ConstraintOperands - Information about all of the constraints.
John Thompson44ab89e2010-10-29 17:29:13 +00005581 SDISelAsmOperandInfoVector ConstraintOperands;
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00005582
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005583 std::set<unsigned> OutputRegs, InputRegs;
5584
Evan Chengce1cdac2011-05-06 20:52:23 +00005585 TargetLowering::AsmOperandInfoVector
5586 TargetConstraints = TLI.ParseConstraints(CS);
5587
John Thompsoneac6e1d2010-09-13 18:15:37 +00005588 bool hasMemory = false;
Michael J. Spencere70c5262010-10-16 08:25:21 +00005589
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005590 unsigned ArgNo = 0; // ArgNo - The argument of the CallInst.
5591 unsigned ResNo = 0; // ResNo - The result number of the next output.
John Thompsoneac6e1d2010-09-13 18:15:37 +00005592 for (unsigned i = 0, e = TargetConstraints.size(); i != e; ++i) {
5593 ConstraintOperands.push_back(SDISelAsmOperandInfo(TargetConstraints[i]));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005594 SDISelAsmOperandInfo &OpInfo = ConstraintOperands.back();
Michael J. Spencere70c5262010-10-16 08:25:21 +00005595
Owen Anderson825b72b2009-08-11 20:47:22 +00005596 EVT OpVT = MVT::Other;
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005597
5598 // Compute the value type for each operand.
5599 switch (OpInfo.Type) {
5600 case InlineAsm::isOutput:
5601 // Indirect outputs just consume an argument.
5602 if (OpInfo.isIndirect) {
Dan Gohman46510a72010-04-15 01:51:59 +00005603 OpInfo.CallOperandVal = const_cast<Value *>(CS.getArgument(ArgNo++));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005604 break;
5605 }
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00005606
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005607 // The return value of the call is this value. As such, there is no
5608 // corresponding argument.
Benjamin Kramerf0127052010-01-05 13:12:22 +00005609 assert(!CS.getType()->isVoidTy() &&
Owen Anderson1d0be152009-08-13 21:58:54 +00005610 "Bad inline asm!");
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005611 if (const StructType *STy = dyn_cast<StructType>(CS.getType())) {
5612 OpVT = TLI.getValueType(STy->getElementType(ResNo));
5613 } else {
5614 assert(ResNo == 0 && "Asm only has one result!");
5615 OpVT = TLI.getValueType(CS.getType());
5616 }
5617 ++ResNo;
5618 break;
5619 case InlineAsm::isInput:
Dan Gohman46510a72010-04-15 01:51:59 +00005620 OpInfo.CallOperandVal = const_cast<Value *>(CS.getArgument(ArgNo++));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005621 break;
5622 case InlineAsm::isClobber:
5623 // Nothing to do.
5624 break;
5625 }
5626
5627 // If this is an input or an indirect output, process the call argument.
5628 // BasicBlocks are labels, currently appearing only in asm's.
5629 if (OpInfo.CallOperandVal) {
Dan Gohman46510a72010-04-15 01:51:59 +00005630 if (const BasicBlock *BB = dyn_cast<BasicBlock>(OpInfo.CallOperandVal)) {
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005631 OpInfo.CallOperand = DAG.getBasicBlock(FuncInfo.MBBMap[BB]);
Chris Lattner81249c92008-10-17 17:05:25 +00005632 } else {
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005633 OpInfo.CallOperand = getValue(OpInfo.CallOperandVal);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005634 }
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00005635
Owen Anderson1d0be152009-08-13 21:58:54 +00005636 OpVT = OpInfo.getCallOperandValEVT(*DAG.getContext(), TLI, TD);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005637 }
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00005638
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005639 OpInfo.ConstraintVT = OpVT;
Michael J. Spencere70c5262010-10-16 08:25:21 +00005640
John Thompsoneac6e1d2010-09-13 18:15:37 +00005641 // Indirect operand accesses access memory.
5642 if (OpInfo.isIndirect)
5643 hasMemory = true;
5644 else {
5645 for (unsigned j = 0, ee = OpInfo.Codes.size(); j != ee; ++j) {
Evan Chengce1cdac2011-05-06 20:52:23 +00005646 TargetLowering::ConstraintType
5647 CType = TLI.getConstraintType(OpInfo.Codes[j]);
John Thompsoneac6e1d2010-09-13 18:15:37 +00005648 if (CType == TargetLowering::C_Memory) {
5649 hasMemory = true;
5650 break;
5651 }
5652 }
5653 }
Chris Lattner2a0b96c2008-10-18 18:49:30 +00005654 }
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00005655
John Thompsoneac6e1d2010-09-13 18:15:37 +00005656 SDValue Chain, Flag;
5657
5658 // We won't need to flush pending loads if this asm doesn't touch
5659 // memory and is nonvolatile.
5660 if (hasMemory || IA->hasSideEffects())
5661 Chain = getRoot();
5662 else
5663 Chain = DAG.getRoot();
5664
Chris Lattner2a0b96c2008-10-18 18:49:30 +00005665 // Second pass over the constraints: compute which constraint option to use
5666 // and assign registers to constraints that want a specific physreg.
John Thompsoneac6e1d2010-09-13 18:15:37 +00005667 for (unsigned i = 0, e = ConstraintOperands.size(); i != e; ++i) {
Chris Lattner2a0b96c2008-10-18 18:49:30 +00005668 SDISelAsmOperandInfo &OpInfo = ConstraintOperands[i];
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00005669
John Thompson54584742010-09-24 22:24:05 +00005670 // If this is an output operand with a matching input operand, look up the
5671 // matching input. If their types mismatch, e.g. one is an integer, the
5672 // other is floating point, or their sizes are different, flag it as an
5673 // error.
5674 if (OpInfo.hasMatchingInput()) {
5675 SDISelAsmOperandInfo &Input = ConstraintOperands[OpInfo.MatchingInput];
Michael J. Spencere70c5262010-10-16 08:25:21 +00005676
John Thompson54584742010-09-24 22:24:05 +00005677 if (OpInfo.ConstraintVT != Input.ConstraintVT) {
5678 if ((OpInfo.ConstraintVT.isInteger() !=
5679 Input.ConstraintVT.isInteger()) ||
5680 (OpInfo.ConstraintVT.getSizeInBits() !=
5681 Input.ConstraintVT.getSizeInBits())) {
5682 report_fatal_error("Unsupported asm: input constraint"
5683 " with a matching output constraint of"
5684 " incompatible type!");
5685 }
5686 Input.ConstraintVT = OpInfo.ConstraintVT;
5687 }
5688 }
5689
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005690 // Compute the constraint code and ConstraintType to use.
Dale Johannesen1784d162010-06-25 21:55:36 +00005691 TLI.ComputeConstraintToUse(OpInfo, OpInfo.CallOperand, &DAG);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005692
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005693 // If this is a memory input, and if the operand is not indirect, do what we
5694 // need to to provide an address for the memory input.
5695 if (OpInfo.ConstraintType == TargetLowering::C_Memory &&
5696 !OpInfo.isIndirect) {
Evan Chengce1cdac2011-05-06 20:52:23 +00005697 assert((OpInfo.isMultipleAlternative ||
5698 (OpInfo.Type == InlineAsm::isInput)) &&
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005699 "Can only indirectify direct input operands!");
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00005700
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005701 // Memory operands really want the address of the value. If we don't have
5702 // an indirect input, put it in the constpool if we can, otherwise spill
5703 // it to a stack slot.
Eric Christophere0b42c02011-06-03 17:21:23 +00005704 // TODO: This isn't quite right. We need to handle these according to
5705 // the addressing mode that the constraint wants. Also, this may take
5706 // an additional register for the computation and we don't want that
5707 // either.
Eric Christopher471e4222011-06-08 23:55:35 +00005708
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005709 // If the operand is a float, integer, or vector constant, spill to a
5710 // constant pool entry to get its address.
Dan Gohman46510a72010-04-15 01:51:59 +00005711 const Value *OpVal = OpInfo.CallOperandVal;
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005712 if (isa<ConstantFP>(OpVal) || isa<ConstantInt>(OpVal) ||
5713 isa<ConstantVector>(OpVal)) {
5714 OpInfo.CallOperand = DAG.getConstantPool(cast<Constant>(OpVal),
5715 TLI.getPointerTy());
5716 } else {
5717 // Otherwise, create a stack slot and emit a store to it before the
5718 // asm.
5719 const Type *Ty = OpVal->getType();
Duncan Sands777d2302009-05-09 07:06:46 +00005720 uint64_t TySize = TLI.getTargetData()->getTypeAllocSize(Ty);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005721 unsigned Align = TLI.getTargetData()->getPrefTypeAlignment(Ty);
5722 MachineFunction &MF = DAG.getMachineFunction();
David Greene3f2bf852009-11-12 20:49:22 +00005723 int SSFI = MF.getFrameInfo()->CreateStackObject(TySize, Align, false);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005724 SDValue StackSlot = DAG.getFrameIndex(SSFI, TLI.getPointerTy());
Dale Johannesen66978ee2009-01-31 02:22:37 +00005725 Chain = DAG.getStore(Chain, getCurDebugLoc(),
Chris Lattnerecf42c42010-09-21 16:36:31 +00005726 OpInfo.CallOperand, StackSlot,
5727 MachinePointerInfo::getFixedStack(SSFI),
David Greene1e559442010-02-15 17:00:31 +00005728 false, false, 0);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005729 OpInfo.CallOperand = StackSlot;
5730 }
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00005731
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005732 // There is no longer a Value* corresponding to this operand.
5733 OpInfo.CallOperandVal = 0;
Bill Wendling651ad132009-12-22 01:25:10 +00005734
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005735 // It is now an indirect operand.
5736 OpInfo.isIndirect = true;
5737 }
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00005738
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005739 // If this constraint is for a specific register, allocate it before
5740 // anything else.
5741 if (OpInfo.ConstraintType == TargetLowering::C_Register)
Benjamin Kramer7d706ed2011-03-26 16:35:10 +00005742 GetRegistersForValue(DAG, TLI, getCurDebugLoc(), OpInfo, OutputRegs,
5743 InputRegs);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005744 }
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00005745
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005746 // Second pass - Loop over all of the operands, assigning virtual or physregs
Chris Lattner58f15c42008-10-17 16:21:11 +00005747 // to register class operands.
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005748 for (unsigned i = 0, e = ConstraintOperands.size(); i != e; ++i) {
5749 SDISelAsmOperandInfo &OpInfo = ConstraintOperands[i];
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00005750
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005751 // C_Register operands have already been allocated, Other/Memory don't need
5752 // to be.
5753 if (OpInfo.ConstraintType == TargetLowering::C_RegisterClass)
Benjamin Kramer7d706ed2011-03-26 16:35:10 +00005754 GetRegistersForValue(DAG, TLI, getCurDebugLoc(), OpInfo, OutputRegs,
5755 InputRegs);
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00005756 }
5757
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005758 // AsmNodeOperands - The operands for the ISD::INLINEASM node.
5759 std::vector<SDValue> AsmNodeOperands;
5760 AsmNodeOperands.push_back(SDValue()); // reserve space for input chain
5761 AsmNodeOperands.push_back(
Dan Gohmanf2d7fb32010-01-04 21:00:54 +00005762 DAG.getTargetExternalSymbol(IA->getAsmString().c_str(),
5763 TLI.getPointerTy()));
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00005764
Chris Lattnerdecc2672010-04-07 05:20:54 +00005765 // If we have a !srcloc metadata node associated with it, we want to attach
5766 // this to the ultimately generated inline asm machineinstr. To do this, we
5767 // pass in the third operand as this (potentially null) inline asm MDNode.
5768 const MDNode *SrcLoc = CS.getInstruction()->getMetadata("srcloc");
5769 AsmNodeOperands.push_back(DAG.getMDNode(SrcLoc));
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00005770
Evan Chengc36b7062011-01-07 23:50:32 +00005771 // Remember the HasSideEffect and AlignStack bits as operand 3.
5772 unsigned ExtraInfo = 0;
5773 if (IA->hasSideEffects())
5774 ExtraInfo |= InlineAsm::Extra_HasSideEffects;
5775 if (IA->isAlignStack())
5776 ExtraInfo |= InlineAsm::Extra_IsAlignStack;
5777 AsmNodeOperands.push_back(DAG.getTargetConstant(ExtraInfo,
5778 TLI.getPointerTy()));
Dale Johannesenf1e309e2010-07-02 20:16:09 +00005779
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005780 // Loop over all of the inputs, copying the operand values into the
5781 // appropriate registers and processing the output regs.
5782 RegsForValue RetValRegs;
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00005783
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005784 // IndirectStoresToEmit - The set of stores to emit after the inline asm node.
5785 std::vector<std::pair<RegsForValue, Value*> > IndirectStoresToEmit;
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00005786
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005787 for (unsigned i = 0, e = ConstraintOperands.size(); i != e; ++i) {
5788 SDISelAsmOperandInfo &OpInfo = ConstraintOperands[i];
5789
5790 switch (OpInfo.Type) {
5791 case InlineAsm::isOutput: {
5792 if (OpInfo.ConstraintType != TargetLowering::C_RegisterClass &&
5793 OpInfo.ConstraintType != TargetLowering::C_Register) {
5794 // Memory output, or 'other' output (e.g. 'X' constraint).
5795 assert(OpInfo.isIndirect && "Memory output must be indirect operand");
5796
5797 // Add information to the INLINEASM node to know about this output.
Chris Lattnerdecc2672010-04-07 05:20:54 +00005798 unsigned OpFlags = InlineAsm::getFlagWord(InlineAsm::Kind_Mem, 1);
5799 AsmNodeOperands.push_back(DAG.getTargetConstant(OpFlags,
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005800 TLI.getPointerTy()));
5801 AsmNodeOperands.push_back(OpInfo.CallOperand);
5802 break;
5803 }
5804
5805 // Otherwise, this is a register or register class output.
5806
5807 // Copy the output from the appropriate register. Find a register that
5808 // we can use.
Chris Lattnerdecc2672010-04-07 05:20:54 +00005809 if (OpInfo.AssignedRegs.Regs.empty())
Benjamin Kramer1bd73352010-04-08 10:44:28 +00005810 report_fatal_error("Couldn't allocate output reg for constraint '" +
5811 Twine(OpInfo.ConstraintCode) + "'!");
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005812
5813 // If this is an indirect operand, store through the pointer after the
5814 // asm.
5815 if (OpInfo.isIndirect) {
5816 IndirectStoresToEmit.push_back(std::make_pair(OpInfo.AssignedRegs,
5817 OpInfo.CallOperandVal));
5818 } else {
5819 // This is the result value of the call.
Benjamin Kramerf0127052010-01-05 13:12:22 +00005820 assert(!CS.getType()->isVoidTy() && "Bad inline asm!");
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005821 // Concatenate this output onto the outputs list.
5822 RetValRegs.append(OpInfo.AssignedRegs);
5823 }
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00005824
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005825 // Add information to the INLINEASM node to know that this register is
5826 // set.
Dale Johannesen913d3df2008-09-12 17:49:03 +00005827 OpInfo.AssignedRegs.AddInlineAsmOperands(OpInfo.isEarlyClobber ?
Chris Lattnerdecc2672010-04-07 05:20:54 +00005828 InlineAsm::Kind_RegDefEarlyClobber :
5829 InlineAsm::Kind_RegDef,
Evan Chengfb112882009-03-23 08:01:15 +00005830 false,
5831 0,
Bill Wendling46ada192010-03-02 01:55:18 +00005832 DAG,
Bill Wendling651ad132009-12-22 01:25:10 +00005833 AsmNodeOperands);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005834 break;
5835 }
5836 case InlineAsm::isInput: {
5837 SDValue InOperandVal = OpInfo.CallOperand;
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00005838
Chris Lattner6bdcda32008-10-17 16:47:46 +00005839 if (OpInfo.isMatchingInputConstraint()) { // Matching constraint?
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005840 // If this is required to match an output register we have already set,
5841 // just use its register.
Chris Lattner58f15c42008-10-17 16:21:11 +00005842 unsigned OperandNo = OpInfo.getMatchedOperand();
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00005843
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005844 // Scan until we find the definition we already emitted of this operand.
5845 // When we find it, create a RegsForValue operand.
Chris Lattnerdecc2672010-04-07 05:20:54 +00005846 unsigned CurOp = InlineAsm::Op_FirstOperand;
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005847 for (; OperandNo; --OperandNo) {
5848 // Advance to the next operand.
Evan Cheng697cbbf2009-03-20 18:03:34 +00005849 unsigned OpFlag =
Dan Gohmanf5aeb1a2008-09-12 16:56:44 +00005850 cast<ConstantSDNode>(AsmNodeOperands[CurOp])->getZExtValue();
Chris Lattnerdecc2672010-04-07 05:20:54 +00005851 assert((InlineAsm::isRegDefKind(OpFlag) ||
5852 InlineAsm::isRegDefEarlyClobberKind(OpFlag) ||
5853 InlineAsm::isMemKind(OpFlag)) && "Skipped past definitions?");
Evan Cheng697cbbf2009-03-20 18:03:34 +00005854 CurOp += InlineAsm::getNumOperandRegisters(OpFlag)+1;
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005855 }
5856
Evan Cheng697cbbf2009-03-20 18:03:34 +00005857 unsigned OpFlag =
Dan Gohmanf5aeb1a2008-09-12 16:56:44 +00005858 cast<ConstantSDNode>(AsmNodeOperands[CurOp])->getZExtValue();
Chris Lattnerdecc2672010-04-07 05:20:54 +00005859 if (InlineAsm::isRegDefKind(OpFlag) ||
5860 InlineAsm::isRegDefEarlyClobberKind(OpFlag)) {
Evan Cheng697cbbf2009-03-20 18:03:34 +00005861 // Add (OpFlag&0xffff)>>3 registers to MatchedRegs.
Chris Lattner6129c372010-04-08 00:09:16 +00005862 if (OpInfo.isIndirect) {
5863 // This happens on gcc/testsuite/gcc.dg/pr8788-1.c
Dan Gohman99be8ae2010-04-19 22:41:47 +00005864 LLVMContext &Ctx = *DAG.getContext();
Chris Lattner6129c372010-04-08 00:09:16 +00005865 Ctx.emitError(CS.getInstruction(), "inline asm not supported yet:"
5866 " don't know how to handle tied "
5867 "indirect register inputs");
5868 }
Michael J. Spencere70c5262010-10-16 08:25:21 +00005869
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005870 RegsForValue MatchedRegs;
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005871 MatchedRegs.ValueVTs.push_back(InOperandVal.getValueType());
Owen Andersone50ed302009-08-10 22:56:29 +00005872 EVT RegVT = AsmNodeOperands[CurOp+1].getValueType();
Evan Chengfb112882009-03-23 08:01:15 +00005873 MatchedRegs.RegVTs.push_back(RegVT);
5874 MachineRegisterInfo &RegInfo = DAG.getMachineFunction().getRegInfo();
Evan Cheng697cbbf2009-03-20 18:03:34 +00005875 for (unsigned i = 0, e = InlineAsm::getNumOperandRegisters(OpFlag);
Evan Chengfb112882009-03-23 08:01:15 +00005876 i != e; ++i)
Mikhail Glushenkovb3c01992010-01-01 04:41:22 +00005877 MatchedRegs.Regs.push_back
5878 (RegInfo.createVirtualRegister(TLI.getRegClassFor(RegVT)));
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00005879
5880 // Use the produced MatchedRegs object to
Dale Johannesen66978ee2009-01-31 02:22:37 +00005881 MatchedRegs.getCopyToRegs(InOperandVal, DAG, getCurDebugLoc(),
Bill Wendling46ada192010-03-02 01:55:18 +00005882 Chain, &Flag);
Chris Lattnerdecc2672010-04-07 05:20:54 +00005883 MatchedRegs.AddInlineAsmOperands(InlineAsm::Kind_RegUse,
Evan Chengfb112882009-03-23 08:01:15 +00005884 true, OpInfo.getMatchedOperand(),
Bill Wendling46ada192010-03-02 01:55:18 +00005885 DAG, AsmNodeOperands);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005886 break;
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005887 }
Michael J. Spencere70c5262010-10-16 08:25:21 +00005888
Chris Lattnerdecc2672010-04-07 05:20:54 +00005889 assert(InlineAsm::isMemKind(OpFlag) && "Unknown matching constraint!");
5890 assert(InlineAsm::getNumOperandRegisters(OpFlag) == 1 &&
5891 "Unexpected number of operands");
5892 // Add information to the INLINEASM node to know about this input.
5893 // See InlineAsm.h isUseOperandTiedToDef.
5894 OpFlag = InlineAsm::getFlagWordForMatchingOp(OpFlag,
5895 OpInfo.getMatchedOperand());
5896 AsmNodeOperands.push_back(DAG.getTargetConstant(OpFlag,
5897 TLI.getPointerTy()));
5898 AsmNodeOperands.push_back(AsmNodeOperands[CurOp+1]);
5899 break;
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005900 }
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00005901
Dale Johannesenb5611a62010-07-13 20:17:05 +00005902 // Treat indirect 'X' constraint as memory.
Michael J. Spencere70c5262010-10-16 08:25:21 +00005903 if (OpInfo.ConstraintType == TargetLowering::C_Other &&
5904 OpInfo.isIndirect)
Dale Johannesenb5611a62010-07-13 20:17:05 +00005905 OpInfo.ConstraintType = TargetLowering::C_Memory;
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00005906
Dale Johannesenb5611a62010-07-13 20:17:05 +00005907 if (OpInfo.ConstraintType == TargetLowering::C_Other) {
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005908 std::vector<SDValue> Ops;
Eric Christopher100c8332011-06-02 23:16:42 +00005909 TLI.LowerAsmOperandForConstraint(InOperandVal, OpInfo.ConstraintCode,
Dale Johannesen1784d162010-06-25 21:55:36 +00005910 Ops, DAG);
Chris Lattner87d677c2010-04-07 23:50:38 +00005911 if (Ops.empty())
Benjamin Kramer1bd73352010-04-08 10:44:28 +00005912 report_fatal_error("Invalid operand for inline asm constraint '" +
5913 Twine(OpInfo.ConstraintCode) + "'!");
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00005914
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005915 // Add information to the INLINEASM node to know about this input.
Chris Lattnerdecc2672010-04-07 05:20:54 +00005916 unsigned ResOpType =
5917 InlineAsm::getFlagWord(InlineAsm::Kind_Imm, Ops.size());
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00005918 AsmNodeOperands.push_back(DAG.getTargetConstant(ResOpType,
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005919 TLI.getPointerTy()));
5920 AsmNodeOperands.insert(AsmNodeOperands.end(), Ops.begin(), Ops.end());
5921 break;
Chris Lattnerdecc2672010-04-07 05:20:54 +00005922 }
Michael J. Spencere70c5262010-10-16 08:25:21 +00005923
Chris Lattnerdecc2672010-04-07 05:20:54 +00005924 if (OpInfo.ConstraintType == TargetLowering::C_Memory) {
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005925 assert(OpInfo.isIndirect && "Operand must be indirect to be a mem!");
5926 assert(InOperandVal.getValueType() == TLI.getPointerTy() &&
5927 "Memory operands expect pointer values");
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00005928
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005929 // Add information to the INLINEASM node to know about this input.
Chris Lattnerdecc2672010-04-07 05:20:54 +00005930 unsigned ResOpType = InlineAsm::getFlagWord(InlineAsm::Kind_Mem, 1);
Dale Johannesen86b49f82008-09-24 01:07:17 +00005931 AsmNodeOperands.push_back(DAG.getTargetConstant(ResOpType,
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005932 TLI.getPointerTy()));
5933 AsmNodeOperands.push_back(InOperandVal);
5934 break;
5935 }
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00005936
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005937 assert((OpInfo.ConstraintType == TargetLowering::C_RegisterClass ||
5938 OpInfo.ConstraintType == TargetLowering::C_Register) &&
5939 "Unknown constraint type!");
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00005940 assert(!OpInfo.isIndirect &&
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005941 "Don't know how to handle indirect register inputs yet!");
5942
5943 // Copy the input into the appropriate registers.
Evan Cheng8112b532010-02-10 01:21:02 +00005944 if (OpInfo.AssignedRegs.Regs.empty() ||
Dan Gohman7451d3e2010-05-29 17:03:36 +00005945 !OpInfo.AssignedRegs.areValueTypesLegal(TLI))
Benjamin Kramer1bd73352010-04-08 10:44:28 +00005946 report_fatal_error("Couldn't allocate input reg for constraint '" +
5947 Twine(OpInfo.ConstraintCode) + "'!");
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005948
Dale Johannesen66978ee2009-01-31 02:22:37 +00005949 OpInfo.AssignedRegs.getCopyToRegs(InOperandVal, DAG, getCurDebugLoc(),
Bill Wendling46ada192010-03-02 01:55:18 +00005950 Chain, &Flag);
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00005951
Chris Lattnerdecc2672010-04-07 05:20:54 +00005952 OpInfo.AssignedRegs.AddInlineAsmOperands(InlineAsm::Kind_RegUse, false, 0,
Bill Wendling46ada192010-03-02 01:55:18 +00005953 DAG, AsmNodeOperands);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005954 break;
5955 }
5956 case InlineAsm::isClobber: {
5957 // Add the clobbered value to the operand list, so that the register
5958 // allocator is aware that the physreg got clobbered.
5959 if (!OpInfo.AssignedRegs.Regs.empty())
Jakob Stoklund Olesenf792fa92011-06-27 04:08:33 +00005960 OpInfo.AssignedRegs.AddInlineAsmOperands(InlineAsm::Kind_Clobber,
Bill Wendling46ada192010-03-02 01:55:18 +00005961 false, 0, DAG,
Bill Wendling651ad132009-12-22 01:25:10 +00005962 AsmNodeOperands);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005963 break;
5964 }
5965 }
5966 }
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00005967
Chris Lattnerdecc2672010-04-07 05:20:54 +00005968 // Finish up input operands. Set the input chain and add the flag last.
Dale Johannesenf1e309e2010-07-02 20:16:09 +00005969 AsmNodeOperands[InlineAsm::Op_InputChain] = Chain;
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005970 if (Flag.getNode()) AsmNodeOperands.push_back(Flag);
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00005971
Dale Johannesen66978ee2009-01-31 02:22:37 +00005972 Chain = DAG.getNode(ISD::INLINEASM, getCurDebugLoc(),
Chris Lattnerf1b4eaf2010-12-21 02:38:05 +00005973 DAG.getVTList(MVT::Other, MVT::Glue),
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005974 &AsmNodeOperands[0], AsmNodeOperands.size());
5975 Flag = Chain.getValue(1);
5976
5977 // If this asm returns a register value, copy the result from that register
5978 // and set it as the value of the call.
5979 if (!RetValRegs.Regs.empty()) {
Dan Gohman7451d3e2010-05-29 17:03:36 +00005980 SDValue Val = RetValRegs.getCopyFromRegs(DAG, FuncInfo, getCurDebugLoc(),
Bill Wendling46ada192010-03-02 01:55:18 +00005981 Chain, &Flag);
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00005982
Chris Lattner2a0b96c2008-10-18 18:49:30 +00005983 // FIXME: Why don't we do this for inline asms with MRVs?
5984 if (CS.getType()->isSingleValueType() && CS.getType()->isSized()) {
Owen Andersone50ed302009-08-10 22:56:29 +00005985 EVT ResultType = TLI.getValueType(CS.getType());
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00005986
Chris Lattner2a0b96c2008-10-18 18:49:30 +00005987 // If any of the results of the inline asm is a vector, it may have the
5988 // wrong width/num elts. This can happen for register classes that can
5989 // contain multiple different value types. The preg or vreg allocated may
5990 // not have the same VT as was expected. Convert it to the right type
5991 // with bit_convert.
5992 if (ResultType != Val.getValueType() && Val.getValueType().isVector()) {
Wesley Peckbf17cfa2010-11-23 03:31:01 +00005993 Val = DAG.getNode(ISD::BITCAST, getCurDebugLoc(),
Dale Johannesenfa42dea2009-01-30 01:34:22 +00005994 ResultType, Val);
Dan Gohman95915732008-10-18 01:03:45 +00005995
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00005996 } else if (ResultType != Val.getValueType() &&
Chris Lattner2a0b96c2008-10-18 18:49:30 +00005997 ResultType.isInteger() && Val.getValueType().isInteger()) {
5998 // If a result value was tied to an input value, the computed result may
5999 // have a wider width than the expected result. Extract the relevant
6000 // portion.
Dale Johannesen66978ee2009-01-31 02:22:37 +00006001 Val = DAG.getNode(ISD::TRUNCATE, getCurDebugLoc(), ResultType, Val);
Dan Gohman95915732008-10-18 01:03:45 +00006002 }
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00006003
Chris Lattner2a0b96c2008-10-18 18:49:30 +00006004 assert(ResultType == Val.getValueType() && "Asm result value mismatch!");
Chris Lattner0c526442008-10-17 17:52:49 +00006005 }
Dan Gohman95915732008-10-18 01:03:45 +00006006
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00006007 setValue(CS.getInstruction(), Val);
Dale Johannesenec65a7d2009-04-14 00:56:56 +00006008 // Don't need to use this as a chain in this case.
6009 if (!IA->hasSideEffects() && !hasMemory && IndirectStoresToEmit.empty())
6010 return;
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00006011 }
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00006012
Dan Gohman46510a72010-04-15 01:51:59 +00006013 std::vector<std::pair<SDValue, const Value *> > StoresToEmit;
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00006014
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00006015 // Process indirect outputs, first output all of the flagged copies out of
6016 // physregs.
6017 for (unsigned i = 0, e = IndirectStoresToEmit.size(); i != e; ++i) {
6018 RegsForValue &OutRegs = IndirectStoresToEmit[i].first;
Dan Gohman46510a72010-04-15 01:51:59 +00006019 const Value *Ptr = IndirectStoresToEmit[i].second;
Dan Gohman7451d3e2010-05-29 17:03:36 +00006020 SDValue OutVal = OutRegs.getCopyFromRegs(DAG, FuncInfo, getCurDebugLoc(),
Bill Wendling46ada192010-03-02 01:55:18 +00006021 Chain, &Flag);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00006022 StoresToEmit.push_back(std::make_pair(OutVal, Ptr));
6023 }
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00006024
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00006025 // Emit the non-flagged stores from the physregs.
6026 SmallVector<SDValue, 8> OutChains;
Bill Wendling651ad132009-12-22 01:25:10 +00006027 for (unsigned i = 0, e = StoresToEmit.size(); i != e; ++i) {
6028 SDValue Val = DAG.getStore(Chain, getCurDebugLoc(),
6029 StoresToEmit[i].first,
6030 getValue(StoresToEmit[i].second),
Chris Lattner84bd98a2010-09-21 18:58:22 +00006031 MachinePointerInfo(StoresToEmit[i].second),
David Greene1e559442010-02-15 17:00:31 +00006032 false, false, 0);
Bill Wendling651ad132009-12-22 01:25:10 +00006033 OutChains.push_back(Val);
Bill Wendling651ad132009-12-22 01:25:10 +00006034 }
6035
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00006036 if (!OutChains.empty())
Owen Anderson825b72b2009-08-11 20:47:22 +00006037 Chain = DAG.getNode(ISD::TokenFactor, getCurDebugLoc(), MVT::Other,
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00006038 &OutChains[0], OutChains.size());
Bill Wendling651ad132009-12-22 01:25:10 +00006039
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00006040 DAG.setRoot(Chain);
6041}
6042
Dan Gohman46510a72010-04-15 01:51:59 +00006043void SelectionDAGBuilder::visitVAStart(const CallInst &I) {
Bill Wendlingc1d3c942009-12-23 00:44:51 +00006044 DAG.setRoot(DAG.getNode(ISD::VASTART, getCurDebugLoc(),
6045 MVT::Other, getRoot(),
Gabor Greif0635f352010-06-25 09:38:13 +00006046 getValue(I.getArgOperand(0)),
6047 DAG.getSrcValue(I.getArgOperand(0))));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00006048}
6049
Dan Gohman46510a72010-04-15 01:51:59 +00006050void SelectionDAGBuilder::visitVAArg(const VAArgInst &I) {
Rafael Espindola9d544d02010-07-12 18:11:17 +00006051 const TargetData &TD = *TLI.getTargetData();
Dale Johannesena04b7572009-02-03 23:04:43 +00006052 SDValue V = DAG.getVAArg(TLI.getValueType(I.getType()), getCurDebugLoc(),
6053 getRoot(), getValue(I.getOperand(0)),
Rafael Espindolacbeeae22010-07-11 04:01:49 +00006054 DAG.getSrcValue(I.getOperand(0)),
Rafael Espindola9d544d02010-07-12 18:11:17 +00006055 TD.getABITypeAlignment(I.getType()));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00006056 setValue(&I, V);
6057 DAG.setRoot(V.getValue(1));
6058}
6059
Dan Gohman46510a72010-04-15 01:51:59 +00006060void SelectionDAGBuilder::visitVAEnd(const CallInst &I) {
Bill Wendlingc1d3c942009-12-23 00:44:51 +00006061 DAG.setRoot(DAG.getNode(ISD::VAEND, getCurDebugLoc(),
6062 MVT::Other, getRoot(),
Gabor Greif0635f352010-06-25 09:38:13 +00006063 getValue(I.getArgOperand(0)),
6064 DAG.getSrcValue(I.getArgOperand(0))));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00006065}
6066
Dan Gohman46510a72010-04-15 01:51:59 +00006067void SelectionDAGBuilder::visitVACopy(const CallInst &I) {
Bill Wendlingc1d3c942009-12-23 00:44:51 +00006068 DAG.setRoot(DAG.getNode(ISD::VACOPY, getCurDebugLoc(),
6069 MVT::Other, getRoot(),
Gabor Greif0635f352010-06-25 09:38:13 +00006070 getValue(I.getArgOperand(0)),
6071 getValue(I.getArgOperand(1)),
6072 DAG.getSrcValue(I.getArgOperand(0)),
6073 DAG.getSrcValue(I.getArgOperand(1))));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00006074}
6075
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00006076/// TargetLowering::LowerCallTo - This is the default LowerCallTo
Dan Gohman98ca4f22009-08-05 01:29:28 +00006077/// implementation, which just calls LowerCall.
6078/// FIXME: When all targets are
6079/// migrated to using LowerCall, this hook should be integrated into SDISel.
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00006080std::pair<SDValue, SDValue>
6081TargetLowering::LowerCallTo(SDValue Chain, const Type *RetTy,
6082 bool RetSExt, bool RetZExt, bool isVarArg,
Tilmann Scheller6b61cd12009-07-03 06:44:53 +00006083 bool isInreg, unsigned NumFixedArgs,
Sandeep Patel65c3c8f2009-09-02 08:44:58 +00006084 CallingConv::ID CallConv, bool isTailCall,
Dan Gohman98ca4f22009-08-05 01:29:28 +00006085 bool isReturnValueUsed,
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00006086 SDValue Callee,
Dan Gohmand858e902010-04-17 15:26:15 +00006087 ArgListTy &Args, SelectionDAG &DAG,
6088 DebugLoc dl) const {
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00006089 // Handle all of the outgoing arguments.
Dan Gohman98ca4f22009-08-05 01:29:28 +00006090 SmallVector<ISD::OutputArg, 32> Outs;
Dan Gohmanc9403652010-07-07 15:54:55 +00006091 SmallVector<SDValue, 32> OutVals;
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00006092 for (unsigned i = 0, e = Args.size(); i != e; ++i) {
Owen Andersone50ed302009-08-10 22:56:29 +00006093 SmallVector<EVT, 4> ValueVTs;
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00006094 ComputeValueVTs(*this, Args[i].Ty, ValueVTs);
6095 for (unsigned Value = 0, NumValues = ValueVTs.size();
6096 Value != NumValues; ++Value) {
Owen Andersone50ed302009-08-10 22:56:29 +00006097 EVT VT = ValueVTs[Value];
Owen Anderson23b9b192009-08-12 00:36:31 +00006098 const Type *ArgTy = VT.getTypeForEVT(RetTy->getContext());
Chris Lattner2a0b96c2008-10-18 18:49:30 +00006099 SDValue Op = SDValue(Args[i].Node.getNode(),
6100 Args[i].Node.getResNo() + Value);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00006101 ISD::ArgFlagsTy Flags;
6102 unsigned OriginalAlignment =
6103 getTargetData()->getABITypeAlignment(ArgTy);
6104
6105 if (Args[i].isZExt)
6106 Flags.setZExt();
6107 if (Args[i].isSExt)
6108 Flags.setSExt();
6109 if (Args[i].isInReg)
6110 Flags.setInReg();
6111 if (Args[i].isSRet)
6112 Flags.setSRet();
6113 if (Args[i].isByVal) {
6114 Flags.setByVal();
6115 const PointerType *Ty = cast<PointerType>(Args[i].Ty);
6116 const Type *ElementTy = Ty->getElementType();
Chris Lattner9db20f32011-05-22 23:23:02 +00006117 Flags.setByValSize(getTargetData()->getTypeAllocSize(ElementTy));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00006118 // For ByVal, alignment should come from FE. BE will guess if this
6119 // info is not there but there are cases it cannot get right.
Chris Lattner9db20f32011-05-22 23:23:02 +00006120 unsigned FrameAlign;
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00006121 if (Args[i].Alignment)
6122 FrameAlign = Args[i].Alignment;
Chris Lattner9db20f32011-05-22 23:23:02 +00006123 else
6124 FrameAlign = getByValTypeAlignment(ElementTy);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00006125 Flags.setByValAlign(FrameAlign);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00006126 }
6127 if (Args[i].isNest)
6128 Flags.setNest();
6129 Flags.setOrigAlign(OriginalAlignment);
6130
Owen Anderson23b9b192009-08-12 00:36:31 +00006131 EVT PartVT = getRegisterType(RetTy->getContext(), VT);
6132 unsigned NumParts = getNumRegisters(RetTy->getContext(), VT);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00006133 SmallVector<SDValue, 4> Parts(NumParts);
6134 ISD::NodeType ExtendKind = ISD::ANY_EXTEND;
6135
6136 if (Args[i].isSExt)
6137 ExtendKind = ISD::SIGN_EXTEND;
6138 else if (Args[i].isZExt)
6139 ExtendKind = ISD::ZERO_EXTEND;
6140
Bill Wendling46ada192010-03-02 01:55:18 +00006141 getCopyToParts(DAG, dl, Op, &Parts[0], NumParts,
Bill Wendling3ea3c242009-12-22 02:10:19 +00006142 PartVT, ExtendKind);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00006143
Dan Gohman98ca4f22009-08-05 01:29:28 +00006144 for (unsigned j = 0; j != NumParts; ++j) {
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00006145 // if it isn't first piece, alignment must be 1
Dan Gohmanc9403652010-07-07 15:54:55 +00006146 ISD::OutputArg MyFlags(Flags, Parts[j].getValueType(),
6147 i < NumFixedArgs);
Dan Gohman98ca4f22009-08-05 01:29:28 +00006148 if (NumParts > 1 && j == 0)
6149 MyFlags.Flags.setSplit();
6150 else if (j != 0)
6151 MyFlags.Flags.setOrigAlign(1);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00006152
Dan Gohman98ca4f22009-08-05 01:29:28 +00006153 Outs.push_back(MyFlags);
Dan Gohmanc9403652010-07-07 15:54:55 +00006154 OutVals.push_back(Parts[j]);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00006155 }
6156 }
6157 }
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00006158
Dan Gohman98ca4f22009-08-05 01:29:28 +00006159 // Handle the incoming return values from the call.
6160 SmallVector<ISD::InputArg, 32> Ins;
Owen Andersone50ed302009-08-10 22:56:29 +00006161 SmallVector<EVT, 4> RetTys;
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00006162 ComputeValueVTs(*this, RetTy, RetTys);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00006163 for (unsigned I = 0, E = RetTys.size(); I != E; ++I) {
Owen Andersone50ed302009-08-10 22:56:29 +00006164 EVT VT = RetTys[I];
Owen Anderson23b9b192009-08-12 00:36:31 +00006165 EVT RegisterVT = getRegisterType(RetTy->getContext(), VT);
6166 unsigned NumRegs = getNumRegisters(RetTy->getContext(), VT);
Dan Gohman98ca4f22009-08-05 01:29:28 +00006167 for (unsigned i = 0; i != NumRegs; ++i) {
6168 ISD::InputArg MyFlags;
Duncan Sands1440e8b2010-11-03 11:35:31 +00006169 MyFlags.VT = RegisterVT.getSimpleVT();
Dan Gohman98ca4f22009-08-05 01:29:28 +00006170 MyFlags.Used = isReturnValueUsed;
6171 if (RetSExt)
6172 MyFlags.Flags.setSExt();
6173 if (RetZExt)
6174 MyFlags.Flags.setZExt();
6175 if (isInreg)
6176 MyFlags.Flags.setInReg();
6177 Ins.push_back(MyFlags);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00006178 }
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00006179 }
6180
Dan Gohman98ca4f22009-08-05 01:29:28 +00006181 SmallVector<SDValue, 4> InVals;
Evan Cheng022d9e12010-02-02 23:55:14 +00006182 Chain = LowerCall(Chain, Callee, CallConv, isVarArg, isTailCall,
Dan Gohmanc9403652010-07-07 15:54:55 +00006183 Outs, OutVals, Ins, dl, DAG, InVals);
Dan Gohman5e866062009-08-06 15:37:27 +00006184
6185 // Verify that the target's LowerCall behaved as expected.
Owen Anderson825b72b2009-08-11 20:47:22 +00006186 assert(Chain.getNode() && Chain.getValueType() == MVT::Other &&
Dan Gohman5e866062009-08-06 15:37:27 +00006187 "LowerCall didn't return a valid chain!");
6188 assert((!isTailCall || InVals.empty()) &&
6189 "LowerCall emitted a return value for a tail call!");
6190 assert((isTailCall || InVals.size() == Ins.size()) &&
6191 "LowerCall didn't emit the correct number of values!");
Dan Gohman98ca4f22009-08-05 01:29:28 +00006192
6193 // For a tail call, the return value is merely live-out and there aren't
6194 // any nodes in the DAG representing it. Return a special value to
6195 // indicate that a tail call has been emitted and no more Instructions
6196 // should be processed in the current block.
6197 if (isTailCall) {
6198 DAG.setRoot(Chain);
6199 return std::make_pair(SDValue(), SDValue());
6200 }
6201
Evan Chengaf1871f2010-03-11 19:38:18 +00006202 DEBUG(for (unsigned i = 0, e = Ins.size(); i != e; ++i) {
6203 assert(InVals[i].getNode() &&
6204 "LowerCall emitted a null value!");
Duncan Sands1440e8b2010-11-03 11:35:31 +00006205 assert(EVT(Ins[i].VT) == InVals[i].getValueType() &&
Evan Chengaf1871f2010-03-11 19:38:18 +00006206 "LowerCall emitted a value with the wrong type!");
6207 });
6208
Dan Gohman98ca4f22009-08-05 01:29:28 +00006209 // Collect the legal value parts into potentially illegal values
6210 // that correspond to the original function's return values.
6211 ISD::NodeType AssertOp = ISD::DELETED_NODE;
6212 if (RetSExt)
6213 AssertOp = ISD::AssertSext;
6214 else if (RetZExt)
6215 AssertOp = ISD::AssertZext;
6216 SmallVector<SDValue, 4> ReturnValues;
6217 unsigned CurReg = 0;
6218 for (unsigned I = 0, E = RetTys.size(); I != E; ++I) {
Owen Andersone50ed302009-08-10 22:56:29 +00006219 EVT VT = RetTys[I];
Owen Anderson23b9b192009-08-12 00:36:31 +00006220 EVT RegisterVT = getRegisterType(RetTy->getContext(), VT);
6221 unsigned NumRegs = getNumRegisters(RetTy->getContext(), VT);
Dan Gohman98ca4f22009-08-05 01:29:28 +00006222
Bill Wendling46ada192010-03-02 01:55:18 +00006223 ReturnValues.push_back(getCopyFromParts(DAG, dl, &InVals[CurReg],
Bill Wendling4533cac2010-01-28 21:51:40 +00006224 NumRegs, RegisterVT, VT,
6225 AssertOp));
Dan Gohman98ca4f22009-08-05 01:29:28 +00006226 CurReg += NumRegs;
6227 }
6228
6229 // For a function returning void, there is no return value. We can't create
6230 // such a node, so we just return a null return value in that case. In
Chris Lattner7a2bdde2011-04-15 05:18:47 +00006231 // that case, nothing will actually look at the value.
Dan Gohman98ca4f22009-08-05 01:29:28 +00006232 if (ReturnValues.empty())
6233 return std::make_pair(SDValue(), Chain);
6234
6235 SDValue Res = DAG.getNode(ISD::MERGE_VALUES, dl,
6236 DAG.getVTList(&RetTys[0], RetTys.size()),
6237 &ReturnValues[0], ReturnValues.size());
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00006238 return std::make_pair(Res, Chain);
6239}
6240
Duncan Sands9fbc7e22009-01-21 09:00:29 +00006241void TargetLowering::LowerOperationWrapper(SDNode *N,
6242 SmallVectorImpl<SDValue> &Results,
Dan Gohmand858e902010-04-17 15:26:15 +00006243 SelectionDAG &DAG) const {
Duncan Sands9fbc7e22009-01-21 09:00:29 +00006244 SDValue Res = LowerOperation(SDValue(N, 0), DAG);
Sanjiv Guptabb326bb2009-01-21 04:48:39 +00006245 if (Res.getNode())
6246 Results.push_back(Res);
6247}
6248
Dan Gohmand858e902010-04-17 15:26:15 +00006249SDValue TargetLowering::LowerOperation(SDValue Op, SelectionDAG &DAG) const {
Torok Edwinc23197a2009-07-14 16:55:14 +00006250 llvm_unreachable("LowerOperation not implemented for this target!");
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00006251 return SDValue();
6252}
6253
Dan Gohman46510a72010-04-15 01:51:59 +00006254void
6255SelectionDAGBuilder::CopyValueToVirtualRegister(const Value *V, unsigned Reg) {
Dan Gohman28a17352010-07-01 01:59:43 +00006256 SDValue Op = getNonRegisterValue(V);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00006257 assert((Op.getOpcode() != ISD::CopyFromReg ||
6258 cast<RegisterSDNode>(Op.getOperand(1))->getReg() != Reg) &&
6259 "Copy from a reg to the same reg!");
6260 assert(!TargetRegisterInfo::isPhysicalRegister(Reg) && "Is a physreg");
6261
Owen Anderson23b9b192009-08-12 00:36:31 +00006262 RegsForValue RFV(V->getContext(), TLI, Reg, V->getType());
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00006263 SDValue Chain = DAG.getEntryNode();
Bill Wendling46ada192010-03-02 01:55:18 +00006264 RFV.getCopyToRegs(Op, DAG, getCurDebugLoc(), Chain, 0);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00006265 PendingExports.push_back(Chain);
6266}
6267
6268#include "llvm/CodeGen/SelectionDAGISel.h"
6269
Eli Friedman23d32432011-05-05 16:53:34 +00006270/// isOnlyUsedInEntryBlock - If the specified argument is only used in the
6271/// entry block, return true. This includes arguments used by switches, since
6272/// the switch may expand into multiple basic blocks.
6273static bool isOnlyUsedInEntryBlock(const Argument *A) {
6274 // With FastISel active, we may be splitting blocks, so force creation
6275 // of virtual registers for all non-dead arguments.
6276 if (EnableFastISel)
6277 return A->use_empty();
6278
6279 const BasicBlock *Entry = A->getParent()->begin();
6280 for (Value::const_use_iterator UI = A->use_begin(), E = A->use_end();
6281 UI != E; ++UI) {
6282 const User *U = *UI;
6283 if (cast<Instruction>(U)->getParent() != Entry || isa<SwitchInst>(U))
6284 return false; // Use not in entry block.
6285 }
6286 return true;
6287}
6288
Dan Gohman46510a72010-04-15 01:51:59 +00006289void SelectionDAGISel::LowerArguments(const BasicBlock *LLVMBB) {
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00006290 // If this is the entry block, emit arguments.
Dan Gohman46510a72010-04-15 01:51:59 +00006291 const Function &F = *LLVMBB->getParent();
Dan Gohman2048b852009-11-23 18:04:58 +00006292 SelectionDAG &DAG = SDB->DAG;
Dan Gohman2048b852009-11-23 18:04:58 +00006293 DebugLoc dl = SDB->getCurDebugLoc();
Dan Gohman98ca4f22009-08-05 01:29:28 +00006294 const TargetData *TD = TLI.getTargetData();
Kenneth Uildriksc158dde2009-11-11 19:59:24 +00006295 SmallVector<ISD::InputArg, 16> Ins;
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00006296
Kenneth Uildriksb4997ae2009-11-07 02:11:54 +00006297 // Check whether the function can return without sret-demotion.
Dan Gohman84023e02010-07-10 09:00:22 +00006298 SmallVector<ISD::OutputArg, 4> Outs;
6299 GetReturnInfo(F.getReturnType(), F.getAttributes().getRetAttributes(),
6300 Outs, TLI);
Kenneth Uildriksc158dde2009-11-11 19:59:24 +00006301
Dan Gohman7451d3e2010-05-29 17:03:36 +00006302 if (!FuncInfo->CanLowerReturn) {
Kenneth Uildriksc158dde2009-11-11 19:59:24 +00006303 // Put in an sret pointer parameter before all the other parameters.
6304 SmallVector<EVT, 1> ValueVTs;
6305 ComputeValueVTs(TLI, PointerType::getUnqual(F.getReturnType()), ValueVTs);
6306
6307 // NOTE: Assuming that a pointer will never break down to more than one VT
6308 // or one register.
6309 ISD::ArgFlagsTy Flags;
6310 Flags.setSRet();
Dan Gohmanf81eca02010-04-22 20:46:50 +00006311 EVT RegisterVT = TLI.getRegisterType(*DAG.getContext(), ValueVTs[0]);
Kenneth Uildriksc158dde2009-11-11 19:59:24 +00006312 ISD::InputArg RetArg(Flags, RegisterVT, true);
6313 Ins.push_back(RetArg);
6314 }
Kenneth Uildriksb4997ae2009-11-07 02:11:54 +00006315
Dan Gohman98ca4f22009-08-05 01:29:28 +00006316 // Set up the incoming argument description vector.
Dan Gohman98ca4f22009-08-05 01:29:28 +00006317 unsigned Idx = 1;
Dan Gohman46510a72010-04-15 01:51:59 +00006318 for (Function::const_arg_iterator I = F.arg_begin(), E = F.arg_end();
Dan Gohman98ca4f22009-08-05 01:29:28 +00006319 I != E; ++I, ++Idx) {
Owen Andersone50ed302009-08-10 22:56:29 +00006320 SmallVector<EVT, 4> ValueVTs;
Dan Gohman98ca4f22009-08-05 01:29:28 +00006321 ComputeValueVTs(TLI, I->getType(), ValueVTs);
6322 bool isArgValueUsed = !I->use_empty();
6323 for (unsigned Value = 0, NumValues = ValueVTs.size();
6324 Value != NumValues; ++Value) {
Owen Andersone50ed302009-08-10 22:56:29 +00006325 EVT VT = ValueVTs[Value];
Owen Anderson1d0be152009-08-13 21:58:54 +00006326 const Type *ArgTy = VT.getTypeForEVT(*DAG.getContext());
Dan Gohman98ca4f22009-08-05 01:29:28 +00006327 ISD::ArgFlagsTy Flags;
6328 unsigned OriginalAlignment =
6329 TD->getABITypeAlignment(ArgTy);
6330
6331 if (F.paramHasAttr(Idx, Attribute::ZExt))
6332 Flags.setZExt();
6333 if (F.paramHasAttr(Idx, Attribute::SExt))
6334 Flags.setSExt();
6335 if (F.paramHasAttr(Idx, Attribute::InReg))
6336 Flags.setInReg();
6337 if (F.paramHasAttr(Idx, Attribute::StructRet))
6338 Flags.setSRet();
6339 if (F.paramHasAttr(Idx, Attribute::ByVal)) {
6340 Flags.setByVal();
6341 const PointerType *Ty = cast<PointerType>(I->getType());
6342 const Type *ElementTy = Ty->getElementType();
Chris Lattner9db20f32011-05-22 23:23:02 +00006343 Flags.setByValSize(TD->getTypeAllocSize(ElementTy));
Dan Gohman98ca4f22009-08-05 01:29:28 +00006344 // For ByVal, alignment should be passed from FE. BE will guess if
6345 // this info is not there but there are cases it cannot get right.
Chris Lattner9db20f32011-05-22 23:23:02 +00006346 unsigned FrameAlign;
Dan Gohman98ca4f22009-08-05 01:29:28 +00006347 if (F.getParamAlignment(Idx))
6348 FrameAlign = F.getParamAlignment(Idx);
Chris Lattner9db20f32011-05-22 23:23:02 +00006349 else
6350 FrameAlign = TLI.getByValTypeAlignment(ElementTy);
Dan Gohman98ca4f22009-08-05 01:29:28 +00006351 Flags.setByValAlign(FrameAlign);
Dan Gohman98ca4f22009-08-05 01:29:28 +00006352 }
6353 if (F.paramHasAttr(Idx, Attribute::Nest))
6354 Flags.setNest();
6355 Flags.setOrigAlign(OriginalAlignment);
6356
Owen Anderson23b9b192009-08-12 00:36:31 +00006357 EVT RegisterVT = TLI.getRegisterType(*CurDAG->getContext(), VT);
6358 unsigned NumRegs = TLI.getNumRegisters(*CurDAG->getContext(), VT);
Dan Gohman98ca4f22009-08-05 01:29:28 +00006359 for (unsigned i = 0; i != NumRegs; ++i) {
6360 ISD::InputArg MyFlags(Flags, RegisterVT, isArgValueUsed);
6361 if (NumRegs > 1 && i == 0)
6362 MyFlags.Flags.setSplit();
6363 // if it isn't first piece, alignment must be 1
6364 else if (i > 0)
6365 MyFlags.Flags.setOrigAlign(1);
6366 Ins.push_back(MyFlags);
6367 }
6368 }
6369 }
6370
6371 // Call the target to set up the argument values.
6372 SmallVector<SDValue, 8> InVals;
6373 SDValue NewRoot = TLI.LowerFormalArguments(DAG.getRoot(), F.getCallingConv(),
6374 F.isVarArg(), Ins,
6375 dl, DAG, InVals);
Dan Gohman5e866062009-08-06 15:37:27 +00006376
6377 // Verify that the target's LowerFormalArguments behaved as expected.
Owen Anderson825b72b2009-08-11 20:47:22 +00006378 assert(NewRoot.getNode() && NewRoot.getValueType() == MVT::Other &&
Dan Gohman5e866062009-08-06 15:37:27 +00006379 "LowerFormalArguments didn't return a valid chain!");
6380 assert(InVals.size() == Ins.size() &&
6381 "LowerFormalArguments didn't emit the correct number of values!");
Bill Wendling3ea58b62009-12-22 21:35:02 +00006382 DEBUG({
6383 for (unsigned i = 0, e = Ins.size(); i != e; ++i) {
6384 assert(InVals[i].getNode() &&
6385 "LowerFormalArguments emitted a null value!");
Duncan Sands1440e8b2010-11-03 11:35:31 +00006386 assert(EVT(Ins[i].VT) == InVals[i].getValueType() &&
Bill Wendling3ea58b62009-12-22 21:35:02 +00006387 "LowerFormalArguments emitted a value with the wrong type!");
6388 }
6389 });
Bill Wendling3ea3c242009-12-22 02:10:19 +00006390
Dan Gohman5e866062009-08-06 15:37:27 +00006391 // Update the DAG with the new chain value resulting from argument lowering.
Dan Gohman98ca4f22009-08-05 01:29:28 +00006392 DAG.setRoot(NewRoot);
6393
6394 // Set up the argument values.
6395 unsigned i = 0;
6396 Idx = 1;
Dan Gohman7451d3e2010-05-29 17:03:36 +00006397 if (!FuncInfo->CanLowerReturn) {
Kenneth Uildriksc158dde2009-11-11 19:59:24 +00006398 // Create a virtual register for the sret pointer, and put in a copy
6399 // from the sret argument into it.
6400 SmallVector<EVT, 1> ValueVTs;
6401 ComputeValueVTs(TLI, PointerType::getUnqual(F.getReturnType()), ValueVTs);
6402 EVT VT = ValueVTs[0];
6403 EVT RegVT = TLI.getRegisterType(*CurDAG->getContext(), VT);
6404 ISD::NodeType AssertOp = ISD::DELETED_NODE;
Bill Wendling46ada192010-03-02 01:55:18 +00006405 SDValue ArgValue = getCopyFromParts(DAG, dl, &InVals[0], 1,
Bill Wendling3ea3c242009-12-22 02:10:19 +00006406 RegVT, VT, AssertOp);
Kenneth Uildriksc158dde2009-11-11 19:59:24 +00006407
Dan Gohman2048b852009-11-23 18:04:58 +00006408 MachineFunction& MF = SDB->DAG.getMachineFunction();
Kenneth Uildriksc158dde2009-11-11 19:59:24 +00006409 MachineRegisterInfo& RegInfo = MF.getRegInfo();
6410 unsigned SRetReg = RegInfo.createVirtualRegister(TLI.getRegClassFor(RegVT));
Dan Gohman7451d3e2010-05-29 17:03:36 +00006411 FuncInfo->DemoteRegister = SRetReg;
Mikhail Glushenkovb3c01992010-01-01 04:41:22 +00006412 NewRoot = SDB->DAG.getCopyToReg(NewRoot, SDB->getCurDebugLoc(),
6413 SRetReg, ArgValue);
Kenneth Uildriksc158dde2009-11-11 19:59:24 +00006414 DAG.setRoot(NewRoot);
Bill Wendling3ea3c242009-12-22 02:10:19 +00006415
Kenneth Uildriksc158dde2009-11-11 19:59:24 +00006416 // i indexes lowered arguments. Bump it past the hidden sret argument.
6417 // Idx indexes LLVM arguments. Don't touch it.
6418 ++i;
6419 }
Bill Wendling3ea3c242009-12-22 02:10:19 +00006420
Dan Gohman46510a72010-04-15 01:51:59 +00006421 for (Function::const_arg_iterator I = F.arg_begin(), E = F.arg_end(); I != E;
Dan Gohman98ca4f22009-08-05 01:29:28 +00006422 ++I, ++Idx) {
6423 SmallVector<SDValue, 4> ArgValues;
Owen Andersone50ed302009-08-10 22:56:29 +00006424 SmallVector<EVT, 4> ValueVTs;
Dan Gohman98ca4f22009-08-05 01:29:28 +00006425 ComputeValueVTs(TLI, I->getType(), ValueVTs);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00006426 unsigned NumValues = ValueVTs.size();
Devang Patel9126c0d2010-06-01 19:59:01 +00006427
6428 // If this argument is unused then remember its value. It is used to generate
6429 // debugging information.
6430 if (I->use_empty() && NumValues)
6431 SDB->setUnusedArgValue(I, InVals[i]);
6432
Eli Friedman23d32432011-05-05 16:53:34 +00006433 for (unsigned Val = 0; Val != NumValues; ++Val) {
6434 EVT VT = ValueVTs[Val];
Owen Anderson23b9b192009-08-12 00:36:31 +00006435 EVT PartVT = TLI.getRegisterType(*CurDAG->getContext(), VT);
6436 unsigned NumParts = TLI.getNumRegisters(*CurDAG->getContext(), VT);
Dan Gohman98ca4f22009-08-05 01:29:28 +00006437
6438 if (!I->use_empty()) {
6439 ISD::NodeType AssertOp = ISD::DELETED_NODE;
6440 if (F.paramHasAttr(Idx, Attribute::SExt))
6441 AssertOp = ISD::AssertSext;
6442 else if (F.paramHasAttr(Idx, Attribute::ZExt))
6443 AssertOp = ISD::AssertZext;
6444
Bill Wendling46ada192010-03-02 01:55:18 +00006445 ArgValues.push_back(getCopyFromParts(DAG, dl, &InVals[i],
Bill Wendling3ea3c242009-12-22 02:10:19 +00006446 NumParts, PartVT, VT,
6447 AssertOp));
Dan Gohman98ca4f22009-08-05 01:29:28 +00006448 }
Bill Wendling3ea3c242009-12-22 02:10:19 +00006449
Dan Gohman98ca4f22009-08-05 01:29:28 +00006450 i += NumParts;
6451 }
Bill Wendling3ea3c242009-12-22 02:10:19 +00006452
Eli Friedman23d32432011-05-05 16:53:34 +00006453 // We don't need to do anything else for unused arguments.
6454 if (ArgValues.empty())
6455 continue;
6456
Devang Patel0b48ead2010-08-31 22:22:42 +00006457 // Note down frame index for byval arguments.
Eli Friedman23d32432011-05-05 16:53:34 +00006458 if (I->hasByValAttr())
Michael J. Spencere70c5262010-10-16 08:25:21 +00006459 if (FrameIndexSDNode *FI =
Devang Patel0b48ead2010-08-31 22:22:42 +00006460 dyn_cast<FrameIndexSDNode>(ArgValues[0].getNode()))
6461 FuncInfo->setByValArgumentFrameIndex(I, FI->getIndex());
6462
Eli Friedman23d32432011-05-05 16:53:34 +00006463 SDValue Res = DAG.getMergeValues(&ArgValues[0], NumValues,
6464 SDB->getCurDebugLoc());
6465 SDB->setValue(I, Res);
Bill Wendling3ea3c242009-12-22 02:10:19 +00006466
Eli Friedman23d32432011-05-05 16:53:34 +00006467 // If this argument is live outside of the entry block, insert a copy from
6468 // wherever we got it to the vreg that other BB's will reference it as.
Eli Friedman7f33d672011-05-10 21:50:58 +00006469 if (!EnableFastISel && Res.getOpcode() == ISD::CopyFromReg) {
Eli Friedman23d32432011-05-05 16:53:34 +00006470 // If we can, though, try to skip creating an unnecessary vreg.
6471 // FIXME: This isn't very clean... it would be nice to make this more
Eli Friedman7f33d672011-05-10 21:50:58 +00006472 // general. It's also subtly incompatible with the hacks FastISel
6473 // uses with vregs.
Eli Friedman23d32432011-05-05 16:53:34 +00006474 unsigned Reg = cast<RegisterSDNode>(Res.getOperand(1))->getReg();
6475 if (TargetRegisterInfo::isVirtualRegister(Reg)) {
6476 FuncInfo->ValueMap[I] = Reg;
6477 continue;
6478 }
6479 }
6480 if (!isOnlyUsedInEntryBlock(I)) {
6481 FuncInfo->InitializeRegForValue(I);
Dan Gohman2048b852009-11-23 18:04:58 +00006482 SDB->CopyToExportRegsIfNeeded(I);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00006483 }
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00006484 }
Bill Wendling3ea3c242009-12-22 02:10:19 +00006485
Dan Gohman98ca4f22009-08-05 01:29:28 +00006486 assert(i == InVals.size() && "Argument register count mismatch!");
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00006487
6488 // Finally, if the target has anything special to do, allow it to do so.
6489 // FIXME: this should insert code into the DAG!
Dan Gohman64652652010-04-14 20:17:22 +00006490 EmitFunctionEntryCode();
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00006491}
6492
6493/// Handle PHI nodes in successor blocks. Emit code into the SelectionDAG to
6494/// ensure constants are generated when needed. Remember the virtual registers
6495/// that need to be added to the Machine PHI nodes as input. We cannot just
6496/// directly add them, because expansion might result in multiple MBB's for one
6497/// BB. As such, the start of the BB might correspond to a different MBB than
6498/// the end.
6499///
6500void
Dan Gohmanf81eca02010-04-22 20:46:50 +00006501SelectionDAGBuilder::HandlePHINodesInSuccessorBlocks(const BasicBlock *LLVMBB) {
Dan Gohman46510a72010-04-15 01:51:59 +00006502 const TerminatorInst *TI = LLVMBB->getTerminator();
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00006503
6504 SmallPtrSet<MachineBasicBlock *, 4> SuccsHandled;
6505
6506 // Check successor nodes' PHI nodes that expect a constant to be available
6507 // from this block.
6508 for (unsigned succ = 0, e = TI->getNumSuccessors(); succ != e; ++succ) {
Dan Gohman46510a72010-04-15 01:51:59 +00006509 const BasicBlock *SuccBB = TI->getSuccessor(succ);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00006510 if (!isa<PHINode>(SuccBB->begin())) continue;
Dan Gohmanf81eca02010-04-22 20:46:50 +00006511 MachineBasicBlock *SuccMBB = FuncInfo.MBBMap[SuccBB];
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00006512
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00006513 // If this terminator has multiple identical successors (common for
6514 // switches), only handle each succ once.
6515 if (!SuccsHandled.insert(SuccMBB)) continue;
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00006516
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00006517 MachineBasicBlock::iterator MBBI = SuccMBB->begin();
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00006518
6519 // At this point we know that there is a 1-1 correspondence between LLVM PHI
6520 // nodes and Machine PHI nodes, but the incoming operands have not been
6521 // emitted yet.
Dan Gohman46510a72010-04-15 01:51:59 +00006522 for (BasicBlock::const_iterator I = SuccBB->begin();
6523 const PHINode *PN = dyn_cast<PHINode>(I); ++I) {
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00006524 // Ignore dead phi's.
6525 if (PN->use_empty()) continue;
6526
Rafael Espindola3fa82832011-05-13 15:18:06 +00006527 // Skip empty types
6528 if (PN->getType()->isEmptyTy())
6529 continue;
6530
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00006531 unsigned Reg;
Dan Gohman46510a72010-04-15 01:51:59 +00006532 const Value *PHIOp = PN->getIncomingValueForBlock(LLVMBB);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00006533
Dan Gohman46510a72010-04-15 01:51:59 +00006534 if (const Constant *C = dyn_cast<Constant>(PHIOp)) {
Dan Gohmanf81eca02010-04-22 20:46:50 +00006535 unsigned &RegOut = ConstantsOut[C];
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00006536 if (RegOut == 0) {
Dan Gohman89496d02010-07-02 00:10:16 +00006537 RegOut = FuncInfo.CreateRegs(C->getType());
Dan Gohmanf81eca02010-04-22 20:46:50 +00006538 CopyValueToVirtualRegister(C, RegOut);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00006539 }
6540 Reg = RegOut;
6541 } else {
Dan Gohmanc25ad632010-07-01 01:33:21 +00006542 DenseMap<const Value *, unsigned>::iterator I =
6543 FuncInfo.ValueMap.find(PHIOp);
6544 if (I != FuncInfo.ValueMap.end())
6545 Reg = I->second;
6546 else {
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00006547 assert(isa<AllocaInst>(PHIOp) &&
Dan Gohmanf81eca02010-04-22 20:46:50 +00006548 FuncInfo.StaticAllocaMap.count(cast<AllocaInst>(PHIOp)) &&
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00006549 "Didn't codegen value into a register!??");
Dan Gohman89496d02010-07-02 00:10:16 +00006550 Reg = FuncInfo.CreateRegs(PHIOp->getType());
Dan Gohmanf81eca02010-04-22 20:46:50 +00006551 CopyValueToVirtualRegister(PHIOp, Reg);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00006552 }
6553 }
6554
6555 // Remember that this register needs to added to the machine PHI node as
6556 // the input for this MBB.
Owen Andersone50ed302009-08-10 22:56:29 +00006557 SmallVector<EVT, 4> ValueVTs;
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00006558 ComputeValueVTs(TLI, PN->getType(), ValueVTs);
6559 for (unsigned vti = 0, vte = ValueVTs.size(); vti != vte; ++vti) {
Owen Andersone50ed302009-08-10 22:56:29 +00006560 EVT VT = ValueVTs[vti];
Dan Gohmanf81eca02010-04-22 20:46:50 +00006561 unsigned NumRegisters = TLI.getNumRegisters(*DAG.getContext(), VT);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00006562 for (unsigned i = 0, e = NumRegisters; i != e; ++i)
Dan Gohmanf81eca02010-04-22 20:46:50 +00006563 FuncInfo.PHINodesToUpdate.push_back(std::make_pair(MBBI++, Reg+i));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00006564 Reg += NumRegisters;
6565 }
6566 }
6567 }
Dan Gohmanf81eca02010-04-22 20:46:50 +00006568 ConstantsOut.clear();
Dan Gohman3df24e62008-09-03 23:12:08 +00006569}