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Chris Lattnerb74e83c2002-12-16 16:15:28 +00001//===-- RegAllocLocal.cpp - A BasicBlock generic register allocator -------===//
2//
3// This register allocator allocates registers to a basic block at a time,
4// attempting to keep values in registers and reusing registers as appropriate.
5//
6//===----------------------------------------------------------------------===//
7
Chris Lattner91a452b2003-01-13 00:25:40 +00008#include "llvm/CodeGen/Passes.h"
Chris Lattner580f9be2002-12-28 20:40:43 +00009#include "llvm/CodeGen/MachineFunctionPass.h"
Chris Lattnerb74e83c2002-12-16 16:15:28 +000010#include "llvm/CodeGen/MachineInstr.h"
Chris Lattnerff863ba2002-12-25 05:05:46 +000011#include "llvm/CodeGen/SSARegMap.h"
Chris Lattnereb24db92002-12-28 21:08:26 +000012#include "llvm/CodeGen/MachineFrameInfo.h"
Chris Lattner91a452b2003-01-13 00:25:40 +000013#include "llvm/CodeGen/LiveVariables.h"
Chris Lattner3501fea2003-01-14 22:00:31 +000014#include "llvm/Target/TargetInstrInfo.h"
Chris Lattnerb74e83c2002-12-16 16:15:28 +000015#include "llvm/Target/TargetMachine.h"
Chris Lattner82bee0f2002-12-18 08:14:26 +000016#include "Support/CommandLine.h"
Chris Lattnera11136b2003-08-01 22:21:34 +000017#include "Support/Debug.h"
18#include "Support/Statistic.h"
Chris Lattnerb74e83c2002-12-16 16:15:28 +000019#include <iostream>
20
Chris Lattnerb74e83c2002-12-16 16:15:28 +000021namespace {
22 Statistic<> NumSpilled ("ra-local", "Number of registers spilled");
23 Statistic<> NumReloaded("ra-local", "Number of registers reloaded");
Chris Lattner82bee0f2002-12-18 08:14:26 +000024 cl::opt<bool> DisableKill("no-kill", cl::Hidden,
25 cl::desc("Disable register kill in local-ra"));
Chris Lattnerb74e83c2002-12-16 16:15:28 +000026
Chris Lattner580f9be2002-12-28 20:40:43 +000027 class RA : public MachineFunctionPass {
28 const TargetMachine *TM;
Chris Lattnerb74e83c2002-12-16 16:15:28 +000029 MachineFunction *MF;
Chris Lattner580f9be2002-12-28 20:40:43 +000030 const MRegisterInfo *RegInfo;
Chris Lattner91a452b2003-01-13 00:25:40 +000031 LiveVariables *LV;
Chris Lattnerff863ba2002-12-25 05:05:46 +000032
Chris Lattner580f9be2002-12-28 20:40:43 +000033 // StackSlotForVirtReg - Maps SSA Regs => frame index where these values are
34 // spilled
35 std::map<unsigned, int> StackSlotForVirtReg;
Chris Lattnerb74e83c2002-12-16 16:15:28 +000036
37 // Virt2PhysRegMap - This map contains entries for each virtual register
38 // that is currently available in a physical register.
39 //
40 std::map<unsigned, unsigned> Virt2PhysRegMap;
41
42 // PhysRegsUsed - This map contains entries for each physical register that
43 // currently has a value (ie, it is in Virt2PhysRegMap). The value mapped
44 // to is the virtual register corresponding to the physical register (the
45 // inverse of the Virt2PhysRegMap), or 0. The value is set to 0 if this
46 // register is pinned because it is used by a future instruction.
47 //
48 std::map<unsigned, unsigned> PhysRegsUsed;
49
50 // PhysRegsUseOrder - This contains a list of the physical registers that
51 // currently have a virtual register value in them. This list provides an
52 // ordering of registers, imposing a reallocation order. This list is only
53 // used if all registers are allocated and we have to spill one, in which
54 // case we spill the least recently used register. Entries at the front of
55 // the list are the least recently used registers, entries at the back are
56 // the most recently used.
57 //
58 std::vector<unsigned> PhysRegsUseOrder;
59
Chris Lattner91a452b2003-01-13 00:25:40 +000060 // VirtRegModified - This bitset contains information about which virtual
61 // registers need to be spilled back to memory when their registers are
62 // scavenged. If a virtual register has simply been rematerialized, there
63 // is no reason to spill it to memory when we need the register back.
Chris Lattner82bee0f2002-12-18 08:14:26 +000064 //
Chris Lattner91a452b2003-01-13 00:25:40 +000065 std::vector<bool> VirtRegModified;
66
67 void markVirtRegModified(unsigned Reg, bool Val = true) {
68 assert(Reg >= MRegisterInfo::FirstVirtualRegister && "Illegal VirtReg!");
69 Reg -= MRegisterInfo::FirstVirtualRegister;
70 if (VirtRegModified.size() <= Reg) VirtRegModified.resize(Reg+1);
71 VirtRegModified[Reg] = Val;
72 }
73
74 bool isVirtRegModified(unsigned Reg) const {
75 assert(Reg >= MRegisterInfo::FirstVirtualRegister && "Illegal VirtReg!");
76 assert(Reg - MRegisterInfo::FirstVirtualRegister < VirtRegModified.size()
77 && "Illegal virtual register!");
78 return VirtRegModified[Reg - MRegisterInfo::FirstVirtualRegister];
79 }
Chris Lattner82bee0f2002-12-18 08:14:26 +000080
Chris Lattnerb74e83c2002-12-16 16:15:28 +000081 void MarkPhysRegRecentlyUsed(unsigned Reg) {
Chris Lattner82bee0f2002-12-18 08:14:26 +000082 assert(!PhysRegsUseOrder.empty() && "No registers used!");
Chris Lattner0eb172c2002-12-24 00:04:55 +000083 if (PhysRegsUseOrder.back() == Reg) return; // Already most recently used
84
85 for (unsigned i = PhysRegsUseOrder.size(); i != 0; --i)
86 if (areRegsEqual(Reg, PhysRegsUseOrder[i-1])) {
87 unsigned RegMatch = PhysRegsUseOrder[i-1]; // remove from middle
88 PhysRegsUseOrder.erase(PhysRegsUseOrder.begin()+i-1);
89 // Add it to the end of the list
90 PhysRegsUseOrder.push_back(RegMatch);
91 if (RegMatch == Reg)
92 return; // Found an exact match, exit early
93 }
Chris Lattnerb74e83c2002-12-16 16:15:28 +000094 }
95
96 public:
Chris Lattnerb74e83c2002-12-16 16:15:28 +000097 virtual const char *getPassName() const {
98 return "Local Register Allocator";
99 }
100
Chris Lattner91a452b2003-01-13 00:25:40 +0000101 virtual void getAnalysisUsage(AnalysisUsage &AU) const {
102 if (!DisableKill)
103 AU.addRequired<LiveVariables>();
104 AU.addRequiredID(PHIEliminationID);
105 MachineFunctionPass::getAnalysisUsage(AU);
106 }
107
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000108 private:
109 /// runOnMachineFunction - Register allocate the whole function
110 bool runOnMachineFunction(MachineFunction &Fn);
111
112 /// AllocateBasicBlock - Register allocate the specified basic block.
113 void AllocateBasicBlock(MachineBasicBlock &MBB);
114
Chris Lattner82bee0f2002-12-18 08:14:26 +0000115
Chris Lattner82bee0f2002-12-18 08:14:26 +0000116 /// areRegsEqual - This method returns true if the specified registers are
117 /// related to each other. To do this, it checks to see if they are equal
118 /// or if the first register is in the alias set of the second register.
119 ///
120 bool areRegsEqual(unsigned R1, unsigned R2) const {
121 if (R1 == R2) return true;
Chris Lattner580f9be2002-12-28 20:40:43 +0000122 if (const unsigned *AliasSet = RegInfo->getAliasSet(R2))
Chris Lattner82bee0f2002-12-18 08:14:26 +0000123 for (unsigned i = 0; AliasSet[i]; ++i)
124 if (AliasSet[i] == R1) return true;
125 return false;
126 }
127
Chris Lattner580f9be2002-12-28 20:40:43 +0000128 /// getStackSpaceFor - This returns the frame index of the specified virtual
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000129 /// register on the stack, allocating space if neccesary.
Chris Lattner580f9be2002-12-28 20:40:43 +0000130 int getStackSpaceFor(unsigned VirtReg, const TargetRegisterClass *RC);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000131
Chris Lattner82bee0f2002-12-18 08:14:26 +0000132 void removePhysReg(unsigned PhysReg);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000133
134 /// spillVirtReg - This method spills the value specified by PhysReg into
135 /// the virtual register slot specified by VirtReg. It then updates the RA
136 /// data structures to indicate the fact that PhysReg is now available.
137 ///
138 void spillVirtReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I,
139 unsigned VirtReg, unsigned PhysReg);
140
Chris Lattnerc21be922002-12-16 17:44:42 +0000141 /// spillPhysReg - This method spills the specified physical register into
142 /// the virtual register slot associated with it.
Chris Lattner91a452b2003-01-13 00:25:40 +0000143 ///
Chris Lattnerc21be922002-12-16 17:44:42 +0000144 void spillPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I,
Chris Lattner91a452b2003-01-13 00:25:40 +0000145 unsigned PhysReg);
Chris Lattnerc21be922002-12-16 17:44:42 +0000146
Chris Lattner91a452b2003-01-13 00:25:40 +0000147 /// assignVirtToPhysReg - This method updates local state so that we know
148 /// that PhysReg is the proper container for VirtReg now. The physical
149 /// register must not be used for anything else when this is called.
150 ///
151 void assignVirtToPhysReg(unsigned VirtReg, unsigned PhysReg);
152
153 /// liberatePhysReg - Make sure the specified physical register is available
154 /// for use. If there is currently a value in it, it is either moved out of
155 /// the way or spilled to memory.
156 ///
157 void liberatePhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I,
158 unsigned PhysReg);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000159
Chris Lattnerae640432002-12-17 02:50:10 +0000160 /// isPhysRegAvailable - Return true if the specified physical register is
161 /// free and available for use. This also includes checking to see if
162 /// aliased registers are all free...
163 ///
Chris Lattner82bee0f2002-12-18 08:14:26 +0000164 bool isPhysRegAvailable(unsigned PhysReg) const;
Chris Lattner91a452b2003-01-13 00:25:40 +0000165
166 /// getFreeReg - Look to see if there is a free register available in the
167 /// specified register class. If not, return 0.
168 ///
169 unsigned getFreeReg(const TargetRegisterClass *RC);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000170
Chris Lattner91a452b2003-01-13 00:25:40 +0000171 /// getReg - Find a physical register to hold the specified virtual
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000172 /// register. If all compatible physical registers are used, this method
173 /// spills the last used virtual register to the stack, and uses that
174 /// register.
175 ///
Chris Lattner91a452b2003-01-13 00:25:40 +0000176 unsigned getReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I,
177 unsigned VirtReg);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000178
179 /// reloadVirtReg - This method loads the specified virtual register into a
180 /// physical register, returning the physical register chosen. This updates
181 /// the regalloc data structures to reflect the fact that the virtual reg is
182 /// now alive in a physical register, and the previous one isn't.
183 ///
184 unsigned reloadVirtReg(MachineBasicBlock &MBB,
185 MachineBasicBlock::iterator &I, unsigned VirtReg);
186 };
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000187}
188
Chris Lattnerae640432002-12-17 02:50:10 +0000189
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000190/// getStackSpaceFor - This allocates space for the specified virtual
191/// register to be held on the stack.
Chris Lattner580f9be2002-12-28 20:40:43 +0000192int RA::getStackSpaceFor(unsigned VirtReg,
193 const TargetRegisterClass *RC) {
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000194 // Find the location VirtReg would belong...
Chris Lattner580f9be2002-12-28 20:40:43 +0000195 std::map<unsigned, int>::iterator I =
196 StackSlotForVirtReg.lower_bound(VirtReg);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000197
Chris Lattner580f9be2002-12-28 20:40:43 +0000198 if (I != StackSlotForVirtReg.end() && I->first == VirtReg)
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000199 return I->second; // Already has space allocated?
200
Chris Lattner580f9be2002-12-28 20:40:43 +0000201 // Allocate a new stack object for this spill location...
Chris Lattner91a452b2003-01-13 00:25:40 +0000202 int FrameIdx = MF->getFrameInfo()->CreateStackObject(RC);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000203
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000204 // Assign the slot...
Chris Lattner580f9be2002-12-28 20:40:43 +0000205 StackSlotForVirtReg.insert(I, std::make_pair(VirtReg, FrameIdx));
206 return FrameIdx;
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000207}
208
Chris Lattnerae640432002-12-17 02:50:10 +0000209
Chris Lattner82bee0f2002-12-18 08:14:26 +0000210/// removePhysReg - This method marks the specified physical register as no
211/// longer being in use.
212///
213void RA::removePhysReg(unsigned PhysReg) {
214 PhysRegsUsed.erase(PhysReg); // PhyReg no longer used
215
216 std::vector<unsigned>::iterator It =
217 std::find(PhysRegsUseOrder.begin(), PhysRegsUseOrder.end(), PhysReg);
218 assert(It != PhysRegsUseOrder.end() &&
219 "Spilled a physical register, but it was not in use list!");
220 PhysRegsUseOrder.erase(It);
221}
222
Chris Lattner91a452b2003-01-13 00:25:40 +0000223
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000224/// spillVirtReg - This method spills the value specified by PhysReg into the
225/// virtual register slot specified by VirtReg. It then updates the RA data
226/// structures to indicate the fact that PhysReg is now available.
227///
228void RA::spillVirtReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I,
229 unsigned VirtReg, unsigned PhysReg) {
230 // If this is just a marker register, we don't need to spill it.
231 if (VirtReg != 0) {
Chris Lattnerff863ba2002-12-25 05:05:46 +0000232 const TargetRegisterClass *RegClass =
233 MF->getSSARegMap()->getRegClass(VirtReg);
Chris Lattner580f9be2002-12-28 20:40:43 +0000234 int FrameIndex = getStackSpaceFor(VirtReg, RegClass);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000235
Chris Lattner91a452b2003-01-13 00:25:40 +0000236 // If we need to spill this value, do so now...
237 if (isVirtRegModified(VirtReg)) {
238 // Add move instruction(s)
239 RegInfo->storeRegToStackSlot(MBB, I, PhysReg, FrameIndex, RegClass);
240 ++NumSpilled; // Update statistics
241 }
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000242 Virt2PhysRegMap.erase(VirtReg); // VirtReg no longer available
243 }
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000244
Chris Lattner82bee0f2002-12-18 08:14:26 +0000245 removePhysReg(PhysReg);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000246}
247
Chris Lattnerae640432002-12-17 02:50:10 +0000248
Chris Lattner91a452b2003-01-13 00:25:40 +0000249/// spillPhysReg - This method spills the specified physical register into the
250/// virtual register slot associated with it.
251///
252void RA::spillPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I,
253 unsigned PhysReg) {
254 std::map<unsigned, unsigned>::iterator PI = PhysRegsUsed.find(PhysReg);
255 if (PI != PhysRegsUsed.end()) { // Only spill it if it's used!
256 spillVirtReg(MBB, I, PI->second, PhysReg);
257 } else if (const unsigned *AliasSet = RegInfo->getAliasSet(PhysReg)) {
258 // If the selected register aliases any other registers, we must make
259 // sure that one of the aliases isn't alive...
260 for (unsigned i = 0; AliasSet[i]; ++i) {
261 PI = PhysRegsUsed.find(AliasSet[i]);
262 if (PI != PhysRegsUsed.end()) // Spill aliased register...
263 spillVirtReg(MBB, I, PI->second, AliasSet[i]);
264 }
265 }
266}
267
268
269/// assignVirtToPhysReg - This method updates local state so that we know
270/// that PhysReg is the proper container for VirtReg now. The physical
271/// register must not be used for anything else when this is called.
272///
273void RA::assignVirtToPhysReg(unsigned VirtReg, unsigned PhysReg) {
274 assert(PhysRegsUsed.find(PhysReg) == PhysRegsUsed.end() &&
275 "Phys reg already assigned!");
276 // Update information to note the fact that this register was just used, and
277 // it holds VirtReg.
278 PhysRegsUsed[PhysReg] = VirtReg;
279 Virt2PhysRegMap[VirtReg] = PhysReg;
280 PhysRegsUseOrder.push_back(PhysReg); // New use of PhysReg
281}
282
283
Chris Lattnerae640432002-12-17 02:50:10 +0000284/// isPhysRegAvailable - Return true if the specified physical register is free
285/// and available for use. This also includes checking to see if aliased
286/// registers are all free...
287///
288bool RA::isPhysRegAvailable(unsigned PhysReg) const {
289 if (PhysRegsUsed.count(PhysReg)) return false;
290
291 // If the selected register aliases any other allocated registers, it is
292 // not free!
Chris Lattner580f9be2002-12-28 20:40:43 +0000293 if (const unsigned *AliasSet = RegInfo->getAliasSet(PhysReg))
Chris Lattnerae640432002-12-17 02:50:10 +0000294 for (unsigned i = 0; AliasSet[i]; ++i)
295 if (PhysRegsUsed.count(AliasSet[i])) // Aliased register in use?
296 return false; // Can't use this reg then.
297 return true;
298}
299
300
Chris Lattner91a452b2003-01-13 00:25:40 +0000301/// getFreeReg - Look to see if there is a free register available in the
302/// specified register class. If not, return 0.
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000303///
Chris Lattner91a452b2003-01-13 00:25:40 +0000304unsigned RA::getFreeReg(const TargetRegisterClass *RC) {
Chris Lattner580f9be2002-12-28 20:40:43 +0000305 // Get iterators defining the range of registers that are valid to allocate in
306 // this class, which also specifies the preferred allocation order.
307 TargetRegisterClass::iterator RI = RC->allocation_order_begin(*MF);
308 TargetRegisterClass::iterator RE = RC->allocation_order_end(*MF);
Chris Lattnerae640432002-12-17 02:50:10 +0000309
Chris Lattner91a452b2003-01-13 00:25:40 +0000310 for (; RI != RE; ++RI)
311 if (isPhysRegAvailable(*RI)) { // Is reg unused?
312 assert(*RI != 0 && "Cannot use register!");
313 return *RI; // Found an unused register!
314 }
315 return 0;
316}
317
318
319/// liberatePhysReg - Make sure the specified physical register is available for
320/// use. If there is currently a value in it, it is either moved out of the way
321/// or spilled to memory.
322///
323void RA::liberatePhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I,
324 unsigned PhysReg) {
325 // FIXME: This code checks to see if a register is available, but it really
326 // wants to know if a reg is available BEFORE the instruction executes. If
327 // called after killed operands are freed, it runs the risk of reallocating a
328 // used operand...
329#if 0
330 if (isPhysRegAvailable(PhysReg)) return; // Already available...
331
332 // Check to see if the register is directly used, not indirectly used through
333 // aliases. If aliased registers are the ones actually used, we cannot be
334 // sure that we will be able to save the whole thing if we do a reg-reg copy.
335 std::map<unsigned, unsigned>::iterator PRUI = PhysRegsUsed.find(PhysReg);
336 if (PRUI != PhysRegsUsed.end()) {
337 unsigned VirtReg = PRUI->second; // The virtual register held...
338
339 // Check to see if there is a compatible register available. If so, we can
340 // move the value into the new register...
341 //
342 const TargetRegisterClass *RC = RegInfo->getRegClass(PhysReg);
343 if (unsigned NewReg = getFreeReg(RC)) {
344 // Emit the code to copy the value...
345 RegInfo->copyRegToReg(MBB, I, NewReg, PhysReg, RC);
346
347 // Update our internal state to indicate that PhysReg is available and Reg
348 // isn't.
349 Virt2PhysRegMap.erase(VirtReg);
350 removePhysReg(PhysReg); // Free the physreg
351
352 // Move reference over to new register...
353 assignVirtToPhysReg(VirtReg, NewReg);
354 return;
Chris Lattnerae640432002-12-17 02:50:10 +0000355 }
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000356 }
Chris Lattner91a452b2003-01-13 00:25:40 +0000357#endif
358 spillPhysReg(MBB, I, PhysReg);
359}
360
361
362/// getReg - Find a physical register to hold the specified virtual
363/// register. If all compatible physical registers are used, this method spills
364/// the last used virtual register to the stack, and uses that register.
365///
366unsigned RA::getReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I,
367 unsigned VirtReg) {
368 const TargetRegisterClass *RC = MF->getSSARegMap()->getRegClass(VirtReg);
369
370 // First check to see if we have a free register of the requested type...
371 unsigned PhysReg = getFreeReg(RC);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000372
Chris Lattnerae640432002-12-17 02:50:10 +0000373 // If we didn't find an unused register, scavenge one now!
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000374 if (PhysReg == 0) {
Chris Lattnerc21be922002-12-16 17:44:42 +0000375 assert(!PhysRegsUseOrder.empty() && "No allocated registers??");
Chris Lattnerae640432002-12-17 02:50:10 +0000376
377 // Loop over all of the preallocated registers from the least recently used
378 // to the most recently used. When we find one that is capable of holding
379 // our register, use it.
380 for (unsigned i = 0; PhysReg == 0; ++i) {
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000381 assert(i != PhysRegsUseOrder.size() &&
382 "Couldn't find a register of the appropriate class!");
Chris Lattnerae640432002-12-17 02:50:10 +0000383
384 unsigned R = PhysRegsUseOrder[i];
385 // If the current register is compatible, use it.
Chris Lattner580f9be2002-12-28 20:40:43 +0000386 if (RegInfo->getRegClass(R) == RC) {
387 PhysReg = R;
388 break;
389 } else {
390 // If one of the registers aliased to the current register is
391 // compatible, use it.
392 if (const unsigned *AliasSet = RegInfo->getAliasSet(R))
393 for (unsigned a = 0; AliasSet[a]; ++a)
394 if (RegInfo->getRegClass(AliasSet[a]) == RC) {
395 PhysReg = AliasSet[a]; // Take an aliased register
396 break;
397 }
Chris Lattnerae640432002-12-17 02:50:10 +0000398 }
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000399 }
400
Chris Lattnerae640432002-12-17 02:50:10 +0000401 assert(PhysReg && "Physical register not assigned!?!?");
402
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000403 // At this point PhysRegsUseOrder[i] is the least recently used register of
404 // compatible register class. Spill it to memory and reap its remains.
Chris Lattnerc21be922002-12-16 17:44:42 +0000405 spillPhysReg(MBB, I, PhysReg);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000406 }
407
408 // Now that we know which register we need to assign this to, do it now!
Chris Lattner91a452b2003-01-13 00:25:40 +0000409 assignVirtToPhysReg(VirtReg, PhysReg);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000410 return PhysReg;
411}
412
Chris Lattnerae640432002-12-17 02:50:10 +0000413
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000414/// reloadVirtReg - This method loads the specified virtual register into a
415/// physical register, returning the physical register chosen. This updates the
416/// regalloc data structures to reflect the fact that the virtual reg is now
417/// alive in a physical register, and the previous one isn't.
418///
419unsigned RA::reloadVirtReg(MachineBasicBlock &MBB,
420 MachineBasicBlock::iterator &I,
421 unsigned VirtReg) {
422 std::map<unsigned, unsigned>::iterator It = Virt2PhysRegMap.find(VirtReg);
423 if (It != Virt2PhysRegMap.end()) {
424 MarkPhysRegRecentlyUsed(It->second);
425 return It->second; // Already have this value available!
426 }
427
Chris Lattner91a452b2003-01-13 00:25:40 +0000428 unsigned PhysReg = getReg(MBB, I, VirtReg);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000429
Chris Lattnerff863ba2002-12-25 05:05:46 +0000430 const TargetRegisterClass *RC = MF->getSSARegMap()->getRegClass(VirtReg);
Chris Lattner580f9be2002-12-28 20:40:43 +0000431 int FrameIndex = getStackSpaceFor(VirtReg, RC);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000432
Chris Lattner91a452b2003-01-13 00:25:40 +0000433 markVirtRegModified(VirtReg, false); // Note that this reg was just reloaded
434
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000435 // Add move instruction(s)
Chris Lattner580f9be2002-12-28 20:40:43 +0000436 RegInfo->loadRegFromStackSlot(MBB, I, PhysReg, FrameIndex, RC);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000437 ++NumReloaded; // Update statistics
438 return PhysReg;
439}
440
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000441void RA::AllocateBasicBlock(MachineBasicBlock &MBB) {
442 // loop over each instruction
443 MachineBasicBlock::iterator I = MBB.begin();
444 for (; I != MBB.end(); ++I) {
445 MachineInstr *MI = *I;
Chris Lattner3501fea2003-01-14 22:00:31 +0000446 const TargetInstrDescriptor &TID = TM->getInstrInfo().get(MI->getOpcode());
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000447
Chris Lattnerae640432002-12-17 02:50:10 +0000448 // Loop over the implicit uses, making sure that they are at the head of the
449 // use order list, so they don't get reallocated.
Chris Lattner3501fea2003-01-14 22:00:31 +0000450 if (const unsigned *ImplicitUses = TID.ImplicitUses)
Chris Lattnerae640432002-12-17 02:50:10 +0000451 for (unsigned i = 0; ImplicitUses[i]; ++i)
452 MarkPhysRegRecentlyUsed(ImplicitUses[i]);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000453
Chris Lattner91a452b2003-01-13 00:25:40 +0000454 // Get the used operands into registers. This has the potiential to spill
455 // incoming values if we are out of registers.
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000456 //
457 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i)
458 if (MI->getOperand(i).opIsUse() &&
459 MI->getOperand(i).isVirtualRegister()) {
460 unsigned VirtSrcReg = MI->getOperand(i).getAllocatedRegNum();
461 unsigned PhysSrcReg = reloadVirtReg(MBB, I, VirtSrcReg);
462 MI->SetMachineOperandReg(i, PhysSrcReg); // Assign the input register
463 }
464
Chris Lattner91a452b2003-01-13 00:25:40 +0000465 if (!DisableKill) {
466 // If this instruction is the last user of anything in registers, kill the
467 // value, freeing the register being used, so it doesn't need to be
468 // spilled to memory.
469 //
470 for (LiveVariables::killed_iterator KI = LV->killed_begin(MI),
Chris Lattnerd5725632003-05-12 03:54:14 +0000471 KE = LV->killed_end(MI); KI != KE; ++KI) {
Chris Lattner91a452b2003-01-13 00:25:40 +0000472 unsigned VirtReg = KI->second;
Chris Lattnerd5725632003-05-12 03:54:14 +0000473 unsigned PhysReg = VirtReg;
474 if (VirtReg >= MRegisterInfo::FirstVirtualRegister) {
475 std::map<unsigned, unsigned>::iterator I =
476 Virt2PhysRegMap.find(VirtReg);
477 assert(I != Virt2PhysRegMap.end());
478 PhysReg = I->second;
479 Virt2PhysRegMap.erase(I);
480 }
Chris Lattner91a452b2003-01-13 00:25:40 +0000481
Chris Lattnerd5725632003-05-12 03:54:14 +0000482 if (PhysReg) {
483 DEBUG(std::cerr << "V: " << VirtReg << " P: " << PhysReg
484 << " Killed by: " << *MI);
485 removePhysReg(PhysReg);
486 }
Chris Lattner91a452b2003-01-13 00:25:40 +0000487 }
488 }
489
490 // Loop over all of the operands of the instruction, spilling registers that
491 // are defined, and marking explicit destinations in the PhysRegsUsed map.
492 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i)
Vikram S. Adve5f2180c2003-05-27 00:05:23 +0000493 if ((MI->getOperand(i).opIsDefOnly() || MI->getOperand(i).opIsDefAndUse()) &&
Chris Lattner91a452b2003-01-13 00:25:40 +0000494 MI->getOperand(i).isPhysicalRegister()) {
495 unsigned Reg = MI->getOperand(i).getAllocatedRegNum();
496 spillPhysReg(MBB, I, Reg); // Spill any existing value in the reg
497 PhysRegsUsed[Reg] = 0; // It is free and reserved now
498 PhysRegsUseOrder.push_back(Reg);
499 }
500
501 // Loop over the implicit defs, spilling them as well.
Chris Lattner3501fea2003-01-14 22:00:31 +0000502 if (const unsigned *ImplicitDefs = TID.ImplicitDefs)
Chris Lattner91a452b2003-01-13 00:25:40 +0000503 for (unsigned i = 0; ImplicitDefs[i]; ++i) {
504 unsigned Reg = ImplicitDefs[i];
Chris Lattnerd5725632003-05-12 03:54:14 +0000505 spillPhysReg(MBB, I, Reg);
506 PhysRegsUseOrder.push_back(Reg);
507 PhysRegsUsed[Reg] = 0; // It is free and reserved now
Chris Lattner91a452b2003-01-13 00:25:40 +0000508 }
509
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000510 // Okay, we have allocated all of the source operands and spilled any values
511 // that would be destroyed by defs of this instruction. Loop over the
Chris Lattner91a452b2003-01-13 00:25:40 +0000512 // implicit defs and assign them to a register, spilling incoming values if
513 // we need to scavenge a register.
Chris Lattner82bee0f2002-12-18 08:14:26 +0000514 //
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000515 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i)
Vikram S. Adve5f2180c2003-05-27 00:05:23 +0000516 if ((MI->getOperand(i).opIsDefOnly() || MI->getOperand(i).opIsDefAndUse())
517 && MI->getOperand(i).isVirtualRegister()) {
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000518 unsigned DestVirtReg = MI->getOperand(i).getAllocatedRegNum();
519 unsigned DestPhysReg;
520
Chris Lattnerd5725632003-05-12 03:54:14 +0000521 // If DestVirtReg already has a value, forget about it. Why doesn't
522 // getReg do this right?
523 std::map<unsigned, unsigned>::iterator DestI =
524 Virt2PhysRegMap.find(DestVirtReg);
525 if (DestI != Virt2PhysRegMap.end()) {
526 unsigned PhysReg = DestI->second;
527 Virt2PhysRegMap.erase(DestI);
528 removePhysReg(PhysReg);
529 }
Chris Lattner91a452b2003-01-13 00:25:40 +0000530
Chris Lattner580f9be2002-12-28 20:40:43 +0000531 if (TM->getInstrInfo().isTwoAddrInstr(MI->getOpcode()) && i == 0) {
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000532 // must be same register number as the first operand
533 // This maps a = b + c into b += c, and saves b into a's spot
534 assert(MI->getOperand(1).isRegister() &&
535 MI->getOperand(1).getAllocatedRegNum() &&
536 MI->getOperand(1).opIsUse() &&
537 "Two address instruction invalid!");
538 DestPhysReg = MI->getOperand(1).getAllocatedRegNum();
539
Chris Lattnerd5725632003-05-12 03:54:14 +0000540 liberatePhysReg(MBB, I, DestPhysReg);
Chris Lattner91a452b2003-01-13 00:25:40 +0000541 assignVirtToPhysReg(DestVirtReg, DestPhysReg);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000542 } else {
Chris Lattner91a452b2003-01-13 00:25:40 +0000543 DestPhysReg = getReg(MBB, I, DestVirtReg);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000544 }
Chris Lattnerd5725632003-05-12 03:54:14 +0000545 markVirtRegModified(DestVirtReg);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000546 MI->SetMachineOperandReg(i, DestPhysReg); // Assign the output register
547 }
Chris Lattner82bee0f2002-12-18 08:14:26 +0000548
549 if (!DisableKill) {
Chris Lattner91a452b2003-01-13 00:25:40 +0000550 // If this instruction defines any registers that are immediately dead,
551 // kill them now.
552 //
553 for (LiveVariables::killed_iterator KI = LV->dead_begin(MI),
Chris Lattnerd5725632003-05-12 03:54:14 +0000554 KE = LV->dead_end(MI); KI != KE; ++KI) {
Chris Lattner91a452b2003-01-13 00:25:40 +0000555 unsigned VirtReg = KI->second;
Chris Lattnerd5725632003-05-12 03:54:14 +0000556 unsigned PhysReg = VirtReg;
557 if (VirtReg >= MRegisterInfo::FirstVirtualRegister) {
558 std::map<unsigned, unsigned>::iterator I =
559 Virt2PhysRegMap.find(VirtReg);
560 assert(I != Virt2PhysRegMap.end());
561 PhysReg = I->second;
562 Virt2PhysRegMap.erase(I);
563 }
Chris Lattner91a452b2003-01-13 00:25:40 +0000564
Chris Lattnerd5725632003-05-12 03:54:14 +0000565 if (PhysReg) {
566 DEBUG(std::cerr << "V: " << VirtReg << " P: " << PhysReg
567 << " dead after: " << *MI);
568 removePhysReg(PhysReg);
569 }
Chris Lattner82bee0f2002-12-18 08:14:26 +0000570 }
571 }
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000572 }
573
574 // Rewind the iterator to point to the first flow control instruction...
Chris Lattner3501fea2003-01-14 22:00:31 +0000575 const TargetInstrInfo &TII = TM->getInstrInfo();
Chris Lattner0416d2a2003-01-16 18:06:43 +0000576 I = MBB.end();
Chris Lattner3501fea2003-01-14 22:00:31 +0000577 while (I != MBB.begin() && TII.isTerminatorInstr((*(I-1))->getOpcode()))
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000578 --I;
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000579
580 // Spill all physical registers holding virtual registers now.
581 while (!PhysRegsUsed.empty())
582 spillVirtReg(MBB, I, PhysRegsUsed.begin()->second,
583 PhysRegsUsed.begin()->first);
584
Chris Lattner91a452b2003-01-13 00:25:40 +0000585 for (std::map<unsigned, unsigned>::iterator I = Virt2PhysRegMap.begin(),
Chris Lattnerd5725632003-05-12 03:54:14 +0000586 E = Virt2PhysRegMap.end(); I != E; ++I)
Chris Lattner91a452b2003-01-13 00:25:40 +0000587 std::cerr << "Register still mapped: " << I->first << " -> "
Chris Lattnerd5725632003-05-12 03:54:14 +0000588 << I->second << "\n";
Chris Lattner91a452b2003-01-13 00:25:40 +0000589
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000590 assert(Virt2PhysRegMap.empty() && "Virtual registers still in phys regs?");
591 assert(PhysRegsUseOrder.empty() && "Physical regs still allocated?");
592}
593
Chris Lattner86c69a62002-12-17 03:16:10 +0000594
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000595/// runOnMachineFunction - Register allocate the whole function
596///
597bool RA::runOnMachineFunction(MachineFunction &Fn) {
598 DEBUG(std::cerr << "Machine Function " << "\n");
599 MF = &Fn;
Chris Lattner580f9be2002-12-28 20:40:43 +0000600 TM = &Fn.getTarget();
601 RegInfo = TM->getRegisterInfo();
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000602
Chris Lattner82bee0f2002-12-18 08:14:26 +0000603 if (!DisableKill)
Chris Lattner91a452b2003-01-13 00:25:40 +0000604 LV = &getAnalysis<LiveVariables>();
Chris Lattner82bee0f2002-12-18 08:14:26 +0000605
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000606 // Loop over all of the basic blocks, eliminating virtual register references
607 for (MachineFunction::iterator MBB = Fn.begin(), MBBe = Fn.end();
608 MBB != MBBe; ++MBB)
609 AllocateBasicBlock(*MBB);
610
Chris Lattner580f9be2002-12-28 20:40:43 +0000611 StackSlotForVirtReg.clear();
Chris Lattner91a452b2003-01-13 00:25:40 +0000612 VirtRegModified.clear();
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000613 return true;
614}
615
Chris Lattner580f9be2002-12-28 20:40:43 +0000616Pass *createLocalRegisterAllocator() {
617 return new RA();
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000618}