Evan Cheng | afff941 | 2011-12-20 18:26:50 +0000 | [diff] [blame] | 1 | ; RUN: llc < %s -O0 -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=armv7-apple-ios | FileCheck %s --check-prefix=ARM |
| 2 | ; RUN: llc < %s -O0 -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=thumbv7-apple-ios | FileCheck %s --check-prefix=THUMB |
Chad Rosier | 49d6fc0 | 2012-06-12 19:25:13 +0000 | [diff] [blame] | 3 | ; RUN: llc < %s -O0 -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=armv7-apple-ios -arm-long-calls | FileCheck %s --check-prefix=ARM-LONG |
| 4 | ; RUN: llc < %s -O0 -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=thumbv7-apple-ios -arm-long-calls | FileCheck %s --check-prefix=THUMB-LONG |
Chad Rosier | 42536af | 2011-11-05 20:16:15 +0000 | [diff] [blame] | 5 | |
| 6 | define i32 @t0(i1 zeroext %a) nounwind { |
| 7 | %1 = zext i1 %a to i32 |
| 8 | ret i32 %1 |
| 9 | } |
| 10 | |
| 11 | define i32 @t1(i8 signext %a) nounwind { |
| 12 | %1 = sext i8 %a to i32 |
| 13 | ret i32 %1 |
| 14 | } |
| 15 | |
| 16 | define i32 @t2(i8 zeroext %a) nounwind { |
| 17 | %1 = zext i8 %a to i32 |
| 18 | ret i32 %1 |
| 19 | } |
| 20 | |
| 21 | define i32 @t3(i16 signext %a) nounwind { |
| 22 | %1 = sext i16 %a to i32 |
| 23 | ret i32 %1 |
| 24 | } |
| 25 | |
| 26 | define i32 @t4(i16 zeroext %a) nounwind { |
| 27 | %1 = zext i16 %a to i32 |
| 28 | ret i32 %1 |
| 29 | } |
| 30 | |
| 31 | define void @foo(i8 %a, i16 %b) nounwind { |
| 32 | ; ARM: foo |
| 33 | ; THUMB: foo |
| 34 | ;; Materialize i1 1 |
| 35 | ; ARM: movw r2, #1 |
| 36 | ;; zero-ext |
| 37 | ; ARM: and r2, r2, #1 |
| 38 | ; THUMB: and r2, r2, #1 |
| 39 | %1 = call i32 @t0(i1 zeroext 1) |
| 40 | ; ARM: sxtb r2, r1 |
| 41 | ; ARM: mov r0, r2 |
| 42 | ; THUMB: sxtb r2, r1 |
| 43 | ; THUMB: mov r0, r2 |
| 44 | %2 = call i32 @t1(i8 signext %a) |
| 45 | ; ARM: uxtb r2, r1 |
| 46 | ; ARM: mov r0, r2 |
| 47 | ; THUMB: uxtb r2, r1 |
| 48 | ; THUMB: mov r0, r2 |
| 49 | %3 = call i32 @t2(i8 zeroext %a) |
| 50 | ; ARM: sxth r2, r1 |
| 51 | ; ARM: mov r0, r2 |
| 52 | ; THUMB: sxth r2, r1 |
| 53 | ; THUMB: mov r0, r2 |
| 54 | %4 = call i32 @t3(i16 signext %b) |
| 55 | ; ARM: uxth r2, r1 |
| 56 | ; ARM: mov r0, r2 |
| 57 | ; THUMB: uxth r2, r1 |
| 58 | ; THUMB: mov r0, r2 |
| 59 | %5 = call i32 @t4(i16 zeroext %b) |
| 60 | |
| 61 | ;; A few test to check materialization |
| 62 | ;; Note: i1 1 was materialized with t1 call |
| 63 | ; ARM: movw r1, #255 |
| 64 | %6 = call i32 @t2(i8 zeroext 255) |
| 65 | ; ARM: movw r1, #65535 |
| 66 | ; THUMB: movw r1, #65535 |
| 67 | %7 = call i32 @t4(i16 zeroext 65535) |
| 68 | ret void |
| 69 | } |
Chad Rosier | 0eff39f | 2011-11-08 00:03:32 +0000 | [diff] [blame] | 70 | |
| 71 | define void @foo2() nounwind { |
| 72 | %1 = call signext i16 @t5() |
| 73 | %2 = call zeroext i16 @t6() |
| 74 | %3 = call signext i8 @t7() |
| 75 | %4 = call zeroext i8 @t8() |
| 76 | %5 = call zeroext i1 @t9() |
| 77 | ret void |
| 78 | } |
| 79 | |
| 80 | declare signext i16 @t5(); |
| 81 | declare zeroext i16 @t6(); |
| 82 | declare signext i8 @t7(); |
| 83 | declare zeroext i8 @t8(); |
| 84 | declare zeroext i1 @t9(); |
Chad Rosier | b74c865 | 2011-12-02 20:25:18 +0000 | [diff] [blame] | 85 | |
| 86 | define i32 @t10(i32 %argc, i8** nocapture %argv) { |
| 87 | entry: |
| 88 | ; ARM: @t10 |
| 89 | ; ARM: movw r0, #0 |
| 90 | ; ARM: movw r1, #248 |
| 91 | ; ARM: movw r2, #187 |
| 92 | ; ARM: movw r3, #28 |
| 93 | ; ARM: movw r9, #40 |
| 94 | ; ARM: movw r12, #186 |
| 95 | ; ARM: uxtb r0, r0 |
| 96 | ; ARM: uxtb r1, r1 |
| 97 | ; ARM: uxtb r2, r2 |
| 98 | ; ARM: uxtb r3, r3 |
| 99 | ; ARM: uxtb r9, r9 |
| 100 | ; ARM: str r9, [sp] |
| 101 | ; ARM: uxtb r9, r12 |
| 102 | ; ARM: str r9, [sp, #4] |
| 103 | ; ARM: bl _bar |
Chad Rosier | 49d6fc0 | 2012-06-12 19:25:13 +0000 | [diff] [blame] | 104 | ; ARM-LONG: @t10 |
| 105 | ; ARM-LONG: movw lr, :lower16:L_bar$non_lazy_ptr |
| 106 | ; ARM-LONG: movt lr, :upper16:L_bar$non_lazy_ptr |
| 107 | ; ARM-LONG: ldr lr, [lr] |
| 108 | ; ARM-LONG: blx lr |
Chad Rosier | b74c865 | 2011-12-02 20:25:18 +0000 | [diff] [blame] | 109 | ; THUMB: @t10 |
| 110 | ; THUMB: movs r0, #0 |
| 111 | ; THUMB: movt r0, #0 |
| 112 | ; THUMB: movs r1, #248 |
| 113 | ; THUMB: movt r1, #0 |
| 114 | ; THUMB: movs r2, #187 |
| 115 | ; THUMB: movt r2, #0 |
| 116 | ; THUMB: movs r3, #28 |
| 117 | ; THUMB: movt r3, #0 |
| 118 | ; THUMB: movw r9, #40 |
| 119 | ; THUMB: movt r9, #0 |
| 120 | ; THUMB: movw r12, #186 |
| 121 | ; THUMB: movt r12, #0 |
| 122 | ; THUMB: uxtb r0, r0 |
| 123 | ; THUMB: uxtb r1, r1 |
| 124 | ; THUMB: uxtb r2, r2 |
| 125 | ; THUMB: uxtb r3, r3 |
| 126 | ; THUMB: uxtb.w r9, r9 |
| 127 | ; THUMB: str.w r9, [sp] |
| 128 | ; THUMB: uxtb.w r9, r12 |
| 129 | ; THUMB: str.w r9, [sp, #4] |
| 130 | ; THUMB: bl _bar |
Chad Rosier | 49d6fc0 | 2012-06-12 19:25:13 +0000 | [diff] [blame] | 131 | ; THUMB-LONG: @t10 |
| 132 | ; THUMB-LONG: movw lr, :lower16:L_bar$non_lazy_ptr |
| 133 | ; THUMB-LONG: movt lr, :upper16:L_bar$non_lazy_ptr |
| 134 | ; THUMB-LONG: ldr.w lr, [lr] |
| 135 | ; THUMB-LONG: blx lr |
Chad Rosier | b74c865 | 2011-12-02 20:25:18 +0000 | [diff] [blame] | 136 | %call = call i32 @bar(i8 zeroext 0, i8 zeroext -8, i8 zeroext -69, i8 zeroext 28, i8 zeroext 40, i8 zeroext -70) |
| 137 | ret i32 0 |
| 138 | } |
| 139 | |
| 140 | declare i32 @bar(i8 zeroext, i8 zeroext, i8 zeroext, i8 zeroext, i8 zeroext, i8 zeroext) |
Chad Rosier | 1c8fccb | 2012-05-23 18:38:57 +0000 | [diff] [blame] | 141 | |
| 142 | define i32 @bar0(i32 %i) nounwind { |
| 143 | ret i32 0 |
| 144 | } |
| 145 | |
| 146 | define void @foo3() uwtable { |
| 147 | ; ARM: movw r0, #0 |
| 148 | ; ARM: movw r1, :lower16:_bar0 |
| 149 | ; ARM: movt r1, :upper16:_bar0 |
| 150 | ; ARM: blx r1 |
| 151 | ; THUMB: movs r0, #0 |
| 152 | ; THUMB: movw r1, :lower16:_bar0 |
| 153 | ; THUMB: movt r1, :upper16:_bar0 |
| 154 | ; THUMB: blx r1 |
| 155 | %fptr = alloca i32 (i32)*, align 8 |
| 156 | store i32 (i32)* @bar0, i32 (i32)** %fptr, align 8 |
| 157 | %1 = load i32 (i32)** %fptr, align 8 |
| 158 | %call = call i32 %1(i32 0) |
| 159 | ret void |
| 160 | } |
Chad Rosier | 49d6fc0 | 2012-06-12 19:25:13 +0000 | [diff] [blame] | 161 | |
| 162 | define i32 @LibCall(i32 %a, i32 %b) { |
| 163 | entry: |
| 164 | ; ARM: LibCall |
| 165 | ; ARM: bl ___udivsi3 |
| 166 | ; ARM-LONG: LibCall |
| 167 | ; ARM-LONG: movw r2, :lower16:L___udivsi3$non_lazy_ptr |
| 168 | ; ARM-LONG: movt r2, :upper16:L___udivsi3$non_lazy_ptr |
| 169 | ; ARM-LONG: ldr r2, [r2] |
| 170 | ; ARM-LONG: blx r2 |
| 171 | ; THUMB: LibCall |
| 172 | ; THUMB: bl ___udivsi3 |
| 173 | ; THUMB-LONG: LibCall |
| 174 | ; THUMB-LONG: movw r2, :lower16:L___udivsi3$non_lazy_ptr |
| 175 | ; THUMB-LONG: movt r2, :upper16:L___udivsi3$non_lazy_ptr |
| 176 | ; THUMB-LONG: ldr r2, [r2] |
| 177 | ; THUMB-LONG: blx r2 |
| 178 | %tmp1 = udiv i32 %a, %b ; <i32> [#uses=1] |
| 179 | ret i32 %tmp1 |
| 180 | } |
Jush Lu | a8c4d73 | 2012-07-06 03:02:37 +0000 | [diff] [blame^] | 181 | |
| 182 | define i32 @VarArg() nounwind { |
| 183 | entry: |
| 184 | %i = alloca i32, align 4 |
| 185 | %j = alloca i32, align 4 |
| 186 | %k = alloca i32, align 4 |
| 187 | %m = alloca i32, align 4 |
| 188 | %n = alloca i32, align 4 |
| 189 | %tmp = alloca i32, align 4 |
| 190 | %0 = load i32* %i, align 4 |
| 191 | %1 = load i32* %j, align 4 |
| 192 | %2 = load i32* %k, align 4 |
| 193 | %3 = load i32* %m, align 4 |
| 194 | %4 = load i32* %n, align 4 |
| 195 | ; ARM: VarArg |
| 196 | ; ARM: mov r7, sp |
| 197 | ; ARM: movw r0, #5 |
| 198 | ; ARM: ldr r1, [r7, #-4] |
| 199 | ; ARM: ldr r2, [r7, #-8] |
| 200 | ; ARM: ldr r3, [r7, #-12] |
| 201 | ; ARM: ldr r9, [sp, #16] |
| 202 | ; ARM: ldr r12, [sp, #12] |
| 203 | ; ARM: str r9, [sp] |
| 204 | ; ARM: str r12, [sp, #4] |
| 205 | ; ARM: bl _CallVariadic |
| 206 | ; THUMB: mov r7, sp |
| 207 | ; THUMB: movs r0, #5 |
| 208 | ; THUMB: movt r0, #0 |
| 209 | ; THUMB: ldr r1, [sp, #28] |
| 210 | ; THUMB: ldr r2, [sp, #24] |
| 211 | ; THUMB: ldr r3, [sp, #20] |
| 212 | ; THUMB: ldr.w r9, [sp, #16] |
| 213 | ; THUMB: ldr.w r12, [sp, #12] |
| 214 | ; THUMB: str.w r9, [sp] |
| 215 | ; THUMB: str.w r12, [sp, #4] |
| 216 | ; THUMB: bl _CallVariadic |
| 217 | %call = call i32 (i32, ...)* @CallVariadic(i32 5, i32 %0, i32 %1, i32 %2, i32 %3, i32 %4) |
| 218 | store i32 %call, i32* %tmp, align 4 |
| 219 | %5 = load i32* %tmp, align 4 |
| 220 | ret i32 %5 |
| 221 | } |
| 222 | |
| 223 | declare i32 @CallVariadic(i32, ...) |