blob: 3e4b7f5550934678a39f98aebaa16f9fe6049071 [file] [log] [blame]
Bob Wilson7f38db82009-10-08 22:33:53 +00001; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s
Bob Wilsone60fee02009-06-22 23:27:02 +00002
3define <4 x i32> @vqdmlals16(<4 x i32>* %A, <4 x i16>* %B, <4 x i16>* %C) nounwind {
Bob Wilson7f38db82009-10-08 22:33:53 +00004;CHECK: vqdmlals16:
5;CHECK: vqdmlal.s16
Bob Wilsone60fee02009-06-22 23:27:02 +00006 %tmp1 = load <4 x i32>* %A
7 %tmp2 = load <4 x i16>* %B
8 %tmp3 = load <4 x i16>* %C
9 %tmp4 = call <4 x i32> @llvm.arm.neon.vqdmlal.v4i32(<4 x i32> %tmp1, <4 x i16> %tmp2, <4 x i16> %tmp3)
10 ret <4 x i32> %tmp4
11}
12
13define <2 x i64> @vqdmlals32(<2 x i64>* %A, <2 x i32>* %B, <2 x i32>* %C) nounwind {
Bob Wilson7f38db82009-10-08 22:33:53 +000014;CHECK: vqdmlals32:
15;CHECK: vqdmlal.s32
Bob Wilsone60fee02009-06-22 23:27:02 +000016 %tmp1 = load <2 x i64>* %A
17 %tmp2 = load <2 x i32>* %B
18 %tmp3 = load <2 x i32>* %C
19 %tmp4 = call <2 x i64> @llvm.arm.neon.vqdmlal.v2i64(<2 x i64> %tmp1, <2 x i32> %tmp2, <2 x i32> %tmp3)
20 ret <2 x i64> %tmp4
21}
22
23declare <4 x i32> @llvm.arm.neon.vqdmlal.v4i32(<4 x i32>, <4 x i16>, <4 x i16>) nounwind readnone
24declare <2 x i64> @llvm.arm.neon.vqdmlal.v2i64(<2 x i64>, <2 x i32>, <2 x i32>) nounwind readnone