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gerrit-public.fairphone.software / fp2-dev / platform / external / llvm / afa08b51a65fd3e945cb752281f7ad5f02c4fa29 / . / test / CodeGen / X86 / shift-coalesce.ll
blob: d38f9a88fcd6c893d86fc6f37d3b6dc49067816b [file] [log] [blame]
Dan Gohman0a063102009-09-08 23:54:48 +0000[diff] [blame]1; RUN: llc < %s -march=x86 -x86-asm-syntax=intel | \
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000[diff] [blame]2; RUN: grep {shld.*CL}
Dan Gohman0a063102009-09-08 23:54:48 +0000[diff] [blame]3; RUN: llc < %s -march=x86 -x86-asm-syntax=intel | \
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000[diff] [blame]4; RUN: not grep {mov CL, BL}
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6; PR687
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Tanya Lattner632e88a2008-02-21 07:42:26 +0000[diff] [blame]8define i64 @foo(i64 %x, i64* %X) {
9 %tmp.1 = load i64* %X ; <i64> [#uses=1]
10 %tmp.3 = trunc i64 %tmp.1 to i8 ; <i8> [#uses=1]
11 %shift.upgrd.1 = zext i8 %tmp.3 to i64 ; <i64> [#uses=1]
12 %tmp.4 = shl i64 %x, %shift.upgrd.1 ; <i64> [#uses=1]
13 ret i64 %tmp.4
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000[diff] [blame]14}
Tanya Lattner632e88a2008-02-21 07:42:26 +0000[diff] [blame]15