Tony Linthicum | b4b5415 | 2011-12-12 21:14:40 +0000 | [diff] [blame] | 1 | //===-- llvm/CallingConvLower.cpp - Calling Convention lowering -----------===// |
| 2 | // |
| 3 | // The LLVM Compiler Infrastructure |
| 4 | // |
| 5 | // This file is distributed under the University of Illinois Open Source |
| 6 | // License. See LICENSE.TXT for details. |
| 7 | // |
| 8 | //===----------------------------------------------------------------------===// |
| 9 | // |
| 10 | // This file implements the Hexagon_CCState class, used for lowering and |
| 11 | // implementing calling conventions. Adapted from the machine independent |
| 12 | // version of the class (CCState) but this handles calls to varargs functions |
| 13 | // |
| 14 | //===----------------------------------------------------------------------===// |
| 15 | |
| 16 | #include "HexagonCallingConvLower.h" |
| 17 | #include "llvm/Target/TargetRegisterInfo.h" |
| 18 | #include "llvm/Target/TargetData.h" |
| 19 | #include "llvm/Target/TargetMachine.h" |
| 20 | #include "llvm/Support/Debug.h" |
| 21 | #include "llvm/Support/ErrorHandling.h" |
| 22 | #include "llvm/Support/raw_ostream.h" |
| 23 | #include "Hexagon.h" |
| 24 | using namespace llvm; |
| 25 | |
| 26 | Hexagon_CCState::Hexagon_CCState(CallingConv::ID CC, bool isVarArg, |
| 27 | const TargetMachine &tm, |
| 28 | SmallVector<CCValAssign, 16> &locs, |
| 29 | LLVMContext &c) |
| 30 | : CallingConv(CC), IsVarArg(isVarArg), TM(tm), |
| 31 | TRI(*TM.getRegisterInfo()), Locs(locs), Context(c) { |
| 32 | // No stack is used. |
| 33 | StackOffset = 0; |
| 34 | |
| 35 | UsedRegs.resize((TRI.getNumRegs()+31)/32); |
| 36 | } |
| 37 | |
| 38 | // HandleByVal - Allocate a stack slot large enough to pass an argument by |
| 39 | // value. The size and alignment information of the argument is encoded in its |
| 40 | // parameter attribute. |
| 41 | void Hexagon_CCState::HandleByVal(unsigned ValNo, EVT ValVT, |
| 42 | EVT LocVT, CCValAssign::LocInfo LocInfo, |
| 43 | int MinSize, int MinAlign, |
| 44 | ISD::ArgFlagsTy ArgFlags) { |
| 45 | unsigned Align = ArgFlags.getByValAlign(); |
| 46 | unsigned Size = ArgFlags.getByValSize(); |
| 47 | if (MinSize > (int)Size) |
| 48 | Size = MinSize; |
| 49 | if (MinAlign > (int)Align) |
| 50 | Align = MinAlign; |
| 51 | unsigned Offset = AllocateStack(Size, Align); |
| 52 | |
| 53 | addLoc(CCValAssign::getMem(ValNo, ValVT.getSimpleVT(), Offset, |
| 54 | LocVT.getSimpleVT(), LocInfo)); |
| 55 | } |
| 56 | |
| 57 | /// MarkAllocated - Mark a register and all of its aliases as allocated. |
| 58 | void Hexagon_CCState::MarkAllocated(unsigned Reg) { |
| 59 | UsedRegs[Reg/32] |= 1 << (Reg&31); |
| 60 | |
| 61 | if (const unsigned *RegAliases = TRI.getAliasSet(Reg)) |
| 62 | for (; (Reg = *RegAliases); ++RegAliases) |
| 63 | UsedRegs[Reg/32] |= 1 << (Reg&31); |
| 64 | } |
| 65 | |
| 66 | /// AnalyzeFormalArguments - Analyze an ISD::FORMAL_ARGUMENTS node, |
| 67 | /// incorporating info about the formals into this state. |
| 68 | void |
| 69 | Hexagon_CCState::AnalyzeFormalArguments(const SmallVectorImpl<ISD::InputArg> |
| 70 | &Ins, |
| 71 | Hexagon_CCAssignFn Fn, |
| 72 | unsigned SretValueInRegs) { |
| 73 | unsigned NumArgs = Ins.size(); |
| 74 | unsigned i = 0; |
| 75 | |
| 76 | // If the function returns a small struct in registers, skip |
| 77 | // over the first (dummy) argument. |
| 78 | if (SretValueInRegs != 0) { |
| 79 | ++i; |
| 80 | } |
| 81 | |
| 82 | |
| 83 | for (; i != NumArgs; ++i) { |
| 84 | EVT ArgVT = Ins[i].VT; |
| 85 | ISD::ArgFlagsTy ArgFlags = Ins[i].Flags; |
| 86 | if (Fn(i, ArgVT, ArgVT, CCValAssign::Full, ArgFlags, *this, 0, 0, false)) { |
| 87 | dbgs() << "Formal argument #" << i << " has unhandled type " |
| 88 | << ArgVT.getEVTString() << "\n"; |
| 89 | abort(); |
| 90 | } |
| 91 | } |
| 92 | } |
| 93 | |
| 94 | /// AnalyzeReturn - Analyze the returned values of an ISD::RET node, |
| 95 | /// incorporating info about the result values into this state. |
| 96 | void |
| 97 | Hexagon_CCState::AnalyzeReturn(const SmallVectorImpl<ISD::OutputArg> &Outs, |
| 98 | Hexagon_CCAssignFn Fn, |
| 99 | unsigned SretValueInRegs) { |
| 100 | |
| 101 | // For Hexagon, Return small structures in registers. |
| 102 | if (SretValueInRegs != 0) { |
| 103 | if (SretValueInRegs <= 32) { |
| 104 | unsigned Reg = Hexagon::R0; |
| 105 | addLoc(CCValAssign::getReg(0, MVT::i32, Reg, MVT::i32, |
| 106 | CCValAssign::Full)); |
| 107 | return; |
| 108 | } |
| 109 | if (SretValueInRegs <= 64) { |
| 110 | unsigned Reg = Hexagon::D0; |
| 111 | addLoc(CCValAssign::getReg(0, MVT::i64, Reg, MVT::i64, |
| 112 | CCValAssign::Full)); |
| 113 | return; |
| 114 | } |
| 115 | } |
| 116 | |
| 117 | |
| 118 | // Determine which register each value should be copied into. |
| 119 | for (unsigned i = 0, e = Outs.size(); i != e; ++i) { |
| 120 | EVT VT = Outs[i].VT; |
| 121 | ISD::ArgFlagsTy ArgFlags = Outs[i].Flags; |
| 122 | if (Fn(i, VT, VT, CCValAssign::Full, ArgFlags, *this, -1, -1, false)){ |
| 123 | dbgs() << "Return operand #" << i << " has unhandled type " |
| 124 | << VT.getEVTString() << "\n"; |
| 125 | abort(); |
| 126 | } |
| 127 | } |
| 128 | } |
| 129 | |
| 130 | |
| 131 | /// AnalyzeCallOperands - Analyze an ISD::CALL node, incorporating info |
| 132 | /// about the passed values into this state. |
| 133 | void |
| 134 | Hexagon_CCState::AnalyzeCallOperands(const SmallVectorImpl<ISD::OutputArg> |
| 135 | &Outs, |
| 136 | Hexagon_CCAssignFn Fn, |
| 137 | int NonVarArgsParams, |
| 138 | unsigned SretValueSize) { |
| 139 | unsigned NumOps = Outs.size(); |
| 140 | |
| 141 | unsigned i = 0; |
| 142 | // If the called function returns a small struct in registers, skip |
| 143 | // the first actual parameter. We do not want to pass a pointer to |
| 144 | // the stack location. |
| 145 | if (SretValueSize != 0) { |
| 146 | ++i; |
| 147 | } |
| 148 | |
| 149 | for (; i != NumOps; ++i) { |
| 150 | EVT ArgVT = Outs[i].VT; |
| 151 | ISD::ArgFlagsTy ArgFlags = Outs[i].Flags; |
| 152 | if (Fn(i, ArgVT, ArgVT, CCValAssign::Full, ArgFlags, *this, |
| 153 | NonVarArgsParams, i+1, false)) { |
| 154 | dbgs() << "Call operand #" << i << " has unhandled type " |
| 155 | << ArgVT.getEVTString() << "\n"; |
| 156 | abort(); |
| 157 | } |
| 158 | } |
| 159 | } |
| 160 | |
| 161 | /// AnalyzeCallOperands - Same as above except it takes vectors of types |
| 162 | /// and argument flags. |
| 163 | void |
| 164 | Hexagon_CCState::AnalyzeCallOperands(SmallVectorImpl<EVT> &ArgVTs, |
| 165 | SmallVectorImpl<ISD::ArgFlagsTy> &Flags, |
| 166 | Hexagon_CCAssignFn Fn) { |
| 167 | unsigned NumOps = ArgVTs.size(); |
| 168 | for (unsigned i = 0; i != NumOps; ++i) { |
| 169 | EVT ArgVT = ArgVTs[i]; |
| 170 | ISD::ArgFlagsTy ArgFlags = Flags[i]; |
| 171 | if (Fn(i, ArgVT, ArgVT, CCValAssign::Full, ArgFlags, *this, -1, -1, |
| 172 | false)) { |
| 173 | dbgs() << "Call operand #" << i << " has unhandled type " |
| 174 | << ArgVT.getEVTString() << "\n"; |
| 175 | abort(); |
| 176 | } |
| 177 | } |
| 178 | } |
| 179 | |
| 180 | /// AnalyzeCallResult - Analyze the return values of an ISD::CALL node, |
| 181 | /// incorporating info about the passed values into this state. |
| 182 | void |
| 183 | Hexagon_CCState::AnalyzeCallResult(const SmallVectorImpl<ISD::InputArg> &Ins, |
| 184 | Hexagon_CCAssignFn Fn, |
| 185 | unsigned SretValueInRegs) { |
| 186 | |
| 187 | for (unsigned i = 0, e = Ins.size(); i != e; ++i) { |
| 188 | EVT VT = Ins[i].VT; |
| 189 | ISD::ArgFlagsTy Flags = ISD::ArgFlagsTy(); |
| 190 | if (Fn(i, VT, VT, CCValAssign::Full, Flags, *this, -1, -1, false)) { |
| 191 | dbgs() << "Call result #" << i << " has unhandled type " |
| 192 | << VT.getEVTString() << "\n"; |
| 193 | abort(); |
| 194 | } |
| 195 | } |
| 196 | } |
| 197 | |
| 198 | /// AnalyzeCallResult - Same as above except it's specialized for calls which |
| 199 | /// produce a single value. |
| 200 | void Hexagon_CCState::AnalyzeCallResult(EVT VT, Hexagon_CCAssignFn Fn) { |
| 201 | if (Fn(0, VT, VT, CCValAssign::Full, ISD::ArgFlagsTy(), *this, -1, -1, |
| 202 | false)) { |
| 203 | dbgs() << "Call result has unhandled type " |
| 204 | << VT.getEVTString() << "\n"; |
| 205 | abort(); |
| 206 | } |
| 207 | } |