blob: 58c2068bc8f4ae7b5a27059df80d642de1543184 [file] [log] [blame]
Bob Wilson5bafff32009-06-22 23:27:02 +00001; RUN: llvm-as < %s | llc -march=arm -mattr=+neon > %t
2; RUN: grep {vceq\\.f32} %t | count 1
3; RUN: grep {vcgt\\.f32} %t | count 9
4; RUN: grep {vcge\\.f32} %t | count 5
5; RUN: grep vorr %t | count 4
6; RUN: grep vmvn %t | count 7
7
8; This tests vfcmp operations that do not map directly to NEON instructions.
9
10; une is implemented with VCEQ/VMVN
11define <2 x i32> @vcunef32(<2 x float>* %A, <2 x float>* %B) nounwind {
12 %tmp1 = load <2 x float>* %A
13 %tmp2 = load <2 x float>* %B
14 %tmp3 = vfcmp une <2 x float> %tmp1, %tmp2
15 ret <2 x i32> %tmp3
16}
17
18; olt is implemented with VCGT
19define <2 x i32> @vcoltf32(<2 x float>* %A, <2 x float>* %B) nounwind {
20 %tmp1 = load <2 x float>* %A
21 %tmp2 = load <2 x float>* %B
22 %tmp3 = vfcmp olt <2 x float> %tmp1, %tmp2
23 ret <2 x i32> %tmp3
24}
25
26; ole is implemented with VCGE
27define <2 x i32> @vcolef32(<2 x float>* %A, <2 x float>* %B) nounwind {
28 %tmp1 = load <2 x float>* %A
29 %tmp2 = load <2 x float>* %B
30 %tmp3 = vfcmp ole <2 x float> %tmp1, %tmp2
31 ret <2 x i32> %tmp3
32}
33
34; uge is implemented with VCGT/VMVN
35define <2 x i32> @vcugef32(<2 x float>* %A, <2 x float>* %B) nounwind {
36 %tmp1 = load <2 x float>* %A
37 %tmp2 = load <2 x float>* %B
38 %tmp3 = vfcmp uge <2 x float> %tmp1, %tmp2
39 ret <2 x i32> %tmp3
40}
41
42; ule is implemented with VCGT/VMVN
43define <2 x i32> @vculef32(<2 x float>* %A, <2 x float>* %B) nounwind {
44 %tmp1 = load <2 x float>* %A
45 %tmp2 = load <2 x float>* %B
46 %tmp3 = vfcmp ule <2 x float> %tmp1, %tmp2
47 ret <2 x i32> %tmp3
48}
49
50; ugt is implemented with VCGE/VMVN
51define <2 x i32> @vcugtf32(<2 x float>* %A, <2 x float>* %B) nounwind {
52 %tmp1 = load <2 x float>* %A
53 %tmp2 = load <2 x float>* %B
54 %tmp3 = vfcmp ugt <2 x float> %tmp1, %tmp2
55 ret <2 x i32> %tmp3
56}
57
58; ult is implemented with VCGE/VMVN
59define <2 x i32> @vcultf32(<2 x float>* %A, <2 x float>* %B) nounwind {
60 %tmp1 = load <2 x float>* %A
61 %tmp2 = load <2 x float>* %B
62 %tmp3 = vfcmp ult <2 x float> %tmp1, %tmp2
63 ret <2 x i32> %tmp3
64}
65
66; ueq is implemented with VCGT/VCGT/VORR/VMVN
67define <2 x i32> @vcueqf32(<2 x float>* %A, <2 x float>* %B) nounwind {
68 %tmp1 = load <2 x float>* %A
69 %tmp2 = load <2 x float>* %B
70 %tmp3 = vfcmp ueq <2 x float> %tmp1, %tmp2
71 ret <2 x i32> %tmp3
72}
73
74; one is implemented with VCGT/VCGT/VORR
75define <2 x i32> @vconef32(<2 x float>* %A, <2 x float>* %B) nounwind {
76 %tmp1 = load <2 x float>* %A
77 %tmp2 = load <2 x float>* %B
78 %tmp3 = vfcmp one <2 x float> %tmp1, %tmp2
79 ret <2 x i32> %tmp3
80}
81
82; uno is implemented with VCGT/VCGE/VORR/VMVN
83define <2 x i32> @vcunof32(<2 x float>* %A, <2 x float>* %B) nounwind {
84 %tmp1 = load <2 x float>* %A
85 %tmp2 = load <2 x float>* %B
86 %tmp3 = vfcmp uno <2 x float> %tmp1, %tmp2
87 ret <2 x i32> %tmp3
88}
89
90; ord is implemented with VCGT/VCGE/VORR
91define <2 x i32> @vcordf32(<2 x float>* %A, <2 x float>* %B) nounwind {
92 %tmp1 = load <2 x float>* %A
93 %tmp2 = load <2 x float>* %B
94 %tmp3 = vfcmp ord <2 x float> %tmp1, %tmp2
95 ret <2 x i32> %tmp3
96}