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Chris Lattner97f06932009-10-19 20:20:46 +00001//===-- ARMAsmPrinter.cpp - Print machine code to an ARM .s file ----------===//
2//
Rafael Espindola7bc59bc2006-05-14 22:18:28 +00003// The LLVM Compiler Infrastructure
4//
Chris Lattner4ee451d2007-12-29 20:36:04 +00005// This file is distributed under the University of Illinois Open Source
Rafael Espindola7bc59bc2006-05-14 22:18:28 +00006// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file contains a printer that converts from our internal representation
11// of machine-dependent LLVM code to GAS-format ARM assembly language.
12//
13//===----------------------------------------------------------------------===//
14
Chris Lattner95b2c7d2006-12-19 22:59:26 +000015#define DEBUG_TYPE "asm-printer"
Rafael Espindola7bc59bc2006-05-14 22:18:28 +000016#include "ARM.h"
Anton Korobeynikov88ce6672009-05-23 19:51:20 +000017#include "ARMBuildAttrs.h"
Evan Chenga8e29892007-01-19 07:51:42 +000018#include "ARMAddressingModes.h"
19#include "ARMConstantPoolValue.h"
Jim Grosbach7ac16092010-10-01 22:39:28 +000020#include "InstPrinter/ARMInstPrinter.h"
Chris Lattner97f06932009-10-19 20:20:46 +000021#include "ARMMachineFunctionInfo.h"
Chris Lattner97f06932009-10-19 20:20:46 +000022#include "ARMTargetMachine.h"
Jason W Kim17b443d2010-10-11 23:01:44 +000023#include "ARMTargetObjectFile.h"
Dale Johannesen3f282aa2010-04-26 20:07:31 +000024#include "llvm/Analysis/DebugInfo.h"
Rafael Espindola7bc59bc2006-05-14 22:18:28 +000025#include "llvm/Constants.h"
Rafael Espindola7bc59bc2006-05-14 22:18:28 +000026#include "llvm/Module.h"
Benjamin Kramere55b15f2009-12-28 12:27:56 +000027#include "llvm/Type.h"
Dan Gohmancf20ac42009-08-13 01:36:44 +000028#include "llvm/Assembly/Writer.h"
Rafael Espindola7bc59bc2006-05-14 22:18:28 +000029#include "llvm/CodeGen/AsmPrinter.h"
Chris Lattnerb0f294c2009-10-19 18:38:33 +000030#include "llvm/CodeGen/MachineModuleInfoImpls.h"
Rafael Espindola7bc59bc2006-05-14 22:18:28 +000031#include "llvm/CodeGen/MachineFunctionPass.h"
Evan Chenga8e29892007-01-19 07:51:42 +000032#include "llvm/CodeGen/MachineJumpTableInfo.h"
Chris Lattnerb0f294c2009-10-19 18:38:33 +000033#include "llvm/MC/MCAsmInfo.h"
Rafael Espindolacecbc3d2010-10-25 17:50:35 +000034#include "llvm/MC/MCAssembler.h"
Chris Lattnerb0f294c2009-10-19 18:38:33 +000035#include "llvm/MC/MCContext.h"
Bill Wendlingbecd83e2010-03-09 00:40:17 +000036#include "llvm/MC/MCExpr.h"
Chris Lattner97f06932009-10-19 20:20:46 +000037#include "llvm/MC/MCInst.h"
Chris Lattnerf9bdedd2009-08-10 18:15:01 +000038#include "llvm/MC/MCSectionMachO.h"
Rafael Espindolacecbc3d2010-10-25 17:50:35 +000039#include "llvm/MC/MCObjectStreamer.h"
Chris Lattner6c2f9e12009-08-19 05:49:37 +000040#include "llvm/MC/MCStreamer.h"
Chris Lattner325d3dc2009-09-13 17:14:04 +000041#include "llvm/MC/MCSymbol.h"
Chris Lattnerd62f1b42010-03-12 21:19:23 +000042#include "llvm/Target/Mangler.h"
Rafael Espindolab01c4bb2006-07-27 11:38:51 +000043#include "llvm/Target/TargetData.h"
Rafael Espindola7bc59bc2006-05-14 22:18:28 +000044#include "llvm/Target/TargetMachine.h"
Evan Cheng5be54b02007-01-19 19:25:36 +000045#include "llvm/Target/TargetOptions.h"
Daniel Dunbar51b198a2009-07-15 20:24:03 +000046#include "llvm/Target/TargetRegistry.h"
Evan Chengc324ecb2009-07-24 18:19:46 +000047#include "llvm/ADT/SmallPtrSet.h"
Jim Grosbachc40d9f92009-09-01 18:49:12 +000048#include "llvm/ADT/SmallString.h"
Bob Wilson54c78ef2009-11-06 23:33:28 +000049#include "llvm/ADT/StringExtras.h"
Chris Lattner97f06932009-10-19 20:20:46 +000050#include "llvm/Support/CommandLine.h"
Devang Patel59135f42010-08-04 22:39:39 +000051#include "llvm/Support/Debug.h"
Torok Edwin30464702009-07-08 20:55:50 +000052#include "llvm/Support/ErrorHandling.h"
Chris Lattnerb23569a2010-04-04 08:18:47 +000053#include "llvm/Support/raw_ostream.h"
Rafael Espindola7bc59bc2006-05-14 22:18:28 +000054#include <cctype>
Rafael Espindola7bc59bc2006-05-14 22:18:28 +000055using namespace llvm;
56
Jim Grosbach91729002010-07-21 23:03:52 +000057namespace llvm {
58 namespace ARM {
59 enum DW_ISA {
60 DW_ISA_ARM_thumb = 1,
61 DW_ISA_ARM_arm = 2
62 };
63 }
64}
65
Chris Lattner95b2c7d2006-12-19 22:59:26 +000066namespace {
Rafael Espindolacecbc3d2010-10-25 17:50:35 +000067
68 // Per section and per symbol attributes are not supported.
69 // To implement them we would need the ability to delay this emission
70 // until the assembly file is fully parsed/generated as only then do we
71 // know the symbol and section numbers.
72 class AttributeEmitter {
73 public:
74 virtual void MaybeSwitchVendor(StringRef Vendor) = 0;
75 virtual void EmitAttribute(unsigned Attribute, unsigned Value) = 0;
76 virtual void Finish() = 0;
Rafael Espindola4921e232010-10-25 18:38:32 +000077 virtual ~AttributeEmitter() {}
Rafael Espindolacecbc3d2010-10-25 17:50:35 +000078 };
79
80 class AsmAttributeEmitter : public AttributeEmitter {
81 MCStreamer &Streamer;
82
83 public:
84 AsmAttributeEmitter(MCStreamer &Streamer_) : Streamer(Streamer_) {}
85 void MaybeSwitchVendor(StringRef Vendor) { }
86
87 void EmitAttribute(unsigned Attribute, unsigned Value) {
88 Streamer.EmitRawText("\t.eabi_attribute " +
89 Twine(Attribute) + ", " + Twine(Value));
90 }
91
92 void Finish() { }
93 };
94
95 class ObjectAttributeEmitter : public AttributeEmitter {
96 MCObjectStreamer &Streamer;
Rafael Espindolacecbc3d2010-10-25 17:50:35 +000097 StringRef CurrentVendor;
98 SmallString<64> Contents;
99
100 public:
101 ObjectAttributeEmitter(MCObjectStreamer &Streamer_) :
102 Streamer(Streamer_), CurrentVendor("") { }
103
104 void MaybeSwitchVendor(StringRef Vendor) {
105 assert(!Vendor.empty() && "Vendor cannot be empty.");
106
107 if (CurrentVendor.empty())
108 CurrentVendor = Vendor;
109 else if (CurrentVendor == Vendor)
110 return;
111 else
112 Finish();
113
114 CurrentVendor = Vendor;
115
Rafael Espindola33363842010-10-25 22:26:55 +0000116 assert(Contents.size() == 0);
Rafael Espindolacecbc3d2010-10-25 17:50:35 +0000117 }
118
119 void EmitAttribute(unsigned Attribute, unsigned Value) {
120 // FIXME: should be ULEB
121 Contents += Attribute;
122 Contents += Value;
123 }
124
125 void Finish() {
Rafael Espindola33363842010-10-25 22:26:55 +0000126 const size_t ContentsSize = Contents.size();
Rafael Espindolacecbc3d2010-10-25 17:50:35 +0000127
Rafael Espindola33363842010-10-25 22:26:55 +0000128 // Vendor size + Vendor name + '\0'
129 const size_t VendorHeaderSize = 4 + CurrentVendor.size() + 1;
Rafael Espindolacecbc3d2010-10-25 17:50:35 +0000130
Rafael Espindola33363842010-10-25 22:26:55 +0000131 // Tag + Tag Size
132 const size_t TagHeaderSize = 1 + 4;
133
134 Streamer.EmitIntValue(VendorHeaderSize + TagHeaderSize + ContentsSize, 4);
135 Streamer.EmitBytes(CurrentVendor, 0);
136 Streamer.EmitIntValue(0, 1); // '\0'
137
138 Streamer.EmitIntValue(ARMBuildAttrs::File, 1);
139 Streamer.EmitIntValue(TagHeaderSize + ContentsSize, 4);
Rafael Espindolacecbc3d2010-10-25 17:50:35 +0000140
141 Streamer.EmitBytes(Contents, 0);
Rafael Espindola33363842010-10-25 22:26:55 +0000142
143 Contents.clear();
Rafael Espindolacecbc3d2010-10-25 17:50:35 +0000144 }
145 };
146
Chris Lattner4a071d62009-10-19 17:59:19 +0000147 class ARMAsmPrinter : public AsmPrinter {
Evan Chenga8e29892007-01-19 07:51:42 +0000148
149 /// Subtarget - Keep a pointer to the ARMSubtarget around so that we can
150 /// make the right decision when printing asm code for different targets.
151 const ARMSubtarget *Subtarget;
152
153 /// AFI - Keep a pointer to ARMFunctionInfo for the current
Evan Cheng6d63a722008-09-18 07:27:23 +0000154 /// MachineFunction.
Evan Chenga8e29892007-01-19 07:51:42 +0000155 ARMFunctionInfo *AFI;
156
Evan Cheng6d63a722008-09-18 07:27:23 +0000157 /// MCP - Keep a pointer to constantpool entries of the current
158 /// MachineFunction.
159 const MachineConstantPool *MCP;
160
Bill Wendling57f0db82009-02-24 08:30:20 +0000161 public:
Chris Lattnerb23569a2010-04-04 08:18:47 +0000162 explicit ARMAsmPrinter(TargetMachine &TM, MCStreamer &Streamer)
163 : AsmPrinter(TM, Streamer), AFI(NULL), MCP(NULL) {
Bill Wendling57f0db82009-02-24 08:30:20 +0000164 Subtarget = &TM.getSubtarget<ARMSubtarget>();
165 }
166
Rafael Espindola7bc59bc2006-05-14 22:18:28 +0000167 virtual const char *getPassName() const {
168 return "ARM Assembly Printer";
169 }
Jim Grosbachb0739b72010-09-02 01:02:06 +0000170
Chris Lattner35c33bd2010-04-04 04:47:45 +0000171 void printOperand(const MachineInstr *MI, int OpNum, raw_ostream &O,
Evan Chenga8e29892007-01-19 07:51:42 +0000172 const char *Modifier = 0);
Bob Wilson54c78ef2009-11-06 23:33:28 +0000173
Evan Cheng055b0312009-06-29 07:51:04 +0000174 virtual bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNum,
Chris Lattnerc75c0282010-04-04 05:29:35 +0000175 unsigned AsmVariant, const char *ExtraCode,
176 raw_ostream &O);
Evan Cheng055b0312009-06-29 07:51:04 +0000177 virtual bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNum,
Bob Wilson224c2442009-05-19 05:53:42 +0000178 unsigned AsmVariant,
Chris Lattnerc75c0282010-04-04 05:29:35 +0000179 const char *ExtraCode, raw_ostream &O);
Rafael Espindola7bc59bc2006-05-14 22:18:28 +0000180
Jim Grosbach2317e402010-09-30 01:57:53 +0000181 void EmitJumpTable(const MachineInstr *MI);
182 void EmitJump2Table(const MachineInstr *MI);
Chris Lattnera786cea2010-01-28 01:10:34 +0000183 virtual void EmitInstruction(const MachineInstr *MI);
Rafael Espindola7bc59bc2006-05-14 22:18:28 +0000184 bool runOnMachineFunction(MachineFunction &F);
Jim Grosbachb0739b72010-09-02 01:02:06 +0000185
Chris Lattnera2406192010-01-28 00:19:24 +0000186 virtual void EmitConstantPool() {} // we emit constant pools customly!
Chris Lattner953ebb72010-01-27 23:58:11 +0000187 virtual void EmitFunctionEntryLabel();
Bob Wilson812209a2009-09-30 22:06:26 +0000188 void EmitStartOfAsmFile(Module &M);
Chris Lattner4a071d62009-10-19 17:59:19 +0000189 void EmitEndOfAsmFile(Module &M);
Evan Chenga8e29892007-01-19 07:51:42 +0000190
Jason W Kimdef9ac42010-10-06 22:36:46 +0000191 private:
192 // Helpers for EmitStartOfAsmFile() and EmitEndOfAsmFile()
193 void emitAttributes();
Jason W Kimdef9ac42010-10-06 22:36:46 +0000194
Jason W Kim17b443d2010-10-11 23:01:44 +0000195 // Helper for ELF .o only
196 void emitARMAttributeSection();
197
Jason W Kimdef9ac42010-10-06 22:36:46 +0000198 public:
Jim Grosbach2d0f53b2010-09-28 17:05:56 +0000199 void PrintDebugValueComment(const MachineInstr *MI, raw_ostream &OS);
200
Devang Patel59135f42010-08-04 22:39:39 +0000201 MachineLocation getDebugValueLocation(const MachineInstr *MI) const {
202 MachineLocation Location;
Chris Lattner2ac19022010-11-15 05:19:05 +0000203 assert(MI->getNumOperands() == 4 && "Invalid no. of machine operands!");
Devang Patel59135f42010-08-04 22:39:39 +0000204 // Frame address. Currently handles register +- offset only.
205 if (MI->getOperand(0).isReg() && MI->getOperand(1).isImm())
206 Location.set(MI->getOperand(0).getReg(), MI->getOperand(1).getImm());
207 else {
208 DEBUG(dbgs() << "DBG_VALUE instruction ignored! " << *MI << "\n");
209 }
210 return Location;
211 }
212
Jim Grosbach91729002010-07-21 23:03:52 +0000213 virtual unsigned getISAEncoding() {
214 // ARM/Darwin adds ISA to the DWARF info for each function.
215 if (!Subtarget->isTargetDarwin())
216 return 0;
217 return Subtarget->isThumb() ?
218 llvm::ARM::DW_ISA_ARM_thumb : llvm::ARM::DW_ISA_ARM_arm;
219 }
220
Chris Lattner0890cf12010-01-25 19:51:38 +0000221 MCSymbol *GetARMSetPICJumpTableLabel2(unsigned uid, unsigned uid2,
222 const MachineBasicBlock *MBB) const;
223 MCSymbol *GetARMJTIPICJumpTableLabel2(unsigned uid, unsigned uid2) const;
Chris Lattnerbfcb0962010-01-25 19:39:52 +0000224
Jim Grosbach433a5782010-09-24 20:47:58 +0000225 MCSymbol *GetARMSJLJEHLabel(void) const;
226
Evan Cheng711b6dc2008-08-08 06:56:16 +0000227 /// EmitMachineConstantPoolValue - Print a machine constantpool value to
228 /// the .s file.
Jim Grosbach5df08d82010-11-09 18:45:04 +0000229 virtual void EmitMachineConstantPoolValue(MachineConstantPoolValue *MCPV);
Rafael Espindola7bc59bc2006-05-14 22:18:28 +0000230 };
231} // end of anonymous namespace
232
Chris Lattner953ebb72010-01-27 23:58:11 +0000233void ARMAsmPrinter::EmitFunctionEntryLabel() {
234 if (AFI->isThumbFunction()) {
Jim Grosbachce792992010-11-05 22:08:08 +0000235 OutStreamer.EmitAssemblerFlag(MCAF_Code16);
236 OutStreamer.EmitThumbFunc(Subtarget->isTargetDarwin()? CurrentFnSym : 0);
Chris Lattner953ebb72010-01-27 23:58:11 +0000237 }
Jim Grosbachb0739b72010-09-02 01:02:06 +0000238
Chris Lattner953ebb72010-01-27 23:58:11 +0000239 OutStreamer.EmitLabel(CurrentFnSym);
240}
241
Jim Grosbach2317e402010-09-30 01:57:53 +0000242/// runOnMachineFunction - This uses the EmitInstruction()
Rafael Espindola7bc59bc2006-05-14 22:18:28 +0000243/// method to print assembly for each instruction.
244///
245bool ARMAsmPrinter::runOnMachineFunction(MachineFunction &MF) {
Evan Chenga8e29892007-01-19 07:51:42 +0000246 AFI = MF.getInfo<ARMFunctionInfo>();
Evan Cheng6d63a722008-09-18 07:27:23 +0000247 MCP = MF.getConstantPool();
Rafael Espindola4b442b52006-05-23 02:48:20 +0000248
Chris Lattnerd49fe1b2010-01-28 01:28:58 +0000249 return AsmPrinter::runOnMachineFunction(MF);
Rafael Espindola7bc59bc2006-05-14 22:18:28 +0000250}
251
Evan Cheng055b0312009-06-29 07:51:04 +0000252void ARMAsmPrinter::printOperand(const MachineInstr *MI, int OpNum,
Chris Lattner35c33bd2010-04-04 04:47:45 +0000253 raw_ostream &O, const char *Modifier) {
Evan Cheng055b0312009-06-29 07:51:04 +0000254 const MachineOperand &MO = MI->getOperand(OpNum);
Anton Korobeynikov5cdc3a92009-11-24 00:44:37 +0000255 unsigned TF = MO.getTargetFlags();
256
Rafael Espindola2f99b6b2006-05-25 12:57:06 +0000257 switch (MO.getType()) {
Chris Lattner8bc86cb2009-10-19 20:59:55 +0000258 default:
259 assert(0 && "<unknown operand type>");
Bob Wilson5bafff32009-06-22 23:27:02 +0000260 case MachineOperand::MO_Register: {
261 unsigned Reg = MO.getReg();
Chris Lattner8bc86cb2009-10-19 20:59:55 +0000262 assert(TargetRegisterInfo::isPhysicalRegister(Reg));
Jim Grosbach35636282010-10-06 21:22:32 +0000263 assert(!MO.getSubReg() && "Subregs should be eliminated!");
264 O << ARMInstPrinter::getRegisterName(Reg);
Rafael Espindola2f99b6b2006-05-25 12:57:06 +0000265 break;
Bob Wilson5bafff32009-06-22 23:27:02 +0000266 }
Evan Chenga8e29892007-01-19 07:51:42 +0000267 case MachineOperand::MO_Immediate: {
Evan Cheng5adb66a2009-09-28 09:14:39 +0000268 int64_t Imm = MO.getImm();
Anton Korobeynikov632606c2009-10-08 20:43:22 +0000269 O << '#';
Anton Korobeynikov5cdc3a92009-11-24 00:44:37 +0000270 if ((Modifier && strcmp(Modifier, "lo16") == 0) ||
Jim Grosbach4dea9412010-10-06 16:51:55 +0000271 (TF == ARMII::MO_LO16))
Anton Korobeynikov5cdc3a92009-11-24 00:44:37 +0000272 O << ":lower16:";
273 else if ((Modifier && strcmp(Modifier, "hi16") == 0) ||
Jim Grosbach4dea9412010-10-06 16:51:55 +0000274 (TF == ARMII::MO_HI16))
Anton Korobeynikov5cdc3a92009-11-24 00:44:37 +0000275 O << ":upper16:";
Anton Korobeynikov632606c2009-10-08 20:43:22 +0000276 O << Imm;
Rafael Espindola2f99b6b2006-05-25 12:57:06 +0000277 break;
Evan Chenga8e29892007-01-19 07:51:42 +0000278 }
Rafael Espindola2f99b6b2006-05-25 12:57:06 +0000279 case MachineOperand::MO_MachineBasicBlock:
Chris Lattner1b2eb0e2010-03-13 21:04:28 +0000280 O << *MO.getMBB()->getSymbol();
Rafael Espindola2f99b6b2006-05-25 12:57:06 +0000281 return;
Rafael Espindola84b19be2006-07-16 01:02:57 +0000282 case MachineOperand::MO_GlobalAddress: {
Dan Gohman46510a72010-04-15 01:51:59 +0000283 const GlobalValue *GV = MO.getGlobal();
Anton Korobeynikov5cdc3a92009-11-24 00:44:37 +0000284 if ((Modifier && strcmp(Modifier, "lo16") == 0) ||
285 (TF & ARMII::MO_LO16))
286 O << ":lower16:";
287 else if ((Modifier && strcmp(Modifier, "hi16") == 0) ||
288 (TF & ARMII::MO_HI16))
289 O << ":upper16:";
Chris Lattnerd62f1b42010-03-12 21:19:23 +0000290 O << *Mang->getSymbol(GV);
Anton Korobeynikov7751ad92008-11-22 16:15:34 +0000291
Chris Lattner0c08d092010-04-03 22:28:33 +0000292 printOffset(MO.getOffset(), O);
Jim Grosbach1d6111c2010-10-06 21:36:43 +0000293 if (TF == ARMII::MO_PLT)
Lauro Ramos Venancio0ae4a332007-04-22 00:04:12 +0000294 O << "(PLT)";
Evan Chenga8e29892007-01-19 07:51:42 +0000295 break;
Rafael Espindola84b19be2006-07-16 01:02:57 +0000296 }
Evan Chenga8e29892007-01-19 07:51:42 +0000297 case MachineOperand::MO_ExternalSymbol: {
Chris Lattner10b318b2010-01-17 21:43:43 +0000298 O << *GetExternalSymbolSymbol(MO.getSymbolName());
Jim Grosbach1d6111c2010-10-06 21:36:43 +0000299 if (TF == ARMII::MO_PLT)
Lauro Ramos Venancio0ae4a332007-04-22 00:04:12 +0000300 O << "(PLT)";
Rafael Espindola2f99b6b2006-05-25 12:57:06 +0000301 break;
Evan Chenga8e29892007-01-19 07:51:42 +0000302 }
Rafael Espindola2f99b6b2006-05-25 12:57:06 +0000303 case MachineOperand::MO_ConstantPoolIndex:
Chris Lattner1b46f432010-01-23 07:00:21 +0000304 O << *GetCPISymbol(MO.getIndex());
Rafael Espindola2f99b6b2006-05-25 12:57:06 +0000305 break;
Evan Chenga8e29892007-01-19 07:51:42 +0000306 case MachineOperand::MO_JumpTableIndex:
Chris Lattner1b46f432010-01-23 07:00:21 +0000307 O << *GetJTISymbol(MO.getIndex());
Evan Chenga8e29892007-01-19 07:51:42 +0000308 break;
Rafael Espindola2f99b6b2006-05-25 12:57:06 +0000309 }
Rafael Espindola7bc59bc2006-05-14 22:18:28 +0000310}
311
Evan Cheng055b0312009-06-29 07:51:04 +0000312//===--------------------------------------------------------------------===//
313
Chris Lattner0890cf12010-01-25 19:51:38 +0000314MCSymbol *ARMAsmPrinter::
315GetARMSetPICJumpTableLabel2(unsigned uid, unsigned uid2,
316 const MachineBasicBlock *MBB) const {
317 SmallString<60> Name;
318 raw_svector_ostream(Name) << MAI->getPrivateGlobalPrefix()
Chris Lattnerbfcb0962010-01-25 19:39:52 +0000319 << getFunctionNumber() << '_' << uid << '_' << uid2
Chris Lattner0890cf12010-01-25 19:51:38 +0000320 << "_set_" << MBB->getNumber();
Chris Lattner9b97a732010-03-30 18:10:53 +0000321 return OutContext.GetOrCreateSymbol(Name.str());
Chris Lattner0890cf12010-01-25 19:51:38 +0000322}
323
324MCSymbol *ARMAsmPrinter::
325GetARMJTIPICJumpTableLabel2(unsigned uid, unsigned uid2) const {
326 SmallString<60> Name;
327 raw_svector_ostream(Name) << MAI->getPrivateGlobalPrefix() << "JTI"
Chris Lattner281e7762010-01-25 23:28:03 +0000328 << getFunctionNumber() << '_' << uid << '_' << uid2;
Chris Lattner9b97a732010-03-30 18:10:53 +0000329 return OutContext.GetOrCreateSymbol(Name.str());
Chris Lattnerbfcb0962010-01-25 19:39:52 +0000330}
331
Jim Grosbach433a5782010-09-24 20:47:58 +0000332
333MCSymbol *ARMAsmPrinter::GetARMSJLJEHLabel(void) const {
334 SmallString<60> Name;
335 raw_svector_ostream(Name) << MAI->getPrivateGlobalPrefix() << "SJLJEH"
336 << getFunctionNumber();
337 return OutContext.GetOrCreateSymbol(Name.str());
338}
339
Evan Cheng055b0312009-06-29 07:51:04 +0000340bool ARMAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNum,
Chris Lattnerc75c0282010-04-04 05:29:35 +0000341 unsigned AsmVariant, const char *ExtraCode,
342 raw_ostream &O) {
Evan Chenga8e29892007-01-19 07:51:42 +0000343 // Does this asm operand have a single letter operand modifier?
344 if (ExtraCode && ExtraCode[0]) {
345 if (ExtraCode[1] != 0) return true; // Unknown modifier.
Anton Korobeynikov8e9ece72009-08-08 23:10:41 +0000346
Evan Chenga8e29892007-01-19 07:51:42 +0000347 switch (ExtraCode[0]) {
348 default: return true; // Unknown modifier.
Bob Wilson9b4b00a2009-07-09 23:54:51 +0000349 case 'a': // Print as a memory address.
350 if (MI->getOperand(OpNum).isReg()) {
Jim Grosbach2f24c4e2010-09-30 15:25:22 +0000351 O << "["
352 << ARMInstPrinter::getRegisterName(MI->getOperand(OpNum).getReg())
353 << "]";
Bob Wilson9b4b00a2009-07-09 23:54:51 +0000354 return false;
355 }
356 // Fallthrough
357 case 'c': // Don't print "#" before an immediate operand.
Bob Wilson4f38b382009-08-21 21:58:55 +0000358 if (!MI->getOperand(OpNum).isImm())
359 return true;
Jim Grosbach2317e402010-09-30 01:57:53 +0000360 O << MI->getOperand(OpNum).getImm();
Bob Wilson8f343462009-04-06 21:46:51 +0000361 return false;
Evan Chenge21e3962007-04-04 00:13:29 +0000362 case 'P': // Print a VFP double precision register.
Evan Chengd831cda2009-12-08 23:06:22 +0000363 case 'q': // Print a NEON quad precision register.
Chris Lattner35c33bd2010-04-04 04:47:45 +0000364 printOperand(MI, OpNum, O);
Evan Cheng23a95702007-03-08 22:42:46 +0000365 return false;
Evan Chenga8e29892007-01-19 07:51:42 +0000366 case 'Q':
Bob Wilsond984eb62010-05-27 20:23:42 +0000367 case 'R':
Bob Wilsond984eb62010-05-27 20:23:42 +0000368 case 'H':
Evan Cheng12616722010-05-27 23:45:31 +0000369 report_fatal_error("llvm does not support 'Q', 'R', and 'H' modifiers!");
Bob Wilsond984eb62010-05-27 20:23:42 +0000370 return true;
Evan Cheng84f60b72010-05-27 22:08:38 +0000371 }
Evan Chenga8e29892007-01-19 07:51:42 +0000372 }
Jim Grosbache9952212009-09-04 01:38:51 +0000373
Chris Lattner35c33bd2010-04-04 04:47:45 +0000374 printOperand(MI, OpNum, O);
Evan Chenga8e29892007-01-19 07:51:42 +0000375 return false;
376}
377
Bob Wilson224c2442009-05-19 05:53:42 +0000378bool ARMAsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI,
Evan Cheng055b0312009-06-29 07:51:04 +0000379 unsigned OpNum, unsigned AsmVariant,
Chris Lattnerc75c0282010-04-04 05:29:35 +0000380 const char *ExtraCode,
381 raw_ostream &O) {
Bob Wilson224c2442009-05-19 05:53:42 +0000382 if (ExtraCode && ExtraCode[0])
383 return true; // Unknown modifier.
Bob Wilson765cc0b2009-10-13 20:50:28 +0000384
385 const MachineOperand &MO = MI->getOperand(OpNum);
386 assert(MO.isReg() && "unexpected inline asm memory operand");
Jim Grosbach2317e402010-09-30 01:57:53 +0000387 O << "[" << ARMInstPrinter::getRegisterName(MO.getReg()) << "]";
Bob Wilson224c2442009-05-19 05:53:42 +0000388 return false;
389}
390
Bob Wilson812209a2009-09-30 22:06:26 +0000391void ARMAsmPrinter::EmitStartOfAsmFile(Module &M) {
Bob Wilson0fb34682009-09-30 00:23:42 +0000392 if (Subtarget->isTargetDarwin()) {
393 Reloc::Model RelocM = TM.getRelocationModel();
394 if (RelocM == Reloc::PIC_ || RelocM == Reloc::DynamicNoPIC) {
395 // Declare all the text sections up front (before the DWARF sections
396 // emitted by AsmPrinter::doInitialization) so the assembler will keep
397 // them together at the beginning of the object file. This helps
398 // avoid out-of-range branches that are due a fundamental limitation of
399 // the way symbol offsets are encoded with the current Darwin ARM
400 // relocations.
Jim Grosbachb0739b72010-09-02 01:02:06 +0000401 const TargetLoweringObjectFileMachO &TLOFMacho =
Dan Gohman0d805c32010-04-17 16:44:48 +0000402 static_cast<const TargetLoweringObjectFileMachO &>(
403 getObjFileLowering());
Bob Wilson29e06692009-09-30 22:25:37 +0000404 OutStreamer.SwitchSection(TLOFMacho.getTextSection());
405 OutStreamer.SwitchSection(TLOFMacho.getTextCoalSection());
406 OutStreamer.SwitchSection(TLOFMacho.getConstTextCoalSection());
407 if (RelocM == Reloc::DynamicNoPIC) {
408 const MCSection *sect =
Chris Lattner22772212010-04-08 20:40:11 +0000409 OutContext.getMachOSection("__TEXT", "__symbol_stub4",
410 MCSectionMachO::S_SYMBOL_STUBS,
411 12, SectionKind::getText());
Bob Wilson29e06692009-09-30 22:25:37 +0000412 OutStreamer.SwitchSection(sect);
413 } else {
414 const MCSection *sect =
Chris Lattner22772212010-04-08 20:40:11 +0000415 OutContext.getMachOSection("__TEXT", "__picsymbolstub4",
416 MCSectionMachO::S_SYMBOL_STUBS,
417 16, SectionKind::getText());
Bob Wilson29e06692009-09-30 22:25:37 +0000418 OutStreamer.SwitchSection(sect);
419 }
Bob Wilson63db5942010-07-30 19:55:47 +0000420 const MCSection *StaticInitSect =
421 OutContext.getMachOSection("__TEXT", "__StaticInit",
422 MCSectionMachO::S_REGULAR |
423 MCSectionMachO::S_ATTR_PURE_INSTRUCTIONS,
424 SectionKind::getText());
425 OutStreamer.SwitchSection(StaticInitSect);
Bob Wilson0fb34682009-09-30 00:23:42 +0000426 }
427 }
428
Jim Grosbache5165492009-11-09 00:11:35 +0000429 // Use unified assembler syntax.
Jason W Kimafd1cc22010-09-30 02:45:56 +0000430 OutStreamer.EmitAssemblerFlag(MCAF_SyntaxUnified);
Anton Korobeynikovd61eca52009-06-17 23:43:18 +0000431
Anton Korobeynikov88ce6672009-05-23 19:51:20 +0000432 // Emit ARM Build Attributes
433 if (Subtarget->isTargetELF()) {
Anton Korobeynikov88ce6672009-05-23 19:51:20 +0000434
Jason W Kimdef9ac42010-10-06 22:36:46 +0000435 emitAttributes();
Anton Korobeynikov88ce6672009-05-23 19:51:20 +0000436 }
Rafael Espindola7bc59bc2006-05-14 22:18:28 +0000437}
438
Anton Korobeynikov0f3cc652008-08-07 09:54:23 +0000439
Chris Lattner4a071d62009-10-19 17:59:19 +0000440void ARMAsmPrinter::EmitEndOfAsmFile(Module &M) {
Evan Cheng5be54b02007-01-19 19:25:36 +0000441 if (Subtarget->isTargetDarwin()) {
Chris Lattnerf61159b2009-08-03 22:18:15 +0000442 // All darwin targets use mach-o.
Dan Gohman0d805c32010-04-17 16:44:48 +0000443 const TargetLoweringObjectFileMachO &TLOFMacho =
444 static_cast<const TargetLoweringObjectFileMachO &>(getObjFileLowering());
Chris Lattnerb0f294c2009-10-19 18:38:33 +0000445 MachineModuleInfoMachO &MMIMacho =
446 MMI->getObjFileInfo<MachineModuleInfoMachO>();
Jim Grosbache9952212009-09-04 01:38:51 +0000447
Evan Chenga8e29892007-01-19 07:51:42 +0000448 // Output non-lazy-pointers for external and common global variables.
Chris Lattnerb0f294c2009-10-19 18:38:33 +0000449 MachineModuleInfoMachO::SymbolListTy Stubs = MMIMacho.GetGVStubList();
Bill Wendlingcebae362010-03-10 22:34:10 +0000450
Chris Lattnerb0f294c2009-10-19 18:38:33 +0000451 if (!Stubs.empty()) {
Chris Lattnerff4bc462009-08-10 01:39:42 +0000452 // Switch with ".non_lazy_symbol_pointer" directive.
Chris Lattner6c2f9e12009-08-19 05:49:37 +0000453 OutStreamer.SwitchSection(TLOFMacho.getNonLazySymbolPointerSection());
Chris Lattnerc076a972009-08-10 18:01:34 +0000454 EmitAlignment(2);
Chris Lattnerb0f294c2009-10-19 18:38:33 +0000455 for (unsigned i = 0, e = Stubs.size(); i != e; ++i) {
Bill Wendlingbecd83e2010-03-09 00:40:17 +0000456 // L_foo$stub:
457 OutStreamer.EmitLabel(Stubs[i].first);
458 // .indirect_symbol _foo
Bill Wendling52a50e52010-03-11 01:18:13 +0000459 MachineModuleInfoImpl::StubValueTy &MCSym = Stubs[i].second;
460 OutStreamer.EmitSymbolAttribute(MCSym.getPointer(),MCSA_IndirectSymbol);
Bill Wendlingcf6f28d2010-03-09 00:43:34 +0000461
Bill Wendling52a50e52010-03-11 01:18:13 +0000462 if (MCSym.getInt())
Bill Wendlingcf6f28d2010-03-09 00:43:34 +0000463 // External to current translation unit.
464 OutStreamer.EmitIntValue(0, 4/*size*/, 0/*addrspace*/);
465 else
466 // Internal to current translation unit.
Bill Wendling5e1b55d2010-03-31 18:47:10 +0000467 //
Jim Grosbach1b935a32010-09-22 16:45:13 +0000468 // When we place the LSDA into the TEXT section, the type info
469 // pointers need to be indirect and pc-rel. We accomplish this by
470 // using NLPs; however, sometimes the types are local to the file.
471 // We need to fill in the value for the NLP in those cases.
Bill Wendling52a50e52010-03-11 01:18:13 +0000472 OutStreamer.EmitValue(MCSymbolRefExpr::Create(MCSym.getPointer(),
473 OutContext),
Bill Wendlingcf6f28d2010-03-09 00:43:34 +0000474 4/*size*/, 0/*addrspace*/);
Evan Chengae94e592008-12-05 01:06:39 +0000475 }
Bill Wendlingbecd83e2010-03-09 00:40:17 +0000476
477 Stubs.clear();
478 OutStreamer.AddBlankLine();
Evan Chenga8e29892007-01-19 07:51:42 +0000479 }
480
Chris Lattnere4d9ea82009-10-19 18:44:38 +0000481 Stubs = MMIMacho.GetHiddenGVStubList();
482 if (!Stubs.empty()) {
Chris Lattner6c2f9e12009-08-19 05:49:37 +0000483 OutStreamer.SwitchSection(getObjFileLowering().getDataSection());
Chris Lattnerf3231de2009-08-10 18:02:16 +0000484 EmitAlignment(2);
Bill Wendlingbecd83e2010-03-09 00:40:17 +0000485 for (unsigned i = 0, e = Stubs.size(); i != e; ++i) {
486 // L_foo$stub:
487 OutStreamer.EmitLabel(Stubs[i].first);
488 // .long _foo
Bill Wendlingcebae362010-03-10 22:34:10 +0000489 OutStreamer.EmitValue(MCSymbolRefExpr::
490 Create(Stubs[i].second.getPointer(),
491 OutContext),
Bill Wendlingbecd83e2010-03-09 00:40:17 +0000492 4/*size*/, 0/*addrspace*/);
493 }
Bill Wendlingcf6f28d2010-03-09 00:43:34 +0000494
495 Stubs.clear();
496 OutStreamer.AddBlankLine();
Evan Chengae94e592008-12-05 01:06:39 +0000497 }
498
Evan Chenga8e29892007-01-19 07:51:42 +0000499 // Funny Darwin hack: This flag tells the linker that no global symbols
500 // contain code that falls through to other global symbols (e.g. the obvious
501 // implementation of multiple entry points). If this doesn't occur, the
502 // linker can safely perform dead code stripping. Since LLVM never
503 // generates code that does this, it is always safe to set.
Chris Lattnera5ad93a2010-01-23 06:39:22 +0000504 OutStreamer.EmitAssemblerFlag(MCAF_SubsectionsViaSymbols);
Rafael Espindolab01c4bb2006-07-27 11:38:51 +0000505 }
Rafael Espindola7bc59bc2006-05-14 22:18:28 +0000506}
Anton Korobeynikov0bd89712008-08-17 13:55:10 +0000507
Chris Lattner97f06932009-10-19 20:20:46 +0000508//===----------------------------------------------------------------------===//
Jason W Kimdef9ac42010-10-06 22:36:46 +0000509// Helper routines for EmitStartOfAsmFile() and EmitEndOfAsmFile()
510// FIXME:
511// The following seem like one-off assembler flags, but they actually need
Jim Grosbachfa7fb642010-10-06 22:46:47 +0000512// to appear in the .ARM.attributes section in ELF.
Jason W Kimdef9ac42010-10-06 22:36:46 +0000513// Instead of subclassing the MCELFStreamer, we do the work here.
514
515void ARMAsmPrinter::emitAttributes() {
Jim Grosbachfa7fb642010-10-06 22:46:47 +0000516
Jason W Kim17b443d2010-10-11 23:01:44 +0000517 emitARMAttributeSection();
518
Rafael Espindolacecbc3d2010-10-25 17:50:35 +0000519 AttributeEmitter *AttrEmitter;
520 if (OutStreamer.hasRawTextSupport())
521 AttrEmitter = new AsmAttributeEmitter(OutStreamer);
522 else {
523 MCObjectStreamer &O = static_cast<MCObjectStreamer&>(OutStreamer);
524 AttrEmitter = new ObjectAttributeEmitter(O);
525 }
526
527 AttrEmitter->MaybeSwitchVendor("aeabi");
528
Jason W Kimdef9ac42010-10-06 22:36:46 +0000529 std::string CPUString = Subtarget->getCPUString();
Rafael Espindolacecbc3d2010-10-25 17:50:35 +0000530 if (OutStreamer.hasRawTextSupport()) {
531 if (CPUString != "generic")
532 OutStreamer.EmitRawText(StringRef("\t.cpu ") + CPUString);
533 } else {
Dale Johannesen7179d1e2010-11-08 19:17:22 +0000534 assert(CPUString == "generic" && "Unsupported .cpu attribute for ELF/.o");
535 // FIXME: Why these defaults?
536 AttrEmitter->EmitAttribute(ARMBuildAttrs::CPU_arch, ARMBuildAttrs::v4T);
537 AttrEmitter->EmitAttribute(ARMBuildAttrs::ARM_ISA_use, 1);
538 AttrEmitter->EmitAttribute(ARMBuildAttrs::THUMB_ISA_use, 1);
Rafael Espindolacecbc3d2010-10-25 17:50:35 +0000539 }
Jason W Kimdef9ac42010-10-06 22:36:46 +0000540
541 // FIXME: Emit FPU type
542 if (Subtarget->hasVFP2())
Dale Johannesen7179d1e2010-11-08 19:17:22 +0000543 AttrEmitter->EmitAttribute(ARMBuildAttrs::VFP_arch, 2);
Jason W Kimdef9ac42010-10-06 22:36:46 +0000544
545 // Signal various FP modes.
546 if (!UnsafeFPMath) {
Dale Johannesen7179d1e2010-11-08 19:17:22 +0000547 AttrEmitter->EmitAttribute(ARMBuildAttrs::ABI_FP_denormal, 1);
548 AttrEmitter->EmitAttribute(ARMBuildAttrs::ABI_FP_exceptions, 1);
Jason W Kimdef9ac42010-10-06 22:36:46 +0000549 }
550
551 if (NoInfsFPMath && NoNaNsFPMath)
Dale Johannesen7179d1e2010-11-08 19:17:22 +0000552 AttrEmitter->EmitAttribute(ARMBuildAttrs::ABI_FP_number_model, 1);
Jason W Kimdef9ac42010-10-06 22:36:46 +0000553 else
Dale Johannesen7179d1e2010-11-08 19:17:22 +0000554 AttrEmitter->EmitAttribute(ARMBuildAttrs::ABI_FP_number_model, 3);
Jason W Kimdef9ac42010-10-06 22:36:46 +0000555
556 // 8-bytes alignment stuff.
Rafael Espindolacecbc3d2010-10-25 17:50:35 +0000557 AttrEmitter->EmitAttribute(ARMBuildAttrs::ABI_align8_needed, 1);
558 AttrEmitter->EmitAttribute(ARMBuildAttrs::ABI_align8_preserved, 1);
Jason W Kimdef9ac42010-10-06 22:36:46 +0000559
560 // Hard float. Use both S and D registers and conform to AAPCS-VFP.
561 if (Subtarget->isAAPCS_ABI() && FloatABIType == FloatABI::Hard) {
Rafael Espindolacecbc3d2010-10-25 17:50:35 +0000562 AttrEmitter->EmitAttribute(ARMBuildAttrs::ABI_HardFP_use, 3);
563 AttrEmitter->EmitAttribute(ARMBuildAttrs::ABI_VFP_args, 1);
Jason W Kimdef9ac42010-10-06 22:36:46 +0000564 }
565 // FIXME: Should we signal R9 usage?
Rafael Espindolacecbc3d2010-10-25 17:50:35 +0000566
567 AttrEmitter->EmitAttribute(ARMBuildAttrs::DIV_use, 1);
568
569 AttrEmitter->Finish();
570 delete AttrEmitter;
Jason W Kimdef9ac42010-10-06 22:36:46 +0000571}
572
Jason W Kim17b443d2010-10-11 23:01:44 +0000573void ARMAsmPrinter::emitARMAttributeSection() {
574 // <format-version>
575 // [ <section-length> "vendor-name"
576 // [ <file-tag> <size> <attribute>*
577 // | <section-tag> <size> <section-number>* 0 <attribute>*
578 // | <symbol-tag> <size> <symbol-number>* 0 <attribute>*
579 // ]+
580 // ]*
581
582 if (OutStreamer.hasRawTextSupport())
583 return;
584
585 const ARMElfTargetObjectFile &TLOFELF =
586 static_cast<const ARMElfTargetObjectFile &>
587 (getObjFileLowering());
588
589 OutStreamer.SwitchSection(TLOFELF.getAttributesSection());
Jason W Kim17b443d2010-10-11 23:01:44 +0000590
Rafael Espindolacecbc3d2010-10-25 17:50:35 +0000591 // Format version
592 OutStreamer.EmitIntValue(0x41, 1);
Jason W Kim17b443d2010-10-11 23:01:44 +0000593}
594
Jason W Kimdef9ac42010-10-06 22:36:46 +0000595//===----------------------------------------------------------------------===//
Chris Lattner97f06932009-10-19 20:20:46 +0000596
Jim Grosbach988ce092010-09-18 00:05:05 +0000597static MCSymbol *getPICLabel(const char *Prefix, unsigned FunctionNumber,
598 unsigned LabelId, MCContext &Ctx) {
599
600 MCSymbol *Label = Ctx.GetOrCreateSymbol(Twine(Prefix)
601 + "PC" + Twine(FunctionNumber) + "_" + Twine(LabelId));
602 return Label;
603}
604
Jim Grosbach2c4d5122010-11-10 03:26:07 +0000605static MCSymbolRefExpr::VariantKind
606getModifierVariantKind(ARMCP::ARMCPModifier Modifier) {
607 switch (Modifier) {
608 default: llvm_unreachable("Unknown modifier!");
609 case ARMCP::no_modifier: return MCSymbolRefExpr::VK_None;
610 case ARMCP::TLSGD: return MCSymbolRefExpr::VK_ARM_TLSGD;
611 case ARMCP::TPOFF: return MCSymbolRefExpr::VK_ARM_TPOFF;
612 case ARMCP::GOTTPOFF: return MCSymbolRefExpr::VK_ARM_GOTTPOFF;
613 case ARMCP::GOT: return MCSymbolRefExpr::VK_ARM_GOT;
614 case ARMCP::GOTOFF: return MCSymbolRefExpr::VK_ARM_GOTOFF;
615 }
616 return MCSymbolRefExpr::VK_None;
617}
618
Jim Grosbach5df08d82010-11-09 18:45:04 +0000619void ARMAsmPrinter::
620EmitMachineConstantPoolValue(MachineConstantPoolValue *MCPV) {
621 int Size = TM.getTargetData()->getTypeAllocSize(MCPV->getType());
622
623 ARMConstantPoolValue *ACPV = static_cast<ARMConstantPoolValue*>(MCPV);
Jim Grosbach5df08d82010-11-09 18:45:04 +0000624
Jim Grosbach7c7ddb22010-11-10 17:59:10 +0000625 MCSymbol *MCSym;
Jim Grosbach5df08d82010-11-09 18:45:04 +0000626 if (ACPV->isLSDA()) {
Jim Grosbach7c7ddb22010-11-10 17:59:10 +0000627 SmallString<128> Str;
628 raw_svector_ostream OS(Str);
Jim Grosbach5df08d82010-11-09 18:45:04 +0000629 OS << MAI->getPrivateGlobalPrefix() << "_LSDA_" << getFunctionNumber();
Jim Grosbach7c7ddb22010-11-10 17:59:10 +0000630 MCSym = OutContext.GetOrCreateSymbol(OS.str());
Jim Grosbach5df08d82010-11-09 18:45:04 +0000631 } else if (ACPV->isBlockAddress()) {
Jim Grosbach7c7ddb22010-11-10 17:59:10 +0000632 MCSym = GetBlockAddressSymbol(ACPV->getBlockAddress());
Jim Grosbach5df08d82010-11-09 18:45:04 +0000633 } else if (ACPV->isGlobalValue()) {
634 const GlobalValue *GV = ACPV->getGV();
635 bool isIndirect = Subtarget->isTargetDarwin() &&
636 Subtarget->GVIsIndirectSymbol(GV, TM.getRelocationModel());
637 if (!isIndirect)
Jim Grosbach7c7ddb22010-11-10 17:59:10 +0000638 MCSym = Mang->getSymbol(GV);
Jim Grosbach5df08d82010-11-09 18:45:04 +0000639 else {
640 // FIXME: Remove this when Darwin transition to @GOT like syntax.
Jim Grosbach7c7ddb22010-11-10 17:59:10 +0000641 MCSym = GetSymbolWithGlobalValueBase(GV, "$non_lazy_ptr");
Jim Grosbach5df08d82010-11-09 18:45:04 +0000642
643 MachineModuleInfoMachO &MMIMachO =
644 MMI->getObjFileInfo<MachineModuleInfoMachO>();
645 MachineModuleInfoImpl::StubValueTy &StubSym =
Jim Grosbach7c7ddb22010-11-10 17:59:10 +0000646 GV->hasHiddenVisibility() ? MMIMachO.getHiddenGVStubEntry(MCSym) :
647 MMIMachO.getGVStubEntry(MCSym);
Jim Grosbach5df08d82010-11-09 18:45:04 +0000648 if (StubSym.getPointer() == 0)
649 StubSym = MachineModuleInfoImpl::
650 StubValueTy(Mang->getSymbol(GV), !GV->hasInternalLinkage());
651 }
652 } else {
653 assert(ACPV->isExtSymbol() && "unrecognized constant pool value");
Jim Grosbach7c7ddb22010-11-10 17:59:10 +0000654 MCSym = GetExternalSymbolSymbol(ACPV->getSymbol());
Jim Grosbach5df08d82010-11-09 18:45:04 +0000655 }
656
657 // Create an MCSymbol for the reference.
Jim Grosbach2c4d5122010-11-10 03:26:07 +0000658 const MCExpr *Expr =
659 MCSymbolRefExpr::Create(MCSym, getModifierVariantKind(ACPV->getModifier()),
660 OutContext);
Jim Grosbach5df08d82010-11-09 18:45:04 +0000661
Jim Grosbach2c4d5122010-11-10 03:26:07 +0000662 if (ACPV->getPCAdjustment()) {
663 MCSymbol *PCLabel = getPICLabel(MAI->getPrivateGlobalPrefix(),
664 getFunctionNumber(),
665 ACPV->getLabelId(),
666 OutContext);
667 const MCExpr *PCRelExpr = MCSymbolRefExpr::Create(PCLabel, OutContext);
668 PCRelExpr =
669 MCBinaryExpr::CreateAdd(PCRelExpr,
670 MCConstantExpr::Create(ACPV->getPCAdjustment(),
671 OutContext),
672 OutContext);
673 if (ACPV->mustAddCurrentAddress()) {
674 // We want "(<expr> - .)", but MC doesn't have a concept of the '.'
675 // label, so just emit a local label end reference that instead.
676 MCSymbol *DotSym = OutContext.CreateTempSymbol();
677 OutStreamer.EmitLabel(DotSym);
678 const MCExpr *DotExpr = MCSymbolRefExpr::Create(DotSym, OutContext);
679 PCRelExpr = MCBinaryExpr::CreateSub(PCRelExpr, DotExpr, OutContext);
Jim Grosbach5df08d82010-11-09 18:45:04 +0000680 }
Jim Grosbach2c4d5122010-11-10 03:26:07 +0000681 Expr = MCBinaryExpr::CreateSub(Expr, PCRelExpr, OutContext);
Jim Grosbach5df08d82010-11-09 18:45:04 +0000682 }
Jim Grosbach2c4d5122010-11-10 03:26:07 +0000683 OutStreamer.EmitValue(Expr, Size);
Jim Grosbach5df08d82010-11-09 18:45:04 +0000684}
685
Jim Grosbacha2244cb2010-09-22 17:39:48 +0000686void ARMAsmPrinter::EmitJumpTable(const MachineInstr *MI) {
687 unsigned Opcode = MI->getOpcode();
688 int OpNum = 1;
689 if (Opcode == ARM::BR_JTadd)
690 OpNum = 2;
691 else if (Opcode == ARM::BR_JTm)
692 OpNum = 3;
693
694 const MachineOperand &MO1 = MI->getOperand(OpNum);
695 const MachineOperand &MO2 = MI->getOperand(OpNum+1); // Unique Id
696 unsigned JTI = MO1.getIndex();
697
698 // Emit a label for the jump table.
699 MCSymbol *JTISymbol = GetARMJTIPICJumpTableLabel2(JTI, MO2.getImm());
700 OutStreamer.EmitLabel(JTISymbol);
701
702 // Emit each entry of the table.
703 const MachineJumpTableInfo *MJTI = MF->getJumpTableInfo();
704 const std::vector<MachineJumpTableEntry> &JT = MJTI->getJumpTables();
705 const std::vector<MachineBasicBlock*> &JTBBs = JT[JTI].MBBs;
706
707 for (unsigned i = 0, e = JTBBs.size(); i != e; ++i) {
708 MachineBasicBlock *MBB = JTBBs[i];
709 // Construct an MCExpr for the entry. We want a value of the form:
710 // (BasicBlockAddr - TableBeginAddr)
711 //
712 // For example, a table with entries jumping to basic blocks BB0 and BB1
713 // would look like:
714 // LJTI_0_0:
715 // .word (LBB0 - LJTI_0_0)
716 // .word (LBB1 - LJTI_0_0)
717 const MCExpr *Expr = MCSymbolRefExpr::Create(MBB->getSymbol(), OutContext);
718
719 if (TM.getRelocationModel() == Reloc::PIC_)
720 Expr = MCBinaryExpr::CreateSub(Expr, MCSymbolRefExpr::Create(JTISymbol,
721 OutContext),
722 OutContext);
723 OutStreamer.EmitValue(Expr, 4);
724 }
725}
726
Jim Grosbach882ef2b2010-09-21 23:28:16 +0000727void ARMAsmPrinter::EmitJump2Table(const MachineInstr *MI) {
728 unsigned Opcode = MI->getOpcode();
729 int OpNum = (Opcode == ARM::t2BR_JT) ? 2 : 1;
730 const MachineOperand &MO1 = MI->getOperand(OpNum);
731 const MachineOperand &MO2 = MI->getOperand(OpNum+1); // Unique Id
732 unsigned JTI = MO1.getIndex();
733
734 // Emit a label for the jump table.
735 MCSymbol *JTISymbol = GetARMJTIPICJumpTableLabel2(JTI, MO2.getImm());
736 OutStreamer.EmitLabel(JTISymbol);
737
738 // Emit each entry of the table.
739 const MachineJumpTableInfo *MJTI = MF->getJumpTableInfo();
740 const std::vector<MachineJumpTableEntry> &JT = MJTI->getJumpTables();
741 const std::vector<MachineBasicBlock*> &JTBBs = JT[JTI].MBBs;
Jim Grosbach205a5fa2010-09-22 17:15:35 +0000742 unsigned OffsetWidth = 4;
Jim Grosbachd092a872010-11-29 21:28:32 +0000743 if (MI->getOpcode() == ARM::t2TBB_JT)
Jim Grosbach205a5fa2010-09-22 17:15:35 +0000744 OffsetWidth = 1;
Jim Grosbachd092a872010-11-29 21:28:32 +0000745 else if (MI->getOpcode() == ARM::t2TBH_JT)
Jim Grosbach205a5fa2010-09-22 17:15:35 +0000746 OffsetWidth = 2;
Jim Grosbach882ef2b2010-09-21 23:28:16 +0000747
748 for (unsigned i = 0, e = JTBBs.size(); i != e; ++i) {
749 MachineBasicBlock *MBB = JTBBs[i];
Jim Grosbach205a5fa2010-09-22 17:15:35 +0000750 const MCExpr *MBBSymbolExpr = MCSymbolRefExpr::Create(MBB->getSymbol(),
751 OutContext);
Jim Grosbach882ef2b2010-09-21 23:28:16 +0000752 // If this isn't a TBB or TBH, the entries are direct branch instructions.
Jim Grosbach205a5fa2010-09-22 17:15:35 +0000753 if (OffsetWidth == 4) {
Jim Grosbach882ef2b2010-09-21 23:28:16 +0000754 MCInst BrInst;
755 BrInst.setOpcode(ARM::t2B);
Jim Grosbach205a5fa2010-09-22 17:15:35 +0000756 BrInst.addOperand(MCOperand::CreateExpr(MBBSymbolExpr));
Jim Grosbach882ef2b2010-09-21 23:28:16 +0000757 OutStreamer.EmitInstruction(BrInst);
758 continue;
759 }
760 // Otherwise it's an offset from the dispatch instruction. Construct an
Jim Grosbach205a5fa2010-09-22 17:15:35 +0000761 // MCExpr for the entry. We want a value of the form:
762 // (BasicBlockAddr - TableBeginAddr) / 2
763 //
764 // For example, a TBB table with entries jumping to basic blocks BB0 and BB1
765 // would look like:
766 // LJTI_0_0:
767 // .byte (LBB0 - LJTI_0_0) / 2
768 // .byte (LBB1 - LJTI_0_0) / 2
769 const MCExpr *Expr =
770 MCBinaryExpr::CreateSub(MBBSymbolExpr,
771 MCSymbolRefExpr::Create(JTISymbol, OutContext),
772 OutContext);
773 Expr = MCBinaryExpr::CreateDiv(Expr, MCConstantExpr::Create(2, OutContext),
774 OutContext);
775 OutStreamer.EmitValue(Expr, OffsetWidth);
Jim Grosbach882ef2b2010-09-21 23:28:16 +0000776 }
777}
778
Jim Grosbach2d0f53b2010-09-28 17:05:56 +0000779void ARMAsmPrinter::PrintDebugValueComment(const MachineInstr *MI,
780 raw_ostream &OS) {
781 unsigned NOps = MI->getNumOperands();
782 assert(NOps==4);
783 OS << '\t' << MAI->getCommentString() << "DEBUG_VALUE: ";
784 // cast away const; DIetc do not take const operands for some reason.
785 DIVariable V(const_cast<MDNode *>(MI->getOperand(NOps-1).getMetadata()));
786 OS << V.getName();
787 OS << " <- ";
788 // Frame address. Currently handles register +- offset only.
789 assert(MI->getOperand(0).isReg() && MI->getOperand(1).isImm());
790 OS << '['; printOperand(MI, 0, OS); OS << '+'; printOperand(MI, 1, OS);
791 OS << ']';
792 OS << "+";
793 printOperand(MI, NOps-2, OS);
794}
795
Jim Grosbachb454cda2010-09-29 15:23:40 +0000796void ARMAsmPrinter::EmitInstruction(const MachineInstr *MI) {
Chris Lattner97f06932009-10-19 20:20:46 +0000797 switch (MI->getOpcode()) {
Chris Lattner4d152222009-10-19 22:23:04 +0000798 default: break;
Chris Lattner112f2392010-11-14 20:31:06 +0000799 case ARM::t2MOVi32imm: assert(0 && "Should be lowered by thumb2it pass");
Jim Grosbach2d0f53b2010-09-28 17:05:56 +0000800 case ARM::DBG_VALUE: {
801 if (isVerbose() && OutStreamer.hasRawTextSupport()) {
802 SmallString<128> TmpStr;
803 raw_svector_ostream OS(TmpStr);
804 PrintDebugValueComment(MI, OS);
805 OutStreamer.EmitRawText(StringRef(OS.str()));
806 }
807 return;
808 }
Jim Grosbach2e812e12010-11-30 18:56:36 +0000809 case ARM::MOVPCRX: {
810 MCInst TmpInst;
811 TmpInst.setOpcode(ARM::MOVr);
812 TmpInst.addOperand(MCOperand::CreateReg(ARM::PC));
813 TmpInst.addOperand(MCOperand::CreateReg(MI->getOperand(0).getReg()));
814 // Add predicate operands.
815 TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL));
816 TmpInst.addOperand(MCOperand::CreateReg(0));
817 // Add 's' bit operand (always reg0 for this)
818 TmpInst.addOperand(MCOperand::CreateReg(0));
819 OutStreamer.EmitInstruction(TmpInst);
820 return;
821 }
Jim Grosbacha0d2c8a2010-11-30 18:30:19 +0000822 case ARM::BXr9_CALL:
823 case ARM::BX_CALL: {
824 {
825 MCInst TmpInst;
826 TmpInst.setOpcode(ARM::MOVr);
827 TmpInst.addOperand(MCOperand::CreateReg(ARM::LR));
828 TmpInst.addOperand(MCOperand::CreateReg(ARM::PC));
829 // Add predicate operands.
830 TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL));
831 TmpInst.addOperand(MCOperand::CreateReg(0));
832 // Add 's' bit operand (always reg0 for this)
833 TmpInst.addOperand(MCOperand::CreateReg(0));
834 OutStreamer.EmitInstruction(TmpInst);
835 }
836 {
837 MCInst TmpInst;
838 TmpInst.setOpcode(ARM::BX);
839 TmpInst.addOperand(MCOperand::CreateReg(MI->getOperand(0).getReg()));
840 OutStreamer.EmitInstruction(TmpInst);
841 }
842 return;
843 }
844 case ARM::BMOVPCRXr9_CALL:
845 case ARM::BMOVPCRX_CALL: {
846 {
847 MCInst TmpInst;
848 TmpInst.setOpcode(ARM::MOVr);
849 TmpInst.addOperand(MCOperand::CreateReg(ARM::LR));
850 TmpInst.addOperand(MCOperand::CreateReg(ARM::PC));
851 // Add predicate operands.
852 TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL));
853 TmpInst.addOperand(MCOperand::CreateReg(0));
854 // Add 's' bit operand (always reg0 for this)
855 TmpInst.addOperand(MCOperand::CreateReg(0));
856 OutStreamer.EmitInstruction(TmpInst);
857 }
858 {
859 MCInst TmpInst;
860 TmpInst.setOpcode(ARM::MOVr);
861 TmpInst.addOperand(MCOperand::CreateReg(ARM::PC));
862 TmpInst.addOperand(MCOperand::CreateReg(MI->getOperand(0).getReg()));
863 // Add predicate operands.
864 TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL));
865 TmpInst.addOperand(MCOperand::CreateReg(0));
866 // Add 's' bit operand (always reg0 for this)
867 TmpInst.addOperand(MCOperand::CreateReg(0));
868 OutStreamer.EmitInstruction(TmpInst);
869 }
870 return;
871 }
Jim Grosbachfbd18732010-09-17 23:41:53 +0000872 case ARM::tPICADD: {
873 // This is a pseudo op for a label + instruction sequence, which looks like:
874 // LPC0:
875 // add r0, pc
876 // This adds the address of LPC0 to r0.
877
878 // Emit the label.
Jim Grosbach988ce092010-09-18 00:05:05 +0000879 OutStreamer.EmitLabel(getPICLabel(MAI->getPrivateGlobalPrefix(),
880 getFunctionNumber(), MI->getOperand(2).getImm(),
881 OutContext));
Jim Grosbachfbd18732010-09-17 23:41:53 +0000882
883 // Form and emit the add.
884 MCInst AddInst;
885 AddInst.setOpcode(ARM::tADDhirr);
886 AddInst.addOperand(MCOperand::CreateReg(MI->getOperand(0).getReg()));
887 AddInst.addOperand(MCOperand::CreateReg(MI->getOperand(0).getReg()));
888 AddInst.addOperand(MCOperand::CreateReg(ARM::PC));
889 // Add predicate operands.
890 AddInst.addOperand(MCOperand::CreateImm(ARMCC::AL));
891 AddInst.addOperand(MCOperand::CreateReg(0));
892 OutStreamer.EmitInstruction(AddInst);
893 return;
894 }
Jim Grosbacha3fbadf2010-09-30 19:53:58 +0000895 case ARM::PICADD: {
Chris Lattner4d152222009-10-19 22:23:04 +0000896 // This is a pseudo op for a label + instruction sequence, which looks like:
897 // LPC0:
898 // add r0, pc, r0
899 // This adds the address of LPC0 to r0.
Jim Grosbachb0739b72010-09-02 01:02:06 +0000900
Chris Lattner4d152222009-10-19 22:23:04 +0000901 // Emit the label.
Jim Grosbach988ce092010-09-18 00:05:05 +0000902 OutStreamer.EmitLabel(getPICLabel(MAI->getPrivateGlobalPrefix(),
903 getFunctionNumber(), MI->getOperand(2).getImm(),
904 OutContext));
Jim Grosbachb0739b72010-09-02 01:02:06 +0000905
Jim Grosbachf3f09522010-09-14 21:05:34 +0000906 // Form and emit the add.
Chris Lattner4d152222009-10-19 22:23:04 +0000907 MCInst AddInst;
908 AddInst.setOpcode(ARM::ADDrr);
909 AddInst.addOperand(MCOperand::CreateReg(MI->getOperand(0).getReg()));
910 AddInst.addOperand(MCOperand::CreateReg(ARM::PC));
911 AddInst.addOperand(MCOperand::CreateReg(MI->getOperand(1).getReg()));
Jim Grosbach5b46d622010-09-14 21:28:17 +0000912 // Add predicate operands.
913 AddInst.addOperand(MCOperand::CreateImm(MI->getOperand(3).getImm()));
914 AddInst.addOperand(MCOperand::CreateReg(MI->getOperand(4).getReg()));
915 // Add 's' bit operand (always reg0 for this)
916 AddInst.addOperand(MCOperand::CreateReg(0));
Chris Lattner850d2e22010-02-03 01:16:28 +0000917 OutStreamer.EmitInstruction(AddInst);
Chris Lattner4d152222009-10-19 22:23:04 +0000918 return;
919 }
Jim Grosbacha28abbe2010-09-17 16:25:52 +0000920 case ARM::PICSTR:
921 case ARM::PICSTRB:
922 case ARM::PICSTRH:
923 case ARM::PICLDR:
924 case ARM::PICLDRB:
925 case ARM::PICLDRH:
926 case ARM::PICLDRSB:
927 case ARM::PICLDRSH: {
Jim Grosbachb74ca9d2010-09-16 17:43:25 +0000928 // This is a pseudo op for a label + instruction sequence, which looks like:
929 // LPC0:
Jim Grosbacha28abbe2010-09-17 16:25:52 +0000930 // OP r0, [pc, r0]
Jim Grosbachb74ca9d2010-09-16 17:43:25 +0000931 // The LCP0 label is referenced by a constant pool entry in order to get
932 // a PC-relative address at the ldr instruction.
933
934 // Emit the label.
Jim Grosbach988ce092010-09-18 00:05:05 +0000935 OutStreamer.EmitLabel(getPICLabel(MAI->getPrivateGlobalPrefix(),
936 getFunctionNumber(), MI->getOperand(2).getImm(),
937 OutContext));
Jim Grosbachb74ca9d2010-09-16 17:43:25 +0000938
939 // Form and emit the load
Jim Grosbacha28abbe2010-09-17 16:25:52 +0000940 unsigned Opcode;
941 switch (MI->getOpcode()) {
942 default:
943 llvm_unreachable("Unexpected opcode!");
Jim Grosbach7e3383c2010-10-27 23:12:14 +0000944 case ARM::PICSTR: Opcode = ARM::STRrs; break;
945 case ARM::PICSTRB: Opcode = ARM::STRBrs; break;
Jim Grosbacha28abbe2010-09-17 16:25:52 +0000946 case ARM::PICSTRH: Opcode = ARM::STRH; break;
Jim Grosbach3e556122010-10-26 22:37:02 +0000947 case ARM::PICLDR: Opcode = ARM::LDRrs; break;
Jim Grosbachc1d30212010-10-27 00:19:44 +0000948 case ARM::PICLDRB: Opcode = ARM::LDRBrs; break;
Jim Grosbacha28abbe2010-09-17 16:25:52 +0000949 case ARM::PICLDRH: Opcode = ARM::LDRH; break;
950 case ARM::PICLDRSB: Opcode = ARM::LDRSB; break;
951 case ARM::PICLDRSH: Opcode = ARM::LDRSH; break;
952 }
953 MCInst LdStInst;
954 LdStInst.setOpcode(Opcode);
955 LdStInst.addOperand(MCOperand::CreateReg(MI->getOperand(0).getReg()));
956 LdStInst.addOperand(MCOperand::CreateReg(ARM::PC));
957 LdStInst.addOperand(MCOperand::CreateReg(MI->getOperand(1).getReg()));
958 LdStInst.addOperand(MCOperand::CreateImm(0));
Jim Grosbachb74ca9d2010-09-16 17:43:25 +0000959 // Add predicate operands.
Jim Grosbacha28abbe2010-09-17 16:25:52 +0000960 LdStInst.addOperand(MCOperand::CreateImm(MI->getOperand(3).getImm()));
961 LdStInst.addOperand(MCOperand::CreateReg(MI->getOperand(4).getReg()));
962 OutStreamer.EmitInstruction(LdStInst);
Jim Grosbachb74ca9d2010-09-16 17:43:25 +0000963
964 return;
965 }
Jim Grosbacha3fbadf2010-09-30 19:53:58 +0000966 case ARM::CONSTPOOL_ENTRY: {
Chris Lattnera70e6442009-10-19 22:33:05 +0000967 /// CONSTPOOL_ENTRY - This instruction represents a floating constant pool
968 /// in the function. The first operand is the ID# for this instruction, the
969 /// second is the index into the MachineConstantPool that this is, the third
970 /// is the size in bytes of this constant pool entry.
971 unsigned LabelId = (unsigned)MI->getOperand(0).getImm();
972 unsigned CPIdx = (unsigned)MI->getOperand(1).getIndex();
973
974 EmitAlignment(2);
Chris Lattner1b46f432010-01-23 07:00:21 +0000975 OutStreamer.EmitLabel(GetCPISymbol(LabelId));
Chris Lattnera70e6442009-10-19 22:33:05 +0000976
977 const MachineConstantPoolEntry &MCPE = MCP->getConstants()[CPIdx];
978 if (MCPE.isMachineConstantPoolEntry())
979 EmitMachineConstantPoolValue(MCPE.Val.MachineCPVal);
980 else
981 EmitGlobalConstant(MCPE.Val.ConstVal);
Jim Grosbachb0739b72010-09-02 01:02:06 +0000982
Chris Lattnera70e6442009-10-19 22:33:05 +0000983 return;
984 }
Jim Grosbach882ef2b2010-09-21 23:28:16 +0000985 case ARM::t2BR_JT: {
986 // Lower and emit the instruction itself, then the jump table following it.
987 MCInst TmpInst;
Jim Grosbach5ca66692010-11-29 22:37:40 +0000988 TmpInst.setOpcode(ARM::tMOVgpr2gpr);
989 TmpInst.addOperand(MCOperand::CreateReg(ARM::PC));
990 TmpInst.addOperand(MCOperand::CreateReg(MI->getOperand(0).getReg()));
991 // Add predicate operands.
992 TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL));
993 TmpInst.addOperand(MCOperand::CreateReg(0));
Jim Grosbach882ef2b2010-09-21 23:28:16 +0000994 OutStreamer.EmitInstruction(TmpInst);
Jim Grosbach5ca66692010-11-29 22:37:40 +0000995 // Output the data for the jump table itself
996 EmitJump2Table(MI);
997 return;
998 }
999 case ARM::t2TBB_JT: {
1000 // Lower and emit the instruction itself, then the jump table following it.
1001 MCInst TmpInst;
1002
1003 TmpInst.setOpcode(ARM::t2TBB);
1004 TmpInst.addOperand(MCOperand::CreateReg(ARM::PC));
1005 TmpInst.addOperand(MCOperand::CreateReg(MI->getOperand(0).getReg()));
1006 // Add predicate operands.
1007 TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL));
1008 TmpInst.addOperand(MCOperand::CreateReg(0));
1009 OutStreamer.EmitInstruction(TmpInst);
1010 // Output the data for the jump table itself
1011 EmitJump2Table(MI);
1012 // Make sure the next instruction is 2-byte aligned.
1013 EmitAlignment(1);
1014 return;
1015 }
1016 case ARM::t2TBH_JT: {
1017 // Lower and emit the instruction itself, then the jump table following it.
1018 MCInst TmpInst;
1019
1020 TmpInst.setOpcode(ARM::t2TBH);
1021 TmpInst.addOperand(MCOperand::CreateReg(ARM::PC));
1022 TmpInst.addOperand(MCOperand::CreateReg(MI->getOperand(0).getReg()));
1023 // Add predicate operands.
1024 TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL));
1025 TmpInst.addOperand(MCOperand::CreateReg(0));
1026 OutStreamer.EmitInstruction(TmpInst);
1027 // Output the data for the jump table itself
Jim Grosbach882ef2b2010-09-21 23:28:16 +00001028 EmitJump2Table(MI);
1029 return;
1030 }
Jim Grosbachf1aa47d2010-11-29 19:32:47 +00001031 case ARM::tBR_JTr:
Jim Grosbach2dc77682010-11-29 18:37:44 +00001032 case ARM::BR_JTr: {
1033 // Lower and emit the instruction itself, then the jump table following it.
1034 // mov pc, target
1035 MCInst TmpInst;
Jim Grosbach5ca66692010-11-29 22:37:40 +00001036 unsigned Opc = MI->getOpcode() == ARM::BR_JTr ?
1037 ARM::MOVr : ARM::tMOVgpr2gpr;
Jim Grosbachf1aa47d2010-11-29 19:32:47 +00001038 TmpInst.setOpcode(Opc);
Jim Grosbach2dc77682010-11-29 18:37:44 +00001039 TmpInst.addOperand(MCOperand::CreateReg(ARM::PC));
1040 TmpInst.addOperand(MCOperand::CreateReg(MI->getOperand(0).getReg()));
1041 // Add predicate operands.
1042 TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL));
1043 TmpInst.addOperand(MCOperand::CreateReg(0));
Jim Grosbacha0d2c8a2010-11-30 18:30:19 +00001044 // Add 's' bit operand (always reg0 for this)
1045 if (Opc == ARM::MOVr)
1046 TmpInst.addOperand(MCOperand::CreateReg(0));
Jim Grosbach2dc77682010-11-29 18:37:44 +00001047 OutStreamer.EmitInstruction(TmpInst);
1048
Jim Grosbachf1aa47d2010-11-29 19:32:47 +00001049 // Make sure the Thumb jump table is 4-byte aligned.
1050 if (Opc == ARM::tMOVr)
1051 EmitAlignment(2);
1052
Jim Grosbach2dc77682010-11-29 18:37:44 +00001053 // Output the data for the jump table itself
1054 EmitJumpTable(MI);
1055 return;
1056 }
1057 case ARM::BR_JTm: {
1058 // Lower and emit the instruction itself, then the jump table following it.
1059 // ldr pc, target
1060 MCInst TmpInst;
1061 if (MI->getOperand(1).getReg() == 0) {
1062 // literal offset
1063 TmpInst.setOpcode(ARM::LDRi12);
1064 TmpInst.addOperand(MCOperand::CreateReg(ARM::PC));
1065 TmpInst.addOperand(MCOperand::CreateReg(MI->getOperand(0).getReg()));
1066 TmpInst.addOperand(MCOperand::CreateImm(MI->getOperand(2).getImm()));
1067 } else {
1068 TmpInst.setOpcode(ARM::LDRrs);
1069 TmpInst.addOperand(MCOperand::CreateReg(ARM::PC));
1070 TmpInst.addOperand(MCOperand::CreateReg(MI->getOperand(0).getReg()));
1071 TmpInst.addOperand(MCOperand::CreateReg(MI->getOperand(1).getReg()));
1072 TmpInst.addOperand(MCOperand::CreateImm(0));
1073 }
1074 // Add predicate operands.
1075 TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL));
1076 TmpInst.addOperand(MCOperand::CreateReg(0));
1077 OutStreamer.EmitInstruction(TmpInst);
1078
1079 // Output the data for the jump table itself
Jim Grosbacha2244cb2010-09-22 17:39:48 +00001080 EmitJumpTable(MI);
1081 return;
1082 }
Jim Grosbachf8dabac2010-11-17 21:05:55 +00001083 case ARM::BR_JTadd: {
1084 // Lower and emit the instruction itself, then the jump table following it.
1085 // add pc, target, idx
Jim Grosbach2dc77682010-11-29 18:37:44 +00001086 MCInst TmpInst;
1087 TmpInst.setOpcode(ARM::ADDrr);
1088 TmpInst.addOperand(MCOperand::CreateReg(ARM::PC));
1089 TmpInst.addOperand(MCOperand::CreateReg(MI->getOperand(0).getReg()));
1090 TmpInst.addOperand(MCOperand::CreateReg(MI->getOperand(1).getReg()));
Jim Grosbachf8dabac2010-11-17 21:05:55 +00001091 // Add predicate operands.
Jim Grosbach2dc77682010-11-29 18:37:44 +00001092 TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL));
1093 TmpInst.addOperand(MCOperand::CreateReg(0));
Jim Grosbachf8dabac2010-11-17 21:05:55 +00001094 // Add 's' bit operand (always reg0 for this)
Jim Grosbach2dc77682010-11-29 18:37:44 +00001095 TmpInst.addOperand(MCOperand::CreateReg(0));
1096 OutStreamer.EmitInstruction(TmpInst);
Jim Grosbachf8dabac2010-11-17 21:05:55 +00001097
1098 // Output the data for the jump table itself
1099 EmitJumpTable(MI);
1100 return;
1101 }
Jim Grosbach2e6ae132010-09-23 18:05:37 +00001102 case ARM::TRAP: {
1103 // Non-Darwin binutils don't yet support the "trap" mnemonic.
1104 // FIXME: Remove this special case when they do.
1105 if (!Subtarget->isTargetDarwin()) {
Jim Grosbach78890f42010-10-01 23:21:38 +00001106 //.long 0xe7ffdefe @ trap
Jim Grosbachb2dda4b2010-09-23 19:42:17 +00001107 uint32_t Val = 0xe7ffdefeUL;
Jim Grosbach2e6ae132010-09-23 18:05:37 +00001108 OutStreamer.AddComment("trap");
1109 OutStreamer.EmitIntValue(Val, 4);
1110 return;
1111 }
1112 break;
1113 }
1114 case ARM::tTRAP: {
1115 // Non-Darwin binutils don't yet support the "trap" mnemonic.
1116 // FIXME: Remove this special case when they do.
1117 if (!Subtarget->isTargetDarwin()) {
Jim Grosbach78890f42010-10-01 23:21:38 +00001118 //.short 57086 @ trap
Benjamin Kramerc8ab9eb2010-09-23 18:57:26 +00001119 uint16_t Val = 0xdefe;
Jim Grosbach2e6ae132010-09-23 18:05:37 +00001120 OutStreamer.AddComment("trap");
1121 OutStreamer.EmitIntValue(Val, 2);
1122 return;
1123 }
1124 break;
1125 }
Jim Grosbach433a5782010-09-24 20:47:58 +00001126 case ARM::t2Int_eh_sjlj_setjmp:
1127 case ARM::t2Int_eh_sjlj_setjmp_nofp:
Jim Grosbacha3fbadf2010-09-30 19:53:58 +00001128 case ARM::tInt_eh_sjlj_setjmp: {
Jim Grosbach433a5782010-09-24 20:47:58 +00001129 // Two incoming args: GPR:$src, GPR:$val
1130 // mov $val, pc
1131 // adds $val, #7
1132 // str $val, [$src, #4]
1133 // movs r0, #0
1134 // b 1f
1135 // movs r0, #1
1136 // 1:
1137 unsigned SrcReg = MI->getOperand(0).getReg();
1138 unsigned ValReg = MI->getOperand(1).getReg();
1139 MCSymbol *Label = GetARMSJLJEHLabel();
1140 {
1141 MCInst TmpInst;
1142 TmpInst.setOpcode(ARM::tMOVgpr2tgpr);
1143 TmpInst.addOperand(MCOperand::CreateReg(ValReg));
1144 TmpInst.addOperand(MCOperand::CreateReg(ARM::PC));
1145 // 's' bit operand
1146 TmpInst.addOperand(MCOperand::CreateReg(ARM::CPSR));
1147 OutStreamer.AddComment("eh_setjmp begin");
1148 OutStreamer.EmitInstruction(TmpInst);
1149 }
1150 {
1151 MCInst TmpInst;
1152 TmpInst.setOpcode(ARM::tADDi3);
1153 TmpInst.addOperand(MCOperand::CreateReg(ValReg));
1154 // 's' bit operand
1155 TmpInst.addOperand(MCOperand::CreateReg(ARM::CPSR));
1156 TmpInst.addOperand(MCOperand::CreateReg(ValReg));
1157 TmpInst.addOperand(MCOperand::CreateImm(7));
1158 // Predicate.
1159 TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL));
1160 TmpInst.addOperand(MCOperand::CreateReg(0));
1161 OutStreamer.EmitInstruction(TmpInst);
1162 }
1163 {
1164 MCInst TmpInst;
1165 TmpInst.setOpcode(ARM::tSTR);
1166 TmpInst.addOperand(MCOperand::CreateReg(ValReg));
1167 TmpInst.addOperand(MCOperand::CreateReg(SrcReg));
1168 // The offset immediate is #4. The operand value is scaled by 4 for the
1169 // tSTR instruction.
1170 TmpInst.addOperand(MCOperand::CreateImm(1));
1171 TmpInst.addOperand(MCOperand::CreateReg(0));
1172 // Predicate.
1173 TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL));
1174 TmpInst.addOperand(MCOperand::CreateReg(0));
1175 OutStreamer.EmitInstruction(TmpInst);
1176 }
1177 {
1178 MCInst TmpInst;
1179 TmpInst.setOpcode(ARM::tMOVi8);
1180 TmpInst.addOperand(MCOperand::CreateReg(ARM::R0));
1181 TmpInst.addOperand(MCOperand::CreateReg(ARM::CPSR));
1182 TmpInst.addOperand(MCOperand::CreateImm(0));
1183 // Predicate.
1184 TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL));
1185 TmpInst.addOperand(MCOperand::CreateReg(0));
1186 OutStreamer.EmitInstruction(TmpInst);
1187 }
1188 {
1189 const MCExpr *SymbolExpr = MCSymbolRefExpr::Create(Label, OutContext);
1190 MCInst TmpInst;
1191 TmpInst.setOpcode(ARM::tB);
1192 TmpInst.addOperand(MCOperand::CreateExpr(SymbolExpr));
1193 OutStreamer.EmitInstruction(TmpInst);
1194 }
1195 {
1196 MCInst TmpInst;
1197 TmpInst.setOpcode(ARM::tMOVi8);
1198 TmpInst.addOperand(MCOperand::CreateReg(ARM::R0));
1199 TmpInst.addOperand(MCOperand::CreateReg(ARM::CPSR));
1200 TmpInst.addOperand(MCOperand::CreateImm(1));
1201 // Predicate.
1202 TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL));
1203 TmpInst.addOperand(MCOperand::CreateReg(0));
1204 OutStreamer.AddComment("eh_setjmp end");
1205 OutStreamer.EmitInstruction(TmpInst);
1206 }
1207 OutStreamer.EmitLabel(Label);
1208 return;
1209 }
1210
Jim Grosbach45390082010-09-23 23:33:56 +00001211 case ARM::Int_eh_sjlj_setjmp_nofp:
Jim Grosbacha3fbadf2010-09-30 19:53:58 +00001212 case ARM::Int_eh_sjlj_setjmp: {
Jim Grosbach45390082010-09-23 23:33:56 +00001213 // Two incoming args: GPR:$src, GPR:$val
1214 // add $val, pc, #8
1215 // str $val, [$src, #+4]
1216 // mov r0, #0
1217 // add pc, pc, #0
1218 // mov r0, #1
1219 unsigned SrcReg = MI->getOperand(0).getReg();
1220 unsigned ValReg = MI->getOperand(1).getReg();
1221
1222 {
1223 MCInst TmpInst;
1224 TmpInst.setOpcode(ARM::ADDri);
1225 TmpInst.addOperand(MCOperand::CreateReg(ValReg));
1226 TmpInst.addOperand(MCOperand::CreateReg(ARM::PC));
1227 TmpInst.addOperand(MCOperand::CreateImm(8));
1228 // Predicate.
1229 TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL));
1230 TmpInst.addOperand(MCOperand::CreateReg(0));
1231 // 's' bit operand (always reg0 for this).
1232 TmpInst.addOperand(MCOperand::CreateReg(0));
1233 OutStreamer.AddComment("eh_setjmp begin");
1234 OutStreamer.EmitInstruction(TmpInst);
1235 }
1236 {
1237 MCInst TmpInst;
Jim Grosbach7e3383c2010-10-27 23:12:14 +00001238 TmpInst.setOpcode(ARM::STRi12);
Jim Grosbach45390082010-09-23 23:33:56 +00001239 TmpInst.addOperand(MCOperand::CreateReg(ValReg));
1240 TmpInst.addOperand(MCOperand::CreateReg(SrcReg));
Jim Grosbach45390082010-09-23 23:33:56 +00001241 TmpInst.addOperand(MCOperand::CreateImm(4));
1242 // Predicate.
1243 TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL));
1244 TmpInst.addOperand(MCOperand::CreateReg(0));
1245 OutStreamer.EmitInstruction(TmpInst);
1246 }
1247 {
1248 MCInst TmpInst;
1249 TmpInst.setOpcode(ARM::MOVi);
1250 TmpInst.addOperand(MCOperand::CreateReg(ARM::R0));
1251 TmpInst.addOperand(MCOperand::CreateImm(0));
1252 // Predicate.
1253 TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL));
1254 TmpInst.addOperand(MCOperand::CreateReg(0));
1255 // 's' bit operand (always reg0 for this).
1256 TmpInst.addOperand(MCOperand::CreateReg(0));
1257 OutStreamer.EmitInstruction(TmpInst);
1258 }
1259 {
1260 MCInst TmpInst;
1261 TmpInst.setOpcode(ARM::ADDri);
1262 TmpInst.addOperand(MCOperand::CreateReg(ARM::PC));
1263 TmpInst.addOperand(MCOperand::CreateReg(ARM::PC));
1264 TmpInst.addOperand(MCOperand::CreateImm(0));
1265 // Predicate.
1266 TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL));
1267 TmpInst.addOperand(MCOperand::CreateReg(0));
1268 // 's' bit operand (always reg0 for this).
1269 TmpInst.addOperand(MCOperand::CreateReg(0));
1270 OutStreamer.EmitInstruction(TmpInst);
1271 }
1272 {
1273 MCInst TmpInst;
1274 TmpInst.setOpcode(ARM::MOVi);
1275 TmpInst.addOperand(MCOperand::CreateReg(ARM::R0));
1276 TmpInst.addOperand(MCOperand::CreateImm(1));
1277 // Predicate.
1278 TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL));
1279 TmpInst.addOperand(MCOperand::CreateReg(0));
1280 // 's' bit operand (always reg0 for this).
1281 TmpInst.addOperand(MCOperand::CreateReg(0));
1282 OutStreamer.AddComment("eh_setjmp end");
1283 OutStreamer.EmitInstruction(TmpInst);
1284 }
1285 return;
1286 }
Jim Grosbach5acb3de2010-09-27 21:47:04 +00001287 case ARM::Int_eh_sjlj_longjmp: {
1288 // ldr sp, [$src, #8]
1289 // ldr $scratch, [$src, #4]
1290 // ldr r7, [$src]
1291 // bx $scratch
1292 unsigned SrcReg = MI->getOperand(0).getReg();
1293 unsigned ScratchReg = MI->getOperand(1).getReg();
1294 {
1295 MCInst TmpInst;
Jim Grosbach3e556122010-10-26 22:37:02 +00001296 TmpInst.setOpcode(ARM::LDRi12);
Jim Grosbach5acb3de2010-09-27 21:47:04 +00001297 TmpInst.addOperand(MCOperand::CreateReg(ARM::SP));
1298 TmpInst.addOperand(MCOperand::CreateReg(SrcReg));
Jim Grosbach5acb3de2010-09-27 21:47:04 +00001299 TmpInst.addOperand(MCOperand::CreateImm(8));
1300 // Predicate.
1301 TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL));
1302 TmpInst.addOperand(MCOperand::CreateReg(0));
1303 OutStreamer.EmitInstruction(TmpInst);
1304 }
1305 {
1306 MCInst TmpInst;
Jim Grosbach3e556122010-10-26 22:37:02 +00001307 TmpInst.setOpcode(ARM::LDRi12);
Jim Grosbach5acb3de2010-09-27 21:47:04 +00001308 TmpInst.addOperand(MCOperand::CreateReg(ScratchReg));
1309 TmpInst.addOperand(MCOperand::CreateReg(SrcReg));
Jim Grosbach5acb3de2010-09-27 21:47:04 +00001310 TmpInst.addOperand(MCOperand::CreateImm(4));
1311 // Predicate.
1312 TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL));
1313 TmpInst.addOperand(MCOperand::CreateReg(0));
1314 OutStreamer.EmitInstruction(TmpInst);
1315 }
1316 {
1317 MCInst TmpInst;
Jim Grosbach3e556122010-10-26 22:37:02 +00001318 TmpInst.setOpcode(ARM::LDRi12);
Jim Grosbach5acb3de2010-09-27 21:47:04 +00001319 TmpInst.addOperand(MCOperand::CreateReg(ARM::R7));
1320 TmpInst.addOperand(MCOperand::CreateReg(SrcReg));
Jim Grosbach5acb3de2010-09-27 21:47:04 +00001321 TmpInst.addOperand(MCOperand::CreateImm(0));
1322 // Predicate.
1323 TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL));
1324 TmpInst.addOperand(MCOperand::CreateReg(0));
1325 OutStreamer.EmitInstruction(TmpInst);
1326 }
1327 {
1328 MCInst TmpInst;
Bill Wendling6e46d842010-11-30 00:48:15 +00001329 TmpInst.setOpcode(ARM::BX);
Jim Grosbach5acb3de2010-09-27 21:47:04 +00001330 TmpInst.addOperand(MCOperand::CreateReg(ScratchReg));
1331 // Predicate.
1332 TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL));
1333 TmpInst.addOperand(MCOperand::CreateReg(0));
1334 OutStreamer.EmitInstruction(TmpInst);
1335 }
1336 return;
1337 }
Jim Grosbach385cc5e2010-09-27 22:28:11 +00001338 case ARM::tInt_eh_sjlj_longjmp: {
1339 // ldr $scratch, [$src, #8]
1340 // mov sp, $scratch
1341 // ldr $scratch, [$src, #4]
1342 // ldr r7, [$src]
1343 // bx $scratch
1344 unsigned SrcReg = MI->getOperand(0).getReg();
1345 unsigned ScratchReg = MI->getOperand(1).getReg();
1346 {
1347 MCInst TmpInst;
1348 TmpInst.setOpcode(ARM::tLDR);
1349 TmpInst.addOperand(MCOperand::CreateReg(ScratchReg));
1350 TmpInst.addOperand(MCOperand::CreateReg(SrcReg));
1351 // The offset immediate is #8. The operand value is scaled by 4 for the
1352 // tSTR instruction.
1353 TmpInst.addOperand(MCOperand::CreateImm(2));
1354 TmpInst.addOperand(MCOperand::CreateReg(0));
1355 // Predicate.
1356 TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL));
1357 TmpInst.addOperand(MCOperand::CreateReg(0));
1358 OutStreamer.EmitInstruction(TmpInst);
1359 }
1360 {
1361 MCInst TmpInst;
1362 TmpInst.setOpcode(ARM::tMOVtgpr2gpr);
1363 TmpInst.addOperand(MCOperand::CreateReg(ARM::SP));
1364 TmpInst.addOperand(MCOperand::CreateReg(ScratchReg));
1365 // Predicate.
1366 TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL));
1367 TmpInst.addOperand(MCOperand::CreateReg(0));
1368 OutStreamer.EmitInstruction(TmpInst);
1369 }
1370 {
1371 MCInst TmpInst;
1372 TmpInst.setOpcode(ARM::tLDR);
1373 TmpInst.addOperand(MCOperand::CreateReg(ScratchReg));
1374 TmpInst.addOperand(MCOperand::CreateReg(SrcReg));
1375 TmpInst.addOperand(MCOperand::CreateImm(1));
1376 TmpInst.addOperand(MCOperand::CreateReg(0));
1377 // Predicate.
1378 TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL));
1379 TmpInst.addOperand(MCOperand::CreateReg(0));
1380 OutStreamer.EmitInstruction(TmpInst);
1381 }
1382 {
1383 MCInst TmpInst;
1384 TmpInst.setOpcode(ARM::tLDR);
1385 TmpInst.addOperand(MCOperand::CreateReg(ARM::R7));
1386 TmpInst.addOperand(MCOperand::CreateReg(SrcReg));
1387 TmpInst.addOperand(MCOperand::CreateImm(0));
1388 TmpInst.addOperand(MCOperand::CreateReg(0));
1389 // Predicate.
1390 TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL));
1391 TmpInst.addOperand(MCOperand::CreateReg(0));
1392 OutStreamer.EmitInstruction(TmpInst);
1393 }
1394 {
1395 MCInst TmpInst;
1396 TmpInst.setOpcode(ARM::tBX_RET_vararg);
1397 TmpInst.addOperand(MCOperand::CreateReg(ScratchReg));
1398 // Predicate.
1399 TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL));
1400 TmpInst.addOperand(MCOperand::CreateReg(0));
1401 OutStreamer.EmitInstruction(TmpInst);
1402 }
1403 return;
1404 }
Chris Lattner97f06932009-10-19 20:20:46 +00001405 }
Jim Grosbachb0739b72010-09-02 01:02:06 +00001406
Chris Lattner97f06932009-10-19 20:20:46 +00001407 MCInst TmpInst;
Chris Lattner30e2cc22010-11-14 21:00:02 +00001408 LowerARMMachineInstrToMCInst(MI, TmpInst, *this);
Chris Lattner850d2e22010-02-03 01:16:28 +00001409 OutStreamer.EmitInstruction(TmpInst);
Chris Lattner97f06932009-10-19 20:20:46 +00001410}
Daniel Dunbar2685a292009-10-20 05:15:36 +00001411
1412//===----------------------------------------------------------------------===//
1413// Target Registry Stuff
1414//===----------------------------------------------------------------------===//
1415
1416static MCInstPrinter *createARMMCInstPrinter(const Target &T,
1417 unsigned SyntaxVariant,
Chris Lattnerd3740872010-04-04 05:04:31 +00001418 const MCAsmInfo &MAI) {
Daniel Dunbar2685a292009-10-20 05:15:36 +00001419 if (SyntaxVariant == 0)
Jim Grosbach74d7e6c2010-09-17 21:33:25 +00001420 return new ARMInstPrinter(MAI);
Daniel Dunbar2685a292009-10-20 05:15:36 +00001421 return 0;
1422}
1423
1424// Force static initialization.
1425extern "C" void LLVMInitializeARMAsmPrinter() {
1426 RegisterAsmPrinter<ARMAsmPrinter> X(TheARMTarget);
1427 RegisterAsmPrinter<ARMAsmPrinter> Y(TheThumbTarget);
1428
1429 TargetRegistry::RegisterMCInstPrinter(TheARMTarget, createARMMCInstPrinter);
1430 TargetRegistry::RegisterMCInstPrinter(TheThumbTarget, createARMMCInstPrinter);
1431}
1432