Rafael Espindola | 4d4c021 | 2006-09-19 16:41:40 +0000 | [diff] [blame] | 1 | //===-- ARMMul.cpp - Define TargetMachine for A5CRM -----------------------===// |
Rafael Espindola | 71f3b94 | 2006-09-19 15:49:25 +0000 | [diff] [blame] | 2 | // |
| 3 | // The LLVM Compiler Infrastructure |
| 4 | // |
| 5 | // This file was developed by the "Instituto Nokia de Tecnologia" and |
| 6 | // is distributed under the University of Illinois Open Source |
| 7 | // License. See LICENSE.TXT for details. |
| 8 | // |
| 9 | //===----------------------------------------------------------------------===// |
| 10 | // |
Rafael Espindola | bec2e38 | 2006-10-16 16:33:29 +0000 | [diff] [blame^] | 11 | // Modify the ARM multiplication instructions so that Rd{Hi,Lo} and Rm are distinct |
Rafael Espindola | 71f3b94 | 2006-09-19 15:49:25 +0000 | [diff] [blame] | 12 | // |
| 13 | //===----------------------------------------------------------------------===// |
| 14 | |
| 15 | |
| 16 | #include "ARM.h" |
| 17 | #include "llvm/CodeGen/MachineInstrBuilder.h" |
| 18 | #include "llvm/CodeGen/MachineFunctionPass.h" |
| 19 | #include "llvm/Support/Compiler.h" |
| 20 | |
| 21 | using namespace llvm; |
| 22 | |
| 23 | namespace { |
| 24 | class VISIBILITY_HIDDEN FixMul : public MachineFunctionPass { |
| 25 | virtual bool runOnMachineFunction(MachineFunction &MF); |
| 26 | }; |
| 27 | } |
| 28 | |
| 29 | FunctionPass *llvm::createARMFixMulPass() { return new FixMul(); } |
| 30 | |
| 31 | bool FixMul::runOnMachineFunction(MachineFunction &MF) { |
| 32 | bool Changed = false; |
| 33 | |
| 34 | for (MachineFunction::iterator BB = MF.begin(), E = MF.end(); |
| 35 | BB != E; ++BB) { |
| 36 | MachineBasicBlock &MBB = *BB; |
| 37 | |
| 38 | for (MachineBasicBlock::iterator I = MBB.begin(), E = MBB.end(); |
| 39 | I != E; ++I) { |
| 40 | MachineInstr *MI = I; |
| 41 | |
Rafael Espindola | bec2e38 | 2006-10-16 16:33:29 +0000 | [diff] [blame^] | 42 | int Op = MI->getOpcode(); |
| 43 | if (Op == ARM::MUL || |
| 44 | Op == ARM::SMULL || |
| 45 | Op == ARM::UMULL) { |
Rafael Espindola | 4d4c021 | 2006-09-19 16:41:40 +0000 | [diff] [blame] | 46 | MachineOperand &RdOp = MI->getOperand(0); |
| 47 | MachineOperand &RmOp = MI->getOperand(1); |
| 48 | MachineOperand &RsOp = MI->getOperand(2); |
Rafael Espindola | 71f3b94 | 2006-09-19 15:49:25 +0000 | [diff] [blame] | 49 | |
Rafael Espindola | 4d4c021 | 2006-09-19 16:41:40 +0000 | [diff] [blame] | 50 | unsigned Rd = RdOp.getReg(); |
| 51 | unsigned Rm = RmOp.getReg(); |
| 52 | unsigned Rs = RsOp.getReg(); |
Rafael Espindola | 71f3b94 | 2006-09-19 15:49:25 +0000 | [diff] [blame] | 53 | |
Rafael Espindola | bec2e38 | 2006-10-16 16:33:29 +0000 | [diff] [blame^] | 54 | if (Rd == Rm) { |
Rafael Espindola | 4d4c021 | 2006-09-19 16:41:40 +0000 | [diff] [blame] | 55 | Changed = true; |
| 56 | if (Rd != Rs) { |
| 57 | //Rd and Rm must be distinct, but Rd can be equal to Rs. |
| 58 | //Swap Rs and Rm |
| 59 | RmOp.setReg(Rs); |
| 60 | RsOp.setReg(Rm); |
| 61 | } else { |
Rafael Espindola | bec2e38 | 2006-10-16 16:33:29 +0000 | [diff] [blame^] | 62 | unsigned scratch = Op == ARM::MUL ? ARM::R12 : ARM::R0; |
| 63 | BuildMI(MBB, I, ARM::MOV, 3, scratch).addReg(Rm).addImm(0) |
Rafael Espindola | 4d4c021 | 2006-09-19 16:41:40 +0000 | [diff] [blame] | 64 | .addImm(ARMShift::LSL); |
Rafael Espindola | bec2e38 | 2006-10-16 16:33:29 +0000 | [diff] [blame^] | 65 | RmOp.setReg(scratch); |
Rafael Espindola | 4d4c021 | 2006-09-19 16:41:40 +0000 | [diff] [blame] | 66 | } |
| 67 | } |
Rafael Espindola | 71f3b94 | 2006-09-19 15:49:25 +0000 | [diff] [blame] | 68 | } |
| 69 | } |
| 70 | } |
| 71 | |
| 72 | return Changed; |
| 73 | } |