Gitiles
Code Review Sign In
gerrit-public.fairphone.software / fp2-dev / platform / external / llvm / c23b933d5f8be9b51a1d22e717c0311f65f87dcd / . / test / CodeGen / ARM / fast-isel-intrinsic.ll
blob: b73fceff6cd07af7ba93c155376bc169d3ed20c8 [file] [log] [blame]
Evan Chengafff9412011-12-20 18:26:50 +0000[diff] [blame]1; RUN: llc < %s -O0 -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=armv7-apple-ios | FileCheck %s --check-prefix=ARM
2; RUN: llc < %s -O0 -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=thumbv7-apple-ios | FileCheck %s --check-prefix=THUMB
Chad Rosier49d6fc02012-06-12 19:25:13 +0000[diff] [blame]3; RUN: llc < %s -O0 -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=armv7-apple-ios -arm-long-calls | FileCheck %s --check-prefix=ARM-LONG
4; RUN: llc < %s -O0 -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=thumbv7-apple-ios -arm-long-calls | FileCheck %s --check-prefix=THUMB-LONG
Chad Rosier11add262011-11-11 23:31:03 +0000[diff] [blame]5
6@message1 = global [60 x i8] c"The LLVM Compiler Infrastructure\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00", align 1
7@temp = common global [60 x i8] zeroinitializer, align 1
8
9define void @t1() nounwind ssp {
10; ARM: t1
Jakob Stoklund Olesen45ca7c62012-01-07 01:47:05 +0000[diff] [blame]11; ARM: movw r0, :lower16:_message1
12; ARM: movt r0, :upper16:_message1
Chad Rosier11add262011-11-11 23:31:03 +0000[diff] [blame]13; ARM: add r0, r0, #5
14; ARM: movw r1, #64
15; ARM: movw r2, #10
16; ARM: uxtb r1, r1
Chad Rosier9eb67482011-11-13 09:44:21 +0000[diff] [blame]17; ARM: bl _memset
Chad Rosier49d6fc02012-06-12 19:25:13 +0000[diff] [blame]18; ARM-LONG: t1
19; ARM-LONG: movw r3, :lower16:L_memset$non_lazy_ptr
20; ARM-LONG: movt r3, :upper16:L_memset$non_lazy_ptr
21; ARM-LONG: ldr r3, [r3]
22; ARM-LONG: blx r3
Chad Rosier11add262011-11-11 23:31:03 +0000[diff] [blame]23; THUMB: t1
Jakob Stoklund Olesen45ca7c62012-01-07 01:47:05 +0000[diff] [blame]24; THUMB: movw r0, :lower16:_message1
25; THUMB: movt r0, :upper16:_message1
Chad Rosier11add262011-11-11 23:31:03 +0000[diff] [blame]26; THUMB: adds r0, #5
27; THUMB: movs r1, #64
28; THUMB: movt r1, #0
29; THUMB: movs r2, #10
30; THUMB: movt r2, #0
31; THUMB: uxtb r1, r1
32; THUMB: bl _memset
Chad Rosier49d6fc02012-06-12 19:25:13 +0000[diff] [blame]33; THUMB-LONG: t1
34; THUMB-LONG: movw r3, :lower16:L_memset$non_lazy_ptr
35; THUMB-LONG: movt r3, :upper16:L_memset$non_lazy_ptr
36; THUMB-LONG: ldr r3, [r3]
37; THUMB-LONG: blx r3
Chad Rosier11add262011-11-11 23:31:03 +0000[diff] [blame]38 call void @llvm.memset.p0i8.i32(i8* getelementptr inbounds ([60 x i8]* @message1, i32 0, i32 5), i8 64, i32 10, i32 1, i1 false)
39 ret void
40}
41
42declare void @llvm.memset.p0i8.i32(i8* nocapture, i8, i32, i32, i1) nounwind
43
44define void @t2() nounwind ssp {
45; ARM: t2
Jakob Stoklund Olesen45ca7c62012-01-07 01:47:05 +0000[diff] [blame]46; ARM: movw r0, :lower16:L_temp$non_lazy_ptr
47; ARM: movt r0, :upper16:L_temp$non_lazy_ptr
Chad Rosier11add262011-11-11 23:31:03 +0000[diff] [blame]48; ARM: ldr r0, [r0]
49; ARM: add r1, r0, #4
50; ARM: add r0, r0, #16
Chad Rosier909cb4f2011-11-14 22:46:17 +0000[diff] [blame]51; ARM: movw r2, #17
Chad Rosier11add262011-11-11 23:31:03 +0000[diff] [blame]52; ARM: str r0, [sp] @ 4-byte Spill
53; ARM: mov r0, r1
54; ARM: ldr r1, [sp] @ 4-byte Reload
Chad Rosier9eb67482011-11-13 09:44:21 +0000[diff] [blame]55; ARM: bl _memcpy
Chad Rosier49d6fc02012-06-12 19:25:13 +0000[diff] [blame]56; ARM-LONG: t2
57; ARM-LONG: movw r3, :lower16:L_memcpy$non_lazy_ptr
58; ARM-LONG: movt r3, :upper16:L_memcpy$non_lazy_ptr
59; ARM-LONG: ldr r3, [r3]
60; ARM-LONG: blx r3
Chad Rosier11add262011-11-11 23:31:03 +0000[diff] [blame]61; THUMB: t2
Jakob Stoklund Olesen45ca7c62012-01-07 01:47:05 +0000[diff] [blame]62; THUMB: movw r0, :lower16:L_temp$non_lazy_ptr
63; THUMB: movt r0, :upper16:L_temp$non_lazy_ptr
Chad Rosier11add262011-11-11 23:31:03 +0000[diff] [blame]64; THUMB: ldr r0, [r0]
65; THUMB: adds r1, r0, #4
66; THUMB: adds r0, #16
Chad Rosier909cb4f2011-11-14 22:46:17 +0000[diff] [blame]67; THUMB: movs r2, #17
Chad Rosier11add262011-11-11 23:31:03 +0000[diff] [blame]68; THUMB: movt r2, #0
69; THUMB: mov r0, r1
70; THUMB: bl _memcpy
Chad Rosier49d6fc02012-06-12 19:25:13 +0000[diff] [blame]71; THUMB-LONG: t2
72; THUMB-LONG: movw r3, :lower16:L_memcpy$non_lazy_ptr
73; THUMB-LONG: movt r3, :upper16:L_memcpy$non_lazy_ptr
74; THUMB-LONG: ldr r3, [r3]
75; THUMB-LONG: blx r3
Chad Rosier909cb4f2011-11-14 22:46:17 +0000[diff] [blame]76 call void @llvm.memcpy.p0i8.p0i8.i32(i8* getelementptr inbounds ([60 x i8]* @temp, i32 0, i32 4), i8* getelementptr inbounds ([60 x i8]* @temp, i32 0, i32 16), i32 17, i32 1, i1 false)
Chad Rosier11add262011-11-11 23:31:03 +0000[diff] [blame]77 ret void
78}
79
80declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i32, i1) nounwind
81
82define void @t3() nounwind ssp {
83; ARM: t3
Jakob Stoklund Olesen45ca7c62012-01-07 01:47:05 +0000[diff] [blame]84; ARM: movw r0, :lower16:L_temp$non_lazy_ptr
85; ARM: movt r0, :upper16:L_temp$non_lazy_ptr
Chad Rosier11add262011-11-11 23:31:03 +0000[diff] [blame]86; ARM: ldr r0, [r0]
87; ARM: add r1, r0, #4
88; ARM: add r0, r0, #16
89; ARM: movw r2, #10
90; ARM: mov r0, r1
Chad Rosier9eb67482011-11-13 09:44:21 +0000[diff] [blame]91; ARM: bl _memmove
Chad Rosier49d6fc02012-06-12 19:25:13 +0000[diff] [blame]92; ARM-LONG: t3
93; ARM-LONG: movw r3, :lower16:L_memmove$non_lazy_ptr
94; ARM-LONG: movt r3, :upper16:L_memmove$non_lazy_ptr
95; ARM-LONG: ldr r3, [r3]
96; ARM-LONG: blx r3
Chad Rosier11add262011-11-11 23:31:03 +0000[diff] [blame]97; THUMB: t3
Jakob Stoklund Olesen45ca7c62012-01-07 01:47:05 +0000[diff] [blame]98; THUMB: movw r0, :lower16:L_temp$non_lazy_ptr
99; THUMB: movt r0, :upper16:L_temp$non_lazy_ptr
Chad Rosier11add262011-11-11 23:31:03 +0000[diff] [blame]100; THUMB: ldr r0, [r0]
101; THUMB: adds r1, r0, #4
102; THUMB: adds r0, #16
103; THUMB: movs r2, #10
104; THUMB: movt r2, #0
105; THUMB: mov r0, r1
106; THUMB: bl _memmove
Chad Rosier49d6fc02012-06-12 19:25:13 +0000[diff] [blame]107; THUMB-LONG: t3
108; THUMB-LONG: movw r3, :lower16:L_memmove$non_lazy_ptr
109; THUMB-LONG: movt r3, :upper16:L_memmove$non_lazy_ptr
110; THUMB-LONG: ldr r3, [r3]
111; THUMB-LONG: blx r3
Chad Rosier11add262011-11-11 23:31:03 +0000[diff] [blame]112 call void @llvm.memmove.p0i8.p0i8.i32(i8* getelementptr inbounds ([60 x i8]* @temp, i32 0, i32 4), i8* getelementptr inbounds ([60 x i8]* @temp, i32 0, i32 16), i32 10, i32 1, i1 false)
113 ret void
114}
115
Chad Rosier909cb4f2011-11-14 22:46:17 +0000[diff] [blame]116define void @t4() nounwind ssp {
117; ARM: t4
Jakob Stoklund Olesen45ca7c62012-01-07 01:47:05 +0000[diff] [blame]118; ARM: movw r0, :lower16:L_temp$non_lazy_ptr
119; ARM: movt r0, :upper16:L_temp$non_lazy_ptr
Chad Rosier909cb4f2011-11-14 22:46:17 +0000[diff] [blame]120; ARM: ldr r0, [r0]
Jakob Stoklund Olesen4964ba02012-01-07 04:07:22 +0000[diff] [blame]121; ARM: ldr r1, [r0, #16]
122; ARM: str r1, [r0, #4]
123; ARM: ldr r1, [r0, #20]
124; ARM: str r1, [r0, #8]
125; ARM: ldrh r1, [r0, #24]
Chad Rosier909cb4f2011-11-14 22:46:17 +0000[diff] [blame]126; ARM: strh r1, [r0, #12]
127; ARM: bx lr
Jakob Stoklund Olesen45ca7c62012-01-07 01:47:05 +0000[diff] [blame]128; THUMB: movw r0, :lower16:L_temp$non_lazy_ptr
129; THUMB: movt r0, :upper16:L_temp$non_lazy_ptr
Chad Rosier909cb4f2011-11-14 22:46:17 +0000[diff] [blame]130; THUMB: ldr r0, [r0]
Jakob Stoklund Olesen4964ba02012-01-07 04:07:22 +0000[diff] [blame]131; THUMB: ldr r1, [r0, #16]
132; THUMB: str r1, [r0, #4]
133; THUMB: ldr r1, [r0, #20]
134; THUMB: str r1, [r0, #8]
135; THUMB: ldrh r1, [r0, #24]
Chad Rosier909cb4f2011-11-14 22:46:17 +0000[diff] [blame]136; THUMB: strh r1, [r0, #12]
137; THUMB: bx lr
138 call void @llvm.memcpy.p0i8.p0i8.i32(i8* getelementptr inbounds ([60 x i8]* @temp, i32 0, i32 4), i8* getelementptr inbounds ([60 x i8]* @temp, i32 0, i32 16), i32 10, i32 1, i1 false)
139 ret void
140}
141
Chad Rosier11add262011-11-11 23:31:03 +0000[diff] [blame]142declare void @llvm.memmove.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i32, i1) nounwind