blob: 4f3cfb7df41c5a65699e6285b36dd09031c32677 [file] [log] [blame]
Akira Hatanakaed2a7d22011-11-29 23:08:41 +00001; RUN: llc -march=mips -mcpu=mips32r2 < %s | FileCheck %s
Bruno Cardoso Lopes908b6dd2010-12-09 17:32:30 +00002
Akira Hatanaka5773fd52011-09-30 19:18:24 +00003; CHECK: rotrv $2, $4
Bruno Cardoso Lopes908b6dd2010-12-09 17:32:30 +00004define i32 @rot0(i32 %a, i32 %b) nounwind readnone {
5entry:
6 %shl = shl i32 %a, %b
7 %sub = sub i32 32, %b
8 %shr = lshr i32 %a, %sub
9 %or = or i32 %shr, %shl
10 ret i32 %or
11}
12
13; CHECK: rotr $2, $4, 22
14define i32 @rot1(i32 %a) nounwind readnone {
15entry:
16 %shl = shl i32 %a, 10
17 %shr = lshr i32 %a, 22
18 %or = or i32 %shl, %shr
19 ret i32 %or
20}
21
22; CHECK: rotrv $2, $4, $5
23define i32 @rot2(i32 %a, i32 %b) nounwind readnone {
24entry:
25 %shr = lshr i32 %a, %b
26 %sub = sub i32 32, %b
27 %shl = shl i32 %a, %sub
28 %or = or i32 %shl, %shr
29 ret i32 %or
30}
31
32; CHECK: rotr $2, $4, 10
33define i32 @rot3(i32 %a) nounwind readnone {
34entry:
35 %shr = lshr i32 %a, 10
36 %shl = shl i32 %a, 22
37 %or = or i32 %shr, %shl
38 ret i32 %or
39}
40