Blame - docs/CommandGuide/llc.pod - fp2-dev/platform/external/llvm

blob: 71cbf1cb3a3b4b4d51074ac9728ce2cb6f88a17c [file] [log] [blame]

Brian Gaeke	e993d20	2004-05-14 19:50:33 +0000	[diff] [blame]	1	=pod
				2
				3	=head1 NAME
				4
				5	llc - LLVM static compiler
				6
				7	=head1 SYNOPSIS
				8
Misha Brukman	c08937a	2004-07-02 16:06:19 +0000	[diff] [blame]	9	B<llc> [I<options>] [I<filename>]
Brian Gaeke	e993d20	2004-05-14 19:50:33 +0000	[diff] [blame]	10
				11	=head1 DESCRIPTION
				12
				13	The B<llc> command compiles LLVM bytecode into assembly language for a
				14	specified architecture. The assembly language output can then be passed through
				15	a native assembler and linker to generate native code.
				16
				17	The choice of architecture for the output assembly code is determined as
				18	follows, by attempting to satisfy each of the following rules in turn (first
				19	one wins):
				20
				21	=over
				22
				23	=item *
				24
				25	If the user has specified an architecture with the -m option, use that
				26	architecture.
				27
				28	=item *
				29
				30	Examine the input LLVM bytecode file: if it is little endian and has a
				31	pointer size of 32 bits, select the Intel IA-32 architecture. If it is big
				32	endian and has a pointer size of 64 bits, select the SparcV9 architecture.
				33
				34	=item *
				35
				36	If B<llc> was compiled on an architecture for which it can generate code, select
				37	the architecture upon which B<llc> was compiled.
				38
				39	=item *
				40
				41	Exit with an error message telling the user to specify the output
				42	architecture explicitly.
				43
				44	=back
				45
				46	=head1 OPTIONS
				47
				48	If I<filename> is - or omitted, B<llc> reads LLVM bytecode from standard input.
				49	Otherwise, it will read LLVM bytecode from I<filename>.
				50
				51	If the B<-o> option is omitted, then B<llc> will send its output to standard
				52	output if the input is from standard input. If the B<-o> option specifies -,
				53	then the output will also be sent to standard output.
				54
				55	If no B<-o> option is specified and an input file other than - is specified,
				56	then B<llc> creates the output filename by taking the input filename,
				57	removing any existing F<.bc> extension, and adding a F<.s> suffix.
				58
				59	Other B<llc> options are as follows:
				60
				61	=over
				62
				63	=item B<-f>
				64
				65	Overwrite output files. By default, B<llc> will refuse to overwrite
				66	an output file which already exists.
				67
				68	=item B<-march>=I<arch>
				69
				70	Specify the architecture for which to generate assembly. Valid
				71	architectures are:
				72
				73	=over
				74
				75	=item I<x86>
				76
				77	Intel IA-32 (Pentium and above)
				78
				79	=item I<sparcv9>
				80
				81	64-bit SPARC V9
				82
				83	=item I<c>
				84
				85	Emit C code, not assembly
				86
				87	=back
				88
				89	=item B<-enable-correct-eh-support>
				90
				91	Instruct the B<-lowerinvoke> pass to insert code for correct exception handling
				92	support. This is expensive and is by default omitted for efficiency.
				93
				94	=item B<-help>
				95
				96	Print a summary of command line options.
				97
				98	=item B<-stats>
				99
				100	Print statistics recorded by code-generation passes.
				101
				102	=item B<-time-passes>
				103
				104	Record the amount of time needed for each pass and print a report to standard
				105	error.
				106
				107	=back
				108
				109	=head2 Intel IA-32-specific Options
				110
				111	=over
				112
				113	=item B<--disable-fp-elim>
				114
				115	Disable frame pointer elimination optimization.
				116
				117	=item B<--disable-pattern-isel>
				118
				119	Use the 'simple' X86 instruction selector (the default).
				120
				121	=item B<--print-machineinstrs>
				122
				123	Print generated machine code.
				124
				125	=item B<--regalloc>=I<allocator>
				126
				127	Specify the register allocator to use. The default I<allocator> is I<local>.
				128	Valid register allocators are:
				129
				130	=over
				131
				132	=item I<simple>
				133
				134	Very simple "always spill" register allocator
				135
				136	=item I<local>
				137
				138	Local register allocator
				139
				140	=item I<linearscan>
				141
				142	Linear scan global register allocator (experimental)
				143
				144	=back
				145
				146	=item B<--spiller>=I<spiller>
				147
				148	Specify the spiller to use for register allocators that support it. Currently
				149	this option is used only by the linear scan register allocator. The default
				150	I<spiller> is I<local>. Valid spillers are:
				151
				152	=over
				153
				154	=item I<simple>
				155
				156	Simple spiller
				157
				158	=item I<local>
				159
				160	Local spiller
				161
				162	=back
				163
				164	=back
				165
				166	=head2 SPARCV9-specific Options
				167
				168	=over
				169
				170	=item B<--disable-peephole>
				171
				172	Disable peephole optimization pass.
				173
				174	=item B<--disable-sched>
				175
				176	Disable local scheduling pass.
				177
				178	=item B<--disable-strip>
				179
				180	The Sparc backend embeds the LLVM bytecode into the assembly output. This
				181	option requests that symbol names be retained; by default, they are stripped out.
				182
				183	=item B<--enable-maps>
				184
				185	Emit LLVM-to-machine code mapping information into the assembly output.
				186
				187	=back
				188
				189	=head1 EXIT STATUS
				190
				191	If B<llc> succeeds, it will exit with 0. Otherwise, if an error occurs,
				192	it will exit with a non-zero value.
				193
				194	=head1 SEE ALSO
				195
Misha Brukman	c08937a	2004-07-02 16:06:19 +0000	[diff] [blame]	196	L<lli\|lli>
Brian Gaeke	e993d20	2004-05-14 19:50:33 +0000	[diff] [blame]	197
				198	=head1 AUTHORS
				199
				200	Maintained by the LLVM Team (L<http://llvm.cs.uiuc.edu>).
				201
				202	=cut