Chris Lattner | 762fb5f | 2003-08-03 15:47:49 +0000 | [diff] [blame] | 1 | //===- X86.td - Target definition file for the Intel X86 arch ---*- C++ -*-===// |
John Criswell | 856ba76 | 2003-10-21 15:17:13 +0000 | [diff] [blame] | 2 | // |
| 3 | // The LLVM Compiler Infrastructure |
| 4 | // |
| 5 | // This file was developed by the LLVM research group and is distributed under |
| 6 | // the University of Illinois Open Source License. See LICENSE.TXT for details. |
| 7 | // |
| 8 | //===----------------------------------------------------------------------===// |
Chris Lattner | 762fb5f | 2003-08-03 15:47:49 +0000 | [diff] [blame] | 9 | // |
| 10 | // This is a target description file for the Intel i386 architecture, refered to |
| 11 | // here as the "X86" architecture. |
| 12 | // |
| 13 | //===----------------------------------------------------------------------===// |
| 14 | |
Chris Lattner | c8f4587 | 2003-08-04 04:59:56 +0000 | [diff] [blame] | 15 | // Get the target-independent interfaces which we are implementing... |
Chris Lattner | 762fb5f | 2003-08-03 15:47:49 +0000 | [diff] [blame] | 16 | // |
| 17 | include "../Target.td" |
| 18 | |
| 19 | //===----------------------------------------------------------------------===// |
| 20 | // Register File Description |
| 21 | //===----------------------------------------------------------------------===// |
| 22 | |
| 23 | include "X86RegisterInfo.td" |
| 24 | |
Chris Lattner | b77eb78 | 2003-08-03 18:19:37 +0000 | [diff] [blame] | 25 | //===----------------------------------------------------------------------===// |
| 26 | // Instruction Descriptions |
| 27 | //===----------------------------------------------------------------------===// |
| 28 | |
Chris Lattner | 1cca5e3 | 2003-08-03 21:54:21 +0000 | [diff] [blame] | 29 | include "X86InstrInfo.td" |
| 30 | |
Chris Lattner | b77eb78 | 2003-08-03 18:19:37 +0000 | [diff] [blame] | 31 | def X86InstrInfo : InstrInfo { |
Chris Lattner | c8f4587 | 2003-08-04 04:59:56 +0000 | [diff] [blame] | 32 | let PHIInst = PHI; |
Chris Lattner | 1cca5e3 | 2003-08-03 21:54:21 +0000 | [diff] [blame] | 33 | |
| 34 | // Define how we want to layout our TargetSpecific information field... This |
| 35 | // should be kept up-to-date with the fields in the X86InstrInfo.h file. |
John Criswell | 4ffff9e | 2004-04-08 20:31:47 +0000 | [diff] [blame] | 36 | let TSFlagsFields = ["FormBits", |
| 37 | "hasOpSizePrefix", |
| 38 | "Prefix", |
| 39 | "MemTypeBits", |
| 40 | "ImmTypeBits", |
| 41 | "FPFormBits", |
| 42 | "printImplicitUsesAfter", |
John Criswell | 4ffff9e | 2004-04-08 20:31:47 +0000 | [diff] [blame] | 43 | "Opcode"]; |
| 44 | let TSFlagsShifts = [0, |
| 45 | 5, |
| 46 | 6, |
| 47 | 10, |
| 48 | 13, |
| 49 | 15, |
| 50 | 18, |
Chris Lattner | a35ce87 | 2004-08-01 08:23:17 +0000 | [diff] [blame] | 51 | 19]; |
Chris Lattner | b77eb78 | 2003-08-03 18:19:37 +0000 | [diff] [blame] | 52 | } |
| 53 | |
| 54 | def X86 : Target { |
| 55 | // Specify the callee saved registers. |
Chris Lattner | c8f4587 | 2003-08-04 04:59:56 +0000 | [diff] [blame] | 56 | let CalleeSavedRegisters = [ESI, EDI, EBX, EBP]; |
Chris Lattner | b77eb78 | 2003-08-03 18:19:37 +0000 | [diff] [blame] | 57 | |
| 58 | // Yes, pointers are 32-bits in size. |
Chris Lattner | c8f4587 | 2003-08-04 04:59:56 +0000 | [diff] [blame] | 59 | let PointerType = i32; |
Chris Lattner | b77eb78 | 2003-08-03 18:19:37 +0000 | [diff] [blame] | 60 | |
| 61 | // Information about the instructions... |
Chris Lattner | c8f4587 | 2003-08-04 04:59:56 +0000 | [diff] [blame] | 62 | let InstructionSet = X86InstrInfo; |
Chris Lattner | b77eb78 | 2003-08-03 18:19:37 +0000 | [diff] [blame] | 63 | } |