Blame - lib/CodeGen/SelectionDAG/TargetLowering.cpp - fp2-dev/platform/external/llvm

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Chris Lattner	310968c	2005-01-07 07:44:53 +0000	[diff] [blame]	1	//===-- TargetLowering.cpp - Implement the TargetLowering class -----------===//
Misha Brukman	f976c85	2005-04-21 22:55:34 +0000	[diff] [blame]	2	//
Chris Lattner	310968c	2005-01-07 07:44:53 +0000	[diff] [blame]	3	// The LLVM Compiler Infrastructure
				4	//
Chris Lattner	4ee451d	2007-12-29 20:36:04 +0000	[diff] [blame]	5	// This file is distributed under the University of Illinois Open Source
				6	// License. See LICENSE.TXT for details.
Misha Brukman	f976c85	2005-04-21 22:55:34 +0000	[diff] [blame]	7	//
Chris Lattner	310968c	2005-01-07 07:44:53 +0000	[diff] [blame]	8	//===----------------------------------------------------------------------===//
				9	//
				10	// This implements the TargetLowering class.
				11	//
				12	//===----------------------------------------------------------------------===//
				13
				14	#include "llvm/Target/TargetLowering.h"
Chris Lattner	af76e59	2009-08-22 20:48:53 +0000	[diff] [blame]	15	#include "llvm/MC/MCAsmInfo.h"
Chris Lattner	beeb93e	2010-01-26 05:58:28 +0000	[diff] [blame]	16	#include "llvm/MC/MCExpr.h"
Owen Anderson	07000c6	2006-05-12 06:33:49 +0000	[diff] [blame]	17	#include "llvm/Target/TargetData.h"
Chris Lattner	f014412	2009-07-28 03:13:23 +0000	[diff] [blame]	18	#include "llvm/Target/TargetLoweringObjectFile.h"
Chris Lattner	310968c	2005-01-07 07:44:53 +0000	[diff] [blame]	19	#include "llvm/Target/TargetMachine.h"
Dan Gohman	6f0d024	2008-02-10 18:45:23 +0000	[diff] [blame]	20	#include "llvm/Target/TargetRegisterInfo.h"
Dan Gohman	707e018	2008-04-12 04:36:06 +0000	[diff] [blame]	21	#include "llvm/GlobalVariable.h"
Chris Lattner	dc87929	2006-03-31 00:28:56 +0000	[diff] [blame]	22	#include "llvm/DerivedTypes.h"
Dan Gohman	84023e0	2010-07-10 09:00:22 +0000	[diff] [blame]	23	#include "llvm/CodeGen/Analysis.h"
Evan Cheng	ad4196b	2008-05-12 19:56:52 +0000	[diff] [blame]	24	#include "llvm/CodeGen/MachineFrameInfo.h"
Chris Lattner	071c62f	2010-01-25 23:26:13 +0000	[diff] [blame]	25	#include "llvm/CodeGen/MachineJumpTableInfo.h"
Chris Lattner	589c6f6	2010-01-26 06:28:43 +0000	[diff] [blame]	26	#include "llvm/CodeGen/MachineFunction.h"
Chris Lattner	310968c	2005-01-07 07:44:53 +0000	[diff] [blame]	27	#include "llvm/CodeGen/SelectionDAG.h"
Owen Anderson	718cb66	2007-09-07 04:06:50 +0000	[diff] [blame]	28	#include "llvm/ADT/STLExtras.h"
Nadav Rotem	b6fbec3	2011-06-01 12:51:46 +0000	[diff] [blame]	29	#include "llvm/Support/CommandLine.h"
Torok Edwin	c25e758	2009-07-11 20:10:48 +0000	[diff] [blame]	30	#include "llvm/Support/ErrorHandling.h"
Chris Lattner	c6fd6cd	2006-01-30 04:09:27 +0000	[diff] [blame]	31	#include "llvm/Support/MathExtras.h"
Nick Lewycky	476b242	2010-12-19 20:43:38 +0000	[diff] [blame]	32	#include <cctype>
Chris Lattner	310968c	2005-01-07 07:44:53 +0000	[diff] [blame]	33	using namespace llvm;
				34
Nadav Rotem	b6fbec3	2011-06-01 12:51:46 +0000	[diff] [blame]	35	/// We are in the process of implementing a new TypeLegalization action
				36	/// - the promotion of vector elements. This feature is disabled by default
				37	/// and only enabled using this flag.
				38	static cl::opt<bool>
				39	AllowPromoteIntElem("promote-elements", cl::Hidden,
				40	cl::desc("Allow promotion of integer vector element types"));
				41
Rafael Espindola	9a58023	2009-02-27 13:37:18 +0000	[diff] [blame]	42	namespace llvm {
				43	TLSModel::Model getTLSModel(const GlobalValue *GV, Reloc::Model reloc) {
				44	bool isLocal = GV->hasLocalLinkage();
				45	bool isDeclaration = GV->isDeclaration();
				46	// FIXME: what should we do for protected and internal visibility?
				47	// For variables, is internal different from hidden?
				48	bool isHidden = GV->hasHiddenVisibility();
				49
				50	if (reloc == Reloc::PIC_) {
				51	if (isLocal \|\| isHidden)
				52	return TLSModel::LocalDynamic;
				53	else
				54	return TLSModel::GeneralDynamic;
				55	} else {
				56	if (!isDeclaration \|\| isHidden)
				57	return TLSModel::LocalExec;
				58	else
				59	return TLSModel::InitialExec;
				60	}
				61	}
				62	}
				63
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	64	/// InitLibcallNames - Set default libcall names.
				65	///
Evan Cheng	79cca50	2007-01-12 22:51:10 +0000	[diff] [blame]	66	static void InitLibcallNames(const char **Names) {
Anton Korobeynikov	c31642f	2009-05-03 13:14:08 +0000	[diff] [blame]	67	Names[RTLIB::SHL_I16] = "__ashlhi3";
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	68	Names[RTLIB::SHL_I32] = "__ashlsi3";
				69	Names[RTLIB::SHL_I64] = "__ashldi3";
Duncan Sands	dddc629	2008-07-11 16:52:29 +0000	[diff] [blame]	70	Names[RTLIB::SHL_I128] = "__ashlti3";
Anton Korobeynikov	c31642f	2009-05-03 13:14:08 +0000	[diff] [blame]	71	Names[RTLIB::SRL_I16] = "__lshrhi3";
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	72	Names[RTLIB::SRL_I32] = "__lshrsi3";
				73	Names[RTLIB::SRL_I64] = "__lshrdi3";
Duncan Sands	dddc629	2008-07-11 16:52:29 +0000	[diff] [blame]	74	Names[RTLIB::SRL_I128] = "__lshrti3";
Anton Korobeynikov	c31642f	2009-05-03 13:14:08 +0000	[diff] [blame]	75	Names[RTLIB::SRA_I16] = "__ashrhi3";
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	76	Names[RTLIB::SRA_I32] = "__ashrsi3";
				77	Names[RTLIB::SRA_I64] = "__ashrdi3";
Duncan Sands	dddc629	2008-07-11 16:52:29 +0000	[diff] [blame]	78	Names[RTLIB::SRA_I128] = "__ashrti3";
Anton Korobeynikov	8983da7	2009-11-07 17:14:39 +0000	[diff] [blame]	79	Names[RTLIB::MUL_I8] = "__mulqi3";
Anton Korobeynikov	c31642f	2009-05-03 13:14:08 +0000	[diff] [blame]	80	Names[RTLIB::MUL_I16] = "__mulhi3";
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	81	Names[RTLIB::MUL_I32] = "__mulsi3";
				82	Names[RTLIB::MUL_I64] = "__muldi3";
Duncan Sands	5ac319a	2008-07-10 15:35:05 +0000	[diff] [blame]	83	Names[RTLIB::MUL_I128] = "__multi3";
Eric Christopher	362fee9	2011-06-17 20:41:29 +0000	[diff] [blame]	84	Names[RTLIB::MULO_I32] = "__mulosi4";
				85	Names[RTLIB::MULO_I64] = "__mulodi4";
				86	Names[RTLIB::MULO_I128] = "__muloti4";
Anton Korobeynikov	8983da7	2009-11-07 17:14:39 +0000	[diff] [blame]	87	Names[RTLIB::SDIV_I8] = "__divqi3";
Anton Korobeynikov	813090c	2009-05-03 13:18:16 +0000	[diff] [blame]	88	Names[RTLIB::SDIV_I16] = "__divhi3";
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	89	Names[RTLIB::SDIV_I32] = "__divsi3";
				90	Names[RTLIB::SDIV_I64] = "__divdi3";
Duncan Sands	5ac319a	2008-07-10 15:35:05 +0000	[diff] [blame]	91	Names[RTLIB::SDIV_I128] = "__divti3";
Anton Korobeynikov	8983da7	2009-11-07 17:14:39 +0000	[diff] [blame]	92	Names[RTLIB::UDIV_I8] = "__udivqi3";
Anton Korobeynikov	fb3f84f	2009-05-08 18:50:54 +0000	[diff] [blame]	93	Names[RTLIB::UDIV_I16] = "__udivhi3";
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	94	Names[RTLIB::UDIV_I32] = "__udivsi3";
				95	Names[RTLIB::UDIV_I64] = "__udivdi3";
Duncan Sands	5ac319a	2008-07-10 15:35:05 +0000	[diff] [blame]	96	Names[RTLIB::UDIV_I128] = "__udivti3";
Anton Korobeynikov	8983da7	2009-11-07 17:14:39 +0000	[diff] [blame]	97	Names[RTLIB::SREM_I8] = "__modqi3";
Anton Korobeynikov	813090c	2009-05-03 13:18:16 +0000	[diff] [blame]	98	Names[RTLIB::SREM_I16] = "__modhi3";
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	99	Names[RTLIB::SREM_I32] = "__modsi3";
				100	Names[RTLIB::SREM_I64] = "__moddi3";
Duncan Sands	5ac319a	2008-07-10 15:35:05 +0000	[diff] [blame]	101	Names[RTLIB::SREM_I128] = "__modti3";
Anton Korobeynikov	8983da7	2009-11-07 17:14:39 +0000	[diff] [blame]	102	Names[RTLIB::UREM_I8] = "__umodqi3";
Anton Korobeynikov	9fe9c8e	2009-05-03 13:19:57 +0000	[diff] [blame]	103	Names[RTLIB::UREM_I16] = "__umodhi3";
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	104	Names[RTLIB::UREM_I32] = "__umodsi3";
				105	Names[RTLIB::UREM_I64] = "__umoddi3";
Duncan Sands	5ac319a	2008-07-10 15:35:05 +0000	[diff] [blame]	106	Names[RTLIB::UREM_I128] = "__umodti3";
Evan Cheng	8e23e81	2011-04-01 00:42:02 +0000	[diff] [blame]	107
				108	// These are generally not available.
				109	Names[RTLIB::SDIVREM_I8] = 0;
				110	Names[RTLIB::SDIVREM_I16] = 0;
				111	Names[RTLIB::SDIVREM_I32] = 0;
				112	Names[RTLIB::SDIVREM_I64] = 0;
				113	Names[RTLIB::SDIVREM_I128] = 0;
				114	Names[RTLIB::UDIVREM_I8] = 0;
				115	Names[RTLIB::UDIVREM_I16] = 0;
				116	Names[RTLIB::UDIVREM_I32] = 0;
				117	Names[RTLIB::UDIVREM_I64] = 0;
				118	Names[RTLIB::UDIVREM_I128] = 0;
				119
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	120	Names[RTLIB::NEG_I32] = "__negsi2";
				121	Names[RTLIB::NEG_I64] = "__negdi2";
				122	Names[RTLIB::ADD_F32] = "__addsf3";
				123	Names[RTLIB::ADD_F64] = "__adddf3";
Duncan Sands	007f984	2008-01-10 10:28:30 +0000	[diff] [blame]	124	Names[RTLIB::ADD_F80] = "__addxf3";
Dale Johannesen	161e897	2007-10-05 20:04:43 +0000	[diff] [blame]	125	Names[RTLIB::ADD_PPCF128] = "__gcc_qadd";
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	126	Names[RTLIB::SUB_F32] = "__subsf3";
				127	Names[RTLIB::SUB_F64] = "__subdf3";
Duncan Sands	007f984	2008-01-10 10:28:30 +0000	[diff] [blame]	128	Names[RTLIB::SUB_F80] = "__subxf3";
Dale Johannesen	161e897	2007-10-05 20:04:43 +0000	[diff] [blame]	129	Names[RTLIB::SUB_PPCF128] = "__gcc_qsub";
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	130	Names[RTLIB::MUL_F32] = "__mulsf3";
				131	Names[RTLIB::MUL_F64] = "__muldf3";
Duncan Sands	007f984	2008-01-10 10:28:30 +0000	[diff] [blame]	132	Names[RTLIB::MUL_F80] = "__mulxf3";
Dale Johannesen	161e897	2007-10-05 20:04:43 +0000	[diff] [blame]	133	Names[RTLIB::MUL_PPCF128] = "__gcc_qmul";
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	134	Names[RTLIB::DIV_F32] = "__divsf3";
				135	Names[RTLIB::DIV_F64] = "__divdf3";
Duncan Sands	007f984	2008-01-10 10:28:30 +0000	[diff] [blame]	136	Names[RTLIB::DIV_F80] = "__divxf3";
Dale Johannesen	161e897	2007-10-05 20:04:43 +0000	[diff] [blame]	137	Names[RTLIB::DIV_PPCF128] = "__gcc_qdiv";
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	138	Names[RTLIB::REM_F32] = "fmodf";
				139	Names[RTLIB::REM_F64] = "fmod";
Duncan Sands	007f984	2008-01-10 10:28:30 +0000	[diff] [blame]	140	Names[RTLIB::REM_F80] = "fmodl";
Dale Johannesen	161e897	2007-10-05 20:04:43 +0000	[diff] [blame]	141	Names[RTLIB::REM_PPCF128] = "fmodl";
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	142	Names[RTLIB::POWI_F32] = "__powisf2";
				143	Names[RTLIB::POWI_F64] = "__powidf2";
Dale Johannesen	161e897	2007-10-05 20:04:43 +0000	[diff] [blame]	144	Names[RTLIB::POWI_F80] = "__powixf2";
				145	Names[RTLIB::POWI_PPCF128] = "__powitf2";
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	146	Names[RTLIB::SQRT_F32] = "sqrtf";
				147	Names[RTLIB::SQRT_F64] = "sqrt";
Dale Johannesen	161e897	2007-10-05 20:04:43 +0000	[diff] [blame]	148	Names[RTLIB::SQRT_F80] = "sqrtl";
				149	Names[RTLIB::SQRT_PPCF128] = "sqrtl";
Dale Johannesen	7794f2a	2008-09-04 00:47:13 +0000	[diff] [blame]	150	Names[RTLIB::LOG_F32] = "logf";
				151	Names[RTLIB::LOG_F64] = "log";
				152	Names[RTLIB::LOG_F80] = "logl";
				153	Names[RTLIB::LOG_PPCF128] = "logl";
				154	Names[RTLIB::LOG2_F32] = "log2f";
				155	Names[RTLIB::LOG2_F64] = "log2";
				156	Names[RTLIB::LOG2_F80] = "log2l";
				157	Names[RTLIB::LOG2_PPCF128] = "log2l";
				158	Names[RTLIB::LOG10_F32] = "log10f";
				159	Names[RTLIB::LOG10_F64] = "log10";
				160	Names[RTLIB::LOG10_F80] = "log10l";
				161	Names[RTLIB::LOG10_PPCF128] = "log10l";
				162	Names[RTLIB::EXP_F32] = "expf";
				163	Names[RTLIB::EXP_F64] = "exp";
				164	Names[RTLIB::EXP_F80] = "expl";
				165	Names[RTLIB::EXP_PPCF128] = "expl";
				166	Names[RTLIB::EXP2_F32] = "exp2f";
				167	Names[RTLIB::EXP2_F64] = "exp2";
				168	Names[RTLIB::EXP2_F80] = "exp2l";
				169	Names[RTLIB::EXP2_PPCF128] = "exp2l";
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	170	Names[RTLIB::SIN_F32] = "sinf";
				171	Names[RTLIB::SIN_F64] = "sin";
Duncan Sands	007f984	2008-01-10 10:28:30 +0000	[diff] [blame]	172	Names[RTLIB::SIN_F80] = "sinl";
				173	Names[RTLIB::SIN_PPCF128] = "sinl";
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	174	Names[RTLIB::COS_F32] = "cosf";
				175	Names[RTLIB::COS_F64] = "cos";
Duncan Sands	007f984	2008-01-10 10:28:30 +0000	[diff] [blame]	176	Names[RTLIB::COS_F80] = "cosl";
				177	Names[RTLIB::COS_PPCF128] = "cosl";
Dan Gohman	e54be10	2007-10-11 23:09:10 +0000	[diff] [blame]	178	Names[RTLIB::POW_F32] = "powf";
				179	Names[RTLIB::POW_F64] = "pow";
				180	Names[RTLIB::POW_F80] = "powl";
				181	Names[RTLIB::POW_PPCF128] = "powl";
Dan Gohman	2bb1e3e	2008-08-21 18:38:14 +0000	[diff] [blame]	182	Names[RTLIB::CEIL_F32] = "ceilf";
				183	Names[RTLIB::CEIL_F64] = "ceil";
				184	Names[RTLIB::CEIL_F80] = "ceill";
				185	Names[RTLIB::CEIL_PPCF128] = "ceill";
				186	Names[RTLIB::TRUNC_F32] = "truncf";
				187	Names[RTLIB::TRUNC_F64] = "trunc";
				188	Names[RTLIB::TRUNC_F80] = "truncl";
				189	Names[RTLIB::TRUNC_PPCF128] = "truncl";
				190	Names[RTLIB::RINT_F32] = "rintf";
				191	Names[RTLIB::RINT_F64] = "rint";
				192	Names[RTLIB::RINT_F80] = "rintl";
				193	Names[RTLIB::RINT_PPCF128] = "rintl";
				194	Names[RTLIB::NEARBYINT_F32] = "nearbyintf";
				195	Names[RTLIB::NEARBYINT_F64] = "nearbyint";
				196	Names[RTLIB::NEARBYINT_F80] = "nearbyintl";
				197	Names[RTLIB::NEARBYINT_PPCF128] = "nearbyintl";
				198	Names[RTLIB::FLOOR_F32] = "floorf";
				199	Names[RTLIB::FLOOR_F64] = "floor";
				200	Names[RTLIB::FLOOR_F80] = "floorl";
				201	Names[RTLIB::FLOOR_PPCF128] = "floorl";
Duncan Sands	d2c817e	2010-03-14 21:08:40 +0000	[diff] [blame]	202	Names[RTLIB::COPYSIGN_F32] = "copysignf";
				203	Names[RTLIB::COPYSIGN_F64] = "copysign";
				204	Names[RTLIB::COPYSIGN_F80] = "copysignl";
				205	Names[RTLIB::COPYSIGN_PPCF128] = "copysignl";
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	206	Names[RTLIB::FPEXT_F32_F64] = "__extendsfdf2";
Anton Korobeynikov	927411b	2010-03-14 18:42:24 +0000	[diff] [blame]	207	Names[RTLIB::FPEXT_F16_F32] = "__gnu_h2f_ieee";
				208	Names[RTLIB::FPROUND_F32_F16] = "__gnu_f2h_ieee";
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	209	Names[RTLIB::FPROUND_F64_F32] = "__truncdfsf2";
Bruno Cardoso Lopes	e36bfe6	2008-08-07 19:01:24 +0000	[diff] [blame]	210	Names[RTLIB::FPROUND_F80_F32] = "__truncxfsf2";
				211	Names[RTLIB::FPROUND_PPCF128_F32] = "__trunctfsf2";
				212	Names[RTLIB::FPROUND_F80_F64] = "__truncxfdf2";
				213	Names[RTLIB::FPROUND_PPCF128_F64] = "__trunctfdf2";
Anton Korobeynikov	de0118c	2010-03-26 21:32:14 +0000	[diff] [blame]	214	Names[RTLIB::FPTOSINT_F32_I8] = "__fixsfqi";
				215	Names[RTLIB::FPTOSINT_F32_I16] = "__fixsfhi";
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	216	Names[RTLIB::FPTOSINT_F32_I32] = "__fixsfsi";
				217	Names[RTLIB::FPTOSINT_F32_I64] = "__fixsfdi";
Dan Gohman	a2e9485	2008-03-10 23:03:31 +0000	[diff] [blame]	218	Names[RTLIB::FPTOSINT_F32_I128] = "__fixsfti";
Anton Korobeynikov	de0118c	2010-03-26 21:32:14 +0000	[diff] [blame]	219	Names[RTLIB::FPTOSINT_F64_I8] = "__fixdfqi";
				220	Names[RTLIB::FPTOSINT_F64_I16] = "__fixdfhi";
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	221	Names[RTLIB::FPTOSINT_F64_I32] = "__fixdfsi";
				222	Names[RTLIB::FPTOSINT_F64_I64] = "__fixdfdi";
Dan Gohman	a2e9485	2008-03-10 23:03:31 +0000	[diff] [blame]	223	Names[RTLIB::FPTOSINT_F64_I128] = "__fixdfti";
Duncan Sands	be1ad4d	2008-07-10 15:33:02 +0000	[diff] [blame]	224	Names[RTLIB::FPTOSINT_F80_I32] = "__fixxfsi";
Dale Johannesen	161e897	2007-10-05 20:04:43 +0000	[diff] [blame]	225	Names[RTLIB::FPTOSINT_F80_I64] = "__fixxfdi";
Dan Gohman	a2e9485	2008-03-10 23:03:31 +0000	[diff] [blame]	226	Names[RTLIB::FPTOSINT_F80_I128] = "__fixxfti";
Duncan Sands	041cde2	2008-06-25 20:24:48 +0000	[diff] [blame]	227	Names[RTLIB::FPTOSINT_PPCF128_I32] = "__fixtfsi";
Dale Johannesen	161e897	2007-10-05 20:04:43 +0000	[diff] [blame]	228	Names[RTLIB::FPTOSINT_PPCF128_I64] = "__fixtfdi";
Dan Gohman	a2e9485	2008-03-10 23:03:31 +0000	[diff] [blame]	229	Names[RTLIB::FPTOSINT_PPCF128_I128] = "__fixtfti";
Anton Korobeynikov	de0118c	2010-03-26 21:32:14 +0000	[diff] [blame]	230	Names[RTLIB::FPTOUINT_F32_I8] = "__fixunssfqi";
				231	Names[RTLIB::FPTOUINT_F32_I16] = "__fixunssfhi";
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	232	Names[RTLIB::FPTOUINT_F32_I32] = "__fixunssfsi";
				233	Names[RTLIB::FPTOUINT_F32_I64] = "__fixunssfdi";
Dan Gohman	a2e9485	2008-03-10 23:03:31 +0000	[diff] [blame]	234	Names[RTLIB::FPTOUINT_F32_I128] = "__fixunssfti";
Anton Korobeynikov	de0118c	2010-03-26 21:32:14 +0000	[diff] [blame]	235	Names[RTLIB::FPTOUINT_F64_I8] = "__fixunsdfqi";
				236	Names[RTLIB::FPTOUINT_F64_I16] = "__fixunsdfhi";
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	237	Names[RTLIB::FPTOUINT_F64_I32] = "__fixunsdfsi";
				238	Names[RTLIB::FPTOUINT_F64_I64] = "__fixunsdfdi";
Dan Gohman	a2e9485	2008-03-10 23:03:31 +0000	[diff] [blame]	239	Names[RTLIB::FPTOUINT_F64_I128] = "__fixunsdfti";
Dale Johannesen	161e897	2007-10-05 20:04:43 +0000	[diff] [blame]	240	Names[RTLIB::FPTOUINT_F80_I32] = "__fixunsxfsi";
				241	Names[RTLIB::FPTOUINT_F80_I64] = "__fixunsxfdi";
Dan Gohman	a2e9485	2008-03-10 23:03:31 +0000	[diff] [blame]	242	Names[RTLIB::FPTOUINT_F80_I128] = "__fixunsxfti";
Duncan Sands	041cde2	2008-06-25 20:24:48 +0000	[diff] [blame]	243	Names[RTLIB::FPTOUINT_PPCF128_I32] = "__fixunstfsi";
Dale Johannesen	161e897	2007-10-05 20:04:43 +0000	[diff] [blame]	244	Names[RTLIB::FPTOUINT_PPCF128_I64] = "__fixunstfdi";
Dan Gohman	a2e9485	2008-03-10 23:03:31 +0000	[diff] [blame]	245	Names[RTLIB::FPTOUINT_PPCF128_I128] = "__fixunstfti";
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	246	Names[RTLIB::SINTTOFP_I32_F32] = "__floatsisf";
				247	Names[RTLIB::SINTTOFP_I32_F64] = "__floatsidf";
Duncan Sands	9bed0f5	2008-07-11 16:57:02 +0000	[diff] [blame]	248	Names[RTLIB::SINTTOFP_I32_F80] = "__floatsixf";
				249	Names[RTLIB::SINTTOFP_I32_PPCF128] = "__floatsitf";
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	250	Names[RTLIB::SINTTOFP_I64_F32] = "__floatdisf";
				251	Names[RTLIB::SINTTOFP_I64_F64] = "__floatdidf";
Dale Johannesen	161e897	2007-10-05 20:04:43 +0000	[diff] [blame]	252	Names[RTLIB::SINTTOFP_I64_F80] = "__floatdixf";
				253	Names[RTLIB::SINTTOFP_I64_PPCF128] = "__floatditf";
Dan Gohman	d91446d	2008-03-05 01:08:17 +0000	[diff] [blame]	254	Names[RTLIB::SINTTOFP_I128_F32] = "__floattisf";
				255	Names[RTLIB::SINTTOFP_I128_F64] = "__floattidf";
				256	Names[RTLIB::SINTTOFP_I128_F80] = "__floattixf";
				257	Names[RTLIB::SINTTOFP_I128_PPCF128] = "__floattitf";
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	258	Names[RTLIB::UINTTOFP_I32_F32] = "__floatunsisf";
				259	Names[RTLIB::UINTTOFP_I32_F64] = "__floatunsidf";
Duncan Sands	ac6cece	2008-07-11 17:00:14 +0000	[diff] [blame]	260	Names[RTLIB::UINTTOFP_I32_F80] = "__floatunsixf";
				261	Names[RTLIB::UINTTOFP_I32_PPCF128] = "__floatunsitf";
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	262	Names[RTLIB::UINTTOFP_I64_F32] = "__floatundisf";
				263	Names[RTLIB::UINTTOFP_I64_F64] = "__floatundidf";
Duncan Sands	ac6cece	2008-07-11 17:00:14 +0000	[diff] [blame]	264	Names[RTLIB::UINTTOFP_I64_F80] = "__floatundixf";
				265	Names[RTLIB::UINTTOFP_I64_PPCF128] = "__floatunditf";
				266	Names[RTLIB::UINTTOFP_I128_F32] = "__floatuntisf";
				267	Names[RTLIB::UINTTOFP_I128_F64] = "__floatuntidf";
				268	Names[RTLIB::UINTTOFP_I128_F80] = "__floatuntixf";
				269	Names[RTLIB::UINTTOFP_I128_PPCF128] = "__floatuntitf";
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	270	Names[RTLIB::OEQ_F32] = "__eqsf2";
				271	Names[RTLIB::OEQ_F64] = "__eqdf2";
				272	Names[RTLIB::UNE_F32] = "__nesf2";
				273	Names[RTLIB::UNE_F64] = "__nedf2";
				274	Names[RTLIB::OGE_F32] = "__gesf2";
				275	Names[RTLIB::OGE_F64] = "__gedf2";
				276	Names[RTLIB::OLT_F32] = "__ltsf2";
				277	Names[RTLIB::OLT_F64] = "__ltdf2";
				278	Names[RTLIB::OLE_F32] = "__lesf2";
				279	Names[RTLIB::OLE_F64] = "__ledf2";
				280	Names[RTLIB::OGT_F32] = "__gtsf2";
				281	Names[RTLIB::OGT_F64] = "__gtdf2";
				282	Names[RTLIB::UO_F32] = "__unordsf2";
				283	Names[RTLIB::UO_F64] = "__unorddf2";
Evan Cheng	d385fd6	2007-01-31 09:29:11 +0000	[diff] [blame]	284	Names[RTLIB::O_F32] = "__unordsf2";
				285	Names[RTLIB::O_F64] = "__unorddf2";
Sanjiv Gupta	a114baa	2009-07-30 09:12:56 +0000	[diff] [blame]	286	Names[RTLIB::MEMCPY] = "memcpy";
				287	Names[RTLIB::MEMMOVE] = "memmove";
				288	Names[RTLIB::MEMSET] = "memset";
Duncan Sands	b0f1e17	2009-05-22 20:36:31 +0000	[diff] [blame]	289	Names[RTLIB::UNWIND_RESUME] = "_Unwind_Resume";
Jim Grosbach	e03262f	2010-06-18 21:43:38 +0000	[diff] [blame]	290	Names[RTLIB::SYNC_VAL_COMPARE_AND_SWAP_1] = "__sync_val_compare_and_swap_1";
				291	Names[RTLIB::SYNC_VAL_COMPARE_AND_SWAP_2] = "__sync_val_compare_and_swap_2";
				292	Names[RTLIB::SYNC_VAL_COMPARE_AND_SWAP_4] = "__sync_val_compare_and_swap_4";
				293	Names[RTLIB::SYNC_VAL_COMPARE_AND_SWAP_8] = "__sync_val_compare_and_swap_8";
Jim Grosbach	ef6eb9c	2010-06-18 23:03:10 +0000	[diff] [blame]	294	Names[RTLIB::SYNC_LOCK_TEST_AND_SET_1] = "__sync_lock_test_and_set_1";
				295	Names[RTLIB::SYNC_LOCK_TEST_AND_SET_2] = "__sync_lock_test_and_set_2";
				296	Names[RTLIB::SYNC_LOCK_TEST_AND_SET_4] = "__sync_lock_test_and_set_4";
				297	Names[RTLIB::SYNC_LOCK_TEST_AND_SET_8] = "__sync_lock_test_and_set_8";
Jim Grosbach	e03262f	2010-06-18 21:43:38 +0000	[diff] [blame]	298	Names[RTLIB::SYNC_FETCH_AND_ADD_1] = "__sync_fetch_and_add_1";
				299	Names[RTLIB::SYNC_FETCH_AND_ADD_2] = "__sync_fetch_and_add_2";
				300	Names[RTLIB::SYNC_FETCH_AND_ADD_4] = "__sync_fetch_and_add_4";
				301	Names[RTLIB::SYNC_FETCH_AND_ADD_8] = "__sync_fetch_and_add_8";
				302	Names[RTLIB::SYNC_FETCH_AND_SUB_1] = "__sync_fetch_and_sub_1";
				303	Names[RTLIB::SYNC_FETCH_AND_SUB_2] = "__sync_fetch_and_sub_2";
				304	Names[RTLIB::SYNC_FETCH_AND_SUB_4] = "__sync_fetch_and_sub_4";
				305	Names[RTLIB::SYNC_FETCH_AND_SUB_8] = "__sync_fetch_and_sub_8";
				306	Names[RTLIB::SYNC_FETCH_AND_AND_1] = "__sync_fetch_and_and_1";
				307	Names[RTLIB::SYNC_FETCH_AND_AND_2] = "__sync_fetch_and_and_2";
				308	Names[RTLIB::SYNC_FETCH_AND_AND_4] = "__sync_fetch_and_and_4";
				309	Names[RTLIB::SYNC_FETCH_AND_AND_8] = "__sync_fetch_and_and_8";
				310	Names[RTLIB::SYNC_FETCH_AND_OR_1] = "__sync_fetch_and_or_1";
				311	Names[RTLIB::SYNC_FETCH_AND_OR_2] = "__sync_fetch_and_or_2";
				312	Names[RTLIB::SYNC_FETCH_AND_OR_4] = "__sync_fetch_and_or_4";
				313	Names[RTLIB::SYNC_FETCH_AND_OR_8] = "__sync_fetch_and_or_8";
				314	Names[RTLIB::SYNC_FETCH_AND_XOR_1] = "__sync_fetch_and_xor_1";
				315	Names[RTLIB::SYNC_FETCH_AND_XOR_2] = "__sync_fetch_and_xor_2";
				316	Names[RTLIB::SYNC_FETCH_AND_XOR_4] = "__sync_fetch_and-xor_4";
				317	Names[RTLIB::SYNC_FETCH_AND_XOR_8] = "__sync_fetch_and_xor_8";
				318	Names[RTLIB::SYNC_FETCH_AND_NAND_1] = "__sync_fetch_and_nand_1";
				319	Names[RTLIB::SYNC_FETCH_AND_NAND_2] = "__sync_fetch_and_nand_2";
				320	Names[RTLIB::SYNC_FETCH_AND_NAND_4] = "__sync_fetch_and_nand_4";
				321	Names[RTLIB::SYNC_FETCH_AND_NAND_8] = "__sync_fetch_and_nand_8";
Evan Cheng	d385fd6	2007-01-31 09:29:11 +0000	[diff] [blame]	322	}
				323
Anton Korobeynikov	72977a4	2009-08-14 20:10:52 +0000	[diff] [blame]	324	/// InitLibcallCallingConvs - Set default libcall CallingConvs.
				325	///
				326	static void InitLibcallCallingConvs(CallingConv::ID *CCs) {
				327	for (int i = 0; i < RTLIB::UNKNOWN_LIBCALL; ++i) {
				328	CCs[i] = CallingConv::C;
				329	}
				330	}
				331
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	332	/// getFPEXT - Return the FPEXT__ value for the given types, or
				333	/// UNKNOWN_LIBCALL if there is none.
Owen Anderson	e50ed30	2009-08-10 22:56:29 +0000	[diff] [blame]	334	RTLIB::Libcall RTLIB::getFPEXT(EVT OpVT, EVT RetVT) {
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	335	if (OpVT == MVT::f32) {
				336	if (RetVT == MVT::f64)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	337	return FPEXT_F32_F64;
				338	}
Anton Korobeynikov	927411b	2010-03-14 18:42:24 +0000	[diff] [blame]	339
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	340	return UNKNOWN_LIBCALL;
				341	}
				342
				343	/// getFPROUND - Return the FPROUND__ value for the given types, or
				344	/// UNKNOWN_LIBCALL if there is none.
Owen Anderson	e50ed30	2009-08-10 22:56:29 +0000	[diff] [blame]	345	RTLIB::Libcall RTLIB::getFPROUND(EVT OpVT, EVT RetVT) {
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	346	if (RetVT == MVT::f32) {
				347	if (OpVT == MVT::f64)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	348	return FPROUND_F64_F32;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	349	if (OpVT == MVT::f80)
Bruno Cardoso Lopes	e36bfe6	2008-08-07 19:01:24 +0000	[diff] [blame]	350	return FPROUND_F80_F32;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	351	if (OpVT == MVT::ppcf128)
Bruno Cardoso Lopes	e36bfe6	2008-08-07 19:01:24 +0000	[diff] [blame]	352	return FPROUND_PPCF128_F32;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	353	} else if (RetVT == MVT::f64) {
				354	if (OpVT == MVT::f80)
Bruno Cardoso Lopes	e36bfe6	2008-08-07 19:01:24 +0000	[diff] [blame]	355	return FPROUND_F80_F64;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	356	if (OpVT == MVT::ppcf128)
Bruno Cardoso Lopes	e36bfe6	2008-08-07 19:01:24 +0000	[diff] [blame]	357	return FPROUND_PPCF128_F64;
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	358	}
Anton Korobeynikov	927411b	2010-03-14 18:42:24 +0000	[diff] [blame]	359
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	360	return UNKNOWN_LIBCALL;
				361	}
				362
				363	/// getFPTOSINT - Return the FPTOSINT__ value for the given types, or
				364	/// UNKNOWN_LIBCALL if there is none.
Owen Anderson	e50ed30	2009-08-10 22:56:29 +0000	[diff] [blame]	365	RTLIB::Libcall RTLIB::getFPTOSINT(EVT OpVT, EVT RetVT) {
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	366	if (OpVT == MVT::f32) {
				367	if (RetVT == MVT::i8)
Sanjiv Gupta	8aa207e	2009-06-16 09:03:58 +0000	[diff] [blame]	368	return FPTOSINT_F32_I8;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	369	if (RetVT == MVT::i16)
Sanjiv Gupta	8aa207e	2009-06-16 09:03:58 +0000	[diff] [blame]	370	return FPTOSINT_F32_I16;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	371	if (RetVT == MVT::i32)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	372	return FPTOSINT_F32_I32;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	373	if (RetVT == MVT::i64)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	374	return FPTOSINT_F32_I64;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	375	if (RetVT == MVT::i128)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	376	return FPTOSINT_F32_I128;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	377	} else if (OpVT == MVT::f64) {
Anton Korobeynikov	de0118c	2010-03-26 21:32:14 +0000	[diff] [blame]	378	if (RetVT == MVT::i8)
				379	return FPTOSINT_F64_I8;
				380	if (RetVT == MVT::i16)
				381	return FPTOSINT_F64_I16;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	382	if (RetVT == MVT::i32)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	383	return FPTOSINT_F64_I32;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	384	if (RetVT == MVT::i64)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	385	return FPTOSINT_F64_I64;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	386	if (RetVT == MVT::i128)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	387	return FPTOSINT_F64_I128;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	388	} else if (OpVT == MVT::f80) {
				389	if (RetVT == MVT::i32)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	390	return FPTOSINT_F80_I32;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	391	if (RetVT == MVT::i64)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	392	return FPTOSINT_F80_I64;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	393	if (RetVT == MVT::i128)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	394	return FPTOSINT_F80_I128;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	395	} else if (OpVT == MVT::ppcf128) {
				396	if (RetVT == MVT::i32)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	397	return FPTOSINT_PPCF128_I32;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	398	if (RetVT == MVT::i64)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	399	return FPTOSINT_PPCF128_I64;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	400	if (RetVT == MVT::i128)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	401	return FPTOSINT_PPCF128_I128;
				402	}
				403	return UNKNOWN_LIBCALL;
				404	}
				405
				406	/// getFPTOUINT - Return the FPTOUINT__ value for the given types, or
				407	/// UNKNOWN_LIBCALL if there is none.
Owen Anderson	e50ed30	2009-08-10 22:56:29 +0000	[diff] [blame]	408	RTLIB::Libcall RTLIB::getFPTOUINT(EVT OpVT, EVT RetVT) {
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	409	if (OpVT == MVT::f32) {
				410	if (RetVT == MVT::i8)
Sanjiv Gupta	8aa207e	2009-06-16 09:03:58 +0000	[diff] [blame]	411	return FPTOUINT_F32_I8;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	412	if (RetVT == MVT::i16)
Sanjiv Gupta	8aa207e	2009-06-16 09:03:58 +0000	[diff] [blame]	413	return FPTOUINT_F32_I16;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	414	if (RetVT == MVT::i32)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	415	return FPTOUINT_F32_I32;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	416	if (RetVT == MVT::i64)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	417	return FPTOUINT_F32_I64;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	418	if (RetVT == MVT::i128)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	419	return FPTOUINT_F32_I128;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	420	} else if (OpVT == MVT::f64) {
Anton Korobeynikov	de0118c	2010-03-26 21:32:14 +0000	[diff] [blame]	421	if (RetVT == MVT::i8)
				422	return FPTOUINT_F64_I8;
				423	if (RetVT == MVT::i16)
				424	return FPTOUINT_F64_I16;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	425	if (RetVT == MVT::i32)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	426	return FPTOUINT_F64_I32;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	427	if (RetVT == MVT::i64)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	428	return FPTOUINT_F64_I64;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	429	if (RetVT == MVT::i128)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	430	return FPTOUINT_F64_I128;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	431	} else if (OpVT == MVT::f80) {
				432	if (RetVT == MVT::i32)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	433	return FPTOUINT_F80_I32;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	434	if (RetVT == MVT::i64)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	435	return FPTOUINT_F80_I64;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	436	if (RetVT == MVT::i128)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	437	return FPTOUINT_F80_I128;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	438	} else if (OpVT == MVT::ppcf128) {
				439	if (RetVT == MVT::i32)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	440	return FPTOUINT_PPCF128_I32;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	441	if (RetVT == MVT::i64)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	442	return FPTOUINT_PPCF128_I64;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	443	if (RetVT == MVT::i128)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	444	return FPTOUINT_PPCF128_I128;
				445	}
				446	return UNKNOWN_LIBCALL;
				447	}
				448
				449	/// getSINTTOFP - Return the SINTTOFP__ value for the given types, or
				450	/// UNKNOWN_LIBCALL if there is none.
Owen Anderson	e50ed30	2009-08-10 22:56:29 +0000	[diff] [blame]	451	RTLIB::Libcall RTLIB::getSINTTOFP(EVT OpVT, EVT RetVT) {
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	452	if (OpVT == MVT::i32) {
				453	if (RetVT == MVT::f32)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	454	return SINTTOFP_I32_F32;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	455	else if (RetVT == MVT::f64)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	456	return SINTTOFP_I32_F64;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	457	else if (RetVT == MVT::f80)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	458	return SINTTOFP_I32_F80;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	459	else if (RetVT == MVT::ppcf128)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	460	return SINTTOFP_I32_PPCF128;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	461	} else if (OpVT == MVT::i64) {
				462	if (RetVT == MVT::f32)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	463	return SINTTOFP_I64_F32;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	464	else if (RetVT == MVT::f64)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	465	return SINTTOFP_I64_F64;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	466	else if (RetVT == MVT::f80)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	467	return SINTTOFP_I64_F80;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	468	else if (RetVT == MVT::ppcf128)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	469	return SINTTOFP_I64_PPCF128;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	470	} else if (OpVT == MVT::i128) {
				471	if (RetVT == MVT::f32)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	472	return SINTTOFP_I128_F32;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	473	else if (RetVT == MVT::f64)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	474	return SINTTOFP_I128_F64;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	475	else if (RetVT == MVT::f80)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	476	return SINTTOFP_I128_F80;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	477	else if (RetVT == MVT::ppcf128)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	478	return SINTTOFP_I128_PPCF128;
				479	}
				480	return UNKNOWN_LIBCALL;
				481	}
				482
				483	/// getUINTTOFP - Return the UINTTOFP__ value for the given types, or
				484	/// UNKNOWN_LIBCALL if there is none.
Owen Anderson	e50ed30	2009-08-10 22:56:29 +0000	[diff] [blame]	485	RTLIB::Libcall RTLIB::getUINTTOFP(EVT OpVT, EVT RetVT) {
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	486	if (OpVT == MVT::i32) {
				487	if (RetVT == MVT::f32)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	488	return UINTTOFP_I32_F32;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	489	else if (RetVT == MVT::f64)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	490	return UINTTOFP_I32_F64;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	491	else if (RetVT == MVT::f80)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	492	return UINTTOFP_I32_F80;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	493	else if (RetVT == MVT::ppcf128)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	494	return UINTTOFP_I32_PPCF128;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	495	} else if (OpVT == MVT::i64) {
				496	if (RetVT == MVT::f32)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	497	return UINTTOFP_I64_F32;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	498	else if (RetVT == MVT::f64)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	499	return UINTTOFP_I64_F64;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	500	else if (RetVT == MVT::f80)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	501	return UINTTOFP_I64_F80;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	502	else if (RetVT == MVT::ppcf128)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	503	return UINTTOFP_I64_PPCF128;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	504	} else if (OpVT == MVT::i128) {
				505	if (RetVT == MVT::f32)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	506	return UINTTOFP_I128_F32;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	507	else if (RetVT == MVT::f64)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	508	return UINTTOFP_I128_F64;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	509	else if (RetVT == MVT::f80)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	510	return UINTTOFP_I128_F80;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	511	else if (RetVT == MVT::ppcf128)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	512	return UINTTOFP_I128_PPCF128;
				513	}
				514	return UNKNOWN_LIBCALL;
				515	}
				516
Evan Cheng	d385fd6	2007-01-31 09:29:11 +0000	[diff] [blame]	517	/// InitCmpLibcallCCs - Set default comparison libcall CC.
				518	///
				519	static void InitCmpLibcallCCs(ISD::CondCode *CCs) {
				520	memset(CCs, ISD::SETCC_INVALID, sizeof(ISD::CondCode)*RTLIB::UNKNOWN_LIBCALL);
				521	CCs[RTLIB::OEQ_F32] = ISD::SETEQ;
				522	CCs[RTLIB::OEQ_F64] = ISD::SETEQ;
				523	CCs[RTLIB::UNE_F32] = ISD::SETNE;
				524	CCs[RTLIB::UNE_F64] = ISD::SETNE;
				525	CCs[RTLIB::OGE_F32] = ISD::SETGE;
				526	CCs[RTLIB::OGE_F64] = ISD::SETGE;
				527	CCs[RTLIB::OLT_F32] = ISD::SETLT;
				528	CCs[RTLIB::OLT_F64] = ISD::SETLT;
				529	CCs[RTLIB::OLE_F32] = ISD::SETLE;
				530	CCs[RTLIB::OLE_F64] = ISD::SETLE;
				531	CCs[RTLIB::OGT_F32] = ISD::SETGT;
				532	CCs[RTLIB::OGT_F64] = ISD::SETGT;
				533	CCs[RTLIB::UO_F32] = ISD::SETNE;
				534	CCs[RTLIB::UO_F64] = ISD::SETNE;
				535	CCs[RTLIB::O_F32] = ISD::SETEQ;
				536	CCs[RTLIB::O_F64] = ISD::SETEQ;
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	537	}
				538
Chris Lattner	f014412	2009-07-28 03:13:23 +0000	[diff] [blame]	539	/// NOTE: The constructor takes ownership of TLOF.
Dan Gohman	f0757b0	2010-04-21 01:34:56 +0000	[diff] [blame]	540	TargetLowering::TargetLowering(const TargetMachine &tm,
				541	const TargetLoweringObjectFile *tlof)
Nadav Rotem	b6fbec3	2011-06-01 12:51:46 +0000	[diff] [blame]	542	: TM(tm), TD(TM.getTargetData()), TLOF(*tlof),
				543	mayPromoteElements(AllowPromoteIntElem) {
Chris Lattner	cba82f9	2005-01-16 07:28:11 +0000	[diff] [blame]	544	// All operations default to being supported.
				545	memset(OpActions, 0, sizeof(OpActions));
Evan Cheng	0329466	2008-10-14 21:26:46 +0000	[diff] [blame]	546	memset(LoadExtActions, 0, sizeof(LoadExtActions));
Chris Lattner	ddf8956	2008-01-17 19:59:44 +0000	[diff] [blame]	547	memset(TruncStoreActions, 0, sizeof(TruncStoreActions));
Chris Lattner	c9133f9	2008-01-18 19:36:20 +0000	[diff] [blame]	548	memset(IndexedModeActions, 0, sizeof(IndexedModeActions));
Evan Cheng	7f04268	2008-10-15 02:05:31 +0000	[diff] [blame]	549	memset(CondCodeActions, 0, sizeof(CondCodeActions));
Dan Gohman	93f81e2	2007-07-09 20:49:44 +0000	[diff] [blame]	550
Chris Lattner	1a3048b	2007-12-22 20:47:56 +0000	[diff] [blame]	551	// Set default actions for various operations.
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	552	for (unsigned VT = 0; VT != (unsigned)MVT::LAST_VALUETYPE; ++VT) {
Chris Lattner	1a3048b	2007-12-22 20:47:56 +0000	[diff] [blame]	553	// Default all indexed load / store to expand.
Evan Cheng	5ff839f	2006-11-09 18:56:43 +0000	[diff] [blame]	554	for (unsigned IM = (unsigned)ISD::PRE_INC;
				555	IM != (unsigned)ISD::LAST_INDEXED_MODE; ++IM) {
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	556	setIndexedLoadAction(IM, (MVT::SimpleValueType)VT, Expand);
				557	setIndexedStoreAction(IM, (MVT::SimpleValueType)VT, Expand);
Evan Cheng	5ff839f	2006-11-09 18:56:43 +0000	[diff] [blame]	558	}
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	559
Chris Lattner	1a3048b	2007-12-22 20:47:56 +0000	[diff] [blame]	560	// These operations default to expand.
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	561	setOperationAction(ISD::FGETSIGN, (MVT::SimpleValueType)VT, Expand);
				562	setOperationAction(ISD::CONCAT_VECTORS, (MVT::SimpleValueType)VT, Expand);
Evan Cheng	5ff839f	2006-11-09 18:56:43 +0000	[diff] [blame]	563	}
Evan Cheng	d2cde68	2008-03-10 19:38:10 +0000	[diff] [blame]	564
				565	// Most targets ignore the @llvm.prefetch intrinsic.
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	566	setOperationAction(ISD::PREFETCH, MVT::Other, Expand);
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	567
				568	// ConstantFP nodes default to expand. Targets can either change this to
Evan Cheng	eb2f969	2009-10-27 19:56:55 +0000	[diff] [blame]	569	// Legal, in which case all fp constants are legal, or use isFPImmLegal()
Nate Begeman	e179584	2008-02-14 08:57:00 +0000	[diff] [blame]	570	// to optimize expansions for certain constants.
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	571	setOperationAction(ISD::ConstantFP, MVT::f32, Expand);
				572	setOperationAction(ISD::ConstantFP, MVT::f64, Expand);
				573	setOperationAction(ISD::ConstantFP, MVT::f80, Expand);
Chris Lattner	310968c	2005-01-07 07:44:53 +0000	[diff] [blame]	574
Dale Johannesen	0bb4160	2008-09-22 21:57:32 +0000	[diff] [blame]	575	// These library functions default to expand.
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	576	setOperationAction(ISD::FLOG , MVT::f64, Expand);
				577	setOperationAction(ISD::FLOG2, MVT::f64, Expand);
				578	setOperationAction(ISD::FLOG10,MVT::f64, Expand);
				579	setOperationAction(ISD::FEXP , MVT::f64, Expand);
				580	setOperationAction(ISD::FEXP2, MVT::f64, Expand);
				581	setOperationAction(ISD::FLOG , MVT::f32, Expand);
				582	setOperationAction(ISD::FLOG2, MVT::f32, Expand);
				583	setOperationAction(ISD::FLOG10,MVT::f32, Expand);
				584	setOperationAction(ISD::FEXP , MVT::f32, Expand);
				585	setOperationAction(ISD::FEXP2, MVT::f32, Expand);
Dale Johannesen	0bb4160	2008-09-22 21:57:32 +0000	[diff] [blame]	586
Chris Lattner	41bab0b	2008-01-15 21:58:08 +0000	[diff] [blame]	587	// Default ISD::TRAP to expand (which turns it into abort).
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	588	setOperationAction(ISD::TRAP, MVT::Other, Expand);
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	589
Owen Anderson	a69571c	2006-05-03 01:29:57 +0000	[diff] [blame]	590	IsLittleEndian = TD->isLittleEndian();
Owen Anderson	95771af	2011-02-25 21:41:48 +0000	[diff] [blame]	591	PointerTy = MVT::getIntegerVT(8*TD->getPointerSize());
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	592	memset(RegClassForVT, 0,MVT::LAST_VALUETYPEsizeof(TargetRegisterClass));
Owen Anderson	718cb66	2007-09-07 04:06:50 +0000	[diff] [blame]	593	memset(TargetDAGCombineArray, 0, array_lengthof(TargetDAGCombineArray));
Evan Cheng	a03a5dc	2006-02-14 08:38:30 +0000	[diff] [blame]	594	maxStoresPerMemset = maxStoresPerMemcpy = maxStoresPerMemmove = 8;
Evan Cheng	0521928	2011-01-06 06:52:41 +0000	[diff] [blame]	595	maxStoresPerMemsetOptSize = maxStoresPerMemcpyOptSize
				596	= maxStoresPerMemmoveOptSize = 4;
Evan Cheng	6ebf7bc	2009-05-13 21:42:09 +0000	[diff] [blame]	597	benefitFromCodePlacementOpt = false;
Anton Korobeynikov	d27a258	2006-12-10 23:12:42 +0000	[diff] [blame]	598	UseUnderscoreSetJmp = false;
				599	UseUnderscoreLongJmp = false;
Chris Lattner	6618039	2007-02-25 01:28:05 +0000	[diff] [blame]	600	SelectIsExpensive = false;
Nate Begeman	405e3ec	2005-10-21 00:02:42 +0000	[diff] [blame]	601	IntDivIsCheap = false;
				602	Pow2DivIsCheap = false;
Chris Lattner	de189be	2010-11-30 18:12:52 +0000	[diff] [blame]	603	JumpIsExpensive = false;
Chris Lattner	ee4a765	2006-01-25 18:57:15 +0000	[diff] [blame]	604	StackPointerRegisterToSaveRestore = 0;
Jim Laskey	9bb3c93	2007-02-22 18:04:49 +0000	[diff] [blame]	605	ExceptionPointerRegister = 0;
				606	ExceptionSelectorRegister = 0;
Duncan Sands	0322808	2008-11-23 15:47:28 +0000	[diff] [blame]	607	BooleanContents = UndefinedBooleanContent;
Evan Cheng	211ffa1	2010-05-19 20:19:50 +0000	[diff] [blame]	608	SchedPreferenceInfo = Sched::Latency;
Chris Lattner	7acf5f3	2006-09-05 17:39:15 +0000	[diff] [blame]	609	JumpBufSize = 0;
Duraid Madina	0c9e0ff	2006-09-04 07:44:11 +0000	[diff] [blame]	610	JumpBufAlignment = 0;
Eli Friedman	fc5d305	2011-05-06 20:34:06 +0000	[diff] [blame]	611	MinFunctionAlignment = 0;
				612	PrefFunctionAlignment = 0;
Evan Cheng	fb8075d	2008-02-28 00:43:03 +0000	[diff] [blame]	613	PrefLoopAlignment = 0;
Rafael Espindola	cbeeae2	2010-07-11 04:01:49 +0000	[diff] [blame]	614	MinStackArgumentAlignment = 1;
Jim Grosbach	9a52649	2010-06-23 16:07:42 +0000	[diff] [blame]	615	ShouldFoldAtomicFences = false;
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	616
				617	InitLibcallNames(LibcallRoutineNames);
Evan Cheng	d385fd6	2007-01-31 09:29:11 +0000	[diff] [blame]	618	InitCmpLibcallCCs(CmpLibcallCCs);
Anton Korobeynikov	72977a4	2009-08-14 20:10:52 +0000	[diff] [blame]	619	InitLibcallCallingConvs(LibcallCallingConvs);
Chris Lattner	310968c	2005-01-07 07:44:53 +0000	[diff] [blame]	620	}
				621
Chris Lattner	f014412	2009-07-28 03:13:23 +0000	[diff] [blame]	622	TargetLowering::~TargetLowering() {
				623	delete &TLOF;
				624	}
Chris Lattner	cba82f9	2005-01-16 07:28:11 +0000	[diff] [blame]	625
Owen Anderson	95771af	2011-02-25 21:41:48 +0000	[diff] [blame]	626	MVT TargetLowering::getShiftAmountTy(EVT LHSTy) const {
				627	return MVT::getIntegerVT(8*TD->getPointerSize());
				628	}
				629
Mon P Wang	f7ea6c3	2010-02-10 23:37:45 +0000	[diff] [blame]	630	/// canOpTrap - Returns true if the operation can trap for the value type.
				631	/// VT must be a legal type.
				632	bool TargetLowering::canOpTrap(unsigned Op, EVT VT) const {
				633	assert(isTypeLegal(VT));
				634	switch (Op) {
				635	default:
				636	return false;
				637	case ISD::FDIV:
				638	case ISD::FREM:
				639	case ISD::SDIV:
				640	case ISD::UDIV:
				641	case ISD::SREM:
				642	case ISD::UREM:
				643	return true;
				644	}
				645	}
				646
				647
Owen Anderson	23b9b19	2009-08-12 00:36:31 +0000	[diff] [blame]	648	static unsigned getVectorTypeBreakdownMVT(MVT VT, MVT &IntermediateVT,
Chris Lattner	598751e	2010-07-05 05:36:21 +0000	[diff] [blame]	649	unsigned &NumIntermediates,
				650	EVT &RegisterVT,
				651	TargetLowering *TLI) {
Owen Anderson	23b9b19	2009-08-12 00:36:31 +0000	[diff] [blame]	652	// Figure out the right, legal destination reg to copy into.
				653	unsigned NumElts = VT.getVectorNumElements();
				654	MVT EltTy = VT.getVectorElementType();
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	655
Owen Anderson	23b9b19	2009-08-12 00:36:31 +0000	[diff] [blame]	656	unsigned NumVectorRegs = 1;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	657
				658	// FIXME: We don't support non-power-of-2-sized vectors for now. Ideally we
Owen Anderson	23b9b19	2009-08-12 00:36:31 +0000	[diff] [blame]	659	// could break down into LHS/RHS like LegalizeDAG does.
				660	if (!isPowerOf2_32(NumElts)) {
				661	NumVectorRegs = NumElts;
				662	NumElts = 1;
				663	}
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	664
Owen Anderson	23b9b19	2009-08-12 00:36:31 +0000	[diff] [blame]	665	// Divide the input until we get to a supported size. This will always
				666	// end with a scalar if the target doesn't support vectors.
				667	while (NumElts > 1 && !TLI->isTypeLegal(MVT::getVectorVT(EltTy, NumElts))) {
				668	NumElts >>= 1;
				669	NumVectorRegs <<= 1;
				670	}
				671
				672	NumIntermediates = NumVectorRegs;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	673
Owen Anderson	23b9b19	2009-08-12 00:36:31 +0000	[diff] [blame]	674	MVT NewVT = MVT::getVectorVT(EltTy, NumElts);
				675	if (!TLI->isTypeLegal(NewVT))
				676	NewVT = EltTy;
				677	IntermediateVT = NewVT;
				678
Nadav Rotem	0c3e678	2011-06-12 14:56:55 +0000	[diff] [blame]	679	unsigned NewVTSize = NewVT.getSizeInBits();
				680
				681	// Convert sizes such as i33 to i64.
				682	if (!isPowerOf2_32(NewVTSize))
				683	NewVTSize = NextPowerOf2(NewVTSize);
				684
Owen Anderson	23b9b19	2009-08-12 00:36:31 +0000	[diff] [blame]	685	EVT DestVT = TLI->getRegisterType(NewVT);
				686	RegisterVT = DestVT;
Chris Lattner	32b4b5a	2010-07-05 05:53:14 +0000	[diff] [blame]	687	if (EVT(DestVT).bitsLT(NewVT)) // Value is expanded, e.g. i64 -> i16.
Nadav Rotem	0c3e678	2011-06-12 14:56:55 +0000	[diff] [blame]	688	return NumVectorRegs*(NewVTSize/DestVT.getSizeInBits());
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	689
Chris Lattner	32b4b5a	2010-07-05 05:53:14 +0000	[diff] [blame]	690	// Otherwise, promotion or legal types use the same number of registers as
				691	// the vector decimated to the appropriate level.
				692	return NumVectorRegs;
Owen Anderson	23b9b19	2009-08-12 00:36:31 +0000	[diff] [blame]	693	}
				694
Evan Cheng	46dcb57	2010-07-19 18:47:01 +0000	[diff] [blame]	695	/// isLegalRC - Return true if the value types that can be represented by the
				696	/// specified register class are all legal.
				697	bool TargetLowering::isLegalRC(const TargetRegisterClass *RC) const {
				698	for (TargetRegisterClass::vt_iterator I = RC->vt_begin(), E = RC->vt_end();
				699	I != E; ++I) {
				700	if (isTypeLegal(*I))
				701	return true;
				702	}
				703	return false;
				704	}
				705
				706	/// hasLegalSuperRegRegClasses - Return true if the specified register class
				707	/// has one or more super-reg register classes that are legal.
Evan Cheng	d70f57b	2010-07-19 22:15:08 +0000	[diff] [blame]	708	bool
				709	TargetLowering::hasLegalSuperRegRegClasses(const TargetRegisterClass *RC) const{
Evan Cheng	46dcb57	2010-07-19 18:47:01 +0000	[diff] [blame]	710	if (*RC->superregclasses_begin() == 0)
				711	return false;
				712	for (TargetRegisterInfo::regclass_iterator I = RC->superregclasses_begin(),
				713	E = RC->superregclasses_end(); I != E; ++I) {
				714	const TargetRegisterClass RRC = I;
				715	if (isLegalRC(RRC))
				716	return true;
				717	}
				718	return false;
				719	}
				720
				721	/// findRepresentativeClass - Return the largest legal super-reg register class
Evan Cheng	4f6b467	2010-07-21 06:09:07 +0000	[diff] [blame]	722	/// of the register class for the specified type and its associated "cost".
				723	std::pair<const TargetRegisterClass*, uint8_t>
				724	TargetLowering::findRepresentativeClass(EVT VT) const {
				725	const TargetRegisterClass *RC = RegClassForVT[VT.getSimpleVT().SimpleTy];
				726	if (!RC)
				727	return std::make_pair(RC, 0);
Evan Cheng	46dcb57	2010-07-19 18:47:01 +0000	[diff] [blame]	728	const TargetRegisterClass *BestRC = RC;
				729	for (TargetRegisterInfo::regclass_iterator I = RC->superregclasses_begin(),
				730	E = RC->superregclasses_end(); I != E; ++I) {
				731	const TargetRegisterClass RRC = I;
				732	if (RRC->isASubClass() \|\| !isLegalRC(RRC))
				733	continue;
				734	if (!hasLegalSuperRegRegClasses(RRC))
Evan Cheng	4f6b467	2010-07-21 06:09:07 +0000	[diff] [blame]	735	return std::make_pair(RRC, 1);
Evan Cheng	46dcb57	2010-07-19 18:47:01 +0000	[diff] [blame]	736	BestRC = RRC;
				737	}
Evan Cheng	4f6b467	2010-07-21 06:09:07 +0000	[diff] [blame]	738	return std::make_pair(BestRC, 1);
Evan Cheng	46dcb57	2010-07-19 18:47:01 +0000	[diff] [blame]	739	}
				740
Chris Lattner	e6f7c26	2010-08-25 22:49:25 +0000	[diff] [blame]	741
Chris Lattner	310968c	2005-01-07 07:44:53 +0000	[diff] [blame]	742	/// computeRegisterProperties - Once all of the register classes are added,
				743	/// this allows us to compute derived properties we expose.
				744	void TargetLowering::computeRegisterProperties() {
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	745	assert(MVT::LAST_VALUETYPE <= MVT::MAX_ALLOWED_VALUETYPE &&
Chris Lattner	bb97d81	2005-01-16 01:10:58 +0000	[diff] [blame]	746	"Too many value types for ValueTypeActions to hold!");
				747
Dan Gohman	b6f5b00	2007-06-28 23:29:44 +0000	[diff] [blame]	748	// Everything defaults to needing one register.
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	749	for (unsigned i = 0; i != MVT::LAST_VALUETYPE; ++i) {
Dan Gohman	b9f1019	2007-06-21 14:42:22 +0000	[diff] [blame]	750	NumRegistersForVT[i] = 1;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	751	RegisterTypeForVT[i] = TransformToType[i] = (MVT::SimpleValueType)i;
Dan Gohman	b6f5b00	2007-06-28 23:29:44 +0000	[diff] [blame]	752	}
				753	// ...except isVoid, which doesn't need any registers.
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	754	NumRegistersForVT[MVT::isVoid] = 0;
Misha Brukman	f976c85	2005-04-21 22:55:34 +0000	[diff] [blame]	755
Chris Lattner	310968c	2005-01-07 07:44:53 +0000	[diff] [blame]	756	// Find the largest integer register class.
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	757	unsigned LargestIntReg = MVT::LAST_INTEGER_VALUETYPE;
Chris Lattner	310968c	2005-01-07 07:44:53 +0000	[diff] [blame]	758	for (; RegClassForVT[LargestIntReg] == 0; --LargestIntReg)
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	759	assert(LargestIntReg != MVT::i1 && "No integer registers defined!");
Chris Lattner	310968c	2005-01-07 07:44:53 +0000	[diff] [blame]	760
				761	// Every integer value type larger than this largest register takes twice as
				762	// many registers to represent as the previous ValueType.
Duncan Sands	83ec4b6	2008-06-06 12:08:01 +0000	[diff] [blame]	763	for (unsigned ExpandedReg = LargestIntReg + 1; ; ++ExpandedReg) {
Dan Gohman	8a55ce4	2009-09-23 21:02:20 +0000	[diff] [blame]	764	EVT ExpandedVT = (MVT::SimpleValueType)ExpandedReg;
				765	if (!ExpandedVT.isInteger())
Duncan Sands	83ec4b6	2008-06-06 12:08:01 +0000	[diff] [blame]	766	break;
Dan Gohman	b9f1019	2007-06-21 14:42:22 +0000	[diff] [blame]	767	NumRegistersForVT[ExpandedReg] = 2*NumRegistersForVT[ExpandedReg-1];
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	768	RegisterTypeForVT[ExpandedReg] = (MVT::SimpleValueType)LargestIntReg;
				769	TransformToType[ExpandedReg] = (MVT::SimpleValueType)(ExpandedReg - 1);
Nadav Rotem	b6aacae	2011-05-28 17:57:14 +0000	[diff] [blame]	770	ValueTypeActions.setTypeAction(ExpandedVT, TypeExpandInteger);
Evan Cheng	1a8f1fe	2006-12-09 02:42:38 +0000	[diff] [blame]	771	}
Dan Gohman	b6f5b00	2007-06-28 23:29:44 +0000	[diff] [blame]	772
				773	// Inspect all of the ValueType's smaller than the largest integer
				774	// register to see which ones need promotion.
Duncan Sands	83ec4b6	2008-06-06 12:08:01 +0000	[diff] [blame]	775	unsigned LegalIntReg = LargestIntReg;
				776	for (unsigned IntReg = LargestIntReg - 1;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	777	IntReg >= (unsigned)MVT::i1; --IntReg) {
				778	EVT IVT = (MVT::SimpleValueType)IntReg;
Duncan Sands	83ec4b6	2008-06-06 12:08:01 +0000	[diff] [blame]	779	if (isTypeLegal(IVT)) {
Dan Gohman	b6f5b00	2007-06-28 23:29:44 +0000	[diff] [blame]	780	LegalIntReg = IntReg;
				781	} else {
Duncan Sands	83ec4b6	2008-06-06 12:08:01 +0000	[diff] [blame]	782	RegisterTypeForVT[IntReg] = TransformToType[IntReg] =
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	783	(MVT::SimpleValueType)LegalIntReg;
Nadav Rotem	b6aacae	2011-05-28 17:57:14 +0000	[diff] [blame]	784	ValueTypeActions.setTypeAction(IVT, TypePromoteInteger);
Dan Gohman	b6f5b00	2007-06-28 23:29:44 +0000	[diff] [blame]	785	}
				786	}
				787
Dale Johannesen	161e897	2007-10-05 20:04:43 +0000	[diff] [blame]	788	// ppcf128 type is really two f64's.
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	789	if (!isTypeLegal(MVT::ppcf128)) {
				790	NumRegistersForVT[MVT::ppcf128] = 2*NumRegistersForVT[MVT::f64];
				791	RegisterTypeForVT[MVT::ppcf128] = MVT::f64;
				792	TransformToType[MVT::ppcf128] = MVT::f64;
Nadav Rotem	b6aacae	2011-05-28 17:57:14 +0000	[diff] [blame]	793	ValueTypeActions.setTypeAction(MVT::ppcf128, TypeExpandFloat);
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	794	}
Dale Johannesen	161e897	2007-10-05 20:04:43 +0000	[diff] [blame]	795
Dan Gohman	b6f5b00	2007-06-28 23:29:44 +0000	[diff] [blame]	796	// Decide how to handle f64. If the target does not have native f64 support,
				797	// expand it to i64 and we will be generating soft float library calls.
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	798	if (!isTypeLegal(MVT::f64)) {
				799	NumRegistersForVT[MVT::f64] = NumRegistersForVT[MVT::i64];
				800	RegisterTypeForVT[MVT::f64] = RegisterTypeForVT[MVT::i64];
				801	TransformToType[MVT::f64] = MVT::i64;
Nadav Rotem	b6aacae	2011-05-28 17:57:14 +0000	[diff] [blame]	802	ValueTypeActions.setTypeAction(MVT::f64, TypeSoftenFloat);
Dan Gohman	b6f5b00	2007-06-28 23:29:44 +0000	[diff] [blame]	803	}
				804
				805	// Decide how to handle f32. If the target does not have native support for
				806	// f32, promote it to f64 if it is legal. Otherwise, expand it to i32.
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	807	if (!isTypeLegal(MVT::f32)) {
				808	if (isTypeLegal(MVT::f64)) {
				809	NumRegistersForVT[MVT::f32] = NumRegistersForVT[MVT::f64];
				810	RegisterTypeForVT[MVT::f32] = RegisterTypeForVT[MVT::f64];
				811	TransformToType[MVT::f32] = MVT::f64;
Nadav Rotem	b6aacae	2011-05-28 17:57:14 +0000	[diff] [blame]	812	ValueTypeActions.setTypeAction(MVT::f32, TypePromoteInteger);
Dan Gohman	b6f5b00	2007-06-28 23:29:44 +0000	[diff] [blame]	813	} else {
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	814	NumRegistersForVT[MVT::f32] = NumRegistersForVT[MVT::i32];
				815	RegisterTypeForVT[MVT::f32] = RegisterTypeForVT[MVT::i32];
				816	TransformToType[MVT::f32] = MVT::i32;
Nadav Rotem	b6aacae	2011-05-28 17:57:14 +0000	[diff] [blame]	817	ValueTypeActions.setTypeAction(MVT::f32, TypeSoftenFloat);
Dan Gohman	b6f5b00	2007-06-28 23:29:44 +0000	[diff] [blame]	818	}
Evan Cheng	1a8f1fe	2006-12-09 02:42:38 +0000	[diff] [blame]	819	}
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	820
Dan Gohman	b6f5b00	2007-06-28 23:29:44 +0000	[diff] [blame]	821	// Loop over all of the vector value types to see which need transformations.
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	822	for (unsigned i = MVT::FIRST_VECTOR_VALUETYPE;
				823	i <= (unsigned)MVT::LAST_VECTOR_VALUETYPE; ++i) {
Owen Anderson	23b9b19	2009-08-12 00:36:31 +0000	[diff] [blame]	824	MVT VT = (MVT::SimpleValueType)i;
Chris Lattner	598751e	2010-07-05 05:36:21 +0000	[diff] [blame]	825	if (isTypeLegal(VT)) continue;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	826
Chris Lattner	e6f7c26	2010-08-25 22:49:25 +0000	[diff] [blame]	827	// Determine if there is a legal wider type. If so, we should promote to
				828	// that wider vector type.
				829	EVT EltVT = VT.getVectorElementType();
				830	unsigned NElts = VT.getVectorNumElements();
				831	if (NElts != 1) {
				832	bool IsLegalWiderType = false;
Nadav Rotem	f1c025d	2011-06-04 20:32:01 +0000	[diff] [blame]	833	// If we allow the promotion of vector elements using a flag,
				834	// then return TypePromoteInteger on vector elements.
				835	// First try to promote the elements of integer vectors. If no legal
				836	// promotion was found, fallback to the widen-vector method.
				837	if (mayPromoteElements)
Chris Lattner	e6f7c26	2010-08-25 22:49:25 +0000	[diff] [blame]	838	for (unsigned nVT = i+1; nVT <= MVT::LAST_VECTOR_VALUETYPE; ++nVT) {
				839	EVT SVT = (MVT::SimpleValueType)nVT;
Nadav Rotem	f1c025d	2011-06-04 20:32:01 +0000	[diff] [blame]	840	// Promote vectors of integers to vectors with the same number
				841	// of elements, with a wider element type.
				842	if (SVT.getVectorElementType().getSizeInBits() > EltVT.getSizeInBits()
				843	&& SVT.getVectorNumElements() == NElts &&
				844	isTypeLegal(SVT) && SVT.getScalarType().isInteger()) {
				845	TransformToType[i] = SVT;
				846	RegisterTypeForVT[i] = SVT;
				847	NumRegistersForVT[i] = 1;
				848	ValueTypeActions.setTypeAction(VT, TypePromoteInteger);
				849	IsLegalWiderType = true;
				850	break;
Nadav Rotem	b6fbec3	2011-06-01 12:51:46 +0000	[diff] [blame]	851	}
Nadav Rotem	f1c025d	2011-06-04 20:32:01 +0000	[diff] [blame]	852	}
Nadav Rotem	b6fbec3	2011-06-01 12:51:46 +0000	[diff] [blame]	853
Nadav Rotem	f1c025d	2011-06-04 20:32:01 +0000	[diff] [blame]	854	if (IsLegalWiderType) continue;
				855
				856	// Try to widen the vector.
				857	for (unsigned nVT = i+1; nVT <= MVT::LAST_VECTOR_VALUETYPE; ++nVT) {
				858	EVT SVT = (MVT::SimpleValueType)nVT;
Chris Lattner	e6f7c26	2010-08-25 22:49:25 +0000	[diff] [blame]	859	if (SVT.getVectorElementType() == EltVT &&
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	860	SVT.getVectorNumElements() > NElts &&
Dale Johannesen	e93d99c	2010-10-20 21:32:10 +0000	[diff] [blame]	861	isTypeLegal(SVT)) {
Chris Lattner	e6f7c26	2010-08-25 22:49:25 +0000	[diff] [blame]	862	TransformToType[i] = SVT;
				863	RegisterTypeForVT[i] = SVT;
				864	NumRegistersForVT[i] = 1;
Nadav Rotem	b6aacae	2011-05-28 17:57:14 +0000	[diff] [blame]	865	ValueTypeActions.setTypeAction(VT, TypeWidenVector);
Chris Lattner	e6f7c26	2010-08-25 22:49:25 +0000	[diff] [blame]	866	IsLegalWiderType = true;
				867	break;
				868	}
				869	}
				870	if (IsLegalWiderType) continue;
				871	}
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	872
Chris Lattner	598751e	2010-07-05 05:36:21 +0000	[diff] [blame]	873	MVT IntermediateVT;
				874	EVT RegisterVT;
				875	unsigned NumIntermediates;
				876	NumRegistersForVT[i] =
				877	getVectorTypeBreakdownMVT(VT, IntermediateVT, NumIntermediates,
				878	RegisterVT, this);
				879	RegisterTypeForVT[i] = RegisterVT;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	880
Chris Lattner	e6f7c26	2010-08-25 22:49:25 +0000	[diff] [blame]	881	EVT NVT = VT.getPow2VectorType();
				882	if (NVT == VT) {
				883	// Type is already a power of 2. The default action is to split.
				884	TransformToType[i] = MVT::Other;
Nadav Rotem	b6aacae	2011-05-28 17:57:14 +0000	[diff] [blame]	885	unsigned NumElts = VT.getVectorNumElements();
				886	ValueTypeActions.setTypeAction(VT,
				887	NumElts > 1 ? TypeSplitVector : TypeScalarizeVector);
Chris Lattner	e6f7c26	2010-08-25 22:49:25 +0000	[diff] [blame]	888	} else {
				889	TransformToType[i] = NVT;
Nadav Rotem	b6aacae	2011-05-28 17:57:14 +0000	[diff] [blame]	890	ValueTypeActions.setTypeAction(VT, TypeWidenVector);
Dan Gohman	7f32156	2007-06-25 16:23:39 +0000	[diff] [blame]	891	}
Chris Lattner	3a593584	2006-03-16 19:50:01 +0000	[diff] [blame]	892	}
Evan Cheng	46dcb57	2010-07-19 18:47:01 +0000	[diff] [blame]	893
				894	// Determine the 'representative' register class for each value type.
				895	// An representative register class is the largest (meaning one which is
				896	// not a sub-register class / subreg register class) legal register class for
				897	// a group of value types. For example, on i386, i8, i16, and i32
				898	// representative would be GR32; while on x86_64 it's GR64.
Evan Cheng	d70f57b	2010-07-19 22:15:08 +0000	[diff] [blame]	899	for (unsigned i = 0; i != MVT::LAST_VALUETYPE; ++i) {
Evan Cheng	4f6b467	2010-07-21 06:09:07 +0000	[diff] [blame]	900	const TargetRegisterClass* RRC;
				901	uint8_t Cost;
				902	tie(RRC, Cost) = findRepresentativeClass((MVT::SimpleValueType)i);
				903	RepRegClassForVT[i] = RRC;
				904	RepRegClassCostForVT[i] = Cost;
Evan Cheng	d70f57b	2010-07-19 22:15:08 +0000	[diff] [blame]	905	}
Chris Lattner	bb97d81	2005-01-16 01:10:58 +0000	[diff] [blame]	906	}
Chris Lattner	cba82f9	2005-01-16 07:28:11 +0000	[diff] [blame]	907
Evan Cheng	7226158	2005-12-20 06:22:03 +0000	[diff] [blame]	908	const char *TargetLowering::getTargetNodeName(unsigned Opcode) const {
				909	return NULL;
				910	}
Evan Cheng	3a03ebb	2005-12-21 23:05:39 +0000	[diff] [blame]	911
Scott Michel	5b8f82e	2008-03-10 15:42:14 +0000	[diff] [blame]	912
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	913	MVT::SimpleValueType TargetLowering::getSetCCResultType(EVT VT) const {
Owen Anderson	1d0be15	2009-08-13 21:58:54 +0000	[diff] [blame]	914	return PointerTy.SimpleTy;
Scott Michel	5b8f82e	2008-03-10 15:42:14 +0000	[diff] [blame]	915	}
				916
Sanjiv Gupta	8f17a36	2009-12-28 02:40:33 +0000	[diff] [blame]	917	MVT::SimpleValueType TargetLowering::getCmpLibcallReturnType() const {
				918	return MVT::i32; // return the default value
				919	}
				920
Dan Gohman	7f32156	2007-06-25 16:23:39 +0000	[diff] [blame]	921	/// getVectorTypeBreakdown - Vector types are broken down into some number of
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	922	/// legal first class types. For example, MVT::v8f32 maps to 2 MVT::v4f32
				923	/// with Altivec or SSE1, or 8 promoted MVT::f64 values with the X86 FP stack.
				924	/// Similarly, MVT::v2i64 turns into 4 MVT::i32 values with both PPC and X86.
Chris Lattner	dc87929	2006-03-31 00:28:56 +0000	[diff] [blame]	925	///
Dan Gohman	7f32156	2007-06-25 16:23:39 +0000	[diff] [blame]	926	/// This method returns the number of registers needed, and the VT for each
Dan Gohman	b6f5b00	2007-06-28 23:29:44 +0000	[diff] [blame]	927	/// register. It also returns the VT and quantity of the intermediate values
				928	/// before they are promoted/expanded.
Chris Lattner	dc87929	2006-03-31 00:28:56 +0000	[diff] [blame]	929	///
Owen Anderson	23b9b19	2009-08-12 00:36:31 +0000	[diff] [blame]	930	unsigned TargetLowering::getVectorTypeBreakdown(LLVMContext &Context, EVT VT,
Owen Anderson	e50ed30	2009-08-10 22:56:29 +0000	[diff] [blame]	931	EVT &IntermediateVT,
Dan Gohman	b6f5b00	2007-06-28 23:29:44 +0000	[diff] [blame]	932	unsigned &NumIntermediates,
Owen Anderson	23b9b19	2009-08-12 00:36:31 +0000	[diff] [blame]	933	EVT &RegisterVT) const {
Duncan Sands	83ec4b6	2008-06-06 12:08:01 +0000	[diff] [blame]	934	unsigned NumElts = VT.getVectorNumElements();
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	935
Chris Lattner	e6f7c26	2010-08-25 22:49:25 +0000	[diff] [blame]	936	// If there is a wider vector type with the same element type as this one,
				937	// we should widen to that legal vector type. This handles things like
				938	// <2 x float> -> <4 x float>.
Nadav Rotem	b6aacae	2011-05-28 17:57:14 +0000	[diff] [blame]	939	if (NumElts != 1 && getTypeAction(Context, VT) == TypeWidenVector) {
Chris Lattner	e6f7c26	2010-08-25 22:49:25 +0000	[diff] [blame]	940	RegisterVT = getTypeToTransformTo(Context, VT);
				941	if (isTypeLegal(RegisterVT)) {
				942	IntermediateVT = RegisterVT;
				943	NumIntermediates = 1;
				944	return 1;
				945	}
				946	}
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	947
Chris Lattner	e6f7c26	2010-08-25 22:49:25 +0000	[diff] [blame]	948	// Figure out the right, legal destination reg to copy into.
Owen Anderson	e50ed30	2009-08-10 22:56:29 +0000	[diff] [blame]	949	EVT EltTy = VT.getVectorElementType();
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	950
Chris Lattner	dc87929	2006-03-31 00:28:56 +0000	[diff] [blame]	951	unsigned NumVectorRegs = 1;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	952
				953	// FIXME: We don't support non-power-of-2-sized vectors for now. Ideally we
Nate Begeman	d73ab88	2007-11-27 19:28:48 +0000	[diff] [blame]	954	// could break down into LHS/RHS like LegalizeDAG does.
				955	if (!isPowerOf2_32(NumElts)) {
				956	NumVectorRegs = NumElts;
				957	NumElts = 1;
				958	}
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	959
Chris Lattner	dc87929	2006-03-31 00:28:56 +0000	[diff] [blame]	960	// Divide the input until we get to a supported size. This will always
				961	// end with a scalar if the target doesn't support vectors.
Owen Anderson	23b9b19	2009-08-12 00:36:31 +0000	[diff] [blame]	962	while (NumElts > 1 && !isTypeLegal(
				963	EVT::getVectorVT(Context, EltTy, NumElts))) {
Chris Lattner	dc87929	2006-03-31 00:28:56 +0000	[diff] [blame]	964	NumElts >>= 1;
				965	NumVectorRegs <<= 1;
				966	}
Dan Gohman	b6f5b00	2007-06-28 23:29:44 +0000	[diff] [blame]	967
				968	NumIntermediates = NumVectorRegs;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	969
Owen Anderson	23b9b19	2009-08-12 00:36:31 +0000	[diff] [blame]	970	EVT NewVT = EVT::getVectorVT(Context, EltTy, NumElts);
Dan Gohman	7f32156	2007-06-25 16:23:39 +0000	[diff] [blame]	971	if (!isTypeLegal(NewVT))
				972	NewVT = EltTy;
Dan Gohman	b6f5b00	2007-06-28 23:29:44 +0000	[diff] [blame]	973	IntermediateVT = NewVT;
Chris Lattner	dc87929	2006-03-31 00:28:56 +0000	[diff] [blame]	974
Owen Anderson	23b9b19	2009-08-12 00:36:31 +0000	[diff] [blame]	975	EVT DestVT = getRegisterType(Context, NewVT);
Dan Gohman	b6f5b00	2007-06-28 23:29:44 +0000	[diff] [blame]	976	RegisterVT = DestVT;
Nadav Rotem	0c3e678	2011-06-12 14:56:55 +0000	[diff] [blame]	977	unsigned NewVTSize = NewVT.getSizeInBits();
				978
				979	// Convert sizes such as i33 to i64.
				980	if (!isPowerOf2_32(NewVTSize))
				981	NewVTSize = NextPowerOf2(NewVTSize);
				982
Chris Lattner	e6f7c26	2010-08-25 22:49:25 +0000	[diff] [blame]	983	if (DestVT.bitsLT(NewVT)) // Value is expanded, e.g. i64 -> i16.
Nadav Rotem	0c3e678	2011-06-12 14:56:55 +0000	[diff] [blame]	984	return NumVectorRegs*(NewVTSize/DestVT.getSizeInBits());
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	985
Chris Lattner	e6f7c26	2010-08-25 22:49:25 +0000	[diff] [blame]	986	// Otherwise, promotion or legal types use the same number of registers as
				987	// the vector decimated to the appropriate level.
				988	return NumVectorRegs;
Chris Lattner	dc87929	2006-03-31 00:28:56 +0000	[diff] [blame]	989	}
				990
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	991	/// Get the EVTs and ArgFlags collections that represent the legalized return
Dan Gohman	84023e0	2010-07-10 09:00:22 +0000	[diff] [blame]	992	/// type of the given function. This does not require a DAG or a return value,
				993	/// and is suitable for use before any DAGs for the function are constructed.
				994	/// TODO: Move this out of TargetLowering.cpp.
				995	void llvm::GetReturnInfo(const Type* ReturnType, Attributes attr,
				996	SmallVectorImpl<ISD::OutputArg> &Outs,
				997	const TargetLowering &TLI,
				998	SmallVectorImpl<uint64_t> *Offsets) {
				999	SmallVector<EVT, 4> ValueVTs;
				1000	ComputeValueVTs(TLI, ReturnType, ValueVTs);
				1001	unsigned NumValues = ValueVTs.size();
				1002	if (NumValues == 0) return;
				1003	unsigned Offset = 0;
				1004
				1005	for (unsigned j = 0, f = NumValues; j != f; ++j) {
				1006	EVT VT = ValueVTs[j];
				1007	ISD::NodeType ExtendKind = ISD::ANY_EXTEND;
				1008
				1009	if (attr & Attribute::SExt)
				1010	ExtendKind = ISD::SIGN_EXTEND;
				1011	else if (attr & Attribute::ZExt)
				1012	ExtendKind = ISD::ZERO_EXTEND;
				1013
				1014	// FIXME: C calling convention requires the return type to be promoted to
				1015	// at least 32-bit. But this is not necessary for non-C calling
				1016	// conventions. The frontend should mark functions whose return values
				1017	// require promoting with signext or zeroext attributes.
				1018	if (ExtendKind != ISD::ANY_EXTEND && VT.isInteger()) {
				1019	EVT MinVT = TLI.getRegisterType(ReturnType->getContext(), MVT::i32);
				1020	if (VT.bitsLT(MinVT))
				1021	VT = MinVT;
				1022	}
				1023
				1024	unsigned NumParts = TLI.getNumRegisters(ReturnType->getContext(), VT);
				1025	EVT PartVT = TLI.getRegisterType(ReturnType->getContext(), VT);
				1026	unsigned PartSize = TLI.getTargetData()->getTypeAllocSize(
				1027	PartVT.getTypeForEVT(ReturnType->getContext()));
				1028
				1029	// 'inreg' on function refers to return value
				1030	ISD::ArgFlagsTy Flags = ISD::ArgFlagsTy();
				1031	if (attr & Attribute::InReg)
				1032	Flags.setInReg();
				1033
				1034	// Propagate extension type if any
				1035	if (attr & Attribute::SExt)
				1036	Flags.setSExt();
				1037	else if (attr & Attribute::ZExt)
				1038	Flags.setZExt();
				1039
				1040	for (unsigned i = 0; i < NumParts; ++i) {
				1041	Outs.push_back(ISD::OutputArg(Flags, PartVT, /isFixed=/true));
				1042	if (Offsets) {
				1043	Offsets->push_back(Offset);
				1044	Offset += PartSize;
				1045	}
				1046	}
				1047	}
				1048	}
				1049
Evan Cheng	3ae0543	2008-01-24 00:22:01 +0000	[diff] [blame]	1050	/// getByValTypeAlignment - Return the desired alignment for ByVal aggregate
Dale Johannesen	28d08fd	2008-02-28 22:31:51 +0000	[diff] [blame]	1051	/// function arguments in the caller parameter area. This is the actual
				1052	/// alignment, not its logarithm.
Evan Cheng	3ae0543	2008-01-24 00:22:01 +0000	[diff] [blame]	1053	unsigned TargetLowering::getByValTypeAlignment(const Type *Ty) const {
Dale Johannesen	28d08fd	2008-02-28 22:31:51 +0000	[diff] [blame]	1054	return TD->getCallFrameTypeAlignment(Ty);
Evan Cheng	3ae0543	2008-01-24 00:22:01 +0000	[diff] [blame]	1055	}
				1056
Chris Lattner	071c62f	2010-01-25 23:26:13 +0000	[diff] [blame]	1057	/// getJumpTableEncoding - Return the entry encoding for a jump table in the
				1058	/// current function. The returned value is a member of the
				1059	/// MachineJumpTableInfo::JTEntryKind enum.
				1060	unsigned TargetLowering::getJumpTableEncoding() const {
				1061	// In non-pic modes, just use the address of a block.
				1062	if (getTargetMachine().getRelocationModel() != Reloc::PIC_)
				1063	return MachineJumpTableInfo::EK_BlockAddress;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1064
Chris Lattner	071c62f	2010-01-25 23:26:13 +0000	[diff] [blame]	1065	// In PIC mode, if the target supports a GPRel32 directive, use it.
				1066	if (getTargetMachine().getMCAsmInfo()->getGPRel32Directive() != 0)
				1067	return MachineJumpTableInfo::EK_GPRel32BlockAddress;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1068
Chris Lattner	071c62f	2010-01-25 23:26:13 +0000	[diff] [blame]	1069	// Otherwise, use a label difference.
				1070	return MachineJumpTableInfo::EK_LabelDifference32;
				1071	}
				1072
Dan Gohman	475871a	2008-07-27 21:46:04 +0000	[diff] [blame]	1073	SDValue TargetLowering::getPICJumpTableRelocBase(SDValue Table,
				1074	SelectionDAG &DAG) const {
Chris Lattner	f1214cb	2010-01-26 06:53:37 +0000	[diff] [blame]	1075	// If our PIC model is GP relative, use the global offset table as the base.
				1076	if (getJumpTableEncoding() == MachineJumpTableInfo::EK_GPRel32BlockAddress)
Dale Johannesen	b300d2a	2009-02-07 00:55:49 +0000	[diff] [blame]	1077	return DAG.getGLOBAL_OFFSET_TABLE(getPointerTy());
Evan Cheng	cc41586	2007-11-09 01:32:10 +0000	[diff] [blame]	1078	return Table;
				1079	}
				1080
Chris Lattner	13e97a2	2010-01-26 05:30:30 +0000	[diff] [blame]	1081	/// getPICJumpTableRelocBaseExpr - This returns the relocation base for the
				1082	/// given PIC jumptable, the same as getPICJumpTableRelocBase, but as an
				1083	/// MCExpr.
				1084	const MCExpr *
Chris Lattner	589c6f6	2010-01-26 06:28:43 +0000	[diff] [blame]	1085	TargetLowering::getPICJumpTableRelocBaseExpr(const MachineFunction *MF,
				1086	unsigned JTI,MCContext &Ctx) const{
Chris Lattner	beeb93e	2010-01-26 05:58:28 +0000	[diff] [blame]	1087	// The normal PIC reloc base is the label at the start of the jump table.
Chris Lattner	589c6f6	2010-01-26 06:28:43 +0000	[diff] [blame]	1088	return MCSymbolRefExpr::Create(MF->getJTISymbol(JTI, Ctx), Ctx);
Chris Lattner	13e97a2	2010-01-26 05:30:30 +0000	[diff] [blame]	1089	}
				1090
Dan Gohman	6520e20	2008-10-18 02:06:02 +0000	[diff] [blame]	1091	bool
				1092	TargetLowering::isOffsetFoldingLegal(const GlobalAddressSDNode *GA) const {
				1093	// Assume that everything is safe in static mode.
				1094	if (getTargetMachine().getRelocationModel() == Reloc::Static)
				1095	return true;
				1096
				1097	// In dynamic-no-pic mode, assume that known defined values are safe.
				1098	if (getTargetMachine().getRelocationModel() == Reloc::DynamicNoPIC &&
				1099	GA &&
				1100	!GA->getGlobal()->isDeclaration() &&
Duncan Sands	667d4b8	2009-03-07 15:45:40 +0000	[diff] [blame]	1101	!GA->getGlobal()->isWeakForLinker())
Dan Gohman	6520e20	2008-10-18 02:06:02 +0000	[diff] [blame]	1102	return true;
				1103
				1104	// Otherwise assume nothing is safe.
				1105	return false;
				1106	}
				1107
Chris Lattner	eb8146b	2006-02-04 02:13:02 +0000	[diff] [blame]	1108	//===----------------------------------------------------------------------===//
				1109	// Optimization Methods
				1110	//===----------------------------------------------------------------------===//
				1111
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1112	/// ShrinkDemandedConstant - Check to see if the specified operand of the
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1113	/// specified instruction is a constant integer. If so, check to see if there
				1114	/// are any bits set in the constant that are not demanded. If so, shrink the
				1115	/// constant and return true.
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1116	bool TargetLowering::TargetLoweringOpt::ShrinkDemandedConstant(SDValue Op,
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1117	const APInt &Demanded) {
Dale Johannesen	de06470	2009-02-06 21:50:26 +0000	[diff] [blame]	1118	DebugLoc dl = Op.getDebugLoc();
Bill Wendling	36ae6c1	2009-03-04 00:18:06 +0000	[diff] [blame]	1119
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1120	// FIXME: ISD::SELECT, ISD::SELECT_CC
Dan Gohman	e5af2d3	2009-01-29 01:59:02 +0000	[diff] [blame]	1121	switch (Op.getOpcode()) {
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1122	default: break;
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1123	case ISD::XOR:
Bill Wendling	36ae6c1	2009-03-04 00:18:06 +0000	[diff] [blame]	1124	case ISD::AND:
				1125	case ISD::OR: {
				1126	ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1));
				1127	if (!C) return false;
				1128
				1129	if (Op.getOpcode() == ISD::XOR &&
				1130	(C->getAPIntValue() \| (~Demanded)).isAllOnesValue())
				1131	return false;
				1132
				1133	// if we can expand it to have all bits set, do it
				1134	if (C->getAPIntValue().intersects(~Demanded)) {
Owen Anderson	e50ed30	2009-08-10 22:56:29 +0000	[diff] [blame]	1135	EVT VT = Op.getValueType();
Bill Wendling	36ae6c1	2009-03-04 00:18:06 +0000	[diff] [blame]	1136	SDValue New = DAG.getNode(Op.getOpcode(), dl, VT, Op.getOperand(0),
				1137	DAG.getConstant(Demanded &
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1138	C->getAPIntValue(),
Bill Wendling	36ae6c1	2009-03-04 00:18:06 +0000	[diff] [blame]	1139	VT));
				1140	return CombineTo(Op, New);
				1141	}
				1142
Nate Begeman	de99629	2006-02-03 22:24:05 +0000	[diff] [blame]	1143	break;
				1144	}
Bill Wendling	36ae6c1	2009-03-04 00:18:06 +0000	[diff] [blame]	1145	}
				1146
Nate Begeman	de99629	2006-02-03 22:24:05 +0000	[diff] [blame]	1147	return false;
				1148	}
Chris Lattner	c6fd6cd	2006-01-30 04:09:27 +0000	[diff] [blame]	1149
Dan Gohman	97121ba	2009-04-08 00:15:30 +0000	[diff] [blame]	1150	/// ShrinkDemandedOp - Convert x+y to (VT)((SmallVT)x+(SmallVT)y) if the
				1151	/// casts are free. This uses isZExtFree and ZERO_EXTEND for the widening
				1152	/// cast, but it could be generalized for targets with other types of
				1153	/// implicit widening casts.
				1154	bool
				1155	TargetLowering::TargetLoweringOpt::ShrinkDemandedOp(SDValue Op,
				1156	unsigned BitWidth,
				1157	const APInt &Demanded,
				1158	DebugLoc dl) {
				1159	assert(Op.getNumOperands() == 2 &&
				1160	"ShrinkDemandedOp only supports binary operators!");
				1161	assert(Op.getNode()->getNumValues() == 1 &&
				1162	"ShrinkDemandedOp only supports nodes with one result!");
				1163
				1164	// Don't do this if the node has another user, which may require the
				1165	// full value.
				1166	if (!Op.getNode()->hasOneUse())
				1167	return false;
				1168
				1169	// Search for the smallest integer type with free casts to and from
				1170	// Op's type. For expedience, just check power-of-2 integer types.
				1171	const TargetLowering &TLI = DAG.getTargetLoweringInfo();
				1172	unsigned SmallVTBits = BitWidth - Demanded.countLeadingZeros();
				1173	if (!isPowerOf2_32(SmallVTBits))
				1174	SmallVTBits = NextPowerOf2(SmallVTBits);
				1175	for (; SmallVTBits < BitWidth; SmallVTBits = NextPowerOf2(SmallVTBits)) {
Owen Anderson	23b9b19	2009-08-12 00:36:31 +0000	[diff] [blame]	1176	EVT SmallVT = EVT::getIntegerVT(*DAG.getContext(), SmallVTBits);
Dan Gohman	97121ba	2009-04-08 00:15:30 +0000	[diff] [blame]	1177	if (TLI.isTruncateFree(Op.getValueType(), SmallVT) &&
				1178	TLI.isZExtFree(SmallVT, Op.getValueType())) {
				1179	// We found a type with free casts.
				1180	SDValue X = DAG.getNode(Op.getOpcode(), dl, SmallVT,
				1181	DAG.getNode(ISD::TRUNCATE, dl, SmallVT,
				1182	Op.getNode()->getOperand(0)),
				1183	DAG.getNode(ISD::TRUNCATE, dl, SmallVT,
				1184	Op.getNode()->getOperand(1)));
				1185	SDValue Z = DAG.getNode(ISD::ZERO_EXTEND, dl, Op.getValueType(), X);
				1186	return CombineTo(Op, Z);
				1187	}
				1188	}
				1189	return false;
				1190	}
				1191
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1192	/// SimplifyDemandedBits - Look at Op. At this point, we know that only the
Chad Rosier	8c1ec5a	2011-06-11 02:27:46 +0000	[diff] [blame]	1193	/// DemandedMask bits of the result of Op are ever used downstream. If we can
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1194	/// use this information to simplify Op, create a new simplified DAG node and
				1195	/// return true, returning the original and new nodes in Old and New. Otherwise,
				1196	/// analyze the expression and return a mask of KnownOne and KnownZero bits for
				1197	/// the expression (used to simplify the caller). The KnownZero/One bits may
				1198	/// only be accurate for those bits in the DemandedMask.
Dan Gohman	475871a	2008-07-27 21:46:04 +0000	[diff] [blame]	1199	bool TargetLowering::SimplifyDemandedBits(SDValue Op,
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1200	const APInt &DemandedMask,
				1201	APInt &KnownZero,
				1202	APInt &KnownOne,
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1203	TargetLoweringOpt &TLO,
				1204	unsigned Depth) const {
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1205	unsigned BitWidth = DemandedMask.getBitWidth();
Dan Gohman	87862e7	2009-12-11 21:31:27 +0000	[diff] [blame]	1206	assert(Op.getValueType().getScalarType().getSizeInBits() == BitWidth &&
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1207	"Mask size mismatches value type size!");
				1208	APInt NewMask = DemandedMask;
Dale Johannesen	6f38cb6	2009-02-07 19:59:05 +0000	[diff] [blame]	1209	DebugLoc dl = Op.getDebugLoc();
Chris Lattner	3fc5b01	2007-05-17 18:19:23 +0000	[diff] [blame]	1210
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1211	// Don't know anything.
				1212	KnownZero = KnownOne = APInt(BitWidth, 0);
				1213
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1214	// Other users may use these bits.
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1215	if (!Op.getNode()->hasOneUse()) {
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1216	if (Depth != 0) {
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1217	// If not at the root, Just compute the KnownZero/KnownOne bits to
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1218	// simplify things downstream.
Dan Gohman	ea859be	2007-06-22 14:59:07 +0000	[diff] [blame]	1219	TLO.DAG.ComputeMaskedBits(Op, DemandedMask, KnownZero, KnownOne, Depth);
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1220	return false;
				1221	}
				1222	// If this is the root being simplified, allow it to have multiple uses,
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1223	// just set the NewMask to all bits.
				1224	NewMask = APInt::getAllOnesValue(BitWidth);
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1225	} else if (DemandedMask == 0) {
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1226	// Not demanding any bits from Op.
				1227	if (Op.getOpcode() != ISD::UNDEF)
Dale Johannesen	e8d7230	2009-02-06 23:05:02 +0000	[diff] [blame]	1228	return TLO.CombineTo(Op, TLO.DAG.getUNDEF(Op.getValueType()));
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1229	return false;
				1230	} else if (Depth == 6) { // Limit search depth.
				1231	return false;
				1232	}
				1233
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1234	APInt KnownZero2, KnownOne2, KnownZeroOut, KnownOneOut;
Chris Lattner	c6fd6cd	2006-01-30 04:09:27 +0000	[diff] [blame]	1235	switch (Op.getOpcode()) {
				1236	case ISD::Constant:
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1237	// We know all of the bits for a constant!
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1238	KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue() & NewMask;
				1239	KnownZero = ~KnownOne & NewMask;
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1240	return false; // Don't fall through, will infinitely loop.
Chris Lattner	c6fd6cd	2006-01-30 04:09:27 +0000	[diff] [blame]	1241	case ISD::AND:
Chris Lattner	81cd355	2006-02-27 00:36:27 +0000	[diff] [blame]	1242	// If the RHS is a constant, check to see if the LHS would be zero without
				1243	// using the bits from the RHS. Below, we use knowledge about the RHS to
				1244	// simplify the LHS, here we're using information from the LHS to simplify
				1245	// the RHS.
				1246	if (ConstantSDNode *RHSC = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1247	APInt LHSZero, LHSOne;
Dale Johannesen	97fd9a5	2011-01-10 21:53:07 +0000	[diff] [blame]	1248	// Do not increment Depth here; that can cause an infinite loop.
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1249	TLO.DAG.ComputeMaskedBits(Op.getOperand(0), NewMask,
Dale Johannesen	97fd9a5	2011-01-10 21:53:07 +0000	[diff] [blame]	1250	LHSZero, LHSOne, Depth);
Chris Lattner	81cd355	2006-02-27 00:36:27 +0000	[diff] [blame]	1251	// If the LHS already has zeros where RHSC does, this and is dead.
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1252	if ((LHSZero & NewMask) == (~RHSC->getAPIntValue() & NewMask))
Chris Lattner	81cd355	2006-02-27 00:36:27 +0000	[diff] [blame]	1253	return TLO.CombineTo(Op, Op.getOperand(0));
				1254	// If any of the set bits in the RHS are known zero on the LHS, shrink
				1255	// the constant.
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1256	if (TLO.ShrinkDemandedConstant(Op, ~LHSZero & NewMask))
Chris Lattner	81cd355	2006-02-27 00:36:27 +0000	[diff] [blame]	1257	return true;
				1258	}
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1259
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1260	if (SimplifyDemandedBits(Op.getOperand(1), NewMask, KnownZero,
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1261	KnownOne, TLO, Depth+1))
Chris Lattner	c6fd6cd	2006-01-30 04:09:27 +0000	[diff] [blame]	1262	return true;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1263	assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1264	if (SimplifyDemandedBits(Op.getOperand(0), ~KnownZero & NewMask,
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1265	KnownZero2, KnownOne2, TLO, Depth+1))
				1266	return true;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1267	assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
				1268
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1269	// If all of the demanded bits are known one on one side, return the other.
				1270	// These bits cannot contribute to the result of the 'and'.
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1271	if ((NewMask & ~KnownZero2 & KnownOne) == (~KnownZero2 & NewMask))
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1272	return TLO.CombineTo(Op, Op.getOperand(0));
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1273	if ((NewMask & ~KnownZero & KnownOne2) == (~KnownZero & NewMask))
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1274	return TLO.CombineTo(Op, Op.getOperand(1));
				1275	// If all of the demanded bits in the inputs are known zeros, return zero.
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1276	if ((NewMask & (KnownZero\|KnownZero2)) == NewMask)
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1277	return TLO.CombineTo(Op, TLO.DAG.getConstant(0, Op.getValueType()));
				1278	// If the RHS is a constant, see if we can simplify it.
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1279	if (TLO.ShrinkDemandedConstant(Op, ~KnownZero2 & NewMask))
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1280	return true;
Dan Gohman	97121ba	2009-04-08 00:15:30 +0000	[diff] [blame]	1281	// If the operation can be done in a smaller type, do so.
Dan Gohman	4e39e9d	2010-06-24 14:30:44 +0000	[diff] [blame]	1282	if (TLO.ShrinkDemandedOp(Op, BitWidth, NewMask, dl))
Dan Gohman	97121ba	2009-04-08 00:15:30 +0000	[diff] [blame]	1283	return true;
				1284
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1285	// Output known-1 bits are only known if set in both the LHS & RHS.
				1286	KnownOne &= KnownOne2;
				1287	// Output known-0 are known to be clear if zero in either the LHS \| RHS.
				1288	KnownZero \|= KnownZero2;
				1289	break;
Chris Lattner	c6fd6cd	2006-01-30 04:09:27 +0000	[diff] [blame]	1290	case ISD::OR:
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1291	if (SimplifyDemandedBits(Op.getOperand(1), NewMask, KnownZero,
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1292	KnownOne, TLO, Depth+1))
				1293	return true;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1294	assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1295	if (SimplifyDemandedBits(Op.getOperand(0), ~KnownOne & NewMask,
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1296	KnownZero2, KnownOne2, TLO, Depth+1))
				1297	return true;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1298	assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
				1299
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1300	// If all of the demanded bits are known zero on one side, return the other.
				1301	// These bits cannot contribute to the result of the 'or'.
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1302	if ((NewMask & ~KnownOne2 & KnownZero) == (~KnownOne2 & NewMask))
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1303	return TLO.CombineTo(Op, Op.getOperand(0));
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1304	if ((NewMask & ~KnownOne & KnownZero2) == (~KnownOne & NewMask))
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1305	return TLO.CombineTo(Op, Op.getOperand(1));
				1306	// If all of the potentially set bits on one side are known to be set on
				1307	// the other side, just use the 'other' side.
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1308	if ((NewMask & ~KnownZero & KnownOne2) == (~KnownZero & NewMask))
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1309	return TLO.CombineTo(Op, Op.getOperand(0));
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1310	if ((NewMask & ~KnownZero2 & KnownOne) == (~KnownZero2 & NewMask))
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1311	return TLO.CombineTo(Op, Op.getOperand(1));
				1312	// If the RHS is a constant, see if we can simplify it.
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1313	if (TLO.ShrinkDemandedConstant(Op, NewMask))
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1314	return true;
Dan Gohman	97121ba	2009-04-08 00:15:30 +0000	[diff] [blame]	1315	// If the operation can be done in a smaller type, do so.
Dan Gohman	4e39e9d	2010-06-24 14:30:44 +0000	[diff] [blame]	1316	if (TLO.ShrinkDemandedOp(Op, BitWidth, NewMask, dl))
Dan Gohman	97121ba	2009-04-08 00:15:30 +0000	[diff] [blame]	1317	return true;
				1318
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1319	// Output known-0 bits are only known if clear in both the LHS & RHS.
				1320	KnownZero &= KnownZero2;
				1321	// Output known-1 are known to be set if set in either the LHS \| RHS.
				1322	KnownOne \|= KnownOne2;
				1323	break;
Chris Lattner	c6fd6cd	2006-01-30 04:09:27 +0000	[diff] [blame]	1324	case ISD::XOR:
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1325	if (SimplifyDemandedBits(Op.getOperand(1), NewMask, KnownZero,
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1326	KnownOne, TLO, Depth+1))
				1327	return true;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1328	assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1329	if (SimplifyDemandedBits(Op.getOperand(0), NewMask, KnownZero2,
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1330	KnownOne2, TLO, Depth+1))
				1331	return true;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1332	assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
				1333
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1334	// If all of the demanded bits are known zero on one side, return the other.
				1335	// These bits cannot contribute to the result of the 'xor'.
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1336	if ((KnownZero & NewMask) == NewMask)
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1337	return TLO.CombineTo(Op, Op.getOperand(0));
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1338	if ((KnownZero2 & NewMask) == NewMask)
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1339	return TLO.CombineTo(Op, Op.getOperand(1));
Dan Gohman	97121ba	2009-04-08 00:15:30 +0000	[diff] [blame]	1340	// If the operation can be done in a smaller type, do so.
Dan Gohman	4e39e9d	2010-06-24 14:30:44 +0000	[diff] [blame]	1341	if (TLO.ShrinkDemandedOp(Op, BitWidth, NewMask, dl))
Dan Gohman	97121ba	2009-04-08 00:15:30 +0000	[diff] [blame]	1342	return true;
				1343
Chris Lattner	3687c1a	2006-11-27 21:50:02 +0000	[diff] [blame]	1344	// If all of the unknown bits are known to be zero on one side or the other
				1345	// (but not both) turn this into an inclusive or.
				1346	// e.g. (A & C1)^(B & C2) -> (A & C1)\|(B & C2) iff C1&C2 == 0
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1347	if ((NewMask & ~KnownZero & ~KnownZero2) == 0)
Dale Johannesen	de06470	2009-02-06 21:50:26 +0000	[diff] [blame]	1348	return TLO.CombineTo(Op, TLO.DAG.getNode(ISD::OR, dl, Op.getValueType(),
Chris Lattner	3687c1a	2006-11-27 21:50:02 +0000	[diff] [blame]	1349	Op.getOperand(0),
				1350	Op.getOperand(1)));
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1351
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1352	// Output known-0 bits are known if clear or set in both the LHS & RHS.
				1353	KnownZeroOut = (KnownZero & KnownZero2) \| (KnownOne & KnownOne2);
				1354	// Output known-1 are known to be set if set in only one of the LHS, RHS.
				1355	KnownOneOut = (KnownZero & KnownOne2) \| (KnownOne & KnownZero2);
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1356
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1357	// If all of the demanded bits on one side are known, and all of the set
				1358	// bits on that side are also known to be set on the other side, turn this
				1359	// into an AND, as we know the bits will be cleared.
				1360	// e.g. (X \| C1) ^ C2 --> (X \| C1) & ~C2 iff (C1&C2) == C2
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1361	if ((NewMask & (KnownZero\|KnownOne)) == NewMask) { // all known
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1362	if ((KnownOne & KnownOne2) == KnownOne) {
Owen Anderson	e50ed30	2009-08-10 22:56:29 +0000	[diff] [blame]	1363	EVT VT = Op.getValueType();
Dan Gohman	475871a	2008-07-27 21:46:04 +0000	[diff] [blame]	1364	SDValue ANDC = TLO.DAG.getConstant(~KnownOne & NewMask, VT);
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1365	return TLO.CombineTo(Op, TLO.DAG.getNode(ISD::AND, dl, VT,
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	1366	Op.getOperand(0), ANDC));
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1367	}
				1368	}
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1369
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1370	// If the RHS is a constant, see if we can simplify it.
Torok Edwin	4fea2e9	2008-04-06 21:23:02 +0000	[diff] [blame]	1371	// for XOR, we prefer to force bits to 1 if they will make a -1.
				1372	// if we can't force bits, try to shrink constant
				1373	if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
				1374	APInt Expanded = C->getAPIntValue() \| (~NewMask);
				1375	// if we can expand it to have all bits set, do it
				1376	if (Expanded.isAllOnesValue()) {
				1377	if (Expanded != C->getAPIntValue()) {
Owen Anderson	e50ed30	2009-08-10 22:56:29 +0000	[diff] [blame]	1378	EVT VT = Op.getValueType();
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	1379	SDValue New = TLO.DAG.getNode(Op.getOpcode(), dl,VT, Op.getOperand(0),
Torok Edwin	4fea2e9	2008-04-06 21:23:02 +0000	[diff] [blame]	1380	TLO.DAG.getConstant(Expanded, VT));
				1381	return TLO.CombineTo(Op, New);
				1382	}
				1383	// if it already has all the bits set, nothing to change
				1384	// but don't shrink either!
				1385	} else if (TLO.ShrinkDemandedConstant(Op, NewMask)) {
				1386	return true;
				1387	}
				1388	}
				1389
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1390	KnownZero = KnownZeroOut;
				1391	KnownOne = KnownOneOut;
				1392	break;
Chris Lattner	c6fd6cd	2006-01-30 04:09:27 +0000	[diff] [blame]	1393	case ISD::SELECT:
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1394	if (SimplifyDemandedBits(Op.getOperand(2), NewMask, KnownZero,
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1395	KnownOne, TLO, Depth+1))
				1396	return true;
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1397	if (SimplifyDemandedBits(Op.getOperand(1), NewMask, KnownZero2,
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1398	KnownOne2, TLO, Depth+1))
				1399	return true;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1400	assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
				1401	assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
				1402
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1403	// If the operands are constants, see if we can simplify them.
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1404	if (TLO.ShrinkDemandedConstant(Op, NewMask))
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1405	return true;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1406
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1407	// Only known if known in both the LHS and RHS.
				1408	KnownOne &= KnownOne2;
				1409	KnownZero &= KnownZero2;
				1410	break;
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1411	case ISD::SELECT_CC:
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1412	if (SimplifyDemandedBits(Op.getOperand(3), NewMask, KnownZero,
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1413	KnownOne, TLO, Depth+1))
				1414	return true;
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1415	if (SimplifyDemandedBits(Op.getOperand(2), NewMask, KnownZero2,
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1416	KnownOne2, TLO, Depth+1))
				1417	return true;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1418	assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
				1419	assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
				1420
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1421	// If the operands are constants, see if we can simplify them.
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1422	if (TLO.ShrinkDemandedConstant(Op, NewMask))
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1423	return true;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1424
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1425	// Only known if known in both the LHS and RHS.
				1426	KnownOne &= KnownOne2;
				1427	KnownZero &= KnownZero2;
				1428	break;
Chris Lattner	c6fd6cd	2006-01-30 04:09:27 +0000	[diff] [blame]	1429	case ISD::SHL:
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1430	if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
Dan Gohman	f5aeb1a	2008-09-12 16:56:44 +0000	[diff] [blame]	1431	unsigned ShAmt = SA->getZExtValue();
Dan Gohman	475871a	2008-07-27 21:46:04 +0000	[diff] [blame]	1432	SDValue InOp = Op.getOperand(0);
Chris Lattner	895c4ab	2007-04-17 21:14:16 +0000	[diff] [blame]	1433
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1434	// If the shift count is an invalid immediate, don't do anything.
				1435	if (ShAmt >= BitWidth)
				1436	break;
				1437
Chris Lattner	895c4ab	2007-04-17 21:14:16 +0000	[diff] [blame]	1438	// If this is ((X >>u C1) << ShAmt), see if we can simplify this into a
				1439	// single shift. We can do this if the bottom bits (which are shifted
				1440	// out) are never demanded.
				1441	if (InOp.getOpcode() == ISD::SRL &&
				1442	isa<ConstantSDNode>(InOp.getOperand(1))) {
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1443	if (ShAmt && (NewMask & APInt::getLowBitsSet(BitWidth, ShAmt)) == 0) {
Dan Gohman	f5aeb1a	2008-09-12 16:56:44 +0000	[diff] [blame]	1444	unsigned C1= cast<ConstantSDNode>(InOp.getOperand(1))->getZExtValue();
Chris Lattner	895c4ab	2007-04-17 21:14:16 +0000	[diff] [blame]	1445	unsigned Opc = ISD::SHL;
				1446	int Diff = ShAmt-C1;
				1447	if (Diff < 0) {
				1448	Diff = -Diff;
				1449	Opc = ISD::SRL;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1450	}
				1451
				1452	SDValue NewSA =
Chris Lattner	4e7e6cd	2007-05-30 16:30:06 +0000	[diff] [blame]	1453	TLO.DAG.getConstant(Diff, Op.getOperand(1).getValueType());
Owen Anderson	e50ed30	2009-08-10 22:56:29 +0000	[diff] [blame]	1454	EVT VT = Op.getValueType();
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	1455	return TLO.CombineTo(Op, TLO.DAG.getNode(Opc, dl, VT,
Chris Lattner	895c4ab	2007-04-17 21:14:16 +0000	[diff] [blame]	1456	InOp.getOperand(0), NewSA));
				1457	}
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1458	}
				1459
Dan Gohman	a4f4d69	2010-07-23 18:03:30 +0000	[diff] [blame]	1460	if (SimplifyDemandedBits(InOp, NewMask.lshr(ShAmt),
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1461	KnownZero, KnownOne, TLO, Depth+1))
Chris Lattner	c6fd6cd	2006-01-30 04:09:27 +0000	[diff] [blame]	1462	return true;
Dan Gohman	a4f4d69	2010-07-23 18:03:30 +0000	[diff] [blame]	1463
				1464	// Convert (shl (anyext x, c)) to (anyext (shl x, c)) if the high bits
				1465	// are not demanded. This will likely allow the anyext to be folded away.
				1466	if (InOp.getNode()->getOpcode() == ISD::ANY_EXTEND) {
				1467	SDValue InnerOp = InOp.getNode()->getOperand(0);
				1468	EVT InnerVT = InnerOp.getValueType();
				1469	if ((APInt::getHighBitsSet(BitWidth,
				1470	BitWidth - InnerVT.getSizeInBits()) &
				1471	DemandedMask) == 0 &&
				1472	isTypeDesirableForOp(ISD::SHL, InnerVT)) {
Owen Anderson	95771af	2011-02-25 21:41:48 +0000	[diff] [blame]	1473	EVT ShTy = getShiftAmountTy(InnerVT);
Dan Gohman	cd20c6f	2010-07-23 21:08:12 +0000	[diff] [blame]	1474	if (!APInt(BitWidth, ShAmt).isIntN(ShTy.getSizeInBits()))
				1475	ShTy = InnerVT;
Dan Gohman	a4f4d69	2010-07-23 18:03:30 +0000	[diff] [blame]	1476	SDValue NarrowShl =
				1477	TLO.DAG.getNode(ISD::SHL, dl, InnerVT, InnerOp,
Dan Gohman	cd20c6f	2010-07-23 21:08:12 +0000	[diff] [blame]	1478	TLO.DAG.getConstant(ShAmt, ShTy));
Dan Gohman	a4f4d69	2010-07-23 18:03:30 +0000	[diff] [blame]	1479	return
				1480	TLO.CombineTo(Op,
				1481	TLO.DAG.getNode(ISD::ANY_EXTEND, dl, Op.getValueType(),
				1482	NarrowShl));
				1483	}
				1484	}
				1485
Dan Gohman	f5aeb1a	2008-09-12 16:56:44 +0000	[diff] [blame]	1486	KnownZero <<= SA->getZExtValue();
				1487	KnownOne <<= SA->getZExtValue();
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1488	// low bits known zero.
Dan Gohman	f5aeb1a	2008-09-12 16:56:44 +0000	[diff] [blame]	1489	KnownZero \|= APInt::getLowBitsSet(BitWidth, SA->getZExtValue());
Chris Lattner	c6fd6cd	2006-01-30 04:09:27 +0000	[diff] [blame]	1490	}
				1491	break;
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1492	case ISD::SRL:
				1493	if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
Owen Anderson	e50ed30	2009-08-10 22:56:29 +0000	[diff] [blame]	1494	EVT VT = Op.getValueType();
Dan Gohman	f5aeb1a	2008-09-12 16:56:44 +0000	[diff] [blame]	1495	unsigned ShAmt = SA->getZExtValue();
Duncan Sands	83ec4b6	2008-06-06 12:08:01 +0000	[diff] [blame]	1496	unsigned VTSize = VT.getSizeInBits();
Dan Gohman	475871a	2008-07-27 21:46:04 +0000	[diff] [blame]	1497	SDValue InOp = Op.getOperand(0);
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1498
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1499	// If the shift count is an invalid immediate, don't do anything.
				1500	if (ShAmt >= BitWidth)
				1501	break;
				1502
Chris Lattner	895c4ab	2007-04-17 21:14:16 +0000	[diff] [blame]	1503	// If this is ((X << C1) >>u ShAmt), see if we can simplify this into a
				1504	// single shift. We can do this if the top bits (which are shifted out)
				1505	// are never demanded.
				1506	if (InOp.getOpcode() == ISD::SHL &&
				1507	isa<ConstantSDNode>(InOp.getOperand(1))) {
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1508	if (ShAmt && (NewMask & APInt::getHighBitsSet(VTSize, ShAmt)) == 0) {
Dan Gohman	f5aeb1a	2008-09-12 16:56:44 +0000	[diff] [blame]	1509	unsigned C1= cast<ConstantSDNode>(InOp.getOperand(1))->getZExtValue();
Chris Lattner	895c4ab	2007-04-17 21:14:16 +0000	[diff] [blame]	1510	unsigned Opc = ISD::SRL;
				1511	int Diff = ShAmt-C1;
				1512	if (Diff < 0) {
				1513	Diff = -Diff;
				1514	Opc = ISD::SHL;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1515	}
				1516
Dan Gohman	475871a	2008-07-27 21:46:04 +0000	[diff] [blame]	1517	SDValue NewSA =
Chris Lattner	8c7d2d5	2007-04-17 22:53:02 +0000	[diff] [blame]	1518	TLO.DAG.getConstant(Diff, Op.getOperand(1).getValueType());
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	1519	return TLO.CombineTo(Op, TLO.DAG.getNode(Opc, dl, VT,
Chris Lattner	895c4ab	2007-04-17 21:14:16 +0000	[diff] [blame]	1520	InOp.getOperand(0), NewSA));
				1521	}
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1522	}
				1523
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1524	// Compute the new bits that are at the top now.
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1525	if (SimplifyDemandedBits(InOp, (NewMask << ShAmt),
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1526	KnownZero, KnownOne, TLO, Depth+1))
				1527	return true;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1528	assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1529	KnownZero = KnownZero.lshr(ShAmt);
				1530	KnownOne = KnownOne.lshr(ShAmt);
Chris Lattner	c4fa603	2006-06-13 16:52:37 +0000	[diff] [blame]	1531
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1532	APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt);
Chris Lattner	c4fa603	2006-06-13 16:52:37 +0000	[diff] [blame]	1533	KnownZero \|= HighBits; // High bits known zero.
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1534	}
				1535	break;
				1536	case ISD::SRA:
Dan Gohman	e5af2d3	2009-01-29 01:59:02 +0000	[diff] [blame]	1537	// If this is an arithmetic shift right and only the low-bit is set, we can
				1538	// always convert this into a logical shr, even if the shift amount is
				1539	// variable. The low bit of the shift cannot be an input sign bit unless
				1540	// the shift amount is >= the size of the datatype, which is undefined.
				1541	if (DemandedMask == 1)
Evan Cheng	e5b51ac	2010-04-17 06:13:15 +0000	[diff] [blame]	1542	return TLO.CombineTo(Op,
				1543	TLO.DAG.getNode(ISD::SRL, dl, Op.getValueType(),
				1544	Op.getOperand(0), Op.getOperand(1)));
Dan Gohman	e5af2d3	2009-01-29 01:59:02 +0000	[diff] [blame]	1545
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1546	if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
Owen Anderson	e50ed30	2009-08-10 22:56:29 +0000	[diff] [blame]	1547	EVT VT = Op.getValueType();
Dan Gohman	f5aeb1a	2008-09-12 16:56:44 +0000	[diff] [blame]	1548	unsigned ShAmt = SA->getZExtValue();
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1549
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1550	// If the shift count is an invalid immediate, don't do anything.
				1551	if (ShAmt >= BitWidth)
				1552	break;
				1553
				1554	APInt InDemandedMask = (NewMask << ShAmt);
Chris Lattner	1b73713	2006-05-08 17:22:53 +0000	[diff] [blame]	1555
				1556	// If any of the demanded bits are produced by the sign extension, we also
				1557	// demand the input sign bit.
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1558	APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt);
				1559	if (HighBits.intersects(NewMask))
Dan Gohman	87862e7	2009-12-11 21:31:27 +0000	[diff] [blame]	1560	InDemandedMask \|= APInt::getSignBit(VT.getScalarType().getSizeInBits());
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1561
Chris Lattner	1b73713	2006-05-08 17:22:53 +0000	[diff] [blame]	1562	if (SimplifyDemandedBits(Op.getOperand(0), InDemandedMask,
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1563	KnownZero, KnownOne, TLO, Depth+1))
				1564	return true;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1565	assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1566	KnownZero = KnownZero.lshr(ShAmt);
				1567	KnownOne = KnownOne.lshr(ShAmt);
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1568
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1569	// Handle the sign bit, adjusted to where it is now in the mask.
				1570	APInt SignBit = APInt::getSignBit(BitWidth).lshr(ShAmt);
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1571
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1572	// If the input sign bit is known to be zero, or if none of the top bits
				1573	// are demanded, turn this into an unsigned shift right.
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1574	if (KnownZero.intersects(SignBit) \|\| (HighBits & ~NewMask) == HighBits) {
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1575	return TLO.CombineTo(Op, TLO.DAG.getNode(ISD::SRL, dl, VT,
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	1576	Op.getOperand(0),
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1577	Op.getOperand(1)));
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1578	} else if (KnownOne.intersects(SignBit)) { // New bits are known one.
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1579	KnownOne \|= HighBits;
				1580	}
				1581	}
				1582	break;
				1583	case ISD::SIGN_EXTEND_INREG: {
Owen Anderson	e50ed30	2009-08-10 22:56:29 +0000	[diff] [blame]	1584	EVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT();
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1585
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1586	// Sign extension. Compute the demanded bits in the result that are not
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1587	// present in the input.
Dan Gohman	d199636	2010-01-09 02:13:55 +0000	[diff] [blame]	1588	APInt NewBits =
				1589	APInt::getHighBitsSet(BitWidth,
Eli Friedman	1d17d19	2010-08-02 04:42:25 +0000	[diff] [blame]	1590	BitWidth - EVT.getScalarType().getSizeInBits());
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1591
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1592	// If none of the extended bits are demanded, eliminate the sextinreg.
Eli Friedman	1d17d19	2010-08-02 04:42:25 +0000	[diff] [blame]	1593	if ((NewBits & NewMask) == 0)
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1594	return TLO.CombineTo(Op, Op.getOperand(0));
				1595
Jay Foad	40f8f62	2010-12-07 08:25:19 +0000	[diff] [blame]	1596	APInt InSignBit =
				1597	APInt::getSignBit(EVT.getScalarType().getSizeInBits()).zext(BitWidth);
Dan Gohman	d199636	2010-01-09 02:13:55 +0000	[diff] [blame]	1598	APInt InputDemandedBits =
				1599	APInt::getLowBitsSet(BitWidth,
				1600	EVT.getScalarType().getSizeInBits()) &
				1601	NewMask;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1602
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1603	// Since the sign extended bits are demanded, we know that the sign
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1604	// bit is demanded.
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1605	InputDemandedBits \|= InSignBit;
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1606
				1607	if (SimplifyDemandedBits(Op.getOperand(0), InputDemandedBits,
				1608	KnownZero, KnownOne, TLO, Depth+1))
				1609	return true;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1610	assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1611
				1612	// If the sign bit of the input is known set or clear, then we know the
				1613	// top bits of the result.
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1614
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1615	// If the input sign bit is known zero, convert this into a zero extension.
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1616	if (KnownZero.intersects(InSignBit))
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1617	return TLO.CombineTo(Op,
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	1618	TLO.DAG.getZeroExtendInReg(Op.getOperand(0),dl,EVT));
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1619
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1620	if (KnownOne.intersects(InSignBit)) { // Input sign bit known set
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1621	KnownOne \|= NewBits;
				1622	KnownZero &= ~NewBits;
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1623	} else { // Input sign bit unknown
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1624	KnownZero &= ~NewBits;
				1625	KnownOne &= ~NewBits;
				1626	}
				1627	break;
				1628	}
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1629	case ISD::ZERO_EXTEND: {
Dan Gohman	d199636	2010-01-09 02:13:55 +0000	[diff] [blame]	1630	unsigned OperandBitWidth =
				1631	Op.getOperand(0).getValueType().getScalarType().getSizeInBits();
Jay Foad	40f8f62	2010-12-07 08:25:19 +0000	[diff] [blame]	1632	APInt InMask = NewMask.trunc(OperandBitWidth);
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1633
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1634	// If none of the top bits are demanded, convert this into an any_extend.
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1635	APInt NewBits =
				1636	APInt::getHighBitsSet(BitWidth, BitWidth - OperandBitWidth) & NewMask;
				1637	if (!NewBits.intersects(NewMask))
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	1638	return TLO.CombineTo(Op, TLO.DAG.getNode(ISD::ANY_EXTEND, dl,
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1639	Op.getValueType(),
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1640	Op.getOperand(0)));
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1641
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1642	if (SimplifyDemandedBits(Op.getOperand(0), InMask,
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1643	KnownZero, KnownOne, TLO, Depth+1))
				1644	return true;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1645	assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
Jay Foad	40f8f62	2010-12-07 08:25:19 +0000	[diff] [blame]	1646	KnownZero = KnownZero.zext(BitWidth);
				1647	KnownOne = KnownOne.zext(BitWidth);
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1648	KnownZero \|= NewBits;
				1649	break;
				1650	}
				1651	case ISD::SIGN_EXTEND: {
Owen Anderson	e50ed30	2009-08-10 22:56:29 +0000	[diff] [blame]	1652	EVT InVT = Op.getOperand(0).getValueType();
Dan Gohman	d199636	2010-01-09 02:13:55 +0000	[diff] [blame]	1653	unsigned InBits = InVT.getScalarType().getSizeInBits();
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1654	APInt InMask = APInt::getLowBitsSet(BitWidth, InBits);
Dan Gohman	9736028	2008-03-11 21:29:43 +0000	[diff] [blame]	1655	APInt InSignBit = APInt::getBitsSet(BitWidth, InBits - 1, InBits);
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1656	APInt NewBits = ~InMask & NewMask;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1657
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1658	// If none of the top bits are demanded, convert this into an any_extend.
				1659	if (NewBits == 0)
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	1660	return TLO.CombineTo(Op,TLO.DAG.getNode(ISD::ANY_EXTEND, dl,
				1661	Op.getValueType(),
				1662	Op.getOperand(0)));
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1663
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1664	// Since some of the sign extended bits are demanded, we know that the sign
				1665	// bit is demanded.
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1666	APInt InDemandedBits = InMask & NewMask;
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1667	InDemandedBits \|= InSignBit;
Jay Foad	40f8f62	2010-12-07 08:25:19 +0000	[diff] [blame]	1668	InDemandedBits = InDemandedBits.trunc(InBits);
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1669
				1670	if (SimplifyDemandedBits(Op.getOperand(0), InDemandedBits, KnownZero,
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1671	KnownOne, TLO, Depth+1))
				1672	return true;
Jay Foad	40f8f62	2010-12-07 08:25:19 +0000	[diff] [blame]	1673	KnownZero = KnownZero.zext(BitWidth);
				1674	KnownOne = KnownOne.zext(BitWidth);
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1675
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1676	// If the sign bit is known zero, convert this to a zero extend.
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1677	if (KnownZero.intersects(InSignBit))
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	1678	return TLO.CombineTo(Op, TLO.DAG.getNode(ISD::ZERO_EXTEND, dl,
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1679	Op.getValueType(),
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1680	Op.getOperand(0)));
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1681
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1682	// If the sign bit is known one, the top bits match.
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1683	if (KnownOne.intersects(InSignBit)) {
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1684	KnownOne \|= NewBits;
				1685	KnownZero &= ~NewBits;
				1686	} else { // Otherwise, top bits aren't known.
				1687	KnownOne &= ~NewBits;
				1688	KnownZero &= ~NewBits;
				1689	}
				1690	break;
				1691	}
				1692	case ISD::ANY_EXTEND: {
Dan Gohman	d199636	2010-01-09 02:13:55 +0000	[diff] [blame]	1693	unsigned OperandBitWidth =
				1694	Op.getOperand(0).getValueType().getScalarType().getSizeInBits();
Jay Foad	40f8f62	2010-12-07 08:25:19 +0000	[diff] [blame]	1695	APInt InMask = NewMask.trunc(OperandBitWidth);
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1696	if (SimplifyDemandedBits(Op.getOperand(0), InMask,
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1697	KnownZero, KnownOne, TLO, Depth+1))
				1698	return true;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1699	assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
Jay Foad	40f8f62	2010-12-07 08:25:19 +0000	[diff] [blame]	1700	KnownZero = KnownZero.zext(BitWidth);
				1701	KnownOne = KnownOne.zext(BitWidth);
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1702	break;
				1703	}
Chris Lattner	fe8babf	2006-05-05 22:32:12 +0000	[diff] [blame]	1704	case ISD::TRUNCATE: {
Chris Lattner	c93dfda	2006-05-06 00:11:52 +0000	[diff] [blame]	1705	// Simplify the input, using demanded bit information, and compute the known
				1706	// zero/one bits live out.
Dan Gohman	042919c	2010-03-01 17:59:21 +0000	[diff] [blame]	1707	unsigned OperandBitWidth =
				1708	Op.getOperand(0).getValueType().getScalarType().getSizeInBits();
Jay Foad	40f8f62	2010-12-07 08:25:19 +0000	[diff] [blame]	1709	APInt TruncMask = NewMask.zext(OperandBitWidth);
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1710	if (SimplifyDemandedBits(Op.getOperand(0), TruncMask,
Chris Lattner	fe8babf	2006-05-05 22:32:12 +0000	[diff] [blame]	1711	KnownZero, KnownOne, TLO, Depth+1))
				1712	return true;
Jay Foad	40f8f62	2010-12-07 08:25:19 +0000	[diff] [blame]	1713	KnownZero = KnownZero.trunc(BitWidth);
				1714	KnownOne = KnownOne.trunc(BitWidth);
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1715
Chris Lattner	c93dfda	2006-05-06 00:11:52 +0000	[diff] [blame]	1716	// If the input is only used by this truncate, see if we can shrink it based
				1717	// on the known demanded bits.
Gabor Greif	ba36cb5	2008-08-28 21:40:38 +0000	[diff] [blame]	1718	if (Op.getOperand(0).getNode()->hasOneUse()) {
Dan Gohman	475871a	2008-07-27 21:46:04 +0000	[diff] [blame]	1719	SDValue In = Op.getOperand(0);
Chris Lattner	c93dfda	2006-05-06 00:11:52 +0000	[diff] [blame]	1720	switch (In.getOpcode()) {
				1721	default: break;
				1722	case ISD::SRL:
				1723	// Shrink SRL by a constant if none of the high bits shifted in are
				1724	// demanded.
Evan Cheng	e5b51ac	2010-04-17 06:13:15 +0000	[diff] [blame]	1725	if (TLO.LegalTypes() &&
				1726	!isTypeDesirableForOp(ISD::SRL, Op.getValueType()))
				1727	// Do not turn (vt1 truncate (vt2 srl)) into (vt1 srl) if vt1 is
				1728	// undesirable.
				1729	break;
				1730	ConstantSDNode *ShAmt = dyn_cast<ConstantSDNode>(In.getOperand(1));
				1731	if (!ShAmt)
				1732	break;
Owen Anderson	7adf862	2011-04-13 23:22:23 +0000	[diff] [blame]	1733	SDValue Shift = In.getOperand(1);
				1734	if (TLO.LegalTypes()) {
				1735	uint64_t ShVal = ShAmt->getZExtValue();
				1736	Shift =
				1737	TLO.DAG.getConstant(ShVal, getShiftAmountTy(Op.getValueType()));
				1738	}
				1739
Evan Cheng	e5b51ac	2010-04-17 06:13:15 +0000	[diff] [blame]	1740	APInt HighBits = APInt::getHighBitsSet(OperandBitWidth,
				1741	OperandBitWidth - BitWidth);
Jay Foad	40f8f62	2010-12-07 08:25:19 +0000	[diff] [blame]	1742	HighBits = HighBits.lshr(ShAmt->getZExtValue()).trunc(BitWidth);
Evan Cheng	e5b51ac	2010-04-17 06:13:15 +0000	[diff] [blame]	1743
				1744	if (ShAmt->getZExtValue() < BitWidth && !(HighBits & NewMask)) {
				1745	// None of the shifted in bits are needed. Add a truncate of the
				1746	// shift input, then shift it.
				1747	SDValue NewTrunc = TLO.DAG.getNode(ISD::TRUNCATE, dl,
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1748	Op.getValueType(),
Evan Cheng	e5b51ac	2010-04-17 06:13:15 +0000	[diff] [blame]	1749	In.getOperand(0));
				1750	return TLO.CombineTo(Op, TLO.DAG.getNode(ISD::SRL, dl,
				1751	Op.getValueType(),
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1752	NewTrunc,
Owen Anderson	7adf862	2011-04-13 23:22:23 +0000	[diff] [blame]	1753	Shift));
Chris Lattner	c93dfda	2006-05-06 00:11:52 +0000	[diff] [blame]	1754	}
				1755	break;
				1756	}
				1757	}
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1758
				1759	assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
Chris Lattner	fe8babf	2006-05-05 22:32:12 +0000	[diff] [blame]	1760	break;
				1761	}
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1762	case ISD::AssertZext: {
Dan Gohman	400f75c	2010-06-03 20:21:33 +0000	[diff] [blame]	1763	// Demand all the bits of the input that are demanded in the output.
				1764	// The low bits are obvious; the high bits are demanded because we're
				1765	// asserting that they're zero here.
				1766	if (SimplifyDemandedBits(Op.getOperand(0), NewMask,
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1767	KnownZero, KnownOne, TLO, Depth+1))
				1768	return true;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1769	assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
Dan Gohman	400f75c	2010-06-03 20:21:33 +0000	[diff] [blame]	1770
				1771	EVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT();
				1772	APInt InMask = APInt::getLowBitsSet(BitWidth,
				1773	VT.getSizeInBits());
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1774	KnownZero \|= ~InMask & NewMask;
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1775	break;
				1776	}
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1777	case ISD::BITCAST:
Stuart Hastings	57f1fde	2011-06-06 16:44:31 +0000	[diff] [blame]	1778	// If this is an FP->Int bitcast and if the sign bit is the only
				1779	// thing demanded, turn this into a FGETSIGN.
Nadav Rotem	0c3e678	2011-06-12 14:56:55 +0000	[diff] [blame]	1780	if (!Op.getOperand(0).getValueType().isVector() &&
				1781	NewMask == APInt::getSignBit(Op.getValueType().getSizeInBits()) &&
				1782	Op.getOperand(0).getValueType().isFloatingPoint()) {
Stuart Hastings	57f1fde	2011-06-06 16:44:31 +0000	[diff] [blame]	1783	bool OpVTLegal = isOperationLegalOrCustom(ISD::FGETSIGN, Op.getValueType());
				1784	bool i32Legal = isOperationLegalOrCustom(ISD::FGETSIGN, MVT::i32);
				1785	if ((OpVTLegal \|\| i32Legal) && Op.getValueType().isSimple()) {
				1786	EVT Ty = OpVTLegal ? Op.getValueType() : MVT::i32;
Chris Lattner	2ceb2cf	2007-12-22 21:35:38 +0000	[diff] [blame]	1787	// Make a FGETSIGN + SHL to move the sign bit into the appropriate
				1788	// place. We expect the SHL to be eliminated by other optimizations.
Stuart Hastings	090bf19	2011-06-01 18:32:25 +0000	[diff] [blame]	1789	SDValue Sign = TLO.DAG.getNode(ISD::FGETSIGN, dl, Ty, Op.getOperand(0));
Stuart Hastings	57f1fde	2011-06-06 16:44:31 +0000	[diff] [blame]	1790	unsigned OpVTSizeInBits = Op.getValueType().getSizeInBits();
				1791	if (!OpVTLegal && OpVTSizeInBits > 32)
Stuart Hastings	090bf19	2011-06-01 18:32:25 +0000	[diff] [blame]	1792	Sign = TLO.DAG.getNode(ISD::ZERO_EXTEND, dl, Op.getValueType(), Sign);
Duncan Sands	83ec4b6	2008-06-06 12:08:01 +0000	[diff] [blame]	1793	unsigned ShVal = Op.getValueType().getSizeInBits()-1;
Stuart Hastings	bdce372	2011-06-01 14:04:17 +0000	[diff] [blame]	1794	SDValue ShAmt = TLO.DAG.getConstant(ShVal, Op.getValueType());
Stuart Hastings	3dfc4b12	2011-05-19 18:48:20 +0000	[diff] [blame]	1795	return TLO.CombineTo(Op, TLO.DAG.getNode(ISD::SHL, dl,
				1796	Op.getValueType(),
Chris Lattner	2ceb2cf	2007-12-22 21:35:38 +0000	[diff] [blame]	1797	Sign, ShAmt));
				1798	}
				1799	}
Chris Lattner	2ceb2cf	2007-12-22 21:35:38 +0000	[diff] [blame]	1800	break;
Dan Gohman	97121ba	2009-04-08 00:15:30 +0000	[diff] [blame]	1801	case ISD::ADD:
				1802	case ISD::MUL:
				1803	case ISD::SUB: {
				1804	// Add, Sub, and Mul don't demand any bits in positions beyond that
				1805	// of the highest bit demanded of them.
				1806	APInt LoMask = APInt::getLowBitsSet(BitWidth,
				1807	BitWidth - NewMask.countLeadingZeros());
				1808	if (SimplifyDemandedBits(Op.getOperand(0), LoMask, KnownZero2,
				1809	KnownOne2, TLO, Depth+1))
				1810	return true;
				1811	if (SimplifyDemandedBits(Op.getOperand(1), LoMask, KnownZero2,
				1812	KnownOne2, TLO, Depth+1))
				1813	return true;
				1814	// See if the operation should be performed at a smaller bit width.
Dan Gohman	4e39e9d	2010-06-24 14:30:44 +0000	[diff] [blame]	1815	if (TLO.ShrinkDemandedOp(Op, BitWidth, NewMask, dl))
Dan Gohman	97121ba	2009-04-08 00:15:30 +0000	[diff] [blame]	1816	return true;
				1817	}
				1818	// FALL THROUGH
Dan Gohman	54eed37	2008-05-06 00:53:29 +0000	[diff] [blame]	1819	default:
Chris Lattner	1482b5f	2006-04-02 06:15:09 +0000	[diff] [blame]	1820	// Just use ComputeMaskedBits to compute output bits.
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1821	TLO.DAG.ComputeMaskedBits(Op, NewMask, KnownZero, KnownOne, Depth);
Chris Lattner	a6bc5a4	2006-02-27 01:00:42 +0000	[diff] [blame]	1822	break;
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1823	}
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1824
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1825	// If we know the value of all of the demanded bits, return this as a
				1826	// constant.
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1827	if ((NewMask & (KnownZero\|KnownOne)) == NewMask)
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1828	return TLO.CombineTo(Op, TLO.DAG.getConstant(KnownOne, Op.getValueType()));
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1829
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1830	return false;
				1831	}
				1832
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1833	/// computeMaskedBitsForTargetNode - Determine which of the bits specified
				1834	/// in Mask are known to be either zero or one and return them in the
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1835	/// KnownZero/KnownOne bitsets.
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1836	void TargetLowering::computeMaskedBitsForTargetNode(const SDValue Op,
Dan Gohman	977a76f	2008-02-13 22:28:48 +0000	[diff] [blame]	1837	const APInt &Mask,
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1838	APInt &KnownZero,
Dan Gohman	fd29e0e	2008-02-13 00:35:47 +0000	[diff] [blame]	1839	APInt &KnownOne,
Dan Gohman	ea859be	2007-06-22 14:59:07 +0000	[diff] [blame]	1840	const SelectionDAG &DAG,
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1841	unsigned Depth) const {
Chris Lattner	1b5232a	2006-04-02 06:19:46 +0000	[diff] [blame]	1842	assert((Op.getOpcode() >= ISD::BUILTIN_OP_END \|\|
				1843	Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN \|\|
				1844	Op.getOpcode() == ISD::INTRINSIC_W_CHAIN \|\|
				1845	Op.getOpcode() == ISD::INTRINSIC_VOID) &&
Chris Lattner	c6fd6cd	2006-01-30 04:09:27 +0000	[diff] [blame]	1846	"Should use MaskedValueIsZero if you don't know whether Op"
				1847	" is a target node!");
Dan Gohman	977a76f	2008-02-13 22:28:48 +0000	[diff] [blame]	1848	KnownZero = KnownOne = APInt(Mask.getBitWidth(), 0);
Evan Cheng	3a03ebb	2005-12-21 23:05:39 +0000	[diff] [blame]	1849	}
Chris Lattner	4ccb070	2006-01-26 20:37:03 +0000	[diff] [blame]	1850
Chris Lattner	5c3e21d	2006-05-06 09:27:13 +0000	[diff] [blame]	1851	/// ComputeNumSignBitsForTargetNode - This method can be implemented by
				1852	/// targets that want to expose additional information about sign bits to the
				1853	/// DAG Combiner.
Dan Gohman	475871a	2008-07-27 21:46:04 +0000	[diff] [blame]	1854	unsigned TargetLowering::ComputeNumSignBitsForTargetNode(SDValue Op,
Chris Lattner	5c3e21d	2006-05-06 09:27:13 +0000	[diff] [blame]	1855	unsigned Depth) const {
				1856	assert((Op.getOpcode() >= ISD::BUILTIN_OP_END \|\|
				1857	Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN \|\|
				1858	Op.getOpcode() == ISD::INTRINSIC_W_CHAIN \|\|
				1859	Op.getOpcode() == ISD::INTRINSIC_VOID) &&
				1860	"Should use ComputeNumSignBits if you don't know whether Op"
				1861	" is a target node!");
				1862	return 1;
				1863	}
				1864
Dan Gohman	97d1163	2009-02-15 23:59:32 +0000	[diff] [blame]	1865	/// ValueHasExactlyOneBitSet - Test if the given value is known to have exactly
				1866	/// one bit set. This differs from ComputeMaskedBits in that it doesn't need to
				1867	/// determine which bit is set.
				1868	///
Dale Johannesen	85b0ede	2009-02-11 19:19:41 +0000	[diff] [blame]	1869	static bool ValueHasExactlyOneBitSet(SDValue Val, const SelectionDAG &DAG) {
Dan Gohman	97d1163	2009-02-15 23:59:32 +0000	[diff] [blame]	1870	// A left-shift of a constant one will have exactly one bit set, because
				1871	// shifting the bit off the end is undefined.
				1872	if (Val.getOpcode() == ISD::SHL)
				1873	if (ConstantSDNode *C =
				1874	dyn_cast<ConstantSDNode>(Val.getNode()->getOperand(0)))
				1875	if (C->getAPIntValue() == 1)
				1876	return true;
Dan Gohman	e5af2d3	2009-01-29 01:59:02 +0000	[diff] [blame]	1877
Dan Gohman	97d1163	2009-02-15 23:59:32 +0000	[diff] [blame]	1878	// Similarly, a right-shift of a constant sign-bit will have exactly
				1879	// one bit set.
				1880	if (Val.getOpcode() == ISD::SRL)
				1881	if (ConstantSDNode *C =
				1882	dyn_cast<ConstantSDNode>(Val.getNode()->getOperand(0)))
				1883	if (C->getAPIntValue().isSignBit())
				1884	return true;
				1885
				1886	// More could be done here, though the above checks are enough
				1887	// to handle some common cases.
				1888
				1889	// Fall back to ComputeMaskedBits to catch other known cases.
Owen Anderson	e50ed30	2009-08-10 22:56:29 +0000	[diff] [blame]	1890	EVT OpVT = Val.getValueType();
Dan Gohman	5b870af	2010-03-02 02:14:38 +0000	[diff] [blame]	1891	unsigned BitWidth = OpVT.getScalarType().getSizeInBits();
Dan Gohman	e5af2d3	2009-01-29 01:59:02 +0000	[diff] [blame]	1892	APInt Mask = APInt::getAllOnesValue(BitWidth);
				1893	APInt KnownZero, KnownOne;
				1894	DAG.ComputeMaskedBits(Val, Mask, KnownZero, KnownOne);
Dale Johannesen	85b0ede	2009-02-11 19:19:41 +0000	[diff] [blame]	1895	return (KnownZero.countPopulation() == BitWidth - 1) &&
				1896	(KnownOne.countPopulation() == 1);
Dan Gohman	e5af2d3	2009-01-29 01:59:02 +0000	[diff] [blame]	1897	}
Chris Lattner	5c3e21d	2006-05-06 09:27:13 +0000	[diff] [blame]	1898
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1899	/// SimplifySetCC - Try to simplify a setcc built with the specified operands
Dan Gohman	475871a	2008-07-27 21:46:04 +0000	[diff] [blame]	1900	/// and cc. If it is unable to simplify it, return a null SDValue.
				1901	SDValue
Owen Anderson	e50ed30	2009-08-10 22:56:29 +0000	[diff] [blame]	1902	TargetLowering::SimplifySetCC(EVT VT, SDValue N0, SDValue N1,
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	1903	ISD::CondCode Cond, bool foldBooleans,
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	1904	DAGCombinerInfo &DCI, DebugLoc dl) const {
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	1905	SelectionDAG &DAG = DCI.DAG;
				1906
				1907	// These setcc operations always fold.
				1908	switch (Cond) {
				1909	default: break;
				1910	case ISD::SETFALSE:
				1911	case ISD::SETFALSE2: return DAG.getConstant(0, VT);
				1912	case ISD::SETTRUE:
				1913	case ISD::SETTRUE2: return DAG.getConstant(1, VT);
				1914	}
				1915
Chris Lattner	7a2bdde	2011-04-15 05:18:47 +0000	[diff] [blame]	1916	// Ensure that the constant occurs on the RHS, and fold constant
				1917	// comparisons.
				1918	if (isa<ConstantSDNode>(N0.getNode()))
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	1919	return DAG.getSetCC(dl, VT, N1, N0, ISD::getSetCCSwappedOperands(Cond));
Eric Christopher	362fee9	2011-06-17 20:41:29 +0000	[diff] [blame]	1920
Gabor Greif	ba36cb5	2008-08-28 21:40:38 +0000	[diff] [blame]	1921	if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode())) {
Dan Gohman	6c6cd1c	2008-03-03 22:22:56 +0000	[diff] [blame]	1922	const APInt &C1 = N1C->getAPIntValue();
Dale Johannesen	89217a6	2008-11-07 01:28:02 +0000	[diff] [blame]	1923
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	1924	// If the LHS is '(srl (ctlz x), 5)', the RHS is 0/1, and this is an
				1925	// equality comparison, then we're just comparing whether X itself is
				1926	// zero.
				1927	if (N0.getOpcode() == ISD::SRL && (C1 == 0 \|\| C1 == 1) &&
				1928	N0.getOperand(0).getOpcode() == ISD::CTLZ &&
				1929	N0.getOperand(1).getOpcode() == ISD::Constant) {
Evan Cheng	347a9cb	2010-01-07 20:58:44 +0000	[diff] [blame]	1930	const APInt &ShAmt
				1931	= cast<ConstantSDNode>(N0.getOperand(1))->getAPIntValue();
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	1932	if ((Cond == ISD::SETEQ \|\| Cond == ISD::SETNE) &&
				1933	ShAmt == Log2_32(N0.getValueType().getSizeInBits())) {
				1934	if ((C1 == 0) == (Cond == ISD::SETEQ)) {
				1935	// (srl (ctlz x), 5) == 0 -> X != 0
				1936	// (srl (ctlz x), 5) != 1 -> X != 0
				1937	Cond = ISD::SETNE;
				1938	} else {
				1939	// (srl (ctlz x), 5) != 0 -> X == 0
				1940	// (srl (ctlz x), 5) == 1 -> X == 0
				1941	Cond = ISD::SETEQ;
				1942	}
				1943	SDValue Zero = DAG.getConstant(0, N0.getValueType());
				1944	return DAG.getSetCC(dl, VT, N0.getOperand(0).getOperand(0),
				1945	Zero, Cond);
				1946	}
				1947	}
				1948
Benjamin Kramer	d822892	2011-01-17 12:04:57 +0000	[diff] [blame]	1949	SDValue CTPOP = N0;
				1950	// Look through truncs that don't change the value of a ctpop.
				1951	if (N0.hasOneUse() && N0.getOpcode() == ISD::TRUNCATE)
				1952	CTPOP = N0.getOperand(0);
				1953
				1954	if (CTPOP.hasOneUse() && CTPOP.getOpcode() == ISD::CTPOP &&
Benjamin Kramer	c9b6a3e	2011-01-17 18:00:28 +0000	[diff] [blame]	1955	(N0 == CTPOP \|\| N0.getValueType().getSizeInBits() >
Benjamin Kramer	d822892	2011-01-17 12:04:57 +0000	[diff] [blame]	1956	Log2_32_Ceil(CTPOP.getValueType().getSizeInBits()))) {
				1957	EVT CTVT = CTPOP.getValueType();
				1958	SDValue CTOp = CTPOP.getOperand(0);
				1959
				1960	// (ctpop x) u< 2 -> (x & x-1) == 0
				1961	// (ctpop x) u> 1 -> (x & x-1) != 0
				1962	if ((Cond == ISD::SETULT && C1 == 2) \|\| (Cond == ISD::SETUGT && C1 == 1)){
				1963	SDValue Sub = DAG.getNode(ISD::SUB, dl, CTVT, CTOp,
				1964	DAG.getConstant(1, CTVT));
				1965	SDValue And = DAG.getNode(ISD::AND, dl, CTVT, CTOp, Sub);
				1966	ISD::CondCode CC = Cond == ISD::SETULT ? ISD::SETEQ : ISD::SETNE;
				1967	return DAG.getSetCC(dl, VT, And, DAG.getConstant(0, CTVT), CC);
				1968	}
				1969
				1970	// TODO: (ctpop x) == 1 -> x && (x & x-1) == 0 iff ctpop is illegal.
				1971	}
				1972
Benjamin Kramer	e7cf062	2011-04-22 18:47:44 +0000	[diff] [blame]	1973	// (zext x) == C --> x == (trunc C)
				1974	if (DCI.isBeforeLegalize() && N0->hasOneUse() &&
				1975	(Cond == ISD::SETEQ \|\| Cond == ISD::SETNE)) {
				1976	unsigned MinBits = N0.getValueSizeInBits();
				1977	SDValue PreZExt;
				1978	if (N0->getOpcode() == ISD::ZERO_EXTEND) {
				1979	// ZExt
				1980	MinBits = N0->getOperand(0).getValueSizeInBits();
				1981	PreZExt = N0->getOperand(0);
				1982	} else if (N0->getOpcode() == ISD::AND) {
				1983	// DAGCombine turns costly ZExts into ANDs
				1984	if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N0->getOperand(1)))
				1985	if ((C->getAPIntValue()+1).isPowerOf2()) {
				1986	MinBits = C->getAPIntValue().countTrailingOnes();
				1987	PreZExt = N0->getOperand(0);
				1988	}
				1989	} else if (LoadSDNode *LN0 = dyn_cast<LoadSDNode>(N0)) {
				1990	// ZEXTLOAD
				1991	if (LN0->getExtensionType() == ISD::ZEXTLOAD) {
				1992	MinBits = LN0->getMemoryVT().getSizeInBits();
				1993	PreZExt = N0;
				1994	}
				1995	}
				1996
				1997	// Make sure we're not loosing bits from the constant.
				1998	if (MinBits < C1.getBitWidth() && MinBits > C1.getActiveBits()) {
				1999	EVT MinVT = EVT::getIntegerVT(*DAG.getContext(), MinBits);
				2000	if (isTypeDesirableForOp(ISD::SETCC, MinVT)) {
				2001	// Will get folded away.
				2002	SDValue Trunc = DAG.getNode(ISD::TRUNCATE, dl, MinVT, PreZExt);
				2003	SDValue C = DAG.getConstant(C1.trunc(MinBits), MinVT);
				2004	return DAG.getSetCC(dl, VT, Trunc, C, Cond);
				2005	}
				2006	}
				2007	}
				2008
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2009	// If the LHS is '(and load, const)', the RHS is 0,
				2010	// the test is for equality or unsigned, and all 1 bits of the const are
				2011	// in the same partial word, see if we can shorten the load.
				2012	if (DCI.isBeforeLegalize() &&
				2013	N0.getOpcode() == ISD::AND && C1 == 0 &&
				2014	N0.getNode()->hasOneUse() &&
				2015	isa<LoadSDNode>(N0.getOperand(0)) &&
				2016	N0.getOperand(0).getNode()->hasOneUse() &&
				2017	isa<ConstantSDNode>(N0.getOperand(1))) {
				2018	LoadSDNode *Lod = cast<LoadSDNode>(N0.getOperand(0));
Evan Cheng	347a9cb	2010-01-07 20:58:44 +0000	[diff] [blame]	2019	APInt bestMask;
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2020	unsigned bestWidth = 0, bestOffset = 0;
Evan Cheng	347a9cb	2010-01-07 20:58:44 +0000	[diff] [blame]	2021	if (!Lod->isVolatile() && Lod->isUnindexed()) {
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2022	unsigned origWidth = N0.getValueType().getSizeInBits();
Evan Cheng	347a9cb	2010-01-07 20:58:44 +0000	[diff] [blame]	2023	unsigned maskWidth = origWidth;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2024	// We can narrow (e.g.) 16-bit extending loads on 32-bit target to
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2025	// 8 bits, but have to be careful...
				2026	if (Lod->getExtensionType() != ISD::NON_EXTLOAD)
				2027	origWidth = Lod->getMemoryVT().getSizeInBits();
Evan Cheng	347a9cb	2010-01-07 20:58:44 +0000	[diff] [blame]	2028	const APInt &Mask =
				2029	cast<ConstantSDNode>(N0.getOperand(1))->getAPIntValue();
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2030	for (unsigned width = origWidth / 2; width>=8; width /= 2) {
Evan Cheng	347a9cb	2010-01-07 20:58:44 +0000	[diff] [blame]	2031	APInt newMask = APInt::getLowBitsSet(maskWidth, width);
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2032	for (unsigned offset=0; offset<origWidth/width; offset++) {
				2033	if ((newMask & Mask) == Mask) {
				2034	if (!TD->isLittleEndian())
				2035	bestOffset = (origWidth/width - offset - 1) * (width/8);
				2036	else
				2037	bestOffset = (uint64_t)offset * (width/8);
Evan Cheng	347a9cb	2010-01-07 20:58:44 +0000	[diff] [blame]	2038	bestMask = Mask.lshr(offset * (width/8) * 8);
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2039	bestWidth = width;
				2040	break;
Dale Johannesen	89217a6	2008-11-07 01:28:02 +0000	[diff] [blame]	2041	}
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2042	newMask = newMask << width;
Dale Johannesen	89217a6	2008-11-07 01:28:02 +0000	[diff] [blame]	2043	}
				2044	}
				2045	}
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2046	if (bestWidth) {
Chris Lattner	c0c7fca	2011-04-14 04:12:47 +0000	[diff] [blame]	2047	EVT newVT = EVT::getIntegerVT(*DAG.getContext(), bestWidth);
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2048	if (newVT.isRound()) {
Owen Anderson	e50ed30	2009-08-10 22:56:29 +0000	[diff] [blame]	2049	EVT PtrType = Lod->getOperand(1).getValueType();
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2050	SDValue Ptr = Lod->getBasePtr();
				2051	if (bestOffset != 0)
				2052	Ptr = DAG.getNode(ISD::ADD, dl, PtrType, Lod->getBasePtr(),
				2053	DAG.getConstant(bestOffset, PtrType));
				2054	unsigned NewAlign = MinAlign(Lod->getAlignment(), bestOffset);
				2055	SDValue NewLoad = DAG.getLoad(newVT, dl, Lod->getChain(), Ptr,
Chris Lattner	ecf42c4	2010-09-21 16:36:31 +0000	[diff] [blame]	2056	Lod->getPointerInfo().getWithOffset(bestOffset),
David Greene	1e55944	2010-02-15 17:00:31 +0000	[diff] [blame]	2057	false, false, NewAlign);
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2058	return DAG.getSetCC(dl, VT,
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2059	DAG.getNode(ISD::AND, dl, newVT, NewLoad,
Evan Cheng	347a9cb	2010-01-07 20:58:44 +0000	[diff] [blame]	2060	DAG.getConstant(bestMask.trunc(bestWidth),
				2061	newVT)),
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2062	DAG.getConstant(0LL, newVT), Cond);
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2063	}
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2064	}
				2065	}
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2066
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2067	// If the LHS is a ZERO_EXTEND, perform the comparison on the input.
				2068	if (N0.getOpcode() == ISD::ZERO_EXTEND) {
				2069	unsigned InSize = N0.getOperand(0).getValueType().getSizeInBits();
				2070
				2071	// If the comparison constant has bits in the upper part, the
				2072	// zero-extended value could never match.
				2073	if (C1.intersects(APInt::getHighBitsSet(C1.getBitWidth(),
				2074	C1.getBitWidth() - InSize))) {
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2075	switch (Cond) {
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2076	case ISD::SETUGT:
				2077	case ISD::SETUGE:
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2078	case ISD::SETEQ: return DAG.getConstant(0, VT);
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2079	case ISD::SETULT:
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2080	case ISD::SETULE:
				2081	case ISD::SETNE: return DAG.getConstant(1, VT);
				2082	case ISD::SETGT:
				2083	case ISD::SETGE:
				2084	// True if the sign bit of C1 is set.
				2085	return DAG.getConstant(C1.isNegative(), VT);
				2086	case ISD::SETLT:
				2087	case ISD::SETLE:
				2088	// True if the sign bit of C1 isn't set.
				2089	return DAG.getConstant(C1.isNonNegative(), VT);
				2090	default:
Jakob Stoklund Olesen	78d1264	2009-07-24 18:22:59 +0000	[diff] [blame]	2091	break;
				2092	}
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2093	}
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2094
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2095	// Otherwise, we can perform the comparison with the low bits.
				2096	switch (Cond) {
				2097	case ISD::SETEQ:
				2098	case ISD::SETNE:
				2099	case ISD::SETUGT:
				2100	case ISD::SETUGE:
				2101	case ISD::SETULT:
				2102	case ISD::SETULE: {
Owen Anderson	e50ed30	2009-08-10 22:56:29 +0000	[diff] [blame]	2103	EVT newVT = N0.getOperand(0).getValueType();
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2104	if (DCI.isBeforeLegalizeOps() \|\|
				2105	(isOperationLegal(ISD::SETCC, newVT) &&
				2106	getCondCodeAction(Cond, newVT)==Legal))
				2107	return DAG.getSetCC(dl, VT, N0.getOperand(0),
Jay Foad	40f8f62	2010-12-07 08:25:19 +0000	[diff] [blame]	2108	DAG.getConstant(C1.trunc(InSize), newVT),
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2109	Cond);
				2110	break;
				2111	}
				2112	default:
				2113	break; // todo, be more careful with signed comparisons
				2114	}
				2115	} else if (N0.getOpcode() == ISD::SIGN_EXTEND_INREG &&
Evan Cheng	2c755ba	2010-02-27 07:36:59 +0000	[diff] [blame]	2116	(Cond == ISD::SETEQ \|\| Cond == ISD::SETNE)) {
Owen Anderson	e50ed30	2009-08-10 22:56:29 +0000	[diff] [blame]	2117	EVT ExtSrcTy = cast<VTSDNode>(N0.getOperand(1))->getVT();
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2118	unsigned ExtSrcTyBits = ExtSrcTy.getSizeInBits();
Owen Anderson	e50ed30	2009-08-10 22:56:29 +0000	[diff] [blame]	2119	EVT ExtDstTy = N0.getValueType();
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2120	unsigned ExtDstTyBits = ExtDstTy.getSizeInBits();
				2121
Eli Friedman	ad78a88	2010-07-30 06:44:31 +0000	[diff] [blame]	2122	// If the constant doesn't fit into the number of bits for the source of
				2123	// the sign extension, it is impossible for both sides to be equal.
				2124	if (C1.getMinSignedBits() > ExtSrcTyBits)
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2125	return DAG.getConstant(Cond == ISD::SETNE, VT);
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2126
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2127	SDValue ZextOp;
Owen Anderson	e50ed30	2009-08-10 22:56:29 +0000	[diff] [blame]	2128	EVT Op0Ty = N0.getOperand(0).getValueType();
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2129	if (Op0Ty == ExtSrcTy) {
				2130	ZextOp = N0.getOperand(0);
				2131	} else {
				2132	APInt Imm = APInt::getLowBitsSet(ExtDstTyBits, ExtSrcTyBits);
				2133	ZextOp = DAG.getNode(ISD::AND, dl, Op0Ty, N0.getOperand(0),
				2134	DAG.getConstant(Imm, Op0Ty));
				2135	}
				2136	if (!DCI.isCalledByLegalizer())
				2137	DCI.AddToWorklist(ZextOp.getNode());
				2138	// Otherwise, make this a use of a zext.
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2139	return DAG.getSetCC(dl, VT, ZextOp,
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2140	DAG.getConstant(C1 & APInt::getLowBitsSet(
				2141	ExtDstTyBits,
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2142	ExtSrcTyBits),
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2143	ExtDstTy),
				2144	Cond);
				2145	} else if ((N1C->isNullValue() \|\| N1C->getAPIntValue() == 1) &&
				2146	(Cond == ISD::SETEQ \|\| Cond == ISD::SETNE)) {
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2147	// SETCC (SETCC), [0\|1], [EQ\|NE] -> SETCC
Evan Cheng	2c755ba	2010-02-27 07:36:59 +0000	[diff] [blame]	2148	if (N0.getOpcode() == ISD::SETCC &&
				2149	isTypeLegal(VT) && VT.bitsLE(N0.getValueType())) {
Evan Cheng	347a9cb	2010-01-07 20:58:44 +0000	[diff] [blame]	2150	bool TrueWhenTrue = (Cond == ISD::SETEQ) ^ (N1C->getAPIntValue() != 1);
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2151	if (TrueWhenTrue)
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2152	return DAG.getNode(ISD::TRUNCATE, dl, VT, N0);
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2153	// Invert the condition.
				2154	ISD::CondCode CC = cast<CondCodeSDNode>(N0.getOperand(2))->get();
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2155	CC = ISD::getSetCCInverse(CC,
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2156	N0.getOperand(0).getValueType().isInteger());
				2157	return DAG.getSetCC(dl, VT, N0.getOperand(0), N0.getOperand(1), CC);
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2158	}
Evan Cheng	2c755ba	2010-02-27 07:36:59 +0000	[diff] [blame]	2159
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2160	if ((N0.getOpcode() == ISD::XOR \|\|
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2161	(N0.getOpcode() == ISD::AND &&
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2162	N0.getOperand(0).getOpcode() == ISD::XOR &&
				2163	N0.getOperand(1) == N0.getOperand(0).getOperand(1))) &&
				2164	isa<ConstantSDNode>(N0.getOperand(1)) &&
				2165	cast<ConstantSDNode>(N0.getOperand(1))->getAPIntValue() == 1) {
				2166	// If this is (X^1) == 0/1, swap the RHS and eliminate the xor. We
				2167	// can only do this if the top bits are known zero.
				2168	unsigned BitWidth = N0.getValueSizeInBits();
				2169	if (DAG.MaskedValueIsZero(N0,
				2170	APInt::getHighBitsSet(BitWidth,
				2171	BitWidth-1))) {
				2172	// Okay, get the un-inverted input value.
				2173	SDValue Val;
				2174	if (N0.getOpcode() == ISD::XOR)
				2175	Val = N0.getOperand(0);
				2176	else {
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2177	assert(N0.getOpcode() == ISD::AND &&
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2178	N0.getOperand(0).getOpcode() == ISD::XOR);
				2179	// ((X^1)&1)^1 -> X & 1
				2180	Val = DAG.getNode(ISD::AND, dl, N0.getValueType(),
				2181	N0.getOperand(0).getOperand(0),
				2182	N0.getOperand(1));
				2183	}
Evan Cheng	2c755ba	2010-02-27 07:36:59 +0000	[diff] [blame]	2184
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2185	return DAG.getSetCC(dl, VT, Val, N1,
				2186	Cond == ISD::SETEQ ? ISD::SETNE : ISD::SETEQ);
				2187	}
Evan Cheng	2c755ba	2010-02-27 07:36:59 +0000	[diff] [blame]	2188	} else if (N1C->getAPIntValue() == 1 &&
				2189	(VT == MVT::i1 \|\|
				2190	getBooleanContents() == ZeroOrOneBooleanContent)) {
				2191	SDValue Op0 = N0;
				2192	if (Op0.getOpcode() == ISD::TRUNCATE)
				2193	Op0 = Op0.getOperand(0);
				2194
				2195	if ((Op0.getOpcode() == ISD::XOR) &&
				2196	Op0.getOperand(0).getOpcode() == ISD::SETCC &&
				2197	Op0.getOperand(1).getOpcode() == ISD::SETCC) {
				2198	// (xor (setcc), (setcc)) == / != 1 -> (setcc) != / == (setcc)
				2199	Cond = (Cond == ISD::SETEQ) ? ISD::SETNE : ISD::SETEQ;
				2200	return DAG.getSetCC(dl, VT, Op0.getOperand(0), Op0.getOperand(1),
				2201	Cond);
				2202	} else if (Op0.getOpcode() == ISD::AND &&
				2203	isa<ConstantSDNode>(Op0.getOperand(1)) &&
				2204	cast<ConstantSDNode>(Op0.getOperand(1))->getAPIntValue() == 1) {
				2205	// If this is (X&1) == / != 1, normalize it to (X&1) != / == 0.
Anton Korobeynikov	17458a7	2010-05-01 12:52:34 +0000	[diff] [blame]	2206	if (Op0.getValueType().bitsGT(VT))
Evan Cheng	2c755ba	2010-02-27 07:36:59 +0000	[diff] [blame]	2207	Op0 = DAG.getNode(ISD::AND, dl, VT,
				2208	DAG.getNode(ISD::TRUNCATE, dl, VT, Op0.getOperand(0)),
				2209	DAG.getConstant(1, VT));
Anton Korobeynikov	17458a7	2010-05-01 12:52:34 +0000	[diff] [blame]	2210	else if (Op0.getValueType().bitsLT(VT))
				2211	Op0 = DAG.getNode(ISD::AND, dl, VT,
				2212	DAG.getNode(ISD::ANY_EXTEND, dl, VT, Op0.getOperand(0)),
				2213	DAG.getConstant(1, VT));
				2214
Evan Cheng	2c755ba	2010-02-27 07:36:59 +0000	[diff] [blame]	2215	return DAG.getSetCC(dl, VT, Op0,
				2216	DAG.getConstant(0, Op0.getValueType()),
				2217	Cond == ISD::SETEQ ? ISD::SETNE : ISD::SETEQ);
				2218	}
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2219	}
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2220	}
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2221
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2222	APInt MinVal, MaxVal;
				2223	unsigned OperandBitSize = N1C->getValueType(0).getSizeInBits();
				2224	if (ISD::isSignedIntSetCC(Cond)) {
				2225	MinVal = APInt::getSignedMinValue(OperandBitSize);
				2226	MaxVal = APInt::getSignedMaxValue(OperandBitSize);
				2227	} else {
				2228	MinVal = APInt::getMinValue(OperandBitSize);
				2229	MaxVal = APInt::getMaxValue(OperandBitSize);
				2230	}
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2231
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2232	// Canonicalize GE/LE comparisons to use GT/LT comparisons.
				2233	if (Cond == ISD::SETGE \|\| Cond == ISD::SETUGE) {
				2234	if (C1 == MinVal) return DAG.getConstant(1, VT); // X >= MIN --> true
				2235	// X >= C0 --> X > (C0-1)
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2236	return DAG.getSetCC(dl, VT, N0,
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2237	DAG.getConstant(C1-1, N1.getValueType()),
				2238	(Cond == ISD::SETGE) ? ISD::SETGT : ISD::SETUGT);
				2239	}
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2240
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2241	if (Cond == ISD::SETLE \|\| Cond == ISD::SETULE) {
				2242	if (C1 == MaxVal) return DAG.getConstant(1, VT); // X <= MAX --> true
				2243	// X <= C0 --> X < (C0+1)
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2244	return DAG.getSetCC(dl, VT, N0,
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2245	DAG.getConstant(C1+1, N1.getValueType()),
				2246	(Cond == ISD::SETLE) ? ISD::SETLT : ISD::SETULT);
				2247	}
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2248
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2249	if ((Cond == ISD::SETLT \|\| Cond == ISD::SETULT) && C1 == MinVal)
				2250	return DAG.getConstant(0, VT); // X < MIN --> false
				2251	if ((Cond == ISD::SETGE \|\| Cond == ISD::SETUGE) && C1 == MinVal)
				2252	return DAG.getConstant(1, VT); // X >= MIN --> true
				2253	if ((Cond == ISD::SETGT \|\| Cond == ISD::SETUGT) && C1 == MaxVal)
				2254	return DAG.getConstant(0, VT); // X > MAX --> false
				2255	if ((Cond == ISD::SETLE \|\| Cond == ISD::SETULE) && C1 == MaxVal)
				2256	return DAG.getConstant(1, VT); // X <= MAX --> true
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2257
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2258	// Canonicalize setgt X, Min --> setne X, Min
				2259	if ((Cond == ISD::SETGT \|\| Cond == ISD::SETUGT) && C1 == MinVal)
				2260	return DAG.getSetCC(dl, VT, N0, N1, ISD::SETNE);
				2261	// Canonicalize setlt X, Max --> setne X, Max
				2262	if ((Cond == ISD::SETLT \|\| Cond == ISD::SETULT) && C1 == MaxVal)
				2263	return DAG.getSetCC(dl, VT, N0, N1, ISD::SETNE);
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2264
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2265	// If we have setult X, 1, turn it into seteq X, 0
				2266	if ((Cond == ISD::SETLT \|\| Cond == ISD::SETULT) && C1 == MinVal+1)
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2267	return DAG.getSetCC(dl, VT, N0,
				2268	DAG.getConstant(MinVal, N0.getValueType()),
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2269	ISD::SETEQ);
				2270	// If we have setugt X, Max-1, turn it into seteq X, Max
				2271	else if ((Cond == ISD::SETGT \|\| Cond == ISD::SETUGT) && C1 == MaxVal-1)
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2272	return DAG.getSetCC(dl, VT, N0,
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2273	DAG.getConstant(MaxVal, N0.getValueType()),
				2274	ISD::SETEQ);
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2275
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2276	// If we have "setcc X, C0", check to see if we can shrink the immediate
				2277	// by changing cc.
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2278
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2279	// SETUGT X, SINTMAX -> SETLT X, 0
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2280	if (Cond == ISD::SETUGT &&
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2281	C1 == APInt::getSignedMaxValue(OperandBitSize))
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2282	return DAG.getSetCC(dl, VT, N0,
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2283	DAG.getConstant(0, N1.getValueType()),
				2284	ISD::SETLT);
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2285
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2286	// SETULT X, SINTMIN -> SETGT X, -1
				2287	if (Cond == ISD::SETULT &&
				2288	C1 == APInt::getSignedMinValue(OperandBitSize)) {
				2289	SDValue ConstMinusOne =
				2290	DAG.getConstant(APInt::getAllOnesValue(OperandBitSize),
				2291	N1.getValueType());
				2292	return DAG.getSetCC(dl, VT, N0, ConstMinusOne, ISD::SETGT);
				2293	}
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2294
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2295	// Fold bit comparisons when we can.
				2296	if ((Cond == ISD::SETEQ \|\| Cond == ISD::SETNE) &&
Evan Cheng	d40d03e	2010-01-06 19:38:29 +0000	[diff] [blame]	2297	(VT == N0.getValueType() \|\|
				2298	(isTypeLegal(VT) && VT.bitsLE(N0.getValueType()))) &&
				2299	N0.getOpcode() == ISD::AND)
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2300	if (ConstantSDNode *AndRHS =
				2301	dyn_cast<ConstantSDNode>(N0.getOperand(1))) {
Owen Anderson	e50ed30	2009-08-10 22:56:29 +0000	[diff] [blame]	2302	EVT ShiftTy = DCI.isBeforeLegalize() ?
Owen Anderson	95771af	2011-02-25 21:41:48 +0000	[diff] [blame]	2303	getPointerTy() : getShiftAmountTy(N0.getValueType());
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2304	if (Cond == ISD::SETNE && C1 == 0) {// (X & 8) != 0 --> (X & 8) >> 3
				2305	// Perform the xform if the AND RHS is a single bit.
Evan Cheng	347a9cb	2010-01-07 20:58:44 +0000	[diff] [blame]	2306	if (AndRHS->getAPIntValue().isPowerOf2()) {
Evan Cheng	d40d03e	2010-01-06 19:38:29 +0000	[diff] [blame]	2307	return DAG.getNode(ISD::TRUNCATE, dl, VT,
				2308	DAG.getNode(ISD::SRL, dl, N0.getValueType(), N0,
Evan Cheng	347a9cb	2010-01-07 20:58:44 +0000	[diff] [blame]	2309	DAG.getConstant(AndRHS->getAPIntValue().logBase2(), ShiftTy)));
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2310	}
Evan Cheng	347a9cb	2010-01-07 20:58:44 +0000	[diff] [blame]	2311	} else if (Cond == ISD::SETEQ && C1 == AndRHS->getAPIntValue()) {
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2312	// (X & 8) == 8 --> (X & 8) >> 3
				2313	// Perform the xform if C1 is a single bit.
				2314	if (C1.isPowerOf2()) {
Evan Cheng	d40d03e	2010-01-06 19:38:29 +0000	[diff] [blame]	2315	return DAG.getNode(ISD::TRUNCATE, dl, VT,
				2316	DAG.getNode(ISD::SRL, dl, N0.getValueType(), N0,
				2317	DAG.getConstant(C1.logBase2(), ShiftTy)));
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2318	}
				2319	}
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2320	}
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2321	}
				2322
Gabor Greif	ba36cb5	2008-08-28 21:40:38 +0000	[diff] [blame]	2323	if (isa<ConstantFPSDNode>(N0.getNode())) {
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2324	// Constant fold or commute setcc.
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	2325	SDValue O = DAG.FoldSetCC(VT, N0, N1, Cond, dl);
Gabor Greif	ba36cb5	2008-08-28 21:40:38 +0000	[diff] [blame]	2326	if (O.getNode()) return O;
				2327	} else if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1.getNode())) {
Chris Lattner	63079f0	2007-12-29 08:37:08 +0000	[diff] [blame]	2328	// If the RHS of an FP comparison is a constant, simplify it away in
				2329	// some cases.
				2330	if (CFP->getValueAPF().isNaN()) {
				2331	// If an operand is known to be a nan, we can fold it.
				2332	switch (ISD::getUnorderedFlavor(Cond)) {
Torok Edwin	c23197a	2009-07-14 16:55:14 +0000	[diff] [blame]	2333	default: llvm_unreachable("Unknown flavor!");
Chris Lattner	63079f0	2007-12-29 08:37:08 +0000	[diff] [blame]	2334	case 0: // Known false.
				2335	return DAG.getConstant(0, VT);
				2336	case 1: // Known true.
				2337	return DAG.getConstant(1, VT);
Chris Lattner	1c3e1e2	2007-12-30 21:21:10 +0000	[diff] [blame]	2338	case 2: // Undefined.
Dale Johannesen	e8d7230	2009-02-06 23:05:02 +0000	[diff] [blame]	2339	return DAG.getUNDEF(VT);
Chris Lattner	63079f0	2007-12-29 08:37:08 +0000	[diff] [blame]	2340	}
				2341	}
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2342
Chris Lattner	63079f0	2007-12-29 08:37:08 +0000	[diff] [blame]	2343	// Otherwise, we know the RHS is not a NaN. Simplify the node to drop the
				2344	// constant if knowing that the operand is non-nan is enough. We prefer to
				2345	// have SETO(x,x) instead of SETO(x, 0.0) because this avoids having to
				2346	// materialize 0.0.
				2347	if (Cond == ISD::SETO \|\| Cond == ISD::SETUO)
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	2348	return DAG.getSetCC(dl, VT, N0, N0, Cond);
Dan Gohman	11eab02	2009-09-26 15:24:17 +0000	[diff] [blame]	2349
				2350	// If the condition is not legal, see if we can find an equivalent one
				2351	// which is legal.
				2352	if (!isCondCodeLegal(Cond, N0.getValueType())) {
				2353	// If the comparison was an awkward floating-point == or != and one of
				2354	// the comparison operands is infinity or negative infinity, convert the
				2355	// condition to a less-awkward <= or >=.
				2356	if (CFP->getValueAPF().isInfinity()) {
				2357	if (CFP->getValueAPF().isNegative()) {
				2358	if (Cond == ISD::SETOEQ &&
				2359	isCondCodeLegal(ISD::SETOLE, N0.getValueType()))
				2360	return DAG.getSetCC(dl, VT, N0, N1, ISD::SETOLE);
				2361	if (Cond == ISD::SETUEQ &&
				2362	isCondCodeLegal(ISD::SETOLE, N0.getValueType()))
				2363	return DAG.getSetCC(dl, VT, N0, N1, ISD::SETULE);
				2364	if (Cond == ISD::SETUNE &&
				2365	isCondCodeLegal(ISD::SETUGT, N0.getValueType()))
				2366	return DAG.getSetCC(dl, VT, N0, N1, ISD::SETUGT);
				2367	if (Cond == ISD::SETONE &&
				2368	isCondCodeLegal(ISD::SETUGT, N0.getValueType()))
				2369	return DAG.getSetCC(dl, VT, N0, N1, ISD::SETOGT);
				2370	} else {
				2371	if (Cond == ISD::SETOEQ &&
				2372	isCondCodeLegal(ISD::SETOGE, N0.getValueType()))
				2373	return DAG.getSetCC(dl, VT, N0, N1, ISD::SETOGE);
				2374	if (Cond == ISD::SETUEQ &&
				2375	isCondCodeLegal(ISD::SETOGE, N0.getValueType()))
				2376	return DAG.getSetCC(dl, VT, N0, N1, ISD::SETUGE);
				2377	if (Cond == ISD::SETUNE &&
				2378	isCondCodeLegal(ISD::SETULT, N0.getValueType()))
				2379	return DAG.getSetCC(dl, VT, N0, N1, ISD::SETULT);
				2380	if (Cond == ISD::SETONE &&
				2381	isCondCodeLegal(ISD::SETULT, N0.getValueType()))
				2382	return DAG.getSetCC(dl, VT, N0, N1, ISD::SETOLT);
				2383	}
				2384	}
				2385	}
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2386	}
				2387
				2388	if (N0 == N1) {
				2389	// We can always fold X == X for integer setcc's.
Duncan Sands	83ec4b6	2008-06-06 12:08:01 +0000	[diff] [blame]	2390	if (N0.getValueType().isInteger())
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2391	return DAG.getConstant(ISD::isTrueWhenEqual(Cond), VT);
				2392	unsigned UOF = ISD::getUnorderedFlavor(Cond);
				2393	if (UOF == 2) // FP operators that are undefined on NaNs.
				2394	return DAG.getConstant(ISD::isTrueWhenEqual(Cond), VT);
				2395	if (UOF == unsigned(ISD::isTrueWhenEqual(Cond)))
				2396	return DAG.getConstant(UOF, VT);
				2397	// Otherwise, we can't fold it. However, we can simplify it to SETUO/SETO
				2398	// if it is not already.
				2399	ISD::CondCode NewCond = UOF == 0 ? ISD::SETO : ISD::SETUO;
				2400	if (NewCond != Cond)
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	2401	return DAG.getSetCC(dl, VT, N0, N1, NewCond);
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2402	}
				2403
				2404	if ((Cond == ISD::SETEQ \|\| Cond == ISD::SETNE) &&
Duncan Sands	83ec4b6	2008-06-06 12:08:01 +0000	[diff] [blame]	2405	N0.getValueType().isInteger()) {
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2406	if (N0.getOpcode() == ISD::ADD \|\| N0.getOpcode() == ISD::SUB \|\|
				2407	N0.getOpcode() == ISD::XOR) {
				2408	// Simplify (X+Y) == (X+Z) --> Y == Z
				2409	if (N0.getOpcode() == N1.getOpcode()) {
				2410	if (N0.getOperand(0) == N1.getOperand(0))
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	2411	return DAG.getSetCC(dl, VT, N0.getOperand(1), N1.getOperand(1), Cond);
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2412	if (N0.getOperand(1) == N1.getOperand(1))
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	2413	return DAG.getSetCC(dl, VT, N0.getOperand(0), N1.getOperand(0), Cond);
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2414	if (DAG.isCommutativeBinOp(N0.getOpcode())) {
				2415	// If X op Y == Y op X, try other combinations.
				2416	if (N0.getOperand(0) == N1.getOperand(1))
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2417	return DAG.getSetCC(dl, VT, N0.getOperand(1), N1.getOperand(0),
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	2418	Cond);
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2419	if (N0.getOperand(1) == N1.getOperand(0))
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2420	return DAG.getSetCC(dl, VT, N0.getOperand(0), N1.getOperand(1),
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	2421	Cond);
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2422	}
				2423	}
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2424
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2425	if (ConstantSDNode *RHSC = dyn_cast<ConstantSDNode>(N1)) {
				2426	if (ConstantSDNode *LHSR = dyn_cast<ConstantSDNode>(N0.getOperand(1))) {
				2427	// Turn (X+C1) == C2 --> X == C2-C1
Gabor Greif	ba36cb5	2008-08-28 21:40:38 +0000	[diff] [blame]	2428	if (N0.getOpcode() == ISD::ADD && N0.getNode()->hasOneUse()) {
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	2429	return DAG.getSetCC(dl, VT, N0.getOperand(0),
Dan Gohman	f5aeb1a	2008-09-12 16:56:44 +0000	[diff] [blame]	2430	DAG.getConstant(RHSC->getAPIntValue()-
				2431	LHSR->getAPIntValue(),
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2432	N0.getValueType()), Cond);
				2433	}
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2434
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2435	// Turn (X^C1) == C2 into X == C1^C2 iff X&~C1 = 0.
				2436	if (N0.getOpcode() == ISD::XOR)
				2437	// If we know that all of the inverted bits are zero, don't bother
				2438	// performing the inversion.
Dan Gohman	2e68b6f	2008-02-25 21:11:39 +0000	[diff] [blame]	2439	if (DAG.MaskedValueIsZero(N0.getOperand(0), ~LHSR->getAPIntValue()))
				2440	return
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	2441	DAG.getSetCC(dl, VT, N0.getOperand(0),
Dan Gohman	2e68b6f	2008-02-25 21:11:39 +0000	[diff] [blame]	2442	DAG.getConstant(LHSR->getAPIntValue() ^
				2443	RHSC->getAPIntValue(),
				2444	N0.getValueType()),
				2445	Cond);
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2446	}
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2447
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2448	// Turn (C1-X) == C2 --> X == C1-C2
				2449	if (ConstantSDNode *SUBC = dyn_cast<ConstantSDNode>(N0.getOperand(0))) {
Gabor Greif	ba36cb5	2008-08-28 21:40:38 +0000	[diff] [blame]	2450	if (N0.getOpcode() == ISD::SUB && N0.getNode()->hasOneUse()) {
Dan Gohman	2e68b6f	2008-02-25 21:11:39 +0000	[diff] [blame]	2451	return
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	2452	DAG.getSetCC(dl, VT, N0.getOperand(1),
Dan Gohman	2e68b6f	2008-02-25 21:11:39 +0000	[diff] [blame]	2453	DAG.getConstant(SUBC->getAPIntValue() -
				2454	RHSC->getAPIntValue(),
				2455	N0.getValueType()),
				2456	Cond);
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2457	}
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2458	}
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2459	}
				2460
				2461	// Simplify (X+Z) == X --> Z == 0
				2462	if (N0.getOperand(0) == N1)
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	2463	return DAG.getSetCC(dl, VT, N0.getOperand(1),
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2464	DAG.getConstant(0, N0.getValueType()), Cond);
				2465	if (N0.getOperand(1) == N1) {
				2466	if (DAG.isCommutativeBinOp(N0.getOpcode()))
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	2467	return DAG.getSetCC(dl, VT, N0.getOperand(0),
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2468	DAG.getConstant(0, N0.getValueType()), Cond);
Gabor Greif	ba36cb5	2008-08-28 21:40:38 +0000	[diff] [blame]	2469	else if (N0.getNode()->hasOneUse()) {
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2470	assert(N0.getOpcode() == ISD::SUB && "Unexpected operation!");
				2471	// (Z-X) == X --> Z == X<<1
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	2472	SDValue SH = DAG.getNode(ISD::SHL, dl, N1.getValueType(),
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2473	N1,
Owen Anderson	95771af	2011-02-25 21:41:48 +0000	[diff] [blame]	2474	DAG.getConstant(1, getShiftAmountTy(N1.getValueType())));
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2475	if (!DCI.isCalledByLegalizer())
Gabor Greif	ba36cb5	2008-08-28 21:40:38 +0000	[diff] [blame]	2476	DCI.AddToWorklist(SH.getNode());
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	2477	return DAG.getSetCC(dl, VT, N0.getOperand(0), SH, Cond);
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2478	}
				2479	}
				2480	}
				2481
				2482	if (N1.getOpcode() == ISD::ADD \|\| N1.getOpcode() == ISD::SUB \|\|
				2483	N1.getOpcode() == ISD::XOR) {
				2484	// Simplify X == (X+Z) --> Z == 0
				2485	if (N1.getOperand(0) == N0) {
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	2486	return DAG.getSetCC(dl, VT, N1.getOperand(1),
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2487	DAG.getConstant(0, N1.getValueType()), Cond);
				2488	} else if (N1.getOperand(1) == N0) {
				2489	if (DAG.isCommutativeBinOp(N1.getOpcode())) {
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	2490	return DAG.getSetCC(dl, VT, N1.getOperand(0),
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2491	DAG.getConstant(0, N1.getValueType()), Cond);
Gabor Greif	ba36cb5	2008-08-28 21:40:38 +0000	[diff] [blame]	2492	} else if (N1.getNode()->hasOneUse()) {
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2493	assert(N1.getOpcode() == ISD::SUB && "Unexpected operation!");
				2494	// X == (Z-X) --> X<<1 == Z
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2495	SDValue SH = DAG.getNode(ISD::SHL, dl, N1.getValueType(), N0,
Owen Anderson	95771af	2011-02-25 21:41:48 +0000	[diff] [blame]	2496	DAG.getConstant(1, getShiftAmountTy(N0.getValueType())));
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2497	if (!DCI.isCalledByLegalizer())
Gabor Greif	ba36cb5	2008-08-28 21:40:38 +0000	[diff] [blame]	2498	DCI.AddToWorklist(SH.getNode());
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	2499	return DAG.getSetCC(dl, VT, SH, N1.getOperand(0), Cond);
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2500	}
				2501	}
				2502	}
Dan Gohman	e5af2d3	2009-01-29 01:59:02 +0000	[diff] [blame]	2503
Dan Gohman	2c65c3d	2009-01-29 16:18:12 +0000	[diff] [blame]	2504	// Simplify x&y == y to x&y != 0 if y has exactly one bit set.
Dale Johannesen	85b0ede	2009-02-11 19:19:41 +0000	[diff] [blame]	2505	// Note that where y is variable and is known to have at most
				2506	// one bit set (for example, if it is z&1) we cannot do this;
				2507	// the expressions are not equivalent when y==0.
Dan Gohman	e5af2d3	2009-01-29 01:59:02 +0000	[diff] [blame]	2508	if (N0.getOpcode() == ISD::AND)
				2509	if (N0.getOperand(0) == N1 \|\| N0.getOperand(1) == N1) {
Dale Johannesen	85b0ede	2009-02-11 19:19:41 +0000	[diff] [blame]	2510	if (ValueHasExactlyOneBitSet(N1, DAG)) {
Dan Gohman	e5af2d3	2009-01-29 01:59:02 +0000	[diff] [blame]	2511	Cond = ISD::getSetCCInverse(Cond, /isInteger=/true);
				2512	SDValue Zero = DAG.getConstant(0, N1.getValueType());
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	2513	return DAG.getSetCC(dl, VT, N0, Zero, Cond);
Dan Gohman	e5af2d3	2009-01-29 01:59:02 +0000	[diff] [blame]	2514	}
				2515	}
				2516	if (N1.getOpcode() == ISD::AND)
				2517	if (N1.getOperand(0) == N0 \|\| N1.getOperand(1) == N0) {
Dale Johannesen	85b0ede	2009-02-11 19:19:41 +0000	[diff] [blame]	2518	if (ValueHasExactlyOneBitSet(N0, DAG)) {
Dan Gohman	e5af2d3	2009-01-29 01:59:02 +0000	[diff] [blame]	2519	Cond = ISD::getSetCCInverse(Cond, /isInteger=/true);
				2520	SDValue Zero = DAG.getConstant(0, N0.getValueType());
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	2521	return DAG.getSetCC(dl, VT, N1, Zero, Cond);
Dan Gohman	e5af2d3	2009-01-29 01:59:02 +0000	[diff] [blame]	2522	}
				2523	}
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2524	}
				2525
				2526	// Fold away ALL boolean setcc's.
Dan Gohman	475871a	2008-07-27 21:46:04 +0000	[diff] [blame]	2527	SDValue Temp;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	2528	if (N0.getValueType() == MVT::i1 && foldBooleans) {
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2529	switch (Cond) {
Torok Edwin	c23197a	2009-07-14 16:55:14 +0000	[diff] [blame]	2530	default: llvm_unreachable("Unknown integer setcc!");
Bob Wilson	4c24546	2009-01-22 17:39:32 +0000	[diff] [blame]	2531	case ISD::SETEQ: // X == Y -> ~(X^Y)
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	2532	Temp = DAG.getNode(ISD::XOR, dl, MVT::i1, N0, N1);
				2533	N0 = DAG.getNOT(dl, Temp, MVT::i1);
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2534	if (!DCI.isCalledByLegalizer())
Gabor Greif	ba36cb5	2008-08-28 21:40:38 +0000	[diff] [blame]	2535	DCI.AddToWorklist(Temp.getNode());
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2536	break;
				2537	case ISD::SETNE: // X != Y --> (X^Y)
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	2538	N0 = DAG.getNode(ISD::XOR, dl, MVT::i1, N0, N1);
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2539	break;
Bob Wilson	4c24546	2009-01-22 17:39:32 +0000	[diff] [blame]	2540	case ISD::SETGT: // X >s Y --> X == 0 & Y == 1 --> ~X & Y
				2541	case ISD::SETULT: // X <u Y --> X == 0 & Y == 1 --> ~X & Y
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	2542	Temp = DAG.getNOT(dl, N0, MVT::i1);
				2543	N0 = DAG.getNode(ISD::AND, dl, MVT::i1, N1, Temp);
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2544	if (!DCI.isCalledByLegalizer())
Gabor Greif	ba36cb5	2008-08-28 21:40:38 +0000	[diff] [blame]	2545	DCI.AddToWorklist(Temp.getNode());
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2546	break;
Bob Wilson	4c24546	2009-01-22 17:39:32 +0000	[diff] [blame]	2547	case ISD::SETLT: // X <s Y --> X == 1 & Y == 0 --> ~Y & X
				2548	case ISD::SETUGT: // X >u Y --> X == 1 & Y == 0 --> ~Y & X
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	2549	Temp = DAG.getNOT(dl, N1, MVT::i1);
				2550	N0 = DAG.getNode(ISD::AND, dl, MVT::i1, N0, Temp);
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2551	if (!DCI.isCalledByLegalizer())
Gabor Greif	ba36cb5	2008-08-28 21:40:38 +0000	[diff] [blame]	2552	DCI.AddToWorklist(Temp.getNode());
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2553	break;
Bob Wilson	4c24546	2009-01-22 17:39:32 +0000	[diff] [blame]	2554	case ISD::SETULE: // X <=u Y --> X == 0 \| Y == 1 --> ~X \| Y
				2555	case ISD::SETGE: // X >=s Y --> X == 0 \| Y == 1 --> ~X \| Y
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	2556	Temp = DAG.getNOT(dl, N0, MVT::i1);
				2557	N0 = DAG.getNode(ISD::OR, dl, MVT::i1, N1, Temp);
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2558	if (!DCI.isCalledByLegalizer())
Gabor Greif	ba36cb5	2008-08-28 21:40:38 +0000	[diff] [blame]	2559	DCI.AddToWorklist(Temp.getNode());
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2560	break;
Bob Wilson	4c24546	2009-01-22 17:39:32 +0000	[diff] [blame]	2561	case ISD::SETUGE: // X >=u Y --> X == 1 \| Y == 0 --> ~Y \| X
				2562	case ISD::SETLE: // X <=s Y --> X == 1 \| Y == 0 --> ~Y \| X
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	2563	Temp = DAG.getNOT(dl, N1, MVT::i1);
				2564	N0 = DAG.getNode(ISD::OR, dl, MVT::i1, N0, Temp);
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2565	break;
				2566	}
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	2567	if (VT != MVT::i1) {
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2568	if (!DCI.isCalledByLegalizer())
Gabor Greif	ba36cb5	2008-08-28 21:40:38 +0000	[diff] [blame]	2569	DCI.AddToWorklist(N0.getNode());
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2570	// FIXME: If running after legalize, we probably can't do this.
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	2571	N0 = DAG.getNode(ISD::ZERO_EXTEND, dl, VT, N0);
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2572	}
				2573	return N0;
				2574	}
				2575
				2576	// Could not fold it.
Dan Gohman	475871a	2008-07-27 21:46:04 +0000	[diff] [blame]	2577	return SDValue();
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2578	}
				2579
Evan Cheng	ad4196b	2008-05-12 19:56:52 +0000	[diff] [blame]	2580	/// isGAPlusOffset - Returns true (and the GlobalValue and the offset) if the
				2581	/// node is a GlobalAddress + offset.
Chris Lattner	0a9481f	2011-02-13 22:25:43 +0000	[diff] [blame]	2582	bool TargetLowering::isGAPlusOffset(SDNode N, const GlobalValue &GA,
Evan Cheng	ad4196b	2008-05-12 19:56:52 +0000	[diff] [blame]	2583	int64_t &Offset) const {
				2584	if (isa<GlobalAddressSDNode>(N)) {
Dan Gohman	9ea3f56	2008-06-09 22:05:52 +0000	[diff] [blame]	2585	GlobalAddressSDNode *GASD = cast<GlobalAddressSDNode>(N);
				2586	GA = GASD->getGlobal();
				2587	Offset += GASD->getOffset();
Evan Cheng	ad4196b	2008-05-12 19:56:52 +0000	[diff] [blame]	2588	return true;
				2589	}
				2590
				2591	if (N->getOpcode() == ISD::ADD) {
Dan Gohman	475871a	2008-07-27 21:46:04 +0000	[diff] [blame]	2592	SDValue N1 = N->getOperand(0);
				2593	SDValue N2 = N->getOperand(1);
Gabor Greif	ba36cb5	2008-08-28 21:40:38 +0000	[diff] [blame]	2594	if (isGAPlusOffset(N1.getNode(), GA, Offset)) {
Evan Cheng	ad4196b	2008-05-12 19:56:52 +0000	[diff] [blame]	2595	ConstantSDNode *V = dyn_cast<ConstantSDNode>(N2);
				2596	if (V) {
Dan Gohman	7810bfe	2008-09-26 21:54:37 +0000	[diff] [blame]	2597	Offset += V->getSExtValue();
Evan Cheng	ad4196b	2008-05-12 19:56:52 +0000	[diff] [blame]	2598	return true;
				2599	}
Gabor Greif	ba36cb5	2008-08-28 21:40:38 +0000	[diff] [blame]	2600	} else if (isGAPlusOffset(N2.getNode(), GA, Offset)) {
Evan Cheng	ad4196b	2008-05-12 19:56:52 +0000	[diff] [blame]	2601	ConstantSDNode *V = dyn_cast<ConstantSDNode>(N1);
				2602	if (V) {
Dan Gohman	7810bfe	2008-09-26 21:54:37 +0000	[diff] [blame]	2603	Offset += V->getSExtValue();
Evan Cheng	ad4196b	2008-05-12 19:56:52 +0000	[diff] [blame]	2604	return true;
				2605	}
				2606	}
				2607	}
Owen Anderson	95771af	2011-02-25 21:41:48 +0000	[diff] [blame]	2608
Evan Cheng	ad4196b	2008-05-12 19:56:52 +0000	[diff] [blame]	2609	return false;
				2610	}
				2611
				2612
Dan Gohman	475871a	2008-07-27 21:46:04 +0000	[diff] [blame]	2613	SDValue TargetLowering::
Chris Lattner	00ffed0	2006-03-01 04:52:55 +0000	[diff] [blame]	2614	PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const {
				2615	// Default implementation: no optimization.
Dan Gohman	475871a	2008-07-27 21:46:04 +0000	[diff] [blame]	2616	return SDValue();
Chris Lattner	00ffed0	2006-03-01 04:52:55 +0000	[diff] [blame]	2617	}
				2618
Chris Lattner	eb8146b	2006-02-04 02:13:02 +0000	[diff] [blame]	2619	//===----------------------------------------------------------------------===//
				2620	// Inline Assembler Implementation Methods
				2621	//===----------------------------------------------------------------------===//
				2622
Chris Lattner	4376fea	2008-04-27 00:09:47 +0000	[diff] [blame]	2623
Chris Lattner	eb8146b	2006-02-04 02:13:02 +0000	[diff] [blame]	2624	TargetLowering::ConstraintType
Chris Lattner	4234f57	2007-03-25 02:14:49 +0000	[diff] [blame]	2625	TargetLowering::getConstraintType(const std::string &Constraint) const {
Chris Lattner	4234f57	2007-03-25 02:14:49 +0000	[diff] [blame]	2626	if (Constraint.size() == 1) {
				2627	switch (Constraint[0]) {
				2628	default: break;
				2629	case 'r': return C_RegisterClass;
				2630	case 'm': // memory
				2631	case 'o': // offsetable
				2632	case 'V': // not offsetable
				2633	return C_Memory;
				2634	case 'i': // Simple Integer or Relocatable Constant
				2635	case 'n': // Simple Integer
John Thompson	67aff16	2010-09-21 22:04:54 +0000	[diff] [blame]	2636	case 'E': // Floating Point Constant
				2637	case 'F': // Floating Point Constant
Chris Lattner	4234f57	2007-03-25 02:14:49 +0000	[diff] [blame]	2638	case 's': // Relocatable Constant
John Thompson	67aff16	2010-09-21 22:04:54 +0000	[diff] [blame]	2639	case 'p': // Address.
Chris Lattner	c13dd1c	2007-03-25 04:35:41 +0000	[diff] [blame]	2640	case 'X': // Allow ANY value.
Chris Lattner	4234f57	2007-03-25 02:14:49 +0000	[diff] [blame]	2641	case 'I': // Target registers.
				2642	case 'J':
				2643	case 'K':
				2644	case 'L':
				2645	case 'M':
				2646	case 'N':
				2647	case 'O':
				2648	case 'P':
John Thompson	67aff16	2010-09-21 22:04:54 +0000	[diff] [blame]	2649	case '<':
				2650	case '>':
Chris Lattner	4234f57	2007-03-25 02:14:49 +0000	[diff] [blame]	2651	return C_Other;
				2652	}
Chris Lattner	eb8146b	2006-02-04 02:13:02 +0000	[diff] [blame]	2653	}
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2654
				2655	if (Constraint.size() > 1 && Constraint[0] == '{' &&
Chris Lattner	065421f	2007-03-25 02:18:14 +0000	[diff] [blame]	2656	Constraint[Constraint.size()-1] == '}')
				2657	return C_Register;
Chris Lattner	4234f57	2007-03-25 02:14:49 +0000	[diff] [blame]	2658	return C_Unknown;
Chris Lattner	eb8146b	2006-02-04 02:13:02 +0000	[diff] [blame]	2659	}
				2660
Dale Johannesen	ba2a0b9	2008-01-29 02:21:21 +0000	[diff] [blame]	2661	/// LowerXConstraint - try to replace an X constraint, which matches anything,
				2662	/// with another that has more specific requirements based on the type of the
				2663	/// corresponding operand.
Owen Anderson	e50ed30	2009-08-10 22:56:29 +0000	[diff] [blame]	2664	const char *TargetLowering::LowerXConstraint(EVT ConstraintVT) const{
Duncan Sands	83ec4b6	2008-06-06 12:08:01 +0000	[diff] [blame]	2665	if (ConstraintVT.isInteger())
Chris Lattner	5e76423	2008-04-26 23:02:14 +0000	[diff] [blame]	2666	return "r";
Duncan Sands	83ec4b6	2008-06-06 12:08:01 +0000	[diff] [blame]	2667	if (ConstraintVT.isFloatingPoint())
Chris Lattner	5e76423	2008-04-26 23:02:14 +0000	[diff] [blame]	2668	return "f"; // works for many targets
				2669	return 0;
Dale Johannesen	ba2a0b9	2008-01-29 02:21:21 +0000	[diff] [blame]	2670	}
				2671
Chris Lattner	48884cd	2007-08-25 00:47:38 +0000	[diff] [blame]	2672	/// LowerAsmOperandForConstraint - Lower the specified operand into the Ops
				2673	/// vector. If it is invalid, don't add anything to Ops.
Dan Gohman	475871a	2008-07-27 21:46:04 +0000	[diff] [blame]	2674	void TargetLowering::LowerAsmOperandForConstraint(SDValue Op,
Eric Christopher	100c833	2011-06-02 23:16:42 +0000	[diff] [blame]	2675	std::string &Constraint,
Dan Gohman	475871a	2008-07-27 21:46:04 +0000	[diff] [blame]	2676	std::vector<SDValue> &Ops,
Chris Lattner	5e76423	2008-04-26 23:02:14 +0000	[diff] [blame]	2677	SelectionDAG &DAG) const {
Eric Christopher	362fee9	2011-06-17 20:41:29 +0000	[diff] [blame]	2678
Eric Christopher	100c833	2011-06-02 23:16:42 +0000	[diff] [blame]	2679	if (Constraint.length() > 1) return;
Eric Christopher	362fee9	2011-06-17 20:41:29 +0000	[diff] [blame]	2680
Eric Christopher	100c833	2011-06-02 23:16:42 +0000	[diff] [blame]	2681	char ConstraintLetter = Constraint[0];
Chris Lattner	eb8146b	2006-02-04 02:13:02 +0000	[diff] [blame]	2682	switch (ConstraintLetter) {
Chris Lattner	9ff6ee8	2007-02-17 06:00:35 +0000	[diff] [blame]	2683	default: break;
Dale Johannesen	eb57ea7	2007-11-05 21:20:28 +0000	[diff] [blame]	2684	case 'X': // Allows any operand; labels (basic block) use this.
				2685	if (Op.getOpcode() == ISD::BasicBlock) {
				2686	Ops.push_back(Op);
				2687	return;
				2688	}
				2689	// fall through
Chris Lattner	eb8146b	2006-02-04 02:13:02 +0000	[diff] [blame]	2690	case 'i': // Simple Integer or Relocatable Constant
				2691	case 'n': // Simple Integer
Dale Johannesen	eb57ea7	2007-11-05 21:20:28 +0000	[diff] [blame]	2692	case 's': { // Relocatable Constant
Chris Lattner	75c7d2b	2007-05-03 16:54:34 +0000	[diff] [blame]	2693	// These operands are interested in values of the form (GV+C), where C may
				2694	// be folded in as an offset of GV, or it may be explicitly added. Also, it
				2695	// is possible and fine if either GV or C are missing.
				2696	ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op);
				2697	GlobalAddressSDNode *GA = dyn_cast<GlobalAddressSDNode>(Op);
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2698
Chris Lattner	75c7d2b	2007-05-03 16:54:34 +0000	[diff] [blame]	2699	// If we have "(add GV, C)", pull out GV/C
				2700	if (Op.getOpcode() == ISD::ADD) {
				2701	C = dyn_cast<ConstantSDNode>(Op.getOperand(1));
				2702	GA = dyn_cast<GlobalAddressSDNode>(Op.getOperand(0));
				2703	if (C == 0 \|\| GA == 0) {
				2704	C = dyn_cast<ConstantSDNode>(Op.getOperand(0));
				2705	GA = dyn_cast<GlobalAddressSDNode>(Op.getOperand(1));
				2706	}
				2707	if (C == 0 \|\| GA == 0)
				2708	C = 0, GA = 0;
				2709	}
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2710
Chris Lattner	75c7d2b	2007-05-03 16:54:34 +0000	[diff] [blame]	2711	// If we find a valid operand, map to the TargetXXX version so that the
				2712	// value itself doesn't get selected.
				2713	if (GA) { // Either &GV or &GV+C
				2714	if (ConstraintLetter != 'n') {
				2715	int64_t Offs = GA->getOffset();
Dan Gohman	f5aeb1a	2008-09-12 16:56:44 +0000	[diff] [blame]	2716	if (C) Offs += C->getZExtValue();
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2717	Ops.push_back(DAG.getTargetGlobalAddress(GA->getGlobal(),
Devang Patel	07538ad	2010-07-15 18:45:27 +0000	[diff] [blame]	2718	C ? C->getDebugLoc() : DebugLoc(),
Chris Lattner	48884cd	2007-08-25 00:47:38 +0000	[diff] [blame]	2719	Op.getValueType(), Offs));
				2720	return;
Chris Lattner	75c7d2b	2007-05-03 16:54:34 +0000	[diff] [blame]	2721	}
				2722	}
				2723	if (C) { // just C, no GV.
Chris Lattner	9ff6ee8	2007-02-17 06:00:35 +0000	[diff] [blame]	2724	// Simple constants are not allowed for 's'.
Chris Lattner	48884cd	2007-08-25 00:47:38 +0000	[diff] [blame]	2725	if (ConstraintLetter != 's') {
Dale Johannesen	78e3e52	2009-02-12 20:58:09 +0000	[diff] [blame]	2726	// gcc prints these as sign extended. Sign extend value to 64 bits
				2727	// now; without this it would get ZExt'd later in
				2728	// ScheduleDAGSDNodes::EmitNode, which is very generic.
				2729	Ops.push_back(DAG.getTargetConstant(C->getAPIntValue().getSExtValue(),
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	2730	MVT::i64));
Chris Lattner	48884cd	2007-08-25 00:47:38 +0000	[diff] [blame]	2731	return;
				2732	}
Chris Lattner	9ff6ee8	2007-02-17 06:00:35 +0000	[diff] [blame]	2733	}
Chris Lattner	9ff6ee8	2007-02-17 06:00:35 +0000	[diff] [blame]	2734	break;
Chris Lattner	eb8146b	2006-02-04 02:13:02 +0000	[diff] [blame]	2735	}
Chris Lattner	75c7d2b	2007-05-03 16:54:34 +0000	[diff] [blame]	2736	}
Chris Lattner	eb8146b	2006-02-04 02:13:02 +0000	[diff] [blame]	2737	}
				2738
Chris Lattner	1efa40f	2006-02-22 00:56:39 +0000	[diff] [blame]	2739	std::pair<unsigned, const TargetRegisterClass*> TargetLowering::
Chris Lattner	4217ca8dc	2006-02-21 23:11:00 +0000	[diff] [blame]	2740	getRegForInlineAsmConstraint(const std::string &Constraint,
Owen Anderson	e50ed30	2009-08-10 22:56:29 +0000	[diff] [blame]	2741	EVT VT) const {
Chris Lattner	1efa40f	2006-02-22 00:56:39 +0000	[diff] [blame]	2742	if (Constraint[0] != '{')
Douglas Gregor	7d9663c	2010-05-11 06:17:44 +0000	[diff] [blame]	2743	return std::make_pair(0u, static_cast<TargetRegisterClass*>(0));
Chris Lattner	a55079a	2006-02-01 01:29:47 +0000	[diff] [blame]	2744	assert(*(Constraint.end()-1) == '}' && "Not a brace enclosed constraint?");
				2745
				2746	// Remove the braces from around the name.
Benjamin Kramer	05872ea	2009-11-12 20:36:59 +0000	[diff] [blame]	2747	StringRef RegName(Constraint.data()+1, Constraint.size()-2);
Chris Lattner	1efa40f	2006-02-22 00:56:39 +0000	[diff] [blame]	2748
				2749	// Figure out which register class contains this reg.
Dan Gohman	6f0d024	2008-02-10 18:45:23 +0000	[diff] [blame]	2750	const TargetRegisterInfo *RI = TM.getRegisterInfo();
				2751	for (TargetRegisterInfo::regclass_iterator RCI = RI->regclass_begin(),
Chris Lattner	1efa40f	2006-02-22 00:56:39 +0000	[diff] [blame]	2752	E = RI->regclass_end(); RCI != E; ++RCI) {
				2753	const TargetRegisterClass RC = RCI;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2754
				2755	// If none of the value types for this register class are valid, we
Chris Lattner	b3befd4	2006-02-22 23:00:51 +0000	[diff] [blame]	2756	// can't use it. For example, 64-bit reg classes on 32-bit targets.
				2757	bool isLegal = false;
				2758	for (TargetRegisterClass::vt_iterator I = RC->vt_begin(), E = RC->vt_end();
				2759	I != E; ++I) {
				2760	if (isTypeLegal(*I)) {
				2761	isLegal = true;
				2762	break;
				2763	}
				2764	}
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2765
Chris Lattner	b3befd4	2006-02-22 23:00:51 +0000	[diff] [blame]	2766	if (!isLegal) continue;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2767
				2768	for (TargetRegisterClass::iterator I = RC->begin(), E = RC->end();
Chris Lattner	1efa40f	2006-02-22 00:56:39 +0000	[diff] [blame]	2769	I != E; ++I) {
Benjamin Kramer	05872ea	2009-11-12 20:36:59 +0000	[diff] [blame]	2770	if (RegName.equals_lower(RI->getName(*I)))
Chris Lattner	1efa40f	2006-02-22 00:56:39 +0000	[diff] [blame]	2771	return std::make_pair(*I, RC);
Chris Lattner	1efa40f	2006-02-22 00:56:39 +0000	[diff] [blame]	2772	}
Chris Lattner	4ccb070	2006-01-26 20:37:03 +0000	[diff] [blame]	2773	}
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2774
Douglas Gregor	7d9663c	2010-05-11 06:17:44 +0000	[diff] [blame]	2775	return std::make_pair(0u, static_cast<const TargetRegisterClass*>(0));
Chris Lattner	4ccb070	2006-01-26 20:37:03 +0000	[diff] [blame]	2776	}
Evan Cheng	30b37b5	2006-03-13 23:18:16 +0000	[diff] [blame]	2777
				2778	//===----------------------------------------------------------------------===//
Chris Lattner	4376fea	2008-04-27 00:09:47 +0000	[diff] [blame]	2779	// Constraint Selection.
				2780
Chris Lattner	6bdcda3	2008-10-17 16:47:46 +0000	[diff] [blame]	2781	/// isMatchingInputConstraint - Return true of this is an input operand that is
				2782	/// a matching constraint like "4".
				2783	bool TargetLowering::AsmOperandInfo::isMatchingInputConstraint() const {
Chris Lattner	58f15c4	2008-10-17 16:21:11 +0000	[diff] [blame]	2784	assert(!ConstraintCode.empty() && "No known constraint!");
				2785	return isdigit(ConstraintCode[0]);
				2786	}
				2787
				2788	/// getMatchedOperand - If this is an input matching constraint, this method
				2789	/// returns the output operand it matches.
				2790	unsigned TargetLowering::AsmOperandInfo::getMatchedOperand() const {
				2791	assert(!ConstraintCode.empty() && "No known constraint!");
				2792	return atoi(ConstraintCode.c_str());
				2793	}
				2794
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2795
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	2796	/// ParseConstraints - Split up the constraint string from the inline
				2797	/// assembly value into the specific constraints and their prefixes,
				2798	/// and also tie in the associated operand values.
				2799	/// If this returns an empty vector, and if the constraint string itself
				2800	/// isn't empty, there was an error parsing.
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	2801	TargetLowering::AsmOperandInfoVector TargetLowering::ParseConstraints(
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	2802	ImmutableCallSite CS) const {
				2803	/// ConstraintOperands - Information about all of the constraints.
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	2804	AsmOperandInfoVector ConstraintOperands;
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	2805	const InlineAsm *IA = cast<InlineAsm>(CS.getCalledValue());
John Thompson	67aff16	2010-09-21 22:04:54 +0000	[diff] [blame]	2806	unsigned maCount = 0; // Largest number of multiple alternative constraints.
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	2807
				2808	// Do a prepass over the constraints, canonicalizing them, and building up the
				2809	// ConstraintOperands list.
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	2810	InlineAsm::ConstraintInfoVector
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	2811	ConstraintInfos = IA->ParseConstraints();
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2812
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	2813	unsigned ArgNo = 0; // ArgNo - The argument of the CallInst.
				2814	unsigned ResNo = 0; // ResNo - The result number of the next output.
				2815
				2816	for (unsigned i = 0, e = ConstraintInfos.size(); i != e; ++i) {
				2817	ConstraintOperands.push_back(AsmOperandInfo(ConstraintInfos[i]));
				2818	AsmOperandInfo &OpInfo = ConstraintOperands.back();
				2819
John Thompson	67aff16	2010-09-21 22:04:54 +0000	[diff] [blame]	2820	// Update multiple alternative constraint count.
				2821	if (OpInfo.multipleAlternatives.size() > maCount)
				2822	maCount = OpInfo.multipleAlternatives.size();
				2823
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	2824	OpInfo.ConstraintVT = MVT::Other;
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	2825
				2826	// Compute the value type for each operand.
				2827	switch (OpInfo.Type) {
				2828	case InlineAsm::isOutput:
				2829	// Indirect outputs just consume an argument.
				2830	if (OpInfo.isIndirect) {
				2831	OpInfo.CallOperandVal = const_cast<Value *>(CS.getArgument(ArgNo++));
				2832	break;
				2833	}
				2834
				2835	// The return value of the call is this value. As such, there is no
				2836	// corresponding argument.
				2837	assert(!CS.getType()->isVoidTy() &&
				2838	"Bad inline asm!");
				2839	if (const StructType *STy = dyn_cast<StructType>(CS.getType())) {
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	2840	OpInfo.ConstraintVT = getValueType(STy->getElementType(ResNo));
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	2841	} else {
				2842	assert(ResNo == 0 && "Asm only has one result!");
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	2843	OpInfo.ConstraintVT = getValueType(CS.getType());
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	2844	}
				2845	++ResNo;
				2846	break;
				2847	case InlineAsm::isInput:
				2848	OpInfo.CallOperandVal = const_cast<Value *>(CS.getArgument(ArgNo++));
				2849	break;
				2850	case InlineAsm::isClobber:
				2851	// Nothing to do.
				2852	break;
				2853	}
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2854
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	2855	if (OpInfo.CallOperandVal) {
				2856	const llvm::Type *OpTy = OpInfo.CallOperandVal->getType();
				2857	if (OpInfo.isIndirect) {
				2858	const llvm::PointerType *PtrTy = dyn_cast<PointerType>(OpTy);
				2859	if (!PtrTy)
				2860	report_fatal_error("Indirect operand for inline asm not a pointer!");
				2861	OpTy = PtrTy->getElementType();
				2862	}
Eric Christopher	362fee9	2011-06-17 20:41:29 +0000	[diff] [blame]	2863
Eric Christopher	cef81b7	2011-05-09 20:04:43 +0000	[diff] [blame]	2864	// Look for vector wrapped in a struct. e.g. { <16 x i8> }.
				2865	if (const StructType *STy = dyn_cast<StructType>(OpTy))
				2866	if (STy->getNumElements() == 1)
				2867	OpTy = STy->getElementType(0);
				2868
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	2869	// If OpTy is not a single value, it may be a struct/union that we
				2870	// can tile with integers.
				2871	if (!OpTy->isSingleValueType() && OpTy->isSized()) {
				2872	unsigned BitSize = TD->getTypeSizeInBits(OpTy);
				2873	switch (BitSize) {
				2874	default: break;
				2875	case 1:
				2876	case 8:
				2877	case 16:
				2878	case 32:
				2879	case 64:
				2880	case 128:
Dale Johannesen	71365d3	2010-11-09 01:15:07 +0000	[diff] [blame]	2881	OpInfo.ConstraintVT =
				2882	EVT::getEVT(IntegerType::get(OpTy->getContext(), BitSize), true);
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	2883	break;
				2884	}
				2885	} else if (dyn_cast<PointerType>(OpTy)) {
				2886	OpInfo.ConstraintVT = MVT::getIntegerVT(8*TD->getPointerSize());
				2887	} else {
				2888	OpInfo.ConstraintVT = EVT::getEVT(OpTy, true);
				2889	}
				2890	}
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	2891	}
				2892
				2893	// If we have multiple alternative constraints, select the best alternative.
				2894	if (ConstraintInfos.size()) {
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	2895	if (maCount) {
				2896	unsigned bestMAIndex = 0;
				2897	int bestWeight = -1;
				2898	// weight: -1 = invalid match, and 0 = so-so match to 5 = good match.
				2899	int weight = -1;
				2900	unsigned maIndex;
				2901	// Compute the sums of the weights for each alternative, keeping track
				2902	// of the best (highest weight) one so far.
				2903	for (maIndex = 0; maIndex < maCount; ++maIndex) {
				2904	int weightSum = 0;
				2905	for (unsigned cIndex = 0, eIndex = ConstraintOperands.size();
				2906	cIndex != eIndex; ++cIndex) {
				2907	AsmOperandInfo& OpInfo = ConstraintOperands[cIndex];
				2908	if (OpInfo.Type == InlineAsm::isClobber)
				2909	continue;
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	2910
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	2911	// If this is an output operand with a matching input operand,
				2912	// look up the matching input. If their types mismatch, e.g. one
				2913	// is an integer, the other is floating point, or their sizes are
				2914	// different, flag it as an maCantMatch.
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	2915	if (OpInfo.hasMatchingInput()) {
				2916	AsmOperandInfo &Input = ConstraintOperands[OpInfo.MatchingInput];
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	2917	if (OpInfo.ConstraintVT != Input.ConstraintVT) {
				2918	if ((OpInfo.ConstraintVT.isInteger() !=
				2919	Input.ConstraintVT.isInteger()) \|\|
				2920	(OpInfo.ConstraintVT.getSizeInBits() !=
				2921	Input.ConstraintVT.getSizeInBits())) {
				2922	weightSum = -1; // Can't match.
				2923	break;
				2924	}
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	2925	}
				2926	}
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	2927	weight = getMultipleConstraintMatchWeight(OpInfo, maIndex);
				2928	if (weight == -1) {
				2929	weightSum = -1;
				2930	break;
				2931	}
				2932	weightSum += weight;
				2933	}
				2934	// Update best.
				2935	if (weightSum > bestWeight) {
				2936	bestWeight = weightSum;
				2937	bestMAIndex = maIndex;
				2938	}
				2939	}
				2940
				2941	// Now select chosen alternative in each constraint.
				2942	for (unsigned cIndex = 0, eIndex = ConstraintOperands.size();
				2943	cIndex != eIndex; ++cIndex) {
				2944	AsmOperandInfo& cInfo = ConstraintOperands[cIndex];
				2945	if (cInfo.Type == InlineAsm::isClobber)
				2946	continue;
				2947	cInfo.selectAlternative(bestMAIndex);
				2948	}
				2949	}
				2950	}
				2951
				2952	// Check and hook up tied operands, choose constraint code to use.
				2953	for (unsigned cIndex = 0, eIndex = ConstraintOperands.size();
				2954	cIndex != eIndex; ++cIndex) {
				2955	AsmOperandInfo& OpInfo = ConstraintOperands[cIndex];
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2956
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	2957	// If this is an output operand with a matching input operand, look up the
				2958	// matching input. If their types mismatch, e.g. one is an integer, the
				2959	// other is floating point, or their sizes are different, flag it as an
				2960	// error.
				2961	if (OpInfo.hasMatchingInput()) {
				2962	AsmOperandInfo &Input = ConstraintOperands[OpInfo.MatchingInput];
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	2963
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	2964	if (OpInfo.ConstraintVT != Input.ConstraintVT) {
				2965	if ((OpInfo.ConstraintVT.isInteger() !=
				2966	Input.ConstraintVT.isInteger()) \|\|
				2967	(OpInfo.ConstraintVT.getSizeInBits() !=
				2968	Input.ConstraintVT.getSizeInBits())) {
				2969	report_fatal_error("Unsupported asm: input constraint"
				2970	" with a matching output constraint of"
				2971	" incompatible type!");
				2972	}
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	2973	}
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	2974
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	2975	}
				2976	}
				2977
				2978	return ConstraintOperands;
				2979	}
				2980
Chris Lattner	58f15c4	2008-10-17 16:21:11 +0000	[diff] [blame]	2981
Chris Lattner	4376fea	2008-04-27 00:09:47 +0000	[diff] [blame]	2982	/// getConstraintGenerality - Return an integer indicating how general CT
				2983	/// is.
				2984	static unsigned getConstraintGenerality(TargetLowering::ConstraintType CT) {
				2985	switch (CT) {
Torok Edwin	c23197a	2009-07-14 16:55:14 +0000	[diff] [blame]	2986	default: llvm_unreachable("Unknown constraint type!");
Chris Lattner	4376fea	2008-04-27 00:09:47 +0000	[diff] [blame]	2987	case TargetLowering::C_Other:
				2988	case TargetLowering::C_Unknown:
				2989	return 0;
				2990	case TargetLowering::C_Register:
				2991	return 1;
				2992	case TargetLowering::C_RegisterClass:
				2993	return 2;
				2994	case TargetLowering::C_Memory:
				2995	return 3;
				2996	}
				2997	}
				2998
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	2999	/// Examine constraint type and operand type and determine a weight value.
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	3000	/// This object must already have been set up with the operand type
				3001	/// and the current alternative constraint selected.
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	3002	TargetLowering::ConstraintWeight
				3003	TargetLowering::getMultipleConstraintMatchWeight(
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	3004	AsmOperandInfo &info, int maIndex) const {
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	3005	InlineAsm::ConstraintCodeVector *rCodes;
John Thompson	67aff16	2010-09-21 22:04:54 +0000	[diff] [blame]	3006	if (maIndex >= (int)info.multipleAlternatives.size())
				3007	rCodes = &info.Codes;
				3008	else
				3009	rCodes = &info.multipleAlternatives[maIndex].Codes;
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	3010	ConstraintWeight BestWeight = CW_Invalid;
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	3011
				3012	// Loop over the options, keeping track of the most general one.
John Thompson	67aff16	2010-09-21 22:04:54 +0000	[diff] [blame]	3013	for (unsigned i = 0, e = rCodes->size(); i != e; ++i) {
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	3014	ConstraintWeight weight =
				3015	getSingleConstraintMatchWeight(info, (*rCodes)[i].c_str());
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	3016	if (weight > BestWeight)
				3017	BestWeight = weight;
				3018	}
				3019
				3020	return BestWeight;
				3021	}
				3022
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	3023	/// Examine constraint type and operand type and determine a weight value.
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	3024	/// This object must already have been set up with the operand type
				3025	/// and the current alternative constraint selected.
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	3026	TargetLowering::ConstraintWeight
				3027	TargetLowering::getSingleConstraintMatchWeight(
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	3028	AsmOperandInfo &info, const char *constraint) const {
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	3029	ConstraintWeight weight = CW_Invalid;
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	3030	Value *CallOperandVal = info.CallOperandVal;
				3031	// If we don't have a value, we can't do a match,
				3032	// but allow it at the lowest weight.
				3033	if (CallOperandVal == NULL)
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	3034	return CW_Default;
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	3035	// Look at the constraint type.
				3036	switch (*constraint) {
				3037	case 'i': // immediate integer.
				3038	case 'n': // immediate integer with a known value.
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	3039	if (isa<ConstantInt>(CallOperandVal))
				3040	weight = CW_Constant;
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	3041	break;
				3042	case 's': // non-explicit intregal immediate.
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	3043	if (isa<GlobalValue>(CallOperandVal))
				3044	weight = CW_Constant;
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	3045	break;
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	3046	case 'E': // immediate float if host format.
				3047	case 'F': // immediate float.
				3048	if (isa<ConstantFP>(CallOperandVal))
				3049	weight = CW_Constant;
				3050	break;
				3051	case '<': // memory operand with autodecrement.
				3052	case '>': // memory operand with autoincrement.
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	3053	case 'm': // memory operand.
				3054	case 'o': // offsettable memory operand
				3055	case 'V': // non-offsettable memory operand
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	3056	weight = CW_Memory;
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	3057	break;
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	3058	case 'r': // general register.
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	3059	case 'g': // general register, memory operand or immediate integer.
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	3060	// note: Clang converts "g" to "imr".
				3061	if (CallOperandVal->getType()->isIntegerTy())
				3062	weight = CW_Register;
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	3063	break;
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	3064	case 'X': // any operand.
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	3065	default:
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	3066	weight = CW_Default;
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	3067	break;
				3068	}
				3069	return weight;
				3070	}
				3071
Chris Lattner	4376fea	2008-04-27 00:09:47 +0000	[diff] [blame]	3072	/// ChooseConstraint - If there are multiple different constraints that we
				3073	/// could pick for this operand (e.g. "imr") try to pick the 'best' one.
Chris Lattner	24e1a9d	2008-04-27 01:49:46 +0000	[diff] [blame]	3074	/// This is somewhat tricky: constraints fall into four classes:
Chris Lattner	4376fea	2008-04-27 00:09:47 +0000	[diff] [blame]	3075	/// Other -> immediates and magic values
				3076	/// Register -> one specific register
				3077	/// RegisterClass -> a group of regs
				3078	/// Memory -> memory
				3079	/// Ideally, we would pick the most specific constraint possible: if we have
				3080	/// something that fits into a register, we would pick it. The problem here
				3081	/// is that if we have something that could either be in a register or in
				3082	/// memory that use of the register could cause selection of other
				3083	/// operands to fail: they might only succeed if we pick memory. Because of
				3084	/// this the heuristic we use is:
				3085	///
				3086	/// 1) If there is an 'other' constraint, and if the operand is valid for
				3087	/// that constraint, use it. This makes us take advantage of 'i'
				3088	/// constraints when available.
				3089	/// 2) Otherwise, pick the most general constraint present. This prefers
				3090	/// 'm' over 'r', for example.
				3091	///
				3092	static void ChooseConstraint(TargetLowering::AsmOperandInfo &OpInfo,
Dale Johannesen	1784d16	2010-06-25 21:55:36 +0000	[diff] [blame]	3093	const TargetLowering &TLI,
Dan Gohman	475871a	2008-07-27 21:46:04 +0000	[diff] [blame]	3094	SDValue Op, SelectionDAG *DAG) {
Chris Lattner	4376fea	2008-04-27 00:09:47 +0000	[diff] [blame]	3095	assert(OpInfo.Codes.size() > 1 && "Doesn't have multiple constraint options");
				3096	unsigned BestIdx = 0;
				3097	TargetLowering::ConstraintType BestType = TargetLowering::C_Unknown;
				3098	int BestGenerality = -1;
Dale Johannesen	a5989f8	2010-06-28 22:09:45 +0000	[diff] [blame]	3099
Chris Lattner	4376fea	2008-04-27 00:09:47 +0000	[diff] [blame]	3100	// Loop over the options, keeping track of the most general one.
				3101	for (unsigned i = 0, e = OpInfo.Codes.size(); i != e; ++i) {
				3102	TargetLowering::ConstraintType CType =
				3103	TLI.getConstraintType(OpInfo.Codes[i]);
Dale Johannesen	a5989f8	2010-06-28 22:09:45 +0000	[diff] [blame]	3104
Chris Lattner	5a09690	2008-04-27 00:37:18 +0000	[diff] [blame]	3105	// If this is an 'other' constraint, see if the operand is valid for it.
				3106	// For example, on X86 we might have an 'rI' constraint. If the operand
				3107	// is an integer in the range [0..31] we want to use I (saving a load
				3108	// of a register), otherwise we must use 'r'.
Gabor Greif	ba36cb5	2008-08-28 21:40:38 +0000	[diff] [blame]	3109	if (CType == TargetLowering::C_Other && Op.getNode()) {
Chris Lattner	5a09690	2008-04-27 00:37:18 +0000	[diff] [blame]	3110	assert(OpInfo.Codes[i].size() == 1 &&
				3111	"Unhandled multi-letter 'other' constraint");
Dan Gohman	475871a	2008-07-27 21:46:04 +0000	[diff] [blame]	3112	std::vector<SDValue> ResultOps;
Eric Christopher	100c833	2011-06-02 23:16:42 +0000	[diff] [blame]	3113	TLI.LowerAsmOperandForConstraint(Op, OpInfo.Codes[i],
Chris Lattner	5a09690	2008-04-27 00:37:18 +0000	[diff] [blame]	3114	ResultOps, *DAG);
				3115	if (!ResultOps.empty()) {
				3116	BestType = CType;
				3117	BestIdx = i;
				3118	break;
				3119	}
				3120	}
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	3121
Dale Johannesen	a5989f8	2010-06-28 22:09:45 +0000	[diff] [blame]	3122	// Things with matching constraints can only be registers, per gcc
				3123	// documentation. This mainly affects "g" constraints.
				3124	if (CType == TargetLowering::C_Memory && OpInfo.hasMatchingInput())
				3125	continue;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	3126
Chris Lattner	4376fea	2008-04-27 00:09:47 +0000	[diff] [blame]	3127	// This constraint letter is more general than the previous one, use it.
				3128	int Generality = getConstraintGenerality(CType);
				3129	if (Generality > BestGenerality) {
				3130	BestType = CType;
				3131	BestIdx = i;
				3132	BestGenerality = Generality;
				3133	}
				3134	}
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	3135
Chris Lattner	4376fea	2008-04-27 00:09:47 +0000	[diff] [blame]	3136	OpInfo.ConstraintCode = OpInfo.Codes[BestIdx];
				3137	OpInfo.ConstraintType = BestType;
				3138	}
				3139
				3140	/// ComputeConstraintToUse - Determines the constraint code and constraint
				3141	/// type to use for the specific AsmOperandInfo, setting
				3142	/// OpInfo.ConstraintCode and OpInfo.ConstraintType.
Chris Lattner	5a09690	2008-04-27 00:37:18 +0000	[diff] [blame]	3143	void TargetLowering::ComputeConstraintToUse(AsmOperandInfo &OpInfo,
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	3144	SDValue Op,
Chris Lattner	5a09690	2008-04-27 00:37:18 +0000	[diff] [blame]	3145	SelectionDAG *DAG) const {
Chris Lattner	4376fea	2008-04-27 00:09:47 +0000	[diff] [blame]	3146	assert(!OpInfo.Codes.empty() && "Must have at least one constraint");
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	3147
Chris Lattner	4376fea	2008-04-27 00:09:47 +0000	[diff] [blame]	3148	// Single-letter constraints ('r') are very common.
				3149	if (OpInfo.Codes.size() == 1) {
				3150	OpInfo.ConstraintCode = OpInfo.Codes[0];
				3151	OpInfo.ConstraintType = getConstraintType(OpInfo.ConstraintCode);
				3152	} else {
Dale Johannesen	1784d16	2010-06-25 21:55:36 +0000	[diff] [blame]	3153	ChooseConstraint(OpInfo, *this, Op, DAG);
Chris Lattner	4376fea	2008-04-27 00:09:47 +0000	[diff] [blame]	3154	}
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	3155
Chris Lattner	4376fea	2008-04-27 00:09:47 +0000	[diff] [blame]	3156	// 'X' matches anything.
				3157	if (OpInfo.ConstraintCode == "X" && OpInfo.CallOperandVal) {
				3158	// Labels and constants are handled elsewhere ('X' is the only thing
Dale Johannesen	8ea5ec6	2009-07-07 23:26:33 +0000	[diff] [blame]	3159	// that matches labels). For Functions, the type here is the type of
Dale Johannesen	5339c55	2009-07-20 23:27:39 +0000	[diff] [blame]	3160	// the result, which is not what we want to look at; leave them alone.
				3161	Value *v = OpInfo.CallOperandVal;
Dale Johannesen	8ea5ec6	2009-07-07 23:26:33 +0000	[diff] [blame]	3162	if (isa<BasicBlock>(v) \|\| isa<ConstantInt>(v) \|\| isa<Function>(v)) {
				3163	OpInfo.CallOperandVal = v;
Chris Lattner	4376fea	2008-04-27 00:09:47 +0000	[diff] [blame]	3164	return;
Dale Johannesen	8ea5ec6	2009-07-07 23:26:33 +0000	[diff] [blame]	3165	}
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	3166
Chris Lattner	4376fea	2008-04-27 00:09:47 +0000	[diff] [blame]	3167	// Otherwise, try to resolve it to something we know about by looking at
				3168	// the actual operand type.
				3169	if (const char *Repl = LowerXConstraint(OpInfo.ConstraintVT)) {
				3170	OpInfo.ConstraintCode = Repl;
				3171	OpInfo.ConstraintType = getConstraintType(OpInfo.ConstraintCode);
				3172	}
				3173	}
				3174	}
				3175
				3176	//===----------------------------------------------------------------------===//
Evan Cheng	30b37b5	2006-03-13 23:18:16 +0000	[diff] [blame]	3177	// Loop Strength Reduction hooks
				3178	//===----------------------------------------------------------------------===//
				3179
Chris Lattner	1436bb6	2007-03-30 23:14:50 +0000	[diff] [blame]	3180	/// isLegalAddressingMode - Return true if the addressing mode represented
				3181	/// by AM is legal for this target, for a load/store of the specified type.
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	3182	bool TargetLowering::isLegalAddressingMode(const AddrMode &AM,
Chris Lattner	1436bb6	2007-03-30 23:14:50 +0000	[diff] [blame]	3183	const Type *Ty) const {
				3184	// The default implementation of this implements a conservative RISCy, r+r and
				3185	// r+i addr mode.
				3186
				3187	// Allows a sign-extended 16-bit immediate field.
				3188	if (AM.BaseOffs <= -(1LL << 16) \|\| AM.BaseOffs >= (1LL << 16)-1)
				3189	return false;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	3190
Chris Lattner	1436bb6	2007-03-30 23:14:50 +0000	[diff] [blame]	3191	// No global is ever allowed as a base.
				3192	if (AM.BaseGV)
				3193	return false;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	3194
				3195	// Only support r+r,
Chris Lattner	1436bb6	2007-03-30 23:14:50 +0000	[diff] [blame]	3196	switch (AM.Scale) {
				3197	case 0: // "r+i" or just "i", depending on HasBaseReg.
				3198	break;
				3199	case 1:
				3200	if (AM.HasBaseReg && AM.BaseOffs) // "r+r+i" is not allowed.
				3201	return false;
				3202	// Otherwise we have r+r or r+i.
				3203	break;
				3204	case 2:
				3205	if (AM.HasBaseReg \|\| AM.BaseOffs) // 2r+r or 2r+i is not allowed.
				3206	return false;
				3207	// Allow 2*r as r+r.
				3208	break;
				3209	}
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	3210
Chris Lattner	1436bb6	2007-03-30 23:14:50 +0000	[diff] [blame]	3211	return true;
				3212	}
				3213
Benjamin Kramer	9c64030	2011-07-08 10:31:30 +0000	[diff] [blame]	3214	/// BuildExactDiv - Given an exact SDIV by a constant, create a multiplication
				3215	/// with the multiplicative inverse of the constant.
				3216	SDValue TargetLowering::BuildExactSDIV(SDValue Op1, SDValue Op2, DebugLoc dl,
				3217	SelectionDAG &DAG) const {
				3218	ConstantSDNode *C = cast<ConstantSDNode>(Op2);
				3219	APInt d = C->getAPIntValue();
				3220	assert(d != 0 && "Division by zero!");
				3221
				3222	// Shift the value upfront if it is even, so the LSB is one.
				3223	unsigned ShAmt = d.countTrailingZeros();
				3224	if (ShAmt) {
				3225	// TODO: For UDIV use SRL instead of SRA.
				3226	SDValue Amt = DAG.getConstant(ShAmt, getShiftAmountTy(Op1.getValueType()));
				3227	Op1 = DAG.getNode(ISD::SRA, dl, Op1.getValueType(), Op1, Amt);
				3228	d = d.ashr(ShAmt);
				3229	}
				3230
				3231	// Calculate the multiplicative inverse, using Newton's method.
				3232	APInt t, xn = d;
				3233	while ((t = d*xn) != 1)
				3234	xn *= APInt(d.getBitWidth(), 2) - t;
				3235
				3236	Op2 = DAG.getConstant(xn, Op1.getValueType());
				3237	return DAG.getNode(ISD::MUL, dl, Op1.getValueType(), Op1, Op2);
				3238	}
				3239
Andrew Lenharth	dae9cbe	2006-05-16 17:42:15 +0000	[diff] [blame]	3240	/// BuildSDIVSequence - Given an ISD::SDIV node expressing a divide by constant,
				3241	/// return a DAG expression to select that will generate the same value by
				3242	/// multiplying by a magic number. See:
				3243	/// <http://the.wall.riscom.net/books/proc/ppc/cwg/code2.html>
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	3244	SDValue TargetLowering::BuildSDIV(SDNode *N, SelectionDAG &DAG,
Dan Gohman	475871a	2008-07-27 21:46:04 +0000	[diff] [blame]	3245	std::vector<SDNode> Created) const {
Owen Anderson	e50ed30	2009-08-10 22:56:29 +0000	[diff] [blame]	3246	EVT VT = N->getValueType(0);
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	3247	DebugLoc dl= N->getDebugLoc();
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	3248
Andrew Lenharth	dae9cbe	2006-05-16 17:42:15 +0000	[diff] [blame]	3249	// Check to see if we can do this.
Eli Friedman	fc69cb4	2008-11-30 06:35:39 +0000	[diff] [blame]	3250	// FIXME: We should be more aggressive here.
				3251	if (!isTypeLegal(VT))
				3252	return SDValue();
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	3253
Eli Friedman	fc69cb4	2008-11-30 06:35:39 +0000	[diff] [blame]	3254	APInt d = cast<ConstantSDNode>(N->getOperand(1))->getAPIntValue();
Jay Foad	4e5ea55	2009-04-30 10:15:35 +0000	[diff] [blame]	3255	APInt::ms magics = d.magic();
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	3256
Andrew Lenharth	dae9cbe	2006-05-16 17:42:15 +0000	[diff] [blame]	3257	// Multiply the numerator (operand 0) by the magic value
Eli Friedman	fc69cb4	2008-11-30 06:35:39 +0000	[diff] [blame]	3258	// FIXME: We should support doing a MUL in a wider type
Dan Gohman	475871a	2008-07-27 21:46:04 +0000	[diff] [blame]	3259	SDValue Q;
Dan Gohman	f560ffa	2009-01-28 17:46:25 +0000	[diff] [blame]	3260	if (isOperationLegalOrCustom(ISD::MULHS, VT))
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	3261	Q = DAG.getNode(ISD::MULHS, dl, VT, N->getOperand(0),
Dan Gohman	525178c	2007-10-08 18:33:35 +0000	[diff] [blame]	3262	DAG.getConstant(magics.m, VT));
Dan Gohman	f560ffa	2009-01-28 17:46:25 +0000	[diff] [blame]	3263	else if (isOperationLegalOrCustom(ISD::SMUL_LOHI, VT))
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	3264	Q = SDValue(DAG.getNode(ISD::SMUL_LOHI, dl, DAG.getVTList(VT, VT),
Dan Gohman	525178c	2007-10-08 18:33:35 +0000	[diff] [blame]	3265	N->getOperand(0),
Gabor Greif	ba36cb5	2008-08-28 21:40:38 +0000	[diff] [blame]	3266	DAG.getConstant(magics.m, VT)).getNode(), 1);
Dan Gohman	525178c	2007-10-08 18:33:35 +0000	[diff] [blame]	3267	else
Dan Gohman	475871a	2008-07-27 21:46:04 +0000	[diff] [blame]	3268	return SDValue(); // No mulhs or equvialent
Andrew Lenharth	dae9cbe	2006-05-16 17:42:15 +0000	[diff] [blame]	3269	// If d > 0 and m < 0, add the numerator
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	3270	if (d.isStrictlyPositive() && magics.m.isNegative()) {
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	3271	Q = DAG.getNode(ISD::ADD, dl, VT, Q, N->getOperand(0));
Andrew Lenharth	dae9cbe	2006-05-16 17:42:15 +0000	[diff] [blame]	3272	if (Created)
Gabor Greif	ba36cb5	2008-08-28 21:40:38 +0000	[diff] [blame]	3273	Created->push_back(Q.getNode());
Andrew Lenharth	dae9cbe	2006-05-16 17:42:15 +0000	[diff] [blame]	3274	}
				3275	// If d < 0 and m > 0, subtract the numerator.
Eli Friedman	fc69cb4	2008-11-30 06:35:39 +0000	[diff] [blame]	3276	if (d.isNegative() && magics.m.isStrictlyPositive()) {
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	3277	Q = DAG.getNode(ISD::SUB, dl, VT, Q, N->getOperand(0));
Andrew Lenharth	dae9cbe	2006-05-16 17:42:15 +0000	[diff] [blame]	3278	if (Created)
Gabor Greif	ba36cb5	2008-08-28 21:40:38 +0000	[diff] [blame]	3279	Created->push_back(Q.getNode());
Andrew Lenharth	dae9cbe	2006-05-16 17:42:15 +0000	[diff] [blame]	3280	}
				3281	// Shift right algebraic if shift value is nonzero
				3282	if (magics.s > 0) {
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	3283	Q = DAG.getNode(ISD::SRA, dl, VT, Q,
Owen Anderson	95771af	2011-02-25 21:41:48 +0000	[diff] [blame]	3284	DAG.getConstant(magics.s, getShiftAmountTy(Q.getValueType())));
Andrew Lenharth	dae9cbe	2006-05-16 17:42:15 +0000	[diff] [blame]	3285	if (Created)
Gabor Greif	ba36cb5	2008-08-28 21:40:38 +0000	[diff] [blame]	3286	Created->push_back(Q.getNode());
Andrew Lenharth	dae9cbe	2006-05-16 17:42:15 +0000	[diff] [blame]	3287	}
				3288	// Extract the sign bit and add it to the quotient
Dan Gohman	475871a	2008-07-27 21:46:04 +0000	[diff] [blame]	3289	SDValue T =
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	3290	DAG.getNode(ISD::SRL, dl, VT, Q, DAG.getConstant(VT.getSizeInBits()-1,
Owen Anderson	95771af	2011-02-25 21:41:48 +0000	[diff] [blame]	3291	getShiftAmountTy(Q.getValueType())));
Andrew Lenharth	dae9cbe	2006-05-16 17:42:15 +0000	[diff] [blame]	3292	if (Created)
Gabor Greif	ba36cb5	2008-08-28 21:40:38 +0000	[diff] [blame]	3293	Created->push_back(T.getNode());
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	3294	return DAG.getNode(ISD::ADD, dl, VT, Q, T);
Andrew Lenharth	dae9cbe	2006-05-16 17:42:15 +0000	[diff] [blame]	3295	}
				3296
				3297	/// BuildUDIVSequence - Given an ISD::UDIV node expressing a divide by constant,
				3298	/// return a DAG expression to select that will generate the same value by
				3299	/// multiplying by a magic number. See:
				3300	/// <http://the.wall.riscom.net/books/proc/ppc/cwg/code2.html>
Dan Gohman	475871a	2008-07-27 21:46:04 +0000	[diff] [blame]	3301	SDValue TargetLowering::BuildUDIV(SDNode *N, SelectionDAG &DAG,
				3302	std::vector<SDNode> Created) const {
Owen Anderson	e50ed30	2009-08-10 22:56:29 +0000	[diff] [blame]	3303	EVT VT = N->getValueType(0);
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	3304	DebugLoc dl = N->getDebugLoc();
Eli Friedman	201c977	2008-11-30 06:02:26 +0000	[diff] [blame]	3305
Andrew Lenharth	dae9cbe	2006-05-16 17:42:15 +0000	[diff] [blame]	3306	// Check to see if we can do this.
Eli Friedman	201c977	2008-11-30 06:02:26 +0000	[diff] [blame]	3307	// FIXME: We should be more aggressive here.
				3308	if (!isTypeLegal(VT))
				3309	return SDValue();
				3310
				3311	// FIXME: We should use a narrower constant when the upper
				3312	// bits are known to be zero.
Benjamin Kramer	1c10b8d	2011-03-17 20:39:14 +0000	[diff] [blame]	3313	const APInt &N1C = cast<ConstantSDNode>(N->getOperand(1))->getAPIntValue();
				3314	APInt::mu magics = N1C.magicu();
				3315
				3316	SDValue Q = N->getOperand(0);
				3317
				3318	// If the divisor is even, we can avoid using the expensive fixup by shifting
				3319	// the divided value upfront.
				3320	if (magics.a != 0 && !N1C[0]) {
				3321	unsigned Shift = N1C.countTrailingZeros();
				3322	Q = DAG.getNode(ISD::SRL, dl, VT, Q,
				3323	DAG.getConstant(Shift, getShiftAmountTy(Q.getValueType())));
				3324	if (Created)
				3325	Created->push_back(Q.getNode());
				3326
				3327	// Get magic number for the shifted divisor.
				3328	magics = N1C.lshr(Shift).magicu(Shift);
				3329	assert(magics.a == 0 && "Should use cheap fixup now");
				3330	}
Eli Friedman	201c977	2008-11-30 06:02:26 +0000	[diff] [blame]	3331
Andrew Lenharth	dae9cbe	2006-05-16 17:42:15 +0000	[diff] [blame]	3332	// Multiply the numerator (operand 0) by the magic value
Eli Friedman	201c977	2008-11-30 06:02:26 +0000	[diff] [blame]	3333	// FIXME: We should support doing a MUL in a wider type
Dan Gohman	f560ffa	2009-01-28 17:46:25 +0000	[diff] [blame]	3334	if (isOperationLegalOrCustom(ISD::MULHU, VT))
Benjamin Kramer	1c10b8d	2011-03-17 20:39:14 +0000	[diff] [blame]	3335	Q = DAG.getNode(ISD::MULHU, dl, VT, Q, DAG.getConstant(magics.m, VT));
Dan Gohman	f560ffa	2009-01-28 17:46:25 +0000	[diff] [blame]	3336	else if (isOperationLegalOrCustom(ISD::UMUL_LOHI, VT))
Benjamin Kramer	1c10b8d	2011-03-17 20:39:14 +0000	[diff] [blame]	3337	Q = SDValue(DAG.getNode(ISD::UMUL_LOHI, dl, DAG.getVTList(VT, VT), Q,
				3338	DAG.getConstant(magics.m, VT)).getNode(), 1);
Dan Gohman	525178c	2007-10-08 18:33:35 +0000	[diff] [blame]	3339	else
Dan Gohman	475871a	2008-07-27 21:46:04 +0000	[diff] [blame]	3340	return SDValue(); // No mulhu or equvialent
Andrew Lenharth	dae9cbe	2006-05-16 17:42:15 +0000	[diff] [blame]	3341	if (Created)
Gabor Greif	ba36cb5	2008-08-28 21:40:38 +0000	[diff] [blame]	3342	Created->push_back(Q.getNode());
Andrew Lenharth	dae9cbe	2006-05-16 17:42:15 +0000	[diff] [blame]	3343
				3344	if (magics.a == 0) {
Benjamin Kramer	1c10b8d	2011-03-17 20:39:14 +0000	[diff] [blame]	3345	assert(magics.s < N1C.getBitWidth() &&
Eli Friedman	201c977	2008-11-30 06:02:26 +0000	[diff] [blame]	3346	"We shouldn't generate an undefined shift!");
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	3347	return DAG.getNode(ISD::SRL, dl, VT, Q,
Owen Anderson	95771af	2011-02-25 21:41:48 +0000	[diff] [blame]	3348	DAG.getConstant(magics.s, getShiftAmountTy(Q.getValueType())));
Andrew Lenharth	dae9cbe	2006-05-16 17:42:15 +0000	[diff] [blame]	3349	} else {
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	3350	SDValue NPQ = DAG.getNode(ISD::SUB, dl, VT, N->getOperand(0), Q);
Andrew Lenharth	dae9cbe	2006-05-16 17:42:15 +0000	[diff] [blame]	3351	if (Created)
Gabor Greif	ba36cb5	2008-08-28 21:40:38 +0000	[diff] [blame]	3352	Created->push_back(NPQ.getNode());
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	3353	NPQ = DAG.getNode(ISD::SRL, dl, VT, NPQ,
Owen Anderson	95771af	2011-02-25 21:41:48 +0000	[diff] [blame]	3354	DAG.getConstant(1, getShiftAmountTy(NPQ.getValueType())));
Andrew Lenharth	dae9cbe	2006-05-16 17:42:15 +0000	[diff] [blame]	3355	if (Created)
Gabor Greif	ba36cb5	2008-08-28 21:40:38 +0000	[diff] [blame]	3356	Created->push_back(NPQ.getNode());
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	3357	NPQ = DAG.getNode(ISD::ADD, dl, VT, NPQ, Q);
Andrew Lenharth	dae9cbe	2006-05-16 17:42:15 +0000	[diff] [blame]	3358	if (Created)
Gabor Greif	ba36cb5	2008-08-28 21:40:38 +0000	[diff] [blame]	3359	Created->push_back(NPQ.getNode());
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	3360	return DAG.getNode(ISD::SRL, dl, VT, NPQ,
Owen Anderson	95771af	2011-02-25 21:41:48 +0000	[diff] [blame]	3361	DAG.getConstant(magics.s-1, getShiftAmountTy(NPQ.getValueType())));
Andrew Lenharth	dae9cbe	2006-05-16 17:42:15 +0000	[diff] [blame]	3362	}
				3363	}