Dan Gohman | a4f4d69 | 2010-07-23 18:03:30 +0000 | [diff] [blame] | 1 | ; RUN: llc -march=x86-64 < %s | FileCheck %s |
| 2 | |
| 3 | ; Codegen should be able to use a 32-bit shift instead of a 64-bit shift. |
| 4 | ; CHECK: shll $16 |
| 5 | |
| 6 | define fastcc void @test(i32 %level, i64 %a, i64 %b, i64 %c, i64 %d, i32* %p) nounwind { |
| 7 | if.end523: ; preds = %if.end453 |
| 8 | %conv7981749 = zext i32 %level to i64 ; <i64> [#uses=1] |
| 9 | %and799 = shl i64 %conv7981749, 16 ; <i64> [#uses=1] |
| 10 | %shl800 = and i64 %and799, 16711680 ; <i64> [#uses=1] |
| 11 | %or801 = or i64 %shl800, %a ; <i64> [#uses=1] |
| 12 | %or806 = or i64 %or801, %b ; <i64> [#uses=1] |
| 13 | %or811 = or i64 %or806, %c ; <i64> [#uses=1] |
| 14 | %or819 = or i64 %or811, %d ; <i64> [#uses=1] |
| 15 | %conv820 = trunc i64 %or819 to i32 ; <i32> [#uses=1] |
| 16 | store i32 %conv820, i32* %p |
| 17 | ret void |
| 18 | } |