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Evan Cheng09e8ca82008-10-20 21:44:59 +00001//===-- PreAllocSplitting.cpp - Pre-allocation Interval Spltting Pass. ----===//
2//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file implements the machine instruction level pre-register allocation
11// live interval splitting pass. It finds live interval barriers, i.e.
12// instructions which will kill all physical registers in certain register
13// classes, and split all live intervals which cross the barrier.
14//
15//===----------------------------------------------------------------------===//
16
17#define DEBUG_TYPE "pre-alloc-split"
18#include "llvm/CodeGen/LiveIntervalAnalysis.h"
Evan Chengd0e32c52008-10-29 05:06:14 +000019#include "llvm/CodeGen/LiveStackAnalysis.h"
Owen Andersonf1f75b12008-11-04 22:22:41 +000020#include "llvm/CodeGen/MachineDominators.h"
Evan Chengf5cd4f02008-10-23 20:43:13 +000021#include "llvm/CodeGen/MachineFrameInfo.h"
Evan Cheng09e8ca82008-10-20 21:44:59 +000022#include "llvm/CodeGen/MachineFunctionPass.h"
23#include "llvm/CodeGen/MachineLoopInfo.h"
24#include "llvm/CodeGen/MachineRegisterInfo.h"
25#include "llvm/CodeGen/Passes.h"
26#include "llvm/CodeGen/RegisterCoalescer.h"
Evan Chengf5cd4f02008-10-23 20:43:13 +000027#include "llvm/Target/TargetInstrInfo.h"
Evan Cheng09e8ca82008-10-20 21:44:59 +000028#include "llvm/Target/TargetMachine.h"
29#include "llvm/Target/TargetOptions.h"
30#include "llvm/Target/TargetRegisterInfo.h"
31#include "llvm/Support/CommandLine.h"
32#include "llvm/Support/Debug.h"
Evan Chengd0e32c52008-10-29 05:06:14 +000033#include "llvm/ADT/DenseMap.h"
Evan Cheng54898932008-10-29 08:39:34 +000034#include "llvm/ADT/DepthFirstIterator.h"
Evan Cheng09e8ca82008-10-20 21:44:59 +000035#include "llvm/ADT/SmallPtrSet.h"
Evan Chengf5cd4f02008-10-23 20:43:13 +000036#include "llvm/ADT/Statistic.h"
Evan Cheng09e8ca82008-10-20 21:44:59 +000037using namespace llvm;
38
Evan Chengae7fa5b2008-10-28 01:48:24 +000039static cl::opt<int> PreSplitLimit("pre-split-limit", cl::init(-1), cl::Hidden);
40
41STATISTIC(NumSplits, "Number of intervals split");
Owen Anderson75fa96b2008-11-19 04:28:29 +000042STATISTIC(NumRemats, "Number of intervals split by rematerialization");
Owen Anderson7b9d67c2008-12-02 18:53:47 +000043STATISTIC(NumFolds, "Number of intervals split with spill folding");
Evan Chengf5cd4f02008-10-23 20:43:13 +000044
Evan Cheng09e8ca82008-10-20 21:44:59 +000045namespace {
46 class VISIBILITY_HIDDEN PreAllocSplitting : public MachineFunctionPass {
Evan Chengd0e32c52008-10-29 05:06:14 +000047 MachineFunction *CurrMF;
Evan Chengf5cd4f02008-10-23 20:43:13 +000048 const TargetMachine *TM;
49 const TargetInstrInfo *TII;
50 MachineFrameInfo *MFI;
51 MachineRegisterInfo *MRI;
52 LiveIntervals *LIs;
Evan Chengd0e32c52008-10-29 05:06:14 +000053 LiveStacks *LSs;
Evan Cheng09e8ca82008-10-20 21:44:59 +000054
Evan Chengf5cd4f02008-10-23 20:43:13 +000055 // Barrier - Current barrier being processed.
56 MachineInstr *Barrier;
57
58 // BarrierMBB - Basic block where the barrier resides in.
59 MachineBasicBlock *BarrierMBB;
60
61 // Barrier - Current barrier index.
62 unsigned BarrierIdx;
63
64 // CurrLI - Current live interval being split.
65 LiveInterval *CurrLI;
66
Evan Chengd0e32c52008-10-29 05:06:14 +000067 // CurrSLI - Current stack slot live interval.
68 LiveInterval *CurrSLI;
69
70 // CurrSValNo - Current val# for the stack slot live interval.
71 VNInfo *CurrSValNo;
72
73 // IntervalSSMap - A map from live interval to spill slots.
74 DenseMap<unsigned, int> IntervalSSMap;
Evan Chengf5cd4f02008-10-23 20:43:13 +000075
Evan Cheng54898932008-10-29 08:39:34 +000076 // Def2SpillMap - A map from a def instruction index to spill index.
77 DenseMap<unsigned, unsigned> Def2SpillMap;
Evan Cheng06587492008-10-24 02:05:00 +000078
Evan Cheng09e8ca82008-10-20 21:44:59 +000079 public:
80 static char ID;
81 PreAllocSplitting() : MachineFunctionPass(&ID) {}
82
83 virtual bool runOnMachineFunction(MachineFunction &MF);
84
85 virtual void getAnalysisUsage(AnalysisUsage &AU) const {
86 AU.addRequired<LiveIntervals>();
87 AU.addPreserved<LiveIntervals>();
Evan Chengd0e32c52008-10-29 05:06:14 +000088 AU.addRequired<LiveStacks>();
89 AU.addPreserved<LiveStacks>();
Evan Cheng09e8ca82008-10-20 21:44:59 +000090 AU.addPreserved<RegisterCoalescer>();
91 if (StrongPHIElim)
92 AU.addPreservedID(StrongPHIEliminationID);
93 else
94 AU.addPreservedID(PHIEliminationID);
Owen Andersonf1f75b12008-11-04 22:22:41 +000095 AU.addRequired<MachineDominatorTree>();
96 AU.addRequired<MachineLoopInfo>();
97 AU.addPreserved<MachineDominatorTree>();
98 AU.addPreserved<MachineLoopInfo>();
Evan Cheng09e8ca82008-10-20 21:44:59 +000099 MachineFunctionPass::getAnalysisUsage(AU);
100 }
101
102 virtual void releaseMemory() {
Evan Chengd0e32c52008-10-29 05:06:14 +0000103 IntervalSSMap.clear();
Evan Cheng54898932008-10-29 08:39:34 +0000104 Def2SpillMap.clear();
Evan Cheng09e8ca82008-10-20 21:44:59 +0000105 }
106
107 virtual const char *getPassName() const {
108 return "Pre-Register Allocaton Live Interval Splitting";
109 }
Evan Chengf5cd4f02008-10-23 20:43:13 +0000110
111 /// print - Implement the dump method.
112 virtual void print(std::ostream &O, const Module* M = 0) const {
113 LIs->print(O, M);
114 }
115
116 void print(std::ostream *O, const Module* M = 0) const {
117 if (O) print(*O, M);
118 }
119
120 private:
121 MachineBasicBlock::iterator
122 findNextEmptySlot(MachineBasicBlock*, MachineInstr*,
123 unsigned&);
124
125 MachineBasicBlock::iterator
Evan Cheng1f08cc22008-10-28 05:28:21 +0000126 findSpillPoint(MachineBasicBlock*, MachineInstr*, MachineInstr*,
Evan Chengf5cd4f02008-10-23 20:43:13 +0000127 SmallPtrSet<MachineInstr*, 4>&, unsigned&);
128
129 MachineBasicBlock::iterator
Evan Chengf62ce372008-10-28 00:47:49 +0000130 findRestorePoint(MachineBasicBlock*, MachineInstr*, unsigned,
Evan Chengf5cd4f02008-10-23 20:43:13 +0000131 SmallPtrSet<MachineInstr*, 4>&, unsigned&);
132
Evan Chengd0e32c52008-10-29 05:06:14 +0000133 int CreateSpillStackSlot(unsigned, const TargetRegisterClass *);
Evan Chengf5cd4f02008-10-23 20:43:13 +0000134
Evan Cheng54898932008-10-29 08:39:34 +0000135 bool IsAvailableInStack(MachineBasicBlock*, unsigned, unsigned, unsigned,
136 unsigned&, int&) const;
Evan Chengf5cd4f02008-10-23 20:43:13 +0000137
Evan Chengd0e32c52008-10-29 05:06:14 +0000138 void UpdateSpillSlotInterval(VNInfo*, unsigned, unsigned);
Evan Chengf5cd4f02008-10-23 20:43:13 +0000139
Evan Chengd0e32c52008-10-29 05:06:14 +0000140 void UpdateRegisterInterval(VNInfo*, unsigned, unsigned);
141
142 bool ShrinkWrapToLastUse(MachineBasicBlock*, VNInfo*,
Evan Cheng06587492008-10-24 02:05:00 +0000143 SmallVector<MachineOperand*, 4>&,
144 SmallPtrSet<MachineInstr*, 4>&);
Evan Chengf5cd4f02008-10-23 20:43:13 +0000145
Evan Chengaaf510c2008-10-26 07:49:03 +0000146 void ShrinkWrapLiveInterval(VNInfo*, MachineBasicBlock*, MachineBasicBlock*,
Evan Chengf5cd4f02008-10-23 20:43:13 +0000147 MachineBasicBlock*, SmallPtrSet<MachineBasicBlock*, 8>&,
Evan Cheng06587492008-10-24 02:05:00 +0000148 DenseMap<MachineBasicBlock*, SmallVector<MachineOperand*, 4> >&,
149 DenseMap<MachineBasicBlock*, SmallPtrSet<MachineInstr*, 4> >&,
150 SmallVector<MachineBasicBlock*, 4>&);
Evan Chengf5cd4f02008-10-23 20:43:13 +0000151
152 bool SplitRegLiveInterval(LiveInterval*);
153
154 bool SplitRegLiveIntervals(const TargetRegisterClass **);
Owen Andersonf1f75b12008-11-04 22:22:41 +0000155
Owen Anderson6002e992008-12-04 21:20:30 +0000156 void RepairLiveInterval(LiveInterval* CurrLI, VNInfo* ValNo,
157 MachineInstr* DefMI, unsigned RestoreIdx);
158
Owen Andersonf1f75b12008-11-04 22:22:41 +0000159 bool createsNewJoin(LiveRange* LR, MachineBasicBlock* DefMBB,
160 MachineBasicBlock* BarrierMBB);
Owen Anderson75fa96b2008-11-19 04:28:29 +0000161 bool Rematerialize(unsigned vreg, VNInfo* ValNo,
162 MachineInstr* DefMI,
163 MachineBasicBlock::iterator RestorePt,
164 unsigned RestoreIdx,
165 SmallPtrSet<MachineInstr*, 4>& RefsInMBB);
Owen Anderson7b9d67c2008-12-02 18:53:47 +0000166 MachineInstr* FoldSpill(unsigned vreg, const TargetRegisterClass* RC,
167 MachineInstr* DefMI,
168 MachineInstr* Barrier,
169 MachineBasicBlock* MBB,
170 int& SS,
171 SmallPtrSet<MachineInstr*, 4>& RefsInMBB);
Owen Andersond0b6a0d2008-12-16 21:35:08 +0000172 void RenumberValno(VNInfo* VN);
Evan Cheng09e8ca82008-10-20 21:44:59 +0000173 };
174} // end anonymous namespace
175
176char PreAllocSplitting::ID = 0;
177
178static RegisterPass<PreAllocSplitting>
179X("pre-alloc-splitting", "Pre-Register Allocation Live Interval Splitting");
180
181const PassInfo *const llvm::PreAllocSplittingID = &X;
182
Evan Chengf5cd4f02008-10-23 20:43:13 +0000183
184/// findNextEmptySlot - Find a gap after the given machine instruction in the
185/// instruction index map. If there isn't one, return end().
186MachineBasicBlock::iterator
187PreAllocSplitting::findNextEmptySlot(MachineBasicBlock *MBB, MachineInstr *MI,
188 unsigned &SpotIndex) {
189 MachineBasicBlock::iterator MII = MI;
190 if (++MII != MBB->end()) {
191 unsigned Index = LIs->findGapBeforeInstr(LIs->getInstructionIndex(MII));
192 if (Index) {
193 SpotIndex = Index;
194 return MII;
195 }
196 }
197 return MBB->end();
198}
199
200/// findSpillPoint - Find a gap as far away from the given MI that's suitable
201/// for spilling the current live interval. The index must be before any
202/// defs and uses of the live interval register in the mbb. Return begin() if
203/// none is found.
204MachineBasicBlock::iterator
205PreAllocSplitting::findSpillPoint(MachineBasicBlock *MBB, MachineInstr *MI,
Evan Cheng1f08cc22008-10-28 05:28:21 +0000206 MachineInstr *DefMI,
Evan Chengf5cd4f02008-10-23 20:43:13 +0000207 SmallPtrSet<MachineInstr*, 4> &RefsInMBB,
208 unsigned &SpillIndex) {
209 MachineBasicBlock::iterator Pt = MBB->begin();
210
211 // Go top down if RefsInMBB is empty.
Evan Cheng1f08cc22008-10-28 05:28:21 +0000212 if (RefsInMBB.empty() && !DefMI) {
Evan Chengf5cd4f02008-10-23 20:43:13 +0000213 MachineBasicBlock::iterator MII = MBB->begin();
214 MachineBasicBlock::iterator EndPt = MI;
215 do {
216 ++MII;
217 unsigned Index = LIs->getInstructionIndex(MII);
218 unsigned Gap = LIs->findGapBeforeInstr(Index);
219 if (Gap) {
220 Pt = MII;
221 SpillIndex = Gap;
222 break;
223 }
224 } while (MII != EndPt);
225 } else {
226 MachineBasicBlock::iterator MII = MI;
Evan Cheng1f08cc22008-10-28 05:28:21 +0000227 MachineBasicBlock::iterator EndPt = DefMI
228 ? MachineBasicBlock::iterator(DefMI) : MBB->begin();
229 while (MII != EndPt && !RefsInMBB.count(MII)) {
Evan Chengf5cd4f02008-10-23 20:43:13 +0000230 unsigned Index = LIs->getInstructionIndex(MII);
231 if (LIs->hasGapBeforeInstr(Index)) {
232 Pt = MII;
233 SpillIndex = LIs->findGapBeforeInstr(Index, true);
234 }
235 --MII;
236 }
237 }
238
239 return Pt;
240}
241
242/// findRestorePoint - Find a gap in the instruction index map that's suitable
243/// for restoring the current live interval value. The index must be before any
244/// uses of the live interval register in the mbb. Return end() if none is
245/// found.
246MachineBasicBlock::iterator
247PreAllocSplitting::findRestorePoint(MachineBasicBlock *MBB, MachineInstr *MI,
Evan Chengf62ce372008-10-28 00:47:49 +0000248 unsigned LastIdx,
Evan Chengf5cd4f02008-10-23 20:43:13 +0000249 SmallPtrSet<MachineInstr*, 4> &RefsInMBB,
250 unsigned &RestoreIndex) {
Evan Cheng54898932008-10-29 08:39:34 +0000251 // FIXME: Allow spill to be inserted to the beginning of the mbb. Update mbb
252 // begin index accordingly.
Owen Anderson5a92d4e2008-11-18 20:53:59 +0000253 MachineBasicBlock::iterator Pt = MBB->end();
Evan Chengf62ce372008-10-28 00:47:49 +0000254 unsigned EndIdx = LIs->getMBBEndIdx(MBB);
Evan Chengf5cd4f02008-10-23 20:43:13 +0000255
Evan Chengf62ce372008-10-28 00:47:49 +0000256 // Go bottom up if RefsInMBB is empty and the end of the mbb isn't beyond
257 // the last index in the live range.
258 if (RefsInMBB.empty() && LastIdx >= EndIdx) {
Owen Anderson711fd3d2008-11-13 21:53:14 +0000259 MachineBasicBlock::iterator MII = MBB->getFirstTerminator();
Evan Chengf5cd4f02008-10-23 20:43:13 +0000260 MachineBasicBlock::iterator EndPt = MI;
Evan Cheng54898932008-10-29 08:39:34 +0000261 --MII;
Evan Chengf5cd4f02008-10-23 20:43:13 +0000262 do {
Evan Chengf5cd4f02008-10-23 20:43:13 +0000263 unsigned Index = LIs->getInstructionIndex(MII);
Evan Cheng56ab0de2008-10-24 18:46:44 +0000264 unsigned Gap = LIs->findGapBeforeInstr(Index);
Evan Chengf5cd4f02008-10-23 20:43:13 +0000265 if (Gap) {
266 Pt = MII;
267 RestoreIndex = Gap;
268 break;
269 }
Evan Cheng54898932008-10-29 08:39:34 +0000270 --MII;
Evan Chengf5cd4f02008-10-23 20:43:13 +0000271 } while (MII != EndPt);
272 } else {
273 MachineBasicBlock::iterator MII = MI;
274 MII = ++MII;
Evan Chengf62ce372008-10-28 00:47:49 +0000275 // FIXME: Limit the number of instructions to examine to reduce
276 // compile time?
Evan Chengf5cd4f02008-10-23 20:43:13 +0000277 while (MII != MBB->end()) {
278 unsigned Index = LIs->getInstructionIndex(MII);
Evan Chengf62ce372008-10-28 00:47:49 +0000279 if (Index > LastIdx)
280 break;
Evan Chengf5cd4f02008-10-23 20:43:13 +0000281 unsigned Gap = LIs->findGapBeforeInstr(Index);
282 if (Gap) {
283 Pt = MII;
284 RestoreIndex = Gap;
285 }
286 if (RefsInMBB.count(MII))
287 break;
288 ++MII;
289 }
290 }
291
292 return Pt;
293}
294
Evan Chengd0e32c52008-10-29 05:06:14 +0000295/// CreateSpillStackSlot - Create a stack slot for the live interval being
296/// split. If the live interval was previously split, just reuse the same
297/// slot.
298int PreAllocSplitting::CreateSpillStackSlot(unsigned Reg,
299 const TargetRegisterClass *RC) {
300 int SS;
301 DenseMap<unsigned, int>::iterator I = IntervalSSMap.find(Reg);
302 if (I != IntervalSSMap.end()) {
303 SS = I->second;
304 } else {
305 SS = MFI->CreateStackObject(RC->getSize(), RC->getAlignment());
306 IntervalSSMap[Reg] = SS;
Evan Cheng06587492008-10-24 02:05:00 +0000307 }
Evan Chengd0e32c52008-10-29 05:06:14 +0000308
309 // Create live interval for stack slot.
310 CurrSLI = &LSs->getOrCreateInterval(SS);
Evan Cheng54898932008-10-29 08:39:34 +0000311 if (CurrSLI->hasAtLeastOneValue())
Evan Chengd0e32c52008-10-29 05:06:14 +0000312 CurrSValNo = CurrSLI->getValNumInfo(0);
313 else
314 CurrSValNo = CurrSLI->getNextValue(~0U, 0, LSs->getVNInfoAllocator());
315 return SS;
Evan Chengf5cd4f02008-10-23 20:43:13 +0000316}
317
Evan Chengd0e32c52008-10-29 05:06:14 +0000318/// IsAvailableInStack - Return true if register is available in a split stack
319/// slot at the specified index.
320bool
Evan Cheng54898932008-10-29 08:39:34 +0000321PreAllocSplitting::IsAvailableInStack(MachineBasicBlock *DefMBB,
322 unsigned Reg, unsigned DefIndex,
323 unsigned RestoreIndex, unsigned &SpillIndex,
324 int& SS) const {
325 if (!DefMBB)
326 return false;
327
Evan Chengd0e32c52008-10-29 05:06:14 +0000328 DenseMap<unsigned, int>::iterator I = IntervalSSMap.find(Reg);
329 if (I == IntervalSSMap.end())
Evan Chengf5cd4f02008-10-23 20:43:13 +0000330 return false;
Evan Cheng54898932008-10-29 08:39:34 +0000331 DenseMap<unsigned, unsigned>::iterator II = Def2SpillMap.find(DefIndex);
332 if (II == Def2SpillMap.end())
333 return false;
334
335 // If last spill of def is in the same mbb as barrier mbb (where restore will
336 // be), make sure it's not below the intended restore index.
337 // FIXME: Undo the previous spill?
338 assert(LIs->getMBBFromIndex(II->second) == DefMBB);
339 if (DefMBB == BarrierMBB && II->second >= RestoreIndex)
340 return false;
341
342 SS = I->second;
343 SpillIndex = II->second;
344 return true;
Evan Chengf5cd4f02008-10-23 20:43:13 +0000345}
346
Evan Chengd0e32c52008-10-29 05:06:14 +0000347/// UpdateSpillSlotInterval - Given the specified val# of the register live
348/// interval being split, and the spill and restore indicies, update the live
349/// interval of the spill stack slot.
350void
351PreAllocSplitting::UpdateSpillSlotInterval(VNInfo *ValNo, unsigned SpillIndex,
352 unsigned RestoreIndex) {
Evan Cheng54898932008-10-29 08:39:34 +0000353 assert(LIs->getMBBFromIndex(RestoreIndex) == BarrierMBB &&
354 "Expect restore in the barrier mbb");
355
356 MachineBasicBlock *MBB = LIs->getMBBFromIndex(SpillIndex);
357 if (MBB == BarrierMBB) {
358 // Intra-block spill + restore. We are done.
Evan Chengd0e32c52008-10-29 05:06:14 +0000359 LiveRange SLR(SpillIndex, RestoreIndex, CurrSValNo);
360 CurrSLI->addRange(SLR);
361 return;
362 }
363
Evan Cheng54898932008-10-29 08:39:34 +0000364 SmallPtrSet<MachineBasicBlock*, 4> Processed;
365 unsigned EndIdx = LIs->getMBBEndIdx(MBB);
366 LiveRange SLR(SpillIndex, EndIdx+1, CurrSValNo);
Evan Chengd0e32c52008-10-29 05:06:14 +0000367 CurrSLI->addRange(SLR);
Evan Cheng54898932008-10-29 08:39:34 +0000368 Processed.insert(MBB);
Evan Chengd0e32c52008-10-29 05:06:14 +0000369
370 // Start from the spill mbb, figure out the extend of the spill slot's
371 // live interval.
372 SmallVector<MachineBasicBlock*, 4> WorkList;
Evan Cheng54898932008-10-29 08:39:34 +0000373 const LiveRange *LR = CurrLI->getLiveRangeContaining(SpillIndex);
374 if (LR->end > EndIdx)
Evan Chengd0e32c52008-10-29 05:06:14 +0000375 // If live range extend beyond end of mbb, add successors to work list.
376 for (MachineBasicBlock::succ_iterator SI = MBB->succ_begin(),
377 SE = MBB->succ_end(); SI != SE; ++SI)
378 WorkList.push_back(*SI);
Evan Chengd0e32c52008-10-29 05:06:14 +0000379
380 while (!WorkList.empty()) {
381 MachineBasicBlock *MBB = WorkList.back();
382 WorkList.pop_back();
Evan Cheng54898932008-10-29 08:39:34 +0000383 if (Processed.count(MBB))
384 continue;
Evan Chengd0e32c52008-10-29 05:06:14 +0000385 unsigned Idx = LIs->getMBBStartIdx(MBB);
386 LR = CurrLI->getLiveRangeContaining(Idx);
Evan Cheng54898932008-10-29 08:39:34 +0000387 if (LR && LR->valno == ValNo) {
388 EndIdx = LIs->getMBBEndIdx(MBB);
389 if (Idx <= RestoreIndex && RestoreIndex < EndIdx) {
Evan Chengd0e32c52008-10-29 05:06:14 +0000390 // Spill slot live interval stops at the restore.
Evan Cheng54898932008-10-29 08:39:34 +0000391 LiveRange SLR(Idx, RestoreIndex, CurrSValNo);
Evan Chengd0e32c52008-10-29 05:06:14 +0000392 CurrSLI->addRange(SLR);
Evan Cheng54898932008-10-29 08:39:34 +0000393 } else if (LR->end > EndIdx) {
394 // Live range extends beyond end of mbb, process successors.
395 LiveRange SLR(Idx, EndIdx+1, CurrSValNo);
396 CurrSLI->addRange(SLR);
397 for (MachineBasicBlock::succ_iterator SI = MBB->succ_begin(),
398 SE = MBB->succ_end(); SI != SE; ++SI)
399 WorkList.push_back(*SI);
Evan Chengd0e32c52008-10-29 05:06:14 +0000400 } else {
Evan Cheng54898932008-10-29 08:39:34 +0000401 LiveRange SLR(Idx, LR->end, CurrSValNo);
Evan Chengd0e32c52008-10-29 05:06:14 +0000402 CurrSLI->addRange(SLR);
Evan Chengd0e32c52008-10-29 05:06:14 +0000403 }
Evan Cheng54898932008-10-29 08:39:34 +0000404 Processed.insert(MBB);
Evan Chengd0e32c52008-10-29 05:06:14 +0000405 }
406 }
407}
408
409/// UpdateRegisterInterval - Given the specified val# of the current live
410/// interval is being split, and the spill and restore indices, update the live
Evan Chengf5cd4f02008-10-23 20:43:13 +0000411/// interval accordingly.
412void
Evan Chengd0e32c52008-10-29 05:06:14 +0000413PreAllocSplitting::UpdateRegisterInterval(VNInfo *ValNo, unsigned SpillIndex,
414 unsigned RestoreIndex) {
Evan Cheng54898932008-10-29 08:39:34 +0000415 assert(LIs->getMBBFromIndex(RestoreIndex) == BarrierMBB &&
416 "Expect restore in the barrier mbb");
417
Evan Chengf5cd4f02008-10-23 20:43:13 +0000418 SmallVector<std::pair<unsigned,unsigned>, 4> Before;
419 SmallVector<std::pair<unsigned,unsigned>, 4> After;
420 SmallVector<unsigned, 4> BeforeKills;
421 SmallVector<unsigned, 4> AfterKills;
422 SmallPtrSet<const LiveRange*, 4> Processed;
423
424 // First, let's figure out which parts of the live interval is now defined
425 // by the restore, which are defined by the original definition.
Evan Chengd0e32c52008-10-29 05:06:14 +0000426 const LiveRange *LR = CurrLI->getLiveRangeContaining(RestoreIndex);
427 After.push_back(std::make_pair(RestoreIndex, LR->end));
Evan Cheng06587492008-10-24 02:05:00 +0000428 if (CurrLI->isKill(ValNo, LR->end))
429 AfterKills.push_back(LR->end);
430
Evan Chengd0e32c52008-10-29 05:06:14 +0000431 assert(LR->contains(SpillIndex));
432 if (SpillIndex > LR->start) {
433 Before.push_back(std::make_pair(LR->start, SpillIndex));
434 BeforeKills.push_back(SpillIndex);
Evan Cheng06587492008-10-24 02:05:00 +0000435 }
Evan Chengf5cd4f02008-10-23 20:43:13 +0000436 Processed.insert(LR);
437
Evan Chengd0e32c52008-10-29 05:06:14 +0000438 // Start from the restore mbb, figure out what part of the live interval
439 // are defined by the restore.
Evan Chengf5cd4f02008-10-23 20:43:13 +0000440 SmallVector<MachineBasicBlock*, 4> WorkList;
Evan Cheng54898932008-10-29 08:39:34 +0000441 MachineBasicBlock *MBB = BarrierMBB;
Evan Chengf5cd4f02008-10-23 20:43:13 +0000442 for (MachineBasicBlock::succ_iterator SI = MBB->succ_begin(),
443 SE = MBB->succ_end(); SI != SE; ++SI)
444 WorkList.push_back(*SI);
445
Owen Anderson75c99c52008-12-07 05:33:18 +0000446 SmallPtrSet<MachineBasicBlock*, 4> ProcessedBlocks;
447 ProcessedBlocks.insert(MBB);
448
Evan Chengf5cd4f02008-10-23 20:43:13 +0000449 while (!WorkList.empty()) {
450 MBB = WorkList.back();
451 WorkList.pop_back();
452 unsigned Idx = LIs->getMBBStartIdx(MBB);
453 LR = CurrLI->getLiveRangeContaining(Idx);
454 if (LR && LR->valno == ValNo && !Processed.count(LR)) {
455 After.push_back(std::make_pair(LR->start, LR->end));
456 if (CurrLI->isKill(ValNo, LR->end))
457 AfterKills.push_back(LR->end);
458 Idx = LIs->getMBBEndIdx(MBB);
459 if (LR->end > Idx) {
Evan Chengd0e32c52008-10-29 05:06:14 +0000460 // Live range extend beyond at least one mbb. Let's see what other
461 // mbbs it reaches.
462 LIs->findReachableMBBs(LR->start, LR->end, WorkList);
Evan Chengf5cd4f02008-10-23 20:43:13 +0000463 }
464 Processed.insert(LR);
465 }
Owen Anderson75c99c52008-12-07 05:33:18 +0000466
467 ProcessedBlocks.insert(MBB);
468 if (LR)
469 for (MachineBasicBlock::succ_iterator SI = MBB->succ_begin(),
470 SE = MBB->succ_end(); SI != SE; ++SI)
471 if (!ProcessedBlocks.count(*SI))
472 WorkList.push_back(*SI);
Evan Chengf5cd4f02008-10-23 20:43:13 +0000473 }
474
475 for (LiveInterval::iterator I = CurrLI->begin(), E = CurrLI->end();
476 I != E; ++I) {
477 LiveRange *LR = I;
478 if (LR->valno == ValNo && !Processed.count(LR)) {
479 Before.push_back(std::make_pair(LR->start, LR->end));
480 if (CurrLI->isKill(ValNo, LR->end))
481 BeforeKills.push_back(LR->end);
482 }
483 }
484
485 // Now create new val#s to represent the live ranges defined by the old def
486 // those defined by the restore.
487 unsigned AfterDef = ValNo->def;
488 MachineInstr *AfterCopy = ValNo->copy;
489 bool HasPHIKill = ValNo->hasPHIKill;
490 CurrLI->removeValNo(ValNo);
Evan Cheng06587492008-10-24 02:05:00 +0000491 VNInfo *BValNo = (Before.empty())
492 ? NULL
493 : CurrLI->getNextValue(AfterDef, AfterCopy, LIs->getVNInfoAllocator());
494 if (BValNo)
495 CurrLI->addKills(BValNo, BeforeKills);
496
497 VNInfo *AValNo = (After.empty())
498 ? NULL
Evan Chengd0e32c52008-10-29 05:06:14 +0000499 : CurrLI->getNextValue(RestoreIndex, 0, LIs->getVNInfoAllocator());
Evan Cheng06587492008-10-24 02:05:00 +0000500 if (AValNo) {
501 AValNo->hasPHIKill = HasPHIKill;
502 CurrLI->addKills(AValNo, AfterKills);
503 }
Evan Chengf5cd4f02008-10-23 20:43:13 +0000504
505 for (unsigned i = 0, e = Before.size(); i != e; ++i) {
506 unsigned Start = Before[i].first;
507 unsigned End = Before[i].second;
508 CurrLI->addRange(LiveRange(Start, End, BValNo));
509 }
510 for (unsigned i = 0, e = After.size(); i != e; ++i) {
511 unsigned Start = After[i].first;
512 unsigned End = After[i].second;
513 CurrLI->addRange(LiveRange(Start, End, AValNo));
514 }
515}
516
517/// ShrinkWrapToLastUse - There are uses of the current live interval in the
518/// given block, shrink wrap the live interval to the last use (i.e. remove
519/// from last use to the end of the mbb). In case mbb is the where the barrier
520/// is, remove from the last use to the barrier.
521bool
Evan Chengd0e32c52008-10-29 05:06:14 +0000522PreAllocSplitting::ShrinkWrapToLastUse(MachineBasicBlock *MBB, VNInfo *ValNo,
Evan Cheng06587492008-10-24 02:05:00 +0000523 SmallVector<MachineOperand*, 4> &Uses,
524 SmallPtrSet<MachineInstr*, 4> &UseMIs) {
Evan Chengf5cd4f02008-10-23 20:43:13 +0000525 MachineOperand *LastMO = 0;
526 MachineInstr *LastMI = 0;
527 if (MBB != BarrierMBB && Uses.size() == 1) {
528 // Single use, no need to traverse the block. We can't assume this for the
529 // barrier bb though since the use is probably below the barrier.
530 LastMO = Uses[0];
531 LastMI = LastMO->getParent();
532 } else {
Evan Cheng2efe3fd2008-10-24 05:53:44 +0000533 MachineBasicBlock::iterator MEE = MBB->begin();
Evan Chengf5cd4f02008-10-23 20:43:13 +0000534 MachineBasicBlock::iterator MII;
Evan Cheng2efe3fd2008-10-24 05:53:44 +0000535 if (MBB == BarrierMBB)
Evan Chengf5cd4f02008-10-23 20:43:13 +0000536 MII = Barrier;
Evan Cheng2efe3fd2008-10-24 05:53:44 +0000537 else
Evan Chengf5cd4f02008-10-23 20:43:13 +0000538 MII = MBB->end();
Evan Chengd0e32c52008-10-29 05:06:14 +0000539 while (MII != MEE) {
540 --MII;
Evan Chengf5cd4f02008-10-23 20:43:13 +0000541 MachineInstr *UseMI = &*MII;
542 if (!UseMIs.count(UseMI))
543 continue;
544 for (unsigned i = 0, e = UseMI->getNumOperands(); i != e; ++i) {
545 MachineOperand &MO = UseMI->getOperand(i);
546 if (MO.isReg() && MO.getReg() == CurrLI->reg) {
547 LastMO = &MO;
548 break;
549 }
550 }
551 LastMI = UseMI;
552 break;
553 }
554 }
555
556 // Cut off live range from last use (or beginning of the mbb if there
557 // are no uses in it) to the end of the mbb.
558 unsigned RangeStart, RangeEnd = LIs->getMBBEndIdx(MBB)+1;
559 if (LastMI) {
560 RangeStart = LIs->getUseIndex(LIs->getInstructionIndex(LastMI))+1;
561 assert(!LastMO->isKill() && "Last use already terminates the interval?");
562 LastMO->setIsKill();
563 } else {
564 assert(MBB == BarrierMBB);
565 RangeStart = LIs->getMBBStartIdx(MBB);
566 }
567 if (MBB == BarrierMBB)
Evan Cheng06587492008-10-24 02:05:00 +0000568 RangeEnd = LIs->getUseIndex(BarrierIdx)+1;
Evan Chengf5cd4f02008-10-23 20:43:13 +0000569 CurrLI->removeRange(RangeStart, RangeEnd);
Evan Chengd0e32c52008-10-29 05:06:14 +0000570 if (LastMI)
571 CurrLI->addKill(ValNo, RangeStart);
Evan Chengf5cd4f02008-10-23 20:43:13 +0000572
573 // Return true if the last use becomes a new kill.
574 return LastMI;
575}
576
577/// ShrinkWrapLiveInterval - Recursively traverse the predecessor
578/// chain to find the new 'kills' and shrink wrap the live interval to the
579/// new kill indices.
580void
Evan Chengaaf510c2008-10-26 07:49:03 +0000581PreAllocSplitting::ShrinkWrapLiveInterval(VNInfo *ValNo, MachineBasicBlock *MBB,
582 MachineBasicBlock *SuccMBB, MachineBasicBlock *DefMBB,
Evan Cheng06587492008-10-24 02:05:00 +0000583 SmallPtrSet<MachineBasicBlock*, 8> &Visited,
584 DenseMap<MachineBasicBlock*, SmallVector<MachineOperand*, 4> > &Uses,
585 DenseMap<MachineBasicBlock*, SmallPtrSet<MachineInstr*, 4> > &UseMIs,
586 SmallVector<MachineBasicBlock*, 4> &UseMBBs) {
Evan Chengaaf510c2008-10-26 07:49:03 +0000587 if (Visited.count(MBB))
Evan Chengf5cd4f02008-10-23 20:43:13 +0000588 return;
589
Evan Chengaaf510c2008-10-26 07:49:03 +0000590 // If live interval is live in another successor path, then we can't process
591 // this block. But we may able to do so after all the successors have been
592 // processed.
Evan Chengf62ce372008-10-28 00:47:49 +0000593 if (MBB != BarrierMBB) {
594 for (MachineBasicBlock::succ_iterator SI = MBB->succ_begin(),
595 SE = MBB->succ_end(); SI != SE; ++SI) {
596 MachineBasicBlock *SMBB = *SI;
597 if (SMBB == SuccMBB)
598 continue;
599 if (CurrLI->liveAt(LIs->getMBBStartIdx(SMBB)))
600 return;
601 }
Evan Chengaaf510c2008-10-26 07:49:03 +0000602 }
603
604 Visited.insert(MBB);
605
Evan Cheng06587492008-10-24 02:05:00 +0000606 DenseMap<MachineBasicBlock*, SmallVector<MachineOperand*, 4> >::iterator
607 UMII = Uses.find(MBB);
Evan Chengf5cd4f02008-10-23 20:43:13 +0000608 if (UMII != Uses.end()) {
609 // At least one use in this mbb, lets look for the kill.
Evan Cheng06587492008-10-24 02:05:00 +0000610 DenseMap<MachineBasicBlock*, SmallPtrSet<MachineInstr*, 4> >::iterator
611 UMII2 = UseMIs.find(MBB);
Evan Chengd0e32c52008-10-29 05:06:14 +0000612 if (ShrinkWrapToLastUse(MBB, ValNo, UMII->second, UMII2->second))
Evan Chengf5cd4f02008-10-23 20:43:13 +0000613 // Found a kill, shrink wrapping of this path ends here.
614 return;
Evan Cheng06587492008-10-24 02:05:00 +0000615 } else if (MBB == DefMBB) {
Evan Cheng06587492008-10-24 02:05:00 +0000616 // There are no uses after the def.
617 MachineInstr *DefMI = LIs->getInstructionFromIndex(ValNo->def);
Evan Cheng06587492008-10-24 02:05:00 +0000618 if (UseMBBs.empty()) {
619 // The only use must be below barrier in the barrier block. It's safe to
620 // remove the def.
621 LIs->RemoveMachineInstrFromMaps(DefMI);
622 DefMI->eraseFromParent();
623 CurrLI->removeRange(ValNo->def, LIs->getMBBEndIdx(MBB)+1);
624 }
Evan Cheng79d5b5a2008-10-25 23:49:39 +0000625 } else if (MBB == BarrierMBB) {
626 // Remove entire live range from start of mbb to barrier.
627 CurrLI->removeRange(LIs->getMBBStartIdx(MBB),
628 LIs->getUseIndex(BarrierIdx)+1);
Evan Chengf5cd4f02008-10-23 20:43:13 +0000629 } else {
Evan Cheng79d5b5a2008-10-25 23:49:39 +0000630 // Remove entire live range of the mbb out of the live interval.
Evan Cheng06587492008-10-24 02:05:00 +0000631 CurrLI->removeRange(LIs->getMBBStartIdx(MBB), LIs->getMBBEndIdx(MBB)+1);
Evan Chengf5cd4f02008-10-23 20:43:13 +0000632 }
633
634 if (MBB == DefMBB)
635 // Reached the def mbb, stop traversing this path further.
636 return;
637
638 // Traverse the pathes up the predecessor chains further.
639 for (MachineBasicBlock::pred_iterator PI = MBB->pred_begin(),
640 PE = MBB->pred_end(); PI != PE; ++PI) {
641 MachineBasicBlock *Pred = *PI;
642 if (Pred == MBB)
643 continue;
644 if (Pred == DefMBB && ValNo->hasPHIKill)
645 // Pred is the def bb and the def reaches other val#s, we must
646 // allow the value to be live out of the bb.
647 continue;
Owen Anderson80fe8732008-11-11 22:11:27 +0000648 if (!CurrLI->liveAt(LIs->getMBBEndIdx(Pred)-1))
649 return;
Evan Chengaaf510c2008-10-26 07:49:03 +0000650 ShrinkWrapLiveInterval(ValNo, Pred, MBB, DefMBB, Visited,
651 Uses, UseMIs, UseMBBs);
Evan Chengf5cd4f02008-10-23 20:43:13 +0000652 }
653
654 return;
655}
656
Owen Anderson75fa96b2008-11-19 04:28:29 +0000657
Owen Anderson6002e992008-12-04 21:20:30 +0000658void PreAllocSplitting::RepairLiveInterval(LiveInterval* CurrLI,
659 VNInfo* ValNo,
660 MachineInstr* DefMI,
661 unsigned RestoreIdx) {
Owen Anderson75fa96b2008-11-19 04:28:29 +0000662 // Shrink wrap the live interval by walking up the CFG and find the
663 // new kills.
664 // Now let's find all the uses of the val#.
665 DenseMap<MachineBasicBlock*, SmallVector<MachineOperand*, 4> > Uses;
666 DenseMap<MachineBasicBlock*, SmallPtrSet<MachineInstr*, 4> > UseMIs;
667 SmallPtrSet<MachineBasicBlock*, 4> Seen;
668 SmallVector<MachineBasicBlock*, 4> UseMBBs;
669 for (MachineRegisterInfo::use_iterator UI = MRI->use_begin(CurrLI->reg),
670 UE = MRI->use_end(); UI != UE; ++UI) {
671 MachineOperand &UseMO = UI.getOperand();
672 MachineInstr *UseMI = UseMO.getParent();
673 unsigned UseIdx = LIs->getInstructionIndex(UseMI);
674 LiveInterval::iterator ULR = CurrLI->FindLiveRangeContaining(UseIdx);
675 if (ULR->valno != ValNo)
676 continue;
677 MachineBasicBlock *UseMBB = UseMI->getParent();
678 // Remember which other mbb's use this val#.
679 if (Seen.insert(UseMBB) && UseMBB != BarrierMBB)
680 UseMBBs.push_back(UseMBB);
681 DenseMap<MachineBasicBlock*, SmallVector<MachineOperand*, 4> >::iterator
682 UMII = Uses.find(UseMBB);
683 if (UMII != Uses.end()) {
684 DenseMap<MachineBasicBlock*, SmallPtrSet<MachineInstr*, 4> >::iterator
685 UMII2 = UseMIs.find(UseMBB);
686 UMII->second.push_back(&UseMO);
687 UMII2->second.insert(UseMI);
688 } else {
689 SmallVector<MachineOperand*, 4> Ops;
690 Ops.push_back(&UseMO);
691 Uses.insert(std::make_pair(UseMBB, Ops));
692 SmallPtrSet<MachineInstr*, 4> MIs;
693 MIs.insert(UseMI);
694 UseMIs.insert(std::make_pair(UseMBB, MIs));
695 }
696 }
697
698 // Walk up the predecessor chains.
699 SmallPtrSet<MachineBasicBlock*, 8> Visited;
700 ShrinkWrapLiveInterval(ValNo, BarrierMBB, NULL, DefMI->getParent(), Visited,
701 Uses, UseMIs, UseMBBs);
702
Owen Andersond0b6a0d2008-12-16 21:35:08 +0000703#if 0
704 if (!ValNo->hasPHIKill)
705 RenumberValno();
706#endif
Owen Anderson75fa96b2008-11-19 04:28:29 +0000707 // FIXME: If ValNo->hasPHIKill is false, then renumber the val# by
708 // the restore.
709
710 // Remove live range from barrier to the restore. FIXME: Find a better
711 // point to re-start the live interval.
712 UpdateRegisterInterval(ValNo, LIs->getUseIndex(BarrierIdx)+1,
713 LIs->getDefIndex(RestoreIdx));
Owen Anderson6002e992008-12-04 21:20:30 +0000714}
Owen Andersond0b6a0d2008-12-16 21:35:08 +0000715
716/// RenumberValno - Split the given valno out into a new vreg, allowing it to
717/// be allocated to a different register. This function creates a new vreg,
718/// copies the valno and its live ranges over to the new vreg's interval,
719/// removes them from the old interval, and rewrites all uses and defs of
720/// the original reg to the new vreg within those ranges.
721void PreAllocSplitting::RenumberValno(VNInfo* VN) {
722 // Create the new vreg
723 unsigned NewVReg = MRI->createVirtualRegister(MRI->getRegClass(CurrLI->reg));
724
725 // Copy over the valno and ranges
726 LiveInterval& NewLI = LIs->getOrCreateInterval(NewVReg);
727 VNInfo* NewVN = NewLI.getNextValue(VN->def, VN->copy,
728 LIs->getVNInfoAllocator());
729 NewLI.copyValNumInfo(NewVN, VN);
730 NewLI.MergeValueInAsValue(*CurrLI, VN, NewVN);
731
732 // Remove the valno from the old interval
733 CurrLI->removeValNo(VN);
734
735 // Rewrite defs and uses. This is done in two stages to avoid invalidating
736 // the reg_iterator.
737 SmallVector<std::pair<MachineInstr*, unsigned>, 8> OpsToChange;
738
739 for (MachineRegisterInfo::reg_iterator I = MRI->reg_begin(CurrLI->reg),
740 E = MRI->reg_end(); I != E; ++I) {
741 MachineOperand& MO = I.getOperand();
742 unsigned InstrIdx = LIs->getInstructionIndex(&*I);
743
744 if ((MO.isUse() && NewLI.liveAt(LiveIntervals::getUseIndex(InstrIdx))) ||
745 (MO.isDef() && NewLI.liveAt(LiveIntervals::getDefIndex(InstrIdx))))
746 OpsToChange.push_back(std::make_pair(&*I, I.getOperandNo()));
747 }
748
749 for (SmallVector<std::pair<MachineInstr*, unsigned>, 8>::iterator I =
750 OpsToChange.begin(), E = OpsToChange.end(); I != E; ++I) {
751 MachineInstr* Inst = I->first;
752 unsigned OpIdx = I->second;
753 MachineOperand& MO = Inst->getOperand(OpIdx);
754 MO.setReg(NewVReg);
755 }
756}
757
Owen Anderson6002e992008-12-04 21:20:30 +0000758bool PreAllocSplitting::Rematerialize(unsigned vreg, VNInfo* ValNo,
759 MachineInstr* DefMI,
760 MachineBasicBlock::iterator RestorePt,
761 unsigned RestoreIdx,
762 SmallPtrSet<MachineInstr*, 4>& RefsInMBB) {
763 MachineBasicBlock& MBB = *RestorePt->getParent();
764
765 MachineBasicBlock::iterator KillPt = BarrierMBB->end();
766 unsigned KillIdx = 0;
767 if (ValNo->def == ~0U || DefMI->getParent() == BarrierMBB)
768 KillPt = findSpillPoint(BarrierMBB, Barrier, NULL, RefsInMBB, KillIdx);
769 else
770 KillPt = findNextEmptySlot(DefMI->getParent(), DefMI, KillIdx);
771
772 if (KillPt == DefMI->getParent()->end())
773 return false;
774
775 TII->reMaterialize(MBB, RestorePt, vreg, DefMI);
776 LIs->InsertMachineInstrInMaps(prior(RestorePt), RestoreIdx);
777
778 if (KillPt->getParent() == BarrierMBB) {
779 UpdateRegisterInterval(ValNo, LIs->getUseIndex(KillIdx)+1,
780 LIs->getDefIndex(RestoreIdx));
781
782 ++NumSplits;
783 ++NumRemats;
784 return true;
785 }
786
787 RepairLiveInterval(CurrLI, ValNo, DefMI, RestoreIdx);
Owen Anderson75fa96b2008-11-19 04:28:29 +0000788
789 ++NumSplits;
790 ++NumRemats;
Owen Anderson7b9d67c2008-12-02 18:53:47 +0000791 return true;
792}
793
794MachineInstr* PreAllocSplitting::FoldSpill(unsigned vreg,
795 const TargetRegisterClass* RC,
796 MachineInstr* DefMI,
797 MachineInstr* Barrier,
798 MachineBasicBlock* MBB,
799 int& SS,
800 SmallPtrSet<MachineInstr*, 4>& RefsInMBB) {
801 MachineBasicBlock::iterator Pt = MBB->begin();
802
803 // Go top down if RefsInMBB is empty.
804 if (RefsInMBB.empty())
805 return 0;
Owen Anderson75fa96b2008-11-19 04:28:29 +0000806
Owen Anderson7b9d67c2008-12-02 18:53:47 +0000807 MachineBasicBlock::iterator FoldPt = Barrier;
808 while (&*FoldPt != DefMI && FoldPt != MBB->begin() &&
809 !RefsInMBB.count(FoldPt))
810 --FoldPt;
811
812 int OpIdx = FoldPt->findRegisterDefOperandIdx(vreg, false);
813 if (OpIdx == -1)
814 return 0;
815
816 SmallVector<unsigned, 1> Ops;
817 Ops.push_back(OpIdx);
818
819 if (!TII->canFoldMemoryOperand(FoldPt, Ops))
820 return 0;
821
822 DenseMap<unsigned, int>::iterator I = IntervalSSMap.find(vreg);
823 if (I != IntervalSSMap.end()) {
824 SS = I->second;
825 } else {
826 SS = MFI->CreateStackObject(RC->getSize(), RC->getAlignment());
827
828 }
829
830 MachineInstr* FMI = TII->foldMemoryOperand(*MBB->getParent(),
831 FoldPt, Ops, SS);
832
833 if (FMI) {
834 LIs->ReplaceMachineInstrInMaps(FoldPt, FMI);
835 FMI = MBB->insert(MBB->erase(FoldPt), FMI);
836 ++NumFolds;
837
838 IntervalSSMap[vreg] = SS;
839 CurrSLI = &LSs->getOrCreateInterval(SS);
840 if (CurrSLI->hasAtLeastOneValue())
841 CurrSValNo = CurrSLI->getValNumInfo(0);
842 else
843 CurrSValNo = CurrSLI->getNextValue(~0U, 0, LSs->getVNInfoAllocator());
844 }
845
846 return FMI;
Owen Anderson75fa96b2008-11-19 04:28:29 +0000847}
848
Evan Chengf5cd4f02008-10-23 20:43:13 +0000849/// SplitRegLiveInterval - Split (spill and restore) the given live interval
850/// so it would not cross the barrier that's being processed. Shrink wrap
851/// (minimize) the live interval to the last uses.
852bool PreAllocSplitting::SplitRegLiveInterval(LiveInterval *LI) {
853 CurrLI = LI;
854
855 // Find live range where current interval cross the barrier.
856 LiveInterval::iterator LR =
857 CurrLI->FindLiveRangeContaining(LIs->getUseIndex(BarrierIdx));
858 VNInfo *ValNo = LR->valno;
859
860 if (ValNo->def == ~1U) {
861 // Defined by a dead def? How can this be?
862 assert(0 && "Val# is defined by a dead def?");
863 abort();
864 }
865
Evan Cheng06587492008-10-24 02:05:00 +0000866 MachineInstr *DefMI = (ValNo->def != ~0U)
867 ? LIs->getInstructionFromIndex(ValNo->def) : NULL;
Evan Cheng06587492008-10-24 02:05:00 +0000868
Owen Andersonb214c692008-11-05 00:32:13 +0000869 // If this would create a new join point, do not split.
870 if (DefMI && createsNewJoin(LR, DefMI->getParent(), Barrier->getParent()))
871 return false;
872
Evan Chengf5cd4f02008-10-23 20:43:13 +0000873 // Find all references in the barrier mbb.
874 SmallPtrSet<MachineInstr*, 4> RefsInMBB;
875 for (MachineRegisterInfo::reg_iterator I = MRI->reg_begin(CurrLI->reg),
876 E = MRI->reg_end(); I != E; ++I) {
877 MachineInstr *RefMI = &*I;
878 if (RefMI->getParent() == BarrierMBB)
879 RefsInMBB.insert(RefMI);
880 }
881
882 // Find a point to restore the value after the barrier.
883 unsigned RestoreIndex;
884 MachineBasicBlock::iterator RestorePt =
Evan Chengf62ce372008-10-28 00:47:49 +0000885 findRestorePoint(BarrierMBB, Barrier, LR->end, RefsInMBB, RestoreIndex);
Evan Chengf5cd4f02008-10-23 20:43:13 +0000886 if (RestorePt == BarrierMBB->end())
887 return false;
888
Owen Anderson75fa96b2008-11-19 04:28:29 +0000889 if (DefMI && LIs->isReMaterializable(*LI, ValNo, DefMI))
890 if (Rematerialize(LI->reg, ValNo, DefMI, RestorePt,
891 RestoreIndex, RefsInMBB))
892 return true;
893
Evan Chengf5cd4f02008-10-23 20:43:13 +0000894 // Add a spill either before the barrier or after the definition.
Evan Cheng06587492008-10-24 02:05:00 +0000895 MachineBasicBlock *DefMBB = DefMI ? DefMI->getParent() : NULL;
Evan Chengf5cd4f02008-10-23 20:43:13 +0000896 const TargetRegisterClass *RC = MRI->getRegClass(CurrLI->reg);
Evan Chengf5cd4f02008-10-23 20:43:13 +0000897 unsigned SpillIndex = 0;
Evan Cheng06587492008-10-24 02:05:00 +0000898 MachineInstr *SpillMI = NULL;
Evan Cheng985921e2008-10-27 23:29:28 +0000899 int SS = -1;
Evan Cheng78dfef72008-10-25 00:52:41 +0000900 if (ValNo->def == ~0U) {
Evan Chengf5cd4f02008-10-23 20:43:13 +0000901 // If it's defined by a phi, we must split just before the barrier.
Owen Anderson7b9d67c2008-12-02 18:53:47 +0000902 if ((SpillMI = FoldSpill(LI->reg, RC, 0, Barrier,
903 BarrierMBB, SS, RefsInMBB))) {
904 SpillIndex = LIs->getInstructionIndex(SpillMI);
905 } else {
906 MachineBasicBlock::iterator SpillPt =
907 findSpillPoint(BarrierMBB, Barrier, NULL, RefsInMBB, SpillIndex);
908 if (SpillPt == BarrierMBB->begin())
909 return false; // No gap to insert spill.
910 // Add spill.
911
912 SS = CreateSpillStackSlot(CurrLI->reg, RC);
913 TII->storeRegToStackSlot(*BarrierMBB, SpillPt, CurrLI->reg, true, SS, RC);
914 SpillMI = prior(SpillPt);
915 LIs->InsertMachineInstrInMaps(SpillMI, SpillIndex);
916 }
Evan Cheng54898932008-10-29 08:39:34 +0000917 } else if (!IsAvailableInStack(DefMBB, CurrLI->reg, ValNo->def,
918 RestoreIndex, SpillIndex, SS)) {
Evan Cheng78dfef72008-10-25 00:52:41 +0000919 // If it's already split, just restore the value. There is no need to spill
920 // the def again.
Evan Chengd0e32c52008-10-29 05:06:14 +0000921 if (!DefMI)
922 return false; // Def is dead. Do nothing.
Owen Anderson7b9d67c2008-12-02 18:53:47 +0000923
924 if ((SpillMI = FoldSpill(LI->reg, RC, DefMI, Barrier,
925 BarrierMBB, SS, RefsInMBB))) {
926 SpillIndex = LIs->getInstructionIndex(SpillMI);
Evan Cheng1f08cc22008-10-28 05:28:21 +0000927 } else {
Owen Anderson7b9d67c2008-12-02 18:53:47 +0000928 // Check if it's possible to insert a spill after the def MI.
929 MachineBasicBlock::iterator SpillPt;
930 if (DefMBB == BarrierMBB) {
931 // Add spill after the def and the last use before the barrier.
932 SpillPt = findSpillPoint(BarrierMBB, Barrier, DefMI,
933 RefsInMBB, SpillIndex);
934 if (SpillPt == DefMBB->begin())
935 return false; // No gap to insert spill.
936 } else {
937 SpillPt = findNextEmptySlot(DefMBB, DefMI, SpillIndex);
938 if (SpillPt == DefMBB->end())
939 return false; // No gap to insert spill.
940 }
941 // Add spill. The store instruction kills the register if def is before
942 // the barrier in the barrier block.
943 SS = CreateSpillStackSlot(CurrLI->reg, RC);
944 TII->storeRegToStackSlot(*DefMBB, SpillPt, CurrLI->reg,
945 DefMBB == BarrierMBB, SS, RC);
946 SpillMI = prior(SpillPt);
947 LIs->InsertMachineInstrInMaps(SpillMI, SpillIndex);
Evan Cheng1f08cc22008-10-28 05:28:21 +0000948 }
Evan Chengf5cd4f02008-10-23 20:43:13 +0000949 }
950
Evan Cheng54898932008-10-29 08:39:34 +0000951 // Remember def instruction index to spill index mapping.
952 if (DefMI && SpillMI)
953 Def2SpillMap[ValNo->def] = SpillIndex;
954
Evan Chengf5cd4f02008-10-23 20:43:13 +0000955 // Add restore.
Evan Chengf5cd4f02008-10-23 20:43:13 +0000956 TII->loadRegFromStackSlot(*BarrierMBB, RestorePt, CurrLI->reg, SS, RC);
957 MachineInstr *LoadMI = prior(RestorePt);
958 LIs->InsertMachineInstrInMaps(LoadMI, RestoreIndex);
959
960 // If live interval is spilled in the same block as the barrier, just
961 // create a hole in the interval.
962 if (!DefMBB ||
Evan Cheng78dfef72008-10-25 00:52:41 +0000963 (SpillMI && SpillMI->getParent() == BarrierMBB)) {
Evan Chengd0e32c52008-10-29 05:06:14 +0000964 // Update spill stack slot live interval.
965 UpdateSpillSlotInterval(ValNo, LIs->getUseIndex(SpillIndex)+1,
966 LIs->getDefIndex(RestoreIndex));
Evan Chengf5cd4f02008-10-23 20:43:13 +0000967
Evan Chengd0e32c52008-10-29 05:06:14 +0000968 UpdateRegisterInterval(ValNo, LIs->getUseIndex(SpillIndex)+1,
969 LIs->getDefIndex(RestoreIndex));
Evan Chengf5cd4f02008-10-23 20:43:13 +0000970
Evan Chengae7fa5b2008-10-28 01:48:24 +0000971 ++NumSplits;
Evan Chengf5cd4f02008-10-23 20:43:13 +0000972 return true;
973 }
974
Evan Chengd0e32c52008-10-29 05:06:14 +0000975 // Update spill stack slot live interval.
Evan Cheng54898932008-10-29 08:39:34 +0000976 UpdateSpillSlotInterval(ValNo, LIs->getUseIndex(SpillIndex)+1,
977 LIs->getDefIndex(RestoreIndex));
Evan Chengd0e32c52008-10-29 05:06:14 +0000978
Owen Anderson6002e992008-12-04 21:20:30 +0000979 RepairLiveInterval(CurrLI, ValNo, DefMI, RestoreIndex);
Evan Chengf5cd4f02008-10-23 20:43:13 +0000980
Evan Chengae7fa5b2008-10-28 01:48:24 +0000981 ++NumSplits;
Evan Chengf5cd4f02008-10-23 20:43:13 +0000982 return true;
983}
984
985/// SplitRegLiveIntervals - Split all register live intervals that cross the
986/// barrier that's being processed.
987bool
988PreAllocSplitting::SplitRegLiveIntervals(const TargetRegisterClass **RCs) {
989 // First find all the virtual registers whose live intervals are intercepted
990 // by the current barrier.
991 SmallVector<LiveInterval*, 8> Intervals;
992 for (const TargetRegisterClass **RC = RCs; *RC; ++RC) {
Evan Cheng23066282008-10-27 07:14:50 +0000993 if (TII->IgnoreRegisterClassBarriers(*RC))
994 continue;
Evan Chengf5cd4f02008-10-23 20:43:13 +0000995 std::vector<unsigned> &VRs = MRI->getRegClassVirtRegs(*RC);
996 for (unsigned i = 0, e = VRs.size(); i != e; ++i) {
997 unsigned Reg = VRs[i];
998 if (!LIs->hasInterval(Reg))
999 continue;
1000 LiveInterval *LI = &LIs->getInterval(Reg);
1001 if (LI->liveAt(BarrierIdx) && !Barrier->readsRegister(Reg))
1002 // Virtual register live interval is intercepted by the barrier. We
1003 // should split and shrink wrap its interval if possible.
1004 Intervals.push_back(LI);
1005 }
1006 }
1007
1008 // Process the affected live intervals.
1009 bool Change = false;
1010 while (!Intervals.empty()) {
Evan Chengae7fa5b2008-10-28 01:48:24 +00001011 if (PreSplitLimit != -1 && (int)NumSplits == PreSplitLimit)
1012 break;
Evan Chengf5cd4f02008-10-23 20:43:13 +00001013 LiveInterval *LI = Intervals.back();
1014 Intervals.pop_back();
1015 Change |= SplitRegLiveInterval(LI);
1016 }
1017
1018 return Change;
1019}
1020
Owen Andersonf1f75b12008-11-04 22:22:41 +00001021bool PreAllocSplitting::createsNewJoin(LiveRange* LR,
1022 MachineBasicBlock* DefMBB,
1023 MachineBasicBlock* BarrierMBB) {
1024 if (DefMBB == BarrierMBB)
1025 return false;
1026
1027 if (LR->valno->hasPHIKill)
1028 return false;
1029
1030 unsigned MBBEnd = LIs->getMBBEndIdx(BarrierMBB);
1031 if (LR->end < MBBEnd)
1032 return false;
1033
1034 MachineLoopInfo& MLI = getAnalysis<MachineLoopInfo>();
1035 if (MLI.getLoopFor(DefMBB) != MLI.getLoopFor(BarrierMBB))
1036 return true;
1037
1038 MachineDominatorTree& MDT = getAnalysis<MachineDominatorTree>();
1039 SmallPtrSet<MachineBasicBlock*, 4> Visited;
1040 typedef std::pair<MachineBasicBlock*,
1041 MachineBasicBlock::succ_iterator> ItPair;
1042 SmallVector<ItPair, 4> Stack;
1043 Stack.push_back(std::make_pair(BarrierMBB, BarrierMBB->succ_begin()));
1044
1045 while (!Stack.empty()) {
1046 ItPair P = Stack.back();
1047 Stack.pop_back();
1048
1049 MachineBasicBlock* PredMBB = P.first;
1050 MachineBasicBlock::succ_iterator S = P.second;
1051
1052 if (S == PredMBB->succ_end())
1053 continue;
1054 else if (Visited.count(*S)) {
1055 Stack.push_back(std::make_pair(PredMBB, ++S));
1056 continue;
1057 } else
Owen Andersonb214c692008-11-05 00:32:13 +00001058 Stack.push_back(std::make_pair(PredMBB, S+1));
Owen Andersonf1f75b12008-11-04 22:22:41 +00001059
1060 MachineBasicBlock* MBB = *S;
1061 Visited.insert(MBB);
1062
1063 if (MBB == BarrierMBB)
1064 return true;
1065
1066 MachineDomTreeNode* DefMDTN = MDT.getNode(DefMBB);
1067 MachineDomTreeNode* BarrierMDTN = MDT.getNode(BarrierMBB);
1068 MachineDomTreeNode* MDTN = MDT.getNode(MBB)->getIDom();
1069 while (MDTN) {
1070 if (MDTN == DefMDTN)
1071 return true;
1072 else if (MDTN == BarrierMDTN)
1073 break;
1074 MDTN = MDTN->getIDom();
1075 }
1076
1077 MBBEnd = LIs->getMBBEndIdx(MBB);
1078 if (LR->end > MBBEnd)
1079 Stack.push_back(std::make_pair(MBB, MBB->succ_begin()));
1080 }
1081
1082 return false;
1083}
1084
1085
Evan Cheng09e8ca82008-10-20 21:44:59 +00001086bool PreAllocSplitting::runOnMachineFunction(MachineFunction &MF) {
Evan Chengd0e32c52008-10-29 05:06:14 +00001087 CurrMF = &MF;
1088 TM = &MF.getTarget();
1089 TII = TM->getInstrInfo();
1090 MFI = MF.getFrameInfo();
1091 MRI = &MF.getRegInfo();
1092 LIs = &getAnalysis<LiveIntervals>();
1093 LSs = &getAnalysis<LiveStacks>();
Evan Chengf5cd4f02008-10-23 20:43:13 +00001094
1095 bool MadeChange = false;
1096
1097 // Make sure blocks are numbered in order.
1098 MF.RenumberBlocks();
1099
Owen Anderson75c99c52008-12-07 05:33:18 +00001100#if 1
Evan Cheng54898932008-10-29 08:39:34 +00001101 // FIXME: Go top down.
1102 MachineBasicBlock *Entry = MF.begin();
1103 SmallPtrSet<MachineBasicBlock*,16> Visited;
1104
1105 for (df_ext_iterator<MachineBasicBlock*, SmallPtrSet<MachineBasicBlock*,16> >
1106 DFI = df_ext_begin(Entry, Visited), E = df_ext_end(Entry, Visited);
1107 DFI != E; ++DFI) {
1108 BarrierMBB = *DFI;
1109 for (MachineBasicBlock::iterator I = BarrierMBB->begin(),
1110 E = BarrierMBB->end(); I != E; ++I) {
1111 Barrier = &*I;
1112 const TargetRegisterClass **BarrierRCs =
1113 Barrier->getDesc().getRegClassBarriers();
1114 if (!BarrierRCs)
1115 continue;
1116 BarrierIdx = LIs->getInstructionIndex(Barrier);
1117 MadeChange |= SplitRegLiveIntervals(BarrierRCs);
1118 }
1119 }
1120#else
Evan Chengf5cd4f02008-10-23 20:43:13 +00001121 for (MachineFunction::reverse_iterator I = MF.rbegin(), E = MF.rend();
1122 I != E; ++I) {
1123 BarrierMBB = &*I;
1124 for (MachineBasicBlock::reverse_iterator II = BarrierMBB->rbegin(),
1125 EE = BarrierMBB->rend(); II != EE; ++II) {
1126 Barrier = &*II;
1127 const TargetRegisterClass **BarrierRCs =
1128 Barrier->getDesc().getRegClassBarriers();
1129 if (!BarrierRCs)
1130 continue;
1131 BarrierIdx = LIs->getInstructionIndex(Barrier);
1132 MadeChange |= SplitRegLiveIntervals(BarrierRCs);
1133 }
1134 }
Evan Cheng54898932008-10-29 08:39:34 +00001135#endif
Evan Chengf5cd4f02008-10-23 20:43:13 +00001136
1137 return MadeChange;
Evan Cheng09e8ca82008-10-20 21:44:59 +00001138}