Chris Lattner | 697954c | 2002-01-20 22:54:45 +0000 | [diff] [blame] | 1 | /* Title: PhyRegAlloc.h -*- C++ -*- |
Ruchira Sasanka | 7cd2ca1 | 2001-09-08 14:22:50 +0000 | [diff] [blame] | 2 | Author: Ruchira Sasanka |
| 3 | Date: Aug 20, 01 |
| 4 | Purpose: This is the main entry point for register allocation. |
| 5 | |
| 6 | Notes: |
Ruchira Sasanka | 42bd177 | 2002-01-07 19:16:26 +0000 | [diff] [blame] | 7 | ===== |
Ruchira Sasanka | 7cd2ca1 | 2001-09-08 14:22:50 +0000 | [diff] [blame] | 8 | |
| 9 | * RegisterClasses: Each RegClass accepts a |
Chris Lattner | d0f166a | 2002-12-29 03:13:05 +0000 | [diff] [blame^] | 10 | TargetRegClass which contains machine specific info about that register |
Ruchira Sasanka | 7cd2ca1 | 2001-09-08 14:22:50 +0000 | [diff] [blame] | 11 | class. The code in the RegClass is machine independent and they use |
Chris Lattner | d0f166a | 2002-12-29 03:13:05 +0000 | [diff] [blame^] | 12 | access functions in the TargetRegClass object passed into it to get |
Ruchira Sasanka | 7cd2ca1 | 2001-09-08 14:22:50 +0000 | [diff] [blame] | 13 | machine specific info. |
| 14 | |
| 15 | * Machine dependent work: All parts of the register coloring algorithm |
| 16 | except coloring of an individual node are machine independent. |
Ruchira Sasanka | 7cd2ca1 | 2001-09-08 14:22:50 +0000 | [diff] [blame] | 17 | */ |
| 18 | |
Ruchira Sasanka | 7cd2ca1 | 2001-09-08 14:22:50 +0000 | [diff] [blame] | 19 | #ifndef PHY_REG_ALLOC_H |
| 20 | #define PHY_REG_ALLOC_H |
| 21 | |
Ruchira Sasanka | 7cd2ca1 | 2001-09-08 14:22:50 +0000 | [diff] [blame] | 22 | #include "llvm/CodeGen/RegClass.h" |
| 23 | #include "llvm/CodeGen/LiveRangeInfo.h" |
Chris Lattner | 97453d6 | 2002-04-28 20:40:16 +0000 | [diff] [blame] | 24 | #include <map> |
| 25 | |
Misha Brukman | fce1143 | 2002-10-28 00:28:31 +0000 | [diff] [blame] | 26 | class MachineFunction; |
Chris Lattner | d0f166a | 2002-12-29 03:13:05 +0000 | [diff] [blame^] | 27 | class TargetRegInfo; |
Chris Lattner | 483e14e | 2002-04-27 07:27:19 +0000 | [diff] [blame] | 28 | class FunctionLiveVarInfo; |
Chris Lattner | 2182c78 | 2002-02-04 05:52:08 +0000 | [diff] [blame] | 29 | class MachineInstr; |
Chris Lattner | 8fc2f20 | 2002-04-28 16:19:42 +0000 | [diff] [blame] | 30 | class LoopInfo; |
Ruchira Sasanka | 20c82b1 | 2001-10-28 18:15:12 +0000 | [diff] [blame] | 31 | |
| 32 | //---------------------------------------------------------------------------- |
| 33 | // Class AddedInstrns: |
| 34 | // When register allocator inserts new instructions in to the existing |
| 35 | // instruction stream, it does NOT directly modify the instruction stream. |
| 36 | // Rather, it creates an object of AddedInstrns and stick it in the |
| 37 | // AddedInstrMap for an existing instruction. This class contains two vectors |
| 38 | // to store such instructions added before and after an existing instruction. |
| 39 | //---------------------------------------------------------------------------- |
| 40 | |
Chris Lattner | 0b0ffa0 | 2002-04-09 05:13:04 +0000 | [diff] [blame] | 41 | struct AddedInstrns { |
Chris Lattner | ccdf23e | 2002-10-28 19:43:23 +0000 | [diff] [blame] | 42 | std::vector<MachineInstr*> InstrnsBefore;//Insts added BEFORE an existing inst |
| 43 | std::vector<MachineInstr*> InstrnsAfter; //Insts added AFTER an existing inst |
Ruchira Sasanka | 7cd2ca1 | 2001-09-08 14:22:50 +0000 | [diff] [blame] | 44 | }; |
| 45 | |
Ruchira Sasanka | 20c82b1 | 2001-10-28 18:15:12 +0000 | [diff] [blame] | 46 | //---------------------------------------------------------------------------- |
Ruchira Sasanka | 20c82b1 | 2001-10-28 18:15:12 +0000 | [diff] [blame] | 47 | // class PhyRegAlloc: |
| 48 | // Main class the register allocator. Call allocateRegisters() to allocate |
Chris Lattner | b7653df | 2002-04-08 22:03:57 +0000 | [diff] [blame] | 49 | // registers for a Function. |
Ruchira Sasanka | 20c82b1 | 2001-10-28 18:15:12 +0000 | [diff] [blame] | 50 | //---------------------------------------------------------------------------- |
| 51 | |
Chris Lattner | 3e0f828 | 2002-02-04 17:38:48 +0000 | [diff] [blame] | 52 | class PhyRegAlloc: public NonCopyable { |
Chris Lattner | 697954c | 2002-01-20 22:54:45 +0000 | [diff] [blame] | 53 | std::vector<RegClass *> RegClassList; // vector of register classes |
Ruchira Sasanka | 7cd2ca1 | 2001-09-08 14:22:50 +0000 | [diff] [blame] | 54 | const TargetMachine &TM; // target machine |
Chris Lattner | ccdf23e | 2002-10-28 19:43:23 +0000 | [diff] [blame] | 55 | const Function *Fn; // name of the function we work on |
| 56 | MachineFunction &MF; // descriptor for method's native code |
Chris Lattner | 8fc2f20 | 2002-04-28 16:19:42 +0000 | [diff] [blame] | 57 | FunctionLiveVarInfo *const LVI; // LV information for this method |
Ruchira Sasanka | 7cd2ca1 | 2001-09-08 14:22:50 +0000 | [diff] [blame] | 58 | // (already computed for BBs) |
| 59 | LiveRangeInfo LRI; // LR info (will be computed) |
Chris Lattner | d0f166a | 2002-12-29 03:13:05 +0000 | [diff] [blame^] | 60 | const TargetRegInfo &MRI; // Machine Register information |
Ruchira Sasanka | 7cd2ca1 | 2001-09-08 14:22:50 +0000 | [diff] [blame] | 61 | const unsigned NumOfRegClasses; // recorded here for efficiency |
| 62 | |
Ruchira Sasanka | 51bc0e7 | 2001-11-03 17:14:44 +0000 | [diff] [blame] | 63 | |
Chris Lattner | ea9d249 | 2002-10-29 17:08:05 +0000 | [diff] [blame] | 64 | // AddedInstrMap - Used to store instrns added in this phase |
| 65 | std::map<const MachineInstr *, AddedInstrns> AddedInstrMap; |
| 66 | |
Vikram S. Adve | d23a229 | 2002-04-25 04:46:28 +0000 | [diff] [blame] | 67 | AddedInstrns AddedInstrAtEntry; // to store instrns added at entry |
Chris Lattner | 8fc2f20 | 2002-04-28 16:19:42 +0000 | [diff] [blame] | 68 | LoopInfo *LoopDepthCalc; // to calculate loop depths |
Ruchira Sasanka | 42bd177 | 2002-01-07 19:16:26 +0000 | [diff] [blame] | 69 | ReservedColorListType ResColList; // A set of reserved regs if desired. |
| 70 | // currently not used |
Ruchira Sasanka | 7cd2ca1 | 2001-09-08 14:22:50 +0000 | [diff] [blame] | 71 | |
Chris Lattner | 3e0f828 | 2002-02-04 17:38:48 +0000 | [diff] [blame] | 72 | public: |
Chris Lattner | 483e14e | 2002-04-27 07:27:19 +0000 | [diff] [blame] | 73 | PhyRegAlloc(Function *F, const TargetMachine& TM, FunctionLiveVarInfo *Lvi, |
Chris Lattner | 8fc2f20 | 2002-04-28 16:19:42 +0000 | [diff] [blame] | 74 | LoopInfo *LoopDepthCalc); |
Chris Lattner | 3e0f828 | 2002-02-04 17:38:48 +0000 | [diff] [blame] | 75 | ~PhyRegAlloc(); |
| 76 | |
| 77 | // main method called for allocating registers |
| 78 | // |
| 79 | void allocateRegisters(); |
Vikram S. Adve | 705f95e | 2002-03-18 03:26:48 +0000 | [diff] [blame] | 80 | |
| 81 | |
| 82 | // access to register classes by class ID |
| 83 | // |
| 84 | const RegClass* getRegClassByID(unsigned int id) const { |
| 85 | return RegClassList[id]; |
| 86 | } |
| 87 | RegClass* getRegClassByID(unsigned int id) { |
| 88 | return RegClassList[id]; } |
| 89 | |
| 90 | |
Chris Lattner | 3e0f828 | 2002-02-04 17:38:48 +0000 | [diff] [blame] | 91 | private: |
Chris Lattner | 5e5dfa3 | 2002-02-05 02:51:01 +0000 | [diff] [blame] | 92 | void addInterference(const Value *Def, const ValueSet *LVSet, |
| 93 | bool isCallInst); |
Ruchira Sasanka | 7cd2ca1 | 2001-09-08 14:22:50 +0000 | [diff] [blame] | 94 | |
| 95 | void addInterferencesForArgs(); |
| 96 | void createIGNodeListsAndIGs(); |
| 97 | void buildInterferenceGraphs(); |
Ruchira Sasanka | c4d4b76 | 2001-10-16 01:23:19 +0000 | [diff] [blame] | 98 | |
Ruchira Sasanka | 36f7707 | 2001-10-19 17:21:59 +0000 | [diff] [blame] | 99 | void setCallInterferences(const MachineInstr *MInst, |
Chris Lattner | 5e5dfa3 | 2002-02-05 02:51:01 +0000 | [diff] [blame] | 100 | const ValueSet *LVSetAft ); |
Ruchira Sasanka | 7cd2ca1 | 2001-09-08 14:22:50 +0000 | [diff] [blame] | 101 | |
Ruchira Sasanka | f7434f0 | 2001-10-23 21:38:42 +0000 | [diff] [blame] | 102 | void move2DelayedInstr(const MachineInstr *OrigMI, |
| 103 | const MachineInstr *DelayedMI ); |
| 104 | |
Ruchira Sasanka | 44d2b94 | 2001-10-19 21:42:06 +0000 | [diff] [blame] | 105 | void markUnusableSugColors(); |
Ruchira Sasanka | 20c82b1 | 2001-10-28 18:15:12 +0000 | [diff] [blame] | 106 | void allocateStackSpace4SpilledLRs(); |
| 107 | |
Chris Lattner | 00d91c6 | 2001-11-08 20:55:05 +0000 | [diff] [blame] | 108 | void insertCode4SpilledLR (const LiveRange *LR, |
| 109 | MachineInstr *MInst, |
| 110 | const BasicBlock *BB, |
| 111 | const unsigned OpNum); |
Ruchira Sasanka | 44d2b94 | 2001-10-19 21:42:06 +0000 | [diff] [blame] | 112 | |
Chris Lattner | 697954c | 2002-01-20 22:54:45 +0000 | [diff] [blame] | 113 | inline void constructLiveRanges() { LRI.constructLiveRanges(); } |
Ruchira Sasanka | 7cd2ca1 | 2001-09-08 14:22:50 +0000 | [diff] [blame] | 114 | |
| 115 | void colorIncomingArgs(); |
Ruchira Sasanka | ab304c4 | 2001-09-30 23:19:57 +0000 | [diff] [blame] | 116 | void colorCallRetArgs(); |
Ruchira Sasanka | 7cd2ca1 | 2001-09-08 14:22:50 +0000 | [diff] [blame] | 117 | void updateMachineCode(); |
Ruchira Sasanka | ab304c4 | 2001-09-30 23:19:57 +0000 | [diff] [blame] | 118 | |
Ruchira Sasanka | 6053b93 | 2001-09-15 19:08:41 +0000 | [diff] [blame] | 119 | void printLabel(const Value *const Val); |
| 120 | void printMachineCode(); |
Ruchira Sasanka | 20c82b1 | 2001-10-28 18:15:12 +0000 | [diff] [blame] | 121 | |
Ruchira Sasanka | 80b1a1a | 2001-11-03 20:41:22 +0000 | [diff] [blame] | 122 | |
Chris Lattner | ea9d249 | 2002-10-29 17:08:05 +0000 | [diff] [blame] | 123 | friend class UltraSparcRegInfo; // FIXME: remove this |
Ruchira Sasanka | 80b1a1a | 2001-11-03 20:41:22 +0000 | [diff] [blame] | 124 | |
Vikram S. Adve | c2580dd | 2002-07-08 22:39:36 +0000 | [diff] [blame] | 125 | int getUsableUniRegAtMI(int RegType, |
| 126 | const ValueSet *LVSetBef, |
| 127 | MachineInstr *MInst, |
| 128 | std::vector<MachineInstr*>& MIBef, |
| 129 | std::vector<MachineInstr*>& MIAft); |
| 130 | |
Ruchira Sasanka | 825dd55 | 2001-11-15 20:22:37 +0000 | [diff] [blame] | 131 | int getUnusedUniRegAtMI(RegClass *RC, const MachineInstr *MInst, |
Vikram S. Adve | c2580dd | 2002-07-08 22:39:36 +0000 | [diff] [blame] | 132 | const ValueSet *LVSetBef); |
Ruchira Sasanka | 80b1a1a | 2001-11-03 20:41:22 +0000 | [diff] [blame] | 133 | |
Ruchira Sasanka | 825dd55 | 2001-11-15 20:22:37 +0000 | [diff] [blame] | 134 | void setRelRegsUsedByThisInst(RegClass *RC, const MachineInstr *MInst ); |
| 135 | int getUniRegNotUsedByThisInst(RegClass *RC, const MachineInstr *MInst); |
Ruchira Sasanka | 20c82b1 | 2001-10-28 18:15:12 +0000 | [diff] [blame] | 136 | |
Ruchira Sasanka | cbddf49 | 2001-11-14 15:37:13 +0000 | [diff] [blame] | 137 | void addInterf4PseudoInstr(const MachineInstr *MInst); |
Ruchira Sasanka | 7cd2ca1 | 2001-09-08 14:22:50 +0000 | [diff] [blame] | 138 | }; |
| 139 | |
| 140 | |
Ruchira Sasanka | 7cd2ca1 | 2001-09-08 14:22:50 +0000 | [diff] [blame] | 141 | #endif |
| 142 | |