blob: 565bf34440811ca66b33fc22b4d9682cae148df0 [file] [log] [blame]
Stephen Hines36b56882014-04-23 16:57:46 -07001; RUN: llc < %s -march=r600 -mcpu=verde -verify-machineinstrs | FileCheck -check-prefix=SI %s
Michel Danzer5096dc72013-05-14 09:53:30 +00002
Stephen Hines36b56882014-04-23 16:57:46 -07003; SI-LABEL: @vector_imin
4; SI: V_MIN_I32_e32
5define void @vector_imin(i32 %p0, i32 %p1, i32 addrspace(1)* %in) #0 {
Michel Danzer5096dc72013-05-14 09:53:30 +00006main_body:
Stephen Hines36b56882014-04-23 16:57:46 -07007 %load = load i32 addrspace(1)* %in, align 4
8 %min = call i32 @llvm.AMDGPU.imin(i32 %p0, i32 %load)
9 %bc = bitcast i32 %min to float
10 call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 0, float %bc, float %bc, float %bc, float %bc)
11 ret void
12}
13
14; SI-LABEL: @scalar_imin
15; SI: S_MIN_I32
16define void @scalar_imin(i32 %p0, i32 %p1) #0 {
17entry:
18 %min = call i32 @llvm.AMDGPU.imin(i32 %p0, i32 %p1)
19 %bc = bitcast i32 %min to float
20 call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 0, float %bc, float %bc, float %bc, float %bc)
Michel Danzer5096dc72013-05-14 09:53:30 +000021 ret void
22}
23
24; Function Attrs: readnone
25declare i32 @llvm.AMDGPU.imin(i32, i32) #1
26
27declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
28
Stephen Hines36b56882014-04-23 16:57:46 -070029attributes #0 = { nounwind }
30attributes #1 = { nounwind readnone }
Michel Danzer5096dc72013-05-14 09:53:30 +000031
32!0 = metadata !{metadata !"const", null, i32 1}