Blame - lib/CodeGen/SelectionDAG/TargetLowering.cpp - fp2-dev/platform/external/llvm

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Chris Lattner	310968c	2005-01-07 07:44:53 +0000	[diff] [blame]	1	//===-- TargetLowering.cpp - Implement the TargetLowering class -----------===//
Misha Brukman	f976c85	2005-04-21 22:55:34 +0000	[diff] [blame]	2	//
Chris Lattner	310968c	2005-01-07 07:44:53 +0000	[diff] [blame]	3	// The LLVM Compiler Infrastructure
				4	//
Chris Lattner	4ee451d	2007-12-29 20:36:04 +0000	[diff] [blame]	5	// This file is distributed under the University of Illinois Open Source
				6	// License. See LICENSE.TXT for details.
Misha Brukman	f976c85	2005-04-21 22:55:34 +0000	[diff] [blame]	7	//
Chris Lattner	310968c	2005-01-07 07:44:53 +0000	[diff] [blame]	8	//===----------------------------------------------------------------------===//
				9	//
				10	// This implements the TargetLowering class.
				11	//
				12	//===----------------------------------------------------------------------===//
				13
				14	#include "llvm/Target/TargetLowering.h"
Chris Lattner	af76e59	2009-08-22 20:48:53 +0000	[diff] [blame]	15	#include "llvm/MC/MCAsmInfo.h"
Chris Lattner	beeb93e	2010-01-26 05:58:28 +0000	[diff] [blame]	16	#include "llvm/MC/MCExpr.h"
Owen Anderson	07000c6	2006-05-12 06:33:49 +0000	[diff] [blame]	17	#include "llvm/Target/TargetData.h"
Chris Lattner	f014412	2009-07-28 03:13:23 +0000	[diff] [blame]	18	#include "llvm/Target/TargetLoweringObjectFile.h"
Chris Lattner	310968c	2005-01-07 07:44:53 +0000	[diff] [blame]	19	#include "llvm/Target/TargetMachine.h"
Dan Gohman	6f0d024	2008-02-10 18:45:23 +0000	[diff] [blame]	20	#include "llvm/Target/TargetRegisterInfo.h"
Dan Gohman	707e018	2008-04-12 04:36:06 +0000	[diff] [blame]	21	#include "llvm/GlobalVariable.h"
Chris Lattner	dc87929	2006-03-31 00:28:56 +0000	[diff] [blame]	22	#include "llvm/DerivedTypes.h"
Dan Gohman	84023e0	2010-07-10 09:00:22 +0000	[diff] [blame]	23	#include "llvm/CodeGen/Analysis.h"
Evan Cheng	ad4196b	2008-05-12 19:56:52 +0000	[diff] [blame]	24	#include "llvm/CodeGen/MachineFrameInfo.h"
Chris Lattner	071c62f	2010-01-25 23:26:13 +0000	[diff] [blame]	25	#include "llvm/CodeGen/MachineJumpTableInfo.h"
Chris Lattner	589c6f6	2010-01-26 06:28:43 +0000	[diff] [blame]	26	#include "llvm/CodeGen/MachineFunction.h"
Chris Lattner	310968c	2005-01-07 07:44:53 +0000	[diff] [blame]	27	#include "llvm/CodeGen/SelectionDAG.h"
Owen Anderson	718cb66	2007-09-07 04:06:50 +0000	[diff] [blame]	28	#include "llvm/ADT/STLExtras.h"
Nadav Rotem	b6fbec3	2011-06-01 12:51:46 +0000	[diff] [blame]	29	#include "llvm/Support/CommandLine.h"
Torok Edwin	c25e758	2009-07-11 20:10:48 +0000	[diff] [blame]	30	#include "llvm/Support/ErrorHandling.h"
Chris Lattner	c6fd6cd	2006-01-30 04:09:27 +0000	[diff] [blame]	31	#include "llvm/Support/MathExtras.h"
Nick Lewycky	476b242	2010-12-19 20:43:38 +0000	[diff] [blame]	32	#include <cctype>
Chris Lattner	310968c	2005-01-07 07:44:53 +0000	[diff] [blame]	33	using namespace llvm;
				34
Nadav Rotem	b6fbec3	2011-06-01 12:51:46 +0000	[diff] [blame]	35	/// We are in the process of implementing a new TypeLegalization action
				36	/// - the promotion of vector elements. This feature is disabled by default
				37	/// and only enabled using this flag.
				38	static cl::opt<bool>
Nadav Rotem	8fb06b3	2011-10-16 20:31:33 +0000	[diff] [blame]	39	AllowPromoteIntElem("promote-elements", cl::Hidden, cl::init(true),
Nadav Rotem	b6fbec3	2011-06-01 12:51:46 +0000	[diff] [blame]	40	cl::desc("Allow promotion of integer vector element types"));
				41
Rafael Espindola	9a58023	2009-02-27 13:37:18 +0000	[diff] [blame]	42	namespace llvm {
				43	TLSModel::Model getTLSModel(const GlobalValue *GV, Reloc::Model reloc) {
				44	bool isLocal = GV->hasLocalLinkage();
				45	bool isDeclaration = GV->isDeclaration();
				46	// FIXME: what should we do for protected and internal visibility?
				47	// For variables, is internal different from hidden?
				48	bool isHidden = GV->hasHiddenVisibility();
				49
				50	if (reloc == Reloc::PIC_) {
				51	if (isLocal \|\| isHidden)
				52	return TLSModel::LocalDynamic;
				53	else
				54	return TLSModel::GeneralDynamic;
				55	} else {
				56	if (!isDeclaration \|\| isHidden)
				57	return TLSModel::LocalExec;
				58	else
				59	return TLSModel::InitialExec;
				60	}
				61	}
				62	}
				63
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	64	/// InitLibcallNames - Set default libcall names.
				65	///
Evan Cheng	79cca50	2007-01-12 22:51:10 +0000	[diff] [blame]	66	static void InitLibcallNames(const char **Names) {
Anton Korobeynikov	c31642f	2009-05-03 13:14:08 +0000	[diff] [blame]	67	Names[RTLIB::SHL_I16] = "__ashlhi3";
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	68	Names[RTLIB::SHL_I32] = "__ashlsi3";
				69	Names[RTLIB::SHL_I64] = "__ashldi3";
Duncan Sands	dddc629	2008-07-11 16:52:29 +0000	[diff] [blame]	70	Names[RTLIB::SHL_I128] = "__ashlti3";
Anton Korobeynikov	c31642f	2009-05-03 13:14:08 +0000	[diff] [blame]	71	Names[RTLIB::SRL_I16] = "__lshrhi3";
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	72	Names[RTLIB::SRL_I32] = "__lshrsi3";
				73	Names[RTLIB::SRL_I64] = "__lshrdi3";
Duncan Sands	dddc629	2008-07-11 16:52:29 +0000	[diff] [blame]	74	Names[RTLIB::SRL_I128] = "__lshrti3";
Anton Korobeynikov	c31642f	2009-05-03 13:14:08 +0000	[diff] [blame]	75	Names[RTLIB::SRA_I16] = "__ashrhi3";
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	76	Names[RTLIB::SRA_I32] = "__ashrsi3";
				77	Names[RTLIB::SRA_I64] = "__ashrdi3";
Duncan Sands	dddc629	2008-07-11 16:52:29 +0000	[diff] [blame]	78	Names[RTLIB::SRA_I128] = "__ashrti3";
Anton Korobeynikov	8983da7	2009-11-07 17:14:39 +0000	[diff] [blame]	79	Names[RTLIB::MUL_I8] = "__mulqi3";
Anton Korobeynikov	c31642f	2009-05-03 13:14:08 +0000	[diff] [blame]	80	Names[RTLIB::MUL_I16] = "__mulhi3";
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	81	Names[RTLIB::MUL_I32] = "__mulsi3";
				82	Names[RTLIB::MUL_I64] = "__muldi3";
Duncan Sands	5ac319a	2008-07-10 15:35:05 +0000	[diff] [blame]	83	Names[RTLIB::MUL_I128] = "__multi3";
Eric Christopher	362fee9	2011-06-17 20:41:29 +0000	[diff] [blame]	84	Names[RTLIB::MULO_I32] = "__mulosi4";
				85	Names[RTLIB::MULO_I64] = "__mulodi4";
				86	Names[RTLIB::MULO_I128] = "__muloti4";
Anton Korobeynikov	8983da7	2009-11-07 17:14:39 +0000	[diff] [blame]	87	Names[RTLIB::SDIV_I8] = "__divqi3";
Anton Korobeynikov	813090c	2009-05-03 13:18:16 +0000	[diff] [blame]	88	Names[RTLIB::SDIV_I16] = "__divhi3";
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	89	Names[RTLIB::SDIV_I32] = "__divsi3";
				90	Names[RTLIB::SDIV_I64] = "__divdi3";
Duncan Sands	5ac319a	2008-07-10 15:35:05 +0000	[diff] [blame]	91	Names[RTLIB::SDIV_I128] = "__divti3";
Anton Korobeynikov	8983da7	2009-11-07 17:14:39 +0000	[diff] [blame]	92	Names[RTLIB::UDIV_I8] = "__udivqi3";
Anton Korobeynikov	fb3f84f	2009-05-08 18:50:54 +0000	[diff] [blame]	93	Names[RTLIB::UDIV_I16] = "__udivhi3";
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	94	Names[RTLIB::UDIV_I32] = "__udivsi3";
				95	Names[RTLIB::UDIV_I64] = "__udivdi3";
Duncan Sands	5ac319a	2008-07-10 15:35:05 +0000	[diff] [blame]	96	Names[RTLIB::UDIV_I128] = "__udivti3";
Anton Korobeynikov	8983da7	2009-11-07 17:14:39 +0000	[diff] [blame]	97	Names[RTLIB::SREM_I8] = "__modqi3";
Anton Korobeynikov	813090c	2009-05-03 13:18:16 +0000	[diff] [blame]	98	Names[RTLIB::SREM_I16] = "__modhi3";
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	99	Names[RTLIB::SREM_I32] = "__modsi3";
				100	Names[RTLIB::SREM_I64] = "__moddi3";
Duncan Sands	5ac319a	2008-07-10 15:35:05 +0000	[diff] [blame]	101	Names[RTLIB::SREM_I128] = "__modti3";
Anton Korobeynikov	8983da7	2009-11-07 17:14:39 +0000	[diff] [blame]	102	Names[RTLIB::UREM_I8] = "__umodqi3";
Anton Korobeynikov	9fe9c8e	2009-05-03 13:19:57 +0000	[diff] [blame]	103	Names[RTLIB::UREM_I16] = "__umodhi3";
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	104	Names[RTLIB::UREM_I32] = "__umodsi3";
				105	Names[RTLIB::UREM_I64] = "__umoddi3";
Duncan Sands	5ac319a	2008-07-10 15:35:05 +0000	[diff] [blame]	106	Names[RTLIB::UREM_I128] = "__umodti3";
Evan Cheng	8e23e81	2011-04-01 00:42:02 +0000	[diff] [blame]	107
				108	// These are generally not available.
				109	Names[RTLIB::SDIVREM_I8] = 0;
				110	Names[RTLIB::SDIVREM_I16] = 0;
				111	Names[RTLIB::SDIVREM_I32] = 0;
				112	Names[RTLIB::SDIVREM_I64] = 0;
				113	Names[RTLIB::SDIVREM_I128] = 0;
				114	Names[RTLIB::UDIVREM_I8] = 0;
				115	Names[RTLIB::UDIVREM_I16] = 0;
				116	Names[RTLIB::UDIVREM_I32] = 0;
				117	Names[RTLIB::UDIVREM_I64] = 0;
				118	Names[RTLIB::UDIVREM_I128] = 0;
				119
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	120	Names[RTLIB::NEG_I32] = "__negsi2";
				121	Names[RTLIB::NEG_I64] = "__negdi2";
				122	Names[RTLIB::ADD_F32] = "__addsf3";
				123	Names[RTLIB::ADD_F64] = "__adddf3";
Duncan Sands	007f984	2008-01-10 10:28:30 +0000	[diff] [blame]	124	Names[RTLIB::ADD_F80] = "__addxf3";
Dale Johannesen	161e897	2007-10-05 20:04:43 +0000	[diff] [blame]	125	Names[RTLIB::ADD_PPCF128] = "__gcc_qadd";
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	126	Names[RTLIB::SUB_F32] = "__subsf3";
				127	Names[RTLIB::SUB_F64] = "__subdf3";
Duncan Sands	007f984	2008-01-10 10:28:30 +0000	[diff] [blame]	128	Names[RTLIB::SUB_F80] = "__subxf3";
Dale Johannesen	161e897	2007-10-05 20:04:43 +0000	[diff] [blame]	129	Names[RTLIB::SUB_PPCF128] = "__gcc_qsub";
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	130	Names[RTLIB::MUL_F32] = "__mulsf3";
				131	Names[RTLIB::MUL_F64] = "__muldf3";
Duncan Sands	007f984	2008-01-10 10:28:30 +0000	[diff] [blame]	132	Names[RTLIB::MUL_F80] = "__mulxf3";
Dale Johannesen	161e897	2007-10-05 20:04:43 +0000	[diff] [blame]	133	Names[RTLIB::MUL_PPCF128] = "__gcc_qmul";
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	134	Names[RTLIB::DIV_F32] = "__divsf3";
				135	Names[RTLIB::DIV_F64] = "__divdf3";
Duncan Sands	007f984	2008-01-10 10:28:30 +0000	[diff] [blame]	136	Names[RTLIB::DIV_F80] = "__divxf3";
Dale Johannesen	161e897	2007-10-05 20:04:43 +0000	[diff] [blame]	137	Names[RTLIB::DIV_PPCF128] = "__gcc_qdiv";
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	138	Names[RTLIB::REM_F32] = "fmodf";
				139	Names[RTLIB::REM_F64] = "fmod";
Duncan Sands	007f984	2008-01-10 10:28:30 +0000	[diff] [blame]	140	Names[RTLIB::REM_F80] = "fmodl";
Dale Johannesen	161e897	2007-10-05 20:04:43 +0000	[diff] [blame]	141	Names[RTLIB::REM_PPCF128] = "fmodl";
Cameron Zwarich	3339084	2011-07-08 21:39:21 +0000	[diff] [blame]	142	Names[RTLIB::FMA_F32] = "fmaf";
				143	Names[RTLIB::FMA_F64] = "fma";
				144	Names[RTLIB::FMA_F80] = "fmal";
				145	Names[RTLIB::FMA_PPCF128] = "fmal";
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	146	Names[RTLIB::POWI_F32] = "__powisf2";
				147	Names[RTLIB::POWI_F64] = "__powidf2";
Dale Johannesen	161e897	2007-10-05 20:04:43 +0000	[diff] [blame]	148	Names[RTLIB::POWI_F80] = "__powixf2";
				149	Names[RTLIB::POWI_PPCF128] = "__powitf2";
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	150	Names[RTLIB::SQRT_F32] = "sqrtf";
				151	Names[RTLIB::SQRT_F64] = "sqrt";
Dale Johannesen	161e897	2007-10-05 20:04:43 +0000	[diff] [blame]	152	Names[RTLIB::SQRT_F80] = "sqrtl";
				153	Names[RTLIB::SQRT_PPCF128] = "sqrtl";
Dale Johannesen	7794f2a	2008-09-04 00:47:13 +0000	[diff] [blame]	154	Names[RTLIB::LOG_F32] = "logf";
				155	Names[RTLIB::LOG_F64] = "log";
				156	Names[RTLIB::LOG_F80] = "logl";
				157	Names[RTLIB::LOG_PPCF128] = "logl";
				158	Names[RTLIB::LOG2_F32] = "log2f";
				159	Names[RTLIB::LOG2_F64] = "log2";
				160	Names[RTLIB::LOG2_F80] = "log2l";
				161	Names[RTLIB::LOG2_PPCF128] = "log2l";
				162	Names[RTLIB::LOG10_F32] = "log10f";
				163	Names[RTLIB::LOG10_F64] = "log10";
				164	Names[RTLIB::LOG10_F80] = "log10l";
				165	Names[RTLIB::LOG10_PPCF128] = "log10l";
				166	Names[RTLIB::EXP_F32] = "expf";
				167	Names[RTLIB::EXP_F64] = "exp";
				168	Names[RTLIB::EXP_F80] = "expl";
				169	Names[RTLIB::EXP_PPCF128] = "expl";
				170	Names[RTLIB::EXP2_F32] = "exp2f";
				171	Names[RTLIB::EXP2_F64] = "exp2";
				172	Names[RTLIB::EXP2_F80] = "exp2l";
				173	Names[RTLIB::EXP2_PPCF128] = "exp2l";
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	174	Names[RTLIB::SIN_F32] = "sinf";
				175	Names[RTLIB::SIN_F64] = "sin";
Duncan Sands	007f984	2008-01-10 10:28:30 +0000	[diff] [blame]	176	Names[RTLIB::SIN_F80] = "sinl";
				177	Names[RTLIB::SIN_PPCF128] = "sinl";
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	178	Names[RTLIB::COS_F32] = "cosf";
				179	Names[RTLIB::COS_F64] = "cos";
Duncan Sands	007f984	2008-01-10 10:28:30 +0000	[diff] [blame]	180	Names[RTLIB::COS_F80] = "cosl";
				181	Names[RTLIB::COS_PPCF128] = "cosl";
Dan Gohman	e54be10	2007-10-11 23:09:10 +0000	[diff] [blame]	182	Names[RTLIB::POW_F32] = "powf";
				183	Names[RTLIB::POW_F64] = "pow";
				184	Names[RTLIB::POW_F80] = "powl";
				185	Names[RTLIB::POW_PPCF128] = "powl";
Dan Gohman	2bb1e3e	2008-08-21 18:38:14 +0000	[diff] [blame]	186	Names[RTLIB::CEIL_F32] = "ceilf";
				187	Names[RTLIB::CEIL_F64] = "ceil";
				188	Names[RTLIB::CEIL_F80] = "ceill";
				189	Names[RTLIB::CEIL_PPCF128] = "ceill";
				190	Names[RTLIB::TRUNC_F32] = "truncf";
				191	Names[RTLIB::TRUNC_F64] = "trunc";
				192	Names[RTLIB::TRUNC_F80] = "truncl";
				193	Names[RTLIB::TRUNC_PPCF128] = "truncl";
				194	Names[RTLIB::RINT_F32] = "rintf";
				195	Names[RTLIB::RINT_F64] = "rint";
				196	Names[RTLIB::RINT_F80] = "rintl";
				197	Names[RTLIB::RINT_PPCF128] = "rintl";
				198	Names[RTLIB::NEARBYINT_F32] = "nearbyintf";
				199	Names[RTLIB::NEARBYINT_F64] = "nearbyint";
				200	Names[RTLIB::NEARBYINT_F80] = "nearbyintl";
				201	Names[RTLIB::NEARBYINT_PPCF128] = "nearbyintl";
				202	Names[RTLIB::FLOOR_F32] = "floorf";
				203	Names[RTLIB::FLOOR_F64] = "floor";
				204	Names[RTLIB::FLOOR_F80] = "floorl";
				205	Names[RTLIB::FLOOR_PPCF128] = "floorl";
Duncan Sands	d2c817e	2010-03-14 21:08:40 +0000	[diff] [blame]	206	Names[RTLIB::COPYSIGN_F32] = "copysignf";
				207	Names[RTLIB::COPYSIGN_F64] = "copysign";
				208	Names[RTLIB::COPYSIGN_F80] = "copysignl";
				209	Names[RTLIB::COPYSIGN_PPCF128] = "copysignl";
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	210	Names[RTLIB::FPEXT_F32_F64] = "__extendsfdf2";
Anton Korobeynikov	927411b	2010-03-14 18:42:24 +0000	[diff] [blame]	211	Names[RTLIB::FPEXT_F16_F32] = "__gnu_h2f_ieee";
				212	Names[RTLIB::FPROUND_F32_F16] = "__gnu_f2h_ieee";
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	213	Names[RTLIB::FPROUND_F64_F32] = "__truncdfsf2";
Bruno Cardoso Lopes	e36bfe6	2008-08-07 19:01:24 +0000	[diff] [blame]	214	Names[RTLIB::FPROUND_F80_F32] = "__truncxfsf2";
				215	Names[RTLIB::FPROUND_PPCF128_F32] = "__trunctfsf2";
				216	Names[RTLIB::FPROUND_F80_F64] = "__truncxfdf2";
				217	Names[RTLIB::FPROUND_PPCF128_F64] = "__trunctfdf2";
Anton Korobeynikov	de0118c	2010-03-26 21:32:14 +0000	[diff] [blame]	218	Names[RTLIB::FPTOSINT_F32_I8] = "__fixsfqi";
				219	Names[RTLIB::FPTOSINT_F32_I16] = "__fixsfhi";
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	220	Names[RTLIB::FPTOSINT_F32_I32] = "__fixsfsi";
				221	Names[RTLIB::FPTOSINT_F32_I64] = "__fixsfdi";
Dan Gohman	a2e9485	2008-03-10 23:03:31 +0000	[diff] [blame]	222	Names[RTLIB::FPTOSINT_F32_I128] = "__fixsfti";
Anton Korobeynikov	de0118c	2010-03-26 21:32:14 +0000	[diff] [blame]	223	Names[RTLIB::FPTOSINT_F64_I8] = "__fixdfqi";
				224	Names[RTLIB::FPTOSINT_F64_I16] = "__fixdfhi";
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	225	Names[RTLIB::FPTOSINT_F64_I32] = "__fixdfsi";
				226	Names[RTLIB::FPTOSINT_F64_I64] = "__fixdfdi";
Dan Gohman	a2e9485	2008-03-10 23:03:31 +0000	[diff] [blame]	227	Names[RTLIB::FPTOSINT_F64_I128] = "__fixdfti";
Duncan Sands	be1ad4d	2008-07-10 15:33:02 +0000	[diff] [blame]	228	Names[RTLIB::FPTOSINT_F80_I32] = "__fixxfsi";
Dale Johannesen	161e897	2007-10-05 20:04:43 +0000	[diff] [blame]	229	Names[RTLIB::FPTOSINT_F80_I64] = "__fixxfdi";
Dan Gohman	a2e9485	2008-03-10 23:03:31 +0000	[diff] [blame]	230	Names[RTLIB::FPTOSINT_F80_I128] = "__fixxfti";
Duncan Sands	041cde2	2008-06-25 20:24:48 +0000	[diff] [blame]	231	Names[RTLIB::FPTOSINT_PPCF128_I32] = "__fixtfsi";
Dale Johannesen	161e897	2007-10-05 20:04:43 +0000	[diff] [blame]	232	Names[RTLIB::FPTOSINT_PPCF128_I64] = "__fixtfdi";
Dan Gohman	a2e9485	2008-03-10 23:03:31 +0000	[diff] [blame]	233	Names[RTLIB::FPTOSINT_PPCF128_I128] = "__fixtfti";
Anton Korobeynikov	de0118c	2010-03-26 21:32:14 +0000	[diff] [blame]	234	Names[RTLIB::FPTOUINT_F32_I8] = "__fixunssfqi";
				235	Names[RTLIB::FPTOUINT_F32_I16] = "__fixunssfhi";
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	236	Names[RTLIB::FPTOUINT_F32_I32] = "__fixunssfsi";
				237	Names[RTLIB::FPTOUINT_F32_I64] = "__fixunssfdi";
Dan Gohman	a2e9485	2008-03-10 23:03:31 +0000	[diff] [blame]	238	Names[RTLIB::FPTOUINT_F32_I128] = "__fixunssfti";
Anton Korobeynikov	de0118c	2010-03-26 21:32:14 +0000	[diff] [blame]	239	Names[RTLIB::FPTOUINT_F64_I8] = "__fixunsdfqi";
				240	Names[RTLIB::FPTOUINT_F64_I16] = "__fixunsdfhi";
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	241	Names[RTLIB::FPTOUINT_F64_I32] = "__fixunsdfsi";
				242	Names[RTLIB::FPTOUINT_F64_I64] = "__fixunsdfdi";
Dan Gohman	a2e9485	2008-03-10 23:03:31 +0000	[diff] [blame]	243	Names[RTLIB::FPTOUINT_F64_I128] = "__fixunsdfti";
Dale Johannesen	161e897	2007-10-05 20:04:43 +0000	[diff] [blame]	244	Names[RTLIB::FPTOUINT_F80_I32] = "__fixunsxfsi";
				245	Names[RTLIB::FPTOUINT_F80_I64] = "__fixunsxfdi";
Dan Gohman	a2e9485	2008-03-10 23:03:31 +0000	[diff] [blame]	246	Names[RTLIB::FPTOUINT_F80_I128] = "__fixunsxfti";
Duncan Sands	041cde2	2008-06-25 20:24:48 +0000	[diff] [blame]	247	Names[RTLIB::FPTOUINT_PPCF128_I32] = "__fixunstfsi";
Dale Johannesen	161e897	2007-10-05 20:04:43 +0000	[diff] [blame]	248	Names[RTLIB::FPTOUINT_PPCF128_I64] = "__fixunstfdi";
Dan Gohman	a2e9485	2008-03-10 23:03:31 +0000	[diff] [blame]	249	Names[RTLIB::FPTOUINT_PPCF128_I128] = "__fixunstfti";
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	250	Names[RTLIB::SINTTOFP_I32_F32] = "__floatsisf";
				251	Names[RTLIB::SINTTOFP_I32_F64] = "__floatsidf";
Duncan Sands	9bed0f5	2008-07-11 16:57:02 +0000	[diff] [blame]	252	Names[RTLIB::SINTTOFP_I32_F80] = "__floatsixf";
				253	Names[RTLIB::SINTTOFP_I32_PPCF128] = "__floatsitf";
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	254	Names[RTLIB::SINTTOFP_I64_F32] = "__floatdisf";
				255	Names[RTLIB::SINTTOFP_I64_F64] = "__floatdidf";
Dale Johannesen	161e897	2007-10-05 20:04:43 +0000	[diff] [blame]	256	Names[RTLIB::SINTTOFP_I64_F80] = "__floatdixf";
				257	Names[RTLIB::SINTTOFP_I64_PPCF128] = "__floatditf";
Dan Gohman	d91446d	2008-03-05 01:08:17 +0000	[diff] [blame]	258	Names[RTLIB::SINTTOFP_I128_F32] = "__floattisf";
				259	Names[RTLIB::SINTTOFP_I128_F64] = "__floattidf";
				260	Names[RTLIB::SINTTOFP_I128_F80] = "__floattixf";
				261	Names[RTLIB::SINTTOFP_I128_PPCF128] = "__floattitf";
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	262	Names[RTLIB::UINTTOFP_I32_F32] = "__floatunsisf";
				263	Names[RTLIB::UINTTOFP_I32_F64] = "__floatunsidf";
Duncan Sands	ac6cece	2008-07-11 17:00:14 +0000	[diff] [blame]	264	Names[RTLIB::UINTTOFP_I32_F80] = "__floatunsixf";
				265	Names[RTLIB::UINTTOFP_I32_PPCF128] = "__floatunsitf";
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	266	Names[RTLIB::UINTTOFP_I64_F32] = "__floatundisf";
				267	Names[RTLIB::UINTTOFP_I64_F64] = "__floatundidf";
Duncan Sands	ac6cece	2008-07-11 17:00:14 +0000	[diff] [blame]	268	Names[RTLIB::UINTTOFP_I64_F80] = "__floatundixf";
				269	Names[RTLIB::UINTTOFP_I64_PPCF128] = "__floatunditf";
				270	Names[RTLIB::UINTTOFP_I128_F32] = "__floatuntisf";
				271	Names[RTLIB::UINTTOFP_I128_F64] = "__floatuntidf";
				272	Names[RTLIB::UINTTOFP_I128_F80] = "__floatuntixf";
				273	Names[RTLIB::UINTTOFP_I128_PPCF128] = "__floatuntitf";
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	274	Names[RTLIB::OEQ_F32] = "__eqsf2";
				275	Names[RTLIB::OEQ_F64] = "__eqdf2";
				276	Names[RTLIB::UNE_F32] = "__nesf2";
				277	Names[RTLIB::UNE_F64] = "__nedf2";
				278	Names[RTLIB::OGE_F32] = "__gesf2";
				279	Names[RTLIB::OGE_F64] = "__gedf2";
				280	Names[RTLIB::OLT_F32] = "__ltsf2";
				281	Names[RTLIB::OLT_F64] = "__ltdf2";
				282	Names[RTLIB::OLE_F32] = "__lesf2";
				283	Names[RTLIB::OLE_F64] = "__ledf2";
				284	Names[RTLIB::OGT_F32] = "__gtsf2";
				285	Names[RTLIB::OGT_F64] = "__gtdf2";
				286	Names[RTLIB::UO_F32] = "__unordsf2";
				287	Names[RTLIB::UO_F64] = "__unorddf2";
Evan Cheng	d385fd6	2007-01-31 09:29:11 +0000	[diff] [blame]	288	Names[RTLIB::O_F32] = "__unordsf2";
				289	Names[RTLIB::O_F64] = "__unorddf2";
Sanjiv Gupta	a114baa	2009-07-30 09:12:56 +0000	[diff] [blame]	290	Names[RTLIB::MEMCPY] = "memcpy";
				291	Names[RTLIB::MEMMOVE] = "memmove";
				292	Names[RTLIB::MEMSET] = "memset";
Duncan Sands	b0f1e17	2009-05-22 20:36:31 +0000	[diff] [blame]	293	Names[RTLIB::UNWIND_RESUME] = "_Unwind_Resume";
Jim Grosbach	e03262f	2010-06-18 21:43:38 +0000	[diff] [blame]	294	Names[RTLIB::SYNC_VAL_COMPARE_AND_SWAP_1] = "__sync_val_compare_and_swap_1";
				295	Names[RTLIB::SYNC_VAL_COMPARE_AND_SWAP_2] = "__sync_val_compare_and_swap_2";
				296	Names[RTLIB::SYNC_VAL_COMPARE_AND_SWAP_4] = "__sync_val_compare_and_swap_4";
				297	Names[RTLIB::SYNC_VAL_COMPARE_AND_SWAP_8] = "__sync_val_compare_and_swap_8";
Jim Grosbach	ef6eb9c	2010-06-18 23:03:10 +0000	[diff] [blame]	298	Names[RTLIB::SYNC_LOCK_TEST_AND_SET_1] = "__sync_lock_test_and_set_1";
				299	Names[RTLIB::SYNC_LOCK_TEST_AND_SET_2] = "__sync_lock_test_and_set_2";
				300	Names[RTLIB::SYNC_LOCK_TEST_AND_SET_4] = "__sync_lock_test_and_set_4";
				301	Names[RTLIB::SYNC_LOCK_TEST_AND_SET_8] = "__sync_lock_test_and_set_8";
Jim Grosbach	e03262f	2010-06-18 21:43:38 +0000	[diff] [blame]	302	Names[RTLIB::SYNC_FETCH_AND_ADD_1] = "__sync_fetch_and_add_1";
				303	Names[RTLIB::SYNC_FETCH_AND_ADD_2] = "__sync_fetch_and_add_2";
				304	Names[RTLIB::SYNC_FETCH_AND_ADD_4] = "__sync_fetch_and_add_4";
				305	Names[RTLIB::SYNC_FETCH_AND_ADD_8] = "__sync_fetch_and_add_8";
				306	Names[RTLIB::SYNC_FETCH_AND_SUB_1] = "__sync_fetch_and_sub_1";
				307	Names[RTLIB::SYNC_FETCH_AND_SUB_2] = "__sync_fetch_and_sub_2";
				308	Names[RTLIB::SYNC_FETCH_AND_SUB_4] = "__sync_fetch_and_sub_4";
				309	Names[RTLIB::SYNC_FETCH_AND_SUB_8] = "__sync_fetch_and_sub_8";
				310	Names[RTLIB::SYNC_FETCH_AND_AND_1] = "__sync_fetch_and_and_1";
				311	Names[RTLIB::SYNC_FETCH_AND_AND_2] = "__sync_fetch_and_and_2";
				312	Names[RTLIB::SYNC_FETCH_AND_AND_4] = "__sync_fetch_and_and_4";
				313	Names[RTLIB::SYNC_FETCH_AND_AND_8] = "__sync_fetch_and_and_8";
				314	Names[RTLIB::SYNC_FETCH_AND_OR_1] = "__sync_fetch_and_or_1";
				315	Names[RTLIB::SYNC_FETCH_AND_OR_2] = "__sync_fetch_and_or_2";
				316	Names[RTLIB::SYNC_FETCH_AND_OR_4] = "__sync_fetch_and_or_4";
				317	Names[RTLIB::SYNC_FETCH_AND_OR_8] = "__sync_fetch_and_or_8";
				318	Names[RTLIB::SYNC_FETCH_AND_XOR_1] = "__sync_fetch_and_xor_1";
				319	Names[RTLIB::SYNC_FETCH_AND_XOR_2] = "__sync_fetch_and_xor_2";
Jim Grosbach	312b7c9	2011-10-14 15:53:48 +0000	[diff] [blame]	320	Names[RTLIB::SYNC_FETCH_AND_XOR_4] = "__sync_fetch_and_xor_4";
Jim Grosbach	e03262f	2010-06-18 21:43:38 +0000	[diff] [blame]	321	Names[RTLIB::SYNC_FETCH_AND_XOR_8] = "__sync_fetch_and_xor_8";
				322	Names[RTLIB::SYNC_FETCH_AND_NAND_1] = "__sync_fetch_and_nand_1";
				323	Names[RTLIB::SYNC_FETCH_AND_NAND_2] = "__sync_fetch_and_nand_2";
				324	Names[RTLIB::SYNC_FETCH_AND_NAND_4] = "__sync_fetch_and_nand_4";
				325	Names[RTLIB::SYNC_FETCH_AND_NAND_8] = "__sync_fetch_and_nand_8";
Evan Cheng	d385fd6	2007-01-31 09:29:11 +0000	[diff] [blame]	326	}
				327
Anton Korobeynikov	72977a4	2009-08-14 20:10:52 +0000	[diff] [blame]	328	/// InitLibcallCallingConvs - Set default libcall CallingConvs.
				329	///
				330	static void InitLibcallCallingConvs(CallingConv::ID *CCs) {
				331	for (int i = 0; i < RTLIB::UNKNOWN_LIBCALL; ++i) {
				332	CCs[i] = CallingConv::C;
				333	}
				334	}
				335
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	336	/// getFPEXT - Return the FPEXT__ value for the given types, or
				337	/// UNKNOWN_LIBCALL if there is none.
Owen Anderson	e50ed30	2009-08-10 22:56:29 +0000	[diff] [blame]	338	RTLIB::Libcall RTLIB::getFPEXT(EVT OpVT, EVT RetVT) {
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	339	if (OpVT == MVT::f32) {
				340	if (RetVT == MVT::f64)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	341	return FPEXT_F32_F64;
				342	}
Anton Korobeynikov	927411b	2010-03-14 18:42:24 +0000	[diff] [blame]	343
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	344	return UNKNOWN_LIBCALL;
				345	}
				346
				347	/// getFPROUND - Return the FPROUND__ value for the given types, or
				348	/// UNKNOWN_LIBCALL if there is none.
Owen Anderson	e50ed30	2009-08-10 22:56:29 +0000	[diff] [blame]	349	RTLIB::Libcall RTLIB::getFPROUND(EVT OpVT, EVT RetVT) {
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	350	if (RetVT == MVT::f32) {
				351	if (OpVT == MVT::f64)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	352	return FPROUND_F64_F32;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	353	if (OpVT == MVT::f80)
Bruno Cardoso Lopes	e36bfe6	2008-08-07 19:01:24 +0000	[diff] [blame]	354	return FPROUND_F80_F32;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	355	if (OpVT == MVT::ppcf128)
Bruno Cardoso Lopes	e36bfe6	2008-08-07 19:01:24 +0000	[diff] [blame]	356	return FPROUND_PPCF128_F32;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	357	} else if (RetVT == MVT::f64) {
				358	if (OpVT == MVT::f80)
Bruno Cardoso Lopes	e36bfe6	2008-08-07 19:01:24 +0000	[diff] [blame]	359	return FPROUND_F80_F64;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	360	if (OpVT == MVT::ppcf128)
Bruno Cardoso Lopes	e36bfe6	2008-08-07 19:01:24 +0000	[diff] [blame]	361	return FPROUND_PPCF128_F64;
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	362	}
Anton Korobeynikov	927411b	2010-03-14 18:42:24 +0000	[diff] [blame]	363
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	364	return UNKNOWN_LIBCALL;
				365	}
				366
				367	/// getFPTOSINT - Return the FPTOSINT__ value for the given types, or
				368	/// UNKNOWN_LIBCALL if there is none.
Owen Anderson	e50ed30	2009-08-10 22:56:29 +0000	[diff] [blame]	369	RTLIB::Libcall RTLIB::getFPTOSINT(EVT OpVT, EVT RetVT) {
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	370	if (OpVT == MVT::f32) {
				371	if (RetVT == MVT::i8)
Sanjiv Gupta	8aa207e	2009-06-16 09:03:58 +0000	[diff] [blame]	372	return FPTOSINT_F32_I8;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	373	if (RetVT == MVT::i16)
Sanjiv Gupta	8aa207e	2009-06-16 09:03:58 +0000	[diff] [blame]	374	return FPTOSINT_F32_I16;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	375	if (RetVT == MVT::i32)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	376	return FPTOSINT_F32_I32;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	377	if (RetVT == MVT::i64)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	378	return FPTOSINT_F32_I64;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	379	if (RetVT == MVT::i128)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	380	return FPTOSINT_F32_I128;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	381	} else if (OpVT == MVT::f64) {
Anton Korobeynikov	de0118c	2010-03-26 21:32:14 +0000	[diff] [blame]	382	if (RetVT == MVT::i8)
				383	return FPTOSINT_F64_I8;
				384	if (RetVT == MVT::i16)
				385	return FPTOSINT_F64_I16;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	386	if (RetVT == MVT::i32)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	387	return FPTOSINT_F64_I32;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	388	if (RetVT == MVT::i64)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	389	return FPTOSINT_F64_I64;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	390	if (RetVT == MVT::i128)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	391	return FPTOSINT_F64_I128;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	392	} else if (OpVT == MVT::f80) {
				393	if (RetVT == MVT::i32)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	394	return FPTOSINT_F80_I32;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	395	if (RetVT == MVT::i64)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	396	return FPTOSINT_F80_I64;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	397	if (RetVT == MVT::i128)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	398	return FPTOSINT_F80_I128;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	399	} else if (OpVT == MVT::ppcf128) {
				400	if (RetVT == MVT::i32)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	401	return FPTOSINT_PPCF128_I32;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	402	if (RetVT == MVT::i64)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	403	return FPTOSINT_PPCF128_I64;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	404	if (RetVT == MVT::i128)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	405	return FPTOSINT_PPCF128_I128;
				406	}
				407	return UNKNOWN_LIBCALL;
				408	}
				409
				410	/// getFPTOUINT - Return the FPTOUINT__ value for the given types, or
				411	/// UNKNOWN_LIBCALL if there is none.
Owen Anderson	e50ed30	2009-08-10 22:56:29 +0000	[diff] [blame]	412	RTLIB::Libcall RTLIB::getFPTOUINT(EVT OpVT, EVT RetVT) {
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	413	if (OpVT == MVT::f32) {
				414	if (RetVT == MVT::i8)
Sanjiv Gupta	8aa207e	2009-06-16 09:03:58 +0000	[diff] [blame]	415	return FPTOUINT_F32_I8;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	416	if (RetVT == MVT::i16)
Sanjiv Gupta	8aa207e	2009-06-16 09:03:58 +0000	[diff] [blame]	417	return FPTOUINT_F32_I16;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	418	if (RetVT == MVT::i32)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	419	return FPTOUINT_F32_I32;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	420	if (RetVT == MVT::i64)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	421	return FPTOUINT_F32_I64;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	422	if (RetVT == MVT::i128)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	423	return FPTOUINT_F32_I128;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	424	} else if (OpVT == MVT::f64) {
Anton Korobeynikov	de0118c	2010-03-26 21:32:14 +0000	[diff] [blame]	425	if (RetVT == MVT::i8)
				426	return FPTOUINT_F64_I8;
				427	if (RetVT == MVT::i16)
				428	return FPTOUINT_F64_I16;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	429	if (RetVT == MVT::i32)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	430	return FPTOUINT_F64_I32;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	431	if (RetVT == MVT::i64)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	432	return FPTOUINT_F64_I64;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	433	if (RetVT == MVT::i128)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	434	return FPTOUINT_F64_I128;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	435	} else if (OpVT == MVT::f80) {
				436	if (RetVT == MVT::i32)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	437	return FPTOUINT_F80_I32;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	438	if (RetVT == MVT::i64)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	439	return FPTOUINT_F80_I64;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	440	if (RetVT == MVT::i128)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	441	return FPTOUINT_F80_I128;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	442	} else if (OpVT == MVT::ppcf128) {
				443	if (RetVT == MVT::i32)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	444	return FPTOUINT_PPCF128_I32;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	445	if (RetVT == MVT::i64)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	446	return FPTOUINT_PPCF128_I64;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	447	if (RetVT == MVT::i128)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	448	return FPTOUINT_PPCF128_I128;
				449	}
				450	return UNKNOWN_LIBCALL;
				451	}
				452
				453	/// getSINTTOFP - Return the SINTTOFP__ value for the given types, or
				454	/// UNKNOWN_LIBCALL if there is none.
Owen Anderson	e50ed30	2009-08-10 22:56:29 +0000	[diff] [blame]	455	RTLIB::Libcall RTLIB::getSINTTOFP(EVT OpVT, EVT RetVT) {
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	456	if (OpVT == MVT::i32) {
				457	if (RetVT == MVT::f32)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	458	return SINTTOFP_I32_F32;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	459	else if (RetVT == MVT::f64)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	460	return SINTTOFP_I32_F64;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	461	else if (RetVT == MVT::f80)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	462	return SINTTOFP_I32_F80;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	463	else if (RetVT == MVT::ppcf128)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	464	return SINTTOFP_I32_PPCF128;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	465	} else if (OpVT == MVT::i64) {
				466	if (RetVT == MVT::f32)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	467	return SINTTOFP_I64_F32;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	468	else if (RetVT == MVT::f64)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	469	return SINTTOFP_I64_F64;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	470	else if (RetVT == MVT::f80)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	471	return SINTTOFP_I64_F80;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	472	else if (RetVT == MVT::ppcf128)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	473	return SINTTOFP_I64_PPCF128;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	474	} else if (OpVT == MVT::i128) {
				475	if (RetVT == MVT::f32)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	476	return SINTTOFP_I128_F32;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	477	else if (RetVT == MVT::f64)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	478	return SINTTOFP_I128_F64;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	479	else if (RetVT == MVT::f80)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	480	return SINTTOFP_I128_F80;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	481	else if (RetVT == MVT::ppcf128)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	482	return SINTTOFP_I128_PPCF128;
				483	}
				484	return UNKNOWN_LIBCALL;
				485	}
				486
				487	/// getUINTTOFP - Return the UINTTOFP__ value for the given types, or
				488	/// UNKNOWN_LIBCALL if there is none.
Owen Anderson	e50ed30	2009-08-10 22:56:29 +0000	[diff] [blame]	489	RTLIB::Libcall RTLIB::getUINTTOFP(EVT OpVT, EVT RetVT) {
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	490	if (OpVT == MVT::i32) {
				491	if (RetVT == MVT::f32)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	492	return UINTTOFP_I32_F32;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	493	else if (RetVT == MVT::f64)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	494	return UINTTOFP_I32_F64;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	495	else if (RetVT == MVT::f80)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	496	return UINTTOFP_I32_F80;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	497	else if (RetVT == MVT::ppcf128)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	498	return UINTTOFP_I32_PPCF128;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	499	} else if (OpVT == MVT::i64) {
				500	if (RetVT == MVT::f32)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	501	return UINTTOFP_I64_F32;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	502	else if (RetVT == MVT::f64)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	503	return UINTTOFP_I64_F64;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	504	else if (RetVT == MVT::f80)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	505	return UINTTOFP_I64_F80;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	506	else if (RetVT == MVT::ppcf128)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	507	return UINTTOFP_I64_PPCF128;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	508	} else if (OpVT == MVT::i128) {
				509	if (RetVT == MVT::f32)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	510	return UINTTOFP_I128_F32;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	511	else if (RetVT == MVT::f64)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	512	return UINTTOFP_I128_F64;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	513	else if (RetVT == MVT::f80)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	514	return UINTTOFP_I128_F80;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	515	else if (RetVT == MVT::ppcf128)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	516	return UINTTOFP_I128_PPCF128;
				517	}
				518	return UNKNOWN_LIBCALL;
				519	}
				520
Evan Cheng	d385fd6	2007-01-31 09:29:11 +0000	[diff] [blame]	521	/// InitCmpLibcallCCs - Set default comparison libcall CC.
				522	///
				523	static void InitCmpLibcallCCs(ISD::CondCode *CCs) {
				524	memset(CCs, ISD::SETCC_INVALID, sizeof(ISD::CondCode)*RTLIB::UNKNOWN_LIBCALL);
				525	CCs[RTLIB::OEQ_F32] = ISD::SETEQ;
				526	CCs[RTLIB::OEQ_F64] = ISD::SETEQ;
				527	CCs[RTLIB::UNE_F32] = ISD::SETNE;
				528	CCs[RTLIB::UNE_F64] = ISD::SETNE;
				529	CCs[RTLIB::OGE_F32] = ISD::SETGE;
				530	CCs[RTLIB::OGE_F64] = ISD::SETGE;
				531	CCs[RTLIB::OLT_F32] = ISD::SETLT;
				532	CCs[RTLIB::OLT_F64] = ISD::SETLT;
				533	CCs[RTLIB::OLE_F32] = ISD::SETLE;
				534	CCs[RTLIB::OLE_F64] = ISD::SETLE;
				535	CCs[RTLIB::OGT_F32] = ISD::SETGT;
				536	CCs[RTLIB::OGT_F64] = ISD::SETGT;
				537	CCs[RTLIB::UO_F32] = ISD::SETNE;
				538	CCs[RTLIB::UO_F64] = ISD::SETNE;
				539	CCs[RTLIB::O_F32] = ISD::SETEQ;
				540	CCs[RTLIB::O_F64] = ISD::SETEQ;
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	541	}
				542
Chris Lattner	f014412	2009-07-28 03:13:23 +0000	[diff] [blame]	543	/// NOTE: The constructor takes ownership of TLOF.
Dan Gohman	f0757b0	2010-04-21 01:34:56 +0000	[diff] [blame]	544	TargetLowering::TargetLowering(const TargetMachine &tm,
				545	const TargetLoweringObjectFile *tlof)
Nadav Rotem	b6fbec3	2011-06-01 12:51:46 +0000	[diff] [blame]	546	: TM(tm), TD(TM.getTargetData()), TLOF(*tlof),
				547	mayPromoteElements(AllowPromoteIntElem) {
Chris Lattner	cba82f9	2005-01-16 07:28:11 +0000	[diff] [blame]	548	// All operations default to being supported.
				549	memset(OpActions, 0, sizeof(OpActions));
Evan Cheng	0329466	2008-10-14 21:26:46 +0000	[diff] [blame]	550	memset(LoadExtActions, 0, sizeof(LoadExtActions));
Chris Lattner	ddf8956	2008-01-17 19:59:44 +0000	[diff] [blame]	551	memset(TruncStoreActions, 0, sizeof(TruncStoreActions));
Chris Lattner	c9133f9	2008-01-18 19:36:20 +0000	[diff] [blame]	552	memset(IndexedModeActions, 0, sizeof(IndexedModeActions));
Evan Cheng	7f04268	2008-10-15 02:05:31 +0000	[diff] [blame]	553	memset(CondCodeActions, 0, sizeof(CondCodeActions));
Dan Gohman	93f81e2	2007-07-09 20:49:44 +0000	[diff] [blame]	554
Chris Lattner	1a3048b	2007-12-22 20:47:56 +0000	[diff] [blame]	555	// Set default actions for various operations.
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	556	for (unsigned VT = 0; VT != (unsigned)MVT::LAST_VALUETYPE; ++VT) {
Chris Lattner	1a3048b	2007-12-22 20:47:56 +0000	[diff] [blame]	557	// Default all indexed load / store to expand.
Evan Cheng	5ff839f	2006-11-09 18:56:43 +0000	[diff] [blame]	558	for (unsigned IM = (unsigned)ISD::PRE_INC;
				559	IM != (unsigned)ISD::LAST_INDEXED_MODE; ++IM) {
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	560	setIndexedLoadAction(IM, (MVT::SimpleValueType)VT, Expand);
				561	setIndexedStoreAction(IM, (MVT::SimpleValueType)VT, Expand);
Evan Cheng	5ff839f	2006-11-09 18:56:43 +0000	[diff] [blame]	562	}
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	563
Chris Lattner	1a3048b	2007-12-22 20:47:56 +0000	[diff] [blame]	564	// These operations default to expand.
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	565	setOperationAction(ISD::FGETSIGN, (MVT::SimpleValueType)VT, Expand);
				566	setOperationAction(ISD::CONCAT_VECTORS, (MVT::SimpleValueType)VT, Expand);
Evan Cheng	5ff839f	2006-11-09 18:56:43 +0000	[diff] [blame]	567	}
Evan Cheng	d2cde68	2008-03-10 19:38:10 +0000	[diff] [blame]	568
				569	// Most targets ignore the @llvm.prefetch intrinsic.
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	570	setOperationAction(ISD::PREFETCH, MVT::Other, Expand);
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	571
				572	// ConstantFP nodes default to expand. Targets can either change this to
Evan Cheng	eb2f969	2009-10-27 19:56:55 +0000	[diff] [blame]	573	// Legal, in which case all fp constants are legal, or use isFPImmLegal()
Nate Begeman	e179584	2008-02-14 08:57:00 +0000	[diff] [blame]	574	// to optimize expansions for certain constants.
Dan Gohman	e3376ec	2011-12-20 00:02:33 +0000	[diff] [blame]	575	setOperationAction(ISD::ConstantFP, MVT::f16, Expand);
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	576	setOperationAction(ISD::ConstantFP, MVT::f32, Expand);
				577	setOperationAction(ISD::ConstantFP, MVT::f64, Expand);
				578	setOperationAction(ISD::ConstantFP, MVT::f80, Expand);
Chris Lattner	310968c	2005-01-07 07:44:53 +0000	[diff] [blame]	579
Dale Johannesen	0bb4160	2008-09-22 21:57:32 +0000	[diff] [blame]	580	// These library functions default to expand.
Dan Gohman	e3376ec	2011-12-20 00:02:33 +0000	[diff] [blame]	581	setOperationAction(ISD::FLOG , MVT::f16, Expand);
				582	setOperationAction(ISD::FLOG2, MVT::f16, Expand);
				583	setOperationAction(ISD::FLOG10, MVT::f16, Expand);
				584	setOperationAction(ISD::FEXP , MVT::f16, Expand);
				585	setOperationAction(ISD::FEXP2, MVT::f16, Expand);
				586	setOperationAction(ISD::FFLOOR, MVT::f16, Expand);
				587	setOperationAction(ISD::FNEARBYINT, MVT::f16, Expand);
				588	setOperationAction(ISD::FCEIL, MVT::f16, Expand);
				589	setOperationAction(ISD::FRINT, MVT::f16, Expand);
				590	setOperationAction(ISD::FTRUNC, MVT::f16, Expand);
Owen Anderson	4a4fdf3	2011-12-08 19:32:14 +0000	[diff] [blame]	591	setOperationAction(ISD::FLOG , MVT::f32, Expand);
				592	setOperationAction(ISD::FLOG2, MVT::f32, Expand);
				593	setOperationAction(ISD::FLOG10, MVT::f32, Expand);
				594	setOperationAction(ISD::FEXP , MVT::f32, Expand);
				595	setOperationAction(ISD::FEXP2, MVT::f32, Expand);
				596	setOperationAction(ISD::FFLOOR, MVT::f32, Expand);
				597	setOperationAction(ISD::FNEARBYINT, MVT::f32, Expand);
				598	setOperationAction(ISD::FCEIL, MVT::f32, Expand);
				599	setOperationAction(ISD::FRINT, MVT::f32, Expand);
				600	setOperationAction(ISD::FTRUNC, MVT::f32, Expand);
Dan Gohman	e3376ec	2011-12-20 00:02:33 +0000	[diff] [blame]	601	setOperationAction(ISD::FLOG , MVT::f64, Expand);
				602	setOperationAction(ISD::FLOG2, MVT::f64, Expand);
				603	setOperationAction(ISD::FLOG10, MVT::f64, Expand);
				604	setOperationAction(ISD::FEXP , MVT::f64, Expand);
				605	setOperationAction(ISD::FEXP2, MVT::f64, Expand);
				606	setOperationAction(ISD::FFLOOR, MVT::f64, Expand);
				607	setOperationAction(ISD::FNEARBYINT, MVT::f64, Expand);
				608	setOperationAction(ISD::FCEIL, MVT::f64, Expand);
				609	setOperationAction(ISD::FRINT, MVT::f64, Expand);
				610	setOperationAction(ISD::FTRUNC, MVT::f64, Expand);
Dale Johannesen	0bb4160	2008-09-22 21:57:32 +0000	[diff] [blame]	611
Chris Lattner	41bab0b	2008-01-15 21:58:08 +0000	[diff] [blame]	612	// Default ISD::TRAP to expand (which turns it into abort).
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	613	setOperationAction(ISD::TRAP, MVT::Other, Expand);
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	614
Owen Anderson	a69571c	2006-05-03 01:29:57 +0000	[diff] [blame]	615	IsLittleEndian = TD->isLittleEndian();
Owen Anderson	95771af	2011-02-25 21:41:48 +0000	[diff] [blame]	616	PointerTy = MVT::getIntegerVT(8*TD->getPointerSize());
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	617	memset(RegClassForVT, 0,MVT::LAST_VALUETYPEsizeof(TargetRegisterClass));
Owen Anderson	718cb66	2007-09-07 04:06:50 +0000	[diff] [blame]	618	memset(TargetDAGCombineArray, 0, array_lengthof(TargetDAGCombineArray));
Evan Cheng	a03a5dc	2006-02-14 08:38:30 +0000	[diff] [blame]	619	maxStoresPerMemset = maxStoresPerMemcpy = maxStoresPerMemmove = 8;
Evan Cheng	0521928	2011-01-06 06:52:41 +0000	[diff] [blame]	620	maxStoresPerMemsetOptSize = maxStoresPerMemcpyOptSize
				621	= maxStoresPerMemmoveOptSize = 4;
Evan Cheng	6ebf7bc	2009-05-13 21:42:09 +0000	[diff] [blame]	622	benefitFromCodePlacementOpt = false;
Anton Korobeynikov	d27a258	2006-12-10 23:12:42 +0000	[diff] [blame]	623	UseUnderscoreSetJmp = false;
				624	UseUnderscoreLongJmp = false;
Chris Lattner	6618039	2007-02-25 01:28:05 +0000	[diff] [blame]	625	SelectIsExpensive = false;
Nate Begeman	405e3ec	2005-10-21 00:02:42 +0000	[diff] [blame]	626	IntDivIsCheap = false;
				627	Pow2DivIsCheap = false;
Chris Lattner	de189be	2010-11-30 18:12:52 +0000	[diff] [blame]	628	JumpIsExpensive = false;
Chris Lattner	ee4a765	2006-01-25 18:57:15 +0000	[diff] [blame]	629	StackPointerRegisterToSaveRestore = 0;
Jim Laskey	9bb3c93	2007-02-22 18:04:49 +0000	[diff] [blame]	630	ExceptionPointerRegister = 0;
				631	ExceptionSelectorRegister = 0;
Duncan Sands	0322808	2008-11-23 15:47:28 +0000	[diff] [blame]	632	BooleanContents = UndefinedBooleanContent;
Duncan Sands	28b77e9	2011-09-06 19:07:46 +0000	[diff] [blame]	633	BooleanVectorContents = UndefinedBooleanContent;
Dan Gohman	8c2d270	2011-10-24 17:45:02 +0000	[diff] [blame]	634	SchedPreferenceInfo = Sched::ILP;
Chris Lattner	7acf5f3	2006-09-05 17:39:15 +0000	[diff] [blame]	635	JumpBufSize = 0;
Duraid Madina	0c9e0ff	2006-09-04 07:44:11 +0000	[diff] [blame]	636	JumpBufAlignment = 0;
Eli Friedman	fc5d305	2011-05-06 20:34:06 +0000	[diff] [blame]	637	MinFunctionAlignment = 0;
				638	PrefFunctionAlignment = 0;
Evan Cheng	fb8075d	2008-02-28 00:43:03 +0000	[diff] [blame]	639	PrefLoopAlignment = 0;
Rafael Espindola	cbeeae2	2010-07-11 04:01:49 +0000	[diff] [blame]	640	MinStackArgumentAlignment = 1;
Jim Grosbach	9a52649	2010-06-23 16:07:42 +0000	[diff] [blame]	641	ShouldFoldAtomicFences = false;
Eli Friedman	26689ac	2011-08-03 21:06:02 +0000	[diff] [blame]	642	InsertFencesForAtomic = false;
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	643
				644	InitLibcallNames(LibcallRoutineNames);
Evan Cheng	d385fd6	2007-01-31 09:29:11 +0000	[diff] [blame]	645	InitCmpLibcallCCs(CmpLibcallCCs);
Anton Korobeynikov	72977a4	2009-08-14 20:10:52 +0000	[diff] [blame]	646	InitLibcallCallingConvs(LibcallCallingConvs);
Chris Lattner	310968c	2005-01-07 07:44:53 +0000	[diff] [blame]	647	}
				648
Chris Lattner	f014412	2009-07-28 03:13:23 +0000	[diff] [blame]	649	TargetLowering::~TargetLowering() {
				650	delete &TLOF;
				651	}
Chris Lattner	cba82f9	2005-01-16 07:28:11 +0000	[diff] [blame]	652
Owen Anderson	95771af	2011-02-25 21:41:48 +0000	[diff] [blame]	653	MVT TargetLowering::getShiftAmountTy(EVT LHSTy) const {
				654	return MVT::getIntegerVT(8*TD->getPointerSize());
				655	}
				656
Mon P Wang	f7ea6c3	2010-02-10 23:37:45 +0000	[diff] [blame]	657	/// canOpTrap - Returns true if the operation can trap for the value type.
				658	/// VT must be a legal type.
				659	bool TargetLowering::canOpTrap(unsigned Op, EVT VT) const {
				660	assert(isTypeLegal(VT));
				661	switch (Op) {
				662	default:
				663	return false;
				664	case ISD::FDIV:
				665	case ISD::FREM:
				666	case ISD::SDIV:
				667	case ISD::UDIV:
				668	case ISD::SREM:
				669	case ISD::UREM:
				670	return true;
				671	}
				672	}
				673
				674
Owen Anderson	23b9b19	2009-08-12 00:36:31 +0000	[diff] [blame]	675	static unsigned getVectorTypeBreakdownMVT(MVT VT, MVT &IntermediateVT,
Chris Lattner	598751e	2010-07-05 05:36:21 +0000	[diff] [blame]	676	unsigned &NumIntermediates,
				677	EVT &RegisterVT,
				678	TargetLowering *TLI) {
Owen Anderson	23b9b19	2009-08-12 00:36:31 +0000	[diff] [blame]	679	// Figure out the right, legal destination reg to copy into.
				680	unsigned NumElts = VT.getVectorNumElements();
				681	MVT EltTy = VT.getVectorElementType();
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	682
Owen Anderson	23b9b19	2009-08-12 00:36:31 +0000	[diff] [blame]	683	unsigned NumVectorRegs = 1;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	684
				685	// FIXME: We don't support non-power-of-2-sized vectors for now. Ideally we
Owen Anderson	23b9b19	2009-08-12 00:36:31 +0000	[diff] [blame]	686	// could break down into LHS/RHS like LegalizeDAG does.
				687	if (!isPowerOf2_32(NumElts)) {
				688	NumVectorRegs = NumElts;
				689	NumElts = 1;
				690	}
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	691
Owen Anderson	23b9b19	2009-08-12 00:36:31 +0000	[diff] [blame]	692	// Divide the input until we get to a supported size. This will always
				693	// end with a scalar if the target doesn't support vectors.
				694	while (NumElts > 1 && !TLI->isTypeLegal(MVT::getVectorVT(EltTy, NumElts))) {
				695	NumElts >>= 1;
				696	NumVectorRegs <<= 1;
				697	}
				698
				699	NumIntermediates = NumVectorRegs;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	700
Owen Anderson	23b9b19	2009-08-12 00:36:31 +0000	[diff] [blame]	701	MVT NewVT = MVT::getVectorVT(EltTy, NumElts);
				702	if (!TLI->isTypeLegal(NewVT))
				703	NewVT = EltTy;
				704	IntermediateVT = NewVT;
				705
Nadav Rotem	0c3e678	2011-06-12 14:56:55 +0000	[diff] [blame]	706	unsigned NewVTSize = NewVT.getSizeInBits();
				707
				708	// Convert sizes such as i33 to i64.
				709	if (!isPowerOf2_32(NewVTSize))
				710	NewVTSize = NextPowerOf2(NewVTSize);
				711
Owen Anderson	23b9b19	2009-08-12 00:36:31 +0000	[diff] [blame]	712	EVT DestVT = TLI->getRegisterType(NewVT);
				713	RegisterVT = DestVT;
Chris Lattner	32b4b5a	2010-07-05 05:53:14 +0000	[diff] [blame]	714	if (EVT(DestVT).bitsLT(NewVT)) // Value is expanded, e.g. i64 -> i16.
Nadav Rotem	0c3e678	2011-06-12 14:56:55 +0000	[diff] [blame]	715	return NumVectorRegs*(NewVTSize/DestVT.getSizeInBits());
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	716
Chris Lattner	32b4b5a	2010-07-05 05:53:14 +0000	[diff] [blame]	717	// Otherwise, promotion or legal types use the same number of registers as
				718	// the vector decimated to the appropriate level.
				719	return NumVectorRegs;
Owen Anderson	23b9b19	2009-08-12 00:36:31 +0000	[diff] [blame]	720	}
				721
Evan Cheng	46dcb57	2010-07-19 18:47:01 +0000	[diff] [blame]	722	/// isLegalRC - Return true if the value types that can be represented by the
				723	/// specified register class are all legal.
				724	bool TargetLowering::isLegalRC(const TargetRegisterClass *RC) const {
				725	for (TargetRegisterClass::vt_iterator I = RC->vt_begin(), E = RC->vt_end();
				726	I != E; ++I) {
				727	if (isTypeLegal(*I))
				728	return true;
				729	}
				730	return false;
				731	}
				732
				733	/// hasLegalSuperRegRegClasses - Return true if the specified register class
				734	/// has one or more super-reg register classes that are legal.
Evan Cheng	d70f57b	2010-07-19 22:15:08 +0000	[diff] [blame]	735	bool
				736	TargetLowering::hasLegalSuperRegRegClasses(const TargetRegisterClass *RC) const{
Evan Cheng	46dcb57	2010-07-19 18:47:01 +0000	[diff] [blame]	737	if (*RC->superregclasses_begin() == 0)
				738	return false;
				739	for (TargetRegisterInfo::regclass_iterator I = RC->superregclasses_begin(),
				740	E = RC->superregclasses_end(); I != E; ++I) {
				741	const TargetRegisterClass RRC = I;
				742	if (isLegalRC(RRC))
				743	return true;
				744	}
				745	return false;
				746	}
				747
				748	/// findRepresentativeClass - Return the largest legal super-reg register class
Evan Cheng	4f6b467	2010-07-21 06:09:07 +0000	[diff] [blame]	749	/// of the register class for the specified type and its associated "cost".
				750	std::pair<const TargetRegisterClass*, uint8_t>
				751	TargetLowering::findRepresentativeClass(EVT VT) const {
				752	const TargetRegisterClass *RC = RegClassForVT[VT.getSimpleVT().SimpleTy];
				753	if (!RC)
				754	return std::make_pair(RC, 0);
Evan Cheng	46dcb57	2010-07-19 18:47:01 +0000	[diff] [blame]	755	const TargetRegisterClass *BestRC = RC;
				756	for (TargetRegisterInfo::regclass_iterator I = RC->superregclasses_begin(),
				757	E = RC->superregclasses_end(); I != E; ++I) {
				758	const TargetRegisterClass RRC = I;
				759	if (RRC->isASubClass() \|\| !isLegalRC(RRC))
				760	continue;
				761	if (!hasLegalSuperRegRegClasses(RRC))
Evan Cheng	4f6b467	2010-07-21 06:09:07 +0000	[diff] [blame]	762	return std::make_pair(RRC, 1);
Evan Cheng	46dcb57	2010-07-19 18:47:01 +0000	[diff] [blame]	763	BestRC = RRC;
				764	}
Evan Cheng	4f6b467	2010-07-21 06:09:07 +0000	[diff] [blame]	765	return std::make_pair(BestRC, 1);
Evan Cheng	46dcb57	2010-07-19 18:47:01 +0000	[diff] [blame]	766	}
				767
Chris Lattner	e6f7c26	2010-08-25 22:49:25 +0000	[diff] [blame]	768
Chris Lattner	310968c	2005-01-07 07:44:53 +0000	[diff] [blame]	769	/// computeRegisterProperties - Once all of the register classes are added,
				770	/// this allows us to compute derived properties we expose.
				771	void TargetLowering::computeRegisterProperties() {
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	772	assert(MVT::LAST_VALUETYPE <= MVT::MAX_ALLOWED_VALUETYPE &&
Chris Lattner	bb97d81	2005-01-16 01:10:58 +0000	[diff] [blame]	773	"Too many value types for ValueTypeActions to hold!");
				774
Dan Gohman	b6f5b00	2007-06-28 23:29:44 +0000	[diff] [blame]	775	// Everything defaults to needing one register.
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	776	for (unsigned i = 0; i != MVT::LAST_VALUETYPE; ++i) {
Dan Gohman	b9f1019	2007-06-21 14:42:22 +0000	[diff] [blame]	777	NumRegistersForVT[i] = 1;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	778	RegisterTypeForVT[i] = TransformToType[i] = (MVT::SimpleValueType)i;
Dan Gohman	b6f5b00	2007-06-28 23:29:44 +0000	[diff] [blame]	779	}
				780	// ...except isVoid, which doesn't need any registers.
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	781	NumRegistersForVT[MVT::isVoid] = 0;
Misha Brukman	f976c85	2005-04-21 22:55:34 +0000	[diff] [blame]	782
Chris Lattner	310968c	2005-01-07 07:44:53 +0000	[diff] [blame]	783	// Find the largest integer register class.
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	784	unsigned LargestIntReg = MVT::LAST_INTEGER_VALUETYPE;
Chris Lattner	310968c	2005-01-07 07:44:53 +0000	[diff] [blame]	785	for (; RegClassForVT[LargestIntReg] == 0; --LargestIntReg)
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	786	assert(LargestIntReg != MVT::i1 && "No integer registers defined!");
Chris Lattner	310968c	2005-01-07 07:44:53 +0000	[diff] [blame]	787
				788	// Every integer value type larger than this largest register takes twice as
				789	// many registers to represent as the previous ValueType.
Duncan Sands	83ec4b6	2008-06-06 12:08:01 +0000	[diff] [blame]	790	for (unsigned ExpandedReg = LargestIntReg + 1; ; ++ExpandedReg) {
Dan Gohman	8a55ce4	2009-09-23 21:02:20 +0000	[diff] [blame]	791	EVT ExpandedVT = (MVT::SimpleValueType)ExpandedReg;
				792	if (!ExpandedVT.isInteger())
Duncan Sands	83ec4b6	2008-06-06 12:08:01 +0000	[diff] [blame]	793	break;
Dan Gohman	b9f1019	2007-06-21 14:42:22 +0000	[diff] [blame]	794	NumRegistersForVT[ExpandedReg] = 2*NumRegistersForVT[ExpandedReg-1];
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	795	RegisterTypeForVT[ExpandedReg] = (MVT::SimpleValueType)LargestIntReg;
				796	TransformToType[ExpandedReg] = (MVT::SimpleValueType)(ExpandedReg - 1);
Nadav Rotem	b6aacae	2011-05-28 17:57:14 +0000	[diff] [blame]	797	ValueTypeActions.setTypeAction(ExpandedVT, TypeExpandInteger);
Evan Cheng	1a8f1fe	2006-12-09 02:42:38 +0000	[diff] [blame]	798	}
Dan Gohman	b6f5b00	2007-06-28 23:29:44 +0000	[diff] [blame]	799
				800	// Inspect all of the ValueType's smaller than the largest integer
				801	// register to see which ones need promotion.
Duncan Sands	83ec4b6	2008-06-06 12:08:01 +0000	[diff] [blame]	802	unsigned LegalIntReg = LargestIntReg;
				803	for (unsigned IntReg = LargestIntReg - 1;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	804	IntReg >= (unsigned)MVT::i1; --IntReg) {
				805	EVT IVT = (MVT::SimpleValueType)IntReg;
Duncan Sands	83ec4b6	2008-06-06 12:08:01 +0000	[diff] [blame]	806	if (isTypeLegal(IVT)) {
Dan Gohman	b6f5b00	2007-06-28 23:29:44 +0000	[diff] [blame]	807	LegalIntReg = IntReg;
				808	} else {
Duncan Sands	83ec4b6	2008-06-06 12:08:01 +0000	[diff] [blame]	809	RegisterTypeForVT[IntReg] = TransformToType[IntReg] =
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	810	(MVT::SimpleValueType)LegalIntReg;
Nadav Rotem	b6aacae	2011-05-28 17:57:14 +0000	[diff] [blame]	811	ValueTypeActions.setTypeAction(IVT, TypePromoteInteger);
Dan Gohman	b6f5b00	2007-06-28 23:29:44 +0000	[diff] [blame]	812	}
				813	}
				814
Dale Johannesen	161e897	2007-10-05 20:04:43 +0000	[diff] [blame]	815	// ppcf128 type is really two f64's.
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	816	if (!isTypeLegal(MVT::ppcf128)) {
				817	NumRegistersForVT[MVT::ppcf128] = 2*NumRegistersForVT[MVT::f64];
				818	RegisterTypeForVT[MVT::ppcf128] = MVT::f64;
				819	TransformToType[MVT::ppcf128] = MVT::f64;
Nadav Rotem	b6aacae	2011-05-28 17:57:14 +0000	[diff] [blame]	820	ValueTypeActions.setTypeAction(MVT::ppcf128, TypeExpandFloat);
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	821	}
Dale Johannesen	161e897	2007-10-05 20:04:43 +0000	[diff] [blame]	822
Dan Gohman	b6f5b00	2007-06-28 23:29:44 +0000	[diff] [blame]	823	// Decide how to handle f64. If the target does not have native f64 support,
				824	// expand it to i64 and we will be generating soft float library calls.
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	825	if (!isTypeLegal(MVT::f64)) {
				826	NumRegistersForVT[MVT::f64] = NumRegistersForVT[MVT::i64];
				827	RegisterTypeForVT[MVT::f64] = RegisterTypeForVT[MVT::i64];
				828	TransformToType[MVT::f64] = MVT::i64;
Nadav Rotem	b6aacae	2011-05-28 17:57:14 +0000	[diff] [blame]	829	ValueTypeActions.setTypeAction(MVT::f64, TypeSoftenFloat);
Dan Gohman	b6f5b00	2007-06-28 23:29:44 +0000	[diff] [blame]	830	}
				831
				832	// Decide how to handle f32. If the target does not have native support for
				833	// f32, promote it to f64 if it is legal. Otherwise, expand it to i32.
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	834	if (!isTypeLegal(MVT::f32)) {
				835	if (isTypeLegal(MVT::f64)) {
				836	NumRegistersForVT[MVT::f32] = NumRegistersForVT[MVT::f64];
				837	RegisterTypeForVT[MVT::f32] = RegisterTypeForVT[MVT::f64];
				838	TransformToType[MVT::f32] = MVT::f64;
Nadav Rotem	b6aacae	2011-05-28 17:57:14 +0000	[diff] [blame]	839	ValueTypeActions.setTypeAction(MVT::f32, TypePromoteInteger);
Dan Gohman	b6f5b00	2007-06-28 23:29:44 +0000	[diff] [blame]	840	} else {
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	841	NumRegistersForVT[MVT::f32] = NumRegistersForVT[MVT::i32];
				842	RegisterTypeForVT[MVT::f32] = RegisterTypeForVT[MVT::i32];
				843	TransformToType[MVT::f32] = MVT::i32;
Nadav Rotem	b6aacae	2011-05-28 17:57:14 +0000	[diff] [blame]	844	ValueTypeActions.setTypeAction(MVT::f32, TypeSoftenFloat);
Dan Gohman	b6f5b00	2007-06-28 23:29:44 +0000	[diff] [blame]	845	}
Evan Cheng	1a8f1fe	2006-12-09 02:42:38 +0000	[diff] [blame]	846	}
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	847
Dan Gohman	b6f5b00	2007-06-28 23:29:44 +0000	[diff] [blame]	848	// Loop over all of the vector value types to see which need transformations.
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	849	for (unsigned i = MVT::FIRST_VECTOR_VALUETYPE;
				850	i <= (unsigned)MVT::LAST_VECTOR_VALUETYPE; ++i) {
Owen Anderson	23b9b19	2009-08-12 00:36:31 +0000	[diff] [blame]	851	MVT VT = (MVT::SimpleValueType)i;
Chris Lattner	598751e	2010-07-05 05:36:21 +0000	[diff] [blame]	852	if (isTypeLegal(VT)) continue;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	853
Chris Lattner	e6f7c26	2010-08-25 22:49:25 +0000	[diff] [blame]	854	// Determine if there is a legal wider type. If so, we should promote to
				855	// that wider vector type.
				856	EVT EltVT = VT.getVectorElementType();
				857	unsigned NElts = VT.getVectorNumElements();
				858	if (NElts != 1) {
				859	bool IsLegalWiderType = false;
Nadav Rotem	f1c025d	2011-06-04 20:32:01 +0000	[diff] [blame]	860	// If we allow the promotion of vector elements using a flag,
				861	// then return TypePromoteInteger on vector elements.
				862	// First try to promote the elements of integer vectors. If no legal
				863	// promotion was found, fallback to the widen-vector method.
				864	if (mayPromoteElements)
Chris Lattner	e6f7c26	2010-08-25 22:49:25 +0000	[diff] [blame]	865	for (unsigned nVT = i+1; nVT <= MVT::LAST_VECTOR_VALUETYPE; ++nVT) {
				866	EVT SVT = (MVT::SimpleValueType)nVT;
Nadav Rotem	f1c025d	2011-06-04 20:32:01 +0000	[diff] [blame]	867	// Promote vectors of integers to vectors with the same number
				868	// of elements, with a wider element type.
				869	if (SVT.getVectorElementType().getSizeInBits() > EltVT.getSizeInBits()
				870	&& SVT.getVectorNumElements() == NElts &&
				871	isTypeLegal(SVT) && SVT.getScalarType().isInteger()) {
				872	TransformToType[i] = SVT;
				873	RegisterTypeForVT[i] = SVT;
				874	NumRegistersForVT[i] = 1;
				875	ValueTypeActions.setTypeAction(VT, TypePromoteInteger);
				876	IsLegalWiderType = true;
				877	break;
Nadav Rotem	b6fbec3	2011-06-01 12:51:46 +0000	[diff] [blame]	878	}
Nadav Rotem	f1c025d	2011-06-04 20:32:01 +0000	[diff] [blame]	879	}
Nadav Rotem	b6fbec3	2011-06-01 12:51:46 +0000	[diff] [blame]	880
Nadav Rotem	f1c025d	2011-06-04 20:32:01 +0000	[diff] [blame]	881	if (IsLegalWiderType) continue;
				882
				883	// Try to widen the vector.
				884	for (unsigned nVT = i+1; nVT <= MVT::LAST_VECTOR_VALUETYPE; ++nVT) {
				885	EVT SVT = (MVT::SimpleValueType)nVT;
Chris Lattner	e6f7c26	2010-08-25 22:49:25 +0000	[diff] [blame]	886	if (SVT.getVectorElementType() == EltVT &&
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	887	SVT.getVectorNumElements() > NElts &&
Dale Johannesen	e93d99c	2010-10-20 21:32:10 +0000	[diff] [blame]	888	isTypeLegal(SVT)) {
Chris Lattner	e6f7c26	2010-08-25 22:49:25 +0000	[diff] [blame]	889	TransformToType[i] = SVT;
				890	RegisterTypeForVT[i] = SVT;
				891	NumRegistersForVT[i] = 1;
Nadav Rotem	b6aacae	2011-05-28 17:57:14 +0000	[diff] [blame]	892	ValueTypeActions.setTypeAction(VT, TypeWidenVector);
Chris Lattner	e6f7c26	2010-08-25 22:49:25 +0000	[diff] [blame]	893	IsLegalWiderType = true;
				894	break;
				895	}
				896	}
				897	if (IsLegalWiderType) continue;
				898	}
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	899
Chris Lattner	598751e	2010-07-05 05:36:21 +0000	[diff] [blame]	900	MVT IntermediateVT;
				901	EVT RegisterVT;
				902	unsigned NumIntermediates;
				903	NumRegistersForVT[i] =
				904	getVectorTypeBreakdownMVT(VT, IntermediateVT, NumIntermediates,
				905	RegisterVT, this);
				906	RegisterTypeForVT[i] = RegisterVT;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	907
Chris Lattner	e6f7c26	2010-08-25 22:49:25 +0000	[diff] [blame]	908	EVT NVT = VT.getPow2VectorType();
				909	if (NVT == VT) {
				910	// Type is already a power of 2. The default action is to split.
				911	TransformToType[i] = MVT::Other;
Nadav Rotem	b6aacae	2011-05-28 17:57:14 +0000	[diff] [blame]	912	unsigned NumElts = VT.getVectorNumElements();
				913	ValueTypeActions.setTypeAction(VT,
				914	NumElts > 1 ? TypeSplitVector : TypeScalarizeVector);
Chris Lattner	e6f7c26	2010-08-25 22:49:25 +0000	[diff] [blame]	915	} else {
				916	TransformToType[i] = NVT;
Nadav Rotem	b6aacae	2011-05-28 17:57:14 +0000	[diff] [blame]	917	ValueTypeActions.setTypeAction(VT, TypeWidenVector);
Dan Gohman	7f32156	2007-06-25 16:23:39 +0000	[diff] [blame]	918	}
Chris Lattner	3a593584	2006-03-16 19:50:01 +0000	[diff] [blame]	919	}
Evan Cheng	46dcb57	2010-07-19 18:47:01 +0000	[diff] [blame]	920
				921	// Determine the 'representative' register class for each value type.
				922	// An representative register class is the largest (meaning one which is
				923	// not a sub-register class / subreg register class) legal register class for
				924	// a group of value types. For example, on i386, i8, i16, and i32
				925	// representative would be GR32; while on x86_64 it's GR64.
Evan Cheng	d70f57b	2010-07-19 22:15:08 +0000	[diff] [blame]	926	for (unsigned i = 0; i != MVT::LAST_VALUETYPE; ++i) {
Evan Cheng	4f6b467	2010-07-21 06:09:07 +0000	[diff] [blame]	927	const TargetRegisterClass* RRC;
				928	uint8_t Cost;
				929	tie(RRC, Cost) = findRepresentativeClass((MVT::SimpleValueType)i);
				930	RepRegClassForVT[i] = RRC;
				931	RepRegClassCostForVT[i] = Cost;
Evan Cheng	d70f57b	2010-07-19 22:15:08 +0000	[diff] [blame]	932	}
Chris Lattner	bb97d81	2005-01-16 01:10:58 +0000	[diff] [blame]	933	}
Chris Lattner	cba82f9	2005-01-16 07:28:11 +0000	[diff] [blame]	934
Evan Cheng	7226158	2005-12-20 06:22:03 +0000	[diff] [blame]	935	const char *TargetLowering::getTargetNodeName(unsigned Opcode) const {
				936	return NULL;
				937	}
Evan Cheng	3a03ebb	2005-12-21 23:05:39 +0000	[diff] [blame]	938
Scott Michel	5b8f82e	2008-03-10 15:42:14 +0000	[diff] [blame]	939
Duncan Sands	28b77e9	2011-09-06 19:07:46 +0000	[diff] [blame]	940	EVT TargetLowering::getSetCCResultType(EVT VT) const {
				941	assert(!VT.isVector() && "No default SetCC type for vectors!");
Owen Anderson	1d0be15	2009-08-13 21:58:54 +0000	[diff] [blame]	942	return PointerTy.SimpleTy;
Scott Michel	5b8f82e	2008-03-10 15:42:14 +0000	[diff] [blame]	943	}
				944
Sanjiv Gupta	8f17a36	2009-12-28 02:40:33 +0000	[diff] [blame]	945	MVT::SimpleValueType TargetLowering::getCmpLibcallReturnType() const {
				946	return MVT::i32; // return the default value
				947	}
				948
Dan Gohman	7f32156	2007-06-25 16:23:39 +0000	[diff] [blame]	949	/// getVectorTypeBreakdown - Vector types are broken down into some number of
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	950	/// legal first class types. For example, MVT::v8f32 maps to 2 MVT::v4f32
				951	/// with Altivec or SSE1, or 8 promoted MVT::f64 values with the X86 FP stack.
				952	/// Similarly, MVT::v2i64 turns into 4 MVT::i32 values with both PPC and X86.
Chris Lattner	dc87929	2006-03-31 00:28:56 +0000	[diff] [blame]	953	///
Dan Gohman	7f32156	2007-06-25 16:23:39 +0000	[diff] [blame]	954	/// This method returns the number of registers needed, and the VT for each
Dan Gohman	b6f5b00	2007-06-28 23:29:44 +0000	[diff] [blame]	955	/// register. It also returns the VT and quantity of the intermediate values
				956	/// before they are promoted/expanded.
Chris Lattner	dc87929	2006-03-31 00:28:56 +0000	[diff] [blame]	957	///
Owen Anderson	23b9b19	2009-08-12 00:36:31 +0000	[diff] [blame]	958	unsigned TargetLowering::getVectorTypeBreakdown(LLVMContext &Context, EVT VT,
Owen Anderson	e50ed30	2009-08-10 22:56:29 +0000	[diff] [blame]	959	EVT &IntermediateVT,
Dan Gohman	b6f5b00	2007-06-28 23:29:44 +0000	[diff] [blame]	960	unsigned &NumIntermediates,
Owen Anderson	23b9b19	2009-08-12 00:36:31 +0000	[diff] [blame]	961	EVT &RegisterVT) const {
Duncan Sands	83ec4b6	2008-06-06 12:08:01 +0000	[diff] [blame]	962	unsigned NumElts = VT.getVectorNumElements();
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	963
Chris Lattner	e6f7c26	2010-08-25 22:49:25 +0000	[diff] [blame]	964	// If there is a wider vector type with the same element type as this one,
				965	// we should widen to that legal vector type. This handles things like
				966	// <2 x float> -> <4 x float>.
Nadav Rotem	b6aacae	2011-05-28 17:57:14 +0000	[diff] [blame]	967	if (NumElts != 1 && getTypeAction(Context, VT) == TypeWidenVector) {
Chris Lattner	e6f7c26	2010-08-25 22:49:25 +0000	[diff] [blame]	968	RegisterVT = getTypeToTransformTo(Context, VT);
				969	if (isTypeLegal(RegisterVT)) {
				970	IntermediateVT = RegisterVT;
				971	NumIntermediates = 1;
				972	return 1;
				973	}
				974	}
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	975
Chris Lattner	e6f7c26	2010-08-25 22:49:25 +0000	[diff] [blame]	976	// Figure out the right, legal destination reg to copy into.
Owen Anderson	e50ed30	2009-08-10 22:56:29 +0000	[diff] [blame]	977	EVT EltTy = VT.getVectorElementType();
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	978
Chris Lattner	dc87929	2006-03-31 00:28:56 +0000	[diff] [blame]	979	unsigned NumVectorRegs = 1;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	980
				981	// FIXME: We don't support non-power-of-2-sized vectors for now. Ideally we
Nate Begeman	d73ab88	2007-11-27 19:28:48 +0000	[diff] [blame]	982	// could break down into LHS/RHS like LegalizeDAG does.
				983	if (!isPowerOf2_32(NumElts)) {
				984	NumVectorRegs = NumElts;
				985	NumElts = 1;
				986	}
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	987
Chris Lattner	dc87929	2006-03-31 00:28:56 +0000	[diff] [blame]	988	// Divide the input until we get to a supported size. This will always
				989	// end with a scalar if the target doesn't support vectors.
Owen Anderson	23b9b19	2009-08-12 00:36:31 +0000	[diff] [blame]	990	while (NumElts > 1 && !isTypeLegal(
				991	EVT::getVectorVT(Context, EltTy, NumElts))) {
Chris Lattner	dc87929	2006-03-31 00:28:56 +0000	[diff] [blame]	992	NumElts >>= 1;
				993	NumVectorRegs <<= 1;
				994	}
Dan Gohman	b6f5b00	2007-06-28 23:29:44 +0000	[diff] [blame]	995
				996	NumIntermediates = NumVectorRegs;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	997
Owen Anderson	23b9b19	2009-08-12 00:36:31 +0000	[diff] [blame]	998	EVT NewVT = EVT::getVectorVT(Context, EltTy, NumElts);
Dan Gohman	7f32156	2007-06-25 16:23:39 +0000	[diff] [blame]	999	if (!isTypeLegal(NewVT))
				1000	NewVT = EltTy;
Dan Gohman	b6f5b00	2007-06-28 23:29:44 +0000	[diff] [blame]	1001	IntermediateVT = NewVT;
Chris Lattner	dc87929	2006-03-31 00:28:56 +0000	[diff] [blame]	1002
Owen Anderson	23b9b19	2009-08-12 00:36:31 +0000	[diff] [blame]	1003	EVT DestVT = getRegisterType(Context, NewVT);
Dan Gohman	b6f5b00	2007-06-28 23:29:44 +0000	[diff] [blame]	1004	RegisterVT = DestVT;
Nadav Rotem	0c3e678	2011-06-12 14:56:55 +0000	[diff] [blame]	1005	unsigned NewVTSize = NewVT.getSizeInBits();
				1006
				1007	// Convert sizes such as i33 to i64.
				1008	if (!isPowerOf2_32(NewVTSize))
				1009	NewVTSize = NextPowerOf2(NewVTSize);
				1010
Chris Lattner	e6f7c26	2010-08-25 22:49:25 +0000	[diff] [blame]	1011	if (DestVT.bitsLT(NewVT)) // Value is expanded, e.g. i64 -> i16.
Nadav Rotem	0c3e678	2011-06-12 14:56:55 +0000	[diff] [blame]	1012	return NumVectorRegs*(NewVTSize/DestVT.getSizeInBits());
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1013
Chris Lattner	e6f7c26	2010-08-25 22:49:25 +0000	[diff] [blame]	1014	// Otherwise, promotion or legal types use the same number of registers as
				1015	// the vector decimated to the appropriate level.
				1016	return NumVectorRegs;
Chris Lattner	dc87929	2006-03-31 00:28:56 +0000	[diff] [blame]	1017	}
				1018
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1019	/// Get the EVTs and ArgFlags collections that represent the legalized return
Dan Gohman	84023e0	2010-07-10 09:00:22 +0000	[diff] [blame]	1020	/// type of the given function. This does not require a DAG or a return value,
				1021	/// and is suitable for use before any DAGs for the function are constructed.
				1022	/// TODO: Move this out of TargetLowering.cpp.
Chris Lattner	db125cf	2011-07-18 04:54:35 +0000	[diff] [blame]	1023	void llvm::GetReturnInfo(Type* ReturnType, Attributes attr,
Dan Gohman	84023e0	2010-07-10 09:00:22 +0000	[diff] [blame]	1024	SmallVectorImpl<ISD::OutputArg> &Outs,
				1025	const TargetLowering &TLI,
				1026	SmallVectorImpl<uint64_t> *Offsets) {
				1027	SmallVector<EVT, 4> ValueVTs;
				1028	ComputeValueVTs(TLI, ReturnType, ValueVTs);
				1029	unsigned NumValues = ValueVTs.size();
				1030	if (NumValues == 0) return;
				1031	unsigned Offset = 0;
				1032
				1033	for (unsigned j = 0, f = NumValues; j != f; ++j) {
				1034	EVT VT = ValueVTs[j];
				1035	ISD::NodeType ExtendKind = ISD::ANY_EXTEND;
				1036
				1037	if (attr & Attribute::SExt)
				1038	ExtendKind = ISD::SIGN_EXTEND;
				1039	else if (attr & Attribute::ZExt)
				1040	ExtendKind = ISD::ZERO_EXTEND;
				1041
				1042	// FIXME: C calling convention requires the return type to be promoted to
				1043	// at least 32-bit. But this is not necessary for non-C calling
				1044	// conventions. The frontend should mark functions whose return values
				1045	// require promoting with signext or zeroext attributes.
				1046	if (ExtendKind != ISD::ANY_EXTEND && VT.isInteger()) {
				1047	EVT MinVT = TLI.getRegisterType(ReturnType->getContext(), MVT::i32);
				1048	if (VT.bitsLT(MinVT))
				1049	VT = MinVT;
				1050	}
				1051
				1052	unsigned NumParts = TLI.getNumRegisters(ReturnType->getContext(), VT);
				1053	EVT PartVT = TLI.getRegisterType(ReturnType->getContext(), VT);
				1054	unsigned PartSize = TLI.getTargetData()->getTypeAllocSize(
				1055	PartVT.getTypeForEVT(ReturnType->getContext()));
				1056
				1057	// 'inreg' on function refers to return value
				1058	ISD::ArgFlagsTy Flags = ISD::ArgFlagsTy();
				1059	if (attr & Attribute::InReg)
				1060	Flags.setInReg();
				1061
				1062	// Propagate extension type if any
				1063	if (attr & Attribute::SExt)
				1064	Flags.setSExt();
				1065	else if (attr & Attribute::ZExt)
				1066	Flags.setZExt();
				1067
				1068	for (unsigned i = 0; i < NumParts; ++i) {
				1069	Outs.push_back(ISD::OutputArg(Flags, PartVT, /isFixed=/true));
				1070	if (Offsets) {
				1071	Offsets->push_back(Offset);
				1072	Offset += PartSize;
				1073	}
				1074	}
				1075	}
				1076	}
				1077
Evan Cheng	3ae0543	2008-01-24 00:22:01 +0000	[diff] [blame]	1078	/// getByValTypeAlignment - Return the desired alignment for ByVal aggregate
Dale Johannesen	28d08fd	2008-02-28 22:31:51 +0000	[diff] [blame]	1079	/// function arguments in the caller parameter area. This is the actual
				1080	/// alignment, not its logarithm.
Chris Lattner	db125cf	2011-07-18 04:54:35 +0000	[diff] [blame]	1081	unsigned TargetLowering::getByValTypeAlignment(Type *Ty) const {
Dale Johannesen	28d08fd	2008-02-28 22:31:51 +0000	[diff] [blame]	1082	return TD->getCallFrameTypeAlignment(Ty);
Evan Cheng	3ae0543	2008-01-24 00:22:01 +0000	[diff] [blame]	1083	}
				1084
Chris Lattner	071c62f	2010-01-25 23:26:13 +0000	[diff] [blame]	1085	/// getJumpTableEncoding - Return the entry encoding for a jump table in the
				1086	/// current function. The returned value is a member of the
				1087	/// MachineJumpTableInfo::JTEntryKind enum.
				1088	unsigned TargetLowering::getJumpTableEncoding() const {
				1089	// In non-pic modes, just use the address of a block.
				1090	if (getTargetMachine().getRelocationModel() != Reloc::PIC_)
				1091	return MachineJumpTableInfo::EK_BlockAddress;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1092
Chris Lattner	071c62f	2010-01-25 23:26:13 +0000	[diff] [blame]	1093	// In PIC mode, if the target supports a GPRel32 directive, use it.
				1094	if (getTargetMachine().getMCAsmInfo()->getGPRel32Directive() != 0)
				1095	return MachineJumpTableInfo::EK_GPRel32BlockAddress;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1096
Chris Lattner	071c62f	2010-01-25 23:26:13 +0000	[diff] [blame]	1097	// Otherwise, use a label difference.
				1098	return MachineJumpTableInfo::EK_LabelDifference32;
				1099	}
				1100
Dan Gohman	475871a	2008-07-27 21:46:04 +0000	[diff] [blame]	1101	SDValue TargetLowering::getPICJumpTableRelocBase(SDValue Table,
				1102	SelectionDAG &DAG) const {
Chris Lattner	f1214cb	2010-01-26 06:53:37 +0000	[diff] [blame]	1103	// If our PIC model is GP relative, use the global offset table as the base.
				1104	if (getJumpTableEncoding() == MachineJumpTableInfo::EK_GPRel32BlockAddress)
Dale Johannesen	b300d2a	2009-02-07 00:55:49 +0000	[diff] [blame]	1105	return DAG.getGLOBAL_OFFSET_TABLE(getPointerTy());
Evan Cheng	cc41586	2007-11-09 01:32:10 +0000	[diff] [blame]	1106	return Table;
				1107	}
				1108
Chris Lattner	13e97a2	2010-01-26 05:30:30 +0000	[diff] [blame]	1109	/// getPICJumpTableRelocBaseExpr - This returns the relocation base for the
				1110	/// given PIC jumptable, the same as getPICJumpTableRelocBase, but as an
				1111	/// MCExpr.
				1112	const MCExpr *
Chris Lattner	589c6f6	2010-01-26 06:28:43 +0000	[diff] [blame]	1113	TargetLowering::getPICJumpTableRelocBaseExpr(const MachineFunction *MF,
				1114	unsigned JTI,MCContext &Ctx) const{
Chris Lattner	beeb93e	2010-01-26 05:58:28 +0000	[diff] [blame]	1115	// The normal PIC reloc base is the label at the start of the jump table.
Chris Lattner	589c6f6	2010-01-26 06:28:43 +0000	[diff] [blame]	1116	return MCSymbolRefExpr::Create(MF->getJTISymbol(JTI, Ctx), Ctx);
Chris Lattner	13e97a2	2010-01-26 05:30:30 +0000	[diff] [blame]	1117	}
				1118
Dan Gohman	6520e20	2008-10-18 02:06:02 +0000	[diff] [blame]	1119	bool
				1120	TargetLowering::isOffsetFoldingLegal(const GlobalAddressSDNode *GA) const {
				1121	// Assume that everything is safe in static mode.
				1122	if (getTargetMachine().getRelocationModel() == Reloc::Static)
				1123	return true;
				1124
				1125	// In dynamic-no-pic mode, assume that known defined values are safe.
				1126	if (getTargetMachine().getRelocationModel() == Reloc::DynamicNoPIC &&
				1127	GA &&
				1128	!GA->getGlobal()->isDeclaration() &&
Duncan Sands	667d4b8	2009-03-07 15:45:40 +0000	[diff] [blame]	1129	!GA->getGlobal()->isWeakForLinker())
Dan Gohman	6520e20	2008-10-18 02:06:02 +0000	[diff] [blame]	1130	return true;
				1131
				1132	// Otherwise assume nothing is safe.
				1133	return false;
				1134	}
				1135
Chris Lattner	eb8146b	2006-02-04 02:13:02 +0000	[diff] [blame]	1136	//===----------------------------------------------------------------------===//
				1137	// Optimization Methods
				1138	//===----------------------------------------------------------------------===//
				1139
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1140	/// ShrinkDemandedConstant - Check to see if the specified operand of the
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1141	/// specified instruction is a constant integer. If so, check to see if there
				1142	/// are any bits set in the constant that are not demanded. If so, shrink the
				1143	/// constant and return true.
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1144	bool TargetLowering::TargetLoweringOpt::ShrinkDemandedConstant(SDValue Op,
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1145	const APInt &Demanded) {
Dale Johannesen	de06470	2009-02-06 21:50:26 +0000	[diff] [blame]	1146	DebugLoc dl = Op.getDebugLoc();
Bill Wendling	36ae6c1	2009-03-04 00:18:06 +0000	[diff] [blame]	1147
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1148	// FIXME: ISD::SELECT, ISD::SELECT_CC
Dan Gohman	e5af2d3	2009-01-29 01:59:02 +0000	[diff] [blame]	1149	switch (Op.getOpcode()) {
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1150	default: break;
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1151	case ISD::XOR:
Bill Wendling	36ae6c1	2009-03-04 00:18:06 +0000	[diff] [blame]	1152	case ISD::AND:
				1153	case ISD::OR: {
				1154	ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1));
				1155	if (!C) return false;
				1156
				1157	if (Op.getOpcode() == ISD::XOR &&
				1158	(C->getAPIntValue() \| (~Demanded)).isAllOnesValue())
				1159	return false;
				1160
				1161	// if we can expand it to have all bits set, do it
				1162	if (C->getAPIntValue().intersects(~Demanded)) {
Owen Anderson	e50ed30	2009-08-10 22:56:29 +0000	[diff] [blame]	1163	EVT VT = Op.getValueType();
Bill Wendling	36ae6c1	2009-03-04 00:18:06 +0000	[diff] [blame]	1164	SDValue New = DAG.getNode(Op.getOpcode(), dl, VT, Op.getOperand(0),
				1165	DAG.getConstant(Demanded &
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1166	C->getAPIntValue(),
Bill Wendling	36ae6c1	2009-03-04 00:18:06 +0000	[diff] [blame]	1167	VT));
				1168	return CombineTo(Op, New);
				1169	}
				1170
Nate Begeman	de99629	2006-02-03 22:24:05 +0000	[diff] [blame]	1171	break;
				1172	}
Bill Wendling	36ae6c1	2009-03-04 00:18:06 +0000	[diff] [blame]	1173	}
				1174
Nate Begeman	de99629	2006-02-03 22:24:05 +0000	[diff] [blame]	1175	return false;
				1176	}
Chris Lattner	c6fd6cd	2006-01-30 04:09:27 +0000	[diff] [blame]	1177
Dan Gohman	97121ba	2009-04-08 00:15:30 +0000	[diff] [blame]	1178	/// ShrinkDemandedOp - Convert x+y to (VT)((SmallVT)x+(SmallVT)y) if the
				1179	/// casts are free. This uses isZExtFree and ZERO_EXTEND for the widening
				1180	/// cast, but it could be generalized for targets with other types of
				1181	/// implicit widening casts.
				1182	bool
				1183	TargetLowering::TargetLoweringOpt::ShrinkDemandedOp(SDValue Op,
				1184	unsigned BitWidth,
				1185	const APInt &Demanded,
				1186	DebugLoc dl) {
				1187	assert(Op.getNumOperands() == 2 &&
				1188	"ShrinkDemandedOp only supports binary operators!");
				1189	assert(Op.getNode()->getNumValues() == 1 &&
				1190	"ShrinkDemandedOp only supports nodes with one result!");
				1191
				1192	// Don't do this if the node has another user, which may require the
				1193	// full value.
				1194	if (!Op.getNode()->hasOneUse())
				1195	return false;
				1196
				1197	// Search for the smallest integer type with free casts to and from
				1198	// Op's type. For expedience, just check power-of-2 integer types.
				1199	const TargetLowering &TLI = DAG.getTargetLoweringInfo();
				1200	unsigned SmallVTBits = BitWidth - Demanded.countLeadingZeros();
				1201	if (!isPowerOf2_32(SmallVTBits))
				1202	SmallVTBits = NextPowerOf2(SmallVTBits);
				1203	for (; SmallVTBits < BitWidth; SmallVTBits = NextPowerOf2(SmallVTBits)) {
Owen Anderson	23b9b19	2009-08-12 00:36:31 +0000	[diff] [blame]	1204	EVT SmallVT = EVT::getIntegerVT(*DAG.getContext(), SmallVTBits);
Dan Gohman	97121ba	2009-04-08 00:15:30 +0000	[diff] [blame]	1205	if (TLI.isTruncateFree(Op.getValueType(), SmallVT) &&
				1206	TLI.isZExtFree(SmallVT, Op.getValueType())) {
				1207	// We found a type with free casts.
				1208	SDValue X = DAG.getNode(Op.getOpcode(), dl, SmallVT,
				1209	DAG.getNode(ISD::TRUNCATE, dl, SmallVT,
				1210	Op.getNode()->getOperand(0)),
				1211	DAG.getNode(ISD::TRUNCATE, dl, SmallVT,
				1212	Op.getNode()->getOperand(1)));
				1213	SDValue Z = DAG.getNode(ISD::ZERO_EXTEND, dl, Op.getValueType(), X);
				1214	return CombineTo(Op, Z);
				1215	}
				1216	}
				1217	return false;
				1218	}
				1219
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1220	/// SimplifyDemandedBits - Look at Op. At this point, we know that only the
Chad Rosier	8c1ec5a	2011-06-11 02:27:46 +0000	[diff] [blame]	1221	/// DemandedMask bits of the result of Op are ever used downstream. If we can
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1222	/// use this information to simplify Op, create a new simplified DAG node and
				1223	/// return true, returning the original and new nodes in Old and New. Otherwise,
				1224	/// analyze the expression and return a mask of KnownOne and KnownZero bits for
				1225	/// the expression (used to simplify the caller). The KnownZero/One bits may
				1226	/// only be accurate for those bits in the DemandedMask.
Dan Gohman	475871a	2008-07-27 21:46:04 +0000	[diff] [blame]	1227	bool TargetLowering::SimplifyDemandedBits(SDValue Op,
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1228	const APInt &DemandedMask,
				1229	APInt &KnownZero,
				1230	APInt &KnownOne,
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1231	TargetLoweringOpt &TLO,
				1232	unsigned Depth) const {
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1233	unsigned BitWidth = DemandedMask.getBitWidth();
Dan Gohman	87862e7	2009-12-11 21:31:27 +0000	[diff] [blame]	1234	assert(Op.getValueType().getScalarType().getSizeInBits() == BitWidth &&
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1235	"Mask size mismatches value type size!");
				1236	APInt NewMask = DemandedMask;
Dale Johannesen	6f38cb6	2009-02-07 19:59:05 +0000	[diff] [blame]	1237	DebugLoc dl = Op.getDebugLoc();
Chris Lattner	3fc5b01	2007-05-17 18:19:23 +0000	[diff] [blame]	1238
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1239	// Don't know anything.
				1240	KnownZero = KnownOne = APInt(BitWidth, 0);
				1241
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1242	// Other users may use these bits.
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1243	if (!Op.getNode()->hasOneUse()) {
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1244	if (Depth != 0) {
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1245	// If not at the root, Just compute the KnownZero/KnownOne bits to
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1246	// simplify things downstream.
Dan Gohman	ea859be	2007-06-22 14:59:07 +0000	[diff] [blame]	1247	TLO.DAG.ComputeMaskedBits(Op, DemandedMask, KnownZero, KnownOne, Depth);
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1248	return false;
				1249	}
				1250	// If this is the root being simplified, allow it to have multiple uses,
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1251	// just set the NewMask to all bits.
				1252	NewMask = APInt::getAllOnesValue(BitWidth);
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1253	} else if (DemandedMask == 0) {
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1254	// Not demanding any bits from Op.
				1255	if (Op.getOpcode() != ISD::UNDEF)
Dale Johannesen	e8d7230	2009-02-06 23:05:02 +0000	[diff] [blame]	1256	return TLO.CombineTo(Op, TLO.DAG.getUNDEF(Op.getValueType()));
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1257	return false;
				1258	} else if (Depth == 6) { // Limit search depth.
				1259	return false;
				1260	}
				1261
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1262	APInt KnownZero2, KnownOne2, KnownZeroOut, KnownOneOut;
Chris Lattner	c6fd6cd	2006-01-30 04:09:27 +0000	[diff] [blame]	1263	switch (Op.getOpcode()) {
				1264	case ISD::Constant:
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1265	// We know all of the bits for a constant!
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1266	KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue() & NewMask;
				1267	KnownZero = ~KnownOne & NewMask;
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1268	return false; // Don't fall through, will infinitely loop.
Chris Lattner	c6fd6cd	2006-01-30 04:09:27 +0000	[diff] [blame]	1269	case ISD::AND:
Chris Lattner	81cd355	2006-02-27 00:36:27 +0000	[diff] [blame]	1270	// If the RHS is a constant, check to see if the LHS would be zero without
				1271	// using the bits from the RHS. Below, we use knowledge about the RHS to
				1272	// simplify the LHS, here we're using information from the LHS to simplify
				1273	// the RHS.
				1274	if (ConstantSDNode *RHSC = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1275	APInt LHSZero, LHSOne;
Dale Johannesen	97fd9a5	2011-01-10 21:53:07 +0000	[diff] [blame]	1276	// Do not increment Depth here; that can cause an infinite loop.
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1277	TLO.DAG.ComputeMaskedBits(Op.getOperand(0), NewMask,
Dale Johannesen	97fd9a5	2011-01-10 21:53:07 +0000	[diff] [blame]	1278	LHSZero, LHSOne, Depth);
Chris Lattner	81cd355	2006-02-27 00:36:27 +0000	[diff] [blame]	1279	// If the LHS already has zeros where RHSC does, this and is dead.
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1280	if ((LHSZero & NewMask) == (~RHSC->getAPIntValue() & NewMask))
Chris Lattner	81cd355	2006-02-27 00:36:27 +0000	[diff] [blame]	1281	return TLO.CombineTo(Op, Op.getOperand(0));
				1282	// If any of the set bits in the RHS are known zero on the LHS, shrink
				1283	// the constant.
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1284	if (TLO.ShrinkDemandedConstant(Op, ~LHSZero & NewMask))
Chris Lattner	81cd355	2006-02-27 00:36:27 +0000	[diff] [blame]	1285	return true;
				1286	}
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1287
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1288	if (SimplifyDemandedBits(Op.getOperand(1), NewMask, KnownZero,
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1289	KnownOne, TLO, Depth+1))
Chris Lattner	c6fd6cd	2006-01-30 04:09:27 +0000	[diff] [blame]	1290	return true;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1291	assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1292	if (SimplifyDemandedBits(Op.getOperand(0), ~KnownZero & NewMask,
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1293	KnownZero2, KnownOne2, TLO, Depth+1))
				1294	return true;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1295	assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
				1296
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1297	// If all of the demanded bits are known one on one side, return the other.
				1298	// These bits cannot contribute to the result of the 'and'.
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1299	if ((NewMask & ~KnownZero2 & KnownOne) == (~KnownZero2 & NewMask))
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1300	return TLO.CombineTo(Op, Op.getOperand(0));
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1301	if ((NewMask & ~KnownZero & KnownOne2) == (~KnownZero & NewMask))
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1302	return TLO.CombineTo(Op, Op.getOperand(1));
				1303	// If all of the demanded bits in the inputs are known zeros, return zero.
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1304	if ((NewMask & (KnownZero\|KnownZero2)) == NewMask)
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1305	return TLO.CombineTo(Op, TLO.DAG.getConstant(0, Op.getValueType()));
				1306	// If the RHS is a constant, see if we can simplify it.
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1307	if (TLO.ShrinkDemandedConstant(Op, ~KnownZero2 & NewMask))
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1308	return true;
Dan Gohman	97121ba	2009-04-08 00:15:30 +0000	[diff] [blame]	1309	// If the operation can be done in a smaller type, do so.
Dan Gohman	4e39e9d	2010-06-24 14:30:44 +0000	[diff] [blame]	1310	if (TLO.ShrinkDemandedOp(Op, BitWidth, NewMask, dl))
Dan Gohman	97121ba	2009-04-08 00:15:30 +0000	[diff] [blame]	1311	return true;
				1312
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1313	// Output known-1 bits are only known if set in both the LHS & RHS.
				1314	KnownOne &= KnownOne2;
				1315	// Output known-0 are known to be clear if zero in either the LHS \| RHS.
				1316	KnownZero \|= KnownZero2;
				1317	break;
Chris Lattner	c6fd6cd	2006-01-30 04:09:27 +0000	[diff] [blame]	1318	case ISD::OR:
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1319	if (SimplifyDemandedBits(Op.getOperand(1), NewMask, KnownZero,
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1320	KnownOne, TLO, Depth+1))
				1321	return true;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1322	assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1323	if (SimplifyDemandedBits(Op.getOperand(0), ~KnownOne & NewMask,
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1324	KnownZero2, KnownOne2, TLO, Depth+1))
				1325	return true;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1326	assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
				1327
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1328	// If all of the demanded bits are known zero on one side, return the other.
				1329	// These bits cannot contribute to the result of the 'or'.
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1330	if ((NewMask & ~KnownOne2 & KnownZero) == (~KnownOne2 & NewMask))
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1331	return TLO.CombineTo(Op, Op.getOperand(0));
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1332	if ((NewMask & ~KnownOne & KnownZero2) == (~KnownOne & NewMask))
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1333	return TLO.CombineTo(Op, Op.getOperand(1));
				1334	// If all of the potentially set bits on one side are known to be set on
				1335	// the other side, just use the 'other' side.
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1336	if ((NewMask & ~KnownZero & KnownOne2) == (~KnownZero & NewMask))
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1337	return TLO.CombineTo(Op, Op.getOperand(0));
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1338	if ((NewMask & ~KnownZero2 & KnownOne) == (~KnownZero2 & NewMask))
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1339	return TLO.CombineTo(Op, Op.getOperand(1));
				1340	// If the RHS is a constant, see if we can simplify it.
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1341	if (TLO.ShrinkDemandedConstant(Op, NewMask))
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1342	return true;
Dan Gohman	97121ba	2009-04-08 00:15:30 +0000	[diff] [blame]	1343	// If the operation can be done in a smaller type, do so.
Dan Gohman	4e39e9d	2010-06-24 14:30:44 +0000	[diff] [blame]	1344	if (TLO.ShrinkDemandedOp(Op, BitWidth, NewMask, dl))
Dan Gohman	97121ba	2009-04-08 00:15:30 +0000	[diff] [blame]	1345	return true;
				1346
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1347	// Output known-0 bits are only known if clear in both the LHS & RHS.
				1348	KnownZero &= KnownZero2;
				1349	// Output known-1 are known to be set if set in either the LHS \| RHS.
				1350	KnownOne \|= KnownOne2;
				1351	break;
Chris Lattner	c6fd6cd	2006-01-30 04:09:27 +0000	[diff] [blame]	1352	case ISD::XOR:
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1353	if (SimplifyDemandedBits(Op.getOperand(1), NewMask, KnownZero,
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1354	KnownOne, TLO, Depth+1))
				1355	return true;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1356	assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1357	if (SimplifyDemandedBits(Op.getOperand(0), NewMask, KnownZero2,
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1358	KnownOne2, TLO, Depth+1))
				1359	return true;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1360	assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
				1361
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1362	// If all of the demanded bits are known zero on one side, return the other.
				1363	// These bits cannot contribute to the result of the 'xor'.
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1364	if ((KnownZero & NewMask) == NewMask)
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1365	return TLO.CombineTo(Op, Op.getOperand(0));
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1366	if ((KnownZero2 & NewMask) == NewMask)
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1367	return TLO.CombineTo(Op, Op.getOperand(1));
Dan Gohman	97121ba	2009-04-08 00:15:30 +0000	[diff] [blame]	1368	// If the operation can be done in a smaller type, do so.
Dan Gohman	4e39e9d	2010-06-24 14:30:44 +0000	[diff] [blame]	1369	if (TLO.ShrinkDemandedOp(Op, BitWidth, NewMask, dl))
Dan Gohman	97121ba	2009-04-08 00:15:30 +0000	[diff] [blame]	1370	return true;
				1371
Chris Lattner	3687c1a	2006-11-27 21:50:02 +0000	[diff] [blame]	1372	// If all of the unknown bits are known to be zero on one side or the other
				1373	// (but not both) turn this into an inclusive or.
				1374	// e.g. (A & C1)^(B & C2) -> (A & C1)\|(B & C2) iff C1&C2 == 0
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1375	if ((NewMask & ~KnownZero & ~KnownZero2) == 0)
Dale Johannesen	de06470	2009-02-06 21:50:26 +0000	[diff] [blame]	1376	return TLO.CombineTo(Op, TLO.DAG.getNode(ISD::OR, dl, Op.getValueType(),
Chris Lattner	3687c1a	2006-11-27 21:50:02 +0000	[diff] [blame]	1377	Op.getOperand(0),
				1378	Op.getOperand(1)));
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1379
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1380	// Output known-0 bits are known if clear or set in both the LHS & RHS.
				1381	KnownZeroOut = (KnownZero & KnownZero2) \| (KnownOne & KnownOne2);
				1382	// Output known-1 are known to be set if set in only one of the LHS, RHS.
				1383	KnownOneOut = (KnownZero & KnownOne2) \| (KnownOne & KnownZero2);
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1384
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1385	// If all of the demanded bits on one side are known, and all of the set
				1386	// bits on that side are also known to be set on the other side, turn this
				1387	// into an AND, as we know the bits will be cleared.
				1388	// e.g. (X \| C1) ^ C2 --> (X \| C1) & ~C2 iff (C1&C2) == C2
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1389	if ((NewMask & (KnownZero\|KnownOne)) == NewMask) { // all known
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1390	if ((KnownOne & KnownOne2) == KnownOne) {
Owen Anderson	e50ed30	2009-08-10 22:56:29 +0000	[diff] [blame]	1391	EVT VT = Op.getValueType();
Dan Gohman	475871a	2008-07-27 21:46:04 +0000	[diff] [blame]	1392	SDValue ANDC = TLO.DAG.getConstant(~KnownOne & NewMask, VT);
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1393	return TLO.CombineTo(Op, TLO.DAG.getNode(ISD::AND, dl, VT,
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	1394	Op.getOperand(0), ANDC));
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1395	}
				1396	}
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1397
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1398	// If the RHS is a constant, see if we can simplify it.
Torok Edwin	4fea2e9	2008-04-06 21:23:02 +0000	[diff] [blame]	1399	// for XOR, we prefer to force bits to 1 if they will make a -1.
				1400	// if we can't force bits, try to shrink constant
				1401	if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
				1402	APInt Expanded = C->getAPIntValue() \| (~NewMask);
				1403	// if we can expand it to have all bits set, do it
				1404	if (Expanded.isAllOnesValue()) {
				1405	if (Expanded != C->getAPIntValue()) {
Owen Anderson	e50ed30	2009-08-10 22:56:29 +0000	[diff] [blame]	1406	EVT VT = Op.getValueType();
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	1407	SDValue New = TLO.DAG.getNode(Op.getOpcode(), dl,VT, Op.getOperand(0),
Torok Edwin	4fea2e9	2008-04-06 21:23:02 +0000	[diff] [blame]	1408	TLO.DAG.getConstant(Expanded, VT));
				1409	return TLO.CombineTo(Op, New);
				1410	}
				1411	// if it already has all the bits set, nothing to change
				1412	// but don't shrink either!
				1413	} else if (TLO.ShrinkDemandedConstant(Op, NewMask)) {
				1414	return true;
				1415	}
				1416	}
				1417
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1418	KnownZero = KnownZeroOut;
				1419	KnownOne = KnownOneOut;
				1420	break;
Chris Lattner	c6fd6cd	2006-01-30 04:09:27 +0000	[diff] [blame]	1421	case ISD::SELECT:
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1422	if (SimplifyDemandedBits(Op.getOperand(2), NewMask, KnownZero,
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1423	KnownOne, TLO, Depth+1))
				1424	return true;
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1425	if (SimplifyDemandedBits(Op.getOperand(1), NewMask, KnownZero2,
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1426	KnownOne2, TLO, Depth+1))
				1427	return true;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1428	assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
				1429	assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
				1430
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1431	// If the operands are constants, see if we can simplify them.
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1432	if (TLO.ShrinkDemandedConstant(Op, NewMask))
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1433	return true;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1434
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1435	// Only known if known in both the LHS and RHS.
				1436	KnownOne &= KnownOne2;
				1437	KnownZero &= KnownZero2;
				1438	break;
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1439	case ISD::SELECT_CC:
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1440	if (SimplifyDemandedBits(Op.getOperand(3), NewMask, KnownZero,
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1441	KnownOne, TLO, Depth+1))
				1442	return true;
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1443	if (SimplifyDemandedBits(Op.getOperand(2), NewMask, KnownZero2,
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1444	KnownOne2, TLO, Depth+1))
				1445	return true;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1446	assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
				1447	assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
				1448
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1449	// If the operands are constants, see if we can simplify them.
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1450	if (TLO.ShrinkDemandedConstant(Op, NewMask))
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1451	return true;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1452
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1453	// Only known if known in both the LHS and RHS.
				1454	KnownOne &= KnownOne2;
				1455	KnownZero &= KnownZero2;
				1456	break;
Chris Lattner	c6fd6cd	2006-01-30 04:09:27 +0000	[diff] [blame]	1457	case ISD::SHL:
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1458	if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
Dan Gohman	f5aeb1a	2008-09-12 16:56:44 +0000	[diff] [blame]	1459	unsigned ShAmt = SA->getZExtValue();
Dan Gohman	475871a	2008-07-27 21:46:04 +0000	[diff] [blame]	1460	SDValue InOp = Op.getOperand(0);
Chris Lattner	895c4ab	2007-04-17 21:14:16 +0000	[diff] [blame]	1461
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1462	// If the shift count is an invalid immediate, don't do anything.
				1463	if (ShAmt >= BitWidth)
				1464	break;
				1465
Chris Lattner	895c4ab	2007-04-17 21:14:16 +0000	[diff] [blame]	1466	// If this is ((X >>u C1) << ShAmt), see if we can simplify this into a
				1467	// single shift. We can do this if the bottom bits (which are shifted
				1468	// out) are never demanded.
				1469	if (InOp.getOpcode() == ISD::SRL &&
				1470	isa<ConstantSDNode>(InOp.getOperand(1))) {
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1471	if (ShAmt && (NewMask & APInt::getLowBitsSet(BitWidth, ShAmt)) == 0) {
Dan Gohman	f5aeb1a	2008-09-12 16:56:44 +0000	[diff] [blame]	1472	unsigned C1= cast<ConstantSDNode>(InOp.getOperand(1))->getZExtValue();
Chris Lattner	895c4ab	2007-04-17 21:14:16 +0000	[diff] [blame]	1473	unsigned Opc = ISD::SHL;
				1474	int Diff = ShAmt-C1;
				1475	if (Diff < 0) {
				1476	Diff = -Diff;
				1477	Opc = ISD::SRL;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1478	}
				1479
				1480	SDValue NewSA =
Chris Lattner	4e7e6cd	2007-05-30 16:30:06 +0000	[diff] [blame]	1481	TLO.DAG.getConstant(Diff, Op.getOperand(1).getValueType());
Owen Anderson	e50ed30	2009-08-10 22:56:29 +0000	[diff] [blame]	1482	EVT VT = Op.getValueType();
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	1483	return TLO.CombineTo(Op, TLO.DAG.getNode(Opc, dl, VT,
Chris Lattner	895c4ab	2007-04-17 21:14:16 +0000	[diff] [blame]	1484	InOp.getOperand(0), NewSA));
				1485	}
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1486	}
				1487
Dan Gohman	a4f4d69	2010-07-23 18:03:30 +0000	[diff] [blame]	1488	if (SimplifyDemandedBits(InOp, NewMask.lshr(ShAmt),
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1489	KnownZero, KnownOne, TLO, Depth+1))
Chris Lattner	c6fd6cd	2006-01-30 04:09:27 +0000	[diff] [blame]	1490	return true;
Dan Gohman	a4f4d69	2010-07-23 18:03:30 +0000	[diff] [blame]	1491
				1492	// Convert (shl (anyext x, c)) to (anyext (shl x, c)) if the high bits
				1493	// are not demanded. This will likely allow the anyext to be folded away.
				1494	if (InOp.getNode()->getOpcode() == ISD::ANY_EXTEND) {
				1495	SDValue InnerOp = InOp.getNode()->getOperand(0);
				1496	EVT InnerVT = InnerOp.getValueType();
Eli Friedman	2dd0353	2011-12-09 01:16:26 +0000	[diff] [blame]	1497	unsigned InnerBits = InnerVT.getSizeInBits();
				1498	if (ShAmt < InnerBits && NewMask.lshr(InnerBits) == 0 &&
Dan Gohman	a4f4d69	2010-07-23 18:03:30 +0000	[diff] [blame]	1499	isTypeDesirableForOp(ISD::SHL, InnerVT)) {
Owen Anderson	95771af	2011-02-25 21:41:48 +0000	[diff] [blame]	1500	EVT ShTy = getShiftAmountTy(InnerVT);
Dan Gohman	cd20c6f	2010-07-23 21:08:12 +0000	[diff] [blame]	1501	if (!APInt(BitWidth, ShAmt).isIntN(ShTy.getSizeInBits()))
				1502	ShTy = InnerVT;
Dan Gohman	a4f4d69	2010-07-23 18:03:30 +0000	[diff] [blame]	1503	SDValue NarrowShl =
				1504	TLO.DAG.getNode(ISD::SHL, dl, InnerVT, InnerOp,
Dan Gohman	cd20c6f	2010-07-23 21:08:12 +0000	[diff] [blame]	1505	TLO.DAG.getConstant(ShAmt, ShTy));
Dan Gohman	a4f4d69	2010-07-23 18:03:30 +0000	[diff] [blame]	1506	return
				1507	TLO.CombineTo(Op,
				1508	TLO.DAG.getNode(ISD::ANY_EXTEND, dl, Op.getValueType(),
				1509	NarrowShl));
				1510	}
				1511	}
				1512
Dan Gohman	f5aeb1a	2008-09-12 16:56:44 +0000	[diff] [blame]	1513	KnownZero <<= SA->getZExtValue();
				1514	KnownOne <<= SA->getZExtValue();
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1515	// low bits known zero.
Dan Gohman	f5aeb1a	2008-09-12 16:56:44 +0000	[diff] [blame]	1516	KnownZero \|= APInt::getLowBitsSet(BitWidth, SA->getZExtValue());
Chris Lattner	c6fd6cd	2006-01-30 04:09:27 +0000	[diff] [blame]	1517	}
				1518	break;
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1519	case ISD::SRL:
				1520	if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
Owen Anderson	e50ed30	2009-08-10 22:56:29 +0000	[diff] [blame]	1521	EVT VT = Op.getValueType();
Dan Gohman	f5aeb1a	2008-09-12 16:56:44 +0000	[diff] [blame]	1522	unsigned ShAmt = SA->getZExtValue();
Duncan Sands	83ec4b6	2008-06-06 12:08:01 +0000	[diff] [blame]	1523	unsigned VTSize = VT.getSizeInBits();
Dan Gohman	475871a	2008-07-27 21:46:04 +0000	[diff] [blame]	1524	SDValue InOp = Op.getOperand(0);
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1525
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1526	// If the shift count is an invalid immediate, don't do anything.
				1527	if (ShAmt >= BitWidth)
				1528	break;
				1529
Chris Lattner	895c4ab	2007-04-17 21:14:16 +0000	[diff] [blame]	1530	// If this is ((X << C1) >>u ShAmt), see if we can simplify this into a
				1531	// single shift. We can do this if the top bits (which are shifted out)
				1532	// are never demanded.
				1533	if (InOp.getOpcode() == ISD::SHL &&
				1534	isa<ConstantSDNode>(InOp.getOperand(1))) {
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1535	if (ShAmt && (NewMask & APInt::getHighBitsSet(VTSize, ShAmt)) == 0) {
Dan Gohman	f5aeb1a	2008-09-12 16:56:44 +0000	[diff] [blame]	1536	unsigned C1= cast<ConstantSDNode>(InOp.getOperand(1))->getZExtValue();
Chris Lattner	895c4ab	2007-04-17 21:14:16 +0000	[diff] [blame]	1537	unsigned Opc = ISD::SRL;
				1538	int Diff = ShAmt-C1;
				1539	if (Diff < 0) {
				1540	Diff = -Diff;
				1541	Opc = ISD::SHL;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1542	}
				1543
Dan Gohman	475871a	2008-07-27 21:46:04 +0000	[diff] [blame]	1544	SDValue NewSA =
Chris Lattner	8c7d2d5	2007-04-17 22:53:02 +0000	[diff] [blame]	1545	TLO.DAG.getConstant(Diff, Op.getOperand(1).getValueType());
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	1546	return TLO.CombineTo(Op, TLO.DAG.getNode(Opc, dl, VT,
Chris Lattner	895c4ab	2007-04-17 21:14:16 +0000	[diff] [blame]	1547	InOp.getOperand(0), NewSA));
				1548	}
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1549	}
				1550
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1551	// Compute the new bits that are at the top now.
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1552	if (SimplifyDemandedBits(InOp, (NewMask << ShAmt),
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1553	KnownZero, KnownOne, TLO, Depth+1))
				1554	return true;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1555	assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1556	KnownZero = KnownZero.lshr(ShAmt);
				1557	KnownOne = KnownOne.lshr(ShAmt);
Chris Lattner	c4fa603	2006-06-13 16:52:37 +0000	[diff] [blame]	1558
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1559	APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt);
Chris Lattner	c4fa603	2006-06-13 16:52:37 +0000	[diff] [blame]	1560	KnownZero \|= HighBits; // High bits known zero.
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1561	}
				1562	break;
				1563	case ISD::SRA:
Dan Gohman	e5af2d3	2009-01-29 01:59:02 +0000	[diff] [blame]	1564	// If this is an arithmetic shift right and only the low-bit is set, we can
				1565	// always convert this into a logical shr, even if the shift amount is
				1566	// variable. The low bit of the shift cannot be an input sign bit unless
				1567	// the shift amount is >= the size of the datatype, which is undefined.
Eli Friedman	2dd0353	2011-12-09 01:16:26 +0000	[diff] [blame]	1568	if (NewMask == 1)
Evan Cheng	e5b51ac	2010-04-17 06:13:15 +0000	[diff] [blame]	1569	return TLO.CombineTo(Op,
				1570	TLO.DAG.getNode(ISD::SRL, dl, Op.getValueType(),
				1571	Op.getOperand(0), Op.getOperand(1)));
Dan Gohman	e5af2d3	2009-01-29 01:59:02 +0000	[diff] [blame]	1572
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1573	if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
Owen Anderson	e50ed30	2009-08-10 22:56:29 +0000	[diff] [blame]	1574	EVT VT = Op.getValueType();
Dan Gohman	f5aeb1a	2008-09-12 16:56:44 +0000	[diff] [blame]	1575	unsigned ShAmt = SA->getZExtValue();
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1576
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1577	// If the shift count is an invalid immediate, don't do anything.
				1578	if (ShAmt >= BitWidth)
				1579	break;
				1580
				1581	APInt InDemandedMask = (NewMask << ShAmt);
Chris Lattner	1b73713	2006-05-08 17:22:53 +0000	[diff] [blame]	1582
				1583	// If any of the demanded bits are produced by the sign extension, we also
				1584	// demand the input sign bit.
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1585	APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt);
				1586	if (HighBits.intersects(NewMask))
Dan Gohman	87862e7	2009-12-11 21:31:27 +0000	[diff] [blame]	1587	InDemandedMask \|= APInt::getSignBit(VT.getScalarType().getSizeInBits());
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1588
Chris Lattner	1b73713	2006-05-08 17:22:53 +0000	[diff] [blame]	1589	if (SimplifyDemandedBits(Op.getOperand(0), InDemandedMask,
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1590	KnownZero, KnownOne, TLO, Depth+1))
				1591	return true;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1592	assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1593	KnownZero = KnownZero.lshr(ShAmt);
				1594	KnownOne = KnownOne.lshr(ShAmt);
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1595
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1596	// Handle the sign bit, adjusted to where it is now in the mask.
				1597	APInt SignBit = APInt::getSignBit(BitWidth).lshr(ShAmt);
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1598
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1599	// If the input sign bit is known to be zero, or if none of the top bits
				1600	// are demanded, turn this into an unsigned shift right.
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1601	if (KnownZero.intersects(SignBit) \|\| (HighBits & ~NewMask) == HighBits) {
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1602	return TLO.CombineTo(Op, TLO.DAG.getNode(ISD::SRL, dl, VT,
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	1603	Op.getOperand(0),
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1604	Op.getOperand(1)));
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1605	} else if (KnownOne.intersects(SignBit)) { // New bits are known one.
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1606	KnownOne \|= HighBits;
				1607	}
				1608	}
				1609	break;
				1610	case ISD::SIGN_EXTEND_INREG: {
Nadav Rotem	cc61656	2012-01-15 19:27:55 +0000	[diff] [blame]	1611	EVT ExVT = cast<VTSDNode>(Op.getOperand(1))->getVT();
				1612
				1613	APInt MsbMask = APInt::getHighBitsSet(BitWidth, 1);
				1614	// If we only care about the highest bit, don't bother shifting right.
Eli Friedman	d49db36	2012-01-31 01:08:03 +0000	[diff] [blame^]	1615	if (MsbMask == DemandedMask) {
Nadav Rotem	cc61656	2012-01-15 19:27:55 +0000	[diff] [blame]	1616	unsigned ShAmt = ExVT.getScalarType().getSizeInBits();
				1617	SDValue InOp = Op.getOperand(0);
Eli Friedman	d49db36	2012-01-31 01:08:03 +0000	[diff] [blame^]	1618
				1619	// Compute the correct shift amount type, which must be getShiftAmountTy
				1620	// for scalar types after legalization.
				1621	EVT ShiftAmtTy = Op.getValueType();
				1622	if (TLO.LegalTypes() && !ShiftAmtTy.isVector())
				1623	ShiftAmtTy = getShiftAmountTy(ShiftAmtTy);
				1624
				1625	SDValue ShiftAmt = TLO.DAG.getConstant(BitWidth - ShAmt, ShiftAmtTy);
Nadav Rotem	cc61656	2012-01-15 19:27:55 +0000	[diff] [blame]	1626	return TLO.CombineTo(Op, TLO.DAG.getNode(ISD::SHL, dl,
				1627	Op.getValueType(), InOp, ShiftAmt));
				1628	}
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1629
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1630	// Sign extension. Compute the demanded bits in the result that are not
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1631	// present in the input.
Dan Gohman	d199636	2010-01-09 02:13:55 +0000	[diff] [blame]	1632	APInt NewBits =
				1633	APInt::getHighBitsSet(BitWidth,
Nadav Rotem	cc61656	2012-01-15 19:27:55 +0000	[diff] [blame]	1634	BitWidth - ExVT.getScalarType().getSizeInBits());
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1635
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1636	// If none of the extended bits are demanded, eliminate the sextinreg.
Eli Friedman	1d17d19	2010-08-02 04:42:25 +0000	[diff] [blame]	1637	if ((NewBits & NewMask) == 0)
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1638	return TLO.CombineTo(Op, Op.getOperand(0));
				1639
Jay Foad	40f8f62	2010-12-07 08:25:19 +0000	[diff] [blame]	1640	APInt InSignBit =
Nadav Rotem	cc61656	2012-01-15 19:27:55 +0000	[diff] [blame]	1641	APInt::getSignBit(ExVT.getScalarType().getSizeInBits()).zext(BitWidth);
Dan Gohman	d199636	2010-01-09 02:13:55 +0000	[diff] [blame]	1642	APInt InputDemandedBits =
				1643	APInt::getLowBitsSet(BitWidth,
Nadav Rotem	cc61656	2012-01-15 19:27:55 +0000	[diff] [blame]	1644	ExVT.getScalarType().getSizeInBits()) &
Dan Gohman	d199636	2010-01-09 02:13:55 +0000	[diff] [blame]	1645	NewMask;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1646
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1647	// Since the sign extended bits are demanded, we know that the sign
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1648	// bit is demanded.
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1649	InputDemandedBits \|= InSignBit;
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1650
				1651	if (SimplifyDemandedBits(Op.getOperand(0), InputDemandedBits,
				1652	KnownZero, KnownOne, TLO, Depth+1))
				1653	return true;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1654	assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1655
				1656	// If the sign bit of the input is known set or clear, then we know the
				1657	// top bits of the result.
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1658
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1659	// If the input sign bit is known zero, convert this into a zero extension.
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1660	if (KnownZero.intersects(InSignBit))
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1661	return TLO.CombineTo(Op,
Nadav Rotem	cc61656	2012-01-15 19:27:55 +0000	[diff] [blame]	1662	TLO.DAG.getZeroExtendInReg(Op.getOperand(0),dl,ExVT));
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1663
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1664	if (KnownOne.intersects(InSignBit)) { // Input sign bit known set
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1665	KnownOne \|= NewBits;
				1666	KnownZero &= ~NewBits;
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1667	} else { // Input sign bit unknown
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1668	KnownZero &= ~NewBits;
				1669	KnownOne &= ~NewBits;
				1670	}
				1671	break;
				1672	}
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1673	case ISD::ZERO_EXTEND: {
Dan Gohman	d199636	2010-01-09 02:13:55 +0000	[diff] [blame]	1674	unsigned OperandBitWidth =
				1675	Op.getOperand(0).getValueType().getScalarType().getSizeInBits();
Jay Foad	40f8f62	2010-12-07 08:25:19 +0000	[diff] [blame]	1676	APInt InMask = NewMask.trunc(OperandBitWidth);
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1677
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1678	// If none of the top bits are demanded, convert this into an any_extend.
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1679	APInt NewBits =
				1680	APInt::getHighBitsSet(BitWidth, BitWidth - OperandBitWidth) & NewMask;
				1681	if (!NewBits.intersects(NewMask))
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	1682	return TLO.CombineTo(Op, TLO.DAG.getNode(ISD::ANY_EXTEND, dl,
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1683	Op.getValueType(),
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1684	Op.getOperand(0)));
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1685
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1686	if (SimplifyDemandedBits(Op.getOperand(0), InMask,
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1687	KnownZero, KnownOne, TLO, Depth+1))
				1688	return true;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1689	assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
Jay Foad	40f8f62	2010-12-07 08:25:19 +0000	[diff] [blame]	1690	KnownZero = KnownZero.zext(BitWidth);
				1691	KnownOne = KnownOne.zext(BitWidth);
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1692	KnownZero \|= NewBits;
				1693	break;
				1694	}
				1695	case ISD::SIGN_EXTEND: {
Owen Anderson	e50ed30	2009-08-10 22:56:29 +0000	[diff] [blame]	1696	EVT InVT = Op.getOperand(0).getValueType();
Dan Gohman	d199636	2010-01-09 02:13:55 +0000	[diff] [blame]	1697	unsigned InBits = InVT.getScalarType().getSizeInBits();
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1698	APInt InMask = APInt::getLowBitsSet(BitWidth, InBits);
Dan Gohman	9736028	2008-03-11 21:29:43 +0000	[diff] [blame]	1699	APInt InSignBit = APInt::getBitsSet(BitWidth, InBits - 1, InBits);
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1700	APInt NewBits = ~InMask & NewMask;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1701
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1702	// If none of the top bits are demanded, convert this into an any_extend.
				1703	if (NewBits == 0)
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	1704	return TLO.CombineTo(Op,TLO.DAG.getNode(ISD::ANY_EXTEND, dl,
				1705	Op.getValueType(),
				1706	Op.getOperand(0)));
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1707
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1708	// Since some of the sign extended bits are demanded, we know that the sign
				1709	// bit is demanded.
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1710	APInt InDemandedBits = InMask & NewMask;
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1711	InDemandedBits \|= InSignBit;
Jay Foad	40f8f62	2010-12-07 08:25:19 +0000	[diff] [blame]	1712	InDemandedBits = InDemandedBits.trunc(InBits);
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1713
				1714	if (SimplifyDemandedBits(Op.getOperand(0), InDemandedBits, KnownZero,
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1715	KnownOne, TLO, Depth+1))
				1716	return true;
Jay Foad	40f8f62	2010-12-07 08:25:19 +0000	[diff] [blame]	1717	KnownZero = KnownZero.zext(BitWidth);
				1718	KnownOne = KnownOne.zext(BitWidth);
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1719
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1720	// If the sign bit is known zero, convert this to a zero extend.
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1721	if (KnownZero.intersects(InSignBit))
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	1722	return TLO.CombineTo(Op, TLO.DAG.getNode(ISD::ZERO_EXTEND, dl,
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1723	Op.getValueType(),
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1724	Op.getOperand(0)));
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1725
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1726	// If the sign bit is known one, the top bits match.
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1727	if (KnownOne.intersects(InSignBit)) {
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1728	KnownOne \|= NewBits;
				1729	KnownZero &= ~NewBits;
				1730	} else { // Otherwise, top bits aren't known.
				1731	KnownOne &= ~NewBits;
				1732	KnownZero &= ~NewBits;
				1733	}
				1734	break;
				1735	}
				1736	case ISD::ANY_EXTEND: {
Dan Gohman	d199636	2010-01-09 02:13:55 +0000	[diff] [blame]	1737	unsigned OperandBitWidth =
				1738	Op.getOperand(0).getValueType().getScalarType().getSizeInBits();
Jay Foad	40f8f62	2010-12-07 08:25:19 +0000	[diff] [blame]	1739	APInt InMask = NewMask.trunc(OperandBitWidth);
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1740	if (SimplifyDemandedBits(Op.getOperand(0), InMask,
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1741	KnownZero, KnownOne, TLO, Depth+1))
				1742	return true;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1743	assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
Jay Foad	40f8f62	2010-12-07 08:25:19 +0000	[diff] [blame]	1744	KnownZero = KnownZero.zext(BitWidth);
				1745	KnownOne = KnownOne.zext(BitWidth);
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1746	break;
				1747	}
Chris Lattner	fe8babf	2006-05-05 22:32:12 +0000	[diff] [blame]	1748	case ISD::TRUNCATE: {
Chris Lattner	c93dfda	2006-05-06 00:11:52 +0000	[diff] [blame]	1749	// Simplify the input, using demanded bit information, and compute the known
				1750	// zero/one bits live out.
Dan Gohman	042919c	2010-03-01 17:59:21 +0000	[diff] [blame]	1751	unsigned OperandBitWidth =
				1752	Op.getOperand(0).getValueType().getScalarType().getSizeInBits();
Jay Foad	40f8f62	2010-12-07 08:25:19 +0000	[diff] [blame]	1753	APInt TruncMask = NewMask.zext(OperandBitWidth);
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1754	if (SimplifyDemandedBits(Op.getOperand(0), TruncMask,
Chris Lattner	fe8babf	2006-05-05 22:32:12 +0000	[diff] [blame]	1755	KnownZero, KnownOne, TLO, Depth+1))
				1756	return true;
Jay Foad	40f8f62	2010-12-07 08:25:19 +0000	[diff] [blame]	1757	KnownZero = KnownZero.trunc(BitWidth);
				1758	KnownOne = KnownOne.trunc(BitWidth);
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1759
Chris Lattner	c93dfda	2006-05-06 00:11:52 +0000	[diff] [blame]	1760	// If the input is only used by this truncate, see if we can shrink it based
				1761	// on the known demanded bits.
Gabor Greif	ba36cb5	2008-08-28 21:40:38 +0000	[diff] [blame]	1762	if (Op.getOperand(0).getNode()->hasOneUse()) {
Dan Gohman	475871a	2008-07-27 21:46:04 +0000	[diff] [blame]	1763	SDValue In = Op.getOperand(0);
Chris Lattner	c93dfda	2006-05-06 00:11:52 +0000	[diff] [blame]	1764	switch (In.getOpcode()) {
				1765	default: break;
				1766	case ISD::SRL:
				1767	// Shrink SRL by a constant if none of the high bits shifted in are
				1768	// demanded.
Evan Cheng	e5b51ac	2010-04-17 06:13:15 +0000	[diff] [blame]	1769	if (TLO.LegalTypes() &&
				1770	!isTypeDesirableForOp(ISD::SRL, Op.getValueType()))
				1771	// Do not turn (vt1 truncate (vt2 srl)) into (vt1 srl) if vt1 is
				1772	// undesirable.
				1773	break;
				1774	ConstantSDNode *ShAmt = dyn_cast<ConstantSDNode>(In.getOperand(1));
				1775	if (!ShAmt)
				1776	break;
Owen Anderson	7adf862	2011-04-13 23:22:23 +0000	[diff] [blame]	1777	SDValue Shift = In.getOperand(1);
				1778	if (TLO.LegalTypes()) {
				1779	uint64_t ShVal = ShAmt->getZExtValue();
				1780	Shift =
				1781	TLO.DAG.getConstant(ShVal, getShiftAmountTy(Op.getValueType()));
				1782	}
				1783
Evan Cheng	e5b51ac	2010-04-17 06:13:15 +0000	[diff] [blame]	1784	APInt HighBits = APInt::getHighBitsSet(OperandBitWidth,
				1785	OperandBitWidth - BitWidth);
Jay Foad	40f8f62	2010-12-07 08:25:19 +0000	[diff] [blame]	1786	HighBits = HighBits.lshr(ShAmt->getZExtValue()).trunc(BitWidth);
Evan Cheng	e5b51ac	2010-04-17 06:13:15 +0000	[diff] [blame]	1787
				1788	if (ShAmt->getZExtValue() < BitWidth && !(HighBits & NewMask)) {
				1789	// None of the shifted in bits are needed. Add a truncate of the
				1790	// shift input, then shift it.
				1791	SDValue NewTrunc = TLO.DAG.getNode(ISD::TRUNCATE, dl,
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1792	Op.getValueType(),
Evan Cheng	e5b51ac	2010-04-17 06:13:15 +0000	[diff] [blame]	1793	In.getOperand(0));
				1794	return TLO.CombineTo(Op, TLO.DAG.getNode(ISD::SRL, dl,
				1795	Op.getValueType(),
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1796	NewTrunc,
Owen Anderson	7adf862	2011-04-13 23:22:23 +0000	[diff] [blame]	1797	Shift));
Chris Lattner	c93dfda	2006-05-06 00:11:52 +0000	[diff] [blame]	1798	}
				1799	break;
				1800	}
				1801	}
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1802
				1803	assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
Chris Lattner	fe8babf	2006-05-05 22:32:12 +0000	[diff] [blame]	1804	break;
				1805	}
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1806	case ISD::AssertZext: {
Owen Anderson	7ab15f6	2011-09-03 00:26:49 +0000	[diff] [blame]	1807	// AssertZext demands all of the high bits, plus any of the low bits
				1808	// demanded by its users.
				1809	EVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT();
				1810	APInt InMask = APInt::getLowBitsSet(BitWidth,
				1811	VT.getSizeInBits());
				1812	if (SimplifyDemandedBits(Op.getOperand(0), ~InMask \| NewMask,
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1813	KnownZero, KnownOne, TLO, Depth+1))
				1814	return true;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1815	assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
Dan Gohman	400f75c	2010-06-03 20:21:33 +0000	[diff] [blame]	1816
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1817	KnownZero \|= ~InMask & NewMask;
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1818	break;
				1819	}
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1820	case ISD::BITCAST:
Stuart Hastings	57f1fde	2011-06-06 16:44:31 +0000	[diff] [blame]	1821	// If this is an FP->Int bitcast and if the sign bit is the only
				1822	// thing demanded, turn this into a FGETSIGN.
Eli Friedman	ca072a3	2011-12-15 02:07:20 +0000	[diff] [blame]	1823	if (!TLO.LegalOperations() &&
				1824	!Op.getValueType().isVector() &&
Eli Friedman	0948f0a	2011-11-09 22:25:12 +0000	[diff] [blame]	1825	!Op.getOperand(0).getValueType().isVector() &&
Nadav Rotem	0c3e678	2011-06-12 14:56:55 +0000	[diff] [blame]	1826	NewMask == APInt::getSignBit(Op.getValueType().getSizeInBits()) &&
				1827	Op.getOperand(0).getValueType().isFloatingPoint()) {
Stuart Hastings	57f1fde	2011-06-06 16:44:31 +0000	[diff] [blame]	1828	bool OpVTLegal = isOperationLegalOrCustom(ISD::FGETSIGN, Op.getValueType());
				1829	bool i32Legal = isOperationLegalOrCustom(ISD::FGETSIGN, MVT::i32);
				1830	if ((OpVTLegal \|\| i32Legal) && Op.getValueType().isSimple()) {
				1831	EVT Ty = OpVTLegal ? Op.getValueType() : MVT::i32;
Chris Lattner	2ceb2cf	2007-12-22 21:35:38 +0000	[diff] [blame]	1832	// Make a FGETSIGN + SHL to move the sign bit into the appropriate
				1833	// place. We expect the SHL to be eliminated by other optimizations.
Stuart Hastings	090bf19	2011-06-01 18:32:25 +0000	[diff] [blame]	1834	SDValue Sign = TLO.DAG.getNode(ISD::FGETSIGN, dl, Ty, Op.getOperand(0));
Stuart Hastings	57f1fde	2011-06-06 16:44:31 +0000	[diff] [blame]	1835	unsigned OpVTSizeInBits = Op.getValueType().getSizeInBits();
				1836	if (!OpVTLegal && OpVTSizeInBits > 32)
Stuart Hastings	090bf19	2011-06-01 18:32:25 +0000	[diff] [blame]	1837	Sign = TLO.DAG.getNode(ISD::ZERO_EXTEND, dl, Op.getValueType(), Sign);
Duncan Sands	83ec4b6	2008-06-06 12:08:01 +0000	[diff] [blame]	1838	unsigned ShVal = Op.getValueType().getSizeInBits()-1;
Stuart Hastings	bdce372	2011-06-01 14:04:17 +0000	[diff] [blame]	1839	SDValue ShAmt = TLO.DAG.getConstant(ShVal, Op.getValueType());
Stuart Hastings	3dfc4b12	2011-05-19 18:48:20 +0000	[diff] [blame]	1840	return TLO.CombineTo(Op, TLO.DAG.getNode(ISD::SHL, dl,
				1841	Op.getValueType(),
Chris Lattner	2ceb2cf	2007-12-22 21:35:38 +0000	[diff] [blame]	1842	Sign, ShAmt));
				1843	}
				1844	}
Chris Lattner	2ceb2cf	2007-12-22 21:35:38 +0000	[diff] [blame]	1845	break;
Dan Gohman	97121ba	2009-04-08 00:15:30 +0000	[diff] [blame]	1846	case ISD::ADD:
				1847	case ISD::MUL:
				1848	case ISD::SUB: {
				1849	// Add, Sub, and Mul don't demand any bits in positions beyond that
				1850	// of the highest bit demanded of them.
				1851	APInt LoMask = APInt::getLowBitsSet(BitWidth,
				1852	BitWidth - NewMask.countLeadingZeros());
				1853	if (SimplifyDemandedBits(Op.getOperand(0), LoMask, KnownZero2,
				1854	KnownOne2, TLO, Depth+1))
				1855	return true;
				1856	if (SimplifyDemandedBits(Op.getOperand(1), LoMask, KnownZero2,
				1857	KnownOne2, TLO, Depth+1))
				1858	return true;
				1859	// See if the operation should be performed at a smaller bit width.
Dan Gohman	4e39e9d	2010-06-24 14:30:44 +0000	[diff] [blame]	1860	if (TLO.ShrinkDemandedOp(Op, BitWidth, NewMask, dl))
Dan Gohman	97121ba	2009-04-08 00:15:30 +0000	[diff] [blame]	1861	return true;
				1862	}
				1863	// FALL THROUGH
Dan Gohman	54eed37	2008-05-06 00:53:29 +0000	[diff] [blame]	1864	default:
Chris Lattner	1482b5f	2006-04-02 06:15:09 +0000	[diff] [blame]	1865	// Just use ComputeMaskedBits to compute output bits.
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1866	TLO.DAG.ComputeMaskedBits(Op, NewMask, KnownZero, KnownOne, Depth);
Chris Lattner	a6bc5a4	2006-02-27 01:00:42 +0000	[diff] [blame]	1867	break;
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1868	}
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1869
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1870	// If we know the value of all of the demanded bits, return this as a
				1871	// constant.
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1872	if ((NewMask & (KnownZero\|KnownOne)) == NewMask)
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1873	return TLO.CombineTo(Op, TLO.DAG.getConstant(KnownOne, Op.getValueType()));
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1874
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1875	return false;
				1876	}
				1877
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1878	/// computeMaskedBitsForTargetNode - Determine which of the bits specified
				1879	/// in Mask are known to be either zero or one and return them in the
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1880	/// KnownZero/KnownOne bitsets.
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1881	void TargetLowering::computeMaskedBitsForTargetNode(const SDValue Op,
Dan Gohman	977a76f	2008-02-13 22:28:48 +0000	[diff] [blame]	1882	const APInt &Mask,
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1883	APInt &KnownZero,
Dan Gohman	fd29e0e	2008-02-13 00:35:47 +0000	[diff] [blame]	1884	APInt &KnownOne,
Dan Gohman	ea859be	2007-06-22 14:59:07 +0000	[diff] [blame]	1885	const SelectionDAG &DAG,
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1886	unsigned Depth) const {
Chris Lattner	1b5232a	2006-04-02 06:19:46 +0000	[diff] [blame]	1887	assert((Op.getOpcode() >= ISD::BUILTIN_OP_END \|\|
				1888	Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN \|\|
				1889	Op.getOpcode() == ISD::INTRINSIC_W_CHAIN \|\|
				1890	Op.getOpcode() == ISD::INTRINSIC_VOID) &&
Chris Lattner	c6fd6cd	2006-01-30 04:09:27 +0000	[diff] [blame]	1891	"Should use MaskedValueIsZero if you don't know whether Op"
				1892	" is a target node!");
Dan Gohman	977a76f	2008-02-13 22:28:48 +0000	[diff] [blame]	1893	KnownZero = KnownOne = APInt(Mask.getBitWidth(), 0);
Evan Cheng	3a03ebb	2005-12-21 23:05:39 +0000	[diff] [blame]	1894	}
Chris Lattner	4ccb070	2006-01-26 20:37:03 +0000	[diff] [blame]	1895
Chris Lattner	5c3e21d	2006-05-06 09:27:13 +0000	[diff] [blame]	1896	/// ComputeNumSignBitsForTargetNode - This method can be implemented by
				1897	/// targets that want to expose additional information about sign bits to the
				1898	/// DAG Combiner.
Dan Gohman	475871a	2008-07-27 21:46:04 +0000	[diff] [blame]	1899	unsigned TargetLowering::ComputeNumSignBitsForTargetNode(SDValue Op,
Chris Lattner	5c3e21d	2006-05-06 09:27:13 +0000	[diff] [blame]	1900	unsigned Depth) const {
				1901	assert((Op.getOpcode() >= ISD::BUILTIN_OP_END \|\|
				1902	Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN \|\|
				1903	Op.getOpcode() == ISD::INTRINSIC_W_CHAIN \|\|
				1904	Op.getOpcode() == ISD::INTRINSIC_VOID) &&
				1905	"Should use ComputeNumSignBits if you don't know whether Op"
				1906	" is a target node!");
				1907	return 1;
				1908	}
				1909
Dan Gohman	97d1163	2009-02-15 23:59:32 +0000	[diff] [blame]	1910	/// ValueHasExactlyOneBitSet - Test if the given value is known to have exactly
				1911	/// one bit set. This differs from ComputeMaskedBits in that it doesn't need to
				1912	/// determine which bit is set.
				1913	///
Dale Johannesen	85b0ede	2009-02-11 19:19:41 +0000	[diff] [blame]	1914	static bool ValueHasExactlyOneBitSet(SDValue Val, const SelectionDAG &DAG) {
Dan Gohman	97d1163	2009-02-15 23:59:32 +0000	[diff] [blame]	1915	// A left-shift of a constant one will have exactly one bit set, because
				1916	// shifting the bit off the end is undefined.
				1917	if (Val.getOpcode() == ISD::SHL)
				1918	if (ConstantSDNode *C =
				1919	dyn_cast<ConstantSDNode>(Val.getNode()->getOperand(0)))
				1920	if (C->getAPIntValue() == 1)
				1921	return true;
Dan Gohman	e5af2d3	2009-01-29 01:59:02 +0000	[diff] [blame]	1922
Dan Gohman	97d1163	2009-02-15 23:59:32 +0000	[diff] [blame]	1923	// Similarly, a right-shift of a constant sign-bit will have exactly
				1924	// one bit set.
				1925	if (Val.getOpcode() == ISD::SRL)
				1926	if (ConstantSDNode *C =
				1927	dyn_cast<ConstantSDNode>(Val.getNode()->getOperand(0)))
				1928	if (C->getAPIntValue().isSignBit())
				1929	return true;
				1930
				1931	// More could be done here, though the above checks are enough
				1932	// to handle some common cases.
				1933
				1934	// Fall back to ComputeMaskedBits to catch other known cases.
Owen Anderson	e50ed30	2009-08-10 22:56:29 +0000	[diff] [blame]	1935	EVT OpVT = Val.getValueType();
Dan Gohman	5b870af	2010-03-02 02:14:38 +0000	[diff] [blame]	1936	unsigned BitWidth = OpVT.getScalarType().getSizeInBits();
Dan Gohman	e5af2d3	2009-01-29 01:59:02 +0000	[diff] [blame]	1937	APInt Mask = APInt::getAllOnesValue(BitWidth);
				1938	APInt KnownZero, KnownOne;
				1939	DAG.ComputeMaskedBits(Val, Mask, KnownZero, KnownOne);
Dale Johannesen	85b0ede	2009-02-11 19:19:41 +0000	[diff] [blame]	1940	return (KnownZero.countPopulation() == BitWidth - 1) &&
				1941	(KnownOne.countPopulation() == 1);
Dan Gohman	e5af2d3	2009-01-29 01:59:02 +0000	[diff] [blame]	1942	}
Chris Lattner	5c3e21d	2006-05-06 09:27:13 +0000	[diff] [blame]	1943
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1944	/// SimplifySetCC - Try to simplify a setcc built with the specified operands
Dan Gohman	475871a	2008-07-27 21:46:04 +0000	[diff] [blame]	1945	/// and cc. If it is unable to simplify it, return a null SDValue.
				1946	SDValue
Owen Anderson	e50ed30	2009-08-10 22:56:29 +0000	[diff] [blame]	1947	TargetLowering::SimplifySetCC(EVT VT, SDValue N0, SDValue N1,
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	1948	ISD::CondCode Cond, bool foldBooleans,
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	1949	DAGCombinerInfo &DCI, DebugLoc dl) const {
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	1950	SelectionDAG &DAG = DCI.DAG;
				1951
				1952	// These setcc operations always fold.
				1953	switch (Cond) {
				1954	default: break;
				1955	case ISD::SETFALSE:
				1956	case ISD::SETFALSE2: return DAG.getConstant(0, VT);
				1957	case ISD::SETTRUE:
				1958	case ISD::SETTRUE2: return DAG.getConstant(1, VT);
				1959	}
				1960
Chris Lattner	7a2bdde	2011-04-15 05:18:47 +0000	[diff] [blame]	1961	// Ensure that the constant occurs on the RHS, and fold constant
				1962	// comparisons.
				1963	if (isa<ConstantSDNode>(N0.getNode()))
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	1964	return DAG.getSetCC(dl, VT, N1, N0, ISD::getSetCCSwappedOperands(Cond));
Eric Christopher	362fee9	2011-06-17 20:41:29 +0000	[diff] [blame]	1965
Gabor Greif	ba36cb5	2008-08-28 21:40:38 +0000	[diff] [blame]	1966	if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode())) {
Dan Gohman	6c6cd1c	2008-03-03 22:22:56 +0000	[diff] [blame]	1967	const APInt &C1 = N1C->getAPIntValue();
Dale Johannesen	89217a6	2008-11-07 01:28:02 +0000	[diff] [blame]	1968
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	1969	// If the LHS is '(srl (ctlz x), 5)', the RHS is 0/1, and this is an
				1970	// equality comparison, then we're just comparing whether X itself is
				1971	// zero.
				1972	if (N0.getOpcode() == ISD::SRL && (C1 == 0 \|\| C1 == 1) &&
				1973	N0.getOperand(0).getOpcode() == ISD::CTLZ &&
				1974	N0.getOperand(1).getOpcode() == ISD::Constant) {
Evan Cheng	347a9cb	2010-01-07 20:58:44 +0000	[diff] [blame]	1975	const APInt &ShAmt
				1976	= cast<ConstantSDNode>(N0.getOperand(1))->getAPIntValue();
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	1977	if ((Cond == ISD::SETEQ \|\| Cond == ISD::SETNE) &&
				1978	ShAmt == Log2_32(N0.getValueType().getSizeInBits())) {
				1979	if ((C1 == 0) == (Cond == ISD::SETEQ)) {
				1980	// (srl (ctlz x), 5) == 0 -> X != 0
				1981	// (srl (ctlz x), 5) != 1 -> X != 0
				1982	Cond = ISD::SETNE;
				1983	} else {
				1984	// (srl (ctlz x), 5) != 0 -> X == 0
				1985	// (srl (ctlz x), 5) == 1 -> X == 0
				1986	Cond = ISD::SETEQ;
				1987	}
				1988	SDValue Zero = DAG.getConstant(0, N0.getValueType());
				1989	return DAG.getSetCC(dl, VT, N0.getOperand(0).getOperand(0),
				1990	Zero, Cond);
				1991	}
				1992	}
				1993
Benjamin Kramer	d822892	2011-01-17 12:04:57 +0000	[diff] [blame]	1994	SDValue CTPOP = N0;
				1995	// Look through truncs that don't change the value of a ctpop.
				1996	if (N0.hasOneUse() && N0.getOpcode() == ISD::TRUNCATE)
				1997	CTPOP = N0.getOperand(0);
				1998
				1999	if (CTPOP.hasOneUse() && CTPOP.getOpcode() == ISD::CTPOP &&
Benjamin Kramer	c9b6a3e	2011-01-17 18:00:28 +0000	[diff] [blame]	2000	(N0 == CTPOP \|\| N0.getValueType().getSizeInBits() >
Benjamin Kramer	d822892	2011-01-17 12:04:57 +0000	[diff] [blame]	2001	Log2_32_Ceil(CTPOP.getValueType().getSizeInBits()))) {
				2002	EVT CTVT = CTPOP.getValueType();
				2003	SDValue CTOp = CTPOP.getOperand(0);
				2004
				2005	// (ctpop x) u< 2 -> (x & x-1) == 0
				2006	// (ctpop x) u> 1 -> (x & x-1) != 0
				2007	if ((Cond == ISD::SETULT && C1 == 2) \|\| (Cond == ISD::SETUGT && C1 == 1)){
				2008	SDValue Sub = DAG.getNode(ISD::SUB, dl, CTVT, CTOp,
				2009	DAG.getConstant(1, CTVT));
				2010	SDValue And = DAG.getNode(ISD::AND, dl, CTVT, CTOp, Sub);
				2011	ISD::CondCode CC = Cond == ISD::SETULT ? ISD::SETEQ : ISD::SETNE;
				2012	return DAG.getSetCC(dl, VT, And, DAG.getConstant(0, CTVT), CC);
				2013	}
				2014
				2015	// TODO: (ctpop x) == 1 -> x && (x & x-1) == 0 iff ctpop is illegal.
				2016	}
				2017
Benjamin Kramer	e7cf062	2011-04-22 18:47:44 +0000	[diff] [blame]	2018	// (zext x) == C --> x == (trunc C)
				2019	if (DCI.isBeforeLegalize() && N0->hasOneUse() &&
				2020	(Cond == ISD::SETEQ \|\| Cond == ISD::SETNE)) {
				2021	unsigned MinBits = N0.getValueSizeInBits();
				2022	SDValue PreZExt;
				2023	if (N0->getOpcode() == ISD::ZERO_EXTEND) {
				2024	// ZExt
				2025	MinBits = N0->getOperand(0).getValueSizeInBits();
				2026	PreZExt = N0->getOperand(0);
				2027	} else if (N0->getOpcode() == ISD::AND) {
				2028	// DAGCombine turns costly ZExts into ANDs
				2029	if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N0->getOperand(1)))
				2030	if ((C->getAPIntValue()+1).isPowerOf2()) {
				2031	MinBits = C->getAPIntValue().countTrailingOnes();
				2032	PreZExt = N0->getOperand(0);
				2033	}
				2034	} else if (LoadSDNode *LN0 = dyn_cast<LoadSDNode>(N0)) {
				2035	// ZEXTLOAD
				2036	if (LN0->getExtensionType() == ISD::ZEXTLOAD) {
				2037	MinBits = LN0->getMemoryVT().getSizeInBits();
				2038	PreZExt = N0;
				2039	}
				2040	}
				2041
				2042	// Make sure we're not loosing bits from the constant.
				2043	if (MinBits < C1.getBitWidth() && MinBits > C1.getActiveBits()) {
				2044	EVT MinVT = EVT::getIntegerVT(*DAG.getContext(), MinBits);
				2045	if (isTypeDesirableForOp(ISD::SETCC, MinVT)) {
				2046	// Will get folded away.
				2047	SDValue Trunc = DAG.getNode(ISD::TRUNCATE, dl, MinVT, PreZExt);
				2048	SDValue C = DAG.getConstant(C1.trunc(MinBits), MinVT);
				2049	return DAG.getSetCC(dl, VT, Trunc, C, Cond);
				2050	}
				2051	}
				2052	}
				2053
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2054	// If the LHS is '(and load, const)', the RHS is 0,
				2055	// the test is for equality or unsigned, and all 1 bits of the const are
				2056	// in the same partial word, see if we can shorten the load.
				2057	if (DCI.isBeforeLegalize() &&
				2058	N0.getOpcode() == ISD::AND && C1 == 0 &&
				2059	N0.getNode()->hasOneUse() &&
				2060	isa<LoadSDNode>(N0.getOperand(0)) &&
				2061	N0.getOperand(0).getNode()->hasOneUse() &&
				2062	isa<ConstantSDNode>(N0.getOperand(1))) {
				2063	LoadSDNode *Lod = cast<LoadSDNode>(N0.getOperand(0));
Evan Cheng	347a9cb	2010-01-07 20:58:44 +0000	[diff] [blame]	2064	APInt bestMask;
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2065	unsigned bestWidth = 0, bestOffset = 0;
Evan Cheng	347a9cb	2010-01-07 20:58:44 +0000	[diff] [blame]	2066	if (!Lod->isVolatile() && Lod->isUnindexed()) {
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2067	unsigned origWidth = N0.getValueType().getSizeInBits();
Evan Cheng	347a9cb	2010-01-07 20:58:44 +0000	[diff] [blame]	2068	unsigned maskWidth = origWidth;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2069	// We can narrow (e.g.) 16-bit extending loads on 32-bit target to
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2070	// 8 bits, but have to be careful...
				2071	if (Lod->getExtensionType() != ISD::NON_EXTLOAD)
				2072	origWidth = Lod->getMemoryVT().getSizeInBits();
Evan Cheng	347a9cb	2010-01-07 20:58:44 +0000	[diff] [blame]	2073	const APInt &Mask =
				2074	cast<ConstantSDNode>(N0.getOperand(1))->getAPIntValue();
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2075	for (unsigned width = origWidth / 2; width>=8; width /= 2) {
Evan Cheng	347a9cb	2010-01-07 20:58:44 +0000	[diff] [blame]	2076	APInt newMask = APInt::getLowBitsSet(maskWidth, width);
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2077	for (unsigned offset=0; offset<origWidth/width; offset++) {
				2078	if ((newMask & Mask) == Mask) {
				2079	if (!TD->isLittleEndian())
				2080	bestOffset = (origWidth/width - offset - 1) * (width/8);
				2081	else
				2082	bestOffset = (uint64_t)offset * (width/8);
Evan Cheng	347a9cb	2010-01-07 20:58:44 +0000	[diff] [blame]	2083	bestMask = Mask.lshr(offset * (width/8) * 8);
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2084	bestWidth = width;
				2085	break;
Dale Johannesen	89217a6	2008-11-07 01:28:02 +0000	[diff] [blame]	2086	}
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2087	newMask = newMask << width;
Dale Johannesen	89217a6	2008-11-07 01:28:02 +0000	[diff] [blame]	2088	}
				2089	}
				2090	}
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2091	if (bestWidth) {
Chris Lattner	c0c7fca	2011-04-14 04:12:47 +0000	[diff] [blame]	2092	EVT newVT = EVT::getIntegerVT(*DAG.getContext(), bestWidth);
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2093	if (newVT.isRound()) {
Owen Anderson	e50ed30	2009-08-10 22:56:29 +0000	[diff] [blame]	2094	EVT PtrType = Lod->getOperand(1).getValueType();
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2095	SDValue Ptr = Lod->getBasePtr();
				2096	if (bestOffset != 0)
				2097	Ptr = DAG.getNode(ISD::ADD, dl, PtrType, Lod->getBasePtr(),
				2098	DAG.getConstant(bestOffset, PtrType));
				2099	unsigned NewAlign = MinAlign(Lod->getAlignment(), bestOffset);
				2100	SDValue NewLoad = DAG.getLoad(newVT, dl, Lod->getChain(), Ptr,
Chris Lattner	ecf42c4	2010-09-21 16:36:31 +0000	[diff] [blame]	2101	Lod->getPointerInfo().getWithOffset(bestOffset),
Pete Cooper	d752e0f	2011-11-08 18:42:53 +0000	[diff] [blame]	2102	false, false, false, NewAlign);
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2103	return DAG.getSetCC(dl, VT,
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2104	DAG.getNode(ISD::AND, dl, newVT, NewLoad,
Evan Cheng	347a9cb	2010-01-07 20:58:44 +0000	[diff] [blame]	2105	DAG.getConstant(bestMask.trunc(bestWidth),
				2106	newVT)),
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2107	DAG.getConstant(0LL, newVT), Cond);
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2108	}
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2109	}
				2110	}
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2111
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2112	// If the LHS is a ZERO_EXTEND, perform the comparison on the input.
				2113	if (N0.getOpcode() == ISD::ZERO_EXTEND) {
				2114	unsigned InSize = N0.getOperand(0).getValueType().getSizeInBits();
				2115
				2116	// If the comparison constant has bits in the upper part, the
				2117	// zero-extended value could never match.
				2118	if (C1.intersects(APInt::getHighBitsSet(C1.getBitWidth(),
				2119	C1.getBitWidth() - InSize))) {
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2120	switch (Cond) {
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2121	case ISD::SETUGT:
				2122	case ISD::SETUGE:
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2123	case ISD::SETEQ: return DAG.getConstant(0, VT);
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2124	case ISD::SETULT:
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2125	case ISD::SETULE:
				2126	case ISD::SETNE: return DAG.getConstant(1, VT);
				2127	case ISD::SETGT:
				2128	case ISD::SETGE:
				2129	// True if the sign bit of C1 is set.
				2130	return DAG.getConstant(C1.isNegative(), VT);
				2131	case ISD::SETLT:
				2132	case ISD::SETLE:
				2133	// True if the sign bit of C1 isn't set.
				2134	return DAG.getConstant(C1.isNonNegative(), VT);
				2135	default:
Jakob Stoklund Olesen	78d1264	2009-07-24 18:22:59 +0000	[diff] [blame]	2136	break;
				2137	}
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2138	}
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2139
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2140	// Otherwise, we can perform the comparison with the low bits.
				2141	switch (Cond) {
				2142	case ISD::SETEQ:
				2143	case ISD::SETNE:
				2144	case ISD::SETUGT:
				2145	case ISD::SETUGE:
				2146	case ISD::SETULT:
				2147	case ISD::SETULE: {
Owen Anderson	e50ed30	2009-08-10 22:56:29 +0000	[diff] [blame]	2148	EVT newVT = N0.getOperand(0).getValueType();
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2149	if (DCI.isBeforeLegalizeOps() \|\|
				2150	(isOperationLegal(ISD::SETCC, newVT) &&
				2151	getCondCodeAction(Cond, newVT)==Legal))
				2152	return DAG.getSetCC(dl, VT, N0.getOperand(0),
Jay Foad	40f8f62	2010-12-07 08:25:19 +0000	[diff] [blame]	2153	DAG.getConstant(C1.trunc(InSize), newVT),
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2154	Cond);
				2155	break;
				2156	}
				2157	default:
				2158	break; // todo, be more careful with signed comparisons
				2159	}
				2160	} else if (N0.getOpcode() == ISD::SIGN_EXTEND_INREG &&
Evan Cheng	2c755ba	2010-02-27 07:36:59 +0000	[diff] [blame]	2161	(Cond == ISD::SETEQ \|\| Cond == ISD::SETNE)) {
Owen Anderson	e50ed30	2009-08-10 22:56:29 +0000	[diff] [blame]	2162	EVT ExtSrcTy = cast<VTSDNode>(N0.getOperand(1))->getVT();
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2163	unsigned ExtSrcTyBits = ExtSrcTy.getSizeInBits();
Owen Anderson	e50ed30	2009-08-10 22:56:29 +0000	[diff] [blame]	2164	EVT ExtDstTy = N0.getValueType();
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2165	unsigned ExtDstTyBits = ExtDstTy.getSizeInBits();
				2166
Eli Friedman	ad78a88	2010-07-30 06:44:31 +0000	[diff] [blame]	2167	// If the constant doesn't fit into the number of bits for the source of
				2168	// the sign extension, it is impossible for both sides to be equal.
				2169	if (C1.getMinSignedBits() > ExtSrcTyBits)
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2170	return DAG.getConstant(Cond == ISD::SETNE, VT);
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2171
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2172	SDValue ZextOp;
Owen Anderson	e50ed30	2009-08-10 22:56:29 +0000	[diff] [blame]	2173	EVT Op0Ty = N0.getOperand(0).getValueType();
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2174	if (Op0Ty == ExtSrcTy) {
				2175	ZextOp = N0.getOperand(0);
				2176	} else {
				2177	APInt Imm = APInt::getLowBitsSet(ExtDstTyBits, ExtSrcTyBits);
				2178	ZextOp = DAG.getNode(ISD::AND, dl, Op0Ty, N0.getOperand(0),
				2179	DAG.getConstant(Imm, Op0Ty));
				2180	}
				2181	if (!DCI.isCalledByLegalizer())
				2182	DCI.AddToWorklist(ZextOp.getNode());
				2183	// Otherwise, make this a use of a zext.
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2184	return DAG.getSetCC(dl, VT, ZextOp,
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2185	DAG.getConstant(C1 & APInt::getLowBitsSet(
				2186	ExtDstTyBits,
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2187	ExtSrcTyBits),
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2188	ExtDstTy),
				2189	Cond);
				2190	} else if ((N1C->isNullValue() \|\| N1C->getAPIntValue() == 1) &&
				2191	(Cond == ISD::SETEQ \|\| Cond == ISD::SETNE)) {
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2192	// SETCC (SETCC), [0\|1], [EQ\|NE] -> SETCC
Evan Cheng	2c755ba	2010-02-27 07:36:59 +0000	[diff] [blame]	2193	if (N0.getOpcode() == ISD::SETCC &&
				2194	isTypeLegal(VT) && VT.bitsLE(N0.getValueType())) {
Evan Cheng	347a9cb	2010-01-07 20:58:44 +0000	[diff] [blame]	2195	bool TrueWhenTrue = (Cond == ISD::SETEQ) ^ (N1C->getAPIntValue() != 1);
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2196	if (TrueWhenTrue)
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2197	return DAG.getNode(ISD::TRUNCATE, dl, VT, N0);
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2198	// Invert the condition.
				2199	ISD::CondCode CC = cast<CondCodeSDNode>(N0.getOperand(2))->get();
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2200	CC = ISD::getSetCCInverse(CC,
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2201	N0.getOperand(0).getValueType().isInteger());
				2202	return DAG.getSetCC(dl, VT, N0.getOperand(0), N0.getOperand(1), CC);
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2203	}
Evan Cheng	2c755ba	2010-02-27 07:36:59 +0000	[diff] [blame]	2204
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2205	if ((N0.getOpcode() == ISD::XOR \|\|
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2206	(N0.getOpcode() == ISD::AND &&
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2207	N0.getOperand(0).getOpcode() == ISD::XOR &&
				2208	N0.getOperand(1) == N0.getOperand(0).getOperand(1))) &&
				2209	isa<ConstantSDNode>(N0.getOperand(1)) &&
				2210	cast<ConstantSDNode>(N0.getOperand(1))->getAPIntValue() == 1) {
				2211	// If this is (X^1) == 0/1, swap the RHS and eliminate the xor. We
				2212	// can only do this if the top bits are known zero.
				2213	unsigned BitWidth = N0.getValueSizeInBits();
				2214	if (DAG.MaskedValueIsZero(N0,
				2215	APInt::getHighBitsSet(BitWidth,
				2216	BitWidth-1))) {
				2217	// Okay, get the un-inverted input value.
				2218	SDValue Val;
				2219	if (N0.getOpcode() == ISD::XOR)
				2220	Val = N0.getOperand(0);
				2221	else {
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2222	assert(N0.getOpcode() == ISD::AND &&
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2223	N0.getOperand(0).getOpcode() == ISD::XOR);
				2224	// ((X^1)&1)^1 -> X & 1
				2225	Val = DAG.getNode(ISD::AND, dl, N0.getValueType(),
				2226	N0.getOperand(0).getOperand(0),
				2227	N0.getOperand(1));
				2228	}
Evan Cheng	2c755ba	2010-02-27 07:36:59 +0000	[diff] [blame]	2229
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2230	return DAG.getSetCC(dl, VT, Val, N1,
				2231	Cond == ISD::SETEQ ? ISD::SETNE : ISD::SETEQ);
				2232	}
Evan Cheng	2c755ba	2010-02-27 07:36:59 +0000	[diff] [blame]	2233	} else if (N1C->getAPIntValue() == 1 &&
				2234	(VT == MVT::i1 \|\|
Duncan Sands	28b77e9	2011-09-06 19:07:46 +0000	[diff] [blame]	2235	getBooleanContents(false) == ZeroOrOneBooleanContent)) {
Evan Cheng	2c755ba	2010-02-27 07:36:59 +0000	[diff] [blame]	2236	SDValue Op0 = N0;
				2237	if (Op0.getOpcode() == ISD::TRUNCATE)
				2238	Op0 = Op0.getOperand(0);
				2239
				2240	if ((Op0.getOpcode() == ISD::XOR) &&
				2241	Op0.getOperand(0).getOpcode() == ISD::SETCC &&
				2242	Op0.getOperand(1).getOpcode() == ISD::SETCC) {
				2243	// (xor (setcc), (setcc)) == / != 1 -> (setcc) != / == (setcc)
				2244	Cond = (Cond == ISD::SETEQ) ? ISD::SETNE : ISD::SETEQ;
				2245	return DAG.getSetCC(dl, VT, Op0.getOperand(0), Op0.getOperand(1),
				2246	Cond);
				2247	} else if (Op0.getOpcode() == ISD::AND &&
				2248	isa<ConstantSDNode>(Op0.getOperand(1)) &&
				2249	cast<ConstantSDNode>(Op0.getOperand(1))->getAPIntValue() == 1) {
				2250	// If this is (X&1) == / != 1, normalize it to (X&1) != / == 0.
Anton Korobeynikov	17458a7	2010-05-01 12:52:34 +0000	[diff] [blame]	2251	if (Op0.getValueType().bitsGT(VT))
Evan Cheng	2c755ba	2010-02-27 07:36:59 +0000	[diff] [blame]	2252	Op0 = DAG.getNode(ISD::AND, dl, VT,
				2253	DAG.getNode(ISD::TRUNCATE, dl, VT, Op0.getOperand(0)),
				2254	DAG.getConstant(1, VT));
Anton Korobeynikov	17458a7	2010-05-01 12:52:34 +0000	[diff] [blame]	2255	else if (Op0.getValueType().bitsLT(VT))
				2256	Op0 = DAG.getNode(ISD::AND, dl, VT,
				2257	DAG.getNode(ISD::ANY_EXTEND, dl, VT, Op0.getOperand(0)),
				2258	DAG.getConstant(1, VT));
				2259
Evan Cheng	2c755ba	2010-02-27 07:36:59 +0000	[diff] [blame]	2260	return DAG.getSetCC(dl, VT, Op0,
				2261	DAG.getConstant(0, Op0.getValueType()),
				2262	Cond == ISD::SETEQ ? ISD::SETNE : ISD::SETEQ);
				2263	}
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2264	}
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2265	}
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2266
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2267	APInt MinVal, MaxVal;
				2268	unsigned OperandBitSize = N1C->getValueType(0).getSizeInBits();
				2269	if (ISD::isSignedIntSetCC(Cond)) {
				2270	MinVal = APInt::getSignedMinValue(OperandBitSize);
				2271	MaxVal = APInt::getSignedMaxValue(OperandBitSize);
				2272	} else {
				2273	MinVal = APInt::getMinValue(OperandBitSize);
				2274	MaxVal = APInt::getMaxValue(OperandBitSize);
				2275	}
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2276
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2277	// Canonicalize GE/LE comparisons to use GT/LT comparisons.
				2278	if (Cond == ISD::SETGE \|\| Cond == ISD::SETUGE) {
				2279	if (C1 == MinVal) return DAG.getConstant(1, VT); // X >= MIN --> true
				2280	// X >= C0 --> X > (C0-1)
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2281	return DAG.getSetCC(dl, VT, N0,
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2282	DAG.getConstant(C1-1, N1.getValueType()),
				2283	(Cond == ISD::SETGE) ? ISD::SETGT : ISD::SETUGT);
				2284	}
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2285
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2286	if (Cond == ISD::SETLE \|\| Cond == ISD::SETULE) {
				2287	if (C1 == MaxVal) return DAG.getConstant(1, VT); // X <= MAX --> true
				2288	// X <= C0 --> X < (C0+1)
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2289	return DAG.getSetCC(dl, VT, N0,
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2290	DAG.getConstant(C1+1, N1.getValueType()),
				2291	(Cond == ISD::SETLE) ? ISD::SETLT : ISD::SETULT);
				2292	}
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2293
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2294	if ((Cond == ISD::SETLT \|\| Cond == ISD::SETULT) && C1 == MinVal)
				2295	return DAG.getConstant(0, VT); // X < MIN --> false
				2296	if ((Cond == ISD::SETGE \|\| Cond == ISD::SETUGE) && C1 == MinVal)
				2297	return DAG.getConstant(1, VT); // X >= MIN --> true
				2298	if ((Cond == ISD::SETGT \|\| Cond == ISD::SETUGT) && C1 == MaxVal)
				2299	return DAG.getConstant(0, VT); // X > MAX --> false
				2300	if ((Cond == ISD::SETLE \|\| Cond == ISD::SETULE) && C1 == MaxVal)
				2301	return DAG.getConstant(1, VT); // X <= MAX --> true
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2302
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2303	// Canonicalize setgt X, Min --> setne X, Min
				2304	if ((Cond == ISD::SETGT \|\| Cond == ISD::SETUGT) && C1 == MinVal)
				2305	return DAG.getSetCC(dl, VT, N0, N1, ISD::SETNE);
				2306	// Canonicalize setlt X, Max --> setne X, Max
				2307	if ((Cond == ISD::SETLT \|\| Cond == ISD::SETULT) && C1 == MaxVal)
				2308	return DAG.getSetCC(dl, VT, N0, N1, ISD::SETNE);
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2309
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2310	// If we have setult X, 1, turn it into seteq X, 0
				2311	if ((Cond == ISD::SETLT \|\| Cond == ISD::SETULT) && C1 == MinVal+1)
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2312	return DAG.getSetCC(dl, VT, N0,
				2313	DAG.getConstant(MinVal, N0.getValueType()),
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2314	ISD::SETEQ);
				2315	// If we have setugt X, Max-1, turn it into seteq X, Max
				2316	else if ((Cond == ISD::SETGT \|\| Cond == ISD::SETUGT) && C1 == MaxVal-1)
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2317	return DAG.getSetCC(dl, VT, N0,
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2318	DAG.getConstant(MaxVal, N0.getValueType()),
				2319	ISD::SETEQ);
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2320
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2321	// If we have "setcc X, C0", check to see if we can shrink the immediate
				2322	// by changing cc.
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2323
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2324	// SETUGT X, SINTMAX -> SETLT X, 0
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2325	if (Cond == ISD::SETUGT &&
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2326	C1 == APInt::getSignedMaxValue(OperandBitSize))
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2327	return DAG.getSetCC(dl, VT, N0,
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2328	DAG.getConstant(0, N1.getValueType()),
				2329	ISD::SETLT);
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2330
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2331	// SETULT X, SINTMIN -> SETGT X, -1
				2332	if (Cond == ISD::SETULT &&
				2333	C1 == APInt::getSignedMinValue(OperandBitSize)) {
				2334	SDValue ConstMinusOne =
				2335	DAG.getConstant(APInt::getAllOnesValue(OperandBitSize),
				2336	N1.getValueType());
				2337	return DAG.getSetCC(dl, VT, N0, ConstMinusOne, ISD::SETGT);
				2338	}
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2339
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2340	// Fold bit comparisons when we can.
				2341	if ((Cond == ISD::SETEQ \|\| Cond == ISD::SETNE) &&
Evan Cheng	d40d03e	2010-01-06 19:38:29 +0000	[diff] [blame]	2342	(VT == N0.getValueType() \|\|
				2343	(isTypeLegal(VT) && VT.bitsLE(N0.getValueType()))) &&
				2344	N0.getOpcode() == ISD::AND)
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2345	if (ConstantSDNode *AndRHS =
				2346	dyn_cast<ConstantSDNode>(N0.getOperand(1))) {
Owen Anderson	e50ed30	2009-08-10 22:56:29 +0000	[diff] [blame]	2347	EVT ShiftTy = DCI.isBeforeLegalize() ?
Owen Anderson	95771af	2011-02-25 21:41:48 +0000	[diff] [blame]	2348	getPointerTy() : getShiftAmountTy(N0.getValueType());
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2349	if (Cond == ISD::SETNE && C1 == 0) {// (X & 8) != 0 --> (X & 8) >> 3
				2350	// Perform the xform if the AND RHS is a single bit.
Evan Cheng	347a9cb	2010-01-07 20:58:44 +0000	[diff] [blame]	2351	if (AndRHS->getAPIntValue().isPowerOf2()) {
Evan Cheng	d40d03e	2010-01-06 19:38:29 +0000	[diff] [blame]	2352	return DAG.getNode(ISD::TRUNCATE, dl, VT,
				2353	DAG.getNode(ISD::SRL, dl, N0.getValueType(), N0,
Evan Cheng	347a9cb	2010-01-07 20:58:44 +0000	[diff] [blame]	2354	DAG.getConstant(AndRHS->getAPIntValue().logBase2(), ShiftTy)));
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2355	}
Evan Cheng	347a9cb	2010-01-07 20:58:44 +0000	[diff] [blame]	2356	} else if (Cond == ISD::SETEQ && C1 == AndRHS->getAPIntValue()) {
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2357	// (X & 8) == 8 --> (X & 8) >> 3
				2358	// Perform the xform if C1 is a single bit.
				2359	if (C1.isPowerOf2()) {
Evan Cheng	d40d03e	2010-01-06 19:38:29 +0000	[diff] [blame]	2360	return DAG.getNode(ISD::TRUNCATE, dl, VT,
				2361	DAG.getNode(ISD::SRL, dl, N0.getValueType(), N0,
				2362	DAG.getConstant(C1.logBase2(), ShiftTy)));
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2363	}
				2364	}
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2365	}
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2366	}
				2367
Gabor Greif	ba36cb5	2008-08-28 21:40:38 +0000	[diff] [blame]	2368	if (isa<ConstantFPSDNode>(N0.getNode())) {
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2369	// Constant fold or commute setcc.
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	2370	SDValue O = DAG.FoldSetCC(VT, N0, N1, Cond, dl);
Gabor Greif	ba36cb5	2008-08-28 21:40:38 +0000	[diff] [blame]	2371	if (O.getNode()) return O;
				2372	} else if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1.getNode())) {
Chris Lattner	63079f0	2007-12-29 08:37:08 +0000	[diff] [blame]	2373	// If the RHS of an FP comparison is a constant, simplify it away in
				2374	// some cases.
				2375	if (CFP->getValueAPF().isNaN()) {
				2376	// If an operand is known to be a nan, we can fold it.
				2377	switch (ISD::getUnorderedFlavor(Cond)) {
Torok Edwin	c23197a	2009-07-14 16:55:14 +0000	[diff] [blame]	2378	default: llvm_unreachable("Unknown flavor!");
Chris Lattner	63079f0	2007-12-29 08:37:08 +0000	[diff] [blame]	2379	case 0: // Known false.
				2380	return DAG.getConstant(0, VT);
				2381	case 1: // Known true.
				2382	return DAG.getConstant(1, VT);
Chris Lattner	1c3e1e2	2007-12-30 21:21:10 +0000	[diff] [blame]	2383	case 2: // Undefined.
Dale Johannesen	e8d7230	2009-02-06 23:05:02 +0000	[diff] [blame]	2384	return DAG.getUNDEF(VT);
Chris Lattner	63079f0	2007-12-29 08:37:08 +0000	[diff] [blame]	2385	}
				2386	}
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2387
Chris Lattner	63079f0	2007-12-29 08:37:08 +0000	[diff] [blame]	2388	// Otherwise, we know the RHS is not a NaN. Simplify the node to drop the
				2389	// constant if knowing that the operand is non-nan is enough. We prefer to
				2390	// have SETO(x,x) instead of SETO(x, 0.0) because this avoids having to
				2391	// materialize 0.0.
				2392	if (Cond == ISD::SETO \|\| Cond == ISD::SETUO)
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	2393	return DAG.getSetCC(dl, VT, N0, N0, Cond);
Dan Gohman	11eab02	2009-09-26 15:24:17 +0000	[diff] [blame]	2394
				2395	// If the condition is not legal, see if we can find an equivalent one
				2396	// which is legal.
				2397	if (!isCondCodeLegal(Cond, N0.getValueType())) {
				2398	// If the comparison was an awkward floating-point == or != and one of
				2399	// the comparison operands is infinity or negative infinity, convert the
				2400	// condition to a less-awkward <= or >=.
				2401	if (CFP->getValueAPF().isInfinity()) {
				2402	if (CFP->getValueAPF().isNegative()) {
				2403	if (Cond == ISD::SETOEQ &&
				2404	isCondCodeLegal(ISD::SETOLE, N0.getValueType()))
				2405	return DAG.getSetCC(dl, VT, N0, N1, ISD::SETOLE);
				2406	if (Cond == ISD::SETUEQ &&
				2407	isCondCodeLegal(ISD::SETOLE, N0.getValueType()))
				2408	return DAG.getSetCC(dl, VT, N0, N1, ISD::SETULE);
				2409	if (Cond == ISD::SETUNE &&
				2410	isCondCodeLegal(ISD::SETUGT, N0.getValueType()))
				2411	return DAG.getSetCC(dl, VT, N0, N1, ISD::SETUGT);
				2412	if (Cond == ISD::SETONE &&
				2413	isCondCodeLegal(ISD::SETUGT, N0.getValueType()))
				2414	return DAG.getSetCC(dl, VT, N0, N1, ISD::SETOGT);
				2415	} else {
				2416	if (Cond == ISD::SETOEQ &&
				2417	isCondCodeLegal(ISD::SETOGE, N0.getValueType()))
				2418	return DAG.getSetCC(dl, VT, N0, N1, ISD::SETOGE);
				2419	if (Cond == ISD::SETUEQ &&
				2420	isCondCodeLegal(ISD::SETOGE, N0.getValueType()))
				2421	return DAG.getSetCC(dl, VT, N0, N1, ISD::SETUGE);
				2422	if (Cond == ISD::SETUNE &&
				2423	isCondCodeLegal(ISD::SETULT, N0.getValueType()))
				2424	return DAG.getSetCC(dl, VT, N0, N1, ISD::SETULT);
				2425	if (Cond == ISD::SETONE &&
				2426	isCondCodeLegal(ISD::SETULT, N0.getValueType()))
				2427	return DAG.getSetCC(dl, VT, N0, N1, ISD::SETOLT);
				2428	}
				2429	}
				2430	}
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2431	}
				2432
				2433	if (N0 == N1) {
				2434	// We can always fold X == X for integer setcc's.
Duncan Sands	83ec4b6	2008-06-06 12:08:01 +0000	[diff] [blame]	2435	if (N0.getValueType().isInteger())
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2436	return DAG.getConstant(ISD::isTrueWhenEqual(Cond), VT);
				2437	unsigned UOF = ISD::getUnorderedFlavor(Cond);
				2438	if (UOF == 2) // FP operators that are undefined on NaNs.
				2439	return DAG.getConstant(ISD::isTrueWhenEqual(Cond), VT);
				2440	if (UOF == unsigned(ISD::isTrueWhenEqual(Cond)))
				2441	return DAG.getConstant(UOF, VT);
				2442	// Otherwise, we can't fold it. However, we can simplify it to SETUO/SETO
				2443	// if it is not already.
				2444	ISD::CondCode NewCond = UOF == 0 ? ISD::SETO : ISD::SETUO;
				2445	if (NewCond != Cond)
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	2446	return DAG.getSetCC(dl, VT, N0, N1, NewCond);
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2447	}
				2448
				2449	if ((Cond == ISD::SETEQ \|\| Cond == ISD::SETNE) &&
Duncan Sands	83ec4b6	2008-06-06 12:08:01 +0000	[diff] [blame]	2450	N0.getValueType().isInteger()) {
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2451	if (N0.getOpcode() == ISD::ADD \|\| N0.getOpcode() == ISD::SUB \|\|
				2452	N0.getOpcode() == ISD::XOR) {
				2453	// Simplify (X+Y) == (X+Z) --> Y == Z
				2454	if (N0.getOpcode() == N1.getOpcode()) {
				2455	if (N0.getOperand(0) == N1.getOperand(0))
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	2456	return DAG.getSetCC(dl, VT, N0.getOperand(1), N1.getOperand(1), Cond);
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2457	if (N0.getOperand(1) == N1.getOperand(1))
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	2458	return DAG.getSetCC(dl, VT, N0.getOperand(0), N1.getOperand(0), Cond);
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2459	if (DAG.isCommutativeBinOp(N0.getOpcode())) {
				2460	// If X op Y == Y op X, try other combinations.
				2461	if (N0.getOperand(0) == N1.getOperand(1))
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2462	return DAG.getSetCC(dl, VT, N0.getOperand(1), N1.getOperand(0),
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	2463	Cond);
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2464	if (N0.getOperand(1) == N1.getOperand(0))
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2465	return DAG.getSetCC(dl, VT, N0.getOperand(0), N1.getOperand(1),
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	2466	Cond);
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2467	}
				2468	}
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2469
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2470	if (ConstantSDNode *RHSC = dyn_cast<ConstantSDNode>(N1)) {
				2471	if (ConstantSDNode *LHSR = dyn_cast<ConstantSDNode>(N0.getOperand(1))) {
				2472	// Turn (X+C1) == C2 --> X == C2-C1
Gabor Greif	ba36cb5	2008-08-28 21:40:38 +0000	[diff] [blame]	2473	if (N0.getOpcode() == ISD::ADD && N0.getNode()->hasOneUse()) {
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	2474	return DAG.getSetCC(dl, VT, N0.getOperand(0),
Dan Gohman	f5aeb1a	2008-09-12 16:56:44 +0000	[diff] [blame]	2475	DAG.getConstant(RHSC->getAPIntValue()-
				2476	LHSR->getAPIntValue(),
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2477	N0.getValueType()), Cond);
				2478	}
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2479
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2480	// Turn (X^C1) == C2 into X == C1^C2 iff X&~C1 = 0.
				2481	if (N0.getOpcode() == ISD::XOR)
				2482	// If we know that all of the inverted bits are zero, don't bother
				2483	// performing the inversion.
Dan Gohman	2e68b6f	2008-02-25 21:11:39 +0000	[diff] [blame]	2484	if (DAG.MaskedValueIsZero(N0.getOperand(0), ~LHSR->getAPIntValue()))
				2485	return
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	2486	DAG.getSetCC(dl, VT, N0.getOperand(0),
Dan Gohman	2e68b6f	2008-02-25 21:11:39 +0000	[diff] [blame]	2487	DAG.getConstant(LHSR->getAPIntValue() ^
				2488	RHSC->getAPIntValue(),
				2489	N0.getValueType()),
				2490	Cond);
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2491	}
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2492
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2493	// Turn (C1-X) == C2 --> X == C1-C2
				2494	if (ConstantSDNode *SUBC = dyn_cast<ConstantSDNode>(N0.getOperand(0))) {
Gabor Greif	ba36cb5	2008-08-28 21:40:38 +0000	[diff] [blame]	2495	if (N0.getOpcode() == ISD::SUB && N0.getNode()->hasOneUse()) {
Dan Gohman	2e68b6f	2008-02-25 21:11:39 +0000	[diff] [blame]	2496	return
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	2497	DAG.getSetCC(dl, VT, N0.getOperand(1),
Dan Gohman	2e68b6f	2008-02-25 21:11:39 +0000	[diff] [blame]	2498	DAG.getConstant(SUBC->getAPIntValue() -
				2499	RHSC->getAPIntValue(),
				2500	N0.getValueType()),
				2501	Cond);
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2502	}
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2503	}
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2504	}
				2505
				2506	// Simplify (X+Z) == X --> Z == 0
				2507	if (N0.getOperand(0) == N1)
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	2508	return DAG.getSetCC(dl, VT, N0.getOperand(1),
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2509	DAG.getConstant(0, N0.getValueType()), Cond);
				2510	if (N0.getOperand(1) == N1) {
				2511	if (DAG.isCommutativeBinOp(N0.getOpcode()))
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	2512	return DAG.getSetCC(dl, VT, N0.getOperand(0),
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2513	DAG.getConstant(0, N0.getValueType()), Cond);
Gabor Greif	ba36cb5	2008-08-28 21:40:38 +0000	[diff] [blame]	2514	else if (N0.getNode()->hasOneUse()) {
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2515	assert(N0.getOpcode() == ISD::SUB && "Unexpected operation!");
				2516	// (Z-X) == X --> Z == X<<1
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	2517	SDValue SH = DAG.getNode(ISD::SHL, dl, N1.getValueType(),
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2518	N1,
Owen Anderson	95771af	2011-02-25 21:41:48 +0000	[diff] [blame]	2519	DAG.getConstant(1, getShiftAmountTy(N1.getValueType())));
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2520	if (!DCI.isCalledByLegalizer())
Gabor Greif	ba36cb5	2008-08-28 21:40:38 +0000	[diff] [blame]	2521	DCI.AddToWorklist(SH.getNode());
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	2522	return DAG.getSetCC(dl, VT, N0.getOperand(0), SH, Cond);
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2523	}
				2524	}
				2525	}
				2526
				2527	if (N1.getOpcode() == ISD::ADD \|\| N1.getOpcode() == ISD::SUB \|\|
				2528	N1.getOpcode() == ISD::XOR) {
				2529	// Simplify X == (X+Z) --> Z == 0
				2530	if (N1.getOperand(0) == N0) {
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	2531	return DAG.getSetCC(dl, VT, N1.getOperand(1),
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2532	DAG.getConstant(0, N1.getValueType()), Cond);
				2533	} else if (N1.getOperand(1) == N0) {
				2534	if (DAG.isCommutativeBinOp(N1.getOpcode())) {
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	2535	return DAG.getSetCC(dl, VT, N1.getOperand(0),
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2536	DAG.getConstant(0, N1.getValueType()), Cond);
Gabor Greif	ba36cb5	2008-08-28 21:40:38 +0000	[diff] [blame]	2537	} else if (N1.getNode()->hasOneUse()) {
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2538	assert(N1.getOpcode() == ISD::SUB && "Unexpected operation!");
				2539	// X == (Z-X) --> X<<1 == Z
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2540	SDValue SH = DAG.getNode(ISD::SHL, dl, N1.getValueType(), N0,
Owen Anderson	95771af	2011-02-25 21:41:48 +0000	[diff] [blame]	2541	DAG.getConstant(1, getShiftAmountTy(N0.getValueType())));
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2542	if (!DCI.isCalledByLegalizer())
Gabor Greif	ba36cb5	2008-08-28 21:40:38 +0000	[diff] [blame]	2543	DCI.AddToWorklist(SH.getNode());
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	2544	return DAG.getSetCC(dl, VT, SH, N1.getOperand(0), Cond);
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2545	}
				2546	}
				2547	}
Dan Gohman	e5af2d3	2009-01-29 01:59:02 +0000	[diff] [blame]	2548
Dan Gohman	2c65c3d	2009-01-29 16:18:12 +0000	[diff] [blame]	2549	// Simplify x&y == y to x&y != 0 if y has exactly one bit set.
Dale Johannesen	85b0ede	2009-02-11 19:19:41 +0000	[diff] [blame]	2550	// Note that where y is variable and is known to have at most
				2551	// one bit set (for example, if it is z&1) we cannot do this;
				2552	// the expressions are not equivalent when y==0.
Dan Gohman	e5af2d3	2009-01-29 01:59:02 +0000	[diff] [blame]	2553	if (N0.getOpcode() == ISD::AND)
				2554	if (N0.getOperand(0) == N1 \|\| N0.getOperand(1) == N1) {
Dale Johannesen	85b0ede	2009-02-11 19:19:41 +0000	[diff] [blame]	2555	if (ValueHasExactlyOneBitSet(N1, DAG)) {
Dan Gohman	e5af2d3	2009-01-29 01:59:02 +0000	[diff] [blame]	2556	Cond = ISD::getSetCCInverse(Cond, /isInteger=/true);
				2557	SDValue Zero = DAG.getConstant(0, N1.getValueType());
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	2558	return DAG.getSetCC(dl, VT, N0, Zero, Cond);
Dan Gohman	e5af2d3	2009-01-29 01:59:02 +0000	[diff] [blame]	2559	}
				2560	}
				2561	if (N1.getOpcode() == ISD::AND)
				2562	if (N1.getOperand(0) == N0 \|\| N1.getOperand(1) == N0) {
Dale Johannesen	85b0ede	2009-02-11 19:19:41 +0000	[diff] [blame]	2563	if (ValueHasExactlyOneBitSet(N0, DAG)) {
Dan Gohman	e5af2d3	2009-01-29 01:59:02 +0000	[diff] [blame]	2564	Cond = ISD::getSetCCInverse(Cond, /isInteger=/true);
				2565	SDValue Zero = DAG.getConstant(0, N0.getValueType());
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	2566	return DAG.getSetCC(dl, VT, N1, Zero, Cond);
Dan Gohman	e5af2d3	2009-01-29 01:59:02 +0000	[diff] [blame]	2567	}
				2568	}
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2569	}
				2570
				2571	// Fold away ALL boolean setcc's.
Dan Gohman	475871a	2008-07-27 21:46:04 +0000	[diff] [blame]	2572	SDValue Temp;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	2573	if (N0.getValueType() == MVT::i1 && foldBooleans) {
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2574	switch (Cond) {
Torok Edwin	c23197a	2009-07-14 16:55:14 +0000	[diff] [blame]	2575	default: llvm_unreachable("Unknown integer setcc!");
Bob Wilson	4c24546	2009-01-22 17:39:32 +0000	[diff] [blame]	2576	case ISD::SETEQ: // X == Y -> ~(X^Y)
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	2577	Temp = DAG.getNode(ISD::XOR, dl, MVT::i1, N0, N1);
				2578	N0 = DAG.getNOT(dl, Temp, MVT::i1);
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2579	if (!DCI.isCalledByLegalizer())
Gabor Greif	ba36cb5	2008-08-28 21:40:38 +0000	[diff] [blame]	2580	DCI.AddToWorklist(Temp.getNode());
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2581	break;
				2582	case ISD::SETNE: // X != Y --> (X^Y)
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	2583	N0 = DAG.getNode(ISD::XOR, dl, MVT::i1, N0, N1);
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2584	break;
Bob Wilson	4c24546	2009-01-22 17:39:32 +0000	[diff] [blame]	2585	case ISD::SETGT: // X >s Y --> X == 0 & Y == 1 --> ~X & Y
				2586	case ISD::SETULT: // X <u Y --> X == 0 & Y == 1 --> ~X & Y
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	2587	Temp = DAG.getNOT(dl, N0, MVT::i1);
				2588	N0 = DAG.getNode(ISD::AND, dl, MVT::i1, N1, Temp);
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2589	if (!DCI.isCalledByLegalizer())
Gabor Greif	ba36cb5	2008-08-28 21:40:38 +0000	[diff] [blame]	2590	DCI.AddToWorklist(Temp.getNode());
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2591	break;
Bob Wilson	4c24546	2009-01-22 17:39:32 +0000	[diff] [blame]	2592	case ISD::SETLT: // X <s Y --> X == 1 & Y == 0 --> ~Y & X
				2593	case ISD::SETUGT: // X >u Y --> X == 1 & Y == 0 --> ~Y & X
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	2594	Temp = DAG.getNOT(dl, N1, MVT::i1);
				2595	N0 = DAG.getNode(ISD::AND, dl, MVT::i1, N0, Temp);
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2596	if (!DCI.isCalledByLegalizer())
Gabor Greif	ba36cb5	2008-08-28 21:40:38 +0000	[diff] [blame]	2597	DCI.AddToWorklist(Temp.getNode());
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2598	break;
Bob Wilson	4c24546	2009-01-22 17:39:32 +0000	[diff] [blame]	2599	case ISD::SETULE: // X <=u Y --> X == 0 \| Y == 1 --> ~X \| Y
				2600	case ISD::SETGE: // X >=s Y --> X == 0 \| Y == 1 --> ~X \| Y
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	2601	Temp = DAG.getNOT(dl, N0, MVT::i1);
				2602	N0 = DAG.getNode(ISD::OR, dl, MVT::i1, N1, Temp);
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2603	if (!DCI.isCalledByLegalizer())
Gabor Greif	ba36cb5	2008-08-28 21:40:38 +0000	[diff] [blame]	2604	DCI.AddToWorklist(Temp.getNode());
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2605	break;
Bob Wilson	4c24546	2009-01-22 17:39:32 +0000	[diff] [blame]	2606	case ISD::SETUGE: // X >=u Y --> X == 1 \| Y == 0 --> ~Y \| X
				2607	case ISD::SETLE: // X <=s Y --> X == 1 \| Y == 0 --> ~Y \| X
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	2608	Temp = DAG.getNOT(dl, N1, MVT::i1);
				2609	N0 = DAG.getNode(ISD::OR, dl, MVT::i1, N0, Temp);
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2610	break;
				2611	}
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	2612	if (VT != MVT::i1) {
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2613	if (!DCI.isCalledByLegalizer())
Gabor Greif	ba36cb5	2008-08-28 21:40:38 +0000	[diff] [blame]	2614	DCI.AddToWorklist(N0.getNode());
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2615	// FIXME: If running after legalize, we probably can't do this.
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	2616	N0 = DAG.getNode(ISD::ZERO_EXTEND, dl, VT, N0);
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2617	}
				2618	return N0;
				2619	}
				2620
				2621	// Could not fold it.
Dan Gohman	475871a	2008-07-27 21:46:04 +0000	[diff] [blame]	2622	return SDValue();
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2623	}
				2624
Evan Cheng	ad4196b	2008-05-12 19:56:52 +0000	[diff] [blame]	2625	/// isGAPlusOffset - Returns true (and the GlobalValue and the offset) if the
				2626	/// node is a GlobalAddress + offset.
Chris Lattner	0a9481f	2011-02-13 22:25:43 +0000	[diff] [blame]	2627	bool TargetLowering::isGAPlusOffset(SDNode N, const GlobalValue &GA,
Evan Cheng	ad4196b	2008-05-12 19:56:52 +0000	[diff] [blame]	2628	int64_t &Offset) const {
				2629	if (isa<GlobalAddressSDNode>(N)) {
Dan Gohman	9ea3f56	2008-06-09 22:05:52 +0000	[diff] [blame]	2630	GlobalAddressSDNode *GASD = cast<GlobalAddressSDNode>(N);
				2631	GA = GASD->getGlobal();
				2632	Offset += GASD->getOffset();
Evan Cheng	ad4196b	2008-05-12 19:56:52 +0000	[diff] [blame]	2633	return true;
				2634	}
				2635
				2636	if (N->getOpcode() == ISD::ADD) {
Dan Gohman	475871a	2008-07-27 21:46:04 +0000	[diff] [blame]	2637	SDValue N1 = N->getOperand(0);
				2638	SDValue N2 = N->getOperand(1);
Gabor Greif	ba36cb5	2008-08-28 21:40:38 +0000	[diff] [blame]	2639	if (isGAPlusOffset(N1.getNode(), GA, Offset)) {
Evan Cheng	ad4196b	2008-05-12 19:56:52 +0000	[diff] [blame]	2640	ConstantSDNode *V = dyn_cast<ConstantSDNode>(N2);
				2641	if (V) {
Dan Gohman	7810bfe	2008-09-26 21:54:37 +0000	[diff] [blame]	2642	Offset += V->getSExtValue();
Evan Cheng	ad4196b	2008-05-12 19:56:52 +0000	[diff] [blame]	2643	return true;
				2644	}
Gabor Greif	ba36cb5	2008-08-28 21:40:38 +0000	[diff] [blame]	2645	} else if (isGAPlusOffset(N2.getNode(), GA, Offset)) {
Evan Cheng	ad4196b	2008-05-12 19:56:52 +0000	[diff] [blame]	2646	ConstantSDNode *V = dyn_cast<ConstantSDNode>(N1);
				2647	if (V) {
Dan Gohman	7810bfe	2008-09-26 21:54:37 +0000	[diff] [blame]	2648	Offset += V->getSExtValue();
Evan Cheng	ad4196b	2008-05-12 19:56:52 +0000	[diff] [blame]	2649	return true;
				2650	}
				2651	}
				2652	}
Owen Anderson	95771af	2011-02-25 21:41:48 +0000	[diff] [blame]	2653
Evan Cheng	ad4196b	2008-05-12 19:56:52 +0000	[diff] [blame]	2654	return false;
				2655	}
				2656
				2657
Dan Gohman	475871a	2008-07-27 21:46:04 +0000	[diff] [blame]	2658	SDValue TargetLowering::
Chris Lattner	00ffed0	2006-03-01 04:52:55 +0000	[diff] [blame]	2659	PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const {
				2660	// Default implementation: no optimization.
Dan Gohman	475871a	2008-07-27 21:46:04 +0000	[diff] [blame]	2661	return SDValue();
Chris Lattner	00ffed0	2006-03-01 04:52:55 +0000	[diff] [blame]	2662	}
				2663
Chris Lattner	eb8146b	2006-02-04 02:13:02 +0000	[diff] [blame]	2664	//===----------------------------------------------------------------------===//
				2665	// Inline Assembler Implementation Methods
				2666	//===----------------------------------------------------------------------===//
				2667
Chris Lattner	4376fea	2008-04-27 00:09:47 +0000	[diff] [blame]	2668
Chris Lattner	eb8146b	2006-02-04 02:13:02 +0000	[diff] [blame]	2669	TargetLowering::ConstraintType
Chris Lattner	4234f57	2007-03-25 02:14:49 +0000	[diff] [blame]	2670	TargetLowering::getConstraintType(const std::string &Constraint) const {
Chris Lattner	4234f57	2007-03-25 02:14:49 +0000	[diff] [blame]	2671	if (Constraint.size() == 1) {
				2672	switch (Constraint[0]) {
				2673	default: break;
				2674	case 'r': return C_RegisterClass;
				2675	case 'm': // memory
				2676	case 'o': // offsetable
				2677	case 'V': // not offsetable
				2678	return C_Memory;
				2679	case 'i': // Simple Integer or Relocatable Constant
				2680	case 'n': // Simple Integer
John Thompson	67aff16	2010-09-21 22:04:54 +0000	[diff] [blame]	2681	case 'E': // Floating Point Constant
				2682	case 'F': // Floating Point Constant
Chris Lattner	4234f57	2007-03-25 02:14:49 +0000	[diff] [blame]	2683	case 's': // Relocatable Constant
John Thompson	67aff16	2010-09-21 22:04:54 +0000	[diff] [blame]	2684	case 'p': // Address.
Chris Lattner	c13dd1c	2007-03-25 04:35:41 +0000	[diff] [blame]	2685	case 'X': // Allow ANY value.
Chris Lattner	4234f57	2007-03-25 02:14:49 +0000	[diff] [blame]	2686	case 'I': // Target registers.
				2687	case 'J':
				2688	case 'K':
				2689	case 'L':
				2690	case 'M':
				2691	case 'N':
				2692	case 'O':
				2693	case 'P':
John Thompson	67aff16	2010-09-21 22:04:54 +0000	[diff] [blame]	2694	case '<':
				2695	case '>':
Chris Lattner	4234f57	2007-03-25 02:14:49 +0000	[diff] [blame]	2696	return C_Other;
				2697	}
Chris Lattner	eb8146b	2006-02-04 02:13:02 +0000	[diff] [blame]	2698	}
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2699
				2700	if (Constraint.size() > 1 && Constraint[0] == '{' &&
Chris Lattner	065421f	2007-03-25 02:18:14 +0000	[diff] [blame]	2701	Constraint[Constraint.size()-1] == '}')
				2702	return C_Register;
Chris Lattner	4234f57	2007-03-25 02:14:49 +0000	[diff] [blame]	2703	return C_Unknown;
Chris Lattner	eb8146b	2006-02-04 02:13:02 +0000	[diff] [blame]	2704	}
				2705
Dale Johannesen	ba2a0b9	2008-01-29 02:21:21 +0000	[diff] [blame]	2706	/// LowerXConstraint - try to replace an X constraint, which matches anything,
				2707	/// with another that has more specific requirements based on the type of the
				2708	/// corresponding operand.
Owen Anderson	e50ed30	2009-08-10 22:56:29 +0000	[diff] [blame]	2709	const char *TargetLowering::LowerXConstraint(EVT ConstraintVT) const{
Duncan Sands	83ec4b6	2008-06-06 12:08:01 +0000	[diff] [blame]	2710	if (ConstraintVT.isInteger())
Chris Lattner	5e76423	2008-04-26 23:02:14 +0000	[diff] [blame]	2711	return "r";
Duncan Sands	83ec4b6	2008-06-06 12:08:01 +0000	[diff] [blame]	2712	if (ConstraintVT.isFloatingPoint())
Chris Lattner	5e76423	2008-04-26 23:02:14 +0000	[diff] [blame]	2713	return "f"; // works for many targets
				2714	return 0;
Dale Johannesen	ba2a0b9	2008-01-29 02:21:21 +0000	[diff] [blame]	2715	}
				2716
Chris Lattner	48884cd	2007-08-25 00:47:38 +0000	[diff] [blame]	2717	/// LowerAsmOperandForConstraint - Lower the specified operand into the Ops
				2718	/// vector. If it is invalid, don't add anything to Ops.
Dan Gohman	475871a	2008-07-27 21:46:04 +0000	[diff] [blame]	2719	void TargetLowering::LowerAsmOperandForConstraint(SDValue Op,
Eric Christopher	100c833	2011-06-02 23:16:42 +0000	[diff] [blame]	2720	std::string &Constraint,
Dan Gohman	475871a	2008-07-27 21:46:04 +0000	[diff] [blame]	2721	std::vector<SDValue> &Ops,
Chris Lattner	5e76423	2008-04-26 23:02:14 +0000	[diff] [blame]	2722	SelectionDAG &DAG) const {
Eric Christopher	362fee9	2011-06-17 20:41:29 +0000	[diff] [blame]	2723
Eric Christopher	100c833	2011-06-02 23:16:42 +0000	[diff] [blame]	2724	if (Constraint.length() > 1) return;
Eric Christopher	362fee9	2011-06-17 20:41:29 +0000	[diff] [blame]	2725
Eric Christopher	100c833	2011-06-02 23:16:42 +0000	[diff] [blame]	2726	char ConstraintLetter = Constraint[0];
Chris Lattner	eb8146b	2006-02-04 02:13:02 +0000	[diff] [blame]	2727	switch (ConstraintLetter) {
Chris Lattner	9ff6ee8	2007-02-17 06:00:35 +0000	[diff] [blame]	2728	default: break;
Dale Johannesen	eb57ea7	2007-11-05 21:20:28 +0000	[diff] [blame]	2729	case 'X': // Allows any operand; labels (basic block) use this.
				2730	if (Op.getOpcode() == ISD::BasicBlock) {
				2731	Ops.push_back(Op);
				2732	return;
				2733	}
				2734	// fall through
Chris Lattner	eb8146b	2006-02-04 02:13:02 +0000	[diff] [blame]	2735	case 'i': // Simple Integer or Relocatable Constant
				2736	case 'n': // Simple Integer
Dale Johannesen	eb57ea7	2007-11-05 21:20:28 +0000	[diff] [blame]	2737	case 's': { // Relocatable Constant
Chris Lattner	75c7d2b	2007-05-03 16:54:34 +0000	[diff] [blame]	2738	// These operands are interested in values of the form (GV+C), where C may
				2739	// be folded in as an offset of GV, or it may be explicitly added. Also, it
				2740	// is possible and fine if either GV or C are missing.
				2741	ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op);
				2742	GlobalAddressSDNode *GA = dyn_cast<GlobalAddressSDNode>(Op);
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2743
Chris Lattner	75c7d2b	2007-05-03 16:54:34 +0000	[diff] [blame]	2744	// If we have "(add GV, C)", pull out GV/C
				2745	if (Op.getOpcode() == ISD::ADD) {
				2746	C = dyn_cast<ConstantSDNode>(Op.getOperand(1));
				2747	GA = dyn_cast<GlobalAddressSDNode>(Op.getOperand(0));
				2748	if (C == 0 \|\| GA == 0) {
				2749	C = dyn_cast<ConstantSDNode>(Op.getOperand(0));
				2750	GA = dyn_cast<GlobalAddressSDNode>(Op.getOperand(1));
				2751	}
				2752	if (C == 0 \|\| GA == 0)
				2753	C = 0, GA = 0;
				2754	}
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2755
Chris Lattner	75c7d2b	2007-05-03 16:54:34 +0000	[diff] [blame]	2756	// If we find a valid operand, map to the TargetXXX version so that the
				2757	// value itself doesn't get selected.
				2758	if (GA) { // Either &GV or &GV+C
				2759	if (ConstraintLetter != 'n') {
				2760	int64_t Offs = GA->getOffset();
Dan Gohman	f5aeb1a	2008-09-12 16:56:44 +0000	[diff] [blame]	2761	if (C) Offs += C->getZExtValue();
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2762	Ops.push_back(DAG.getTargetGlobalAddress(GA->getGlobal(),
Devang Patel	07538ad	2010-07-15 18:45:27 +0000	[diff] [blame]	2763	C ? C->getDebugLoc() : DebugLoc(),
Chris Lattner	48884cd	2007-08-25 00:47:38 +0000	[diff] [blame]	2764	Op.getValueType(), Offs));
				2765	return;
Chris Lattner	75c7d2b	2007-05-03 16:54:34 +0000	[diff] [blame]	2766	}
				2767	}
				2768	if (C) { // just C, no GV.
Chris Lattner	9ff6ee8	2007-02-17 06:00:35 +0000	[diff] [blame]	2769	// Simple constants are not allowed for 's'.
Chris Lattner	48884cd	2007-08-25 00:47:38 +0000	[diff] [blame]	2770	if (ConstraintLetter != 's') {
Dale Johannesen	78e3e52	2009-02-12 20:58:09 +0000	[diff] [blame]	2771	// gcc prints these as sign extended. Sign extend value to 64 bits
				2772	// now; without this it would get ZExt'd later in
				2773	// ScheduleDAGSDNodes::EmitNode, which is very generic.
				2774	Ops.push_back(DAG.getTargetConstant(C->getAPIntValue().getSExtValue(),
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	2775	MVT::i64));
Chris Lattner	48884cd	2007-08-25 00:47:38 +0000	[diff] [blame]	2776	return;
				2777	}
Chris Lattner	9ff6ee8	2007-02-17 06:00:35 +0000	[diff] [blame]	2778	}
Chris Lattner	9ff6ee8	2007-02-17 06:00:35 +0000	[diff] [blame]	2779	break;
Chris Lattner	eb8146b	2006-02-04 02:13:02 +0000	[diff] [blame]	2780	}
Chris Lattner	75c7d2b	2007-05-03 16:54:34 +0000	[diff] [blame]	2781	}
Chris Lattner	eb8146b	2006-02-04 02:13:02 +0000	[diff] [blame]	2782	}
				2783
Chris Lattner	1efa40f	2006-02-22 00:56:39 +0000	[diff] [blame]	2784	std::pair<unsigned, const TargetRegisterClass*> TargetLowering::
Chris Lattner	4217ca8dc	2006-02-21 23:11:00 +0000	[diff] [blame]	2785	getRegForInlineAsmConstraint(const std::string &Constraint,
Owen Anderson	e50ed30	2009-08-10 22:56:29 +0000	[diff] [blame]	2786	EVT VT) const {
Chris Lattner	1efa40f	2006-02-22 00:56:39 +0000	[diff] [blame]	2787	if (Constraint[0] != '{')
Douglas Gregor	7d9663c	2010-05-11 06:17:44 +0000	[diff] [blame]	2788	return std::make_pair(0u, static_cast<TargetRegisterClass*>(0));
Chris Lattner	a55079a	2006-02-01 01:29:47 +0000	[diff] [blame]	2789	assert(*(Constraint.end()-1) == '}' && "Not a brace enclosed constraint?");
				2790
				2791	// Remove the braces from around the name.
Benjamin Kramer	05872ea	2009-11-12 20:36:59 +0000	[diff] [blame]	2792	StringRef RegName(Constraint.data()+1, Constraint.size()-2);
Chris Lattner	1efa40f	2006-02-22 00:56:39 +0000	[diff] [blame]	2793
				2794	// Figure out which register class contains this reg.
Dan Gohman	6f0d024	2008-02-10 18:45:23 +0000	[diff] [blame]	2795	const TargetRegisterInfo *RI = TM.getRegisterInfo();
				2796	for (TargetRegisterInfo::regclass_iterator RCI = RI->regclass_begin(),
Chris Lattner	1efa40f	2006-02-22 00:56:39 +0000	[diff] [blame]	2797	E = RI->regclass_end(); RCI != E; ++RCI) {
				2798	const TargetRegisterClass RC = RCI;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2799
				2800	// If none of the value types for this register class are valid, we
Chris Lattner	b3befd4	2006-02-22 23:00:51 +0000	[diff] [blame]	2801	// can't use it. For example, 64-bit reg classes on 32-bit targets.
Jakob Stoklund Olesen	22e8a36	2011-10-12 01:24:51 +0000	[diff] [blame]	2802	if (!isLegalRC(RC))
				2803	continue;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2804
				2805	for (TargetRegisterClass::iterator I = RC->begin(), E = RC->end();
Chris Lattner	1efa40f	2006-02-22 00:56:39 +0000	[diff] [blame]	2806	I != E; ++I) {
Benjamin Kramer	05872ea	2009-11-12 20:36:59 +0000	[diff] [blame]	2807	if (RegName.equals_lower(RI->getName(*I)))
Chris Lattner	1efa40f	2006-02-22 00:56:39 +0000	[diff] [blame]	2808	return std::make_pair(*I, RC);
Chris Lattner	1efa40f	2006-02-22 00:56:39 +0000	[diff] [blame]	2809	}
Chris Lattner	4ccb070	2006-01-26 20:37:03 +0000	[diff] [blame]	2810	}
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2811
Douglas Gregor	7d9663c	2010-05-11 06:17:44 +0000	[diff] [blame]	2812	return std::make_pair(0u, static_cast<const TargetRegisterClass*>(0));
Chris Lattner	4ccb070	2006-01-26 20:37:03 +0000	[diff] [blame]	2813	}
Evan Cheng	30b37b5	2006-03-13 23:18:16 +0000	[diff] [blame]	2814
				2815	//===----------------------------------------------------------------------===//
Chris Lattner	4376fea	2008-04-27 00:09:47 +0000	[diff] [blame]	2816	// Constraint Selection.
				2817
Chris Lattner	6bdcda3	2008-10-17 16:47:46 +0000	[diff] [blame]	2818	/// isMatchingInputConstraint - Return true of this is an input operand that is
				2819	/// a matching constraint like "4".
				2820	bool TargetLowering::AsmOperandInfo::isMatchingInputConstraint() const {
Chris Lattner	58f15c4	2008-10-17 16:21:11 +0000	[diff] [blame]	2821	assert(!ConstraintCode.empty() && "No known constraint!");
				2822	return isdigit(ConstraintCode[0]);
				2823	}
				2824
				2825	/// getMatchedOperand - If this is an input matching constraint, this method
				2826	/// returns the output operand it matches.
				2827	unsigned TargetLowering::AsmOperandInfo::getMatchedOperand() const {
				2828	assert(!ConstraintCode.empty() && "No known constraint!");
				2829	return atoi(ConstraintCode.c_str());
				2830	}
				2831
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2832
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	2833	/// ParseConstraints - Split up the constraint string from the inline
				2834	/// assembly value into the specific constraints and their prefixes,
				2835	/// and also tie in the associated operand values.
				2836	/// If this returns an empty vector, and if the constraint string itself
				2837	/// isn't empty, there was an error parsing.
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	2838	TargetLowering::AsmOperandInfoVector TargetLowering::ParseConstraints(
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	2839	ImmutableCallSite CS) const {
				2840	/// ConstraintOperands - Information about all of the constraints.
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	2841	AsmOperandInfoVector ConstraintOperands;
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	2842	const InlineAsm *IA = cast<InlineAsm>(CS.getCalledValue());
John Thompson	67aff16	2010-09-21 22:04:54 +0000	[diff] [blame]	2843	unsigned maCount = 0; // Largest number of multiple alternative constraints.
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	2844
				2845	// Do a prepass over the constraints, canonicalizing them, and building up the
				2846	// ConstraintOperands list.
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	2847	InlineAsm::ConstraintInfoVector
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	2848	ConstraintInfos = IA->ParseConstraints();
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2849
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	2850	unsigned ArgNo = 0; // ArgNo - The argument of the CallInst.
				2851	unsigned ResNo = 0; // ResNo - The result number of the next output.
				2852
				2853	for (unsigned i = 0, e = ConstraintInfos.size(); i != e; ++i) {
				2854	ConstraintOperands.push_back(AsmOperandInfo(ConstraintInfos[i]));
				2855	AsmOperandInfo &OpInfo = ConstraintOperands.back();
				2856
John Thompson	67aff16	2010-09-21 22:04:54 +0000	[diff] [blame]	2857	// Update multiple alternative constraint count.
				2858	if (OpInfo.multipleAlternatives.size() > maCount)
				2859	maCount = OpInfo.multipleAlternatives.size();
				2860
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	2861	OpInfo.ConstraintVT = MVT::Other;
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	2862
				2863	// Compute the value type for each operand.
				2864	switch (OpInfo.Type) {
				2865	case InlineAsm::isOutput:
				2866	// Indirect outputs just consume an argument.
				2867	if (OpInfo.isIndirect) {
				2868	OpInfo.CallOperandVal = const_cast<Value *>(CS.getArgument(ArgNo++));
				2869	break;
				2870	}
				2871
				2872	// The return value of the call is this value. As such, there is no
				2873	// corresponding argument.
				2874	assert(!CS.getType()->isVoidTy() &&
				2875	"Bad inline asm!");
Chris Lattner	db125cf	2011-07-18 04:54:35 +0000	[diff] [blame]	2876	if (StructType *STy = dyn_cast<StructType>(CS.getType())) {
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	2877	OpInfo.ConstraintVT = getValueType(STy->getElementType(ResNo));
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	2878	} else {
				2879	assert(ResNo == 0 && "Asm only has one result!");
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	2880	OpInfo.ConstraintVT = getValueType(CS.getType());
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	2881	}
				2882	++ResNo;
				2883	break;
				2884	case InlineAsm::isInput:
				2885	OpInfo.CallOperandVal = const_cast<Value *>(CS.getArgument(ArgNo++));
				2886	break;
				2887	case InlineAsm::isClobber:
				2888	// Nothing to do.
				2889	break;
				2890	}
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2891
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	2892	if (OpInfo.CallOperandVal) {
Chris Lattner	db125cf	2011-07-18 04:54:35 +0000	[diff] [blame]	2893	llvm::Type *OpTy = OpInfo.CallOperandVal->getType();
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	2894	if (OpInfo.isIndirect) {
Chris Lattner	db125cf	2011-07-18 04:54:35 +0000	[diff] [blame]	2895	llvm::PointerType *PtrTy = dyn_cast<PointerType>(OpTy);
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	2896	if (!PtrTy)
				2897	report_fatal_error("Indirect operand for inline asm not a pointer!");
				2898	OpTy = PtrTy->getElementType();
				2899	}
Eric Christopher	362fee9	2011-06-17 20:41:29 +0000	[diff] [blame]	2900
Eric Christopher	cef81b7	2011-05-09 20:04:43 +0000	[diff] [blame]	2901	// Look for vector wrapped in a struct. e.g. { <16 x i8> }.
Chris Lattner	db125cf	2011-07-18 04:54:35 +0000	[diff] [blame]	2902	if (StructType *STy = dyn_cast<StructType>(OpTy))
Eric Christopher	cef81b7	2011-05-09 20:04:43 +0000	[diff] [blame]	2903	if (STy->getNumElements() == 1)
				2904	OpTy = STy->getElementType(0);
				2905
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	2906	// If OpTy is not a single value, it may be a struct/union that we
				2907	// can tile with integers.
				2908	if (!OpTy->isSingleValueType() && OpTy->isSized()) {
				2909	unsigned BitSize = TD->getTypeSizeInBits(OpTy);
				2910	switch (BitSize) {
				2911	default: break;
				2912	case 1:
				2913	case 8:
				2914	case 16:
				2915	case 32:
				2916	case 64:
				2917	case 128:
Dale Johannesen	71365d3	2010-11-09 01:15:07 +0000	[diff] [blame]	2918	OpInfo.ConstraintVT =
				2919	EVT::getEVT(IntegerType::get(OpTy->getContext(), BitSize), true);
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	2920	break;
				2921	}
				2922	} else if (dyn_cast<PointerType>(OpTy)) {
				2923	OpInfo.ConstraintVT = MVT::getIntegerVT(8*TD->getPointerSize());
				2924	} else {
				2925	OpInfo.ConstraintVT = EVT::getEVT(OpTy, true);
				2926	}
				2927	}
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	2928	}
				2929
				2930	// If we have multiple alternative constraints, select the best alternative.
				2931	if (ConstraintInfos.size()) {
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	2932	if (maCount) {
				2933	unsigned bestMAIndex = 0;
				2934	int bestWeight = -1;
				2935	// weight: -1 = invalid match, and 0 = so-so match to 5 = good match.
				2936	int weight = -1;
				2937	unsigned maIndex;
				2938	// Compute the sums of the weights for each alternative, keeping track
				2939	// of the best (highest weight) one so far.
				2940	for (maIndex = 0; maIndex < maCount; ++maIndex) {
				2941	int weightSum = 0;
				2942	for (unsigned cIndex = 0, eIndex = ConstraintOperands.size();
				2943	cIndex != eIndex; ++cIndex) {
				2944	AsmOperandInfo& OpInfo = ConstraintOperands[cIndex];
				2945	if (OpInfo.Type == InlineAsm::isClobber)
				2946	continue;
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	2947
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	2948	// If this is an output operand with a matching input operand,
				2949	// look up the matching input. If their types mismatch, e.g. one
				2950	// is an integer, the other is floating point, or their sizes are
				2951	// different, flag it as an maCantMatch.
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	2952	if (OpInfo.hasMatchingInput()) {
				2953	AsmOperandInfo &Input = ConstraintOperands[OpInfo.MatchingInput];
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	2954	if (OpInfo.ConstraintVT != Input.ConstraintVT) {
				2955	if ((OpInfo.ConstraintVT.isInteger() !=
				2956	Input.ConstraintVT.isInteger()) \|\|
				2957	(OpInfo.ConstraintVT.getSizeInBits() !=
				2958	Input.ConstraintVT.getSizeInBits())) {
				2959	weightSum = -1; // Can't match.
				2960	break;
				2961	}
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	2962	}
				2963	}
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	2964	weight = getMultipleConstraintMatchWeight(OpInfo, maIndex);
				2965	if (weight == -1) {
				2966	weightSum = -1;
				2967	break;
				2968	}
				2969	weightSum += weight;
				2970	}
				2971	// Update best.
				2972	if (weightSum > bestWeight) {
				2973	bestWeight = weightSum;
				2974	bestMAIndex = maIndex;
				2975	}
				2976	}
				2977
				2978	// Now select chosen alternative in each constraint.
				2979	for (unsigned cIndex = 0, eIndex = ConstraintOperands.size();
				2980	cIndex != eIndex; ++cIndex) {
				2981	AsmOperandInfo& cInfo = ConstraintOperands[cIndex];
				2982	if (cInfo.Type == InlineAsm::isClobber)
				2983	continue;
				2984	cInfo.selectAlternative(bestMAIndex);
				2985	}
				2986	}
				2987	}
				2988
				2989	// Check and hook up tied operands, choose constraint code to use.
				2990	for (unsigned cIndex = 0, eIndex = ConstraintOperands.size();
				2991	cIndex != eIndex; ++cIndex) {
				2992	AsmOperandInfo& OpInfo = ConstraintOperands[cIndex];
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2993
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	2994	// If this is an output operand with a matching input operand, look up the
				2995	// matching input. If their types mismatch, e.g. one is an integer, the
				2996	// other is floating point, or their sizes are different, flag it as an
				2997	// error.
				2998	if (OpInfo.hasMatchingInput()) {
				2999	AsmOperandInfo &Input = ConstraintOperands[OpInfo.MatchingInput];
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	3000
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	3001	if (OpInfo.ConstraintVT != Input.ConstraintVT) {
Eric Christopher	5427ede	2011-07-14 20:13:52 +0000	[diff] [blame]	3002	std::pair<unsigned, const TargetRegisterClass*> MatchRC =
				3003	getRegForInlineAsmConstraint(OpInfo.ConstraintCode, OpInfo.ConstraintVT);
				3004	std::pair<unsigned, const TargetRegisterClass*> InputRC =
				3005	getRegForInlineAsmConstraint(Input.ConstraintCode, Input.ConstraintVT);
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	3006	if ((OpInfo.ConstraintVT.isInteger() !=
				3007	Input.ConstraintVT.isInteger()) \|\|
Eric Christopher	5427ede	2011-07-14 20:13:52 +0000	[diff] [blame]	3008	(MatchRC.second != InputRC.second)) {
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	3009	report_fatal_error("Unsupported asm: input constraint"
				3010	" with a matching output constraint of"
				3011	" incompatible type!");
				3012	}
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	3013	}
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	3014
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	3015	}
				3016	}
				3017
				3018	return ConstraintOperands;
				3019	}
				3020
Chris Lattner	58f15c4	2008-10-17 16:21:11 +0000	[diff] [blame]	3021
Chris Lattner	4376fea	2008-04-27 00:09:47 +0000	[diff] [blame]	3022	/// getConstraintGenerality - Return an integer indicating how general CT
				3023	/// is.
				3024	static unsigned getConstraintGenerality(TargetLowering::ConstraintType CT) {
				3025	switch (CT) {
Chris Lattner	4376fea	2008-04-27 00:09:47 +0000	[diff] [blame]	3026	case TargetLowering::C_Other:
				3027	case TargetLowering::C_Unknown:
				3028	return 0;
				3029	case TargetLowering::C_Register:
				3030	return 1;
				3031	case TargetLowering::C_RegisterClass:
				3032	return 2;
				3033	case TargetLowering::C_Memory:
				3034	return 3;
				3035	}
Chandler Carruth	732f05c	2012-01-10 18:08:01 +0000	[diff] [blame]	3036	llvm_unreachable("Invalid constraint type");
Chris Lattner	4376fea	2008-04-27 00:09:47 +0000	[diff] [blame]	3037	}
				3038
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	3039	/// Examine constraint type and operand type and determine a weight value.
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	3040	/// This object must already have been set up with the operand type
				3041	/// and the current alternative constraint selected.
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	3042	TargetLowering::ConstraintWeight
				3043	TargetLowering::getMultipleConstraintMatchWeight(
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	3044	AsmOperandInfo &info, int maIndex) const {
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	3045	InlineAsm::ConstraintCodeVector *rCodes;
John Thompson	67aff16	2010-09-21 22:04:54 +0000	[diff] [blame]	3046	if (maIndex >= (int)info.multipleAlternatives.size())
				3047	rCodes = &info.Codes;
				3048	else
				3049	rCodes = &info.multipleAlternatives[maIndex].Codes;
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	3050	ConstraintWeight BestWeight = CW_Invalid;
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	3051
				3052	// Loop over the options, keeping track of the most general one.
John Thompson	67aff16	2010-09-21 22:04:54 +0000	[diff] [blame]	3053	for (unsigned i = 0, e = rCodes->size(); i != e; ++i) {
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	3054	ConstraintWeight weight =
				3055	getSingleConstraintMatchWeight(info, (*rCodes)[i].c_str());
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	3056	if (weight > BestWeight)
				3057	BestWeight = weight;
				3058	}
				3059
				3060	return BestWeight;
				3061	}
				3062
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	3063	/// Examine constraint type and operand type and determine a weight value.
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	3064	/// This object must already have been set up with the operand type
				3065	/// and the current alternative constraint selected.
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	3066	TargetLowering::ConstraintWeight
				3067	TargetLowering::getSingleConstraintMatchWeight(
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	3068	AsmOperandInfo &info, const char *constraint) const {
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	3069	ConstraintWeight weight = CW_Invalid;
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	3070	Value *CallOperandVal = info.CallOperandVal;
				3071	// If we don't have a value, we can't do a match,
				3072	// but allow it at the lowest weight.
				3073	if (CallOperandVal == NULL)
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	3074	return CW_Default;
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	3075	// Look at the constraint type.
				3076	switch (*constraint) {
				3077	case 'i': // immediate integer.
				3078	case 'n': // immediate integer with a known value.
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	3079	if (isa<ConstantInt>(CallOperandVal))
				3080	weight = CW_Constant;
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	3081	break;
				3082	case 's': // non-explicit intregal immediate.
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	3083	if (isa<GlobalValue>(CallOperandVal))
				3084	weight = CW_Constant;
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	3085	break;
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	3086	case 'E': // immediate float if host format.
				3087	case 'F': // immediate float.
				3088	if (isa<ConstantFP>(CallOperandVal))
				3089	weight = CW_Constant;
				3090	break;
				3091	case '<': // memory operand with autodecrement.
				3092	case '>': // memory operand with autoincrement.
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	3093	case 'm': // memory operand.
				3094	case 'o': // offsettable memory operand
				3095	case 'V': // non-offsettable memory operand
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	3096	weight = CW_Memory;
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	3097	break;
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	3098	case 'r': // general register.
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	3099	case 'g': // general register, memory operand or immediate integer.
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	3100	// note: Clang converts "g" to "imr".
				3101	if (CallOperandVal->getType()->isIntegerTy())
				3102	weight = CW_Register;
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	3103	break;
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	3104	case 'X': // any operand.
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	3105	default:
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	3106	weight = CW_Default;
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	3107	break;
				3108	}
				3109	return weight;
				3110	}
				3111
Chris Lattner	4376fea	2008-04-27 00:09:47 +0000	[diff] [blame]	3112	/// ChooseConstraint - If there are multiple different constraints that we
				3113	/// could pick for this operand (e.g. "imr") try to pick the 'best' one.
Chris Lattner	24e1a9d	2008-04-27 01:49:46 +0000	[diff] [blame]	3114	/// This is somewhat tricky: constraints fall into four classes:
Chris Lattner	4376fea	2008-04-27 00:09:47 +0000	[diff] [blame]	3115	/// Other -> immediates and magic values
				3116	/// Register -> one specific register
				3117	/// RegisterClass -> a group of regs
				3118	/// Memory -> memory
				3119	/// Ideally, we would pick the most specific constraint possible: if we have
				3120	/// something that fits into a register, we would pick it. The problem here
				3121	/// is that if we have something that could either be in a register or in
				3122	/// memory that use of the register could cause selection of other
				3123	/// operands to fail: they might only succeed if we pick memory. Because of
				3124	/// this the heuristic we use is:
				3125	///
				3126	/// 1) If there is an 'other' constraint, and if the operand is valid for
				3127	/// that constraint, use it. This makes us take advantage of 'i'
				3128	/// constraints when available.
				3129	/// 2) Otherwise, pick the most general constraint present. This prefers
				3130	/// 'm' over 'r', for example.
				3131	///
				3132	static void ChooseConstraint(TargetLowering::AsmOperandInfo &OpInfo,
Dale Johannesen	1784d16	2010-06-25 21:55:36 +0000	[diff] [blame]	3133	const TargetLowering &TLI,
Dan Gohman	475871a	2008-07-27 21:46:04 +0000	[diff] [blame]	3134	SDValue Op, SelectionDAG *DAG) {
Chris Lattner	4376fea	2008-04-27 00:09:47 +0000	[diff] [blame]	3135	assert(OpInfo.Codes.size() > 1 && "Doesn't have multiple constraint options");
				3136	unsigned BestIdx = 0;
				3137	TargetLowering::ConstraintType BestType = TargetLowering::C_Unknown;
				3138	int BestGenerality = -1;
Dale Johannesen	a5989f8	2010-06-28 22:09:45 +0000	[diff] [blame]	3139
Chris Lattner	4376fea	2008-04-27 00:09:47 +0000	[diff] [blame]	3140	// Loop over the options, keeping track of the most general one.
				3141	for (unsigned i = 0, e = OpInfo.Codes.size(); i != e; ++i) {
				3142	TargetLowering::ConstraintType CType =
				3143	TLI.getConstraintType(OpInfo.Codes[i]);
Dale Johannesen	a5989f8	2010-06-28 22:09:45 +0000	[diff] [blame]	3144
Chris Lattner	5a09690	2008-04-27 00:37:18 +0000	[diff] [blame]	3145	// If this is an 'other' constraint, see if the operand is valid for it.
				3146	// For example, on X86 we might have an 'rI' constraint. If the operand
				3147	// is an integer in the range [0..31] we want to use I (saving a load
				3148	// of a register), otherwise we must use 'r'.
Gabor Greif	ba36cb5	2008-08-28 21:40:38 +0000	[diff] [blame]	3149	if (CType == TargetLowering::C_Other && Op.getNode()) {
Chris Lattner	5a09690	2008-04-27 00:37:18 +0000	[diff] [blame]	3150	assert(OpInfo.Codes[i].size() == 1 &&
				3151	"Unhandled multi-letter 'other' constraint");
Dan Gohman	475871a	2008-07-27 21:46:04 +0000	[diff] [blame]	3152	std::vector<SDValue> ResultOps;
Eric Christopher	100c833	2011-06-02 23:16:42 +0000	[diff] [blame]	3153	TLI.LowerAsmOperandForConstraint(Op, OpInfo.Codes[i],
Chris Lattner	5a09690	2008-04-27 00:37:18 +0000	[diff] [blame]	3154	ResultOps, *DAG);
				3155	if (!ResultOps.empty()) {
				3156	BestType = CType;
				3157	BestIdx = i;
				3158	break;
				3159	}
				3160	}
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	3161
Dale Johannesen	a5989f8	2010-06-28 22:09:45 +0000	[diff] [blame]	3162	// Things with matching constraints can only be registers, per gcc
				3163	// documentation. This mainly affects "g" constraints.
				3164	if (CType == TargetLowering::C_Memory && OpInfo.hasMatchingInput())
				3165	continue;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	3166
Chris Lattner	4376fea	2008-04-27 00:09:47 +0000	[diff] [blame]	3167	// This constraint letter is more general than the previous one, use it.
				3168	int Generality = getConstraintGenerality(CType);
				3169	if (Generality > BestGenerality) {
				3170	BestType = CType;
				3171	BestIdx = i;
				3172	BestGenerality = Generality;
				3173	}
				3174	}
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	3175
Chris Lattner	4376fea	2008-04-27 00:09:47 +0000	[diff] [blame]	3176	OpInfo.ConstraintCode = OpInfo.Codes[BestIdx];
				3177	OpInfo.ConstraintType = BestType;
				3178	}
				3179
				3180	/// ComputeConstraintToUse - Determines the constraint code and constraint
				3181	/// type to use for the specific AsmOperandInfo, setting
				3182	/// OpInfo.ConstraintCode and OpInfo.ConstraintType.
Chris Lattner	5a09690	2008-04-27 00:37:18 +0000	[diff] [blame]	3183	void TargetLowering::ComputeConstraintToUse(AsmOperandInfo &OpInfo,
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	3184	SDValue Op,
Chris Lattner	5a09690	2008-04-27 00:37:18 +0000	[diff] [blame]	3185	SelectionDAG *DAG) const {
Chris Lattner	4376fea	2008-04-27 00:09:47 +0000	[diff] [blame]	3186	assert(!OpInfo.Codes.empty() && "Must have at least one constraint");
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	3187
Chris Lattner	4376fea	2008-04-27 00:09:47 +0000	[diff] [blame]	3188	// Single-letter constraints ('r') are very common.
				3189	if (OpInfo.Codes.size() == 1) {
				3190	OpInfo.ConstraintCode = OpInfo.Codes[0];
				3191	OpInfo.ConstraintType = getConstraintType(OpInfo.ConstraintCode);
				3192	} else {
Dale Johannesen	1784d16	2010-06-25 21:55:36 +0000	[diff] [blame]	3193	ChooseConstraint(OpInfo, *this, Op, DAG);
Chris Lattner	4376fea	2008-04-27 00:09:47 +0000	[diff] [blame]	3194	}
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	3195
Chris Lattner	4376fea	2008-04-27 00:09:47 +0000	[diff] [blame]	3196	// 'X' matches anything.
				3197	if (OpInfo.ConstraintCode == "X" && OpInfo.CallOperandVal) {
				3198	// Labels and constants are handled elsewhere ('X' is the only thing
Dale Johannesen	8ea5ec6	2009-07-07 23:26:33 +0000	[diff] [blame]	3199	// that matches labels). For Functions, the type here is the type of
Dale Johannesen	5339c55	2009-07-20 23:27:39 +0000	[diff] [blame]	3200	// the result, which is not what we want to look at; leave them alone.
				3201	Value *v = OpInfo.CallOperandVal;
Dale Johannesen	8ea5ec6	2009-07-07 23:26:33 +0000	[diff] [blame]	3202	if (isa<BasicBlock>(v) \|\| isa<ConstantInt>(v) \|\| isa<Function>(v)) {
				3203	OpInfo.CallOperandVal = v;
Chris Lattner	4376fea	2008-04-27 00:09:47 +0000	[diff] [blame]	3204	return;
Dale Johannesen	8ea5ec6	2009-07-07 23:26:33 +0000	[diff] [blame]	3205	}
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	3206
Chris Lattner	4376fea	2008-04-27 00:09:47 +0000	[diff] [blame]	3207	// Otherwise, try to resolve it to something we know about by looking at
				3208	// the actual operand type.
				3209	if (const char *Repl = LowerXConstraint(OpInfo.ConstraintVT)) {
				3210	OpInfo.ConstraintCode = Repl;
				3211	OpInfo.ConstraintType = getConstraintType(OpInfo.ConstraintCode);
				3212	}
				3213	}
				3214	}
				3215
				3216	//===----------------------------------------------------------------------===//
Evan Cheng	30b37b5	2006-03-13 23:18:16 +0000	[diff] [blame]	3217	// Loop Strength Reduction hooks
				3218	//===----------------------------------------------------------------------===//
				3219
Chris Lattner	1436bb6	2007-03-30 23:14:50 +0000	[diff] [blame]	3220	/// isLegalAddressingMode - Return true if the addressing mode represented
				3221	/// by AM is legal for this target, for a load/store of the specified type.
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	3222	bool TargetLowering::isLegalAddressingMode(const AddrMode &AM,
Chris Lattner	db125cf	2011-07-18 04:54:35 +0000	[diff] [blame]	3223	Type *Ty) const {
Chris Lattner	1436bb6	2007-03-30 23:14:50 +0000	[diff] [blame]	3224	// The default implementation of this implements a conservative RISCy, r+r and
				3225	// r+i addr mode.
				3226
				3227	// Allows a sign-extended 16-bit immediate field.
				3228	if (AM.BaseOffs <= -(1LL << 16) \|\| AM.BaseOffs >= (1LL << 16)-1)
				3229	return false;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	3230
Chris Lattner	1436bb6	2007-03-30 23:14:50 +0000	[diff] [blame]	3231	// No global is ever allowed as a base.
				3232	if (AM.BaseGV)
				3233	return false;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	3234
				3235	// Only support r+r,
Chris Lattner	1436bb6	2007-03-30 23:14:50 +0000	[diff] [blame]	3236	switch (AM.Scale) {
				3237	case 0: // "r+i" or just "i", depending on HasBaseReg.
				3238	break;
				3239	case 1:
				3240	if (AM.HasBaseReg && AM.BaseOffs) // "r+r+i" is not allowed.
				3241	return false;
				3242	// Otherwise we have r+r or r+i.
				3243	break;
				3244	case 2:
				3245	if (AM.HasBaseReg \|\| AM.BaseOffs) // 2r+r or 2r+i is not allowed.
				3246	return false;
				3247	// Allow 2*r as r+r.
				3248	break;
				3249	}
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	3250
Chris Lattner	1436bb6	2007-03-30 23:14:50 +0000	[diff] [blame]	3251	return true;
				3252	}
				3253
Benjamin Kramer	9c64030	2011-07-08 10:31:30 +0000	[diff] [blame]	3254	/// BuildExactDiv - Given an exact SDIV by a constant, create a multiplication
				3255	/// with the multiplicative inverse of the constant.
				3256	SDValue TargetLowering::BuildExactSDIV(SDValue Op1, SDValue Op2, DebugLoc dl,
				3257	SelectionDAG &DAG) const {
				3258	ConstantSDNode *C = cast<ConstantSDNode>(Op2);
				3259	APInt d = C->getAPIntValue();
				3260	assert(d != 0 && "Division by zero!");
				3261
				3262	// Shift the value upfront if it is even, so the LSB is one.
				3263	unsigned ShAmt = d.countTrailingZeros();
				3264	if (ShAmt) {
				3265	// TODO: For UDIV use SRL instead of SRA.
				3266	SDValue Amt = DAG.getConstant(ShAmt, getShiftAmountTy(Op1.getValueType()));
				3267	Op1 = DAG.getNode(ISD::SRA, dl, Op1.getValueType(), Op1, Amt);
				3268	d = d.ashr(ShAmt);
				3269	}
				3270
				3271	// Calculate the multiplicative inverse, using Newton's method.
				3272	APInt t, xn = d;
				3273	while ((t = d*xn) != 1)
				3274	xn *= APInt(d.getBitWidth(), 2) - t;
				3275
				3276	Op2 = DAG.getConstant(xn, Op1.getValueType());
				3277	return DAG.getNode(ISD::MUL, dl, Op1.getValueType(), Op1, Op2);
				3278	}
				3279
Andrew Lenharth	dae9cbe	2006-05-16 17:42:15 +0000	[diff] [blame]	3280	/// BuildSDIVSequence - Given an ISD::SDIV node expressing a divide by constant,
				3281	/// return a DAG expression to select that will generate the same value by
				3282	/// multiplying by a magic number. See:
				3283	/// <http://the.wall.riscom.net/books/proc/ppc/cwg/code2.html>
Richard Osborne	19a4daf	2011-11-07 17:09:05 +0000	[diff] [blame]	3284	SDValue TargetLowering::
				3285	BuildSDIV(SDNode *N, SelectionDAG &DAG, bool IsAfterLegalization,
				3286	std::vector<SDNode> Created) const {
Owen Anderson	e50ed30	2009-08-10 22:56:29 +0000	[diff] [blame]	3287	EVT VT = N->getValueType(0);
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	3288	DebugLoc dl= N->getDebugLoc();
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	3289
Andrew Lenharth	dae9cbe	2006-05-16 17:42:15 +0000	[diff] [blame]	3290	// Check to see if we can do this.
Eli Friedman	fc69cb4	2008-11-30 06:35:39 +0000	[diff] [blame]	3291	// FIXME: We should be more aggressive here.
				3292	if (!isTypeLegal(VT))
				3293	return SDValue();
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	3294
Eli Friedman	fc69cb4	2008-11-30 06:35:39 +0000	[diff] [blame]	3295	APInt d = cast<ConstantSDNode>(N->getOperand(1))->getAPIntValue();
Jay Foad	4e5ea55	2009-04-30 10:15:35 +0000	[diff] [blame]	3296	APInt::ms magics = d.magic();
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	3297
Andrew Lenharth	dae9cbe	2006-05-16 17:42:15 +0000	[diff] [blame]	3298	// Multiply the numerator (operand 0) by the magic value
Eli Friedman	fc69cb4	2008-11-30 06:35:39 +0000	[diff] [blame]	3299	// FIXME: We should support doing a MUL in a wider type
Dan Gohman	475871a	2008-07-27 21:46:04 +0000	[diff] [blame]	3300	SDValue Q;
Richard Osborne	19a4daf	2011-11-07 17:09:05 +0000	[diff] [blame]	3301	if (IsAfterLegalization ? isOperationLegal(ISD::MULHS, VT) :
				3302	isOperationLegalOrCustom(ISD::MULHS, VT))
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	3303	Q = DAG.getNode(ISD::MULHS, dl, VT, N->getOperand(0),
Dan Gohman	525178c	2007-10-08 18:33:35 +0000	[diff] [blame]	3304	DAG.getConstant(magics.m, VT));
Richard Osborne	19a4daf	2011-11-07 17:09:05 +0000	[diff] [blame]	3305	else if (IsAfterLegalization ? isOperationLegal(ISD::SMUL_LOHI, VT) :
				3306	isOperationLegalOrCustom(ISD::SMUL_LOHI, VT))
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	3307	Q = SDValue(DAG.getNode(ISD::SMUL_LOHI, dl, DAG.getVTList(VT, VT),
Dan Gohman	525178c	2007-10-08 18:33:35 +0000	[diff] [blame]	3308	N->getOperand(0),
Gabor Greif	ba36cb5	2008-08-28 21:40:38 +0000	[diff] [blame]	3309	DAG.getConstant(magics.m, VT)).getNode(), 1);
Dan Gohman	525178c	2007-10-08 18:33:35 +0000	[diff] [blame]	3310	else
Dan Gohman	475871a	2008-07-27 21:46:04 +0000	[diff] [blame]	3311	return SDValue(); // No mulhs or equvialent
Andrew Lenharth	dae9cbe	2006-05-16 17:42:15 +0000	[diff] [blame]	3312	// If d > 0 and m < 0, add the numerator
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	3313	if (d.isStrictlyPositive() && magics.m.isNegative()) {
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	3314	Q = DAG.getNode(ISD::ADD, dl, VT, Q, N->getOperand(0));
Andrew Lenharth	dae9cbe	2006-05-16 17:42:15 +0000	[diff] [blame]	3315	if (Created)
Gabor Greif	ba36cb5	2008-08-28 21:40:38 +0000	[diff] [blame]	3316	Created->push_back(Q.getNode());
Andrew Lenharth	dae9cbe	2006-05-16 17:42:15 +0000	[diff] [blame]	3317	}
				3318	// If d < 0 and m > 0, subtract the numerator.
Eli Friedman	fc69cb4	2008-11-30 06:35:39 +0000	[diff] [blame]	3319	if (d.isNegative() && magics.m.isStrictlyPositive()) {
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	3320	Q = DAG.getNode(ISD::SUB, dl, VT, Q, N->getOperand(0));
Andrew Lenharth	dae9cbe	2006-05-16 17:42:15 +0000	[diff] [blame]	3321	if (Created)
Gabor Greif	ba36cb5	2008-08-28 21:40:38 +0000	[diff] [blame]	3322	Created->push_back(Q.getNode());
Andrew Lenharth	dae9cbe	2006-05-16 17:42:15 +0000	[diff] [blame]	3323	}
				3324	// Shift right algebraic if shift value is nonzero
				3325	if (magics.s > 0) {
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	3326	Q = DAG.getNode(ISD::SRA, dl, VT, Q,
Owen Anderson	95771af	2011-02-25 21:41:48 +0000	[diff] [blame]	3327	DAG.getConstant(magics.s, getShiftAmountTy(Q.getValueType())));
Andrew Lenharth	dae9cbe	2006-05-16 17:42:15 +0000	[diff] [blame]	3328	if (Created)
Gabor Greif	ba36cb5	2008-08-28 21:40:38 +0000	[diff] [blame]	3329	Created->push_back(Q.getNode());
Andrew Lenharth	dae9cbe	2006-05-16 17:42:15 +0000	[diff] [blame]	3330	}
				3331	// Extract the sign bit and add it to the quotient
Dan Gohman	475871a	2008-07-27 21:46:04 +0000	[diff] [blame]	3332	SDValue T =
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	3333	DAG.getNode(ISD::SRL, dl, VT, Q, DAG.getConstant(VT.getSizeInBits()-1,
Owen Anderson	95771af	2011-02-25 21:41:48 +0000	[diff] [blame]	3334	getShiftAmountTy(Q.getValueType())));
Andrew Lenharth	dae9cbe	2006-05-16 17:42:15 +0000	[diff] [blame]	3335	if (Created)
Gabor Greif	ba36cb5	2008-08-28 21:40:38 +0000	[diff] [blame]	3336	Created->push_back(T.getNode());
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	3337	return DAG.getNode(ISD::ADD, dl, VT, Q, T);
Andrew Lenharth	dae9cbe	2006-05-16 17:42:15 +0000	[diff] [blame]	3338	}
				3339
				3340	/// BuildUDIVSequence - Given an ISD::UDIV node expressing a divide by constant,
				3341	/// return a DAG expression to select that will generate the same value by
				3342	/// multiplying by a magic number. See:
				3343	/// <http://the.wall.riscom.net/books/proc/ppc/cwg/code2.html>
Richard Osborne	19a4daf	2011-11-07 17:09:05 +0000	[diff] [blame]	3344	SDValue TargetLowering::
				3345	BuildUDIV(SDNode *N, SelectionDAG &DAG, bool IsAfterLegalization,
				3346	std::vector<SDNode> Created) const {
Owen Anderson	e50ed30	2009-08-10 22:56:29 +0000	[diff] [blame]	3347	EVT VT = N->getValueType(0);
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	3348	DebugLoc dl = N->getDebugLoc();
Eli Friedman	201c977	2008-11-30 06:02:26 +0000	[diff] [blame]	3349
Andrew Lenharth	dae9cbe	2006-05-16 17:42:15 +0000	[diff] [blame]	3350	// Check to see if we can do this.
Eli Friedman	201c977	2008-11-30 06:02:26 +0000	[diff] [blame]	3351	// FIXME: We should be more aggressive here.
				3352	if (!isTypeLegal(VT))
				3353	return SDValue();
				3354
				3355	// FIXME: We should use a narrower constant when the upper
				3356	// bits are known to be zero.
Benjamin Kramer	1c10b8d	2011-03-17 20:39:14 +0000	[diff] [blame]	3357	const APInt &N1C = cast<ConstantSDNode>(N->getOperand(1))->getAPIntValue();
				3358	APInt::mu magics = N1C.magicu();
				3359
				3360	SDValue Q = N->getOperand(0);
				3361
				3362	// If the divisor is even, we can avoid using the expensive fixup by shifting
				3363	// the divided value upfront.
				3364	if (magics.a != 0 && !N1C[0]) {
				3365	unsigned Shift = N1C.countTrailingZeros();
				3366	Q = DAG.getNode(ISD::SRL, dl, VT, Q,
				3367	DAG.getConstant(Shift, getShiftAmountTy(Q.getValueType())));
				3368	if (Created)
				3369	Created->push_back(Q.getNode());
				3370
				3371	// Get magic number for the shifted divisor.
				3372	magics = N1C.lshr(Shift).magicu(Shift);
				3373	assert(magics.a == 0 && "Should use cheap fixup now");
				3374	}
Eli Friedman	201c977	2008-11-30 06:02:26 +0000	[diff] [blame]	3375
Andrew Lenharth	dae9cbe	2006-05-16 17:42:15 +0000	[diff] [blame]	3376	// Multiply the numerator (operand 0) by the magic value
Eli Friedman	201c977	2008-11-30 06:02:26 +0000	[diff] [blame]	3377	// FIXME: We should support doing a MUL in a wider type
Richard Osborne	19a4daf	2011-11-07 17:09:05 +0000	[diff] [blame]	3378	if (IsAfterLegalization ? isOperationLegal(ISD::MULHU, VT) :
				3379	isOperationLegalOrCustom(ISD::MULHU, VT))
Benjamin Kramer	1c10b8d	2011-03-17 20:39:14 +0000	[diff] [blame]	3380	Q = DAG.getNode(ISD::MULHU, dl, VT, Q, DAG.getConstant(magics.m, VT));
Richard Osborne	19a4daf	2011-11-07 17:09:05 +0000	[diff] [blame]	3381	else if (IsAfterLegalization ? isOperationLegal(ISD::UMUL_LOHI, VT) :
				3382	isOperationLegalOrCustom(ISD::UMUL_LOHI, VT))
Benjamin Kramer	1c10b8d	2011-03-17 20:39:14 +0000	[diff] [blame]	3383	Q = SDValue(DAG.getNode(ISD::UMUL_LOHI, dl, DAG.getVTList(VT, VT), Q,
				3384	DAG.getConstant(magics.m, VT)).getNode(), 1);
Dan Gohman	525178c	2007-10-08 18:33:35 +0000	[diff] [blame]	3385	else
Dan Gohman	475871a	2008-07-27 21:46:04 +0000	[diff] [blame]	3386	return SDValue(); // No mulhu or equvialent
Andrew Lenharth	dae9cbe	2006-05-16 17:42:15 +0000	[diff] [blame]	3387	if (Created)
Gabor Greif	ba36cb5	2008-08-28 21:40:38 +0000	[diff] [blame]	3388	Created->push_back(Q.getNode());
Andrew Lenharth	dae9cbe	2006-05-16 17:42:15 +0000	[diff] [blame]	3389
				3390	if (magics.a == 0) {
Benjamin Kramer	1c10b8d	2011-03-17 20:39:14 +0000	[diff] [blame]	3391	assert(magics.s < N1C.getBitWidth() &&
Eli Friedman	201c977	2008-11-30 06:02:26 +0000	[diff] [blame]	3392	"We shouldn't generate an undefined shift!");
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	3393	return DAG.getNode(ISD::SRL, dl, VT, Q,
Owen Anderson	95771af	2011-02-25 21:41:48 +0000	[diff] [blame]	3394	DAG.getConstant(magics.s, getShiftAmountTy(Q.getValueType())));
Andrew Lenharth	dae9cbe	2006-05-16 17:42:15 +0000	[diff] [blame]	3395	} else {
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	3396	SDValue NPQ = DAG.getNode(ISD::SUB, dl, VT, N->getOperand(0), Q);
Andrew Lenharth	dae9cbe	2006-05-16 17:42:15 +0000	[diff] [blame]	3397	if (Created)
Gabor Greif	ba36cb5	2008-08-28 21:40:38 +0000	[diff] [blame]	3398	Created->push_back(NPQ.getNode());
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	3399	NPQ = DAG.getNode(ISD::SRL, dl, VT, NPQ,
Owen Anderson	95771af	2011-02-25 21:41:48 +0000	[diff] [blame]	3400	DAG.getConstant(1, getShiftAmountTy(NPQ.getValueType())));
Andrew Lenharth	dae9cbe	2006-05-16 17:42:15 +0000	[diff] [blame]	3401	if (Created)
Gabor Greif	ba36cb5	2008-08-28 21:40:38 +0000	[diff] [blame]	3402	Created->push_back(NPQ.getNode());
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	3403	NPQ = DAG.getNode(ISD::ADD, dl, VT, NPQ, Q);
Andrew Lenharth	dae9cbe	2006-05-16 17:42:15 +0000	[diff] [blame]	3404	if (Created)
Gabor Greif	ba36cb5	2008-08-28 21:40:38 +0000	[diff] [blame]	3405	Created->push_back(NPQ.getNode());
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	3406	return DAG.getNode(ISD::SRL, dl, VT, NPQ,
Owen Anderson	95771af	2011-02-25 21:41:48 +0000	[diff] [blame]	3407	DAG.getConstant(magics.s-1, getShiftAmountTy(NPQ.getValueType())));
Andrew Lenharth	dae9cbe	2006-05-16 17:42:15 +0000	[diff] [blame]	3408	}
				3409	}