Blame - lib/CodeGen/SelectionDAG/TargetLowering.cpp - fp2-dev/platform/external/llvm

blob: a696d510b3176ede513f7adae7fab7c106c0bb03 [file] [log] [blame]

Chris Lattner	310968c	2005-01-07 07:44:53 +0000	[diff] [blame]	1	//===-- TargetLowering.cpp - Implement the TargetLowering class -----------===//
Misha Brukman	f976c85	2005-04-21 22:55:34 +0000	[diff] [blame]	2	//
Chris Lattner	310968c	2005-01-07 07:44:53 +0000	[diff] [blame]	3	// The LLVM Compiler Infrastructure
				4	//
Chris Lattner	4ee451d	2007-12-29 20:36:04 +0000	[diff] [blame]	5	// This file is distributed under the University of Illinois Open Source
				6	// License. See LICENSE.TXT for details.
Misha Brukman	f976c85	2005-04-21 22:55:34 +0000	[diff] [blame]	7	//
Chris Lattner	310968c	2005-01-07 07:44:53 +0000	[diff] [blame]	8	//===----------------------------------------------------------------------===//
				9	//
				10	// This implements the TargetLowering class.
				11	//
				12	//===----------------------------------------------------------------------===//
				13
				14	#include "llvm/Target/TargetLowering.h"
Chris Lattner	af76e59	2009-08-22 20:48:53 +0000	[diff] [blame]	15	#include "llvm/MC/MCAsmInfo.h"
Chris Lattner	beeb93e	2010-01-26 05:58:28 +0000	[diff] [blame]	16	#include "llvm/MC/MCExpr.h"
Owen Anderson	07000c6	2006-05-12 06:33:49 +0000	[diff] [blame]	17	#include "llvm/Target/TargetData.h"
Chris Lattner	f014412	2009-07-28 03:13:23 +0000	[diff] [blame]	18	#include "llvm/Target/TargetLoweringObjectFile.h"
Chris Lattner	310968c	2005-01-07 07:44:53 +0000	[diff] [blame]	19	#include "llvm/Target/TargetMachine.h"
Dan Gohman	6f0d024	2008-02-10 18:45:23 +0000	[diff] [blame]	20	#include "llvm/Target/TargetRegisterInfo.h"
Dan Gohman	707e018	2008-04-12 04:36:06 +0000	[diff] [blame]	21	#include "llvm/GlobalVariable.h"
Chris Lattner	dc87929	2006-03-31 00:28:56 +0000	[diff] [blame]	22	#include "llvm/DerivedTypes.h"
Dan Gohman	84023e0	2010-07-10 09:00:22 +0000	[diff] [blame]	23	#include "llvm/CodeGen/Analysis.h"
Evan Cheng	ad4196b	2008-05-12 19:56:52 +0000	[diff] [blame]	24	#include "llvm/CodeGen/MachineFrameInfo.h"
Chris Lattner	071c62f	2010-01-25 23:26:13 +0000	[diff] [blame]	25	#include "llvm/CodeGen/MachineJumpTableInfo.h"
Chris Lattner	589c6f6	2010-01-26 06:28:43 +0000	[diff] [blame]	26	#include "llvm/CodeGen/MachineFunction.h"
Chris Lattner	310968c	2005-01-07 07:44:53 +0000	[diff] [blame]	27	#include "llvm/CodeGen/SelectionDAG.h"
Owen Anderson	718cb66	2007-09-07 04:06:50 +0000	[diff] [blame]	28	#include "llvm/ADT/STLExtras.h"
Nadav Rotem	b6fbec3	2011-06-01 12:51:46 +0000	[diff] [blame]	29	#include "llvm/Support/CommandLine.h"
Torok Edwin	c25e758	2009-07-11 20:10:48 +0000	[diff] [blame]	30	#include "llvm/Support/ErrorHandling.h"
Chris Lattner	c6fd6cd	2006-01-30 04:09:27 +0000	[diff] [blame]	31	#include "llvm/Support/MathExtras.h"
Nick Lewycky	476b242	2010-12-19 20:43:38 +0000	[diff] [blame]	32	#include <cctype>
Chris Lattner	310968c	2005-01-07 07:44:53 +0000	[diff] [blame]	33	using namespace llvm;
				34
Nadav Rotem	b6fbec3	2011-06-01 12:51:46 +0000	[diff] [blame]	35	/// We are in the process of implementing a new TypeLegalization action
				36	/// - the promotion of vector elements. This feature is disabled by default
				37	/// and only enabled using this flag.
				38	static cl::opt<bool>
Nadav Rotem	8fb06b3	2011-10-16 20:31:33 +0000	[diff] [blame]	39	AllowPromoteIntElem("promote-elements", cl::Hidden, cl::init(true),
Nadav Rotem	b6fbec3	2011-06-01 12:51:46 +0000	[diff] [blame]	40	cl::desc("Allow promotion of integer vector element types"));
				41
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	42	/// InitLibcallNames - Set default libcall names.
				43	///
Evan Cheng	79cca50	2007-01-12 22:51:10 +0000	[diff] [blame]	44	static void InitLibcallNames(const char **Names) {
Anton Korobeynikov	c31642f	2009-05-03 13:14:08 +0000	[diff] [blame]	45	Names[RTLIB::SHL_I16] = "__ashlhi3";
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	46	Names[RTLIB::SHL_I32] = "__ashlsi3";
				47	Names[RTLIB::SHL_I64] = "__ashldi3";
Duncan Sands	dddc629	2008-07-11 16:52:29 +0000	[diff] [blame]	48	Names[RTLIB::SHL_I128] = "__ashlti3";
Anton Korobeynikov	c31642f	2009-05-03 13:14:08 +0000	[diff] [blame]	49	Names[RTLIB::SRL_I16] = "__lshrhi3";
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	50	Names[RTLIB::SRL_I32] = "__lshrsi3";
				51	Names[RTLIB::SRL_I64] = "__lshrdi3";
Duncan Sands	dddc629	2008-07-11 16:52:29 +0000	[diff] [blame]	52	Names[RTLIB::SRL_I128] = "__lshrti3";
Anton Korobeynikov	c31642f	2009-05-03 13:14:08 +0000	[diff] [blame]	53	Names[RTLIB::SRA_I16] = "__ashrhi3";
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	54	Names[RTLIB::SRA_I32] = "__ashrsi3";
				55	Names[RTLIB::SRA_I64] = "__ashrdi3";
Duncan Sands	dddc629	2008-07-11 16:52:29 +0000	[diff] [blame]	56	Names[RTLIB::SRA_I128] = "__ashrti3";
Anton Korobeynikov	8983da7	2009-11-07 17:14:39 +0000	[diff] [blame]	57	Names[RTLIB::MUL_I8] = "__mulqi3";
Anton Korobeynikov	c31642f	2009-05-03 13:14:08 +0000	[diff] [blame]	58	Names[RTLIB::MUL_I16] = "__mulhi3";
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	59	Names[RTLIB::MUL_I32] = "__mulsi3";
				60	Names[RTLIB::MUL_I64] = "__muldi3";
Duncan Sands	5ac319a	2008-07-10 15:35:05 +0000	[diff] [blame]	61	Names[RTLIB::MUL_I128] = "__multi3";
Eric Christopher	362fee9	2011-06-17 20:41:29 +0000	[diff] [blame]	62	Names[RTLIB::MULO_I32] = "__mulosi4";
				63	Names[RTLIB::MULO_I64] = "__mulodi4";
				64	Names[RTLIB::MULO_I128] = "__muloti4";
Anton Korobeynikov	8983da7	2009-11-07 17:14:39 +0000	[diff] [blame]	65	Names[RTLIB::SDIV_I8] = "__divqi3";
Anton Korobeynikov	813090c	2009-05-03 13:18:16 +0000	[diff] [blame]	66	Names[RTLIB::SDIV_I16] = "__divhi3";
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	67	Names[RTLIB::SDIV_I32] = "__divsi3";
				68	Names[RTLIB::SDIV_I64] = "__divdi3";
Duncan Sands	5ac319a	2008-07-10 15:35:05 +0000	[diff] [blame]	69	Names[RTLIB::SDIV_I128] = "__divti3";
Anton Korobeynikov	8983da7	2009-11-07 17:14:39 +0000	[diff] [blame]	70	Names[RTLIB::UDIV_I8] = "__udivqi3";
Anton Korobeynikov	fb3f84f	2009-05-08 18:50:54 +0000	[diff] [blame]	71	Names[RTLIB::UDIV_I16] = "__udivhi3";
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	72	Names[RTLIB::UDIV_I32] = "__udivsi3";
				73	Names[RTLIB::UDIV_I64] = "__udivdi3";
Duncan Sands	5ac319a	2008-07-10 15:35:05 +0000	[diff] [blame]	74	Names[RTLIB::UDIV_I128] = "__udivti3";
Anton Korobeynikov	8983da7	2009-11-07 17:14:39 +0000	[diff] [blame]	75	Names[RTLIB::SREM_I8] = "__modqi3";
Anton Korobeynikov	813090c	2009-05-03 13:18:16 +0000	[diff] [blame]	76	Names[RTLIB::SREM_I16] = "__modhi3";
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	77	Names[RTLIB::SREM_I32] = "__modsi3";
				78	Names[RTLIB::SREM_I64] = "__moddi3";
Duncan Sands	5ac319a	2008-07-10 15:35:05 +0000	[diff] [blame]	79	Names[RTLIB::SREM_I128] = "__modti3";
Anton Korobeynikov	8983da7	2009-11-07 17:14:39 +0000	[diff] [blame]	80	Names[RTLIB::UREM_I8] = "__umodqi3";
Anton Korobeynikov	9fe9c8e	2009-05-03 13:19:57 +0000	[diff] [blame]	81	Names[RTLIB::UREM_I16] = "__umodhi3";
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	82	Names[RTLIB::UREM_I32] = "__umodsi3";
				83	Names[RTLIB::UREM_I64] = "__umoddi3";
Duncan Sands	5ac319a	2008-07-10 15:35:05 +0000	[diff] [blame]	84	Names[RTLIB::UREM_I128] = "__umodti3";
Evan Cheng	8e23e81	2011-04-01 00:42:02 +0000	[diff] [blame]	85
				86	// These are generally not available.
				87	Names[RTLIB::SDIVREM_I8] = 0;
				88	Names[RTLIB::SDIVREM_I16] = 0;
				89	Names[RTLIB::SDIVREM_I32] = 0;
				90	Names[RTLIB::SDIVREM_I64] = 0;
				91	Names[RTLIB::SDIVREM_I128] = 0;
				92	Names[RTLIB::UDIVREM_I8] = 0;
				93	Names[RTLIB::UDIVREM_I16] = 0;
				94	Names[RTLIB::UDIVREM_I32] = 0;
				95	Names[RTLIB::UDIVREM_I64] = 0;
				96	Names[RTLIB::UDIVREM_I128] = 0;
				97
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	98	Names[RTLIB::NEG_I32] = "__negsi2";
				99	Names[RTLIB::NEG_I64] = "__negdi2";
				100	Names[RTLIB::ADD_F32] = "__addsf3";
				101	Names[RTLIB::ADD_F64] = "__adddf3";
Duncan Sands	007f984	2008-01-10 10:28:30 +0000	[diff] [blame]	102	Names[RTLIB::ADD_F80] = "__addxf3";
Dale Johannesen	161e897	2007-10-05 20:04:43 +0000	[diff] [blame]	103	Names[RTLIB::ADD_PPCF128] = "__gcc_qadd";
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	104	Names[RTLIB::SUB_F32] = "__subsf3";
				105	Names[RTLIB::SUB_F64] = "__subdf3";
Duncan Sands	007f984	2008-01-10 10:28:30 +0000	[diff] [blame]	106	Names[RTLIB::SUB_F80] = "__subxf3";
Dale Johannesen	161e897	2007-10-05 20:04:43 +0000	[diff] [blame]	107	Names[RTLIB::SUB_PPCF128] = "__gcc_qsub";
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	108	Names[RTLIB::MUL_F32] = "__mulsf3";
				109	Names[RTLIB::MUL_F64] = "__muldf3";
Duncan Sands	007f984	2008-01-10 10:28:30 +0000	[diff] [blame]	110	Names[RTLIB::MUL_F80] = "__mulxf3";
Dale Johannesen	161e897	2007-10-05 20:04:43 +0000	[diff] [blame]	111	Names[RTLIB::MUL_PPCF128] = "__gcc_qmul";
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	112	Names[RTLIB::DIV_F32] = "__divsf3";
				113	Names[RTLIB::DIV_F64] = "__divdf3";
Duncan Sands	007f984	2008-01-10 10:28:30 +0000	[diff] [blame]	114	Names[RTLIB::DIV_F80] = "__divxf3";
Dale Johannesen	161e897	2007-10-05 20:04:43 +0000	[diff] [blame]	115	Names[RTLIB::DIV_PPCF128] = "__gcc_qdiv";
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	116	Names[RTLIB::REM_F32] = "fmodf";
				117	Names[RTLIB::REM_F64] = "fmod";
Duncan Sands	007f984	2008-01-10 10:28:30 +0000	[diff] [blame]	118	Names[RTLIB::REM_F80] = "fmodl";
Dale Johannesen	161e897	2007-10-05 20:04:43 +0000	[diff] [blame]	119	Names[RTLIB::REM_PPCF128] = "fmodl";
Cameron Zwarich	3339084	2011-07-08 21:39:21 +0000	[diff] [blame]	120	Names[RTLIB::FMA_F32] = "fmaf";
				121	Names[RTLIB::FMA_F64] = "fma";
				122	Names[RTLIB::FMA_F80] = "fmal";
				123	Names[RTLIB::FMA_PPCF128] = "fmal";
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	124	Names[RTLIB::POWI_F32] = "__powisf2";
				125	Names[RTLIB::POWI_F64] = "__powidf2";
Dale Johannesen	161e897	2007-10-05 20:04:43 +0000	[diff] [blame]	126	Names[RTLIB::POWI_F80] = "__powixf2";
				127	Names[RTLIB::POWI_PPCF128] = "__powitf2";
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	128	Names[RTLIB::SQRT_F32] = "sqrtf";
				129	Names[RTLIB::SQRT_F64] = "sqrt";
Dale Johannesen	161e897	2007-10-05 20:04:43 +0000	[diff] [blame]	130	Names[RTLIB::SQRT_F80] = "sqrtl";
				131	Names[RTLIB::SQRT_PPCF128] = "sqrtl";
Dale Johannesen	7794f2a	2008-09-04 00:47:13 +0000	[diff] [blame]	132	Names[RTLIB::LOG_F32] = "logf";
				133	Names[RTLIB::LOG_F64] = "log";
				134	Names[RTLIB::LOG_F80] = "logl";
				135	Names[RTLIB::LOG_PPCF128] = "logl";
				136	Names[RTLIB::LOG2_F32] = "log2f";
				137	Names[RTLIB::LOG2_F64] = "log2";
				138	Names[RTLIB::LOG2_F80] = "log2l";
				139	Names[RTLIB::LOG2_PPCF128] = "log2l";
				140	Names[RTLIB::LOG10_F32] = "log10f";
				141	Names[RTLIB::LOG10_F64] = "log10";
				142	Names[RTLIB::LOG10_F80] = "log10l";
				143	Names[RTLIB::LOG10_PPCF128] = "log10l";
				144	Names[RTLIB::EXP_F32] = "expf";
				145	Names[RTLIB::EXP_F64] = "exp";
				146	Names[RTLIB::EXP_F80] = "expl";
				147	Names[RTLIB::EXP_PPCF128] = "expl";
				148	Names[RTLIB::EXP2_F32] = "exp2f";
				149	Names[RTLIB::EXP2_F64] = "exp2";
				150	Names[RTLIB::EXP2_F80] = "exp2l";
				151	Names[RTLIB::EXP2_PPCF128] = "exp2l";
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	152	Names[RTLIB::SIN_F32] = "sinf";
				153	Names[RTLIB::SIN_F64] = "sin";
Duncan Sands	007f984	2008-01-10 10:28:30 +0000	[diff] [blame]	154	Names[RTLIB::SIN_F80] = "sinl";
				155	Names[RTLIB::SIN_PPCF128] = "sinl";
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	156	Names[RTLIB::COS_F32] = "cosf";
				157	Names[RTLIB::COS_F64] = "cos";
Duncan Sands	007f984	2008-01-10 10:28:30 +0000	[diff] [blame]	158	Names[RTLIB::COS_F80] = "cosl";
				159	Names[RTLIB::COS_PPCF128] = "cosl";
Dan Gohman	e54be10	2007-10-11 23:09:10 +0000	[diff] [blame]	160	Names[RTLIB::POW_F32] = "powf";
				161	Names[RTLIB::POW_F64] = "pow";
				162	Names[RTLIB::POW_F80] = "powl";
				163	Names[RTLIB::POW_PPCF128] = "powl";
Dan Gohman	2bb1e3e	2008-08-21 18:38:14 +0000	[diff] [blame]	164	Names[RTLIB::CEIL_F32] = "ceilf";
				165	Names[RTLIB::CEIL_F64] = "ceil";
				166	Names[RTLIB::CEIL_F80] = "ceill";
				167	Names[RTLIB::CEIL_PPCF128] = "ceill";
				168	Names[RTLIB::TRUNC_F32] = "truncf";
				169	Names[RTLIB::TRUNC_F64] = "trunc";
				170	Names[RTLIB::TRUNC_F80] = "truncl";
				171	Names[RTLIB::TRUNC_PPCF128] = "truncl";
				172	Names[RTLIB::RINT_F32] = "rintf";
				173	Names[RTLIB::RINT_F64] = "rint";
				174	Names[RTLIB::RINT_F80] = "rintl";
				175	Names[RTLIB::RINT_PPCF128] = "rintl";
				176	Names[RTLIB::NEARBYINT_F32] = "nearbyintf";
				177	Names[RTLIB::NEARBYINT_F64] = "nearbyint";
				178	Names[RTLIB::NEARBYINT_F80] = "nearbyintl";
				179	Names[RTLIB::NEARBYINT_PPCF128] = "nearbyintl";
				180	Names[RTLIB::FLOOR_F32] = "floorf";
				181	Names[RTLIB::FLOOR_F64] = "floor";
				182	Names[RTLIB::FLOOR_F80] = "floorl";
				183	Names[RTLIB::FLOOR_PPCF128] = "floorl";
Duncan Sands	d2c817e	2010-03-14 21:08:40 +0000	[diff] [blame]	184	Names[RTLIB::COPYSIGN_F32] = "copysignf";
				185	Names[RTLIB::COPYSIGN_F64] = "copysign";
				186	Names[RTLIB::COPYSIGN_F80] = "copysignl";
				187	Names[RTLIB::COPYSIGN_PPCF128] = "copysignl";
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	188	Names[RTLIB::FPEXT_F32_F64] = "__extendsfdf2";
Anton Korobeynikov	927411b	2010-03-14 18:42:24 +0000	[diff] [blame]	189	Names[RTLIB::FPEXT_F16_F32] = "__gnu_h2f_ieee";
				190	Names[RTLIB::FPROUND_F32_F16] = "__gnu_f2h_ieee";
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	191	Names[RTLIB::FPROUND_F64_F32] = "__truncdfsf2";
Bruno Cardoso Lopes	e36bfe6	2008-08-07 19:01:24 +0000	[diff] [blame]	192	Names[RTLIB::FPROUND_F80_F32] = "__truncxfsf2";
				193	Names[RTLIB::FPROUND_PPCF128_F32] = "__trunctfsf2";
				194	Names[RTLIB::FPROUND_F80_F64] = "__truncxfdf2";
				195	Names[RTLIB::FPROUND_PPCF128_F64] = "__trunctfdf2";
Anton Korobeynikov	de0118c	2010-03-26 21:32:14 +0000	[diff] [blame]	196	Names[RTLIB::FPTOSINT_F32_I8] = "__fixsfqi";
				197	Names[RTLIB::FPTOSINT_F32_I16] = "__fixsfhi";
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	198	Names[RTLIB::FPTOSINT_F32_I32] = "__fixsfsi";
				199	Names[RTLIB::FPTOSINT_F32_I64] = "__fixsfdi";
Dan Gohman	a2e9485	2008-03-10 23:03:31 +0000	[diff] [blame]	200	Names[RTLIB::FPTOSINT_F32_I128] = "__fixsfti";
Anton Korobeynikov	de0118c	2010-03-26 21:32:14 +0000	[diff] [blame]	201	Names[RTLIB::FPTOSINT_F64_I8] = "__fixdfqi";
				202	Names[RTLIB::FPTOSINT_F64_I16] = "__fixdfhi";
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	203	Names[RTLIB::FPTOSINT_F64_I32] = "__fixdfsi";
				204	Names[RTLIB::FPTOSINT_F64_I64] = "__fixdfdi";
Dan Gohman	a2e9485	2008-03-10 23:03:31 +0000	[diff] [blame]	205	Names[RTLIB::FPTOSINT_F64_I128] = "__fixdfti";
Duncan Sands	be1ad4d	2008-07-10 15:33:02 +0000	[diff] [blame]	206	Names[RTLIB::FPTOSINT_F80_I32] = "__fixxfsi";
Dale Johannesen	161e897	2007-10-05 20:04:43 +0000	[diff] [blame]	207	Names[RTLIB::FPTOSINT_F80_I64] = "__fixxfdi";
Dan Gohman	a2e9485	2008-03-10 23:03:31 +0000	[diff] [blame]	208	Names[RTLIB::FPTOSINT_F80_I128] = "__fixxfti";
Duncan Sands	041cde2	2008-06-25 20:24:48 +0000	[diff] [blame]	209	Names[RTLIB::FPTOSINT_PPCF128_I32] = "__fixtfsi";
Dale Johannesen	161e897	2007-10-05 20:04:43 +0000	[diff] [blame]	210	Names[RTLIB::FPTOSINT_PPCF128_I64] = "__fixtfdi";
Dan Gohman	a2e9485	2008-03-10 23:03:31 +0000	[diff] [blame]	211	Names[RTLIB::FPTOSINT_PPCF128_I128] = "__fixtfti";
Anton Korobeynikov	de0118c	2010-03-26 21:32:14 +0000	[diff] [blame]	212	Names[RTLIB::FPTOUINT_F32_I8] = "__fixunssfqi";
				213	Names[RTLIB::FPTOUINT_F32_I16] = "__fixunssfhi";
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	214	Names[RTLIB::FPTOUINT_F32_I32] = "__fixunssfsi";
				215	Names[RTLIB::FPTOUINT_F32_I64] = "__fixunssfdi";
Dan Gohman	a2e9485	2008-03-10 23:03:31 +0000	[diff] [blame]	216	Names[RTLIB::FPTOUINT_F32_I128] = "__fixunssfti";
Anton Korobeynikov	de0118c	2010-03-26 21:32:14 +0000	[diff] [blame]	217	Names[RTLIB::FPTOUINT_F64_I8] = "__fixunsdfqi";
				218	Names[RTLIB::FPTOUINT_F64_I16] = "__fixunsdfhi";
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	219	Names[RTLIB::FPTOUINT_F64_I32] = "__fixunsdfsi";
				220	Names[RTLIB::FPTOUINT_F64_I64] = "__fixunsdfdi";
Dan Gohman	a2e9485	2008-03-10 23:03:31 +0000	[diff] [blame]	221	Names[RTLIB::FPTOUINT_F64_I128] = "__fixunsdfti";
Dale Johannesen	161e897	2007-10-05 20:04:43 +0000	[diff] [blame]	222	Names[RTLIB::FPTOUINT_F80_I32] = "__fixunsxfsi";
				223	Names[RTLIB::FPTOUINT_F80_I64] = "__fixunsxfdi";
Dan Gohman	a2e9485	2008-03-10 23:03:31 +0000	[diff] [blame]	224	Names[RTLIB::FPTOUINT_F80_I128] = "__fixunsxfti";
Duncan Sands	041cde2	2008-06-25 20:24:48 +0000	[diff] [blame]	225	Names[RTLIB::FPTOUINT_PPCF128_I32] = "__fixunstfsi";
Dale Johannesen	161e897	2007-10-05 20:04:43 +0000	[diff] [blame]	226	Names[RTLIB::FPTOUINT_PPCF128_I64] = "__fixunstfdi";
Dan Gohman	a2e9485	2008-03-10 23:03:31 +0000	[diff] [blame]	227	Names[RTLIB::FPTOUINT_PPCF128_I128] = "__fixunstfti";
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	228	Names[RTLIB::SINTTOFP_I32_F32] = "__floatsisf";
				229	Names[RTLIB::SINTTOFP_I32_F64] = "__floatsidf";
Duncan Sands	9bed0f5	2008-07-11 16:57:02 +0000	[diff] [blame]	230	Names[RTLIB::SINTTOFP_I32_F80] = "__floatsixf";
				231	Names[RTLIB::SINTTOFP_I32_PPCF128] = "__floatsitf";
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	232	Names[RTLIB::SINTTOFP_I64_F32] = "__floatdisf";
				233	Names[RTLIB::SINTTOFP_I64_F64] = "__floatdidf";
Dale Johannesen	161e897	2007-10-05 20:04:43 +0000	[diff] [blame]	234	Names[RTLIB::SINTTOFP_I64_F80] = "__floatdixf";
				235	Names[RTLIB::SINTTOFP_I64_PPCF128] = "__floatditf";
Dan Gohman	d91446d	2008-03-05 01:08:17 +0000	[diff] [blame]	236	Names[RTLIB::SINTTOFP_I128_F32] = "__floattisf";
				237	Names[RTLIB::SINTTOFP_I128_F64] = "__floattidf";
				238	Names[RTLIB::SINTTOFP_I128_F80] = "__floattixf";
				239	Names[RTLIB::SINTTOFP_I128_PPCF128] = "__floattitf";
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	240	Names[RTLIB::UINTTOFP_I32_F32] = "__floatunsisf";
				241	Names[RTLIB::UINTTOFP_I32_F64] = "__floatunsidf";
Duncan Sands	ac6cece	2008-07-11 17:00:14 +0000	[diff] [blame]	242	Names[RTLIB::UINTTOFP_I32_F80] = "__floatunsixf";
				243	Names[RTLIB::UINTTOFP_I32_PPCF128] = "__floatunsitf";
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	244	Names[RTLIB::UINTTOFP_I64_F32] = "__floatundisf";
				245	Names[RTLIB::UINTTOFP_I64_F64] = "__floatundidf";
Duncan Sands	ac6cece	2008-07-11 17:00:14 +0000	[diff] [blame]	246	Names[RTLIB::UINTTOFP_I64_F80] = "__floatundixf";
				247	Names[RTLIB::UINTTOFP_I64_PPCF128] = "__floatunditf";
				248	Names[RTLIB::UINTTOFP_I128_F32] = "__floatuntisf";
				249	Names[RTLIB::UINTTOFP_I128_F64] = "__floatuntidf";
				250	Names[RTLIB::UINTTOFP_I128_F80] = "__floatuntixf";
				251	Names[RTLIB::UINTTOFP_I128_PPCF128] = "__floatuntitf";
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	252	Names[RTLIB::OEQ_F32] = "__eqsf2";
				253	Names[RTLIB::OEQ_F64] = "__eqdf2";
				254	Names[RTLIB::UNE_F32] = "__nesf2";
				255	Names[RTLIB::UNE_F64] = "__nedf2";
				256	Names[RTLIB::OGE_F32] = "__gesf2";
				257	Names[RTLIB::OGE_F64] = "__gedf2";
				258	Names[RTLIB::OLT_F32] = "__ltsf2";
				259	Names[RTLIB::OLT_F64] = "__ltdf2";
				260	Names[RTLIB::OLE_F32] = "__lesf2";
				261	Names[RTLIB::OLE_F64] = "__ledf2";
				262	Names[RTLIB::OGT_F32] = "__gtsf2";
				263	Names[RTLIB::OGT_F64] = "__gtdf2";
				264	Names[RTLIB::UO_F32] = "__unordsf2";
				265	Names[RTLIB::UO_F64] = "__unorddf2";
Evan Cheng	d385fd6	2007-01-31 09:29:11 +0000	[diff] [blame]	266	Names[RTLIB::O_F32] = "__unordsf2";
				267	Names[RTLIB::O_F64] = "__unorddf2";
Sanjiv Gupta	a114baa	2009-07-30 09:12:56 +0000	[diff] [blame]	268	Names[RTLIB::MEMCPY] = "memcpy";
				269	Names[RTLIB::MEMMOVE] = "memmove";
				270	Names[RTLIB::MEMSET] = "memset";
Duncan Sands	b0f1e17	2009-05-22 20:36:31 +0000	[diff] [blame]	271	Names[RTLIB::UNWIND_RESUME] = "_Unwind_Resume";
Jim Grosbach	e03262f	2010-06-18 21:43:38 +0000	[diff] [blame]	272	Names[RTLIB::SYNC_VAL_COMPARE_AND_SWAP_1] = "__sync_val_compare_and_swap_1";
				273	Names[RTLIB::SYNC_VAL_COMPARE_AND_SWAP_2] = "__sync_val_compare_and_swap_2";
				274	Names[RTLIB::SYNC_VAL_COMPARE_AND_SWAP_4] = "__sync_val_compare_and_swap_4";
				275	Names[RTLIB::SYNC_VAL_COMPARE_AND_SWAP_8] = "__sync_val_compare_and_swap_8";
Jim Grosbach	ef6eb9c	2010-06-18 23:03:10 +0000	[diff] [blame]	276	Names[RTLIB::SYNC_LOCK_TEST_AND_SET_1] = "__sync_lock_test_and_set_1";
				277	Names[RTLIB::SYNC_LOCK_TEST_AND_SET_2] = "__sync_lock_test_and_set_2";
				278	Names[RTLIB::SYNC_LOCK_TEST_AND_SET_4] = "__sync_lock_test_and_set_4";
				279	Names[RTLIB::SYNC_LOCK_TEST_AND_SET_8] = "__sync_lock_test_and_set_8";
Jim Grosbach	e03262f	2010-06-18 21:43:38 +0000	[diff] [blame]	280	Names[RTLIB::SYNC_FETCH_AND_ADD_1] = "__sync_fetch_and_add_1";
				281	Names[RTLIB::SYNC_FETCH_AND_ADD_2] = "__sync_fetch_and_add_2";
				282	Names[RTLIB::SYNC_FETCH_AND_ADD_4] = "__sync_fetch_and_add_4";
				283	Names[RTLIB::SYNC_FETCH_AND_ADD_8] = "__sync_fetch_and_add_8";
				284	Names[RTLIB::SYNC_FETCH_AND_SUB_1] = "__sync_fetch_and_sub_1";
				285	Names[RTLIB::SYNC_FETCH_AND_SUB_2] = "__sync_fetch_and_sub_2";
				286	Names[RTLIB::SYNC_FETCH_AND_SUB_4] = "__sync_fetch_and_sub_4";
				287	Names[RTLIB::SYNC_FETCH_AND_SUB_8] = "__sync_fetch_and_sub_8";
				288	Names[RTLIB::SYNC_FETCH_AND_AND_1] = "__sync_fetch_and_and_1";
				289	Names[RTLIB::SYNC_FETCH_AND_AND_2] = "__sync_fetch_and_and_2";
				290	Names[RTLIB::SYNC_FETCH_AND_AND_4] = "__sync_fetch_and_and_4";
				291	Names[RTLIB::SYNC_FETCH_AND_AND_8] = "__sync_fetch_and_and_8";
				292	Names[RTLIB::SYNC_FETCH_AND_OR_1] = "__sync_fetch_and_or_1";
				293	Names[RTLIB::SYNC_FETCH_AND_OR_2] = "__sync_fetch_and_or_2";
				294	Names[RTLIB::SYNC_FETCH_AND_OR_4] = "__sync_fetch_and_or_4";
				295	Names[RTLIB::SYNC_FETCH_AND_OR_8] = "__sync_fetch_and_or_8";
				296	Names[RTLIB::SYNC_FETCH_AND_XOR_1] = "__sync_fetch_and_xor_1";
				297	Names[RTLIB::SYNC_FETCH_AND_XOR_2] = "__sync_fetch_and_xor_2";
Jim Grosbach	312b7c9	2011-10-14 15:53:48 +0000	[diff] [blame]	298	Names[RTLIB::SYNC_FETCH_AND_XOR_4] = "__sync_fetch_and_xor_4";
Jim Grosbach	e03262f	2010-06-18 21:43:38 +0000	[diff] [blame]	299	Names[RTLIB::SYNC_FETCH_AND_XOR_8] = "__sync_fetch_and_xor_8";
				300	Names[RTLIB::SYNC_FETCH_AND_NAND_1] = "__sync_fetch_and_nand_1";
				301	Names[RTLIB::SYNC_FETCH_AND_NAND_2] = "__sync_fetch_and_nand_2";
				302	Names[RTLIB::SYNC_FETCH_AND_NAND_4] = "__sync_fetch_and_nand_4";
				303	Names[RTLIB::SYNC_FETCH_AND_NAND_8] = "__sync_fetch_and_nand_8";
Evan Cheng	d385fd6	2007-01-31 09:29:11 +0000	[diff] [blame]	304	}
				305
Anton Korobeynikov	72977a4	2009-08-14 20:10:52 +0000	[diff] [blame]	306	/// InitLibcallCallingConvs - Set default libcall CallingConvs.
				307	///
				308	static void InitLibcallCallingConvs(CallingConv::ID *CCs) {
				309	for (int i = 0; i < RTLIB::UNKNOWN_LIBCALL; ++i) {
				310	CCs[i] = CallingConv::C;
				311	}
				312	}
				313
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	314	/// getFPEXT - Return the FPEXT__ value for the given types, or
				315	/// UNKNOWN_LIBCALL if there is none.
Owen Anderson	e50ed30	2009-08-10 22:56:29 +0000	[diff] [blame]	316	RTLIB::Libcall RTLIB::getFPEXT(EVT OpVT, EVT RetVT) {
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	317	if (OpVT == MVT::f32) {
				318	if (RetVT == MVT::f64)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	319	return FPEXT_F32_F64;
				320	}
Anton Korobeynikov	927411b	2010-03-14 18:42:24 +0000	[diff] [blame]	321
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	322	return UNKNOWN_LIBCALL;
				323	}
				324
				325	/// getFPROUND - Return the FPROUND__ value for the given types, or
				326	/// UNKNOWN_LIBCALL if there is none.
Owen Anderson	e50ed30	2009-08-10 22:56:29 +0000	[diff] [blame]	327	RTLIB::Libcall RTLIB::getFPROUND(EVT OpVT, EVT RetVT) {
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	328	if (RetVT == MVT::f32) {
				329	if (OpVT == MVT::f64)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	330	return FPROUND_F64_F32;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	331	if (OpVT == MVT::f80)
Bruno Cardoso Lopes	e36bfe6	2008-08-07 19:01:24 +0000	[diff] [blame]	332	return FPROUND_F80_F32;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	333	if (OpVT == MVT::ppcf128)
Bruno Cardoso Lopes	e36bfe6	2008-08-07 19:01:24 +0000	[diff] [blame]	334	return FPROUND_PPCF128_F32;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	335	} else if (RetVT == MVT::f64) {
				336	if (OpVT == MVT::f80)
Bruno Cardoso Lopes	e36bfe6	2008-08-07 19:01:24 +0000	[diff] [blame]	337	return FPROUND_F80_F64;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	338	if (OpVT == MVT::ppcf128)
Bruno Cardoso Lopes	e36bfe6	2008-08-07 19:01:24 +0000	[diff] [blame]	339	return FPROUND_PPCF128_F64;
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	340	}
Anton Korobeynikov	927411b	2010-03-14 18:42:24 +0000	[diff] [blame]	341
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	342	return UNKNOWN_LIBCALL;
				343	}
				344
				345	/// getFPTOSINT - Return the FPTOSINT__ value for the given types, or
				346	/// UNKNOWN_LIBCALL if there is none.
Owen Anderson	e50ed30	2009-08-10 22:56:29 +0000	[diff] [blame]	347	RTLIB::Libcall RTLIB::getFPTOSINT(EVT OpVT, EVT RetVT) {
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	348	if (OpVT == MVT::f32) {
				349	if (RetVT == MVT::i8)
Sanjiv Gupta	8aa207e	2009-06-16 09:03:58 +0000	[diff] [blame]	350	return FPTOSINT_F32_I8;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	351	if (RetVT == MVT::i16)
Sanjiv Gupta	8aa207e	2009-06-16 09:03:58 +0000	[diff] [blame]	352	return FPTOSINT_F32_I16;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	353	if (RetVT == MVT::i32)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	354	return FPTOSINT_F32_I32;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	355	if (RetVT == MVT::i64)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	356	return FPTOSINT_F32_I64;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	357	if (RetVT == MVT::i128)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	358	return FPTOSINT_F32_I128;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	359	} else if (OpVT == MVT::f64) {
Anton Korobeynikov	de0118c	2010-03-26 21:32:14 +0000	[diff] [blame]	360	if (RetVT == MVT::i8)
				361	return FPTOSINT_F64_I8;
				362	if (RetVT == MVT::i16)
				363	return FPTOSINT_F64_I16;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	364	if (RetVT == MVT::i32)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	365	return FPTOSINT_F64_I32;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	366	if (RetVT == MVT::i64)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	367	return FPTOSINT_F64_I64;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	368	if (RetVT == MVT::i128)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	369	return FPTOSINT_F64_I128;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	370	} else if (OpVT == MVT::f80) {
				371	if (RetVT == MVT::i32)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	372	return FPTOSINT_F80_I32;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	373	if (RetVT == MVT::i64)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	374	return FPTOSINT_F80_I64;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	375	if (RetVT == MVT::i128)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	376	return FPTOSINT_F80_I128;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	377	} else if (OpVT == MVT::ppcf128) {
				378	if (RetVT == MVT::i32)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	379	return FPTOSINT_PPCF128_I32;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	380	if (RetVT == MVT::i64)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	381	return FPTOSINT_PPCF128_I64;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	382	if (RetVT == MVT::i128)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	383	return FPTOSINT_PPCF128_I128;
				384	}
				385	return UNKNOWN_LIBCALL;
				386	}
				387
				388	/// getFPTOUINT - Return the FPTOUINT__ value for the given types, or
				389	/// UNKNOWN_LIBCALL if there is none.
Owen Anderson	e50ed30	2009-08-10 22:56:29 +0000	[diff] [blame]	390	RTLIB::Libcall RTLIB::getFPTOUINT(EVT OpVT, EVT RetVT) {
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	391	if (OpVT == MVT::f32) {
				392	if (RetVT == MVT::i8)
Sanjiv Gupta	8aa207e	2009-06-16 09:03:58 +0000	[diff] [blame]	393	return FPTOUINT_F32_I8;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	394	if (RetVT == MVT::i16)
Sanjiv Gupta	8aa207e	2009-06-16 09:03:58 +0000	[diff] [blame]	395	return FPTOUINT_F32_I16;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	396	if (RetVT == MVT::i32)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	397	return FPTOUINT_F32_I32;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	398	if (RetVT == MVT::i64)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	399	return FPTOUINT_F32_I64;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	400	if (RetVT == MVT::i128)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	401	return FPTOUINT_F32_I128;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	402	} else if (OpVT == MVT::f64) {
Anton Korobeynikov	de0118c	2010-03-26 21:32:14 +0000	[diff] [blame]	403	if (RetVT == MVT::i8)
				404	return FPTOUINT_F64_I8;
				405	if (RetVT == MVT::i16)
				406	return FPTOUINT_F64_I16;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	407	if (RetVT == MVT::i32)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	408	return FPTOUINT_F64_I32;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	409	if (RetVT == MVT::i64)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	410	return FPTOUINT_F64_I64;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	411	if (RetVT == MVT::i128)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	412	return FPTOUINT_F64_I128;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	413	} else if (OpVT == MVT::f80) {
				414	if (RetVT == MVT::i32)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	415	return FPTOUINT_F80_I32;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	416	if (RetVT == MVT::i64)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	417	return FPTOUINT_F80_I64;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	418	if (RetVT == MVT::i128)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	419	return FPTOUINT_F80_I128;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	420	} else if (OpVT == MVT::ppcf128) {
				421	if (RetVT == MVT::i32)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	422	return FPTOUINT_PPCF128_I32;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	423	if (RetVT == MVT::i64)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	424	return FPTOUINT_PPCF128_I64;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	425	if (RetVT == MVT::i128)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	426	return FPTOUINT_PPCF128_I128;
				427	}
				428	return UNKNOWN_LIBCALL;
				429	}
				430
				431	/// getSINTTOFP - Return the SINTTOFP__ value for the given types, or
				432	/// UNKNOWN_LIBCALL if there is none.
Owen Anderson	e50ed30	2009-08-10 22:56:29 +0000	[diff] [blame]	433	RTLIB::Libcall RTLIB::getSINTTOFP(EVT OpVT, EVT RetVT) {
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	434	if (OpVT == MVT::i32) {
				435	if (RetVT == MVT::f32)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	436	return SINTTOFP_I32_F32;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	437	else if (RetVT == MVT::f64)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	438	return SINTTOFP_I32_F64;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	439	else if (RetVT == MVT::f80)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	440	return SINTTOFP_I32_F80;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	441	else if (RetVT == MVT::ppcf128)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	442	return SINTTOFP_I32_PPCF128;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	443	} else if (OpVT == MVT::i64) {
				444	if (RetVT == MVT::f32)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	445	return SINTTOFP_I64_F32;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	446	else if (RetVT == MVT::f64)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	447	return SINTTOFP_I64_F64;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	448	else if (RetVT == MVT::f80)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	449	return SINTTOFP_I64_F80;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	450	else if (RetVT == MVT::ppcf128)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	451	return SINTTOFP_I64_PPCF128;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	452	} else if (OpVT == MVT::i128) {
				453	if (RetVT == MVT::f32)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	454	return SINTTOFP_I128_F32;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	455	else if (RetVT == MVT::f64)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	456	return SINTTOFP_I128_F64;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	457	else if (RetVT == MVT::f80)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	458	return SINTTOFP_I128_F80;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	459	else if (RetVT == MVT::ppcf128)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	460	return SINTTOFP_I128_PPCF128;
				461	}
				462	return UNKNOWN_LIBCALL;
				463	}
				464
				465	/// getUINTTOFP - Return the UINTTOFP__ value for the given types, or
				466	/// UNKNOWN_LIBCALL if there is none.
Owen Anderson	e50ed30	2009-08-10 22:56:29 +0000	[diff] [blame]	467	RTLIB::Libcall RTLIB::getUINTTOFP(EVT OpVT, EVT RetVT) {
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	468	if (OpVT == MVT::i32) {
				469	if (RetVT == MVT::f32)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	470	return UINTTOFP_I32_F32;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	471	else if (RetVT == MVT::f64)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	472	return UINTTOFP_I32_F64;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	473	else if (RetVT == MVT::f80)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	474	return UINTTOFP_I32_F80;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	475	else if (RetVT == MVT::ppcf128)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	476	return UINTTOFP_I32_PPCF128;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	477	} else if (OpVT == MVT::i64) {
				478	if (RetVT == MVT::f32)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	479	return UINTTOFP_I64_F32;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	480	else if (RetVT == MVT::f64)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	481	return UINTTOFP_I64_F64;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	482	else if (RetVT == MVT::f80)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	483	return UINTTOFP_I64_F80;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	484	else if (RetVT == MVT::ppcf128)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	485	return UINTTOFP_I64_PPCF128;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	486	} else if (OpVT == MVT::i128) {
				487	if (RetVT == MVT::f32)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	488	return UINTTOFP_I128_F32;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	489	else if (RetVT == MVT::f64)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	490	return UINTTOFP_I128_F64;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	491	else if (RetVT == MVT::f80)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	492	return UINTTOFP_I128_F80;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	493	else if (RetVT == MVT::ppcf128)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	494	return UINTTOFP_I128_PPCF128;
				495	}
				496	return UNKNOWN_LIBCALL;
				497	}
				498
Evan Cheng	d385fd6	2007-01-31 09:29:11 +0000	[diff] [blame]	499	/// InitCmpLibcallCCs - Set default comparison libcall CC.
				500	///
				501	static void InitCmpLibcallCCs(ISD::CondCode *CCs) {
				502	memset(CCs, ISD::SETCC_INVALID, sizeof(ISD::CondCode)*RTLIB::UNKNOWN_LIBCALL);
				503	CCs[RTLIB::OEQ_F32] = ISD::SETEQ;
				504	CCs[RTLIB::OEQ_F64] = ISD::SETEQ;
				505	CCs[RTLIB::UNE_F32] = ISD::SETNE;
				506	CCs[RTLIB::UNE_F64] = ISD::SETNE;
				507	CCs[RTLIB::OGE_F32] = ISD::SETGE;
				508	CCs[RTLIB::OGE_F64] = ISD::SETGE;
				509	CCs[RTLIB::OLT_F32] = ISD::SETLT;
				510	CCs[RTLIB::OLT_F64] = ISD::SETLT;
				511	CCs[RTLIB::OLE_F32] = ISD::SETLE;
				512	CCs[RTLIB::OLE_F64] = ISD::SETLE;
				513	CCs[RTLIB::OGT_F32] = ISD::SETGT;
				514	CCs[RTLIB::OGT_F64] = ISD::SETGT;
				515	CCs[RTLIB::UO_F32] = ISD::SETNE;
				516	CCs[RTLIB::UO_F64] = ISD::SETNE;
				517	CCs[RTLIB::O_F32] = ISD::SETEQ;
				518	CCs[RTLIB::O_F64] = ISD::SETEQ;
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	519	}
				520
Chris Lattner	f014412	2009-07-28 03:13:23 +0000	[diff] [blame]	521	/// NOTE: The constructor takes ownership of TLOF.
Dan Gohman	f0757b0	2010-04-21 01:34:56 +0000	[diff] [blame]	522	TargetLowering::TargetLowering(const TargetMachine &tm,
				523	const TargetLoweringObjectFile *tlof)
Nadav Rotem	b6fbec3	2011-06-01 12:51:46 +0000	[diff] [blame]	524	: TM(tm), TD(TM.getTargetData()), TLOF(*tlof),
				525	mayPromoteElements(AllowPromoteIntElem) {
Chris Lattner	cba82f9	2005-01-16 07:28:11 +0000	[diff] [blame]	526	// All operations default to being supported.
				527	memset(OpActions, 0, sizeof(OpActions));
Evan Cheng	0329466	2008-10-14 21:26:46 +0000	[diff] [blame]	528	memset(LoadExtActions, 0, sizeof(LoadExtActions));
Chris Lattner	ddf8956	2008-01-17 19:59:44 +0000	[diff] [blame]	529	memset(TruncStoreActions, 0, sizeof(TruncStoreActions));
Chris Lattner	c9133f9	2008-01-18 19:36:20 +0000	[diff] [blame]	530	memset(IndexedModeActions, 0, sizeof(IndexedModeActions));
Evan Cheng	7f04268	2008-10-15 02:05:31 +0000	[diff] [blame]	531	memset(CondCodeActions, 0, sizeof(CondCodeActions));
Dan Gohman	93f81e2	2007-07-09 20:49:44 +0000	[diff] [blame]	532
Chris Lattner	1a3048b	2007-12-22 20:47:56 +0000	[diff] [blame]	533	// Set default actions for various operations.
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	534	for (unsigned VT = 0; VT != (unsigned)MVT::LAST_VALUETYPE; ++VT) {
Chris Lattner	1a3048b	2007-12-22 20:47:56 +0000	[diff] [blame]	535	// Default all indexed load / store to expand.
Evan Cheng	5ff839f	2006-11-09 18:56:43 +0000	[diff] [blame]	536	for (unsigned IM = (unsigned)ISD::PRE_INC;
				537	IM != (unsigned)ISD::LAST_INDEXED_MODE; ++IM) {
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	538	setIndexedLoadAction(IM, (MVT::SimpleValueType)VT, Expand);
				539	setIndexedStoreAction(IM, (MVT::SimpleValueType)VT, Expand);
Evan Cheng	5ff839f	2006-11-09 18:56:43 +0000	[diff] [blame]	540	}
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	541
Chris Lattner	1a3048b	2007-12-22 20:47:56 +0000	[diff] [blame]	542	// These operations default to expand.
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	543	setOperationAction(ISD::FGETSIGN, (MVT::SimpleValueType)VT, Expand);
				544	setOperationAction(ISD::CONCAT_VECTORS, (MVT::SimpleValueType)VT, Expand);
Evan Cheng	5ff839f	2006-11-09 18:56:43 +0000	[diff] [blame]	545	}
Evan Cheng	d2cde68	2008-03-10 19:38:10 +0000	[diff] [blame]	546
				547	// Most targets ignore the @llvm.prefetch intrinsic.
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	548	setOperationAction(ISD::PREFETCH, MVT::Other, Expand);
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	549
				550	// ConstantFP nodes default to expand. Targets can either change this to
Evan Cheng	eb2f969	2009-10-27 19:56:55 +0000	[diff] [blame]	551	// Legal, in which case all fp constants are legal, or use isFPImmLegal()
Nate Begeman	e179584	2008-02-14 08:57:00 +0000	[diff] [blame]	552	// to optimize expansions for certain constants.
Dan Gohman	e3376ec	2011-12-20 00:02:33 +0000	[diff] [blame]	553	setOperationAction(ISD::ConstantFP, MVT::f16, Expand);
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	554	setOperationAction(ISD::ConstantFP, MVT::f32, Expand);
				555	setOperationAction(ISD::ConstantFP, MVT::f64, Expand);
				556	setOperationAction(ISD::ConstantFP, MVT::f80, Expand);
Chris Lattner	310968c	2005-01-07 07:44:53 +0000	[diff] [blame]	557
Dale Johannesen	0bb4160	2008-09-22 21:57:32 +0000	[diff] [blame]	558	// These library functions default to expand.
Dan Gohman	e3376ec	2011-12-20 00:02:33 +0000	[diff] [blame]	559	setOperationAction(ISD::FLOG , MVT::f16, Expand);
				560	setOperationAction(ISD::FLOG2, MVT::f16, Expand);
				561	setOperationAction(ISD::FLOG10, MVT::f16, Expand);
				562	setOperationAction(ISD::FEXP , MVT::f16, Expand);
				563	setOperationAction(ISD::FEXP2, MVT::f16, Expand);
				564	setOperationAction(ISD::FFLOOR, MVT::f16, Expand);
				565	setOperationAction(ISD::FNEARBYINT, MVT::f16, Expand);
				566	setOperationAction(ISD::FCEIL, MVT::f16, Expand);
				567	setOperationAction(ISD::FRINT, MVT::f16, Expand);
				568	setOperationAction(ISD::FTRUNC, MVT::f16, Expand);
Owen Anderson	4a4fdf3	2011-12-08 19:32:14 +0000	[diff] [blame]	569	setOperationAction(ISD::FLOG , MVT::f32, Expand);
				570	setOperationAction(ISD::FLOG2, MVT::f32, Expand);
				571	setOperationAction(ISD::FLOG10, MVT::f32, Expand);
				572	setOperationAction(ISD::FEXP , MVT::f32, Expand);
				573	setOperationAction(ISD::FEXP2, MVT::f32, Expand);
				574	setOperationAction(ISD::FFLOOR, MVT::f32, Expand);
				575	setOperationAction(ISD::FNEARBYINT, MVT::f32, Expand);
				576	setOperationAction(ISD::FCEIL, MVT::f32, Expand);
				577	setOperationAction(ISD::FRINT, MVT::f32, Expand);
				578	setOperationAction(ISD::FTRUNC, MVT::f32, Expand);
Dan Gohman	e3376ec	2011-12-20 00:02:33 +0000	[diff] [blame]	579	setOperationAction(ISD::FLOG , MVT::f64, Expand);
				580	setOperationAction(ISD::FLOG2, MVT::f64, Expand);
				581	setOperationAction(ISD::FLOG10, MVT::f64, Expand);
				582	setOperationAction(ISD::FEXP , MVT::f64, Expand);
				583	setOperationAction(ISD::FEXP2, MVT::f64, Expand);
				584	setOperationAction(ISD::FFLOOR, MVT::f64, Expand);
				585	setOperationAction(ISD::FNEARBYINT, MVT::f64, Expand);
				586	setOperationAction(ISD::FCEIL, MVT::f64, Expand);
				587	setOperationAction(ISD::FRINT, MVT::f64, Expand);
				588	setOperationAction(ISD::FTRUNC, MVT::f64, Expand);
Dale Johannesen	0bb4160	2008-09-22 21:57:32 +0000	[diff] [blame]	589
Chris Lattner	41bab0b	2008-01-15 21:58:08 +0000	[diff] [blame]	590	// Default ISD::TRAP to expand (which turns it into abort).
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	591	setOperationAction(ISD::TRAP, MVT::Other, Expand);
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	592
Owen Anderson	a69571c	2006-05-03 01:29:57 +0000	[diff] [blame]	593	IsLittleEndian = TD->isLittleEndian();
Owen Anderson	95771af	2011-02-25 21:41:48 +0000	[diff] [blame]	594	PointerTy = MVT::getIntegerVT(8*TD->getPointerSize());
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	595	memset(RegClassForVT, 0,MVT::LAST_VALUETYPEsizeof(TargetRegisterClass));
Owen Anderson	718cb66	2007-09-07 04:06:50 +0000	[diff] [blame]	596	memset(TargetDAGCombineArray, 0, array_lengthof(TargetDAGCombineArray));
Evan Cheng	a03a5dc	2006-02-14 08:38:30 +0000	[diff] [blame]	597	maxStoresPerMemset = maxStoresPerMemcpy = maxStoresPerMemmove = 8;
Evan Cheng	0521928	2011-01-06 06:52:41 +0000	[diff] [blame]	598	maxStoresPerMemsetOptSize = maxStoresPerMemcpyOptSize
				599	= maxStoresPerMemmoveOptSize = 4;
Evan Cheng	6ebf7bc	2009-05-13 21:42:09 +0000	[diff] [blame]	600	benefitFromCodePlacementOpt = false;
Anton Korobeynikov	d27a258	2006-12-10 23:12:42 +0000	[diff] [blame]	601	UseUnderscoreSetJmp = false;
				602	UseUnderscoreLongJmp = false;
Chris Lattner	6618039	2007-02-25 01:28:05 +0000	[diff] [blame]	603	SelectIsExpensive = false;
Nate Begeman	405e3ec	2005-10-21 00:02:42 +0000	[diff] [blame]	604	IntDivIsCheap = false;
				605	Pow2DivIsCheap = false;
Chris Lattner	de189be	2010-11-30 18:12:52 +0000	[diff] [blame]	606	JumpIsExpensive = false;
Chris Lattner	ee4a765	2006-01-25 18:57:15 +0000	[diff] [blame]	607	StackPointerRegisterToSaveRestore = 0;
Jim Laskey	9bb3c93	2007-02-22 18:04:49 +0000	[diff] [blame]	608	ExceptionPointerRegister = 0;
				609	ExceptionSelectorRegister = 0;
Duncan Sands	0322808	2008-11-23 15:47:28 +0000	[diff] [blame]	610	BooleanContents = UndefinedBooleanContent;
Duncan Sands	28b77e9	2011-09-06 19:07:46 +0000	[diff] [blame]	611	BooleanVectorContents = UndefinedBooleanContent;
Dan Gohman	8c2d270	2011-10-24 17:45:02 +0000	[diff] [blame]	612	SchedPreferenceInfo = Sched::ILP;
Chris Lattner	7acf5f3	2006-09-05 17:39:15 +0000	[diff] [blame]	613	JumpBufSize = 0;
Duraid Madina	0c9e0ff	2006-09-04 07:44:11 +0000	[diff] [blame]	614	JumpBufAlignment = 0;
Eli Friedman	fc5d305	2011-05-06 20:34:06 +0000	[diff] [blame]	615	MinFunctionAlignment = 0;
				616	PrefFunctionAlignment = 0;
Evan Cheng	fb8075d	2008-02-28 00:43:03 +0000	[diff] [blame]	617	PrefLoopAlignment = 0;
Rafael Espindola	cbeeae2	2010-07-11 04:01:49 +0000	[diff] [blame]	618	MinStackArgumentAlignment = 1;
Jim Grosbach	9a52649	2010-06-23 16:07:42 +0000	[diff] [blame]	619	ShouldFoldAtomicFences = false;
Eli Friedman	26689ac	2011-08-03 21:06:02 +0000	[diff] [blame]	620	InsertFencesForAtomic = false;
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	621
				622	InitLibcallNames(LibcallRoutineNames);
Evan Cheng	d385fd6	2007-01-31 09:29:11 +0000	[diff] [blame]	623	InitCmpLibcallCCs(CmpLibcallCCs);
Anton Korobeynikov	72977a4	2009-08-14 20:10:52 +0000	[diff] [blame]	624	InitLibcallCallingConvs(LibcallCallingConvs);
Chris Lattner	310968c	2005-01-07 07:44:53 +0000	[diff] [blame]	625	}
				626
Chris Lattner	f014412	2009-07-28 03:13:23 +0000	[diff] [blame]	627	TargetLowering::~TargetLowering() {
				628	delete &TLOF;
				629	}
Chris Lattner	cba82f9	2005-01-16 07:28:11 +0000	[diff] [blame]	630
Owen Anderson	95771af	2011-02-25 21:41:48 +0000	[diff] [blame]	631	MVT TargetLowering::getShiftAmountTy(EVT LHSTy) const {
				632	return MVT::getIntegerVT(8*TD->getPointerSize());
				633	}
				634
Mon P Wang	f7ea6c3	2010-02-10 23:37:45 +0000	[diff] [blame]	635	/// canOpTrap - Returns true if the operation can trap for the value type.
				636	/// VT must be a legal type.
				637	bool TargetLowering::canOpTrap(unsigned Op, EVT VT) const {
				638	assert(isTypeLegal(VT));
				639	switch (Op) {
				640	default:
				641	return false;
				642	case ISD::FDIV:
				643	case ISD::FREM:
				644	case ISD::SDIV:
				645	case ISD::UDIV:
				646	case ISD::SREM:
				647	case ISD::UREM:
				648	return true;
				649	}
				650	}
				651
				652
Owen Anderson	23b9b19	2009-08-12 00:36:31 +0000	[diff] [blame]	653	static unsigned getVectorTypeBreakdownMVT(MVT VT, MVT &IntermediateVT,
Chris Lattner	598751e	2010-07-05 05:36:21 +0000	[diff] [blame]	654	unsigned &NumIntermediates,
				655	EVT &RegisterVT,
				656	TargetLowering *TLI) {
Owen Anderson	23b9b19	2009-08-12 00:36:31 +0000	[diff] [blame]	657	// Figure out the right, legal destination reg to copy into.
				658	unsigned NumElts = VT.getVectorNumElements();
				659	MVT EltTy = VT.getVectorElementType();
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	660
Owen Anderson	23b9b19	2009-08-12 00:36:31 +0000	[diff] [blame]	661	unsigned NumVectorRegs = 1;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	662
				663	// FIXME: We don't support non-power-of-2-sized vectors for now. Ideally we
Owen Anderson	23b9b19	2009-08-12 00:36:31 +0000	[diff] [blame]	664	// could break down into LHS/RHS like LegalizeDAG does.
				665	if (!isPowerOf2_32(NumElts)) {
				666	NumVectorRegs = NumElts;
				667	NumElts = 1;
				668	}
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	669
Owen Anderson	23b9b19	2009-08-12 00:36:31 +0000	[diff] [blame]	670	// Divide the input until we get to a supported size. This will always
				671	// end with a scalar if the target doesn't support vectors.
				672	while (NumElts > 1 && !TLI->isTypeLegal(MVT::getVectorVT(EltTy, NumElts))) {
				673	NumElts >>= 1;
				674	NumVectorRegs <<= 1;
				675	}
				676
				677	NumIntermediates = NumVectorRegs;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	678
Owen Anderson	23b9b19	2009-08-12 00:36:31 +0000	[diff] [blame]	679	MVT NewVT = MVT::getVectorVT(EltTy, NumElts);
				680	if (!TLI->isTypeLegal(NewVT))
				681	NewVT = EltTy;
				682	IntermediateVT = NewVT;
				683
Nadav Rotem	0c3e678	2011-06-12 14:56:55 +0000	[diff] [blame]	684	unsigned NewVTSize = NewVT.getSizeInBits();
				685
				686	// Convert sizes such as i33 to i64.
				687	if (!isPowerOf2_32(NewVTSize))
				688	NewVTSize = NextPowerOf2(NewVTSize);
				689
Owen Anderson	23b9b19	2009-08-12 00:36:31 +0000	[diff] [blame]	690	EVT DestVT = TLI->getRegisterType(NewVT);
				691	RegisterVT = DestVT;
Chris Lattner	32b4b5a	2010-07-05 05:53:14 +0000	[diff] [blame]	692	if (EVT(DestVT).bitsLT(NewVT)) // Value is expanded, e.g. i64 -> i16.
Nadav Rotem	0c3e678	2011-06-12 14:56:55 +0000	[diff] [blame]	693	return NumVectorRegs*(NewVTSize/DestVT.getSizeInBits());
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	694
Chris Lattner	32b4b5a	2010-07-05 05:53:14 +0000	[diff] [blame]	695	// Otherwise, promotion or legal types use the same number of registers as
				696	// the vector decimated to the appropriate level.
				697	return NumVectorRegs;
Owen Anderson	23b9b19	2009-08-12 00:36:31 +0000	[diff] [blame]	698	}
				699
Evan Cheng	46dcb57	2010-07-19 18:47:01 +0000	[diff] [blame]	700	/// isLegalRC - Return true if the value types that can be represented by the
				701	/// specified register class are all legal.
				702	bool TargetLowering::isLegalRC(const TargetRegisterClass *RC) const {
				703	for (TargetRegisterClass::vt_iterator I = RC->vt_begin(), E = RC->vt_end();
				704	I != E; ++I) {
				705	if (isTypeLegal(*I))
				706	return true;
				707	}
				708	return false;
				709	}
				710
				711	/// hasLegalSuperRegRegClasses - Return true if the specified register class
				712	/// has one or more super-reg register classes that are legal.
Evan Cheng	d70f57b	2010-07-19 22:15:08 +0000	[diff] [blame]	713	bool
				714	TargetLowering::hasLegalSuperRegRegClasses(const TargetRegisterClass *RC) const{
Evan Cheng	46dcb57	2010-07-19 18:47:01 +0000	[diff] [blame]	715	if (*RC->superregclasses_begin() == 0)
				716	return false;
				717	for (TargetRegisterInfo::regclass_iterator I = RC->superregclasses_begin(),
				718	E = RC->superregclasses_end(); I != E; ++I) {
				719	const TargetRegisterClass RRC = I;
				720	if (isLegalRC(RRC))
				721	return true;
				722	}
				723	return false;
				724	}
				725
				726	/// findRepresentativeClass - Return the largest legal super-reg register class
Evan Cheng	4f6b467	2010-07-21 06:09:07 +0000	[diff] [blame]	727	/// of the register class for the specified type and its associated "cost".
				728	std::pair<const TargetRegisterClass*, uint8_t>
				729	TargetLowering::findRepresentativeClass(EVT VT) const {
				730	const TargetRegisterClass *RC = RegClassForVT[VT.getSimpleVT().SimpleTy];
				731	if (!RC)
				732	return std::make_pair(RC, 0);
Evan Cheng	46dcb57	2010-07-19 18:47:01 +0000	[diff] [blame]	733	const TargetRegisterClass *BestRC = RC;
				734	for (TargetRegisterInfo::regclass_iterator I = RC->superregclasses_begin(),
				735	E = RC->superregclasses_end(); I != E; ++I) {
				736	const TargetRegisterClass RRC = I;
				737	if (RRC->isASubClass() \|\| !isLegalRC(RRC))
				738	continue;
				739	if (!hasLegalSuperRegRegClasses(RRC))
Evan Cheng	4f6b467	2010-07-21 06:09:07 +0000	[diff] [blame]	740	return std::make_pair(RRC, 1);
Evan Cheng	46dcb57	2010-07-19 18:47:01 +0000	[diff] [blame]	741	BestRC = RRC;
				742	}
Evan Cheng	4f6b467	2010-07-21 06:09:07 +0000	[diff] [blame]	743	return std::make_pair(BestRC, 1);
Evan Cheng	46dcb57	2010-07-19 18:47:01 +0000	[diff] [blame]	744	}
				745
Chris Lattner	e6f7c26	2010-08-25 22:49:25 +0000	[diff] [blame]	746
Chris Lattner	310968c	2005-01-07 07:44:53 +0000	[diff] [blame]	747	/// computeRegisterProperties - Once all of the register classes are added,
				748	/// this allows us to compute derived properties we expose.
				749	void TargetLowering::computeRegisterProperties() {
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	750	assert(MVT::LAST_VALUETYPE <= MVT::MAX_ALLOWED_VALUETYPE &&
Chris Lattner	bb97d81	2005-01-16 01:10:58 +0000	[diff] [blame]	751	"Too many value types for ValueTypeActions to hold!");
				752
Dan Gohman	b6f5b00	2007-06-28 23:29:44 +0000	[diff] [blame]	753	// Everything defaults to needing one register.
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	754	for (unsigned i = 0; i != MVT::LAST_VALUETYPE; ++i) {
Dan Gohman	b9f1019	2007-06-21 14:42:22 +0000	[diff] [blame]	755	NumRegistersForVT[i] = 1;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	756	RegisterTypeForVT[i] = TransformToType[i] = (MVT::SimpleValueType)i;
Dan Gohman	b6f5b00	2007-06-28 23:29:44 +0000	[diff] [blame]	757	}
				758	// ...except isVoid, which doesn't need any registers.
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	759	NumRegistersForVT[MVT::isVoid] = 0;
Misha Brukman	f976c85	2005-04-21 22:55:34 +0000	[diff] [blame]	760
Chris Lattner	310968c	2005-01-07 07:44:53 +0000	[diff] [blame]	761	// Find the largest integer register class.
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	762	unsigned LargestIntReg = MVT::LAST_INTEGER_VALUETYPE;
Chris Lattner	310968c	2005-01-07 07:44:53 +0000	[diff] [blame]	763	for (; RegClassForVT[LargestIntReg] == 0; --LargestIntReg)
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	764	assert(LargestIntReg != MVT::i1 && "No integer registers defined!");
Chris Lattner	310968c	2005-01-07 07:44:53 +0000	[diff] [blame]	765
				766	// Every integer value type larger than this largest register takes twice as
				767	// many registers to represent as the previous ValueType.
Duncan Sands	83ec4b6	2008-06-06 12:08:01 +0000	[diff] [blame]	768	for (unsigned ExpandedReg = LargestIntReg + 1; ; ++ExpandedReg) {
Dan Gohman	8a55ce4	2009-09-23 21:02:20 +0000	[diff] [blame]	769	EVT ExpandedVT = (MVT::SimpleValueType)ExpandedReg;
				770	if (!ExpandedVT.isInteger())
Duncan Sands	83ec4b6	2008-06-06 12:08:01 +0000	[diff] [blame]	771	break;
Dan Gohman	b9f1019	2007-06-21 14:42:22 +0000	[diff] [blame]	772	NumRegistersForVT[ExpandedReg] = 2*NumRegistersForVT[ExpandedReg-1];
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	773	RegisterTypeForVT[ExpandedReg] = (MVT::SimpleValueType)LargestIntReg;
				774	TransformToType[ExpandedReg] = (MVT::SimpleValueType)(ExpandedReg - 1);
Nadav Rotem	b6aacae	2011-05-28 17:57:14 +0000	[diff] [blame]	775	ValueTypeActions.setTypeAction(ExpandedVT, TypeExpandInteger);
Evan Cheng	1a8f1fe	2006-12-09 02:42:38 +0000	[diff] [blame]	776	}
Dan Gohman	b6f5b00	2007-06-28 23:29:44 +0000	[diff] [blame]	777
				778	// Inspect all of the ValueType's smaller than the largest integer
				779	// register to see which ones need promotion.
Duncan Sands	83ec4b6	2008-06-06 12:08:01 +0000	[diff] [blame]	780	unsigned LegalIntReg = LargestIntReg;
				781	for (unsigned IntReg = LargestIntReg - 1;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	782	IntReg >= (unsigned)MVT::i1; --IntReg) {
				783	EVT IVT = (MVT::SimpleValueType)IntReg;
Duncan Sands	83ec4b6	2008-06-06 12:08:01 +0000	[diff] [blame]	784	if (isTypeLegal(IVT)) {
Dan Gohman	b6f5b00	2007-06-28 23:29:44 +0000	[diff] [blame]	785	LegalIntReg = IntReg;
				786	} else {
Duncan Sands	83ec4b6	2008-06-06 12:08:01 +0000	[diff] [blame]	787	RegisterTypeForVT[IntReg] = TransformToType[IntReg] =
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	788	(MVT::SimpleValueType)LegalIntReg;
Nadav Rotem	b6aacae	2011-05-28 17:57:14 +0000	[diff] [blame]	789	ValueTypeActions.setTypeAction(IVT, TypePromoteInteger);
Dan Gohman	b6f5b00	2007-06-28 23:29:44 +0000	[diff] [blame]	790	}
				791	}
				792
Dale Johannesen	161e897	2007-10-05 20:04:43 +0000	[diff] [blame]	793	// ppcf128 type is really two f64's.
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	794	if (!isTypeLegal(MVT::ppcf128)) {
				795	NumRegistersForVT[MVT::ppcf128] = 2*NumRegistersForVT[MVT::f64];
				796	RegisterTypeForVT[MVT::ppcf128] = MVT::f64;
				797	TransformToType[MVT::ppcf128] = MVT::f64;
Nadav Rotem	b6aacae	2011-05-28 17:57:14 +0000	[diff] [blame]	798	ValueTypeActions.setTypeAction(MVT::ppcf128, TypeExpandFloat);
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	799	}
Dale Johannesen	161e897	2007-10-05 20:04:43 +0000	[diff] [blame]	800
Dan Gohman	b6f5b00	2007-06-28 23:29:44 +0000	[diff] [blame]	801	// Decide how to handle f64. If the target does not have native f64 support,
				802	// expand it to i64 and we will be generating soft float library calls.
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	803	if (!isTypeLegal(MVT::f64)) {
				804	NumRegistersForVT[MVT::f64] = NumRegistersForVT[MVT::i64];
				805	RegisterTypeForVT[MVT::f64] = RegisterTypeForVT[MVT::i64];
				806	TransformToType[MVT::f64] = MVT::i64;
Nadav Rotem	b6aacae	2011-05-28 17:57:14 +0000	[diff] [blame]	807	ValueTypeActions.setTypeAction(MVT::f64, TypeSoftenFloat);
Dan Gohman	b6f5b00	2007-06-28 23:29:44 +0000	[diff] [blame]	808	}
				809
				810	// Decide how to handle f32. If the target does not have native support for
				811	// f32, promote it to f64 if it is legal. Otherwise, expand it to i32.
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	812	if (!isTypeLegal(MVT::f32)) {
				813	if (isTypeLegal(MVT::f64)) {
				814	NumRegistersForVT[MVT::f32] = NumRegistersForVT[MVT::f64];
				815	RegisterTypeForVT[MVT::f32] = RegisterTypeForVT[MVT::f64];
				816	TransformToType[MVT::f32] = MVT::f64;
Nadav Rotem	b6aacae	2011-05-28 17:57:14 +0000	[diff] [blame]	817	ValueTypeActions.setTypeAction(MVT::f32, TypePromoteInteger);
Dan Gohman	b6f5b00	2007-06-28 23:29:44 +0000	[diff] [blame]	818	} else {
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	819	NumRegistersForVT[MVT::f32] = NumRegistersForVT[MVT::i32];
				820	RegisterTypeForVT[MVT::f32] = RegisterTypeForVT[MVT::i32];
				821	TransformToType[MVT::f32] = MVT::i32;
Nadav Rotem	b6aacae	2011-05-28 17:57:14 +0000	[diff] [blame]	822	ValueTypeActions.setTypeAction(MVT::f32, TypeSoftenFloat);
Dan Gohman	b6f5b00	2007-06-28 23:29:44 +0000	[diff] [blame]	823	}
Evan Cheng	1a8f1fe	2006-12-09 02:42:38 +0000	[diff] [blame]	824	}
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	825
Dan Gohman	b6f5b00	2007-06-28 23:29:44 +0000	[diff] [blame]	826	// Loop over all of the vector value types to see which need transformations.
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	827	for (unsigned i = MVT::FIRST_VECTOR_VALUETYPE;
				828	i <= (unsigned)MVT::LAST_VECTOR_VALUETYPE; ++i) {
Owen Anderson	23b9b19	2009-08-12 00:36:31 +0000	[diff] [blame]	829	MVT VT = (MVT::SimpleValueType)i;
Chris Lattner	598751e	2010-07-05 05:36:21 +0000	[diff] [blame]	830	if (isTypeLegal(VT)) continue;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	831
Chris Lattner	e6f7c26	2010-08-25 22:49:25 +0000	[diff] [blame]	832	// Determine if there is a legal wider type. If so, we should promote to
				833	// that wider vector type.
				834	EVT EltVT = VT.getVectorElementType();
				835	unsigned NElts = VT.getVectorNumElements();
				836	if (NElts != 1) {
				837	bool IsLegalWiderType = false;
Nadav Rotem	f1c025d	2011-06-04 20:32:01 +0000	[diff] [blame]	838	// If we allow the promotion of vector elements using a flag,
				839	// then return TypePromoteInteger on vector elements.
				840	// First try to promote the elements of integer vectors. If no legal
				841	// promotion was found, fallback to the widen-vector method.
				842	if (mayPromoteElements)
Chris Lattner	e6f7c26	2010-08-25 22:49:25 +0000	[diff] [blame]	843	for (unsigned nVT = i+1; nVT <= MVT::LAST_VECTOR_VALUETYPE; ++nVT) {
				844	EVT SVT = (MVT::SimpleValueType)nVT;
Nadav Rotem	f1c025d	2011-06-04 20:32:01 +0000	[diff] [blame]	845	// Promote vectors of integers to vectors with the same number
				846	// of elements, with a wider element type.
				847	if (SVT.getVectorElementType().getSizeInBits() > EltVT.getSizeInBits()
				848	&& SVT.getVectorNumElements() == NElts &&
				849	isTypeLegal(SVT) && SVT.getScalarType().isInteger()) {
				850	TransformToType[i] = SVT;
				851	RegisterTypeForVT[i] = SVT;
				852	NumRegistersForVT[i] = 1;
				853	ValueTypeActions.setTypeAction(VT, TypePromoteInteger);
				854	IsLegalWiderType = true;
				855	break;
Nadav Rotem	b6fbec3	2011-06-01 12:51:46 +0000	[diff] [blame]	856	}
Nadav Rotem	f1c025d	2011-06-04 20:32:01 +0000	[diff] [blame]	857	}
Nadav Rotem	b6fbec3	2011-06-01 12:51:46 +0000	[diff] [blame]	858
Nadav Rotem	f1c025d	2011-06-04 20:32:01 +0000	[diff] [blame]	859	if (IsLegalWiderType) continue;
				860
				861	// Try to widen the vector.
				862	for (unsigned nVT = i+1; nVT <= MVT::LAST_VECTOR_VALUETYPE; ++nVT) {
				863	EVT SVT = (MVT::SimpleValueType)nVT;
Chris Lattner	e6f7c26	2010-08-25 22:49:25 +0000	[diff] [blame]	864	if (SVT.getVectorElementType() == EltVT &&
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	865	SVT.getVectorNumElements() > NElts &&
Dale Johannesen	e93d99c	2010-10-20 21:32:10 +0000	[diff] [blame]	866	isTypeLegal(SVT)) {
Chris Lattner	e6f7c26	2010-08-25 22:49:25 +0000	[diff] [blame]	867	TransformToType[i] = SVT;
				868	RegisterTypeForVT[i] = SVT;
				869	NumRegistersForVT[i] = 1;
Nadav Rotem	b6aacae	2011-05-28 17:57:14 +0000	[diff] [blame]	870	ValueTypeActions.setTypeAction(VT, TypeWidenVector);
Chris Lattner	e6f7c26	2010-08-25 22:49:25 +0000	[diff] [blame]	871	IsLegalWiderType = true;
				872	break;
				873	}
				874	}
				875	if (IsLegalWiderType) continue;
				876	}
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	877
Chris Lattner	598751e	2010-07-05 05:36:21 +0000	[diff] [blame]	878	MVT IntermediateVT;
				879	EVT RegisterVT;
				880	unsigned NumIntermediates;
				881	NumRegistersForVT[i] =
				882	getVectorTypeBreakdownMVT(VT, IntermediateVT, NumIntermediates,
				883	RegisterVT, this);
				884	RegisterTypeForVT[i] = RegisterVT;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	885
Chris Lattner	e6f7c26	2010-08-25 22:49:25 +0000	[diff] [blame]	886	EVT NVT = VT.getPow2VectorType();
				887	if (NVT == VT) {
				888	// Type is already a power of 2. The default action is to split.
				889	TransformToType[i] = MVT::Other;
Nadav Rotem	b6aacae	2011-05-28 17:57:14 +0000	[diff] [blame]	890	unsigned NumElts = VT.getVectorNumElements();
				891	ValueTypeActions.setTypeAction(VT,
				892	NumElts > 1 ? TypeSplitVector : TypeScalarizeVector);
Chris Lattner	e6f7c26	2010-08-25 22:49:25 +0000	[diff] [blame]	893	} else {
				894	TransformToType[i] = NVT;
Nadav Rotem	b6aacae	2011-05-28 17:57:14 +0000	[diff] [blame]	895	ValueTypeActions.setTypeAction(VT, TypeWidenVector);
Dan Gohman	7f32156	2007-06-25 16:23:39 +0000	[diff] [blame]	896	}
Chris Lattner	3a593584	2006-03-16 19:50:01 +0000	[diff] [blame]	897	}
Evan Cheng	46dcb57	2010-07-19 18:47:01 +0000	[diff] [blame]	898
				899	// Determine the 'representative' register class for each value type.
				900	// An representative register class is the largest (meaning one which is
				901	// not a sub-register class / subreg register class) legal register class for
				902	// a group of value types. For example, on i386, i8, i16, and i32
				903	// representative would be GR32; while on x86_64 it's GR64.
Evan Cheng	d70f57b	2010-07-19 22:15:08 +0000	[diff] [blame]	904	for (unsigned i = 0; i != MVT::LAST_VALUETYPE; ++i) {
Evan Cheng	4f6b467	2010-07-21 06:09:07 +0000	[diff] [blame]	905	const TargetRegisterClass* RRC;
				906	uint8_t Cost;
				907	tie(RRC, Cost) = findRepresentativeClass((MVT::SimpleValueType)i);
				908	RepRegClassForVT[i] = RRC;
				909	RepRegClassCostForVT[i] = Cost;
Evan Cheng	d70f57b	2010-07-19 22:15:08 +0000	[diff] [blame]	910	}
Chris Lattner	bb97d81	2005-01-16 01:10:58 +0000	[diff] [blame]	911	}
Chris Lattner	cba82f9	2005-01-16 07:28:11 +0000	[diff] [blame]	912
Evan Cheng	7226158	2005-12-20 06:22:03 +0000	[diff] [blame]	913	const char *TargetLowering::getTargetNodeName(unsigned Opcode) const {
				914	return NULL;
				915	}
Evan Cheng	3a03ebb	2005-12-21 23:05:39 +0000	[diff] [blame]	916
Scott Michel	5b8f82e	2008-03-10 15:42:14 +0000	[diff] [blame]	917
Duncan Sands	28b77e9	2011-09-06 19:07:46 +0000	[diff] [blame]	918	EVT TargetLowering::getSetCCResultType(EVT VT) const {
				919	assert(!VT.isVector() && "No default SetCC type for vectors!");
Owen Anderson	1d0be15	2009-08-13 21:58:54 +0000	[diff] [blame]	920	return PointerTy.SimpleTy;
Scott Michel	5b8f82e	2008-03-10 15:42:14 +0000	[diff] [blame]	921	}
				922
Sanjiv Gupta	8f17a36	2009-12-28 02:40:33 +0000	[diff] [blame]	923	MVT::SimpleValueType TargetLowering::getCmpLibcallReturnType() const {
				924	return MVT::i32; // return the default value
				925	}
				926
Dan Gohman	7f32156	2007-06-25 16:23:39 +0000	[diff] [blame]	927	/// getVectorTypeBreakdown - Vector types are broken down into some number of
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	928	/// legal first class types. For example, MVT::v8f32 maps to 2 MVT::v4f32
				929	/// with Altivec or SSE1, or 8 promoted MVT::f64 values with the X86 FP stack.
				930	/// Similarly, MVT::v2i64 turns into 4 MVT::i32 values with both PPC and X86.
Chris Lattner	dc87929	2006-03-31 00:28:56 +0000	[diff] [blame]	931	///
Dan Gohman	7f32156	2007-06-25 16:23:39 +0000	[diff] [blame]	932	/// This method returns the number of registers needed, and the VT for each
Dan Gohman	b6f5b00	2007-06-28 23:29:44 +0000	[diff] [blame]	933	/// register. It also returns the VT and quantity of the intermediate values
				934	/// before they are promoted/expanded.
Chris Lattner	dc87929	2006-03-31 00:28:56 +0000	[diff] [blame]	935	///
Owen Anderson	23b9b19	2009-08-12 00:36:31 +0000	[diff] [blame]	936	unsigned TargetLowering::getVectorTypeBreakdown(LLVMContext &Context, EVT VT,
Owen Anderson	e50ed30	2009-08-10 22:56:29 +0000	[diff] [blame]	937	EVT &IntermediateVT,
Dan Gohman	b6f5b00	2007-06-28 23:29:44 +0000	[diff] [blame]	938	unsigned &NumIntermediates,
Owen Anderson	23b9b19	2009-08-12 00:36:31 +0000	[diff] [blame]	939	EVT &RegisterVT) const {
Duncan Sands	83ec4b6	2008-06-06 12:08:01 +0000	[diff] [blame]	940	unsigned NumElts = VT.getVectorNumElements();
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	941
Chris Lattner	e6f7c26	2010-08-25 22:49:25 +0000	[diff] [blame]	942	// If there is a wider vector type with the same element type as this one,
Nadav Rotem	db34616	2012-04-21 20:08:32 +0000	[diff] [blame^]	943	// or a promoted vector type that has the same number of elements which
				944	// are wider, then we should convert to that legal vector type.
				945	// This handles things like <2 x float> -> <4 x float> and
				946	// <4 x i1> -> <4 x i32>.
				947	LegalizeTypeAction TA = getTypeAction(Context, VT);
				948	if (NumElts != 1 && (TA == TypeWidenVector \|\| TA == TypePromoteInteger)) {
Chris Lattner	e6f7c26	2010-08-25 22:49:25 +0000	[diff] [blame]	949	RegisterVT = getTypeToTransformTo(Context, VT);
				950	if (isTypeLegal(RegisterVT)) {
				951	IntermediateVT = RegisterVT;
				952	NumIntermediates = 1;
				953	return 1;
				954	}
				955	}
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	956
Chris Lattner	e6f7c26	2010-08-25 22:49:25 +0000	[diff] [blame]	957	// Figure out the right, legal destination reg to copy into.
Owen Anderson	e50ed30	2009-08-10 22:56:29 +0000	[diff] [blame]	958	EVT EltTy = VT.getVectorElementType();
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	959
Chris Lattner	dc87929	2006-03-31 00:28:56 +0000	[diff] [blame]	960	unsigned NumVectorRegs = 1;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	961
				962	// FIXME: We don't support non-power-of-2-sized vectors for now. Ideally we
Nate Begeman	d73ab88	2007-11-27 19:28:48 +0000	[diff] [blame]	963	// could break down into LHS/RHS like LegalizeDAG does.
				964	if (!isPowerOf2_32(NumElts)) {
				965	NumVectorRegs = NumElts;
				966	NumElts = 1;
				967	}
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	968
Chris Lattner	dc87929	2006-03-31 00:28:56 +0000	[diff] [blame]	969	// Divide the input until we get to a supported size. This will always
				970	// end with a scalar if the target doesn't support vectors.
Owen Anderson	23b9b19	2009-08-12 00:36:31 +0000	[diff] [blame]	971	while (NumElts > 1 && !isTypeLegal(
				972	EVT::getVectorVT(Context, EltTy, NumElts))) {
Chris Lattner	dc87929	2006-03-31 00:28:56 +0000	[diff] [blame]	973	NumElts >>= 1;
				974	NumVectorRegs <<= 1;
				975	}
Dan Gohman	b6f5b00	2007-06-28 23:29:44 +0000	[diff] [blame]	976
				977	NumIntermediates = NumVectorRegs;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	978
Owen Anderson	23b9b19	2009-08-12 00:36:31 +0000	[diff] [blame]	979	EVT NewVT = EVT::getVectorVT(Context, EltTy, NumElts);
Dan Gohman	7f32156	2007-06-25 16:23:39 +0000	[diff] [blame]	980	if (!isTypeLegal(NewVT))
				981	NewVT = EltTy;
Dan Gohman	b6f5b00	2007-06-28 23:29:44 +0000	[diff] [blame]	982	IntermediateVT = NewVT;
Chris Lattner	dc87929	2006-03-31 00:28:56 +0000	[diff] [blame]	983
Owen Anderson	23b9b19	2009-08-12 00:36:31 +0000	[diff] [blame]	984	EVT DestVT = getRegisterType(Context, NewVT);
Dan Gohman	b6f5b00	2007-06-28 23:29:44 +0000	[diff] [blame]	985	RegisterVT = DestVT;
Nadav Rotem	0c3e678	2011-06-12 14:56:55 +0000	[diff] [blame]	986	unsigned NewVTSize = NewVT.getSizeInBits();
				987
				988	// Convert sizes such as i33 to i64.
				989	if (!isPowerOf2_32(NewVTSize))
				990	NewVTSize = NextPowerOf2(NewVTSize);
				991
Chris Lattner	e6f7c26	2010-08-25 22:49:25 +0000	[diff] [blame]	992	if (DestVT.bitsLT(NewVT)) // Value is expanded, e.g. i64 -> i16.
Nadav Rotem	0c3e678	2011-06-12 14:56:55 +0000	[diff] [blame]	993	return NumVectorRegs*(NewVTSize/DestVT.getSizeInBits());
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	994
Chris Lattner	e6f7c26	2010-08-25 22:49:25 +0000	[diff] [blame]	995	// Otherwise, promotion or legal types use the same number of registers as
				996	// the vector decimated to the appropriate level.
				997	return NumVectorRegs;
Chris Lattner	dc87929	2006-03-31 00:28:56 +0000	[diff] [blame]	998	}
				999
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1000	/// Get the EVTs and ArgFlags collections that represent the legalized return
Dan Gohman	84023e0	2010-07-10 09:00:22 +0000	[diff] [blame]	1001	/// type of the given function. This does not require a DAG or a return value,
				1002	/// and is suitable for use before any DAGs for the function are constructed.
				1003	/// TODO: Move this out of TargetLowering.cpp.
Chris Lattner	db125cf	2011-07-18 04:54:35 +0000	[diff] [blame]	1004	void llvm::GetReturnInfo(Type* ReturnType, Attributes attr,
Dan Gohman	84023e0	2010-07-10 09:00:22 +0000	[diff] [blame]	1005	SmallVectorImpl<ISD::OutputArg> &Outs,
				1006	const TargetLowering &TLI,
				1007	SmallVectorImpl<uint64_t> *Offsets) {
				1008	SmallVector<EVT, 4> ValueVTs;
				1009	ComputeValueVTs(TLI, ReturnType, ValueVTs);
				1010	unsigned NumValues = ValueVTs.size();
				1011	if (NumValues == 0) return;
				1012	unsigned Offset = 0;
				1013
				1014	for (unsigned j = 0, f = NumValues; j != f; ++j) {
				1015	EVT VT = ValueVTs[j];
				1016	ISD::NodeType ExtendKind = ISD::ANY_EXTEND;
				1017
				1018	if (attr & Attribute::SExt)
				1019	ExtendKind = ISD::SIGN_EXTEND;
				1020	else if (attr & Attribute::ZExt)
				1021	ExtendKind = ISD::ZERO_EXTEND;
				1022
				1023	// FIXME: C calling convention requires the return type to be promoted to
				1024	// at least 32-bit. But this is not necessary for non-C calling
				1025	// conventions. The frontend should mark functions whose return values
				1026	// require promoting with signext or zeroext attributes.
				1027	if (ExtendKind != ISD::ANY_EXTEND && VT.isInteger()) {
				1028	EVT MinVT = TLI.getRegisterType(ReturnType->getContext(), MVT::i32);
				1029	if (VT.bitsLT(MinVT))
				1030	VT = MinVT;
				1031	}
				1032
				1033	unsigned NumParts = TLI.getNumRegisters(ReturnType->getContext(), VT);
				1034	EVT PartVT = TLI.getRegisterType(ReturnType->getContext(), VT);
				1035	unsigned PartSize = TLI.getTargetData()->getTypeAllocSize(
				1036	PartVT.getTypeForEVT(ReturnType->getContext()));
				1037
				1038	// 'inreg' on function refers to return value
				1039	ISD::ArgFlagsTy Flags = ISD::ArgFlagsTy();
				1040	if (attr & Attribute::InReg)
				1041	Flags.setInReg();
				1042
				1043	// Propagate extension type if any
				1044	if (attr & Attribute::SExt)
				1045	Flags.setSExt();
				1046	else if (attr & Attribute::ZExt)
				1047	Flags.setZExt();
				1048
				1049	for (unsigned i = 0; i < NumParts; ++i) {
				1050	Outs.push_back(ISD::OutputArg(Flags, PartVT, /isFixed=/true));
				1051	if (Offsets) {
				1052	Offsets->push_back(Offset);
				1053	Offset += PartSize;
				1054	}
				1055	}
				1056	}
				1057	}
				1058
Evan Cheng	3ae0543	2008-01-24 00:22:01 +0000	[diff] [blame]	1059	/// getByValTypeAlignment - Return the desired alignment for ByVal aggregate
Dale Johannesen	28d08fd	2008-02-28 22:31:51 +0000	[diff] [blame]	1060	/// function arguments in the caller parameter area. This is the actual
				1061	/// alignment, not its logarithm.
Chris Lattner	db125cf	2011-07-18 04:54:35 +0000	[diff] [blame]	1062	unsigned TargetLowering::getByValTypeAlignment(Type *Ty) const {
Dale Johannesen	28d08fd	2008-02-28 22:31:51 +0000	[diff] [blame]	1063	return TD->getCallFrameTypeAlignment(Ty);
Evan Cheng	3ae0543	2008-01-24 00:22:01 +0000	[diff] [blame]	1064	}
				1065
Chris Lattner	071c62f	2010-01-25 23:26:13 +0000	[diff] [blame]	1066	/// getJumpTableEncoding - Return the entry encoding for a jump table in the
				1067	/// current function. The returned value is a member of the
				1068	/// MachineJumpTableInfo::JTEntryKind enum.
				1069	unsigned TargetLowering::getJumpTableEncoding() const {
				1070	// In non-pic modes, just use the address of a block.
				1071	if (getTargetMachine().getRelocationModel() != Reloc::PIC_)
				1072	return MachineJumpTableInfo::EK_BlockAddress;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1073
Chris Lattner	071c62f	2010-01-25 23:26:13 +0000	[diff] [blame]	1074	// In PIC mode, if the target supports a GPRel32 directive, use it.
				1075	if (getTargetMachine().getMCAsmInfo()->getGPRel32Directive() != 0)
				1076	return MachineJumpTableInfo::EK_GPRel32BlockAddress;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1077
Chris Lattner	071c62f	2010-01-25 23:26:13 +0000	[diff] [blame]	1078	// Otherwise, use a label difference.
				1079	return MachineJumpTableInfo::EK_LabelDifference32;
				1080	}
				1081
Dan Gohman	475871a	2008-07-27 21:46:04 +0000	[diff] [blame]	1082	SDValue TargetLowering::getPICJumpTableRelocBase(SDValue Table,
				1083	SelectionDAG &DAG) const {
Chris Lattner	f1214cb	2010-01-26 06:53:37 +0000	[diff] [blame]	1084	// If our PIC model is GP relative, use the global offset table as the base.
Akira Hatanaka	787c3fd	2012-04-09 20:32:12 +0000	[diff] [blame]	1085	unsigned JTEncoding = getJumpTableEncoding();
				1086
				1087	if ((JTEncoding == MachineJumpTableInfo::EK_GPRel64BlockAddress) \|\|
				1088	(JTEncoding == MachineJumpTableInfo::EK_GPRel32BlockAddress))
Dale Johannesen	b300d2a	2009-02-07 00:55:49 +0000	[diff] [blame]	1089	return DAG.getGLOBAL_OFFSET_TABLE(getPointerTy());
Akira Hatanaka	787c3fd	2012-04-09 20:32:12 +0000	[diff] [blame]	1090
Evan Cheng	cc41586	2007-11-09 01:32:10 +0000	[diff] [blame]	1091	return Table;
				1092	}
				1093
Chris Lattner	13e97a2	2010-01-26 05:30:30 +0000	[diff] [blame]	1094	/// getPICJumpTableRelocBaseExpr - This returns the relocation base for the
				1095	/// given PIC jumptable, the same as getPICJumpTableRelocBase, but as an
				1096	/// MCExpr.
				1097	const MCExpr *
Chris Lattner	589c6f6	2010-01-26 06:28:43 +0000	[diff] [blame]	1098	TargetLowering::getPICJumpTableRelocBaseExpr(const MachineFunction *MF,
				1099	unsigned JTI,MCContext &Ctx) const{
Chris Lattner	beeb93e	2010-01-26 05:58:28 +0000	[diff] [blame]	1100	// The normal PIC reloc base is the label at the start of the jump table.
Chris Lattner	589c6f6	2010-01-26 06:28:43 +0000	[diff] [blame]	1101	return MCSymbolRefExpr::Create(MF->getJTISymbol(JTI, Ctx), Ctx);
Chris Lattner	13e97a2	2010-01-26 05:30:30 +0000	[diff] [blame]	1102	}
				1103
Dan Gohman	6520e20	2008-10-18 02:06:02 +0000	[diff] [blame]	1104	bool
				1105	TargetLowering::isOffsetFoldingLegal(const GlobalAddressSDNode *GA) const {
				1106	// Assume that everything is safe in static mode.
				1107	if (getTargetMachine().getRelocationModel() == Reloc::Static)
				1108	return true;
				1109
				1110	// In dynamic-no-pic mode, assume that known defined values are safe.
				1111	if (getTargetMachine().getRelocationModel() == Reloc::DynamicNoPIC &&
				1112	GA &&
				1113	!GA->getGlobal()->isDeclaration() &&
Duncan Sands	667d4b8	2009-03-07 15:45:40 +0000	[diff] [blame]	1114	!GA->getGlobal()->isWeakForLinker())
Dan Gohman	6520e20	2008-10-18 02:06:02 +0000	[diff] [blame]	1115	return true;
				1116
				1117	// Otherwise assume nothing is safe.
				1118	return false;
				1119	}
				1120
Chris Lattner	eb8146b	2006-02-04 02:13:02 +0000	[diff] [blame]	1121	//===----------------------------------------------------------------------===//
				1122	// Optimization Methods
				1123	//===----------------------------------------------------------------------===//
				1124
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1125	/// ShrinkDemandedConstant - Check to see if the specified operand of the
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1126	/// specified instruction is a constant integer. If so, check to see if there
				1127	/// are any bits set in the constant that are not demanded. If so, shrink the
				1128	/// constant and return true.
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1129	bool TargetLowering::TargetLoweringOpt::ShrinkDemandedConstant(SDValue Op,
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1130	const APInt &Demanded) {
Dale Johannesen	de06470	2009-02-06 21:50:26 +0000	[diff] [blame]	1131	DebugLoc dl = Op.getDebugLoc();
Bill Wendling	36ae6c1	2009-03-04 00:18:06 +0000	[diff] [blame]	1132
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1133	// FIXME: ISD::SELECT, ISD::SELECT_CC
Dan Gohman	e5af2d3	2009-01-29 01:59:02 +0000	[diff] [blame]	1134	switch (Op.getOpcode()) {
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1135	default: break;
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1136	case ISD::XOR:
Bill Wendling	36ae6c1	2009-03-04 00:18:06 +0000	[diff] [blame]	1137	case ISD::AND:
				1138	case ISD::OR: {
				1139	ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1));
				1140	if (!C) return false;
				1141
				1142	if (Op.getOpcode() == ISD::XOR &&
				1143	(C->getAPIntValue() \| (~Demanded)).isAllOnesValue())
				1144	return false;
				1145
				1146	// if we can expand it to have all bits set, do it
				1147	if (C->getAPIntValue().intersects(~Demanded)) {
Owen Anderson	e50ed30	2009-08-10 22:56:29 +0000	[diff] [blame]	1148	EVT VT = Op.getValueType();
Bill Wendling	36ae6c1	2009-03-04 00:18:06 +0000	[diff] [blame]	1149	SDValue New = DAG.getNode(Op.getOpcode(), dl, VT, Op.getOperand(0),
				1150	DAG.getConstant(Demanded &
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1151	C->getAPIntValue(),
Bill Wendling	36ae6c1	2009-03-04 00:18:06 +0000	[diff] [blame]	1152	VT));
				1153	return CombineTo(Op, New);
				1154	}
				1155
Nate Begeman	de99629	2006-02-03 22:24:05 +0000	[diff] [blame]	1156	break;
				1157	}
Bill Wendling	36ae6c1	2009-03-04 00:18:06 +0000	[diff] [blame]	1158	}
				1159
Nate Begeman	de99629	2006-02-03 22:24:05 +0000	[diff] [blame]	1160	return false;
				1161	}
Chris Lattner	c6fd6cd	2006-01-30 04:09:27 +0000	[diff] [blame]	1162
Dan Gohman	97121ba	2009-04-08 00:15:30 +0000	[diff] [blame]	1163	/// ShrinkDemandedOp - Convert x+y to (VT)((SmallVT)x+(SmallVT)y) if the
				1164	/// casts are free. This uses isZExtFree and ZERO_EXTEND for the widening
				1165	/// cast, but it could be generalized for targets with other types of
				1166	/// implicit widening casts.
				1167	bool
				1168	TargetLowering::TargetLoweringOpt::ShrinkDemandedOp(SDValue Op,
				1169	unsigned BitWidth,
				1170	const APInt &Demanded,
				1171	DebugLoc dl) {
				1172	assert(Op.getNumOperands() == 2 &&
				1173	"ShrinkDemandedOp only supports binary operators!");
				1174	assert(Op.getNode()->getNumValues() == 1 &&
				1175	"ShrinkDemandedOp only supports nodes with one result!");
				1176
				1177	// Don't do this if the node has another user, which may require the
				1178	// full value.
				1179	if (!Op.getNode()->hasOneUse())
				1180	return false;
				1181
				1182	// Search for the smallest integer type with free casts to and from
				1183	// Op's type. For expedience, just check power-of-2 integer types.
				1184	const TargetLowering &TLI = DAG.getTargetLoweringInfo();
				1185	unsigned SmallVTBits = BitWidth - Demanded.countLeadingZeros();
				1186	if (!isPowerOf2_32(SmallVTBits))
				1187	SmallVTBits = NextPowerOf2(SmallVTBits);
				1188	for (; SmallVTBits < BitWidth; SmallVTBits = NextPowerOf2(SmallVTBits)) {
Owen Anderson	23b9b19	2009-08-12 00:36:31 +0000	[diff] [blame]	1189	EVT SmallVT = EVT::getIntegerVT(*DAG.getContext(), SmallVTBits);
Dan Gohman	97121ba	2009-04-08 00:15:30 +0000	[diff] [blame]	1190	if (TLI.isTruncateFree(Op.getValueType(), SmallVT) &&
				1191	TLI.isZExtFree(SmallVT, Op.getValueType())) {
				1192	// We found a type with free casts.
				1193	SDValue X = DAG.getNode(Op.getOpcode(), dl, SmallVT,
				1194	DAG.getNode(ISD::TRUNCATE, dl, SmallVT,
				1195	Op.getNode()->getOperand(0)),
				1196	DAG.getNode(ISD::TRUNCATE, dl, SmallVT,
				1197	Op.getNode()->getOperand(1)));
				1198	SDValue Z = DAG.getNode(ISD::ZERO_EXTEND, dl, Op.getValueType(), X);
				1199	return CombineTo(Op, Z);
				1200	}
				1201	}
				1202	return false;
				1203	}
				1204
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1205	/// SimplifyDemandedBits - Look at Op. At this point, we know that only the
Chad Rosier	8c1ec5a	2011-06-11 02:27:46 +0000	[diff] [blame]	1206	/// DemandedMask bits of the result of Op are ever used downstream. If we can
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1207	/// use this information to simplify Op, create a new simplified DAG node and
				1208	/// return true, returning the original and new nodes in Old and New. Otherwise,
				1209	/// analyze the expression and return a mask of KnownOne and KnownZero bits for
				1210	/// the expression (used to simplify the caller). The KnownZero/One bits may
				1211	/// only be accurate for those bits in the DemandedMask.
Dan Gohman	475871a	2008-07-27 21:46:04 +0000	[diff] [blame]	1212	bool TargetLowering::SimplifyDemandedBits(SDValue Op,
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1213	const APInt &DemandedMask,
				1214	APInt &KnownZero,
				1215	APInt &KnownOne,
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1216	TargetLoweringOpt &TLO,
				1217	unsigned Depth) const {
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1218	unsigned BitWidth = DemandedMask.getBitWidth();
Dan Gohman	87862e7	2009-12-11 21:31:27 +0000	[diff] [blame]	1219	assert(Op.getValueType().getScalarType().getSizeInBits() == BitWidth &&
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1220	"Mask size mismatches value type size!");
				1221	APInt NewMask = DemandedMask;
Dale Johannesen	6f38cb6	2009-02-07 19:59:05 +0000	[diff] [blame]	1222	DebugLoc dl = Op.getDebugLoc();
Chris Lattner	3fc5b01	2007-05-17 18:19:23 +0000	[diff] [blame]	1223
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1224	// Don't know anything.
				1225	KnownZero = KnownOne = APInt(BitWidth, 0);
				1226
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1227	// Other users may use these bits.
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1228	if (!Op.getNode()->hasOneUse()) {
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1229	if (Depth != 0) {
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1230	// If not at the root, Just compute the KnownZero/KnownOne bits to
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1231	// simplify things downstream.
Rafael Espindola	26c8dcc	2012-04-04 12:51:34 +0000	[diff] [blame]	1232	TLO.DAG.ComputeMaskedBits(Op, KnownZero, KnownOne, Depth);
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1233	return false;
				1234	}
				1235	// If this is the root being simplified, allow it to have multiple uses,
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1236	// just set the NewMask to all bits.
				1237	NewMask = APInt::getAllOnesValue(BitWidth);
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1238	} else if (DemandedMask == 0) {
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1239	// Not demanding any bits from Op.
				1240	if (Op.getOpcode() != ISD::UNDEF)
Dale Johannesen	e8d7230	2009-02-06 23:05:02 +0000	[diff] [blame]	1241	return TLO.CombineTo(Op, TLO.DAG.getUNDEF(Op.getValueType()));
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1242	return false;
				1243	} else if (Depth == 6) { // Limit search depth.
				1244	return false;
				1245	}
				1246
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1247	APInt KnownZero2, KnownOne2, KnownZeroOut, KnownOneOut;
Chris Lattner	c6fd6cd	2006-01-30 04:09:27 +0000	[diff] [blame]	1248	switch (Op.getOpcode()) {
				1249	case ISD::Constant:
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1250	// We know all of the bits for a constant!
Rafael Espindola	26c8dcc	2012-04-04 12:51:34 +0000	[diff] [blame]	1251	KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue();
				1252	KnownZero = ~KnownOne;
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1253	return false; // Don't fall through, will infinitely loop.
Chris Lattner	c6fd6cd	2006-01-30 04:09:27 +0000	[diff] [blame]	1254	case ISD::AND:
Chris Lattner	81cd355	2006-02-27 00:36:27 +0000	[diff] [blame]	1255	// If the RHS is a constant, check to see if the LHS would be zero without
				1256	// using the bits from the RHS. Below, we use knowledge about the RHS to
				1257	// simplify the LHS, here we're using information from the LHS to simplify
				1258	// the RHS.
				1259	if (ConstantSDNode *RHSC = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1260	APInt LHSZero, LHSOne;
Dale Johannesen	97fd9a5	2011-01-10 21:53:07 +0000	[diff] [blame]	1261	// Do not increment Depth here; that can cause an infinite loop.
Rafael Espindola	26c8dcc	2012-04-04 12:51:34 +0000	[diff] [blame]	1262	TLO.DAG.ComputeMaskedBits(Op.getOperand(0), LHSZero, LHSOne, Depth);
Chris Lattner	81cd355	2006-02-27 00:36:27 +0000	[diff] [blame]	1263	// If the LHS already has zeros where RHSC does, this and is dead.
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1264	if ((LHSZero & NewMask) == (~RHSC->getAPIntValue() & NewMask))
Chris Lattner	81cd355	2006-02-27 00:36:27 +0000	[diff] [blame]	1265	return TLO.CombineTo(Op, Op.getOperand(0));
				1266	// If any of the set bits in the RHS are known zero on the LHS, shrink
				1267	// the constant.
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1268	if (TLO.ShrinkDemandedConstant(Op, ~LHSZero & NewMask))
Chris Lattner	81cd355	2006-02-27 00:36:27 +0000	[diff] [blame]	1269	return true;
				1270	}
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1271
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1272	if (SimplifyDemandedBits(Op.getOperand(1), NewMask, KnownZero,
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1273	KnownOne, TLO, Depth+1))
Chris Lattner	c6fd6cd	2006-01-30 04:09:27 +0000	[diff] [blame]	1274	return true;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1275	assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1276	if (SimplifyDemandedBits(Op.getOperand(0), ~KnownZero & NewMask,
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1277	KnownZero2, KnownOne2, TLO, Depth+1))
				1278	return true;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1279	assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
				1280
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1281	// If all of the demanded bits are known one on one side, return the other.
				1282	// These bits cannot contribute to the result of the 'and'.
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1283	if ((NewMask & ~KnownZero2 & KnownOne) == (~KnownZero2 & NewMask))
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1284	return TLO.CombineTo(Op, Op.getOperand(0));
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1285	if ((NewMask & ~KnownZero & KnownOne2) == (~KnownZero & NewMask))
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1286	return TLO.CombineTo(Op, Op.getOperand(1));
				1287	// If all of the demanded bits in the inputs are known zeros, return zero.
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1288	if ((NewMask & (KnownZero\|KnownZero2)) == NewMask)
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1289	return TLO.CombineTo(Op, TLO.DAG.getConstant(0, Op.getValueType()));
				1290	// If the RHS is a constant, see if we can simplify it.
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1291	if (TLO.ShrinkDemandedConstant(Op, ~KnownZero2 & NewMask))
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1292	return true;
Dan Gohman	97121ba	2009-04-08 00:15:30 +0000	[diff] [blame]	1293	// If the operation can be done in a smaller type, do so.
Dan Gohman	4e39e9d	2010-06-24 14:30:44 +0000	[diff] [blame]	1294	if (TLO.ShrinkDemandedOp(Op, BitWidth, NewMask, dl))
Dan Gohman	97121ba	2009-04-08 00:15:30 +0000	[diff] [blame]	1295	return true;
				1296
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1297	// Output known-1 bits are only known if set in both the LHS & RHS.
				1298	KnownOne &= KnownOne2;
				1299	// Output known-0 are known to be clear if zero in either the LHS \| RHS.
				1300	KnownZero \|= KnownZero2;
				1301	break;
Chris Lattner	c6fd6cd	2006-01-30 04:09:27 +0000	[diff] [blame]	1302	case ISD::OR:
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1303	if (SimplifyDemandedBits(Op.getOperand(1), NewMask, KnownZero,
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1304	KnownOne, TLO, Depth+1))
				1305	return true;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1306	assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1307	if (SimplifyDemandedBits(Op.getOperand(0), ~KnownOne & NewMask,
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1308	KnownZero2, KnownOne2, TLO, Depth+1))
				1309	return true;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1310	assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
				1311
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1312	// If all of the demanded bits are known zero on one side, return the other.
				1313	// These bits cannot contribute to the result of the 'or'.
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1314	if ((NewMask & ~KnownOne2 & KnownZero) == (~KnownOne2 & NewMask))
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1315	return TLO.CombineTo(Op, Op.getOperand(0));
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1316	if ((NewMask & ~KnownOne & KnownZero2) == (~KnownOne & NewMask))
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1317	return TLO.CombineTo(Op, Op.getOperand(1));
				1318	// If all of the potentially set bits on one side are known to be set on
				1319	// the other side, just use the 'other' side.
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1320	if ((NewMask & ~KnownZero & KnownOne2) == (~KnownZero & NewMask))
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1321	return TLO.CombineTo(Op, Op.getOperand(0));
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1322	if ((NewMask & ~KnownZero2 & KnownOne) == (~KnownZero2 & NewMask))
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1323	return TLO.CombineTo(Op, Op.getOperand(1));
				1324	// If the RHS is a constant, see if we can simplify it.
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1325	if (TLO.ShrinkDemandedConstant(Op, NewMask))
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1326	return true;
Dan Gohman	97121ba	2009-04-08 00:15:30 +0000	[diff] [blame]	1327	// If the operation can be done in a smaller type, do so.
Dan Gohman	4e39e9d	2010-06-24 14:30:44 +0000	[diff] [blame]	1328	if (TLO.ShrinkDemandedOp(Op, BitWidth, NewMask, dl))
Dan Gohman	97121ba	2009-04-08 00:15:30 +0000	[diff] [blame]	1329	return true;
				1330
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1331	// Output known-0 bits are only known if clear in both the LHS & RHS.
				1332	KnownZero &= KnownZero2;
				1333	// Output known-1 are known to be set if set in either the LHS \| RHS.
				1334	KnownOne \|= KnownOne2;
				1335	break;
Chris Lattner	c6fd6cd	2006-01-30 04:09:27 +0000	[diff] [blame]	1336	case ISD::XOR:
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1337	if (SimplifyDemandedBits(Op.getOperand(1), NewMask, KnownZero,
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1338	KnownOne, TLO, Depth+1))
				1339	return true;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1340	assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1341	if (SimplifyDemandedBits(Op.getOperand(0), NewMask, KnownZero2,
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1342	KnownOne2, TLO, Depth+1))
				1343	return true;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1344	assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
				1345
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1346	// If all of the demanded bits are known zero on one side, return the other.
				1347	// These bits cannot contribute to the result of the 'xor'.
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1348	if ((KnownZero & NewMask) == NewMask)
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1349	return TLO.CombineTo(Op, Op.getOperand(0));
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1350	if ((KnownZero2 & NewMask) == NewMask)
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1351	return TLO.CombineTo(Op, Op.getOperand(1));
Dan Gohman	97121ba	2009-04-08 00:15:30 +0000	[diff] [blame]	1352	// If the operation can be done in a smaller type, do so.
Dan Gohman	4e39e9d	2010-06-24 14:30:44 +0000	[diff] [blame]	1353	if (TLO.ShrinkDemandedOp(Op, BitWidth, NewMask, dl))
Dan Gohman	97121ba	2009-04-08 00:15:30 +0000	[diff] [blame]	1354	return true;
				1355
Chris Lattner	3687c1a	2006-11-27 21:50:02 +0000	[diff] [blame]	1356	// If all of the unknown bits are known to be zero on one side or the other
				1357	// (but not both) turn this into an inclusive or.
				1358	// e.g. (A & C1)^(B & C2) -> (A & C1)\|(B & C2) iff C1&C2 == 0
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1359	if ((NewMask & ~KnownZero & ~KnownZero2) == 0)
Dale Johannesen	de06470	2009-02-06 21:50:26 +0000	[diff] [blame]	1360	return TLO.CombineTo(Op, TLO.DAG.getNode(ISD::OR, dl, Op.getValueType(),
Chris Lattner	3687c1a	2006-11-27 21:50:02 +0000	[diff] [blame]	1361	Op.getOperand(0),
				1362	Op.getOperand(1)));
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1363
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1364	// Output known-0 bits are known if clear or set in both the LHS & RHS.
				1365	KnownZeroOut = (KnownZero & KnownZero2) \| (KnownOne & KnownOne2);
				1366	// Output known-1 are known to be set if set in only one of the LHS, RHS.
				1367	KnownOneOut = (KnownZero & KnownOne2) \| (KnownOne & KnownZero2);
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1368
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1369	// If all of the demanded bits on one side are known, and all of the set
				1370	// bits on that side are also known to be set on the other side, turn this
				1371	// into an AND, as we know the bits will be cleared.
				1372	// e.g. (X \| C1) ^ C2 --> (X \| C1) & ~C2 iff (C1&C2) == C2
Joel Jones	d16ce17	2012-04-17 22:23:10 +0000	[diff] [blame]	1373	// NB: it is okay if more bits are known than are requested
				1374	if ((NewMask & (KnownZero\|KnownOne)) == NewMask) { // all known on one side
				1375	if (KnownOne == KnownOne2) { // set bits are the same on both sides
Owen Anderson	e50ed30	2009-08-10 22:56:29 +0000	[diff] [blame]	1376	EVT VT = Op.getValueType();
Dan Gohman	475871a	2008-07-27 21:46:04 +0000	[diff] [blame]	1377	SDValue ANDC = TLO.DAG.getConstant(~KnownOne & NewMask, VT);
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1378	return TLO.CombineTo(Op, TLO.DAG.getNode(ISD::AND, dl, VT,
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	1379	Op.getOperand(0), ANDC));
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1380	}
				1381	}
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1382
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1383	// If the RHS is a constant, see if we can simplify it.
Torok Edwin	4fea2e9	2008-04-06 21:23:02 +0000	[diff] [blame]	1384	// for XOR, we prefer to force bits to 1 if they will make a -1.
				1385	// if we can't force bits, try to shrink constant
				1386	if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
				1387	APInt Expanded = C->getAPIntValue() \| (~NewMask);
				1388	// if we can expand it to have all bits set, do it
				1389	if (Expanded.isAllOnesValue()) {
				1390	if (Expanded != C->getAPIntValue()) {
Owen Anderson	e50ed30	2009-08-10 22:56:29 +0000	[diff] [blame]	1391	EVT VT = Op.getValueType();
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	1392	SDValue New = TLO.DAG.getNode(Op.getOpcode(), dl,VT, Op.getOperand(0),
Torok Edwin	4fea2e9	2008-04-06 21:23:02 +0000	[diff] [blame]	1393	TLO.DAG.getConstant(Expanded, VT));
				1394	return TLO.CombineTo(Op, New);
				1395	}
				1396	// if it already has all the bits set, nothing to change
				1397	// but don't shrink either!
				1398	} else if (TLO.ShrinkDemandedConstant(Op, NewMask)) {
				1399	return true;
				1400	}
				1401	}
				1402
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1403	KnownZero = KnownZeroOut;
				1404	KnownOne = KnownOneOut;
				1405	break;
Chris Lattner	c6fd6cd	2006-01-30 04:09:27 +0000	[diff] [blame]	1406	case ISD::SELECT:
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1407	if (SimplifyDemandedBits(Op.getOperand(2), NewMask, KnownZero,
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1408	KnownOne, TLO, Depth+1))
				1409	return true;
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1410	if (SimplifyDemandedBits(Op.getOperand(1), NewMask, KnownZero2,
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1411	KnownOne2, TLO, Depth+1))
				1412	return true;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1413	assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
				1414	assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
				1415
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1416	// If the operands are constants, see if we can simplify them.
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1417	if (TLO.ShrinkDemandedConstant(Op, NewMask))
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1418	return true;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1419
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1420	// Only known if known in both the LHS and RHS.
				1421	KnownOne &= KnownOne2;
				1422	KnownZero &= KnownZero2;
				1423	break;
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1424	case ISD::SELECT_CC:
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1425	if (SimplifyDemandedBits(Op.getOperand(3), NewMask, KnownZero,
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1426	KnownOne, TLO, Depth+1))
				1427	return true;
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1428	if (SimplifyDemandedBits(Op.getOperand(2), NewMask, KnownZero2,
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1429	KnownOne2, TLO, Depth+1))
				1430	return true;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1431	assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
				1432	assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
				1433
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1434	// If the operands are constants, see if we can simplify them.
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1435	if (TLO.ShrinkDemandedConstant(Op, NewMask))
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1436	return true;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1437
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1438	// Only known if known in both the LHS and RHS.
				1439	KnownOne &= KnownOne2;
				1440	KnownZero &= KnownZero2;
				1441	break;
Chris Lattner	c6fd6cd	2006-01-30 04:09:27 +0000	[diff] [blame]	1442	case ISD::SHL:
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1443	if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
Dan Gohman	f5aeb1a	2008-09-12 16:56:44 +0000	[diff] [blame]	1444	unsigned ShAmt = SA->getZExtValue();
Dan Gohman	475871a	2008-07-27 21:46:04 +0000	[diff] [blame]	1445	SDValue InOp = Op.getOperand(0);
Chris Lattner	895c4ab	2007-04-17 21:14:16 +0000	[diff] [blame]	1446
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1447	// If the shift count is an invalid immediate, don't do anything.
				1448	if (ShAmt >= BitWidth)
				1449	break;
				1450
Chris Lattner	895c4ab	2007-04-17 21:14:16 +0000	[diff] [blame]	1451	// If this is ((X >>u C1) << ShAmt), see if we can simplify this into a
				1452	// single shift. We can do this if the bottom bits (which are shifted
				1453	// out) are never demanded.
				1454	if (InOp.getOpcode() == ISD::SRL &&
				1455	isa<ConstantSDNode>(InOp.getOperand(1))) {
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1456	if (ShAmt && (NewMask & APInt::getLowBitsSet(BitWidth, ShAmt)) == 0) {
Dan Gohman	f5aeb1a	2008-09-12 16:56:44 +0000	[diff] [blame]	1457	unsigned C1= cast<ConstantSDNode>(InOp.getOperand(1))->getZExtValue();
Chris Lattner	895c4ab	2007-04-17 21:14:16 +0000	[diff] [blame]	1458	unsigned Opc = ISD::SHL;
				1459	int Diff = ShAmt-C1;
				1460	if (Diff < 0) {
				1461	Diff = -Diff;
				1462	Opc = ISD::SRL;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1463	}
				1464
				1465	SDValue NewSA =
Chris Lattner	4e7e6cd	2007-05-30 16:30:06 +0000	[diff] [blame]	1466	TLO.DAG.getConstant(Diff, Op.getOperand(1).getValueType());
Owen Anderson	e50ed30	2009-08-10 22:56:29 +0000	[diff] [blame]	1467	EVT VT = Op.getValueType();
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	1468	return TLO.CombineTo(Op, TLO.DAG.getNode(Opc, dl, VT,
Chris Lattner	895c4ab	2007-04-17 21:14:16 +0000	[diff] [blame]	1469	InOp.getOperand(0), NewSA));
				1470	}
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1471	}
				1472
Dan Gohman	a4f4d69	2010-07-23 18:03:30 +0000	[diff] [blame]	1473	if (SimplifyDemandedBits(InOp, NewMask.lshr(ShAmt),
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1474	KnownZero, KnownOne, TLO, Depth+1))
Chris Lattner	c6fd6cd	2006-01-30 04:09:27 +0000	[diff] [blame]	1475	return true;
Dan Gohman	a4f4d69	2010-07-23 18:03:30 +0000	[diff] [blame]	1476
				1477	// Convert (shl (anyext x, c)) to (anyext (shl x, c)) if the high bits
				1478	// are not demanded. This will likely allow the anyext to be folded away.
				1479	if (InOp.getNode()->getOpcode() == ISD::ANY_EXTEND) {
				1480	SDValue InnerOp = InOp.getNode()->getOperand(0);
				1481	EVT InnerVT = InnerOp.getValueType();
Eli Friedman	2dd0353	2011-12-09 01:16:26 +0000	[diff] [blame]	1482	unsigned InnerBits = InnerVT.getSizeInBits();
				1483	if (ShAmt < InnerBits && NewMask.lshr(InnerBits) == 0 &&
Dan Gohman	a4f4d69	2010-07-23 18:03:30 +0000	[diff] [blame]	1484	isTypeDesirableForOp(ISD::SHL, InnerVT)) {
Owen Anderson	95771af	2011-02-25 21:41:48 +0000	[diff] [blame]	1485	EVT ShTy = getShiftAmountTy(InnerVT);
Dan Gohman	cd20c6f	2010-07-23 21:08:12 +0000	[diff] [blame]	1486	if (!APInt(BitWidth, ShAmt).isIntN(ShTy.getSizeInBits()))
				1487	ShTy = InnerVT;
Dan Gohman	a4f4d69	2010-07-23 18:03:30 +0000	[diff] [blame]	1488	SDValue NarrowShl =
				1489	TLO.DAG.getNode(ISD::SHL, dl, InnerVT, InnerOp,
Dan Gohman	cd20c6f	2010-07-23 21:08:12 +0000	[diff] [blame]	1490	TLO.DAG.getConstant(ShAmt, ShTy));
Dan Gohman	a4f4d69	2010-07-23 18:03:30 +0000	[diff] [blame]	1491	return
				1492	TLO.CombineTo(Op,
				1493	TLO.DAG.getNode(ISD::ANY_EXTEND, dl, Op.getValueType(),
				1494	NarrowShl));
				1495	}
				1496	}
				1497
Dan Gohman	f5aeb1a	2008-09-12 16:56:44 +0000	[diff] [blame]	1498	KnownZero <<= SA->getZExtValue();
				1499	KnownOne <<= SA->getZExtValue();
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1500	// low bits known zero.
Dan Gohman	f5aeb1a	2008-09-12 16:56:44 +0000	[diff] [blame]	1501	KnownZero \|= APInt::getLowBitsSet(BitWidth, SA->getZExtValue());
Chris Lattner	c6fd6cd	2006-01-30 04:09:27 +0000	[diff] [blame]	1502	}
				1503	break;
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1504	case ISD::SRL:
				1505	if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
Owen Anderson	e50ed30	2009-08-10 22:56:29 +0000	[diff] [blame]	1506	EVT VT = Op.getValueType();
Dan Gohman	f5aeb1a	2008-09-12 16:56:44 +0000	[diff] [blame]	1507	unsigned ShAmt = SA->getZExtValue();
Duncan Sands	83ec4b6	2008-06-06 12:08:01 +0000	[diff] [blame]	1508	unsigned VTSize = VT.getSizeInBits();
Dan Gohman	475871a	2008-07-27 21:46:04 +0000	[diff] [blame]	1509	SDValue InOp = Op.getOperand(0);
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1510
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1511	// If the shift count is an invalid immediate, don't do anything.
				1512	if (ShAmt >= BitWidth)
				1513	break;
				1514
Chris Lattner	895c4ab	2007-04-17 21:14:16 +0000	[diff] [blame]	1515	// If this is ((X << C1) >>u ShAmt), see if we can simplify this into a
				1516	// single shift. We can do this if the top bits (which are shifted out)
				1517	// are never demanded.
				1518	if (InOp.getOpcode() == ISD::SHL &&
				1519	isa<ConstantSDNode>(InOp.getOperand(1))) {
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1520	if (ShAmt && (NewMask & APInt::getHighBitsSet(VTSize, ShAmt)) == 0) {
Dan Gohman	f5aeb1a	2008-09-12 16:56:44 +0000	[diff] [blame]	1521	unsigned C1= cast<ConstantSDNode>(InOp.getOperand(1))->getZExtValue();
Chris Lattner	895c4ab	2007-04-17 21:14:16 +0000	[diff] [blame]	1522	unsigned Opc = ISD::SRL;
				1523	int Diff = ShAmt-C1;
				1524	if (Diff < 0) {
				1525	Diff = -Diff;
				1526	Opc = ISD::SHL;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1527	}
				1528
Dan Gohman	475871a	2008-07-27 21:46:04 +0000	[diff] [blame]	1529	SDValue NewSA =
Chris Lattner	8c7d2d5	2007-04-17 22:53:02 +0000	[diff] [blame]	1530	TLO.DAG.getConstant(Diff, Op.getOperand(1).getValueType());
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	1531	return TLO.CombineTo(Op, TLO.DAG.getNode(Opc, dl, VT,
Chris Lattner	895c4ab	2007-04-17 21:14:16 +0000	[diff] [blame]	1532	InOp.getOperand(0), NewSA));
				1533	}
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1534	}
				1535
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1536	// Compute the new bits that are at the top now.
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1537	if (SimplifyDemandedBits(InOp, (NewMask << ShAmt),
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1538	KnownZero, KnownOne, TLO, Depth+1))
				1539	return true;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1540	assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1541	KnownZero = KnownZero.lshr(ShAmt);
				1542	KnownOne = KnownOne.lshr(ShAmt);
Chris Lattner	c4fa603	2006-06-13 16:52:37 +0000	[diff] [blame]	1543
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1544	APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt);
Chris Lattner	c4fa603	2006-06-13 16:52:37 +0000	[diff] [blame]	1545	KnownZero \|= HighBits; // High bits known zero.
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1546	}
				1547	break;
				1548	case ISD::SRA:
Dan Gohman	e5af2d3	2009-01-29 01:59:02 +0000	[diff] [blame]	1549	// If this is an arithmetic shift right and only the low-bit is set, we can
				1550	// always convert this into a logical shr, even if the shift amount is
				1551	// variable. The low bit of the shift cannot be an input sign bit unless
				1552	// the shift amount is >= the size of the datatype, which is undefined.
Eli Friedman	2dd0353	2011-12-09 01:16:26 +0000	[diff] [blame]	1553	if (NewMask == 1)
Evan Cheng	e5b51ac	2010-04-17 06:13:15 +0000	[diff] [blame]	1554	return TLO.CombineTo(Op,
				1555	TLO.DAG.getNode(ISD::SRL, dl, Op.getValueType(),
				1556	Op.getOperand(0), Op.getOperand(1)));
Dan Gohman	e5af2d3	2009-01-29 01:59:02 +0000	[diff] [blame]	1557
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1558	if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
Owen Anderson	e50ed30	2009-08-10 22:56:29 +0000	[diff] [blame]	1559	EVT VT = Op.getValueType();
Dan Gohman	f5aeb1a	2008-09-12 16:56:44 +0000	[diff] [blame]	1560	unsigned ShAmt = SA->getZExtValue();
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1561
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1562	// If the shift count is an invalid immediate, don't do anything.
				1563	if (ShAmt >= BitWidth)
				1564	break;
				1565
				1566	APInt InDemandedMask = (NewMask << ShAmt);
Chris Lattner	1b73713	2006-05-08 17:22:53 +0000	[diff] [blame]	1567
				1568	// If any of the demanded bits are produced by the sign extension, we also
				1569	// demand the input sign bit.
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1570	APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt);
				1571	if (HighBits.intersects(NewMask))
Dan Gohman	87862e7	2009-12-11 21:31:27 +0000	[diff] [blame]	1572	InDemandedMask \|= APInt::getSignBit(VT.getScalarType().getSizeInBits());
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1573
Chris Lattner	1b73713	2006-05-08 17:22:53 +0000	[diff] [blame]	1574	if (SimplifyDemandedBits(Op.getOperand(0), InDemandedMask,
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1575	KnownZero, KnownOne, TLO, Depth+1))
				1576	return true;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1577	assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1578	KnownZero = KnownZero.lshr(ShAmt);
				1579	KnownOne = KnownOne.lshr(ShAmt);
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1580
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1581	// Handle the sign bit, adjusted to where it is now in the mask.
				1582	APInt SignBit = APInt::getSignBit(BitWidth).lshr(ShAmt);
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1583
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1584	// If the input sign bit is known to be zero, or if none of the top bits
				1585	// are demanded, turn this into an unsigned shift right.
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1586	if (KnownZero.intersects(SignBit) \|\| (HighBits & ~NewMask) == HighBits) {
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1587	return TLO.CombineTo(Op, TLO.DAG.getNode(ISD::SRL, dl, VT,
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	1588	Op.getOperand(0),
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1589	Op.getOperand(1)));
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1590	} else if (KnownOne.intersects(SignBit)) { // New bits are known one.
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1591	KnownOne \|= HighBits;
				1592	}
				1593	}
				1594	break;
				1595	case ISD::SIGN_EXTEND_INREG: {
Nadav Rotem	cc61656	2012-01-15 19:27:55 +0000	[diff] [blame]	1596	EVT ExVT = cast<VTSDNode>(Op.getOperand(1))->getVT();
				1597
				1598	APInt MsbMask = APInt::getHighBitsSet(BitWidth, 1);
				1599	// If we only care about the highest bit, don't bother shifting right.
Eli Friedman	d49db36	2012-01-31 01:08:03 +0000	[diff] [blame]	1600	if (MsbMask == DemandedMask) {
Nadav Rotem	cc61656	2012-01-15 19:27:55 +0000	[diff] [blame]	1601	unsigned ShAmt = ExVT.getScalarType().getSizeInBits();
				1602	SDValue InOp = Op.getOperand(0);
Eli Friedman	d49db36	2012-01-31 01:08:03 +0000	[diff] [blame]	1603
				1604	// Compute the correct shift amount type, which must be getShiftAmountTy
				1605	// for scalar types after legalization.
				1606	EVT ShiftAmtTy = Op.getValueType();
				1607	if (TLO.LegalTypes() && !ShiftAmtTy.isVector())
				1608	ShiftAmtTy = getShiftAmountTy(ShiftAmtTy);
				1609
				1610	SDValue ShiftAmt = TLO.DAG.getConstant(BitWidth - ShAmt, ShiftAmtTy);
Nadav Rotem	cc61656	2012-01-15 19:27:55 +0000	[diff] [blame]	1611	return TLO.CombineTo(Op, TLO.DAG.getNode(ISD::SHL, dl,
				1612	Op.getValueType(), InOp, ShiftAmt));
				1613	}
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1614
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1615	// Sign extension. Compute the demanded bits in the result that are not
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1616	// present in the input.
Dan Gohman	d199636	2010-01-09 02:13:55 +0000	[diff] [blame]	1617	APInt NewBits =
				1618	APInt::getHighBitsSet(BitWidth,
Nadav Rotem	cc61656	2012-01-15 19:27:55 +0000	[diff] [blame]	1619	BitWidth - ExVT.getScalarType().getSizeInBits());
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1620
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1621	// If none of the extended bits are demanded, eliminate the sextinreg.
Eli Friedman	1d17d19	2010-08-02 04:42:25 +0000	[diff] [blame]	1622	if ((NewBits & NewMask) == 0)
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1623	return TLO.CombineTo(Op, Op.getOperand(0));
				1624
Jay Foad	40f8f62	2010-12-07 08:25:19 +0000	[diff] [blame]	1625	APInt InSignBit =
Nadav Rotem	cc61656	2012-01-15 19:27:55 +0000	[diff] [blame]	1626	APInt::getSignBit(ExVT.getScalarType().getSizeInBits()).zext(BitWidth);
Dan Gohman	d199636	2010-01-09 02:13:55 +0000	[diff] [blame]	1627	APInt InputDemandedBits =
				1628	APInt::getLowBitsSet(BitWidth,
Nadav Rotem	cc61656	2012-01-15 19:27:55 +0000	[diff] [blame]	1629	ExVT.getScalarType().getSizeInBits()) &
Dan Gohman	d199636	2010-01-09 02:13:55 +0000	[diff] [blame]	1630	NewMask;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1631
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1632	// Since the sign extended bits are demanded, we know that the sign
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1633	// bit is demanded.
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1634	InputDemandedBits \|= InSignBit;
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1635
				1636	if (SimplifyDemandedBits(Op.getOperand(0), InputDemandedBits,
				1637	KnownZero, KnownOne, TLO, Depth+1))
				1638	return true;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1639	assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1640
				1641	// If the sign bit of the input is known set or clear, then we know the
				1642	// top bits of the result.
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1643
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1644	// If the input sign bit is known zero, convert this into a zero extension.
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1645	if (KnownZero.intersects(InSignBit))
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1646	return TLO.CombineTo(Op,
Nadav Rotem	cc61656	2012-01-15 19:27:55 +0000	[diff] [blame]	1647	TLO.DAG.getZeroExtendInReg(Op.getOperand(0),dl,ExVT));
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1648
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1649	if (KnownOne.intersects(InSignBit)) { // Input sign bit known set
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1650	KnownOne \|= NewBits;
				1651	KnownZero &= ~NewBits;
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1652	} else { // Input sign bit unknown
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1653	KnownZero &= ~NewBits;
				1654	KnownOne &= ~NewBits;
				1655	}
				1656	break;
				1657	}
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1658	case ISD::ZERO_EXTEND: {
Dan Gohman	d199636	2010-01-09 02:13:55 +0000	[diff] [blame]	1659	unsigned OperandBitWidth =
				1660	Op.getOperand(0).getValueType().getScalarType().getSizeInBits();
Jay Foad	40f8f62	2010-12-07 08:25:19 +0000	[diff] [blame]	1661	APInt InMask = NewMask.trunc(OperandBitWidth);
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1662
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1663	// If none of the top bits are demanded, convert this into an any_extend.
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1664	APInt NewBits =
				1665	APInt::getHighBitsSet(BitWidth, BitWidth - OperandBitWidth) & NewMask;
				1666	if (!NewBits.intersects(NewMask))
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	1667	return TLO.CombineTo(Op, TLO.DAG.getNode(ISD::ANY_EXTEND, dl,
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1668	Op.getValueType(),
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1669	Op.getOperand(0)));
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1670
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1671	if (SimplifyDemandedBits(Op.getOperand(0), InMask,
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1672	KnownZero, KnownOne, TLO, Depth+1))
				1673	return true;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1674	assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
Jay Foad	40f8f62	2010-12-07 08:25:19 +0000	[diff] [blame]	1675	KnownZero = KnownZero.zext(BitWidth);
				1676	KnownOne = KnownOne.zext(BitWidth);
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1677	KnownZero \|= NewBits;
				1678	break;
				1679	}
				1680	case ISD::SIGN_EXTEND: {
Owen Anderson	e50ed30	2009-08-10 22:56:29 +0000	[diff] [blame]	1681	EVT InVT = Op.getOperand(0).getValueType();
Dan Gohman	d199636	2010-01-09 02:13:55 +0000	[diff] [blame]	1682	unsigned InBits = InVT.getScalarType().getSizeInBits();
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1683	APInt InMask = APInt::getLowBitsSet(BitWidth, InBits);
Dan Gohman	9736028	2008-03-11 21:29:43 +0000	[diff] [blame]	1684	APInt InSignBit = APInt::getBitsSet(BitWidth, InBits - 1, InBits);
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1685	APInt NewBits = ~InMask & NewMask;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1686
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1687	// If none of the top bits are demanded, convert this into an any_extend.
				1688	if (NewBits == 0)
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	1689	return TLO.CombineTo(Op,TLO.DAG.getNode(ISD::ANY_EXTEND, dl,
				1690	Op.getValueType(),
				1691	Op.getOperand(0)));
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1692
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1693	// Since some of the sign extended bits are demanded, we know that the sign
				1694	// bit is demanded.
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1695	APInt InDemandedBits = InMask & NewMask;
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1696	InDemandedBits \|= InSignBit;
Jay Foad	40f8f62	2010-12-07 08:25:19 +0000	[diff] [blame]	1697	InDemandedBits = InDemandedBits.trunc(InBits);
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1698
				1699	if (SimplifyDemandedBits(Op.getOperand(0), InDemandedBits, KnownZero,
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1700	KnownOne, TLO, Depth+1))
				1701	return true;
Jay Foad	40f8f62	2010-12-07 08:25:19 +0000	[diff] [blame]	1702	KnownZero = KnownZero.zext(BitWidth);
				1703	KnownOne = KnownOne.zext(BitWidth);
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1704
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1705	// If the sign bit is known zero, convert this to a zero extend.
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1706	if (KnownZero.intersects(InSignBit))
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	1707	return TLO.CombineTo(Op, TLO.DAG.getNode(ISD::ZERO_EXTEND, dl,
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1708	Op.getValueType(),
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1709	Op.getOperand(0)));
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1710
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1711	// If the sign bit is known one, the top bits match.
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1712	if (KnownOne.intersects(InSignBit)) {
Rafael Espindola	26c8dcc	2012-04-04 12:51:34 +0000	[diff] [blame]	1713	KnownOne \|= NewBits;
				1714	assert((KnownZero & NewBits) == 0);
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1715	} else { // Otherwise, top bits aren't known.
Rafael Espindola	26c8dcc	2012-04-04 12:51:34 +0000	[diff] [blame]	1716	assert((KnownOne & NewBits) == 0);
				1717	assert((KnownZero & NewBits) == 0);
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1718	}
				1719	break;
				1720	}
				1721	case ISD::ANY_EXTEND: {
Dan Gohman	d199636	2010-01-09 02:13:55 +0000	[diff] [blame]	1722	unsigned OperandBitWidth =
				1723	Op.getOperand(0).getValueType().getScalarType().getSizeInBits();
Jay Foad	40f8f62	2010-12-07 08:25:19 +0000	[diff] [blame]	1724	APInt InMask = NewMask.trunc(OperandBitWidth);
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1725	if (SimplifyDemandedBits(Op.getOperand(0), InMask,
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1726	KnownZero, KnownOne, TLO, Depth+1))
				1727	return true;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1728	assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
Jay Foad	40f8f62	2010-12-07 08:25:19 +0000	[diff] [blame]	1729	KnownZero = KnownZero.zext(BitWidth);
				1730	KnownOne = KnownOne.zext(BitWidth);
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1731	break;
				1732	}
Chris Lattner	fe8babf	2006-05-05 22:32:12 +0000	[diff] [blame]	1733	case ISD::TRUNCATE: {
Chris Lattner	c93dfda	2006-05-06 00:11:52 +0000	[diff] [blame]	1734	// Simplify the input, using demanded bit information, and compute the known
				1735	// zero/one bits live out.
Dan Gohman	042919c	2010-03-01 17:59:21 +0000	[diff] [blame]	1736	unsigned OperandBitWidth =
				1737	Op.getOperand(0).getValueType().getScalarType().getSizeInBits();
Jay Foad	40f8f62	2010-12-07 08:25:19 +0000	[diff] [blame]	1738	APInt TruncMask = NewMask.zext(OperandBitWidth);
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1739	if (SimplifyDemandedBits(Op.getOperand(0), TruncMask,
Chris Lattner	fe8babf	2006-05-05 22:32:12 +0000	[diff] [blame]	1740	KnownZero, KnownOne, TLO, Depth+1))
				1741	return true;
Jay Foad	40f8f62	2010-12-07 08:25:19 +0000	[diff] [blame]	1742	KnownZero = KnownZero.trunc(BitWidth);
				1743	KnownOne = KnownOne.trunc(BitWidth);
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1744
Chris Lattner	c93dfda	2006-05-06 00:11:52 +0000	[diff] [blame]	1745	// If the input is only used by this truncate, see if we can shrink it based
				1746	// on the known demanded bits.
Gabor Greif	ba36cb5	2008-08-28 21:40:38 +0000	[diff] [blame]	1747	if (Op.getOperand(0).getNode()->hasOneUse()) {
Dan Gohman	475871a	2008-07-27 21:46:04 +0000	[diff] [blame]	1748	SDValue In = Op.getOperand(0);
Chris Lattner	c93dfda	2006-05-06 00:11:52 +0000	[diff] [blame]	1749	switch (In.getOpcode()) {
				1750	default: break;
				1751	case ISD::SRL:
				1752	// Shrink SRL by a constant if none of the high bits shifted in are
				1753	// demanded.
Evan Cheng	e5b51ac	2010-04-17 06:13:15 +0000	[diff] [blame]	1754	if (TLO.LegalTypes() &&
				1755	!isTypeDesirableForOp(ISD::SRL, Op.getValueType()))
				1756	// Do not turn (vt1 truncate (vt2 srl)) into (vt1 srl) if vt1 is
				1757	// undesirable.
				1758	break;
				1759	ConstantSDNode *ShAmt = dyn_cast<ConstantSDNode>(In.getOperand(1));
				1760	if (!ShAmt)
				1761	break;
Owen Anderson	7adf862	2011-04-13 23:22:23 +0000	[diff] [blame]	1762	SDValue Shift = In.getOperand(1);
				1763	if (TLO.LegalTypes()) {
				1764	uint64_t ShVal = ShAmt->getZExtValue();
				1765	Shift =
				1766	TLO.DAG.getConstant(ShVal, getShiftAmountTy(Op.getValueType()));
				1767	}
				1768
Evan Cheng	e5b51ac	2010-04-17 06:13:15 +0000	[diff] [blame]	1769	APInt HighBits = APInt::getHighBitsSet(OperandBitWidth,
				1770	OperandBitWidth - BitWidth);
Jay Foad	40f8f62	2010-12-07 08:25:19 +0000	[diff] [blame]	1771	HighBits = HighBits.lshr(ShAmt->getZExtValue()).trunc(BitWidth);
Evan Cheng	e5b51ac	2010-04-17 06:13:15 +0000	[diff] [blame]	1772
				1773	if (ShAmt->getZExtValue() < BitWidth && !(HighBits & NewMask)) {
				1774	// None of the shifted in bits are needed. Add a truncate of the
				1775	// shift input, then shift it.
				1776	SDValue NewTrunc = TLO.DAG.getNode(ISD::TRUNCATE, dl,
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1777	Op.getValueType(),
Evan Cheng	e5b51ac	2010-04-17 06:13:15 +0000	[diff] [blame]	1778	In.getOperand(0));
				1779	return TLO.CombineTo(Op, TLO.DAG.getNode(ISD::SRL, dl,
				1780	Op.getValueType(),
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1781	NewTrunc,
Owen Anderson	7adf862	2011-04-13 23:22:23 +0000	[diff] [blame]	1782	Shift));
Chris Lattner	c93dfda	2006-05-06 00:11:52 +0000	[diff] [blame]	1783	}
				1784	break;
				1785	}
				1786	}
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1787
				1788	assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
Chris Lattner	fe8babf	2006-05-05 22:32:12 +0000	[diff] [blame]	1789	break;
				1790	}
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1791	case ISD::AssertZext: {
Owen Anderson	7ab15f6	2011-09-03 00:26:49 +0000	[diff] [blame]	1792	// AssertZext demands all of the high bits, plus any of the low bits
				1793	// demanded by its users.
				1794	EVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT();
				1795	APInt InMask = APInt::getLowBitsSet(BitWidth,
				1796	VT.getSizeInBits());
				1797	if (SimplifyDemandedBits(Op.getOperand(0), ~InMask \| NewMask,
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1798	KnownZero, KnownOne, TLO, Depth+1))
				1799	return true;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1800	assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
Dan Gohman	400f75c	2010-06-03 20:21:33 +0000	[diff] [blame]	1801
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1802	KnownZero \|= ~InMask & NewMask;
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1803	break;
				1804	}
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1805	case ISD::BITCAST:
Stuart Hastings	57f1fde	2011-06-06 16:44:31 +0000	[diff] [blame]	1806	// If this is an FP->Int bitcast and if the sign bit is the only
				1807	// thing demanded, turn this into a FGETSIGN.
Eli Friedman	ca072a3	2011-12-15 02:07:20 +0000	[diff] [blame]	1808	if (!TLO.LegalOperations() &&
				1809	!Op.getValueType().isVector() &&
Eli Friedman	0948f0a	2011-11-09 22:25:12 +0000	[diff] [blame]	1810	!Op.getOperand(0).getValueType().isVector() &&
Nadav Rotem	0c3e678	2011-06-12 14:56:55 +0000	[diff] [blame]	1811	NewMask == APInt::getSignBit(Op.getValueType().getSizeInBits()) &&
				1812	Op.getOperand(0).getValueType().isFloatingPoint()) {
Stuart Hastings	57f1fde	2011-06-06 16:44:31 +0000	[diff] [blame]	1813	bool OpVTLegal = isOperationLegalOrCustom(ISD::FGETSIGN, Op.getValueType());
				1814	bool i32Legal = isOperationLegalOrCustom(ISD::FGETSIGN, MVT::i32);
				1815	if ((OpVTLegal \|\| i32Legal) && Op.getValueType().isSimple()) {
				1816	EVT Ty = OpVTLegal ? Op.getValueType() : MVT::i32;
Chris Lattner	2ceb2cf	2007-12-22 21:35:38 +0000	[diff] [blame]	1817	// Make a FGETSIGN + SHL to move the sign bit into the appropriate
				1818	// place. We expect the SHL to be eliminated by other optimizations.
Stuart Hastings	090bf19	2011-06-01 18:32:25 +0000	[diff] [blame]	1819	SDValue Sign = TLO.DAG.getNode(ISD::FGETSIGN, dl, Ty, Op.getOperand(0));
Stuart Hastings	57f1fde	2011-06-06 16:44:31 +0000	[diff] [blame]	1820	unsigned OpVTSizeInBits = Op.getValueType().getSizeInBits();
				1821	if (!OpVTLegal && OpVTSizeInBits > 32)
Stuart Hastings	090bf19	2011-06-01 18:32:25 +0000	[diff] [blame]	1822	Sign = TLO.DAG.getNode(ISD::ZERO_EXTEND, dl, Op.getValueType(), Sign);
Duncan Sands	83ec4b6	2008-06-06 12:08:01 +0000	[diff] [blame]	1823	unsigned ShVal = Op.getValueType().getSizeInBits()-1;
Stuart Hastings	bdce372	2011-06-01 14:04:17 +0000	[diff] [blame]	1824	SDValue ShAmt = TLO.DAG.getConstant(ShVal, Op.getValueType());
Stuart Hastings	3dfc4b12	2011-05-19 18:48:20 +0000	[diff] [blame]	1825	return TLO.CombineTo(Op, TLO.DAG.getNode(ISD::SHL, dl,
				1826	Op.getValueType(),
Chris Lattner	2ceb2cf	2007-12-22 21:35:38 +0000	[diff] [blame]	1827	Sign, ShAmt));
				1828	}
				1829	}
Chris Lattner	2ceb2cf	2007-12-22 21:35:38 +0000	[diff] [blame]	1830	break;
Dan Gohman	97121ba	2009-04-08 00:15:30 +0000	[diff] [blame]	1831	case ISD::ADD:
				1832	case ISD::MUL:
				1833	case ISD::SUB: {
				1834	// Add, Sub, and Mul don't demand any bits in positions beyond that
				1835	// of the highest bit demanded of them.
				1836	APInt LoMask = APInt::getLowBitsSet(BitWidth,
				1837	BitWidth - NewMask.countLeadingZeros());
				1838	if (SimplifyDemandedBits(Op.getOperand(0), LoMask, KnownZero2,
				1839	KnownOne2, TLO, Depth+1))
				1840	return true;
				1841	if (SimplifyDemandedBits(Op.getOperand(1), LoMask, KnownZero2,
				1842	KnownOne2, TLO, Depth+1))
				1843	return true;
				1844	// See if the operation should be performed at a smaller bit width.
Dan Gohman	4e39e9d	2010-06-24 14:30:44 +0000	[diff] [blame]	1845	if (TLO.ShrinkDemandedOp(Op, BitWidth, NewMask, dl))
Dan Gohman	97121ba	2009-04-08 00:15:30 +0000	[diff] [blame]	1846	return true;
				1847	}
				1848	// FALL THROUGH
Dan Gohman	54eed37	2008-05-06 00:53:29 +0000	[diff] [blame]	1849	default:
Chris Lattner	1482b5f	2006-04-02 06:15:09 +0000	[diff] [blame]	1850	// Just use ComputeMaskedBits to compute output bits.
Rafael Espindola	26c8dcc	2012-04-04 12:51:34 +0000	[diff] [blame]	1851	TLO.DAG.ComputeMaskedBits(Op, KnownZero, KnownOne, Depth);
Chris Lattner	a6bc5a4	2006-02-27 01:00:42 +0000	[diff] [blame]	1852	break;
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1853	}
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1854
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1855	// If we know the value of all of the demanded bits, return this as a
				1856	// constant.
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1857	if ((NewMask & (KnownZero\|KnownOne)) == NewMask)
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1858	return TLO.CombineTo(Op, TLO.DAG.getConstant(KnownOne, Op.getValueType()));
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1859
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1860	return false;
				1861	}
				1862
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1863	/// computeMaskedBitsForTargetNode - Determine which of the bits specified
				1864	/// in Mask are known to be either zero or one and return them in the
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1865	/// KnownZero/KnownOne bitsets.
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1866	void TargetLowering::computeMaskedBitsForTargetNode(const SDValue Op,
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1867	APInt &KnownZero,
Dan Gohman	fd29e0e	2008-02-13 00:35:47 +0000	[diff] [blame]	1868	APInt &KnownOne,
Dan Gohman	ea859be	2007-06-22 14:59:07 +0000	[diff] [blame]	1869	const SelectionDAG &DAG,
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1870	unsigned Depth) const {
Chris Lattner	1b5232a	2006-04-02 06:19:46 +0000	[diff] [blame]	1871	assert((Op.getOpcode() >= ISD::BUILTIN_OP_END \|\|
				1872	Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN \|\|
				1873	Op.getOpcode() == ISD::INTRINSIC_W_CHAIN \|\|
				1874	Op.getOpcode() == ISD::INTRINSIC_VOID) &&
Chris Lattner	c6fd6cd	2006-01-30 04:09:27 +0000	[diff] [blame]	1875	"Should use MaskedValueIsZero if you don't know whether Op"
				1876	" is a target node!");
Rafael Espindola	26c8dcc	2012-04-04 12:51:34 +0000	[diff] [blame]	1877	KnownZero = KnownOne = APInt(KnownOne.getBitWidth(), 0);
Evan Cheng	3a03ebb	2005-12-21 23:05:39 +0000	[diff] [blame]	1878	}
Chris Lattner	4ccb070	2006-01-26 20:37:03 +0000	[diff] [blame]	1879
Chris Lattner	5c3e21d	2006-05-06 09:27:13 +0000	[diff] [blame]	1880	/// ComputeNumSignBitsForTargetNode - This method can be implemented by
				1881	/// targets that want to expose additional information about sign bits to the
				1882	/// DAG Combiner.
Dan Gohman	475871a	2008-07-27 21:46:04 +0000	[diff] [blame]	1883	unsigned TargetLowering::ComputeNumSignBitsForTargetNode(SDValue Op,
Chris Lattner	5c3e21d	2006-05-06 09:27:13 +0000	[diff] [blame]	1884	unsigned Depth) const {
				1885	assert((Op.getOpcode() >= ISD::BUILTIN_OP_END \|\|
				1886	Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN \|\|
				1887	Op.getOpcode() == ISD::INTRINSIC_W_CHAIN \|\|
				1888	Op.getOpcode() == ISD::INTRINSIC_VOID) &&
				1889	"Should use ComputeNumSignBits if you don't know whether Op"
				1890	" is a target node!");
				1891	return 1;
				1892	}
				1893
Dan Gohman	97d1163	2009-02-15 23:59:32 +0000	[diff] [blame]	1894	/// ValueHasExactlyOneBitSet - Test if the given value is known to have exactly
				1895	/// one bit set. This differs from ComputeMaskedBits in that it doesn't need to
				1896	/// determine which bit is set.
				1897	///
Dale Johannesen	85b0ede	2009-02-11 19:19:41 +0000	[diff] [blame]	1898	static bool ValueHasExactlyOneBitSet(SDValue Val, const SelectionDAG &DAG) {
Dan Gohman	97d1163	2009-02-15 23:59:32 +0000	[diff] [blame]	1899	// A left-shift of a constant one will have exactly one bit set, because
				1900	// shifting the bit off the end is undefined.
				1901	if (Val.getOpcode() == ISD::SHL)
				1902	if (ConstantSDNode *C =
				1903	dyn_cast<ConstantSDNode>(Val.getNode()->getOperand(0)))
				1904	if (C->getAPIntValue() == 1)
				1905	return true;
Dan Gohman	e5af2d3	2009-01-29 01:59:02 +0000	[diff] [blame]	1906
Dan Gohman	97d1163	2009-02-15 23:59:32 +0000	[diff] [blame]	1907	// Similarly, a right-shift of a constant sign-bit will have exactly
				1908	// one bit set.
				1909	if (Val.getOpcode() == ISD::SRL)
				1910	if (ConstantSDNode *C =
				1911	dyn_cast<ConstantSDNode>(Val.getNode()->getOperand(0)))
				1912	if (C->getAPIntValue().isSignBit())
				1913	return true;
				1914
				1915	// More could be done here, though the above checks are enough
				1916	// to handle some common cases.
				1917
				1918	// Fall back to ComputeMaskedBits to catch other known cases.
Owen Anderson	e50ed30	2009-08-10 22:56:29 +0000	[diff] [blame]	1919	EVT OpVT = Val.getValueType();
Dan Gohman	5b870af	2010-03-02 02:14:38 +0000	[diff] [blame]	1920	unsigned BitWidth = OpVT.getScalarType().getSizeInBits();
Dan Gohman	e5af2d3	2009-01-29 01:59:02 +0000	[diff] [blame]	1921	APInt KnownZero, KnownOne;
Rafael Espindola	26c8dcc	2012-04-04 12:51:34 +0000	[diff] [blame]	1922	DAG.ComputeMaskedBits(Val, KnownZero, KnownOne);
Dale Johannesen	85b0ede	2009-02-11 19:19:41 +0000	[diff] [blame]	1923	return (KnownZero.countPopulation() == BitWidth - 1) &&
				1924	(KnownOne.countPopulation() == 1);
Dan Gohman	e5af2d3	2009-01-29 01:59:02 +0000	[diff] [blame]	1925	}
Chris Lattner	5c3e21d	2006-05-06 09:27:13 +0000	[diff] [blame]	1926
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1927	/// SimplifySetCC - Try to simplify a setcc built with the specified operands
Dan Gohman	475871a	2008-07-27 21:46:04 +0000	[diff] [blame]	1928	/// and cc. If it is unable to simplify it, return a null SDValue.
				1929	SDValue
Owen Anderson	e50ed30	2009-08-10 22:56:29 +0000	[diff] [blame]	1930	TargetLowering::SimplifySetCC(EVT VT, SDValue N0, SDValue N1,
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	1931	ISD::CondCode Cond, bool foldBooleans,
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	1932	DAGCombinerInfo &DCI, DebugLoc dl) const {
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	1933	SelectionDAG &DAG = DCI.DAG;
				1934
				1935	// These setcc operations always fold.
				1936	switch (Cond) {
				1937	default: break;
				1938	case ISD::SETFALSE:
				1939	case ISD::SETFALSE2: return DAG.getConstant(0, VT);
				1940	case ISD::SETTRUE:
				1941	case ISD::SETTRUE2: return DAG.getConstant(1, VT);
				1942	}
				1943
Chris Lattner	7a2bdde	2011-04-15 05:18:47 +0000	[diff] [blame]	1944	// Ensure that the constant occurs on the RHS, and fold constant
				1945	// comparisons.
				1946	if (isa<ConstantSDNode>(N0.getNode()))
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	1947	return DAG.getSetCC(dl, VT, N1, N0, ISD::getSetCCSwappedOperands(Cond));
Eric Christopher	362fee9	2011-06-17 20:41:29 +0000	[diff] [blame]	1948
Gabor Greif	ba36cb5	2008-08-28 21:40:38 +0000	[diff] [blame]	1949	if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode())) {
Dan Gohman	6c6cd1c	2008-03-03 22:22:56 +0000	[diff] [blame]	1950	const APInt &C1 = N1C->getAPIntValue();
Dale Johannesen	89217a6	2008-11-07 01:28:02 +0000	[diff] [blame]	1951
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	1952	// If the LHS is '(srl (ctlz x), 5)', the RHS is 0/1, and this is an
				1953	// equality comparison, then we're just comparing whether X itself is
				1954	// zero.
				1955	if (N0.getOpcode() == ISD::SRL && (C1 == 0 \|\| C1 == 1) &&
				1956	N0.getOperand(0).getOpcode() == ISD::CTLZ &&
				1957	N0.getOperand(1).getOpcode() == ISD::Constant) {
Evan Cheng	347a9cb	2010-01-07 20:58:44 +0000	[diff] [blame]	1958	const APInt &ShAmt
				1959	= cast<ConstantSDNode>(N0.getOperand(1))->getAPIntValue();
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	1960	if ((Cond == ISD::SETEQ \|\| Cond == ISD::SETNE) &&
				1961	ShAmt == Log2_32(N0.getValueType().getSizeInBits())) {
				1962	if ((C1 == 0) == (Cond == ISD::SETEQ)) {
				1963	// (srl (ctlz x), 5) == 0 -> X != 0
				1964	// (srl (ctlz x), 5) != 1 -> X != 0
				1965	Cond = ISD::SETNE;
				1966	} else {
				1967	// (srl (ctlz x), 5) != 0 -> X == 0
				1968	// (srl (ctlz x), 5) == 1 -> X == 0
				1969	Cond = ISD::SETEQ;
				1970	}
				1971	SDValue Zero = DAG.getConstant(0, N0.getValueType());
				1972	return DAG.getSetCC(dl, VT, N0.getOperand(0).getOperand(0),
				1973	Zero, Cond);
				1974	}
				1975	}
				1976
Benjamin Kramer	d822892	2011-01-17 12:04:57 +0000	[diff] [blame]	1977	SDValue CTPOP = N0;
				1978	// Look through truncs that don't change the value of a ctpop.
				1979	if (N0.hasOneUse() && N0.getOpcode() == ISD::TRUNCATE)
				1980	CTPOP = N0.getOperand(0);
				1981
				1982	if (CTPOP.hasOneUse() && CTPOP.getOpcode() == ISD::CTPOP &&
Benjamin Kramer	c9b6a3e	2011-01-17 18:00:28 +0000	[diff] [blame]	1983	(N0 == CTPOP \|\| N0.getValueType().getSizeInBits() >
Benjamin Kramer	d822892	2011-01-17 12:04:57 +0000	[diff] [blame]	1984	Log2_32_Ceil(CTPOP.getValueType().getSizeInBits()))) {
				1985	EVT CTVT = CTPOP.getValueType();
				1986	SDValue CTOp = CTPOP.getOperand(0);
				1987
				1988	// (ctpop x) u< 2 -> (x & x-1) == 0
				1989	// (ctpop x) u> 1 -> (x & x-1) != 0
				1990	if ((Cond == ISD::SETULT && C1 == 2) \|\| (Cond == ISD::SETUGT && C1 == 1)){
				1991	SDValue Sub = DAG.getNode(ISD::SUB, dl, CTVT, CTOp,
				1992	DAG.getConstant(1, CTVT));
				1993	SDValue And = DAG.getNode(ISD::AND, dl, CTVT, CTOp, Sub);
				1994	ISD::CondCode CC = Cond == ISD::SETULT ? ISD::SETEQ : ISD::SETNE;
				1995	return DAG.getSetCC(dl, VT, And, DAG.getConstant(0, CTVT), CC);
				1996	}
				1997
				1998	// TODO: (ctpop x) == 1 -> x && (x & x-1) == 0 iff ctpop is illegal.
				1999	}
				2000
Benjamin Kramer	e7cf062	2011-04-22 18:47:44 +0000	[diff] [blame]	2001	// (zext x) == C --> x == (trunc C)
				2002	if (DCI.isBeforeLegalize() && N0->hasOneUse() &&
				2003	(Cond == ISD::SETEQ \|\| Cond == ISD::SETNE)) {
				2004	unsigned MinBits = N0.getValueSizeInBits();
				2005	SDValue PreZExt;
				2006	if (N0->getOpcode() == ISD::ZERO_EXTEND) {
				2007	// ZExt
				2008	MinBits = N0->getOperand(0).getValueSizeInBits();
				2009	PreZExt = N0->getOperand(0);
				2010	} else if (N0->getOpcode() == ISD::AND) {
				2011	// DAGCombine turns costly ZExts into ANDs
				2012	if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N0->getOperand(1)))
				2013	if ((C->getAPIntValue()+1).isPowerOf2()) {
				2014	MinBits = C->getAPIntValue().countTrailingOnes();
				2015	PreZExt = N0->getOperand(0);
				2016	}
				2017	} else if (LoadSDNode *LN0 = dyn_cast<LoadSDNode>(N0)) {
				2018	// ZEXTLOAD
				2019	if (LN0->getExtensionType() == ISD::ZEXTLOAD) {
				2020	MinBits = LN0->getMemoryVT().getSizeInBits();
				2021	PreZExt = N0;
				2022	}
				2023	}
				2024
				2025	// Make sure we're not loosing bits from the constant.
				2026	if (MinBits < C1.getBitWidth() && MinBits > C1.getActiveBits()) {
				2027	EVT MinVT = EVT::getIntegerVT(*DAG.getContext(), MinBits);
				2028	if (isTypeDesirableForOp(ISD::SETCC, MinVT)) {
				2029	// Will get folded away.
				2030	SDValue Trunc = DAG.getNode(ISD::TRUNCATE, dl, MinVT, PreZExt);
				2031	SDValue C = DAG.getConstant(C1.trunc(MinBits), MinVT);
				2032	return DAG.getSetCC(dl, VT, Trunc, C, Cond);
				2033	}
				2034	}
				2035	}
				2036
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2037	// If the LHS is '(and load, const)', the RHS is 0,
				2038	// the test is for equality or unsigned, and all 1 bits of the const are
				2039	// in the same partial word, see if we can shorten the load.
				2040	if (DCI.isBeforeLegalize() &&
				2041	N0.getOpcode() == ISD::AND && C1 == 0 &&
				2042	N0.getNode()->hasOneUse() &&
				2043	isa<LoadSDNode>(N0.getOperand(0)) &&
				2044	N0.getOperand(0).getNode()->hasOneUse() &&
				2045	isa<ConstantSDNode>(N0.getOperand(1))) {
				2046	LoadSDNode *Lod = cast<LoadSDNode>(N0.getOperand(0));
Evan Cheng	347a9cb	2010-01-07 20:58:44 +0000	[diff] [blame]	2047	APInt bestMask;
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2048	unsigned bestWidth = 0, bestOffset = 0;
Evan Cheng	347a9cb	2010-01-07 20:58:44 +0000	[diff] [blame]	2049	if (!Lod->isVolatile() && Lod->isUnindexed()) {
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2050	unsigned origWidth = N0.getValueType().getSizeInBits();
Evan Cheng	347a9cb	2010-01-07 20:58:44 +0000	[diff] [blame]	2051	unsigned maskWidth = origWidth;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2052	// We can narrow (e.g.) 16-bit extending loads on 32-bit target to
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2053	// 8 bits, but have to be careful...
				2054	if (Lod->getExtensionType() != ISD::NON_EXTLOAD)
				2055	origWidth = Lod->getMemoryVT().getSizeInBits();
Evan Cheng	347a9cb	2010-01-07 20:58:44 +0000	[diff] [blame]	2056	const APInt &Mask =
				2057	cast<ConstantSDNode>(N0.getOperand(1))->getAPIntValue();
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2058	for (unsigned width = origWidth / 2; width>=8; width /= 2) {
Evan Cheng	347a9cb	2010-01-07 20:58:44 +0000	[diff] [blame]	2059	APInt newMask = APInt::getLowBitsSet(maskWidth, width);
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2060	for (unsigned offset=0; offset<origWidth/width; offset++) {
				2061	if ((newMask & Mask) == Mask) {
				2062	if (!TD->isLittleEndian())
				2063	bestOffset = (origWidth/width - offset - 1) * (width/8);
				2064	else
				2065	bestOffset = (uint64_t)offset * (width/8);
Evan Cheng	347a9cb	2010-01-07 20:58:44 +0000	[diff] [blame]	2066	bestMask = Mask.lshr(offset * (width/8) * 8);
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2067	bestWidth = width;
				2068	break;
Dale Johannesen	89217a6	2008-11-07 01:28:02 +0000	[diff] [blame]	2069	}
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2070	newMask = newMask << width;
Dale Johannesen	89217a6	2008-11-07 01:28:02 +0000	[diff] [blame]	2071	}
				2072	}
				2073	}
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2074	if (bestWidth) {
Chris Lattner	c0c7fca	2011-04-14 04:12:47 +0000	[diff] [blame]	2075	EVT newVT = EVT::getIntegerVT(*DAG.getContext(), bestWidth);
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2076	if (newVT.isRound()) {
Owen Anderson	e50ed30	2009-08-10 22:56:29 +0000	[diff] [blame]	2077	EVT PtrType = Lod->getOperand(1).getValueType();
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2078	SDValue Ptr = Lod->getBasePtr();
				2079	if (bestOffset != 0)
				2080	Ptr = DAG.getNode(ISD::ADD, dl, PtrType, Lod->getBasePtr(),
				2081	DAG.getConstant(bestOffset, PtrType));
				2082	unsigned NewAlign = MinAlign(Lod->getAlignment(), bestOffset);
				2083	SDValue NewLoad = DAG.getLoad(newVT, dl, Lod->getChain(), Ptr,
Chris Lattner	ecf42c4	2010-09-21 16:36:31 +0000	[diff] [blame]	2084	Lod->getPointerInfo().getWithOffset(bestOffset),
Pete Cooper	d752e0f	2011-11-08 18:42:53 +0000	[diff] [blame]	2085	false, false, false, NewAlign);
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2086	return DAG.getSetCC(dl, VT,
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2087	DAG.getNode(ISD::AND, dl, newVT, NewLoad,
Evan Cheng	347a9cb	2010-01-07 20:58:44 +0000	[diff] [blame]	2088	DAG.getConstant(bestMask.trunc(bestWidth),
				2089	newVT)),
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2090	DAG.getConstant(0LL, newVT), Cond);
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2091	}
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2092	}
				2093	}
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2094
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2095	// If the LHS is a ZERO_EXTEND, perform the comparison on the input.
				2096	if (N0.getOpcode() == ISD::ZERO_EXTEND) {
				2097	unsigned InSize = N0.getOperand(0).getValueType().getSizeInBits();
				2098
				2099	// If the comparison constant has bits in the upper part, the
				2100	// zero-extended value could never match.
				2101	if (C1.intersects(APInt::getHighBitsSet(C1.getBitWidth(),
				2102	C1.getBitWidth() - InSize))) {
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2103	switch (Cond) {
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2104	case ISD::SETUGT:
				2105	case ISD::SETUGE:
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2106	case ISD::SETEQ: return DAG.getConstant(0, VT);
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2107	case ISD::SETULT:
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2108	case ISD::SETULE:
				2109	case ISD::SETNE: return DAG.getConstant(1, VT);
				2110	case ISD::SETGT:
				2111	case ISD::SETGE:
				2112	// True if the sign bit of C1 is set.
				2113	return DAG.getConstant(C1.isNegative(), VT);
				2114	case ISD::SETLT:
				2115	case ISD::SETLE:
				2116	// True if the sign bit of C1 isn't set.
				2117	return DAG.getConstant(C1.isNonNegative(), VT);
				2118	default:
Jakob Stoklund Olesen	78d1264	2009-07-24 18:22:59 +0000	[diff] [blame]	2119	break;
				2120	}
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2121	}
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2122
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2123	// Otherwise, we can perform the comparison with the low bits.
				2124	switch (Cond) {
				2125	case ISD::SETEQ:
				2126	case ISD::SETNE:
				2127	case ISD::SETUGT:
				2128	case ISD::SETUGE:
				2129	case ISD::SETULT:
				2130	case ISD::SETULE: {
Owen Anderson	e50ed30	2009-08-10 22:56:29 +0000	[diff] [blame]	2131	EVT newVT = N0.getOperand(0).getValueType();
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2132	if (DCI.isBeforeLegalizeOps() \|\|
				2133	(isOperationLegal(ISD::SETCC, newVT) &&
				2134	getCondCodeAction(Cond, newVT)==Legal))
				2135	return DAG.getSetCC(dl, VT, N0.getOperand(0),
Jay Foad	40f8f62	2010-12-07 08:25:19 +0000	[diff] [blame]	2136	DAG.getConstant(C1.trunc(InSize), newVT),
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2137	Cond);
				2138	break;
				2139	}
				2140	default:
				2141	break; // todo, be more careful with signed comparisons
				2142	}
				2143	} else if (N0.getOpcode() == ISD::SIGN_EXTEND_INREG &&
Evan Cheng	2c755ba	2010-02-27 07:36:59 +0000	[diff] [blame]	2144	(Cond == ISD::SETEQ \|\| Cond == ISD::SETNE)) {
Owen Anderson	e50ed30	2009-08-10 22:56:29 +0000	[diff] [blame]	2145	EVT ExtSrcTy = cast<VTSDNode>(N0.getOperand(1))->getVT();
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2146	unsigned ExtSrcTyBits = ExtSrcTy.getSizeInBits();
Owen Anderson	e50ed30	2009-08-10 22:56:29 +0000	[diff] [blame]	2147	EVT ExtDstTy = N0.getValueType();
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2148	unsigned ExtDstTyBits = ExtDstTy.getSizeInBits();
				2149
Eli Friedman	ad78a88	2010-07-30 06:44:31 +0000	[diff] [blame]	2150	// If the constant doesn't fit into the number of bits for the source of
				2151	// the sign extension, it is impossible for both sides to be equal.
				2152	if (C1.getMinSignedBits() > ExtSrcTyBits)
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2153	return DAG.getConstant(Cond == ISD::SETNE, VT);
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2154
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2155	SDValue ZextOp;
Owen Anderson	e50ed30	2009-08-10 22:56:29 +0000	[diff] [blame]	2156	EVT Op0Ty = N0.getOperand(0).getValueType();
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2157	if (Op0Ty == ExtSrcTy) {
				2158	ZextOp = N0.getOperand(0);
				2159	} else {
				2160	APInt Imm = APInt::getLowBitsSet(ExtDstTyBits, ExtSrcTyBits);
				2161	ZextOp = DAG.getNode(ISD::AND, dl, Op0Ty, N0.getOperand(0),
				2162	DAG.getConstant(Imm, Op0Ty));
				2163	}
				2164	if (!DCI.isCalledByLegalizer())
				2165	DCI.AddToWorklist(ZextOp.getNode());
				2166	// Otherwise, make this a use of a zext.
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2167	return DAG.getSetCC(dl, VT, ZextOp,
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2168	DAG.getConstant(C1 & APInt::getLowBitsSet(
				2169	ExtDstTyBits,
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2170	ExtSrcTyBits),
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2171	ExtDstTy),
				2172	Cond);
				2173	} else if ((N1C->isNullValue() \|\| N1C->getAPIntValue() == 1) &&
				2174	(Cond == ISD::SETEQ \|\| Cond == ISD::SETNE)) {
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2175	// SETCC (SETCC), [0\|1], [EQ\|NE] -> SETCC
Evan Cheng	2c755ba	2010-02-27 07:36:59 +0000	[diff] [blame]	2176	if (N0.getOpcode() == ISD::SETCC &&
				2177	isTypeLegal(VT) && VT.bitsLE(N0.getValueType())) {
Evan Cheng	347a9cb	2010-01-07 20:58:44 +0000	[diff] [blame]	2178	bool TrueWhenTrue = (Cond == ISD::SETEQ) ^ (N1C->getAPIntValue() != 1);
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2179	if (TrueWhenTrue)
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2180	return DAG.getNode(ISD::TRUNCATE, dl, VT, N0);
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2181	// Invert the condition.
				2182	ISD::CondCode CC = cast<CondCodeSDNode>(N0.getOperand(2))->get();
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2183	CC = ISD::getSetCCInverse(CC,
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2184	N0.getOperand(0).getValueType().isInteger());
				2185	return DAG.getSetCC(dl, VT, N0.getOperand(0), N0.getOperand(1), CC);
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2186	}
Evan Cheng	2c755ba	2010-02-27 07:36:59 +0000	[diff] [blame]	2187
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2188	if ((N0.getOpcode() == ISD::XOR \|\|
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2189	(N0.getOpcode() == ISD::AND &&
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2190	N0.getOperand(0).getOpcode() == ISD::XOR &&
				2191	N0.getOperand(1) == N0.getOperand(0).getOperand(1))) &&
				2192	isa<ConstantSDNode>(N0.getOperand(1)) &&
				2193	cast<ConstantSDNode>(N0.getOperand(1))->getAPIntValue() == 1) {
				2194	// If this is (X^1) == 0/1, swap the RHS and eliminate the xor. We
				2195	// can only do this if the top bits are known zero.
				2196	unsigned BitWidth = N0.getValueSizeInBits();
				2197	if (DAG.MaskedValueIsZero(N0,
				2198	APInt::getHighBitsSet(BitWidth,
				2199	BitWidth-1))) {
				2200	// Okay, get the un-inverted input value.
				2201	SDValue Val;
				2202	if (N0.getOpcode() == ISD::XOR)
				2203	Val = N0.getOperand(0);
				2204	else {
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2205	assert(N0.getOpcode() == ISD::AND &&
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2206	N0.getOperand(0).getOpcode() == ISD::XOR);
				2207	// ((X^1)&1)^1 -> X & 1
				2208	Val = DAG.getNode(ISD::AND, dl, N0.getValueType(),
				2209	N0.getOperand(0).getOperand(0),
				2210	N0.getOperand(1));
				2211	}
Evan Cheng	2c755ba	2010-02-27 07:36:59 +0000	[diff] [blame]	2212
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2213	return DAG.getSetCC(dl, VT, Val, N1,
				2214	Cond == ISD::SETEQ ? ISD::SETNE : ISD::SETEQ);
				2215	}
Evan Cheng	2c755ba	2010-02-27 07:36:59 +0000	[diff] [blame]	2216	} else if (N1C->getAPIntValue() == 1 &&
				2217	(VT == MVT::i1 \|\|
Duncan Sands	28b77e9	2011-09-06 19:07:46 +0000	[diff] [blame]	2218	getBooleanContents(false) == ZeroOrOneBooleanContent)) {
Evan Cheng	2c755ba	2010-02-27 07:36:59 +0000	[diff] [blame]	2219	SDValue Op0 = N0;
				2220	if (Op0.getOpcode() == ISD::TRUNCATE)
				2221	Op0 = Op0.getOperand(0);
				2222
				2223	if ((Op0.getOpcode() == ISD::XOR) &&
				2224	Op0.getOperand(0).getOpcode() == ISD::SETCC &&
				2225	Op0.getOperand(1).getOpcode() == ISD::SETCC) {
				2226	// (xor (setcc), (setcc)) == / != 1 -> (setcc) != / == (setcc)
				2227	Cond = (Cond == ISD::SETEQ) ? ISD::SETNE : ISD::SETEQ;
				2228	return DAG.getSetCC(dl, VT, Op0.getOperand(0), Op0.getOperand(1),
				2229	Cond);
				2230	} else if (Op0.getOpcode() == ISD::AND &&
				2231	isa<ConstantSDNode>(Op0.getOperand(1)) &&
				2232	cast<ConstantSDNode>(Op0.getOperand(1))->getAPIntValue() == 1) {
				2233	// If this is (X&1) == / != 1, normalize it to (X&1) != / == 0.
Anton Korobeynikov	17458a7	2010-05-01 12:52:34 +0000	[diff] [blame]	2234	if (Op0.getValueType().bitsGT(VT))
Evan Cheng	2c755ba	2010-02-27 07:36:59 +0000	[diff] [blame]	2235	Op0 = DAG.getNode(ISD::AND, dl, VT,
				2236	DAG.getNode(ISD::TRUNCATE, dl, VT, Op0.getOperand(0)),
				2237	DAG.getConstant(1, VT));
Anton Korobeynikov	17458a7	2010-05-01 12:52:34 +0000	[diff] [blame]	2238	else if (Op0.getValueType().bitsLT(VT))
				2239	Op0 = DAG.getNode(ISD::AND, dl, VT,
				2240	DAG.getNode(ISD::ANY_EXTEND, dl, VT, Op0.getOperand(0)),
				2241	DAG.getConstant(1, VT));
				2242
Evan Cheng	2c755ba	2010-02-27 07:36:59 +0000	[diff] [blame]	2243	return DAG.getSetCC(dl, VT, Op0,
				2244	DAG.getConstant(0, Op0.getValueType()),
				2245	Cond == ISD::SETEQ ? ISD::SETNE : ISD::SETEQ);
				2246	}
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2247	}
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2248	}
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2249
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2250	APInt MinVal, MaxVal;
				2251	unsigned OperandBitSize = N1C->getValueType(0).getSizeInBits();
				2252	if (ISD::isSignedIntSetCC(Cond)) {
				2253	MinVal = APInt::getSignedMinValue(OperandBitSize);
				2254	MaxVal = APInt::getSignedMaxValue(OperandBitSize);
				2255	} else {
				2256	MinVal = APInt::getMinValue(OperandBitSize);
				2257	MaxVal = APInt::getMaxValue(OperandBitSize);
				2258	}
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2259
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2260	// Canonicalize GE/LE comparisons to use GT/LT comparisons.
				2261	if (Cond == ISD::SETGE \|\| Cond == ISD::SETUGE) {
				2262	if (C1 == MinVal) return DAG.getConstant(1, VT); // X >= MIN --> true
				2263	// X >= C0 --> X > (C0-1)
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2264	return DAG.getSetCC(dl, VT, N0,
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2265	DAG.getConstant(C1-1, N1.getValueType()),
				2266	(Cond == ISD::SETGE) ? ISD::SETGT : ISD::SETUGT);
				2267	}
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2268
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2269	if (Cond == ISD::SETLE \|\| Cond == ISD::SETULE) {
				2270	if (C1 == MaxVal) return DAG.getConstant(1, VT); // X <= MAX --> true
				2271	// X <= C0 --> X < (C0+1)
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2272	return DAG.getSetCC(dl, VT, N0,
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2273	DAG.getConstant(C1+1, N1.getValueType()),
				2274	(Cond == ISD::SETLE) ? ISD::SETLT : ISD::SETULT);
				2275	}
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2276
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2277	if ((Cond == ISD::SETLT \|\| Cond == ISD::SETULT) && C1 == MinVal)
				2278	return DAG.getConstant(0, VT); // X < MIN --> false
				2279	if ((Cond == ISD::SETGE \|\| Cond == ISD::SETUGE) && C1 == MinVal)
				2280	return DAG.getConstant(1, VT); // X >= MIN --> true
				2281	if ((Cond == ISD::SETGT \|\| Cond == ISD::SETUGT) && C1 == MaxVal)
				2282	return DAG.getConstant(0, VT); // X > MAX --> false
				2283	if ((Cond == ISD::SETLE \|\| Cond == ISD::SETULE) && C1 == MaxVal)
				2284	return DAG.getConstant(1, VT); // X <= MAX --> true
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2285
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2286	// Canonicalize setgt X, Min --> setne X, Min
				2287	if ((Cond == ISD::SETGT \|\| Cond == ISD::SETUGT) && C1 == MinVal)
				2288	return DAG.getSetCC(dl, VT, N0, N1, ISD::SETNE);
				2289	// Canonicalize setlt X, Max --> setne X, Max
				2290	if ((Cond == ISD::SETLT \|\| Cond == ISD::SETULT) && C1 == MaxVal)
				2291	return DAG.getSetCC(dl, VT, N0, N1, ISD::SETNE);
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2292
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2293	// If we have setult X, 1, turn it into seteq X, 0
				2294	if ((Cond == ISD::SETLT \|\| Cond == ISD::SETULT) && C1 == MinVal+1)
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2295	return DAG.getSetCC(dl, VT, N0,
				2296	DAG.getConstant(MinVal, N0.getValueType()),
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2297	ISD::SETEQ);
				2298	// If we have setugt X, Max-1, turn it into seteq X, Max
				2299	else if ((Cond == ISD::SETGT \|\| Cond == ISD::SETUGT) && C1 == MaxVal-1)
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2300	return DAG.getSetCC(dl, VT, N0,
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2301	DAG.getConstant(MaxVal, N0.getValueType()),
				2302	ISD::SETEQ);
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2303
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2304	// If we have "setcc X, C0", check to see if we can shrink the immediate
				2305	// by changing cc.
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2306
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2307	// SETUGT X, SINTMAX -> SETLT X, 0
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2308	if (Cond == ISD::SETUGT &&
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2309	C1 == APInt::getSignedMaxValue(OperandBitSize))
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2310	return DAG.getSetCC(dl, VT, N0,
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2311	DAG.getConstant(0, N1.getValueType()),
				2312	ISD::SETLT);
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2313
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2314	// SETULT X, SINTMIN -> SETGT X, -1
				2315	if (Cond == ISD::SETULT &&
				2316	C1 == APInt::getSignedMinValue(OperandBitSize)) {
				2317	SDValue ConstMinusOne =
				2318	DAG.getConstant(APInt::getAllOnesValue(OperandBitSize),
				2319	N1.getValueType());
				2320	return DAG.getSetCC(dl, VT, N0, ConstMinusOne, ISD::SETGT);
				2321	}
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2322
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2323	// Fold bit comparisons when we can.
				2324	if ((Cond == ISD::SETEQ \|\| Cond == ISD::SETNE) &&
Evan Cheng	d40d03e	2010-01-06 19:38:29 +0000	[diff] [blame]	2325	(VT == N0.getValueType() \|\|
				2326	(isTypeLegal(VT) && VT.bitsLE(N0.getValueType()))) &&
				2327	N0.getOpcode() == ISD::AND)
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2328	if (ConstantSDNode *AndRHS =
				2329	dyn_cast<ConstantSDNode>(N0.getOperand(1))) {
Owen Anderson	e50ed30	2009-08-10 22:56:29 +0000	[diff] [blame]	2330	EVT ShiftTy = DCI.isBeforeLegalize() ?
Owen Anderson	95771af	2011-02-25 21:41:48 +0000	[diff] [blame]	2331	getPointerTy() : getShiftAmountTy(N0.getValueType());
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2332	if (Cond == ISD::SETNE && C1 == 0) {// (X & 8) != 0 --> (X & 8) >> 3
				2333	// Perform the xform if the AND RHS is a single bit.
Evan Cheng	347a9cb	2010-01-07 20:58:44 +0000	[diff] [blame]	2334	if (AndRHS->getAPIntValue().isPowerOf2()) {
Evan Cheng	d40d03e	2010-01-06 19:38:29 +0000	[diff] [blame]	2335	return DAG.getNode(ISD::TRUNCATE, dl, VT,
				2336	DAG.getNode(ISD::SRL, dl, N0.getValueType(), N0,
Evan Cheng	347a9cb	2010-01-07 20:58:44 +0000	[diff] [blame]	2337	DAG.getConstant(AndRHS->getAPIntValue().logBase2(), ShiftTy)));
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2338	}
Evan Cheng	347a9cb	2010-01-07 20:58:44 +0000	[diff] [blame]	2339	} else if (Cond == ISD::SETEQ && C1 == AndRHS->getAPIntValue()) {
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2340	// (X & 8) == 8 --> (X & 8) >> 3
				2341	// Perform the xform if C1 is a single bit.
				2342	if (C1.isPowerOf2()) {
Evan Cheng	d40d03e	2010-01-06 19:38:29 +0000	[diff] [blame]	2343	return DAG.getNode(ISD::TRUNCATE, dl, VT,
				2344	DAG.getNode(ISD::SRL, dl, N0.getValueType(), N0,
				2345	DAG.getConstant(C1.logBase2(), ShiftTy)));
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2346	}
				2347	}
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2348	}
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2349	}
				2350
Gabor Greif	ba36cb5	2008-08-28 21:40:38 +0000	[diff] [blame]	2351	if (isa<ConstantFPSDNode>(N0.getNode())) {
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2352	// Constant fold or commute setcc.
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	2353	SDValue O = DAG.FoldSetCC(VT, N0, N1, Cond, dl);
Gabor Greif	ba36cb5	2008-08-28 21:40:38 +0000	[diff] [blame]	2354	if (O.getNode()) return O;
				2355	} else if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1.getNode())) {
Chris Lattner	63079f0	2007-12-29 08:37:08 +0000	[diff] [blame]	2356	// If the RHS of an FP comparison is a constant, simplify it away in
				2357	// some cases.
				2358	if (CFP->getValueAPF().isNaN()) {
				2359	// If an operand is known to be a nan, we can fold it.
				2360	switch (ISD::getUnorderedFlavor(Cond)) {
Torok Edwin	c23197a	2009-07-14 16:55:14 +0000	[diff] [blame]	2361	default: llvm_unreachable("Unknown flavor!");
Chris Lattner	63079f0	2007-12-29 08:37:08 +0000	[diff] [blame]	2362	case 0: // Known false.
				2363	return DAG.getConstant(0, VT);
				2364	case 1: // Known true.
				2365	return DAG.getConstant(1, VT);
Chris Lattner	1c3e1e2	2007-12-30 21:21:10 +0000	[diff] [blame]	2366	case 2: // Undefined.
Dale Johannesen	e8d7230	2009-02-06 23:05:02 +0000	[diff] [blame]	2367	return DAG.getUNDEF(VT);
Chris Lattner	63079f0	2007-12-29 08:37:08 +0000	[diff] [blame]	2368	}
				2369	}
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2370
Chris Lattner	63079f0	2007-12-29 08:37:08 +0000	[diff] [blame]	2371	// Otherwise, we know the RHS is not a NaN. Simplify the node to drop the
				2372	// constant if knowing that the operand is non-nan is enough. We prefer to
				2373	// have SETO(x,x) instead of SETO(x, 0.0) because this avoids having to
				2374	// materialize 0.0.
				2375	if (Cond == ISD::SETO \|\| Cond == ISD::SETUO)
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	2376	return DAG.getSetCC(dl, VT, N0, N0, Cond);
Dan Gohman	11eab02	2009-09-26 15:24:17 +0000	[diff] [blame]	2377
				2378	// If the condition is not legal, see if we can find an equivalent one
				2379	// which is legal.
				2380	if (!isCondCodeLegal(Cond, N0.getValueType())) {
				2381	// If the comparison was an awkward floating-point == or != and one of
				2382	// the comparison operands is infinity or negative infinity, convert the
				2383	// condition to a less-awkward <= or >=.
				2384	if (CFP->getValueAPF().isInfinity()) {
				2385	if (CFP->getValueAPF().isNegative()) {
				2386	if (Cond == ISD::SETOEQ &&
				2387	isCondCodeLegal(ISD::SETOLE, N0.getValueType()))
				2388	return DAG.getSetCC(dl, VT, N0, N1, ISD::SETOLE);
				2389	if (Cond == ISD::SETUEQ &&
				2390	isCondCodeLegal(ISD::SETOLE, N0.getValueType()))
				2391	return DAG.getSetCC(dl, VT, N0, N1, ISD::SETULE);
				2392	if (Cond == ISD::SETUNE &&
				2393	isCondCodeLegal(ISD::SETUGT, N0.getValueType()))
				2394	return DAG.getSetCC(dl, VT, N0, N1, ISD::SETUGT);
				2395	if (Cond == ISD::SETONE &&
				2396	isCondCodeLegal(ISD::SETUGT, N0.getValueType()))
				2397	return DAG.getSetCC(dl, VT, N0, N1, ISD::SETOGT);
				2398	} else {
				2399	if (Cond == ISD::SETOEQ &&
				2400	isCondCodeLegal(ISD::SETOGE, N0.getValueType()))
				2401	return DAG.getSetCC(dl, VT, N0, N1, ISD::SETOGE);
				2402	if (Cond == ISD::SETUEQ &&
				2403	isCondCodeLegal(ISD::SETOGE, N0.getValueType()))
				2404	return DAG.getSetCC(dl, VT, N0, N1, ISD::SETUGE);
				2405	if (Cond == ISD::SETUNE &&
				2406	isCondCodeLegal(ISD::SETULT, N0.getValueType()))
				2407	return DAG.getSetCC(dl, VT, N0, N1, ISD::SETULT);
				2408	if (Cond == ISD::SETONE &&
				2409	isCondCodeLegal(ISD::SETULT, N0.getValueType()))
				2410	return DAG.getSetCC(dl, VT, N0, N1, ISD::SETOLT);
				2411	}
				2412	}
				2413	}
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2414	}
				2415
				2416	if (N0 == N1) {
				2417	// We can always fold X == X for integer setcc's.
Chad Rosier	9dbb018	2012-04-03 20:11:24 +0000	[diff] [blame]	2418	if (N0.getValueType().isInteger()) {
				2419	switch (getBooleanContents(N0.getValueType().isVector())) {
Chad Rosier	9dbb018	2012-04-03 20:11:24 +0000	[diff] [blame]	2420	case UndefinedBooleanContent:
				2421	case ZeroOrOneBooleanContent:
				2422	return DAG.getConstant(ISD::isTrueWhenEqual(Cond), VT);
				2423	case ZeroOrNegativeOneBooleanContent:
				2424	return DAG.getConstant(ISD::isTrueWhenEqual(Cond) ? -1 : 0, VT);
				2425	}
				2426	}
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2427	unsigned UOF = ISD::getUnorderedFlavor(Cond);
				2428	if (UOF == 2) // FP operators that are undefined on NaNs.
				2429	return DAG.getConstant(ISD::isTrueWhenEqual(Cond), VT);
				2430	if (UOF == unsigned(ISD::isTrueWhenEqual(Cond)))
				2431	return DAG.getConstant(UOF, VT);
				2432	// Otherwise, we can't fold it. However, we can simplify it to SETUO/SETO
				2433	// if it is not already.
				2434	ISD::CondCode NewCond = UOF == 0 ? ISD::SETO : ISD::SETUO;
				2435	if (NewCond != Cond)
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	2436	return DAG.getSetCC(dl, VT, N0, N1, NewCond);
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2437	}
				2438
				2439	if ((Cond == ISD::SETEQ \|\| Cond == ISD::SETNE) &&
Duncan Sands	83ec4b6	2008-06-06 12:08:01 +0000	[diff] [blame]	2440	N0.getValueType().isInteger()) {
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2441	if (N0.getOpcode() == ISD::ADD \|\| N0.getOpcode() == ISD::SUB \|\|
				2442	N0.getOpcode() == ISD::XOR) {
				2443	// Simplify (X+Y) == (X+Z) --> Y == Z
				2444	if (N0.getOpcode() == N1.getOpcode()) {
				2445	if (N0.getOperand(0) == N1.getOperand(0))
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	2446	return DAG.getSetCC(dl, VT, N0.getOperand(1), N1.getOperand(1), Cond);
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2447	if (N0.getOperand(1) == N1.getOperand(1))
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	2448	return DAG.getSetCC(dl, VT, N0.getOperand(0), N1.getOperand(0), Cond);
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2449	if (DAG.isCommutativeBinOp(N0.getOpcode())) {
				2450	// If X op Y == Y op X, try other combinations.
				2451	if (N0.getOperand(0) == N1.getOperand(1))
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2452	return DAG.getSetCC(dl, VT, N0.getOperand(1), N1.getOperand(0),
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	2453	Cond);
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2454	if (N0.getOperand(1) == N1.getOperand(0))
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2455	return DAG.getSetCC(dl, VT, N0.getOperand(0), N1.getOperand(1),
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	2456	Cond);
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2457	}
				2458	}
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2459
Jakob Stoklund Olesen	740cd65	2012-04-05 20:30:20 +0000	[diff] [blame]	2460	// If RHS is a legal immediate value for a compare instruction, we need
				2461	// to be careful about increasing register pressure needlessly.
				2462	bool LegalRHSImm = false;
				2463
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2464	if (ConstantSDNode *RHSC = dyn_cast<ConstantSDNode>(N1)) {
				2465	if (ConstantSDNode *LHSR = dyn_cast<ConstantSDNode>(N0.getOperand(1))) {
				2466	// Turn (X+C1) == C2 --> X == C2-C1
Gabor Greif	ba36cb5	2008-08-28 21:40:38 +0000	[diff] [blame]	2467	if (N0.getOpcode() == ISD::ADD && N0.getNode()->hasOneUse()) {
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	2468	return DAG.getSetCC(dl, VT, N0.getOperand(0),
Dan Gohman	f5aeb1a	2008-09-12 16:56:44 +0000	[diff] [blame]	2469	DAG.getConstant(RHSC->getAPIntValue()-
				2470	LHSR->getAPIntValue(),
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2471	N0.getValueType()), Cond);
				2472	}
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2473
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2474	// Turn (X^C1) == C2 into X == C1^C2 iff X&~C1 = 0.
				2475	if (N0.getOpcode() == ISD::XOR)
				2476	// If we know that all of the inverted bits are zero, don't bother
				2477	// performing the inversion.
Dan Gohman	2e68b6f	2008-02-25 21:11:39 +0000	[diff] [blame]	2478	if (DAG.MaskedValueIsZero(N0.getOperand(0), ~LHSR->getAPIntValue()))
				2479	return
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	2480	DAG.getSetCC(dl, VT, N0.getOperand(0),
Dan Gohman	2e68b6f	2008-02-25 21:11:39 +0000	[diff] [blame]	2481	DAG.getConstant(LHSR->getAPIntValue() ^
				2482	RHSC->getAPIntValue(),
				2483	N0.getValueType()),
				2484	Cond);
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2485	}
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2486
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2487	// Turn (C1-X) == C2 --> X == C1-C2
				2488	if (ConstantSDNode *SUBC = dyn_cast<ConstantSDNode>(N0.getOperand(0))) {
Gabor Greif	ba36cb5	2008-08-28 21:40:38 +0000	[diff] [blame]	2489	if (N0.getOpcode() == ISD::SUB && N0.getNode()->hasOneUse()) {
Dan Gohman	2e68b6f	2008-02-25 21:11:39 +0000	[diff] [blame]	2490	return
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	2491	DAG.getSetCC(dl, VT, N0.getOperand(1),
Dan Gohman	2e68b6f	2008-02-25 21:11:39 +0000	[diff] [blame]	2492	DAG.getConstant(SUBC->getAPIntValue() -
				2493	RHSC->getAPIntValue(),
				2494	N0.getValueType()),
				2495	Cond);
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2496	}
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2497	}
Jakob Stoklund Olesen	740cd65	2012-04-05 20:30:20 +0000	[diff] [blame]	2498
				2499	// Could RHSC fold directly into a compare?
				2500	if (RHSC->getValueType(0).getSizeInBits() <= 64)
				2501	LegalRHSImm = isLegalICmpImmediate(RHSC->getSExtValue());
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2502	}
				2503
				2504	// Simplify (X+Z) == X --> Z == 0
Jakob Stoklund Olesen	740cd65	2012-04-05 20:30:20 +0000	[diff] [blame]	2505	// Don't do this if X is an immediate that can fold into a cmp
				2506	// instruction and X+Z has other uses. It could be an induction variable
				2507	// chain, and the transform would increase register pressure.
				2508	if (!LegalRHSImm \|\| N0.getNode()->hasOneUse()) {
				2509	if (N0.getOperand(0) == N1)
				2510	return DAG.getSetCC(dl, VT, N0.getOperand(1),
				2511	DAG.getConstant(0, N0.getValueType()), Cond);
				2512	if (N0.getOperand(1) == N1) {
				2513	if (DAG.isCommutativeBinOp(N0.getOpcode()))
				2514	return DAG.getSetCC(dl, VT, N0.getOperand(0),
				2515	DAG.getConstant(0, N0.getValueType()), Cond);
				2516	else if (N0.getNode()->hasOneUse()) {
				2517	assert(N0.getOpcode() == ISD::SUB && "Unexpected operation!");
				2518	// (Z-X) == X --> Z == X<<1
				2519	SDValue SH = DAG.getNode(ISD::SHL, dl, N1.getValueType(), N1,
Owen Anderson	95771af	2011-02-25 21:41:48 +0000	[diff] [blame]	2520	DAG.getConstant(1, getShiftAmountTy(N1.getValueType())));
Jakob Stoklund Olesen	740cd65	2012-04-05 20:30:20 +0000	[diff] [blame]	2521	if (!DCI.isCalledByLegalizer())
				2522	DCI.AddToWorklist(SH.getNode());
				2523	return DAG.getSetCC(dl, VT, N0.getOperand(0), SH, Cond);
				2524	}
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2525	}
				2526	}
				2527	}
				2528
				2529	if (N1.getOpcode() == ISD::ADD \|\| N1.getOpcode() == ISD::SUB \|\|
				2530	N1.getOpcode() == ISD::XOR) {
				2531	// Simplify X == (X+Z) --> Z == 0
				2532	if (N1.getOperand(0) == N0) {
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	2533	return DAG.getSetCC(dl, VT, N1.getOperand(1),
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2534	DAG.getConstant(0, N1.getValueType()), Cond);
				2535	} else if (N1.getOperand(1) == N0) {
				2536	if (DAG.isCommutativeBinOp(N1.getOpcode())) {
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	2537	return DAG.getSetCC(dl, VT, N1.getOperand(0),
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2538	DAG.getConstant(0, N1.getValueType()), Cond);
Gabor Greif	ba36cb5	2008-08-28 21:40:38 +0000	[diff] [blame]	2539	} else if (N1.getNode()->hasOneUse()) {
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2540	assert(N1.getOpcode() == ISD::SUB && "Unexpected operation!");
				2541	// X == (Z-X) --> X<<1 == Z
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2542	SDValue SH = DAG.getNode(ISD::SHL, dl, N1.getValueType(), N0,
Owen Anderson	95771af	2011-02-25 21:41:48 +0000	[diff] [blame]	2543	DAG.getConstant(1, getShiftAmountTy(N0.getValueType())));
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2544	if (!DCI.isCalledByLegalizer())
Gabor Greif	ba36cb5	2008-08-28 21:40:38 +0000	[diff] [blame]	2545	DCI.AddToWorklist(SH.getNode());
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	2546	return DAG.getSetCC(dl, VT, SH, N1.getOperand(0), Cond);
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2547	}
				2548	}
				2549	}
Dan Gohman	e5af2d3	2009-01-29 01:59:02 +0000	[diff] [blame]	2550
Dan Gohman	2c65c3d	2009-01-29 16:18:12 +0000	[diff] [blame]	2551	// Simplify x&y == y to x&y != 0 if y has exactly one bit set.
Dale Johannesen	85b0ede	2009-02-11 19:19:41 +0000	[diff] [blame]	2552	// Note that where y is variable and is known to have at most
				2553	// one bit set (for example, if it is z&1) we cannot do this;
				2554	// the expressions are not equivalent when y==0.
Dan Gohman	e5af2d3	2009-01-29 01:59:02 +0000	[diff] [blame]	2555	if (N0.getOpcode() == ISD::AND)
				2556	if (N0.getOperand(0) == N1 \|\| N0.getOperand(1) == N1) {
Dale Johannesen	85b0ede	2009-02-11 19:19:41 +0000	[diff] [blame]	2557	if (ValueHasExactlyOneBitSet(N1, DAG)) {
Dan Gohman	e5af2d3	2009-01-29 01:59:02 +0000	[diff] [blame]	2558	Cond = ISD::getSetCCInverse(Cond, /isInteger=/true);
				2559	SDValue Zero = DAG.getConstant(0, N1.getValueType());
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	2560	return DAG.getSetCC(dl, VT, N0, Zero, Cond);
Dan Gohman	e5af2d3	2009-01-29 01:59:02 +0000	[diff] [blame]	2561	}
				2562	}
				2563	if (N1.getOpcode() == ISD::AND)
				2564	if (N1.getOperand(0) == N0 \|\| N1.getOperand(1) == N0) {
Dale Johannesen	85b0ede	2009-02-11 19:19:41 +0000	[diff] [blame]	2565	if (ValueHasExactlyOneBitSet(N0, DAG)) {
Dan Gohman	e5af2d3	2009-01-29 01:59:02 +0000	[diff] [blame]	2566	Cond = ISD::getSetCCInverse(Cond, /isInteger=/true);
				2567	SDValue Zero = DAG.getConstant(0, N0.getValueType());
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	2568	return DAG.getSetCC(dl, VT, N1, Zero, Cond);
Dan Gohman	e5af2d3	2009-01-29 01:59:02 +0000	[diff] [blame]	2569	}
				2570	}
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2571	}
				2572
				2573	// Fold away ALL boolean setcc's.
Dan Gohman	475871a	2008-07-27 21:46:04 +0000	[diff] [blame]	2574	SDValue Temp;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	2575	if (N0.getValueType() == MVT::i1 && foldBooleans) {
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2576	switch (Cond) {
Torok Edwin	c23197a	2009-07-14 16:55:14 +0000	[diff] [blame]	2577	default: llvm_unreachable("Unknown integer setcc!");
Bob Wilson	4c24546	2009-01-22 17:39:32 +0000	[diff] [blame]	2578	case ISD::SETEQ: // X == Y -> ~(X^Y)
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	2579	Temp = DAG.getNode(ISD::XOR, dl, MVT::i1, N0, N1);
				2580	N0 = DAG.getNOT(dl, Temp, MVT::i1);
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2581	if (!DCI.isCalledByLegalizer())
Gabor Greif	ba36cb5	2008-08-28 21:40:38 +0000	[diff] [blame]	2582	DCI.AddToWorklist(Temp.getNode());
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2583	break;
				2584	case ISD::SETNE: // X != Y --> (X^Y)
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	2585	N0 = DAG.getNode(ISD::XOR, dl, MVT::i1, N0, N1);
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2586	break;
Bob Wilson	4c24546	2009-01-22 17:39:32 +0000	[diff] [blame]	2587	case ISD::SETGT: // X >s Y --> X == 0 & Y == 1 --> ~X & Y
				2588	case ISD::SETULT: // X <u Y --> X == 0 & Y == 1 --> ~X & Y
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	2589	Temp = DAG.getNOT(dl, N0, MVT::i1);
				2590	N0 = DAG.getNode(ISD::AND, dl, MVT::i1, N1, Temp);
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2591	if (!DCI.isCalledByLegalizer())
Gabor Greif	ba36cb5	2008-08-28 21:40:38 +0000	[diff] [blame]	2592	DCI.AddToWorklist(Temp.getNode());
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2593	break;
Bob Wilson	4c24546	2009-01-22 17:39:32 +0000	[diff] [blame]	2594	case ISD::SETLT: // X <s Y --> X == 1 & Y == 0 --> ~Y & X
				2595	case ISD::SETUGT: // X >u Y --> X == 1 & Y == 0 --> ~Y & X
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	2596	Temp = DAG.getNOT(dl, N1, MVT::i1);
				2597	N0 = DAG.getNode(ISD::AND, dl, MVT::i1, N0, Temp);
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2598	if (!DCI.isCalledByLegalizer())
Gabor Greif	ba36cb5	2008-08-28 21:40:38 +0000	[diff] [blame]	2599	DCI.AddToWorklist(Temp.getNode());
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2600	break;
Bob Wilson	4c24546	2009-01-22 17:39:32 +0000	[diff] [blame]	2601	case ISD::SETULE: // X <=u Y --> X == 0 \| Y == 1 --> ~X \| Y
				2602	case ISD::SETGE: // X >=s Y --> X == 0 \| Y == 1 --> ~X \| Y
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	2603	Temp = DAG.getNOT(dl, N0, MVT::i1);
				2604	N0 = DAG.getNode(ISD::OR, dl, MVT::i1, N1, Temp);
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2605	if (!DCI.isCalledByLegalizer())
Gabor Greif	ba36cb5	2008-08-28 21:40:38 +0000	[diff] [blame]	2606	DCI.AddToWorklist(Temp.getNode());
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2607	break;
Bob Wilson	4c24546	2009-01-22 17:39:32 +0000	[diff] [blame]	2608	case ISD::SETUGE: // X >=u Y --> X == 1 \| Y == 0 --> ~Y \| X
				2609	case ISD::SETLE: // X <=s Y --> X == 1 \| Y == 0 --> ~Y \| X
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	2610	Temp = DAG.getNOT(dl, N1, MVT::i1);
				2611	N0 = DAG.getNode(ISD::OR, dl, MVT::i1, N0, Temp);
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2612	break;
				2613	}
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	2614	if (VT != MVT::i1) {
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2615	if (!DCI.isCalledByLegalizer())
Gabor Greif	ba36cb5	2008-08-28 21:40:38 +0000	[diff] [blame]	2616	DCI.AddToWorklist(N0.getNode());
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2617	// FIXME: If running after legalize, we probably can't do this.
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	2618	N0 = DAG.getNode(ISD::ZERO_EXTEND, dl, VT, N0);
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2619	}
				2620	return N0;
				2621	}
				2622
				2623	// Could not fold it.
Dan Gohman	475871a	2008-07-27 21:46:04 +0000	[diff] [blame]	2624	return SDValue();
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2625	}
				2626
Evan Cheng	ad4196b	2008-05-12 19:56:52 +0000	[diff] [blame]	2627	/// isGAPlusOffset - Returns true (and the GlobalValue and the offset) if the
				2628	/// node is a GlobalAddress + offset.
Chris Lattner	0a9481f	2011-02-13 22:25:43 +0000	[diff] [blame]	2629	bool TargetLowering::isGAPlusOffset(SDNode N, const GlobalValue &GA,
Evan Cheng	ad4196b	2008-05-12 19:56:52 +0000	[diff] [blame]	2630	int64_t &Offset) const {
				2631	if (isa<GlobalAddressSDNode>(N)) {
Dan Gohman	9ea3f56	2008-06-09 22:05:52 +0000	[diff] [blame]	2632	GlobalAddressSDNode *GASD = cast<GlobalAddressSDNode>(N);
				2633	GA = GASD->getGlobal();
				2634	Offset += GASD->getOffset();
Evan Cheng	ad4196b	2008-05-12 19:56:52 +0000	[diff] [blame]	2635	return true;
				2636	}
				2637
				2638	if (N->getOpcode() == ISD::ADD) {
Dan Gohman	475871a	2008-07-27 21:46:04 +0000	[diff] [blame]	2639	SDValue N1 = N->getOperand(0);
				2640	SDValue N2 = N->getOperand(1);
Gabor Greif	ba36cb5	2008-08-28 21:40:38 +0000	[diff] [blame]	2641	if (isGAPlusOffset(N1.getNode(), GA, Offset)) {
Evan Cheng	ad4196b	2008-05-12 19:56:52 +0000	[diff] [blame]	2642	ConstantSDNode *V = dyn_cast<ConstantSDNode>(N2);
				2643	if (V) {
Dan Gohman	7810bfe	2008-09-26 21:54:37 +0000	[diff] [blame]	2644	Offset += V->getSExtValue();
Evan Cheng	ad4196b	2008-05-12 19:56:52 +0000	[diff] [blame]	2645	return true;
				2646	}
Gabor Greif	ba36cb5	2008-08-28 21:40:38 +0000	[diff] [blame]	2647	} else if (isGAPlusOffset(N2.getNode(), GA, Offset)) {
Evan Cheng	ad4196b	2008-05-12 19:56:52 +0000	[diff] [blame]	2648	ConstantSDNode *V = dyn_cast<ConstantSDNode>(N1);
				2649	if (V) {
Dan Gohman	7810bfe	2008-09-26 21:54:37 +0000	[diff] [blame]	2650	Offset += V->getSExtValue();
Evan Cheng	ad4196b	2008-05-12 19:56:52 +0000	[diff] [blame]	2651	return true;
				2652	}
				2653	}
				2654	}
Owen Anderson	95771af	2011-02-25 21:41:48 +0000	[diff] [blame]	2655
Evan Cheng	ad4196b	2008-05-12 19:56:52 +0000	[diff] [blame]	2656	return false;
				2657	}
				2658
				2659
Dan Gohman	475871a	2008-07-27 21:46:04 +0000	[diff] [blame]	2660	SDValue TargetLowering::
Chris Lattner	00ffed0	2006-03-01 04:52:55 +0000	[diff] [blame]	2661	PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const {
				2662	// Default implementation: no optimization.
Dan Gohman	475871a	2008-07-27 21:46:04 +0000	[diff] [blame]	2663	return SDValue();
Chris Lattner	00ffed0	2006-03-01 04:52:55 +0000	[diff] [blame]	2664	}
				2665
Chris Lattner	eb8146b	2006-02-04 02:13:02 +0000	[diff] [blame]	2666	//===----------------------------------------------------------------------===//
				2667	// Inline Assembler Implementation Methods
				2668	//===----------------------------------------------------------------------===//
				2669
Chris Lattner	4376fea	2008-04-27 00:09:47 +0000	[diff] [blame]	2670
Chris Lattner	eb8146b	2006-02-04 02:13:02 +0000	[diff] [blame]	2671	TargetLowering::ConstraintType
Chris Lattner	4234f57	2007-03-25 02:14:49 +0000	[diff] [blame]	2672	TargetLowering::getConstraintType(const std::string &Constraint) const {
Chris Lattner	4234f57	2007-03-25 02:14:49 +0000	[diff] [blame]	2673	if (Constraint.size() == 1) {
				2674	switch (Constraint[0]) {
				2675	default: break;
				2676	case 'r': return C_RegisterClass;
				2677	case 'm': // memory
				2678	case 'o': // offsetable
				2679	case 'V': // not offsetable
				2680	return C_Memory;
				2681	case 'i': // Simple Integer or Relocatable Constant
				2682	case 'n': // Simple Integer
John Thompson	67aff16	2010-09-21 22:04:54 +0000	[diff] [blame]	2683	case 'E': // Floating Point Constant
				2684	case 'F': // Floating Point Constant
Chris Lattner	4234f57	2007-03-25 02:14:49 +0000	[diff] [blame]	2685	case 's': // Relocatable Constant
John Thompson	67aff16	2010-09-21 22:04:54 +0000	[diff] [blame]	2686	case 'p': // Address.
Chris Lattner	c13dd1c	2007-03-25 04:35:41 +0000	[diff] [blame]	2687	case 'X': // Allow ANY value.
Chris Lattner	4234f57	2007-03-25 02:14:49 +0000	[diff] [blame]	2688	case 'I': // Target registers.
				2689	case 'J':
				2690	case 'K':
				2691	case 'L':
				2692	case 'M':
				2693	case 'N':
				2694	case 'O':
				2695	case 'P':
John Thompson	67aff16	2010-09-21 22:04:54 +0000	[diff] [blame]	2696	case '<':
				2697	case '>':
Chris Lattner	4234f57	2007-03-25 02:14:49 +0000	[diff] [blame]	2698	return C_Other;
				2699	}
Chris Lattner	eb8146b	2006-02-04 02:13:02 +0000	[diff] [blame]	2700	}
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2701
				2702	if (Constraint.size() > 1 && Constraint[0] == '{' &&
Chris Lattner	065421f	2007-03-25 02:18:14 +0000	[diff] [blame]	2703	Constraint[Constraint.size()-1] == '}')
				2704	return C_Register;
Chris Lattner	4234f57	2007-03-25 02:14:49 +0000	[diff] [blame]	2705	return C_Unknown;
Chris Lattner	eb8146b	2006-02-04 02:13:02 +0000	[diff] [blame]	2706	}
				2707
Dale Johannesen	ba2a0b9	2008-01-29 02:21:21 +0000	[diff] [blame]	2708	/// LowerXConstraint - try to replace an X constraint, which matches anything,
				2709	/// with another that has more specific requirements based on the type of the
				2710	/// corresponding operand.
Owen Anderson	e50ed30	2009-08-10 22:56:29 +0000	[diff] [blame]	2711	const char *TargetLowering::LowerXConstraint(EVT ConstraintVT) const{
Duncan Sands	83ec4b6	2008-06-06 12:08:01 +0000	[diff] [blame]	2712	if (ConstraintVT.isInteger())
Chris Lattner	5e76423	2008-04-26 23:02:14 +0000	[diff] [blame]	2713	return "r";
Duncan Sands	83ec4b6	2008-06-06 12:08:01 +0000	[diff] [blame]	2714	if (ConstraintVT.isFloatingPoint())
Chris Lattner	5e76423	2008-04-26 23:02:14 +0000	[diff] [blame]	2715	return "f"; // works for many targets
				2716	return 0;
Dale Johannesen	ba2a0b9	2008-01-29 02:21:21 +0000	[diff] [blame]	2717	}
				2718
Chris Lattner	48884cd	2007-08-25 00:47:38 +0000	[diff] [blame]	2719	/// LowerAsmOperandForConstraint - Lower the specified operand into the Ops
				2720	/// vector. If it is invalid, don't add anything to Ops.
Dan Gohman	475871a	2008-07-27 21:46:04 +0000	[diff] [blame]	2721	void TargetLowering::LowerAsmOperandForConstraint(SDValue Op,
Eric Christopher	100c833	2011-06-02 23:16:42 +0000	[diff] [blame]	2722	std::string &Constraint,
Dan Gohman	475871a	2008-07-27 21:46:04 +0000	[diff] [blame]	2723	std::vector<SDValue> &Ops,
Chris Lattner	5e76423	2008-04-26 23:02:14 +0000	[diff] [blame]	2724	SelectionDAG &DAG) const {
Eric Christopher	362fee9	2011-06-17 20:41:29 +0000	[diff] [blame]	2725
Eric Christopher	100c833	2011-06-02 23:16:42 +0000	[diff] [blame]	2726	if (Constraint.length() > 1) return;
Eric Christopher	362fee9	2011-06-17 20:41:29 +0000	[diff] [blame]	2727
Eric Christopher	100c833	2011-06-02 23:16:42 +0000	[diff] [blame]	2728	char ConstraintLetter = Constraint[0];
Chris Lattner	eb8146b	2006-02-04 02:13:02 +0000	[diff] [blame]	2729	switch (ConstraintLetter) {
Chris Lattner	9ff6ee8	2007-02-17 06:00:35 +0000	[diff] [blame]	2730	default: break;
Dale Johannesen	eb57ea7	2007-11-05 21:20:28 +0000	[diff] [blame]	2731	case 'X': // Allows any operand; labels (basic block) use this.
				2732	if (Op.getOpcode() == ISD::BasicBlock) {
				2733	Ops.push_back(Op);
				2734	return;
				2735	}
				2736	// fall through
Chris Lattner	eb8146b	2006-02-04 02:13:02 +0000	[diff] [blame]	2737	case 'i': // Simple Integer or Relocatable Constant
				2738	case 'n': // Simple Integer
Dale Johannesen	eb57ea7	2007-11-05 21:20:28 +0000	[diff] [blame]	2739	case 's': { // Relocatable Constant
Chris Lattner	75c7d2b	2007-05-03 16:54:34 +0000	[diff] [blame]	2740	// These operands are interested in values of the form (GV+C), where C may
				2741	// be folded in as an offset of GV, or it may be explicitly added. Also, it
				2742	// is possible and fine if either GV or C are missing.
				2743	ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op);
				2744	GlobalAddressSDNode *GA = dyn_cast<GlobalAddressSDNode>(Op);
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2745
Chris Lattner	75c7d2b	2007-05-03 16:54:34 +0000	[diff] [blame]	2746	// If we have "(add GV, C)", pull out GV/C
				2747	if (Op.getOpcode() == ISD::ADD) {
				2748	C = dyn_cast<ConstantSDNode>(Op.getOperand(1));
				2749	GA = dyn_cast<GlobalAddressSDNode>(Op.getOperand(0));
				2750	if (C == 0 \|\| GA == 0) {
				2751	C = dyn_cast<ConstantSDNode>(Op.getOperand(0));
				2752	GA = dyn_cast<GlobalAddressSDNode>(Op.getOperand(1));
				2753	}
				2754	if (C == 0 \|\| GA == 0)
				2755	C = 0, GA = 0;
				2756	}
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2757
Chris Lattner	75c7d2b	2007-05-03 16:54:34 +0000	[diff] [blame]	2758	// If we find a valid operand, map to the TargetXXX version so that the
				2759	// value itself doesn't get selected.
				2760	if (GA) { // Either &GV or &GV+C
				2761	if (ConstraintLetter != 'n') {
				2762	int64_t Offs = GA->getOffset();
Dan Gohman	f5aeb1a	2008-09-12 16:56:44 +0000	[diff] [blame]	2763	if (C) Offs += C->getZExtValue();
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2764	Ops.push_back(DAG.getTargetGlobalAddress(GA->getGlobal(),
Devang Patel	07538ad	2010-07-15 18:45:27 +0000	[diff] [blame]	2765	C ? C->getDebugLoc() : DebugLoc(),
Chris Lattner	48884cd	2007-08-25 00:47:38 +0000	[diff] [blame]	2766	Op.getValueType(), Offs));
				2767	return;
Chris Lattner	75c7d2b	2007-05-03 16:54:34 +0000	[diff] [blame]	2768	}
				2769	}
				2770	if (C) { // just C, no GV.
Chris Lattner	9ff6ee8	2007-02-17 06:00:35 +0000	[diff] [blame]	2771	// Simple constants are not allowed for 's'.
Chris Lattner	48884cd	2007-08-25 00:47:38 +0000	[diff] [blame]	2772	if (ConstraintLetter != 's') {
Dale Johannesen	78e3e52	2009-02-12 20:58:09 +0000	[diff] [blame]	2773	// gcc prints these as sign extended. Sign extend value to 64 bits
				2774	// now; without this it would get ZExt'd later in
				2775	// ScheduleDAGSDNodes::EmitNode, which is very generic.
				2776	Ops.push_back(DAG.getTargetConstant(C->getAPIntValue().getSExtValue(),
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	2777	MVT::i64));
Chris Lattner	48884cd	2007-08-25 00:47:38 +0000	[diff] [blame]	2778	return;
				2779	}
Chris Lattner	9ff6ee8	2007-02-17 06:00:35 +0000	[diff] [blame]	2780	}
Chris Lattner	9ff6ee8	2007-02-17 06:00:35 +0000	[diff] [blame]	2781	break;
Chris Lattner	eb8146b	2006-02-04 02:13:02 +0000	[diff] [blame]	2782	}
Chris Lattner	75c7d2b	2007-05-03 16:54:34 +0000	[diff] [blame]	2783	}
Chris Lattner	eb8146b	2006-02-04 02:13:02 +0000	[diff] [blame]	2784	}
				2785
Chris Lattner	1efa40f	2006-02-22 00:56:39 +0000	[diff] [blame]	2786	std::pair<unsigned, const TargetRegisterClass*> TargetLowering::
Chris Lattner	4217ca8dc	2006-02-21 23:11:00 +0000	[diff] [blame]	2787	getRegForInlineAsmConstraint(const std::string &Constraint,
Owen Anderson	e50ed30	2009-08-10 22:56:29 +0000	[diff] [blame]	2788	EVT VT) const {
Chris Lattner	1efa40f	2006-02-22 00:56:39 +0000	[diff] [blame]	2789	if (Constraint[0] != '{')
Douglas Gregor	7d9663c	2010-05-11 06:17:44 +0000	[diff] [blame]	2790	return std::make_pair(0u, static_cast<TargetRegisterClass*>(0));
Chris Lattner	a55079a	2006-02-01 01:29:47 +0000	[diff] [blame]	2791	assert(*(Constraint.end()-1) == '}' && "Not a brace enclosed constraint?");
				2792
				2793	// Remove the braces from around the name.
Benjamin Kramer	05872ea	2009-11-12 20:36:59 +0000	[diff] [blame]	2794	StringRef RegName(Constraint.data()+1, Constraint.size()-2);
Chris Lattner	1efa40f	2006-02-22 00:56:39 +0000	[diff] [blame]	2795
				2796	// Figure out which register class contains this reg.
Dan Gohman	6f0d024	2008-02-10 18:45:23 +0000	[diff] [blame]	2797	const TargetRegisterInfo *RI = TM.getRegisterInfo();
				2798	for (TargetRegisterInfo::regclass_iterator RCI = RI->regclass_begin(),
Chris Lattner	1efa40f	2006-02-22 00:56:39 +0000	[diff] [blame]	2799	E = RI->regclass_end(); RCI != E; ++RCI) {
				2800	const TargetRegisterClass RC = RCI;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2801
				2802	// If none of the value types for this register class are valid, we
Chris Lattner	b3befd4	2006-02-22 23:00:51 +0000	[diff] [blame]	2803	// can't use it. For example, 64-bit reg classes on 32-bit targets.
Jakob Stoklund Olesen	22e8a36	2011-10-12 01:24:51 +0000	[diff] [blame]	2804	if (!isLegalRC(RC))
				2805	continue;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2806
				2807	for (TargetRegisterClass::iterator I = RC->begin(), E = RC->end();
Chris Lattner	1efa40f	2006-02-22 00:56:39 +0000	[diff] [blame]	2808	I != E; ++I) {
Benjamin Kramer	05872ea	2009-11-12 20:36:59 +0000	[diff] [blame]	2809	if (RegName.equals_lower(RI->getName(*I)))
Chris Lattner	1efa40f	2006-02-22 00:56:39 +0000	[diff] [blame]	2810	return std::make_pair(*I, RC);
Chris Lattner	1efa40f	2006-02-22 00:56:39 +0000	[diff] [blame]	2811	}
Chris Lattner	4ccb070	2006-01-26 20:37:03 +0000	[diff] [blame]	2812	}
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2813
Douglas Gregor	7d9663c	2010-05-11 06:17:44 +0000	[diff] [blame]	2814	return std::make_pair(0u, static_cast<const TargetRegisterClass*>(0));
Chris Lattner	4ccb070	2006-01-26 20:37:03 +0000	[diff] [blame]	2815	}
Evan Cheng	30b37b5	2006-03-13 23:18:16 +0000	[diff] [blame]	2816
				2817	//===----------------------------------------------------------------------===//
Chris Lattner	4376fea	2008-04-27 00:09:47 +0000	[diff] [blame]	2818	// Constraint Selection.
				2819
Chris Lattner	6bdcda3	2008-10-17 16:47:46 +0000	[diff] [blame]	2820	/// isMatchingInputConstraint - Return true of this is an input operand that is
				2821	/// a matching constraint like "4".
				2822	bool TargetLowering::AsmOperandInfo::isMatchingInputConstraint() const {
Chris Lattner	58f15c4	2008-10-17 16:21:11 +0000	[diff] [blame]	2823	assert(!ConstraintCode.empty() && "No known constraint!");
				2824	return isdigit(ConstraintCode[0]);
				2825	}
				2826
				2827	/// getMatchedOperand - If this is an input matching constraint, this method
				2828	/// returns the output operand it matches.
				2829	unsigned TargetLowering::AsmOperandInfo::getMatchedOperand() const {
				2830	assert(!ConstraintCode.empty() && "No known constraint!");
				2831	return atoi(ConstraintCode.c_str());
				2832	}
				2833
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2834
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	2835	/// ParseConstraints - Split up the constraint string from the inline
				2836	/// assembly value into the specific constraints and their prefixes,
				2837	/// and also tie in the associated operand values.
				2838	/// If this returns an empty vector, and if the constraint string itself
				2839	/// isn't empty, there was an error parsing.
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	2840	TargetLowering::AsmOperandInfoVector TargetLowering::ParseConstraints(
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	2841	ImmutableCallSite CS) const {
				2842	/// ConstraintOperands - Information about all of the constraints.
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	2843	AsmOperandInfoVector ConstraintOperands;
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	2844	const InlineAsm *IA = cast<InlineAsm>(CS.getCalledValue());
John Thompson	67aff16	2010-09-21 22:04:54 +0000	[diff] [blame]	2845	unsigned maCount = 0; // Largest number of multiple alternative constraints.
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	2846
				2847	// Do a prepass over the constraints, canonicalizing them, and building up the
				2848	// ConstraintOperands list.
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	2849	InlineAsm::ConstraintInfoVector
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	2850	ConstraintInfos = IA->ParseConstraints();
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2851
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	2852	unsigned ArgNo = 0; // ArgNo - The argument of the CallInst.
				2853	unsigned ResNo = 0; // ResNo - The result number of the next output.
				2854
				2855	for (unsigned i = 0, e = ConstraintInfos.size(); i != e; ++i) {
				2856	ConstraintOperands.push_back(AsmOperandInfo(ConstraintInfos[i]));
				2857	AsmOperandInfo &OpInfo = ConstraintOperands.back();
				2858
John Thompson	67aff16	2010-09-21 22:04:54 +0000	[diff] [blame]	2859	// Update multiple alternative constraint count.
				2860	if (OpInfo.multipleAlternatives.size() > maCount)
				2861	maCount = OpInfo.multipleAlternatives.size();
				2862
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	2863	OpInfo.ConstraintVT = MVT::Other;
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	2864
				2865	// Compute the value type for each operand.
				2866	switch (OpInfo.Type) {
				2867	case InlineAsm::isOutput:
				2868	// Indirect outputs just consume an argument.
				2869	if (OpInfo.isIndirect) {
				2870	OpInfo.CallOperandVal = const_cast<Value *>(CS.getArgument(ArgNo++));
				2871	break;
				2872	}
				2873
				2874	// The return value of the call is this value. As such, there is no
				2875	// corresponding argument.
				2876	assert(!CS.getType()->isVoidTy() &&
				2877	"Bad inline asm!");
Chris Lattner	db125cf	2011-07-18 04:54:35 +0000	[diff] [blame]	2878	if (StructType *STy = dyn_cast<StructType>(CS.getType())) {
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	2879	OpInfo.ConstraintVT = getValueType(STy->getElementType(ResNo));
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	2880	} else {
				2881	assert(ResNo == 0 && "Asm only has one result!");
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	2882	OpInfo.ConstraintVT = getValueType(CS.getType());
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	2883	}
				2884	++ResNo;
				2885	break;
				2886	case InlineAsm::isInput:
				2887	OpInfo.CallOperandVal = const_cast<Value *>(CS.getArgument(ArgNo++));
				2888	break;
				2889	case InlineAsm::isClobber:
				2890	// Nothing to do.
				2891	break;
				2892	}
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2893
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	2894	if (OpInfo.CallOperandVal) {
Chris Lattner	db125cf	2011-07-18 04:54:35 +0000	[diff] [blame]	2895	llvm::Type *OpTy = OpInfo.CallOperandVal->getType();
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	2896	if (OpInfo.isIndirect) {
Chris Lattner	db125cf	2011-07-18 04:54:35 +0000	[diff] [blame]	2897	llvm::PointerType *PtrTy = dyn_cast<PointerType>(OpTy);
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	2898	if (!PtrTy)
				2899	report_fatal_error("Indirect operand for inline asm not a pointer!");
				2900	OpTy = PtrTy->getElementType();
				2901	}
Eric Christopher	362fee9	2011-06-17 20:41:29 +0000	[diff] [blame]	2902
Eric Christopher	cef81b7	2011-05-09 20:04:43 +0000	[diff] [blame]	2903	// Look for vector wrapped in a struct. e.g. { <16 x i8> }.
Chris Lattner	db125cf	2011-07-18 04:54:35 +0000	[diff] [blame]	2904	if (StructType *STy = dyn_cast<StructType>(OpTy))
Eric Christopher	cef81b7	2011-05-09 20:04:43 +0000	[diff] [blame]	2905	if (STy->getNumElements() == 1)
				2906	OpTy = STy->getElementType(0);
				2907
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	2908	// If OpTy is not a single value, it may be a struct/union that we
				2909	// can tile with integers.
				2910	if (!OpTy->isSingleValueType() && OpTy->isSized()) {
				2911	unsigned BitSize = TD->getTypeSizeInBits(OpTy);
				2912	switch (BitSize) {
				2913	default: break;
				2914	case 1:
				2915	case 8:
				2916	case 16:
				2917	case 32:
				2918	case 64:
				2919	case 128:
Dale Johannesen	71365d3	2010-11-09 01:15:07 +0000	[diff] [blame]	2920	OpInfo.ConstraintVT =
				2921	EVT::getEVT(IntegerType::get(OpTy->getContext(), BitSize), true);
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	2922	break;
				2923	}
				2924	} else if (dyn_cast<PointerType>(OpTy)) {
				2925	OpInfo.ConstraintVT = MVT::getIntegerVT(8*TD->getPointerSize());
				2926	} else {
				2927	OpInfo.ConstraintVT = EVT::getEVT(OpTy, true);
				2928	}
				2929	}
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	2930	}
				2931
				2932	// If we have multiple alternative constraints, select the best alternative.
				2933	if (ConstraintInfos.size()) {
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	2934	if (maCount) {
				2935	unsigned bestMAIndex = 0;
				2936	int bestWeight = -1;
				2937	// weight: -1 = invalid match, and 0 = so-so match to 5 = good match.
				2938	int weight = -1;
				2939	unsigned maIndex;
				2940	// Compute the sums of the weights for each alternative, keeping track
				2941	// of the best (highest weight) one so far.
				2942	for (maIndex = 0; maIndex < maCount; ++maIndex) {
				2943	int weightSum = 0;
				2944	for (unsigned cIndex = 0, eIndex = ConstraintOperands.size();
				2945	cIndex != eIndex; ++cIndex) {
				2946	AsmOperandInfo& OpInfo = ConstraintOperands[cIndex];
				2947	if (OpInfo.Type == InlineAsm::isClobber)
				2948	continue;
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	2949
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	2950	// If this is an output operand with a matching input operand,
				2951	// look up the matching input. If their types mismatch, e.g. one
				2952	// is an integer, the other is floating point, or their sizes are
				2953	// different, flag it as an maCantMatch.
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	2954	if (OpInfo.hasMatchingInput()) {
				2955	AsmOperandInfo &Input = ConstraintOperands[OpInfo.MatchingInput];
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	2956	if (OpInfo.ConstraintVT != Input.ConstraintVT) {
				2957	if ((OpInfo.ConstraintVT.isInteger() !=
				2958	Input.ConstraintVT.isInteger()) \|\|
				2959	(OpInfo.ConstraintVT.getSizeInBits() !=
				2960	Input.ConstraintVT.getSizeInBits())) {
				2961	weightSum = -1; // Can't match.
				2962	break;
				2963	}
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	2964	}
				2965	}
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	2966	weight = getMultipleConstraintMatchWeight(OpInfo, maIndex);
				2967	if (weight == -1) {
				2968	weightSum = -1;
				2969	break;
				2970	}
				2971	weightSum += weight;
				2972	}
				2973	// Update best.
				2974	if (weightSum > bestWeight) {
				2975	bestWeight = weightSum;
				2976	bestMAIndex = maIndex;
				2977	}
				2978	}
				2979
				2980	// Now select chosen alternative in each constraint.
				2981	for (unsigned cIndex = 0, eIndex = ConstraintOperands.size();
				2982	cIndex != eIndex; ++cIndex) {
				2983	AsmOperandInfo& cInfo = ConstraintOperands[cIndex];
				2984	if (cInfo.Type == InlineAsm::isClobber)
				2985	continue;
				2986	cInfo.selectAlternative(bestMAIndex);
				2987	}
				2988	}
				2989	}
				2990
				2991	// Check and hook up tied operands, choose constraint code to use.
				2992	for (unsigned cIndex = 0, eIndex = ConstraintOperands.size();
				2993	cIndex != eIndex; ++cIndex) {
				2994	AsmOperandInfo& OpInfo = ConstraintOperands[cIndex];
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2995
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	2996	// If this is an output operand with a matching input operand, look up the
				2997	// matching input. If their types mismatch, e.g. one is an integer, the
				2998	// other is floating point, or their sizes are different, flag it as an
				2999	// error.
				3000	if (OpInfo.hasMatchingInput()) {
				3001	AsmOperandInfo &Input = ConstraintOperands[OpInfo.MatchingInput];
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	3002
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	3003	if (OpInfo.ConstraintVT != Input.ConstraintVT) {
Eric Christopher	5427ede	2011-07-14 20:13:52 +0000	[diff] [blame]	3004	std::pair<unsigned, const TargetRegisterClass*> MatchRC =
				3005	getRegForInlineAsmConstraint(OpInfo.ConstraintCode, OpInfo.ConstraintVT);
				3006	std::pair<unsigned, const TargetRegisterClass*> InputRC =
				3007	getRegForInlineAsmConstraint(Input.ConstraintCode, Input.ConstraintVT);
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	3008	if ((OpInfo.ConstraintVT.isInteger() !=
				3009	Input.ConstraintVT.isInteger()) \|\|
Eric Christopher	5427ede	2011-07-14 20:13:52 +0000	[diff] [blame]	3010	(MatchRC.second != InputRC.second)) {
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	3011	report_fatal_error("Unsupported asm: input constraint"
				3012	" with a matching output constraint of"
				3013	" incompatible type!");
				3014	}
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	3015	}
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	3016
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	3017	}
				3018	}
				3019
				3020	return ConstraintOperands;
				3021	}
				3022
Chris Lattner	58f15c4	2008-10-17 16:21:11 +0000	[diff] [blame]	3023
Chris Lattner	4376fea	2008-04-27 00:09:47 +0000	[diff] [blame]	3024	/// getConstraintGenerality - Return an integer indicating how general CT
				3025	/// is.
				3026	static unsigned getConstraintGenerality(TargetLowering::ConstraintType CT) {
				3027	switch (CT) {
Chris Lattner	4376fea	2008-04-27 00:09:47 +0000	[diff] [blame]	3028	case TargetLowering::C_Other:
				3029	case TargetLowering::C_Unknown:
				3030	return 0;
				3031	case TargetLowering::C_Register:
				3032	return 1;
				3033	case TargetLowering::C_RegisterClass:
				3034	return 2;
				3035	case TargetLowering::C_Memory:
				3036	return 3;
				3037	}
Chandler Carruth	732f05c	2012-01-10 18:08:01 +0000	[diff] [blame]	3038	llvm_unreachable("Invalid constraint type");
Chris Lattner	4376fea	2008-04-27 00:09:47 +0000	[diff] [blame]	3039	}
				3040
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	3041	/// Examine constraint type and operand type and determine a weight value.
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	3042	/// This object must already have been set up with the operand type
				3043	/// and the current alternative constraint selected.
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	3044	TargetLowering::ConstraintWeight
				3045	TargetLowering::getMultipleConstraintMatchWeight(
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	3046	AsmOperandInfo &info, int maIndex) const {
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	3047	InlineAsm::ConstraintCodeVector *rCodes;
John Thompson	67aff16	2010-09-21 22:04:54 +0000	[diff] [blame]	3048	if (maIndex >= (int)info.multipleAlternatives.size())
				3049	rCodes = &info.Codes;
				3050	else
				3051	rCodes = &info.multipleAlternatives[maIndex].Codes;
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	3052	ConstraintWeight BestWeight = CW_Invalid;
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	3053
				3054	// Loop over the options, keeping track of the most general one.
John Thompson	67aff16	2010-09-21 22:04:54 +0000	[diff] [blame]	3055	for (unsigned i = 0, e = rCodes->size(); i != e; ++i) {
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	3056	ConstraintWeight weight =
				3057	getSingleConstraintMatchWeight(info, (*rCodes)[i].c_str());
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	3058	if (weight > BestWeight)
				3059	BestWeight = weight;
				3060	}
				3061
				3062	return BestWeight;
				3063	}
				3064
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	3065	/// Examine constraint type and operand type and determine a weight value.
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	3066	/// This object must already have been set up with the operand type
				3067	/// and the current alternative constraint selected.
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	3068	TargetLowering::ConstraintWeight
				3069	TargetLowering::getSingleConstraintMatchWeight(
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	3070	AsmOperandInfo &info, const char *constraint) const {
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	3071	ConstraintWeight weight = CW_Invalid;
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	3072	Value *CallOperandVal = info.CallOperandVal;
				3073	// If we don't have a value, we can't do a match,
				3074	// but allow it at the lowest weight.
				3075	if (CallOperandVal == NULL)
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	3076	return CW_Default;
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	3077	// Look at the constraint type.
				3078	switch (*constraint) {
				3079	case 'i': // immediate integer.
				3080	case 'n': // immediate integer with a known value.
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	3081	if (isa<ConstantInt>(CallOperandVal))
				3082	weight = CW_Constant;
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	3083	break;
				3084	case 's': // non-explicit intregal immediate.
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	3085	if (isa<GlobalValue>(CallOperandVal))
				3086	weight = CW_Constant;
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	3087	break;
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	3088	case 'E': // immediate float if host format.
				3089	case 'F': // immediate float.
				3090	if (isa<ConstantFP>(CallOperandVal))
				3091	weight = CW_Constant;
				3092	break;
				3093	case '<': // memory operand with autodecrement.
				3094	case '>': // memory operand with autoincrement.
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	3095	case 'm': // memory operand.
				3096	case 'o': // offsettable memory operand
				3097	case 'V': // non-offsettable memory operand
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	3098	weight = CW_Memory;
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	3099	break;
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	3100	case 'r': // general register.
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	3101	case 'g': // general register, memory operand or immediate integer.
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	3102	// note: Clang converts "g" to "imr".
				3103	if (CallOperandVal->getType()->isIntegerTy())
				3104	weight = CW_Register;
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	3105	break;
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	3106	case 'X': // any operand.
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	3107	default:
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	3108	weight = CW_Default;
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	3109	break;
				3110	}
				3111	return weight;
				3112	}
				3113
Chris Lattner	4376fea	2008-04-27 00:09:47 +0000	[diff] [blame]	3114	/// ChooseConstraint - If there are multiple different constraints that we
				3115	/// could pick for this operand (e.g. "imr") try to pick the 'best' one.
Chris Lattner	24e1a9d	2008-04-27 01:49:46 +0000	[diff] [blame]	3116	/// This is somewhat tricky: constraints fall into four classes:
Chris Lattner	4376fea	2008-04-27 00:09:47 +0000	[diff] [blame]	3117	/// Other -> immediates and magic values
				3118	/// Register -> one specific register
				3119	/// RegisterClass -> a group of regs
				3120	/// Memory -> memory
				3121	/// Ideally, we would pick the most specific constraint possible: if we have
				3122	/// something that fits into a register, we would pick it. The problem here
				3123	/// is that if we have something that could either be in a register or in
				3124	/// memory that use of the register could cause selection of other
				3125	/// operands to fail: they might only succeed if we pick memory. Because of
				3126	/// this the heuristic we use is:
				3127	///
				3128	/// 1) If there is an 'other' constraint, and if the operand is valid for
				3129	/// that constraint, use it. This makes us take advantage of 'i'
				3130	/// constraints when available.
				3131	/// 2) Otherwise, pick the most general constraint present. This prefers
				3132	/// 'm' over 'r', for example.
				3133	///
				3134	static void ChooseConstraint(TargetLowering::AsmOperandInfo &OpInfo,
Dale Johannesen	1784d16	2010-06-25 21:55:36 +0000	[diff] [blame]	3135	const TargetLowering &TLI,
Dan Gohman	475871a	2008-07-27 21:46:04 +0000	[diff] [blame]	3136	SDValue Op, SelectionDAG *DAG) {
Chris Lattner	4376fea	2008-04-27 00:09:47 +0000	[diff] [blame]	3137	assert(OpInfo.Codes.size() > 1 && "Doesn't have multiple constraint options");
				3138	unsigned BestIdx = 0;
				3139	TargetLowering::ConstraintType BestType = TargetLowering::C_Unknown;
				3140	int BestGenerality = -1;
Dale Johannesen	a5989f8	2010-06-28 22:09:45 +0000	[diff] [blame]	3141
Chris Lattner	4376fea	2008-04-27 00:09:47 +0000	[diff] [blame]	3142	// Loop over the options, keeping track of the most general one.
				3143	for (unsigned i = 0, e = OpInfo.Codes.size(); i != e; ++i) {
				3144	TargetLowering::ConstraintType CType =
				3145	TLI.getConstraintType(OpInfo.Codes[i]);
Dale Johannesen	a5989f8	2010-06-28 22:09:45 +0000	[diff] [blame]	3146
Chris Lattner	5a09690	2008-04-27 00:37:18 +0000	[diff] [blame]	3147	// If this is an 'other' constraint, see if the operand is valid for it.
				3148	// For example, on X86 we might have an 'rI' constraint. If the operand
				3149	// is an integer in the range [0..31] we want to use I (saving a load
				3150	// of a register), otherwise we must use 'r'.
Gabor Greif	ba36cb5	2008-08-28 21:40:38 +0000	[diff] [blame]	3151	if (CType == TargetLowering::C_Other && Op.getNode()) {
Chris Lattner	5a09690	2008-04-27 00:37:18 +0000	[diff] [blame]	3152	assert(OpInfo.Codes[i].size() == 1 &&
				3153	"Unhandled multi-letter 'other' constraint");
Dan Gohman	475871a	2008-07-27 21:46:04 +0000	[diff] [blame]	3154	std::vector<SDValue> ResultOps;
Eric Christopher	100c833	2011-06-02 23:16:42 +0000	[diff] [blame]	3155	TLI.LowerAsmOperandForConstraint(Op, OpInfo.Codes[i],
Chris Lattner	5a09690	2008-04-27 00:37:18 +0000	[diff] [blame]	3156	ResultOps, *DAG);
				3157	if (!ResultOps.empty()) {
				3158	BestType = CType;
				3159	BestIdx = i;
				3160	break;
				3161	}
				3162	}
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	3163
Dale Johannesen	a5989f8	2010-06-28 22:09:45 +0000	[diff] [blame]	3164	// Things with matching constraints can only be registers, per gcc
				3165	// documentation. This mainly affects "g" constraints.
				3166	if (CType == TargetLowering::C_Memory && OpInfo.hasMatchingInput())
				3167	continue;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	3168
Chris Lattner	4376fea	2008-04-27 00:09:47 +0000	[diff] [blame]	3169	// This constraint letter is more general than the previous one, use it.
				3170	int Generality = getConstraintGenerality(CType);
				3171	if (Generality > BestGenerality) {
				3172	BestType = CType;
				3173	BestIdx = i;
				3174	BestGenerality = Generality;
				3175	}
				3176	}
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	3177
Chris Lattner	4376fea	2008-04-27 00:09:47 +0000	[diff] [blame]	3178	OpInfo.ConstraintCode = OpInfo.Codes[BestIdx];
				3179	OpInfo.ConstraintType = BestType;
				3180	}
				3181
				3182	/// ComputeConstraintToUse - Determines the constraint code and constraint
				3183	/// type to use for the specific AsmOperandInfo, setting
				3184	/// OpInfo.ConstraintCode and OpInfo.ConstraintType.
Chris Lattner	5a09690	2008-04-27 00:37:18 +0000	[diff] [blame]	3185	void TargetLowering::ComputeConstraintToUse(AsmOperandInfo &OpInfo,
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	3186	SDValue Op,
Chris Lattner	5a09690	2008-04-27 00:37:18 +0000	[diff] [blame]	3187	SelectionDAG *DAG) const {
Chris Lattner	4376fea	2008-04-27 00:09:47 +0000	[diff] [blame]	3188	assert(!OpInfo.Codes.empty() && "Must have at least one constraint");
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	3189
Chris Lattner	4376fea	2008-04-27 00:09:47 +0000	[diff] [blame]	3190	// Single-letter constraints ('r') are very common.
				3191	if (OpInfo.Codes.size() == 1) {
				3192	OpInfo.ConstraintCode = OpInfo.Codes[0];
				3193	OpInfo.ConstraintType = getConstraintType(OpInfo.ConstraintCode);
				3194	} else {
Dale Johannesen	1784d16	2010-06-25 21:55:36 +0000	[diff] [blame]	3195	ChooseConstraint(OpInfo, *this, Op, DAG);
Chris Lattner	4376fea	2008-04-27 00:09:47 +0000	[diff] [blame]	3196	}
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	3197
Chris Lattner	4376fea	2008-04-27 00:09:47 +0000	[diff] [blame]	3198	// 'X' matches anything.
				3199	if (OpInfo.ConstraintCode == "X" && OpInfo.CallOperandVal) {
				3200	// Labels and constants are handled elsewhere ('X' is the only thing
Dale Johannesen	8ea5ec6	2009-07-07 23:26:33 +0000	[diff] [blame]	3201	// that matches labels). For Functions, the type here is the type of
Dale Johannesen	5339c55	2009-07-20 23:27:39 +0000	[diff] [blame]	3202	// the result, which is not what we want to look at; leave them alone.
				3203	Value *v = OpInfo.CallOperandVal;
Dale Johannesen	8ea5ec6	2009-07-07 23:26:33 +0000	[diff] [blame]	3204	if (isa<BasicBlock>(v) \|\| isa<ConstantInt>(v) \|\| isa<Function>(v)) {
				3205	OpInfo.CallOperandVal = v;
Chris Lattner	4376fea	2008-04-27 00:09:47 +0000	[diff] [blame]	3206	return;
Dale Johannesen	8ea5ec6	2009-07-07 23:26:33 +0000	[diff] [blame]	3207	}
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	3208
Chris Lattner	4376fea	2008-04-27 00:09:47 +0000	[diff] [blame]	3209	// Otherwise, try to resolve it to something we know about by looking at
				3210	// the actual operand type.
				3211	if (const char *Repl = LowerXConstraint(OpInfo.ConstraintVT)) {
				3212	OpInfo.ConstraintCode = Repl;
				3213	OpInfo.ConstraintType = getConstraintType(OpInfo.ConstraintCode);
				3214	}
				3215	}
				3216	}
				3217
				3218	//===----------------------------------------------------------------------===//
Evan Cheng	30b37b5	2006-03-13 23:18:16 +0000	[diff] [blame]	3219	// Loop Strength Reduction hooks
				3220	//===----------------------------------------------------------------------===//
				3221
Chris Lattner	1436bb6	2007-03-30 23:14:50 +0000	[diff] [blame]	3222	/// isLegalAddressingMode - Return true if the addressing mode represented
				3223	/// by AM is legal for this target, for a load/store of the specified type.
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	3224	bool TargetLowering::isLegalAddressingMode(const AddrMode &AM,
Chris Lattner	db125cf	2011-07-18 04:54:35 +0000	[diff] [blame]	3225	Type *Ty) const {
Chris Lattner	1436bb6	2007-03-30 23:14:50 +0000	[diff] [blame]	3226	// The default implementation of this implements a conservative RISCy, r+r and
				3227	// r+i addr mode.
				3228
				3229	// Allows a sign-extended 16-bit immediate field.
				3230	if (AM.BaseOffs <= -(1LL << 16) \|\| AM.BaseOffs >= (1LL << 16)-1)
				3231	return false;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	3232
Chris Lattner	1436bb6	2007-03-30 23:14:50 +0000	[diff] [blame]	3233	// No global is ever allowed as a base.
				3234	if (AM.BaseGV)
				3235	return false;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	3236
				3237	// Only support r+r,
Chris Lattner	1436bb6	2007-03-30 23:14:50 +0000	[diff] [blame]	3238	switch (AM.Scale) {
				3239	case 0: // "r+i" or just "i", depending on HasBaseReg.
				3240	break;
				3241	case 1:
				3242	if (AM.HasBaseReg && AM.BaseOffs) // "r+r+i" is not allowed.
				3243	return false;
				3244	// Otherwise we have r+r or r+i.
				3245	break;
				3246	case 2:
				3247	if (AM.HasBaseReg \|\| AM.BaseOffs) // 2r+r or 2r+i is not allowed.
				3248	return false;
				3249	// Allow 2*r as r+r.
				3250	break;
				3251	}
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	3252
Chris Lattner	1436bb6	2007-03-30 23:14:50 +0000	[diff] [blame]	3253	return true;
				3254	}
				3255
Benjamin Kramer	9c64030	2011-07-08 10:31:30 +0000	[diff] [blame]	3256	/// BuildExactDiv - Given an exact SDIV by a constant, create a multiplication
				3257	/// with the multiplicative inverse of the constant.
				3258	SDValue TargetLowering::BuildExactSDIV(SDValue Op1, SDValue Op2, DebugLoc dl,
				3259	SelectionDAG &DAG) const {
				3260	ConstantSDNode *C = cast<ConstantSDNode>(Op2);
				3261	APInt d = C->getAPIntValue();
				3262	assert(d != 0 && "Division by zero!");
				3263
				3264	// Shift the value upfront if it is even, so the LSB is one.
				3265	unsigned ShAmt = d.countTrailingZeros();
				3266	if (ShAmt) {
				3267	// TODO: For UDIV use SRL instead of SRA.
				3268	SDValue Amt = DAG.getConstant(ShAmt, getShiftAmountTy(Op1.getValueType()));
				3269	Op1 = DAG.getNode(ISD::SRA, dl, Op1.getValueType(), Op1, Amt);
				3270	d = d.ashr(ShAmt);
				3271	}
				3272
				3273	// Calculate the multiplicative inverse, using Newton's method.
				3274	APInt t, xn = d;
				3275	while ((t = d*xn) != 1)
				3276	xn *= APInt(d.getBitWidth(), 2) - t;
				3277
				3278	Op2 = DAG.getConstant(xn, Op1.getValueType());
				3279	return DAG.getNode(ISD::MUL, dl, Op1.getValueType(), Op1, Op2);
				3280	}
				3281
Andrew Lenharth	dae9cbe	2006-05-16 17:42:15 +0000	[diff] [blame]	3282	/// BuildSDIVSequence - Given an ISD::SDIV node expressing a divide by constant,
				3283	/// return a DAG expression to select that will generate the same value by
				3284	/// multiplying by a magic number. See:
				3285	/// <http://the.wall.riscom.net/books/proc/ppc/cwg/code2.html>
Richard Osborne	19a4daf	2011-11-07 17:09:05 +0000	[diff] [blame]	3286	SDValue TargetLowering::
				3287	BuildSDIV(SDNode *N, SelectionDAG &DAG, bool IsAfterLegalization,
				3288	std::vector<SDNode> Created) const {
Owen Anderson	e50ed30	2009-08-10 22:56:29 +0000	[diff] [blame]	3289	EVT VT = N->getValueType(0);
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	3290	DebugLoc dl= N->getDebugLoc();
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	3291
Andrew Lenharth	dae9cbe	2006-05-16 17:42:15 +0000	[diff] [blame]	3292	// Check to see if we can do this.
Eli Friedman	fc69cb4	2008-11-30 06:35:39 +0000	[diff] [blame]	3293	// FIXME: We should be more aggressive here.
				3294	if (!isTypeLegal(VT))
				3295	return SDValue();
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	3296
Eli Friedman	fc69cb4	2008-11-30 06:35:39 +0000	[diff] [blame]	3297	APInt d = cast<ConstantSDNode>(N->getOperand(1))->getAPIntValue();
Jay Foad	4e5ea55	2009-04-30 10:15:35 +0000	[diff] [blame]	3298	APInt::ms magics = d.magic();
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	3299
Andrew Lenharth	dae9cbe	2006-05-16 17:42:15 +0000	[diff] [blame]	3300	// Multiply the numerator (operand 0) by the magic value
Eli Friedman	fc69cb4	2008-11-30 06:35:39 +0000	[diff] [blame]	3301	// FIXME: We should support doing a MUL in a wider type
Dan Gohman	475871a	2008-07-27 21:46:04 +0000	[diff] [blame]	3302	SDValue Q;
Richard Osborne	19a4daf	2011-11-07 17:09:05 +0000	[diff] [blame]	3303	if (IsAfterLegalization ? isOperationLegal(ISD::MULHS, VT) :
				3304	isOperationLegalOrCustom(ISD::MULHS, VT))
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	3305	Q = DAG.getNode(ISD::MULHS, dl, VT, N->getOperand(0),
Dan Gohman	525178c	2007-10-08 18:33:35 +0000	[diff] [blame]	3306	DAG.getConstant(magics.m, VT));
Richard Osborne	19a4daf	2011-11-07 17:09:05 +0000	[diff] [blame]	3307	else if (IsAfterLegalization ? isOperationLegal(ISD::SMUL_LOHI, VT) :
				3308	isOperationLegalOrCustom(ISD::SMUL_LOHI, VT))
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	3309	Q = SDValue(DAG.getNode(ISD::SMUL_LOHI, dl, DAG.getVTList(VT, VT),
Dan Gohman	525178c	2007-10-08 18:33:35 +0000	[diff] [blame]	3310	N->getOperand(0),
Gabor Greif	ba36cb5	2008-08-28 21:40:38 +0000	[diff] [blame]	3311	DAG.getConstant(magics.m, VT)).getNode(), 1);
Dan Gohman	525178c	2007-10-08 18:33:35 +0000	[diff] [blame]	3312	else
Dan Gohman	475871a	2008-07-27 21:46:04 +0000	[diff] [blame]	3313	return SDValue(); // No mulhs or equvialent
Andrew Lenharth	dae9cbe	2006-05-16 17:42:15 +0000	[diff] [blame]	3314	// If d > 0 and m < 0, add the numerator
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	3315	if (d.isStrictlyPositive() && magics.m.isNegative()) {
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	3316	Q = DAG.getNode(ISD::ADD, dl, VT, Q, N->getOperand(0));
Andrew Lenharth	dae9cbe	2006-05-16 17:42:15 +0000	[diff] [blame]	3317	if (Created)
Gabor Greif	ba36cb5	2008-08-28 21:40:38 +0000	[diff] [blame]	3318	Created->push_back(Q.getNode());
Andrew Lenharth	dae9cbe	2006-05-16 17:42:15 +0000	[diff] [blame]	3319	}
				3320	// If d < 0 and m > 0, subtract the numerator.
Eli Friedman	fc69cb4	2008-11-30 06:35:39 +0000	[diff] [blame]	3321	if (d.isNegative() && magics.m.isStrictlyPositive()) {
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	3322	Q = DAG.getNode(ISD::SUB, dl, VT, Q, N->getOperand(0));
Andrew Lenharth	dae9cbe	2006-05-16 17:42:15 +0000	[diff] [blame]	3323	if (Created)
Gabor Greif	ba36cb5	2008-08-28 21:40:38 +0000	[diff] [blame]	3324	Created->push_back(Q.getNode());
Andrew Lenharth	dae9cbe	2006-05-16 17:42:15 +0000	[diff] [blame]	3325	}
				3326	// Shift right algebraic if shift value is nonzero
				3327	if (magics.s > 0) {
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	3328	Q = DAG.getNode(ISD::SRA, dl, VT, Q,
Owen Anderson	95771af	2011-02-25 21:41:48 +0000	[diff] [blame]	3329	DAG.getConstant(magics.s, getShiftAmountTy(Q.getValueType())));
Andrew Lenharth	dae9cbe	2006-05-16 17:42:15 +0000	[diff] [blame]	3330	if (Created)
Gabor Greif	ba36cb5	2008-08-28 21:40:38 +0000	[diff] [blame]	3331	Created->push_back(Q.getNode());
Andrew Lenharth	dae9cbe	2006-05-16 17:42:15 +0000	[diff] [blame]	3332	}
				3333	// Extract the sign bit and add it to the quotient
Dan Gohman	475871a	2008-07-27 21:46:04 +0000	[diff] [blame]	3334	SDValue T =
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	3335	DAG.getNode(ISD::SRL, dl, VT, Q, DAG.getConstant(VT.getSizeInBits()-1,
Owen Anderson	95771af	2011-02-25 21:41:48 +0000	[diff] [blame]	3336	getShiftAmountTy(Q.getValueType())));
Andrew Lenharth	dae9cbe	2006-05-16 17:42:15 +0000	[diff] [blame]	3337	if (Created)
Gabor Greif	ba36cb5	2008-08-28 21:40:38 +0000	[diff] [blame]	3338	Created->push_back(T.getNode());
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	3339	return DAG.getNode(ISD::ADD, dl, VT, Q, T);
Andrew Lenharth	dae9cbe	2006-05-16 17:42:15 +0000	[diff] [blame]	3340	}
				3341
				3342	/// BuildUDIVSequence - Given an ISD::UDIV node expressing a divide by constant,
				3343	/// return a DAG expression to select that will generate the same value by
				3344	/// multiplying by a magic number. See:
				3345	/// <http://the.wall.riscom.net/books/proc/ppc/cwg/code2.html>
Richard Osborne	19a4daf	2011-11-07 17:09:05 +0000	[diff] [blame]	3346	SDValue TargetLowering::
				3347	BuildUDIV(SDNode *N, SelectionDAG &DAG, bool IsAfterLegalization,
				3348	std::vector<SDNode> Created) const {
Owen Anderson	e50ed30	2009-08-10 22:56:29 +0000	[diff] [blame]	3349	EVT VT = N->getValueType(0);
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	3350	DebugLoc dl = N->getDebugLoc();
Eli Friedman	201c977	2008-11-30 06:02:26 +0000	[diff] [blame]	3351
Andrew Lenharth	dae9cbe	2006-05-16 17:42:15 +0000	[diff] [blame]	3352	// Check to see if we can do this.
Eli Friedman	201c977	2008-11-30 06:02:26 +0000	[diff] [blame]	3353	// FIXME: We should be more aggressive here.
				3354	if (!isTypeLegal(VT))
				3355	return SDValue();
				3356
				3357	// FIXME: We should use a narrower constant when the upper
				3358	// bits are known to be zero.
Benjamin Kramer	1c10b8d	2011-03-17 20:39:14 +0000	[diff] [blame]	3359	const APInt &N1C = cast<ConstantSDNode>(N->getOperand(1))->getAPIntValue();
				3360	APInt::mu magics = N1C.magicu();
				3361
				3362	SDValue Q = N->getOperand(0);
				3363
				3364	// If the divisor is even, we can avoid using the expensive fixup by shifting
				3365	// the divided value upfront.
				3366	if (magics.a != 0 && !N1C[0]) {
				3367	unsigned Shift = N1C.countTrailingZeros();
				3368	Q = DAG.getNode(ISD::SRL, dl, VT, Q,
				3369	DAG.getConstant(Shift, getShiftAmountTy(Q.getValueType())));
				3370	if (Created)
				3371	Created->push_back(Q.getNode());
				3372
				3373	// Get magic number for the shifted divisor.
				3374	magics = N1C.lshr(Shift).magicu(Shift);
				3375	assert(magics.a == 0 && "Should use cheap fixup now");
				3376	}
Eli Friedman	201c977	2008-11-30 06:02:26 +0000	[diff] [blame]	3377
Andrew Lenharth	dae9cbe	2006-05-16 17:42:15 +0000	[diff] [blame]	3378	// Multiply the numerator (operand 0) by the magic value
Eli Friedman	201c977	2008-11-30 06:02:26 +0000	[diff] [blame]	3379	// FIXME: We should support doing a MUL in a wider type
Richard Osborne	19a4daf	2011-11-07 17:09:05 +0000	[diff] [blame]	3380	if (IsAfterLegalization ? isOperationLegal(ISD::MULHU, VT) :
				3381	isOperationLegalOrCustom(ISD::MULHU, VT))
Benjamin Kramer	1c10b8d	2011-03-17 20:39:14 +0000	[diff] [blame]	3382	Q = DAG.getNode(ISD::MULHU, dl, VT, Q, DAG.getConstant(magics.m, VT));
Richard Osborne	19a4daf	2011-11-07 17:09:05 +0000	[diff] [blame]	3383	else if (IsAfterLegalization ? isOperationLegal(ISD::UMUL_LOHI, VT) :
				3384	isOperationLegalOrCustom(ISD::UMUL_LOHI, VT))
Benjamin Kramer	1c10b8d	2011-03-17 20:39:14 +0000	[diff] [blame]	3385	Q = SDValue(DAG.getNode(ISD::UMUL_LOHI, dl, DAG.getVTList(VT, VT), Q,
				3386	DAG.getConstant(magics.m, VT)).getNode(), 1);
Dan Gohman	525178c	2007-10-08 18:33:35 +0000	[diff] [blame]	3387	else
Dan Gohman	475871a	2008-07-27 21:46:04 +0000	[diff] [blame]	3388	return SDValue(); // No mulhu or equvialent
Andrew Lenharth	dae9cbe	2006-05-16 17:42:15 +0000	[diff] [blame]	3389	if (Created)
Gabor Greif	ba36cb5	2008-08-28 21:40:38 +0000	[diff] [blame]	3390	Created->push_back(Q.getNode());
Andrew Lenharth	dae9cbe	2006-05-16 17:42:15 +0000	[diff] [blame]	3391
				3392	if (magics.a == 0) {
Benjamin Kramer	1c10b8d	2011-03-17 20:39:14 +0000	[diff] [blame]	3393	assert(magics.s < N1C.getBitWidth() &&
Eli Friedman	201c977	2008-11-30 06:02:26 +0000	[diff] [blame]	3394	"We shouldn't generate an undefined shift!");
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	3395	return DAG.getNode(ISD::SRL, dl, VT, Q,
Owen Anderson	95771af	2011-02-25 21:41:48 +0000	[diff] [blame]	3396	DAG.getConstant(magics.s, getShiftAmountTy(Q.getValueType())));
Andrew Lenharth	dae9cbe	2006-05-16 17:42:15 +0000	[diff] [blame]	3397	} else {
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	3398	SDValue NPQ = DAG.getNode(ISD::SUB, dl, VT, N->getOperand(0), Q);
Andrew Lenharth	dae9cbe	2006-05-16 17:42:15 +0000	[diff] [blame]	3399	if (Created)
Gabor Greif	ba36cb5	2008-08-28 21:40:38 +0000	[diff] [blame]	3400	Created->push_back(NPQ.getNode());
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	3401	NPQ = DAG.getNode(ISD::SRL, dl, VT, NPQ,
Owen Anderson	95771af	2011-02-25 21:41:48 +0000	[diff] [blame]	3402	DAG.getConstant(1, getShiftAmountTy(NPQ.getValueType())));
Andrew Lenharth	dae9cbe	2006-05-16 17:42:15 +0000	[diff] [blame]	3403	if (Created)
Gabor Greif	ba36cb5	2008-08-28 21:40:38 +0000	[diff] [blame]	3404	Created->push_back(NPQ.getNode());
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	3405	NPQ = DAG.getNode(ISD::ADD, dl, VT, NPQ, Q);
Andrew Lenharth	dae9cbe	2006-05-16 17:42:15 +0000	[diff] [blame]	3406	if (Created)
Gabor Greif	ba36cb5	2008-08-28 21:40:38 +0000	[diff] [blame]	3407	Created->push_back(NPQ.getNode());
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	3408	return DAG.getNode(ISD::SRL, dl, VT, NPQ,
Owen Anderson	95771af	2011-02-25 21:41:48 +0000	[diff] [blame]	3409	DAG.getConstant(magics.s-1, getShiftAmountTy(NPQ.getValueType())));
Andrew Lenharth	dae9cbe	2006-05-16 17:42:15 +0000	[diff] [blame]	3410	}
				3411	}