blob: 8b345628e85a79bac602bf974f45b00240b3aba2 [file] [log] [blame]
Bill Schmidt3a55b642012-10-10 21:52:10 +00001; RUN: llc -O0 -mtriple=powerpc-unknown-linux-gnu -maltivec -verify-machineinstrs < %s | FileCheck %s
2; RUN: llc -O0 -mtriple=powerpc64-unknown-linux-gnu -maltivec -verify-machineinstrs < %s | FileCheck %s
3; XFAIL: *
Bill Schmidt26160f42012-10-10 21:25:01 +00004
5; This verifies that we generate correct spill/reload code for vector regs.
6
7define void @addrtaken(i32 %i, <4 x float> %w) nounwind {
8entry:
9 %i.addr = alloca i32, align 4
10 %w.addr = alloca <4 x float>, align 16
11 store i32 %i, i32* %i.addr, align 4
12 store <4 x float> %w, <4 x float>* %w.addr, align 16
13 call void @foo(i32* %i.addr)
14 ret void
15}
16
17; CHECK: stvx 2, 0, 0
18; CHECK: lvx 2, 0, 0
19
20declare void @foo(i32*)