Shih-wei Liao | e264f62 | 2010-02-10 11:10:31 -0800 | [diff] [blame^] | 1 | //===-- SparcTargetMachine.cpp - Define TargetMachine for Sparc -----------===// |
| 2 | // |
| 3 | // The LLVM Compiler Infrastructure |
| 4 | // |
| 5 | // This file is distributed under the University of Illinois Open Source |
| 6 | // License. See LICENSE.TXT for details. |
| 7 | // |
| 8 | //===----------------------------------------------------------------------===// |
| 9 | // |
| 10 | // |
| 11 | //===----------------------------------------------------------------------===// |
| 12 | |
| 13 | #include "SparcMCAsmInfo.h" |
| 14 | #include "SparcTargetMachine.h" |
| 15 | #include "Sparc.h" |
| 16 | #include "llvm/PassManager.h" |
| 17 | #include "llvm/Target/TargetRegistry.h" |
| 18 | using namespace llvm; |
| 19 | |
| 20 | extern "C" void LLVMInitializeSparcTarget() { |
| 21 | // Register the target. |
| 22 | RegisterTargetMachine<SparcV8TargetMachine> X(TheSparcTarget); |
| 23 | RegisterTargetMachine<SparcV9TargetMachine> Y(TheSparcV9Target); |
| 24 | |
| 25 | RegisterAsmInfo<SparcELFMCAsmInfo> A(TheSparcTarget); |
| 26 | RegisterAsmInfo<SparcELFMCAsmInfo> B(TheSparcV9Target); |
| 27 | |
| 28 | } |
| 29 | |
| 30 | /// SparcTargetMachine ctor - Create an ILP32 architecture model |
| 31 | /// |
| 32 | SparcTargetMachine::SparcTargetMachine(const Target &T, const std::string &TT, |
| 33 | const std::string &FS, bool is64bit) |
| 34 | : LLVMTargetMachine(T, TT), |
| 35 | Subtarget(TT, FS, is64bit), |
| 36 | DataLayout(Subtarget.getDataLayout()), |
| 37 | TLInfo(*this), InstrInfo(Subtarget), |
| 38 | FrameInfo(TargetFrameInfo::StackGrowsDown, 8, 0) { |
| 39 | } |
| 40 | |
| 41 | bool SparcTargetMachine::addInstSelector(PassManagerBase &PM, |
| 42 | CodeGenOpt::Level OptLevel) { |
| 43 | PM.add(createSparcISelDag(*this)); |
| 44 | return false; |
| 45 | } |
| 46 | |
| 47 | /// addPreEmitPass - This pass may be implemented by targets that want to run |
| 48 | /// passes immediately before machine code is emitted. This should return |
| 49 | /// true if -print-machineinstrs should print out the code after the passes. |
| 50 | bool SparcTargetMachine::addPreEmitPass(PassManagerBase &PM, |
| 51 | CodeGenOpt::Level OptLevel){ |
| 52 | PM.add(createSparcFPMoverPass(*this)); |
| 53 | PM.add(createSparcDelaySlotFillerPass(*this)); |
| 54 | return true; |
| 55 | } |
| 56 | |
| 57 | SparcV8TargetMachine::SparcV8TargetMachine(const Target &T, |
| 58 | const std::string &TT, |
| 59 | const std::string &FS) |
| 60 | : SparcTargetMachine(T, TT, FS, false) { |
| 61 | } |
| 62 | |
| 63 | SparcV9TargetMachine::SparcV9TargetMachine(const Target &T, |
| 64 | const std::string &TT, |
| 65 | const std::string &FS) |
| 66 | : SparcTargetMachine(T, TT, FS, true) { |
| 67 | } |