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Dan Gohman2048b852009-11-23 18:04:58 +00001//===-- SelectionDAGBuilder.cpp - Selection-DAG building ------------------===//
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This implements routines for translating from LLVM IR into SelectionDAG IR.
11//
12//===----------------------------------------------------------------------===//
13
14#define DEBUG_TYPE "isel"
Devang Patel00190342010-03-15 19:15:44 +000015#include "SDNodeDbgValue.h"
Dan Gohman2048b852009-11-23 18:04:58 +000016#include "SelectionDAGBuilder.h"
Dan Gohmanf0cbcd42008-09-03 16:12:24 +000017#include "llvm/ADT/BitVector.h"
Michael J. Spencer84ac4d52010-10-16 08:25:41 +000018#include "llvm/ADT/PostOrderIterator.h"
Dan Gohman5b229802008-09-04 20:49:27 +000019#include "llvm/ADT/SmallSet.h"
Dan Gohmanf0cbcd42008-09-03 16:12:24 +000020#include "llvm/Analysis/AliasAnalysis.h"
Chris Lattner8047d9a2009-12-24 00:37:38 +000021#include "llvm/Analysis/ConstantFolding.h"
Dan Gohmanf0cbcd42008-09-03 16:12:24 +000022#include "llvm/Constants.h"
23#include "llvm/CallingConv.h"
24#include "llvm/DerivedTypes.h"
25#include "llvm/Function.h"
26#include "llvm/GlobalVariable.h"
27#include "llvm/InlineAsm.h"
28#include "llvm/Instructions.h"
29#include "llvm/Intrinsics.h"
30#include "llvm/IntrinsicInst.h"
Chris Lattner6129c372010-04-08 00:09:16 +000031#include "llvm/LLVMContext.h"
Bill Wendlingb2a42982008-11-06 02:29:10 +000032#include "llvm/Module.h"
Dan Gohman5eb6d652010-04-21 01:22:34 +000033#include "llvm/CodeGen/Analysis.h"
Dan Gohmanf0cbcd42008-09-03 16:12:24 +000034#include "llvm/CodeGen/FastISel.h"
Dan Gohman4c3fd9f2010-07-07 16:01:37 +000035#include "llvm/CodeGen/FunctionLoweringInfo.h"
Dan Gohmanf0cbcd42008-09-03 16:12:24 +000036#include "llvm/CodeGen/GCStrategy.h"
37#include "llvm/CodeGen/GCMetadata.h"
38#include "llvm/CodeGen/MachineFunction.h"
39#include "llvm/CodeGen/MachineFrameInfo.h"
40#include "llvm/CodeGen/MachineInstrBuilder.h"
41#include "llvm/CodeGen/MachineJumpTableInfo.h"
42#include "llvm/CodeGen/MachineModuleInfo.h"
43#include "llvm/CodeGen/MachineRegisterInfo.h"
Bill Wendlingb2a42982008-11-06 02:29:10 +000044#include "llvm/CodeGen/PseudoSourceValue.h"
Dan Gohmanf0cbcd42008-09-03 16:12:24 +000045#include "llvm/CodeGen/SelectionDAG.h"
Devang Patel83489bb2009-01-13 00:35:13 +000046#include "llvm/Analysis/DebugInfo.h"
Dan Gohmanf0cbcd42008-09-03 16:12:24 +000047#include "llvm/Target/TargetData.h"
Anton Korobeynikov16c29b52011-01-10 12:39:04 +000048#include "llvm/Target/TargetFrameLowering.h"
Dan Gohmanf0cbcd42008-09-03 16:12:24 +000049#include "llvm/Target/TargetInstrInfo.h"
Dale Johannesen49de9822009-02-05 01:49:45 +000050#include "llvm/Target/TargetIntrinsicInfo.h"
Dan Gohmanf0cbcd42008-09-03 16:12:24 +000051#include "llvm/Target/TargetLowering.h"
Dan Gohmanf0cbcd42008-09-03 16:12:24 +000052#include "llvm/Target/TargetOptions.h"
53#include "llvm/Support/Compiler.h"
Mikhail Glushenkov2388a582009-01-16 07:02:28 +000054#include "llvm/Support/CommandLine.h"
Dan Gohmanf0cbcd42008-09-03 16:12:24 +000055#include "llvm/Support/Debug.h"
Torok Edwin7d696d82009-07-11 13:10:19 +000056#include "llvm/Support/ErrorHandling.h"
Dan Gohmanf0cbcd42008-09-03 16:12:24 +000057#include "llvm/Support/MathExtras.h"
Anton Korobeynikov56d245b2008-12-23 22:26:18 +000058#include "llvm/Support/raw_ostream.h"
Dan Gohmanf0cbcd42008-09-03 16:12:24 +000059#include <algorithm>
60using namespace llvm;
61
Dale Johannesen601d3c02008-09-05 01:48:15 +000062/// LimitFloatPrecision - Generate low-precision inline sequences for
63/// some float libcalls (6, 8 or 12 bits).
64static unsigned LimitFloatPrecision;
65
66static cl::opt<unsigned, true>
67LimitFPPrecision("limit-float-precision",
68 cl::desc("Generate low-precision inline sequences "
69 "for some float libcalls"),
70 cl::location(LimitFloatPrecision),
71 cl::init(0));
72
Andrew Trickde91f3c2010-11-12 17:50:46 +000073// Limit the width of DAG chains. This is important in general to prevent
74// prevent DAG-based analysis from blowing up. For example, alias analysis and
75// load clustering may not complete in reasonable time. It is difficult to
76// recognize and avoid this situation within each individual analysis, and
77// future analyses are likely to have the same behavior. Limiting DAG width is
Andrew Trickb9e6fe12010-11-20 07:26:51 +000078// the safe approach, and will be especially important with global DAGs.
Andrew Trickde91f3c2010-11-12 17:50:46 +000079//
80// MaxParallelChains default is arbitrarily high to avoid affecting
81// optimization, but could be lowered to improve compile time. Any ld-ld-st-st
Andrew Trickb9e6fe12010-11-20 07:26:51 +000082// sequence over this should have been converted to llvm.memcpy by the
83// frontend. It easy to induce this behavior with .ll code such as:
84// %buffer = alloca [4096 x i8]
85// %data = load [4096 x i8]* %argPtr
86// store [4096 x i8] %data, [4096 x i8]* %buffer
Andrew Trickde91f3c2010-11-12 17:50:46 +000087static cl::opt<unsigned>
88MaxParallelChains("dag-chain-limit", cl::desc("Max parallel isel dag chains"),
89 cl::init(64), cl::Hidden);
90
Chris Lattner3ac18842010-08-24 23:20:40 +000091static SDValue getCopyFromPartsVector(SelectionDAG &DAG, DebugLoc DL,
92 const SDValue *Parts, unsigned NumParts,
93 EVT PartVT, EVT ValueVT);
Michael J. Spencere70c5262010-10-16 08:25:21 +000094
Dan Gohmanf0cbcd42008-09-03 16:12:24 +000095/// getCopyFromParts - Create a value that contains the specified legal parts
96/// combined into the value they represent. If the parts combine to a type
97/// larger then ValueVT then AssertOp can be used to specify whether the extra
98/// bits are known to be zero (ISD::AssertZext) or sign extended from ValueVT
99/// (ISD::AssertSext).
Chris Lattner3ac18842010-08-24 23:20:40 +0000100static SDValue getCopyFromParts(SelectionDAG &DAG, DebugLoc DL,
Dale Johannesen66978ee2009-01-31 02:22:37 +0000101 const SDValue *Parts,
Owen Andersone50ed302009-08-10 22:56:29 +0000102 unsigned NumParts, EVT PartVT, EVT ValueVT,
Duncan Sands0b3aa262009-01-28 14:42:54 +0000103 ISD::NodeType AssertOp = ISD::DELETED_NODE) {
Chris Lattner3ac18842010-08-24 23:20:40 +0000104 if (ValueVT.isVector())
105 return getCopyFromPartsVector(DAG, DL, Parts, NumParts, PartVT, ValueVT);
Michael J. Spencere70c5262010-10-16 08:25:21 +0000106
Dan Gohmanf0cbcd42008-09-03 16:12:24 +0000107 assert(NumParts > 0 && "No parts to assemble!");
Dan Gohmane9530ec2009-01-15 16:58:17 +0000108 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
Dan Gohmanf0cbcd42008-09-03 16:12:24 +0000109 SDValue Val = Parts[0];
110
111 if (NumParts > 1) {
112 // Assemble the value from multiple parts.
Chris Lattner3ac18842010-08-24 23:20:40 +0000113 if (ValueVT.isInteger()) {
Dan Gohmanf0cbcd42008-09-03 16:12:24 +0000114 unsigned PartBits = PartVT.getSizeInBits();
115 unsigned ValueBits = ValueVT.getSizeInBits();
116
117 // Assemble the power of 2 part.
118 unsigned RoundParts = NumParts & (NumParts - 1) ?
119 1 << Log2_32(NumParts) : NumParts;
120 unsigned RoundBits = PartBits * RoundParts;
Owen Andersone50ed302009-08-10 22:56:29 +0000121 EVT RoundVT = RoundBits == ValueBits ?
Owen Anderson23b9b192009-08-12 00:36:31 +0000122 ValueVT : EVT::getIntegerVT(*DAG.getContext(), RoundBits);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +0000123 SDValue Lo, Hi;
124
Owen Anderson23b9b192009-08-12 00:36:31 +0000125 EVT HalfVT = EVT::getIntegerVT(*DAG.getContext(), RoundBits/2);
Duncan Sandsd22ec5f2008-10-29 14:22:20 +0000126
Dan Gohmanf0cbcd42008-09-03 16:12:24 +0000127 if (RoundParts > 2) {
Chris Lattner3ac18842010-08-24 23:20:40 +0000128 Lo = getCopyFromParts(DAG, DL, Parts, RoundParts / 2,
Dan Gohmanf0cbcd42008-09-03 16:12:24 +0000129 PartVT, HalfVT);
Chris Lattner3ac18842010-08-24 23:20:40 +0000130 Hi = getCopyFromParts(DAG, DL, Parts + RoundParts / 2,
Bill Wendling3ea3c242009-12-22 02:10:19 +0000131 RoundParts / 2, PartVT, HalfVT);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +0000132 } else {
Wesley Peckbf17cfa2010-11-23 03:31:01 +0000133 Lo = DAG.getNode(ISD::BITCAST, DL, HalfVT, Parts[0]);
134 Hi = DAG.getNode(ISD::BITCAST, DL, HalfVT, Parts[1]);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +0000135 }
Bill Wendling3ea3c242009-12-22 02:10:19 +0000136
Dan Gohmanf0cbcd42008-09-03 16:12:24 +0000137 if (TLI.isBigEndian())
138 std::swap(Lo, Hi);
Bill Wendling3ea3c242009-12-22 02:10:19 +0000139
Chris Lattner3ac18842010-08-24 23:20:40 +0000140 Val = DAG.getNode(ISD::BUILD_PAIR, DL, RoundVT, Lo, Hi);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +0000141
142 if (RoundParts < NumParts) {
143 // Assemble the trailing non-power-of-2 part.
144 unsigned OddParts = NumParts - RoundParts;
Owen Anderson23b9b192009-08-12 00:36:31 +0000145 EVT OddVT = EVT::getIntegerVT(*DAG.getContext(), OddParts * PartBits);
Chris Lattner3ac18842010-08-24 23:20:40 +0000146 Hi = getCopyFromParts(DAG, DL,
Bill Wendling3ea3c242009-12-22 02:10:19 +0000147 Parts + RoundParts, OddParts, PartVT, OddVT);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +0000148
149 // Combine the round and odd parts.
150 Lo = Val;
151 if (TLI.isBigEndian())
152 std::swap(Lo, Hi);
Owen Anderson23b9b192009-08-12 00:36:31 +0000153 EVT TotalVT = EVT::getIntegerVT(*DAG.getContext(), NumParts * PartBits);
Chris Lattner3ac18842010-08-24 23:20:40 +0000154 Hi = DAG.getNode(ISD::ANY_EXTEND, DL, TotalVT, Hi);
155 Hi = DAG.getNode(ISD::SHL, DL, TotalVT, Hi,
Dan Gohmanf0cbcd42008-09-03 16:12:24 +0000156 DAG.getConstant(Lo.getValueType().getSizeInBits(),
Duncan Sands92abc622009-01-31 15:50:11 +0000157 TLI.getPointerTy()));
Chris Lattner3ac18842010-08-24 23:20:40 +0000158 Lo = DAG.getNode(ISD::ZERO_EXTEND, DL, TotalVT, Lo);
159 Val = DAG.getNode(ISD::OR, DL, TotalVT, Lo, Hi);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +0000160 }
Eli Friedman2ac8b322009-05-20 06:02:09 +0000161 } else if (PartVT.isFloatingPoint()) {
162 // FP split into multiple FP parts (for ppcf128)
Owen Anderson825b72b2009-08-11 20:47:22 +0000163 assert(ValueVT == EVT(MVT::ppcf128) && PartVT == EVT(MVT::f64) &&
Eli Friedman2ac8b322009-05-20 06:02:09 +0000164 "Unexpected split");
165 SDValue Lo, Hi;
Wesley Peckbf17cfa2010-11-23 03:31:01 +0000166 Lo = DAG.getNode(ISD::BITCAST, DL, EVT(MVT::f64), Parts[0]);
167 Hi = DAG.getNode(ISD::BITCAST, DL, EVT(MVT::f64), Parts[1]);
Eli Friedman2ac8b322009-05-20 06:02:09 +0000168 if (TLI.isBigEndian())
169 std::swap(Lo, Hi);
Chris Lattner3ac18842010-08-24 23:20:40 +0000170 Val = DAG.getNode(ISD::BUILD_PAIR, DL, ValueVT, Lo, Hi);
Eli Friedman2ac8b322009-05-20 06:02:09 +0000171 } else {
172 // FP split into integer parts (soft fp)
173 assert(ValueVT.isFloatingPoint() && PartVT.isInteger() &&
174 !PartVT.isVector() && "Unexpected split");
Owen Anderson23b9b192009-08-12 00:36:31 +0000175 EVT IntVT = EVT::getIntegerVT(*DAG.getContext(), ValueVT.getSizeInBits());
Chris Lattner3ac18842010-08-24 23:20:40 +0000176 Val = getCopyFromParts(DAG, DL, Parts, NumParts, PartVT, IntVT);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +0000177 }
178 }
179
180 // There is now one part, held in Val. Correct it to match ValueVT.
181 PartVT = Val.getValueType();
182
183 if (PartVT == ValueVT)
184 return Val;
185
Chris Lattner3ac18842010-08-24 23:20:40 +0000186 if (PartVT.isInteger() && ValueVT.isInteger()) {
Dan Gohmanf0cbcd42008-09-03 16:12:24 +0000187 if (ValueVT.bitsLT(PartVT)) {
188 // For a truncate, see if we have any information to
189 // indicate whether the truncated bits will always be
190 // zero or sign-extension.
191 if (AssertOp != ISD::DELETED_NODE)
Chris Lattner3ac18842010-08-24 23:20:40 +0000192 Val = DAG.getNode(AssertOp, DL, PartVT, Val,
Dan Gohmanf0cbcd42008-09-03 16:12:24 +0000193 DAG.getValueType(ValueVT));
Chris Lattner3ac18842010-08-24 23:20:40 +0000194 return DAG.getNode(ISD::TRUNCATE, DL, ValueVT, Val);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +0000195 }
Chris Lattner3ac18842010-08-24 23:20:40 +0000196 return DAG.getNode(ISD::ANY_EXTEND, DL, ValueVT, Val);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +0000197 }
198
199 if (PartVT.isFloatingPoint() && ValueVT.isFloatingPoint()) {
Chris Lattner3ac18842010-08-24 23:20:40 +0000200 // FP_ROUND's are always exact here.
201 if (ValueVT.bitsLT(Val.getValueType()))
202 return DAG.getNode(ISD::FP_ROUND, DL, ValueVT, Val,
Bill Wendling4533cac2010-01-28 21:51:40 +0000203 DAG.getIntPtrConstant(1));
Bill Wendling3ea3c242009-12-22 02:10:19 +0000204
Chris Lattner3ac18842010-08-24 23:20:40 +0000205 return DAG.getNode(ISD::FP_EXTEND, DL, ValueVT, Val);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +0000206 }
207
Bill Wendling4533cac2010-01-28 21:51:40 +0000208 if (PartVT.getSizeInBits() == ValueVT.getSizeInBits())
Wesley Peckbf17cfa2010-11-23 03:31:01 +0000209 return DAG.getNode(ISD::BITCAST, DL, ValueVT, Val);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +0000210
Torok Edwinc23197a2009-07-14 16:55:14 +0000211 llvm_unreachable("Unknown mismatch!");
Dan Gohmanf0cbcd42008-09-03 16:12:24 +0000212 return SDValue();
213}
214
Chris Lattner3ac18842010-08-24 23:20:40 +0000215/// getCopyFromParts - Create a value that contains the specified legal parts
216/// combined into the value they represent. If the parts combine to a type
217/// larger then ValueVT then AssertOp can be used to specify whether the extra
218/// bits are known to be zero (ISD::AssertZext) or sign extended from ValueVT
219/// (ISD::AssertSext).
220static SDValue getCopyFromPartsVector(SelectionDAG &DAG, DebugLoc DL,
221 const SDValue *Parts, unsigned NumParts,
222 EVT PartVT, EVT ValueVT) {
223 assert(ValueVT.isVector() && "Not a vector value");
224 assert(NumParts > 0 && "No parts to assemble!");
225 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
226 SDValue Val = Parts[0];
Michael J. Spencere70c5262010-10-16 08:25:21 +0000227
Chris Lattner3ac18842010-08-24 23:20:40 +0000228 // Handle a multi-element vector.
229 if (NumParts > 1) {
230 EVT IntermediateVT, RegisterVT;
231 unsigned NumIntermediates;
232 unsigned NumRegs =
233 TLI.getVectorTypeBreakdown(*DAG.getContext(), ValueVT, IntermediateVT,
234 NumIntermediates, RegisterVT);
235 assert(NumRegs == NumParts && "Part count doesn't match vector breakdown!");
236 NumParts = NumRegs; // Silence a compiler warning.
237 assert(RegisterVT == PartVT && "Part type doesn't match vector breakdown!");
238 assert(RegisterVT == Parts[0].getValueType() &&
239 "Part type doesn't match part!");
Michael J. Spencere70c5262010-10-16 08:25:21 +0000240
Chris Lattner3ac18842010-08-24 23:20:40 +0000241 // Assemble the parts into intermediate operands.
242 SmallVector<SDValue, 8> Ops(NumIntermediates);
243 if (NumIntermediates == NumParts) {
244 // If the register was not expanded, truncate or copy the value,
245 // as appropriate.
246 for (unsigned i = 0; i != NumParts; ++i)
247 Ops[i] = getCopyFromParts(DAG, DL, &Parts[i], 1,
248 PartVT, IntermediateVT);
249 } else if (NumParts > 0) {
250 // If the intermediate type was expanded, build the intermediate
251 // operands from the parts.
252 assert(NumParts % NumIntermediates == 0 &&
253 "Must expand into a divisible number of parts!");
254 unsigned Factor = NumParts / NumIntermediates;
255 for (unsigned i = 0; i != NumIntermediates; ++i)
256 Ops[i] = getCopyFromParts(DAG, DL, &Parts[i * Factor], Factor,
257 PartVT, IntermediateVT);
258 }
Michael J. Spencere70c5262010-10-16 08:25:21 +0000259
Chris Lattner3ac18842010-08-24 23:20:40 +0000260 // Build a vector with BUILD_VECTOR or CONCAT_VECTORS from the
261 // intermediate operands.
262 Val = DAG.getNode(IntermediateVT.isVector() ?
263 ISD::CONCAT_VECTORS : ISD::BUILD_VECTOR, DL,
264 ValueVT, &Ops[0], NumIntermediates);
265 }
Michael J. Spencere70c5262010-10-16 08:25:21 +0000266
Chris Lattner3ac18842010-08-24 23:20:40 +0000267 // There is now one part, held in Val. Correct it to match ValueVT.
268 PartVT = Val.getValueType();
Michael J. Spencere70c5262010-10-16 08:25:21 +0000269
Chris Lattner3ac18842010-08-24 23:20:40 +0000270 if (PartVT == ValueVT)
271 return Val;
Michael J. Spencere70c5262010-10-16 08:25:21 +0000272
Chris Lattnere6f7c262010-08-25 22:49:25 +0000273 if (PartVT.isVector()) {
274 // If the element type of the source/dest vectors are the same, but the
275 // parts vector has more elements than the value vector, then we have a
276 // vector widening case (e.g. <2 x float> -> <4 x float>). Extract the
277 // elements we want.
278 if (PartVT.getVectorElementType() == ValueVT.getVectorElementType()) {
279 assert(PartVT.getVectorNumElements() > ValueVT.getVectorNumElements() &&
280 "Cannot narrow, it would be a lossy transformation");
281 return DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, ValueVT, Val,
282 DAG.getIntPtrConstant(0));
Michael J. Spencere70c5262010-10-16 08:25:21 +0000283 }
284
Chris Lattnere6f7c262010-08-25 22:49:25 +0000285 // Vector/Vector bitcast.
Wesley Peckbf17cfa2010-11-23 03:31:01 +0000286 return DAG.getNode(ISD::BITCAST, DL, ValueVT, Val);
Chris Lattnere6f7c262010-08-25 22:49:25 +0000287 }
Michael J. Spencere70c5262010-10-16 08:25:21 +0000288
Chris Lattner3ac18842010-08-24 23:20:40 +0000289 assert(ValueVT.getVectorElementType() == PartVT &&
290 ValueVT.getVectorNumElements() == 1 &&
291 "Only trivial scalar-to-vector conversions should get here!");
292 return DAG.getNode(ISD::BUILD_VECTOR, DL, ValueVT, Val);
293}
294
295
296
Chris Lattnera13b8602010-08-24 23:10:06 +0000297
298static void getCopyToPartsVector(SelectionDAG &DAG, DebugLoc dl,
299 SDValue Val, SDValue *Parts, unsigned NumParts,
300 EVT PartVT);
Michael J. Spencere70c5262010-10-16 08:25:21 +0000301
Dan Gohmanf0cbcd42008-09-03 16:12:24 +0000302/// getCopyToParts - Create a series of nodes that contain the specified value
303/// split into legal parts. If the parts contain more bits than Val, then, for
304/// integers, ExtendKind can be used to specify how to generate the extra bits.
Chris Lattnera13b8602010-08-24 23:10:06 +0000305static void getCopyToParts(SelectionDAG &DAG, DebugLoc DL,
Bill Wendling3ea3c242009-12-22 02:10:19 +0000306 SDValue Val, SDValue *Parts, unsigned NumParts,
307 EVT PartVT,
Dan Gohmanf0cbcd42008-09-03 16:12:24 +0000308 ISD::NodeType ExtendKind = ISD::ANY_EXTEND) {
Owen Andersone50ed302009-08-10 22:56:29 +0000309 EVT ValueVT = Val.getValueType();
Michael J. Spencere70c5262010-10-16 08:25:21 +0000310
Chris Lattnera13b8602010-08-24 23:10:06 +0000311 // Handle the vector case separately.
312 if (ValueVT.isVector())
313 return getCopyToPartsVector(DAG, DL, Val, Parts, NumParts, PartVT);
Michael J. Spencere70c5262010-10-16 08:25:21 +0000314
Chris Lattnera13b8602010-08-24 23:10:06 +0000315 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
Dan Gohmanf0cbcd42008-09-03 16:12:24 +0000316 unsigned PartBits = PartVT.getSizeInBits();
Dale Johannesen8a36f502009-02-25 22:39:13 +0000317 unsigned OrigNumParts = NumParts;
Dan Gohmanf0cbcd42008-09-03 16:12:24 +0000318 assert(TLI.isTypeLegal(PartVT) && "Copying to an illegal type!");
319
Chris Lattnera13b8602010-08-24 23:10:06 +0000320 if (NumParts == 0)
Dan Gohmanf0cbcd42008-09-03 16:12:24 +0000321 return;
322
Chris Lattnera13b8602010-08-24 23:10:06 +0000323 assert(!ValueVT.isVector() && "Vector case handled elsewhere");
324 if (PartVT == ValueVT) {
325 assert(NumParts == 1 && "No-op copy with multiple parts!");
Dan Gohmanf0cbcd42008-09-03 16:12:24 +0000326 Parts[0] = Val;
327 return;
328 }
329
Chris Lattnera13b8602010-08-24 23:10:06 +0000330 if (NumParts * PartBits > ValueVT.getSizeInBits()) {
331 // If the parts cover more bits than the value has, promote the value.
332 if (PartVT.isFloatingPoint() && ValueVT.isFloatingPoint()) {
333 assert(NumParts == 1 && "Do not know what to promote to!");
334 Val = DAG.getNode(ISD::FP_EXTEND, DL, PartVT, Val);
335 } else {
336 assert(PartVT.isInteger() && ValueVT.isInteger() &&
Michael J. Spencere70c5262010-10-16 08:25:21 +0000337 "Unknown mismatch!");
Chris Lattnera13b8602010-08-24 23:10:06 +0000338 ValueVT = EVT::getIntegerVT(*DAG.getContext(), NumParts * PartBits);
339 Val = DAG.getNode(ExtendKind, DL, ValueVT, Val);
340 }
341 } else if (PartBits == ValueVT.getSizeInBits()) {
342 // Different types of the same size.
343 assert(NumParts == 1 && PartVT != ValueVT);
Wesley Peckbf17cfa2010-11-23 03:31:01 +0000344 Val = DAG.getNode(ISD::BITCAST, DL, PartVT, Val);
Chris Lattnera13b8602010-08-24 23:10:06 +0000345 } else if (NumParts * PartBits < ValueVT.getSizeInBits()) {
346 // If the parts cover less bits than value has, truncate the value.
347 assert(PartVT.isInteger() && ValueVT.isInteger() &&
348 "Unknown mismatch!");
349 ValueVT = EVT::getIntegerVT(*DAG.getContext(), NumParts * PartBits);
350 Val = DAG.getNode(ISD::TRUNCATE, DL, ValueVT, Val);
351 }
352
353 // The value may have changed - recompute ValueVT.
354 ValueVT = Val.getValueType();
355 assert(NumParts * PartBits == ValueVT.getSizeInBits() &&
356 "Failed to tile the value with PartVT!");
357
358 if (NumParts == 1) {
359 assert(PartVT == ValueVT && "Type conversion failed!");
360 Parts[0] = Val;
361 return;
362 }
363
364 // Expand the value into multiple parts.
365 if (NumParts & (NumParts - 1)) {
366 // The number of parts is not a power of 2. Split off and copy the tail.
367 assert(PartVT.isInteger() && ValueVT.isInteger() &&
368 "Do not know what to expand to!");
369 unsigned RoundParts = 1 << Log2_32(NumParts);
370 unsigned RoundBits = RoundParts * PartBits;
371 unsigned OddParts = NumParts - RoundParts;
372 SDValue OddVal = DAG.getNode(ISD::SRL, DL, ValueVT, Val,
373 DAG.getIntPtrConstant(RoundBits));
374 getCopyToParts(DAG, DL, OddVal, Parts + RoundParts, OddParts, PartVT);
375
376 if (TLI.isBigEndian())
377 // The odd parts were reversed by getCopyToParts - unreverse them.
378 std::reverse(Parts + RoundParts, Parts + NumParts);
379
380 NumParts = RoundParts;
381 ValueVT = EVT::getIntegerVT(*DAG.getContext(), NumParts * PartBits);
382 Val = DAG.getNode(ISD::TRUNCATE, DL, ValueVT, Val);
383 }
384
385 // The number of parts is a power of 2. Repeatedly bisect the value using
386 // EXTRACT_ELEMENT.
Wesley Peckbf17cfa2010-11-23 03:31:01 +0000387 Parts[0] = DAG.getNode(ISD::BITCAST, DL,
Chris Lattnera13b8602010-08-24 23:10:06 +0000388 EVT::getIntegerVT(*DAG.getContext(),
389 ValueVT.getSizeInBits()),
390 Val);
391
392 for (unsigned StepSize = NumParts; StepSize > 1; StepSize /= 2) {
393 for (unsigned i = 0; i < NumParts; i += StepSize) {
394 unsigned ThisBits = StepSize * PartBits / 2;
395 EVT ThisVT = EVT::getIntegerVT(*DAG.getContext(), ThisBits);
396 SDValue &Part0 = Parts[i];
397 SDValue &Part1 = Parts[i+StepSize/2];
398
399 Part1 = DAG.getNode(ISD::EXTRACT_ELEMENT, DL,
400 ThisVT, Part0, DAG.getIntPtrConstant(1));
401 Part0 = DAG.getNode(ISD::EXTRACT_ELEMENT, DL,
402 ThisVT, Part0, DAG.getIntPtrConstant(0));
403
404 if (ThisBits == PartBits && ThisVT != PartVT) {
Wesley Peckbf17cfa2010-11-23 03:31:01 +0000405 Part0 = DAG.getNode(ISD::BITCAST, DL, PartVT, Part0);
406 Part1 = DAG.getNode(ISD::BITCAST, DL, PartVT, Part1);
Chris Lattnera13b8602010-08-24 23:10:06 +0000407 }
408 }
409 }
410
411 if (TLI.isBigEndian())
412 std::reverse(Parts, Parts + OrigNumParts);
413}
414
415
416/// getCopyToPartsVector - Create a series of nodes that contain the specified
417/// value split into legal parts.
418static void getCopyToPartsVector(SelectionDAG &DAG, DebugLoc DL,
419 SDValue Val, SDValue *Parts, unsigned NumParts,
420 EVT PartVT) {
421 EVT ValueVT = Val.getValueType();
422 assert(ValueVT.isVector() && "Not a vector");
423 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
Michael J. Spencere70c5262010-10-16 08:25:21 +0000424
Chris Lattnera13b8602010-08-24 23:10:06 +0000425 if (NumParts == 1) {
Chris Lattnere6f7c262010-08-25 22:49:25 +0000426 if (PartVT == ValueVT) {
427 // Nothing to do.
428 } else if (PartVT.getSizeInBits() == ValueVT.getSizeInBits()) {
429 // Bitconvert vector->vector case.
Wesley Peckbf17cfa2010-11-23 03:31:01 +0000430 Val = DAG.getNode(ISD::BITCAST, DL, PartVT, Val);
Chris Lattnere6f7c262010-08-25 22:49:25 +0000431 } else if (PartVT.isVector() &&
432 PartVT.getVectorElementType() == ValueVT.getVectorElementType()&&
433 PartVT.getVectorNumElements() > ValueVT.getVectorNumElements()) {
434 EVT ElementVT = PartVT.getVectorElementType();
435 // Vector widening case, e.g. <2 x float> -> <4 x float>. Shuffle in
436 // undef elements.
437 SmallVector<SDValue, 16> Ops;
438 for (unsigned i = 0, e = ValueVT.getVectorNumElements(); i != e; ++i)
439 Ops.push_back(DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL,
440 ElementVT, Val, DAG.getIntPtrConstant(i)));
Michael J. Spencere70c5262010-10-16 08:25:21 +0000441
Chris Lattnere6f7c262010-08-25 22:49:25 +0000442 for (unsigned i = ValueVT.getVectorNumElements(),
443 e = PartVT.getVectorNumElements(); i != e; ++i)
444 Ops.push_back(DAG.getUNDEF(ElementVT));
445
446 Val = DAG.getNode(ISD::BUILD_VECTOR, DL, PartVT, &Ops[0], Ops.size());
447
448 // FIXME: Use CONCAT for 2x -> 4x.
Michael J. Spencere70c5262010-10-16 08:25:21 +0000449
Chris Lattnere6f7c262010-08-25 22:49:25 +0000450 //SDValue UndefElts = DAG.getUNDEF(VectorTy);
451 //Val = DAG.getNode(ISD::CONCAT_VECTORS, DL, PartVT, Val, UndefElts);
452 } else {
453 // Vector -> scalar conversion.
454 assert(ValueVT.getVectorElementType() == PartVT &&
455 ValueVT.getVectorNumElements() == 1 &&
456 "Only trivial vector-to-scalar conversions should get here!");
457 Val = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL,
458 PartVT, Val, DAG.getIntPtrConstant(0));
Chris Lattnera13b8602010-08-24 23:10:06 +0000459 }
Michael J. Spencere70c5262010-10-16 08:25:21 +0000460
Chris Lattnera13b8602010-08-24 23:10:06 +0000461 Parts[0] = Val;
462 return;
463 }
Michael J. Spencere70c5262010-10-16 08:25:21 +0000464
Dan Gohmanf0cbcd42008-09-03 16:12:24 +0000465 // Handle a multi-element vector.
Owen Andersone50ed302009-08-10 22:56:29 +0000466 EVT IntermediateVT, RegisterVT;
Dan Gohmanf0cbcd42008-09-03 16:12:24 +0000467 unsigned NumIntermediates;
Owen Anderson23b9b192009-08-12 00:36:31 +0000468 unsigned NumRegs = TLI.getVectorTypeBreakdown(*DAG.getContext(), ValueVT,
Devang Patel8f09bea2010-08-26 20:32:32 +0000469 IntermediateVT,
470 NumIntermediates, RegisterVT);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +0000471 unsigned NumElements = ValueVT.getVectorNumElements();
Michael J. Spencere70c5262010-10-16 08:25:21 +0000472
Dan Gohmanf0cbcd42008-09-03 16:12:24 +0000473 assert(NumRegs == NumParts && "Part count doesn't match vector breakdown!");
474 NumParts = NumRegs; // Silence a compiler warning.
475 assert(RegisterVT == PartVT && "Part type doesn't match vector breakdown!");
Michael J. Spencere70c5262010-10-16 08:25:21 +0000476
Dan Gohmanf0cbcd42008-09-03 16:12:24 +0000477 // Split the vector into intermediate operands.
478 SmallVector<SDValue, 8> Ops(NumIntermediates);
Bill Wendling3ea3c242009-12-22 02:10:19 +0000479 for (unsigned i = 0; i != NumIntermediates; ++i) {
Dan Gohmanf0cbcd42008-09-03 16:12:24 +0000480 if (IntermediateVT.isVector())
Chris Lattnera13b8602010-08-24 23:10:06 +0000481 Ops[i] = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL,
Dan Gohmanf0cbcd42008-09-03 16:12:24 +0000482 IntermediateVT, Val,
Chris Lattnera13b8602010-08-24 23:10:06 +0000483 DAG.getIntPtrConstant(i * (NumElements / NumIntermediates)));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +0000484 else
Chris Lattnera13b8602010-08-24 23:10:06 +0000485 Ops[i] = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL,
Chris Lattnere6f7c262010-08-25 22:49:25 +0000486 IntermediateVT, Val, DAG.getIntPtrConstant(i));
Bill Wendling3ea3c242009-12-22 02:10:19 +0000487 }
Michael J. Spencere70c5262010-10-16 08:25:21 +0000488
Dan Gohmanf0cbcd42008-09-03 16:12:24 +0000489 // Split the intermediate operands into legal parts.
490 if (NumParts == NumIntermediates) {
491 // If the register was not expanded, promote or copy the value,
492 // as appropriate.
493 for (unsigned i = 0; i != NumParts; ++i)
Chris Lattnera13b8602010-08-24 23:10:06 +0000494 getCopyToParts(DAG, DL, Ops[i], &Parts[i], 1, PartVT);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +0000495 } else if (NumParts > 0) {
496 // If the intermediate type was expanded, split each the value into
497 // legal parts.
498 assert(NumParts % NumIntermediates == 0 &&
499 "Must expand into a divisible number of parts!");
500 unsigned Factor = NumParts / NumIntermediates;
501 for (unsigned i = 0; i != NumIntermediates; ++i)
Chris Lattnera13b8602010-08-24 23:10:06 +0000502 getCopyToParts(DAG, DL, Ops[i], &Parts[i*Factor], Factor, PartVT);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +0000503 }
504}
505
Chris Lattnera13b8602010-08-24 23:10:06 +0000506
507
508
Dan Gohman462f6b52010-05-29 17:53:24 +0000509namespace {
510 /// RegsForValue - This struct represents the registers (physical or virtual)
511 /// that a particular set of values is assigned, and the type information
512 /// about the value. The most common situation is to represent one value at a
513 /// time, but struct or array values are handled element-wise as multiple
514 /// values. The splitting of aggregates is performed recursively, so that we
515 /// never have aggregate-typed registers. The values at this point do not
516 /// necessarily have legal types, so each value may require one or more
517 /// registers of some legal type.
518 ///
519 struct RegsForValue {
520 /// ValueVTs - The value types of the values, which may not be legal, and
521 /// may need be promoted or synthesized from one or more registers.
522 ///
523 SmallVector<EVT, 4> ValueVTs;
524
525 /// RegVTs - The value types of the registers. This is the same size as
526 /// ValueVTs and it records, for each value, what the type of the assigned
527 /// register or registers are. (Individual values are never synthesized
528 /// from more than one type of register.)
529 ///
530 /// With virtual registers, the contents of RegVTs is redundant with TLI's
531 /// getRegisterType member function, however when with physical registers
532 /// it is necessary to have a separate record of the types.
533 ///
534 SmallVector<EVT, 4> RegVTs;
535
536 /// Regs - This list holds the registers assigned to the values.
537 /// Each legal or promoted value requires one register, and each
538 /// expanded value requires multiple registers.
539 ///
540 SmallVector<unsigned, 4> Regs;
541
542 RegsForValue() {}
543
544 RegsForValue(const SmallVector<unsigned, 4> &regs,
545 EVT regvt, EVT valuevt)
546 : ValueVTs(1, valuevt), RegVTs(1, regvt), Regs(regs) {}
547
Dan Gohman462f6b52010-05-29 17:53:24 +0000548 RegsForValue(LLVMContext &Context, const TargetLowering &tli,
549 unsigned Reg, const Type *Ty) {
550 ComputeValueVTs(tli, Ty, ValueVTs);
551
552 for (unsigned Value = 0, e = ValueVTs.size(); Value != e; ++Value) {
553 EVT ValueVT = ValueVTs[Value];
554 unsigned NumRegs = tli.getNumRegisters(Context, ValueVT);
555 EVT RegisterVT = tli.getRegisterType(Context, ValueVT);
556 for (unsigned i = 0; i != NumRegs; ++i)
557 Regs.push_back(Reg + i);
558 RegVTs.push_back(RegisterVT);
559 Reg += NumRegs;
560 }
561 }
562
563 /// areValueTypesLegal - Return true if types of all the values are legal.
564 bool areValueTypesLegal(const TargetLowering &TLI) {
565 for (unsigned Value = 0, e = ValueVTs.size(); Value != e; ++Value) {
566 EVT RegisterVT = RegVTs[Value];
567 if (!TLI.isTypeLegal(RegisterVT))
568 return false;
569 }
570 return true;
571 }
572
573 /// append - Add the specified values to this one.
574 void append(const RegsForValue &RHS) {
575 ValueVTs.append(RHS.ValueVTs.begin(), RHS.ValueVTs.end());
576 RegVTs.append(RHS.RegVTs.begin(), RHS.RegVTs.end());
577 Regs.append(RHS.Regs.begin(), RHS.Regs.end());
578 }
579
580 /// getCopyFromRegs - Emit a series of CopyFromReg nodes that copies from
581 /// this value and returns the result as a ValueVTs value. This uses
582 /// Chain/Flag as the input and updates them for the output Chain/Flag.
583 /// If the Flag pointer is NULL, no flag is used.
584 SDValue getCopyFromRegs(SelectionDAG &DAG, FunctionLoweringInfo &FuncInfo,
585 DebugLoc dl,
586 SDValue &Chain, SDValue *Flag) const;
587
588 /// getCopyToRegs - Emit a series of CopyToReg nodes that copies the
589 /// specified value into the registers specified by this object. This uses
590 /// Chain/Flag as the input and updates them for the output Chain/Flag.
591 /// If the Flag pointer is NULL, no flag is used.
592 void getCopyToRegs(SDValue Val, SelectionDAG &DAG, DebugLoc dl,
593 SDValue &Chain, SDValue *Flag) const;
594
595 /// AddInlineAsmOperands - Add this value to the specified inlineasm node
596 /// operand list. This adds the code marker, matching input operand index
597 /// (if applicable), and includes the number of values added into it.
598 void AddInlineAsmOperands(unsigned Kind,
599 bool HasMatching, unsigned MatchingIdx,
600 SelectionDAG &DAG,
601 std::vector<SDValue> &Ops) const;
602 };
603}
604
605/// getCopyFromRegs - Emit a series of CopyFromReg nodes that copies from
606/// this value and returns the result as a ValueVT value. This uses
607/// Chain/Flag as the input and updates them for the output Chain/Flag.
608/// If the Flag pointer is NULL, no flag is used.
609SDValue RegsForValue::getCopyFromRegs(SelectionDAG &DAG,
610 FunctionLoweringInfo &FuncInfo,
611 DebugLoc dl,
612 SDValue &Chain, SDValue *Flag) const {
Dan Gohman7da5d3f2010-07-26 18:15:41 +0000613 // A Value with type {} or [0 x %t] needs no registers.
614 if (ValueVTs.empty())
615 return SDValue();
616
Dan Gohman462f6b52010-05-29 17:53:24 +0000617 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
618
619 // Assemble the legal parts into the final values.
620 SmallVector<SDValue, 4> Values(ValueVTs.size());
621 SmallVector<SDValue, 8> Parts;
622 for (unsigned Value = 0, Part = 0, e = ValueVTs.size(); Value != e; ++Value) {
623 // Copy the legal parts from the registers.
624 EVT ValueVT = ValueVTs[Value];
625 unsigned NumRegs = TLI.getNumRegisters(*DAG.getContext(), ValueVT);
626 EVT RegisterVT = RegVTs[Value];
627
628 Parts.resize(NumRegs);
629 for (unsigned i = 0; i != NumRegs; ++i) {
630 SDValue P;
631 if (Flag == 0) {
632 P = DAG.getCopyFromReg(Chain, dl, Regs[Part+i], RegisterVT);
633 } else {
634 P = DAG.getCopyFromReg(Chain, dl, Regs[Part+i], RegisterVT, *Flag);
635 *Flag = P.getValue(2);
636 }
637
638 Chain = P.getValue(1);
Chris Lattnerd5b4db92010-12-13 01:11:17 +0000639 Parts[i] = P;
Dan Gohman462f6b52010-05-29 17:53:24 +0000640
641 // If the source register was virtual and if we know something about it,
642 // add an assert node.
Chris Lattnerd5b4db92010-12-13 01:11:17 +0000643 if (!TargetRegisterInfo::isVirtualRegister(Regs[Part+i]) ||
Jakob Stoklund Olesen358de242011-01-08 23:10:50 +0000644 !RegisterVT.isInteger() || RegisterVT.isVector() ||
645 !FuncInfo.LiveOutRegInfo.inBounds(Regs[Part+i]))
Chris Lattnerd5b4db92010-12-13 01:11:17 +0000646 continue;
647
Chris Lattnerd5b4db92010-12-13 01:11:17 +0000648 const FunctionLoweringInfo::LiveOutInfo &LOI =
Jakob Stoklund Olesen358de242011-01-08 23:10:50 +0000649 FuncInfo.LiveOutRegInfo[Regs[Part+i]];
Dan Gohman462f6b52010-05-29 17:53:24 +0000650
Chris Lattnerd5b4db92010-12-13 01:11:17 +0000651 unsigned RegSize = RegisterVT.getSizeInBits();
652 unsigned NumSignBits = LOI.NumSignBits;
653 unsigned NumZeroBits = LOI.KnownZero.countLeadingOnes();
Dan Gohman462f6b52010-05-29 17:53:24 +0000654
Chris Lattnerd5b4db92010-12-13 01:11:17 +0000655 // FIXME: We capture more information than the dag can represent. For
656 // now, just use the tightest assertzext/assertsext possible.
657 bool isSExt = true;
658 EVT FromVT(MVT::Other);
659 if (NumSignBits == RegSize)
660 isSExt = true, FromVT = MVT::i1; // ASSERT SEXT 1
661 else if (NumZeroBits >= RegSize-1)
662 isSExt = false, FromVT = MVT::i1; // ASSERT ZEXT 1
663 else if (NumSignBits > RegSize-8)
664 isSExt = true, FromVT = MVT::i8; // ASSERT SEXT 8
665 else if (NumZeroBits >= RegSize-8)
666 isSExt = false, FromVT = MVT::i8; // ASSERT ZEXT 8
667 else if (NumSignBits > RegSize-16)
668 isSExt = true, FromVT = MVT::i16; // ASSERT SEXT 16
669 else if (NumZeroBits >= RegSize-16)
670 isSExt = false, FromVT = MVT::i16; // ASSERT ZEXT 16
671 else if (NumSignBits > RegSize-32)
672 isSExt = true, FromVT = MVT::i32; // ASSERT SEXT 32
673 else if (NumZeroBits >= RegSize-32)
674 isSExt = false, FromVT = MVT::i32; // ASSERT ZEXT 32
675 else
676 continue;
Dan Gohman462f6b52010-05-29 17:53:24 +0000677
Chris Lattnerd5b4db92010-12-13 01:11:17 +0000678 // Add an assertion node.
679 assert(FromVT != MVT::Other);
680 Parts[i] = DAG.getNode(isSExt ? ISD::AssertSext : ISD::AssertZext, dl,
681 RegisterVT, P, DAG.getValueType(FromVT));
Dan Gohman462f6b52010-05-29 17:53:24 +0000682 }
683
684 Values[Value] = getCopyFromParts(DAG, dl, Parts.begin(),
685 NumRegs, RegisterVT, ValueVT);
686 Part += NumRegs;
687 Parts.clear();
688 }
689
690 return DAG.getNode(ISD::MERGE_VALUES, dl,
691 DAG.getVTList(&ValueVTs[0], ValueVTs.size()),
692 &Values[0], ValueVTs.size());
693}
694
695/// getCopyToRegs - Emit a series of CopyToReg nodes that copies the
696/// specified value into the registers specified by this object. This uses
697/// Chain/Flag as the input and updates them for the output Chain/Flag.
698/// If the Flag pointer is NULL, no flag is used.
699void RegsForValue::getCopyToRegs(SDValue Val, SelectionDAG &DAG, DebugLoc dl,
700 SDValue &Chain, SDValue *Flag) const {
701 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
702
703 // Get the list of the values's legal parts.
704 unsigned NumRegs = Regs.size();
705 SmallVector<SDValue, 8> Parts(NumRegs);
706 for (unsigned Value = 0, Part = 0, e = ValueVTs.size(); Value != e; ++Value) {
707 EVT ValueVT = ValueVTs[Value];
708 unsigned NumParts = TLI.getNumRegisters(*DAG.getContext(), ValueVT);
709 EVT RegisterVT = RegVTs[Value];
710
Chris Lattner3ac18842010-08-24 23:20:40 +0000711 getCopyToParts(DAG, dl, Val.getValue(Val.getResNo() + Value),
Dan Gohman462f6b52010-05-29 17:53:24 +0000712 &Parts[Part], NumParts, RegisterVT);
713 Part += NumParts;
714 }
715
716 // Copy the parts into the registers.
717 SmallVector<SDValue, 8> Chains(NumRegs);
718 for (unsigned i = 0; i != NumRegs; ++i) {
719 SDValue Part;
720 if (Flag == 0) {
721 Part = DAG.getCopyToReg(Chain, dl, Regs[i], Parts[i]);
722 } else {
723 Part = DAG.getCopyToReg(Chain, dl, Regs[i], Parts[i], *Flag);
724 *Flag = Part.getValue(1);
725 }
726
727 Chains[i] = Part.getValue(0);
728 }
729
730 if (NumRegs == 1 || Flag)
731 // If NumRegs > 1 && Flag is used then the use of the last CopyToReg is
732 // flagged to it. That is the CopyToReg nodes and the user are considered
733 // a single scheduling unit. If we create a TokenFactor and return it as
734 // chain, then the TokenFactor is both a predecessor (operand) of the
735 // user as well as a successor (the TF operands are flagged to the user).
736 // c1, f1 = CopyToReg
737 // c2, f2 = CopyToReg
738 // c3 = TokenFactor c1, c2
739 // ...
740 // = op c3, ..., f2
741 Chain = Chains[NumRegs-1];
742 else
743 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, &Chains[0], NumRegs);
744}
745
746/// AddInlineAsmOperands - Add this value to the specified inlineasm node
747/// operand list. This adds the code marker and includes the number of
748/// values added into it.
749void RegsForValue::AddInlineAsmOperands(unsigned Code, bool HasMatching,
750 unsigned MatchingIdx,
751 SelectionDAG &DAG,
752 std::vector<SDValue> &Ops) const {
753 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
754
755 unsigned Flag = InlineAsm::getFlagWord(Code, Regs.size());
756 if (HasMatching)
757 Flag = InlineAsm::getFlagWordForMatchingOp(Flag, MatchingIdx);
758 SDValue Res = DAG.getTargetConstant(Flag, MVT::i32);
759 Ops.push_back(Res);
760
761 for (unsigned Value = 0, Reg = 0, e = ValueVTs.size(); Value != e; ++Value) {
762 unsigned NumRegs = TLI.getNumRegisters(*DAG.getContext(), ValueVTs[Value]);
763 EVT RegisterVT = RegVTs[Value];
764 for (unsigned i = 0; i != NumRegs; ++i) {
765 assert(Reg < Regs.size() && "Mismatch in # registers expected");
766 Ops.push_back(DAG.getRegister(Regs[Reg++], RegisterVT));
767 }
768 }
769}
Dan Gohmanf0cbcd42008-09-03 16:12:24 +0000770
Dan Gohman2048b852009-11-23 18:04:58 +0000771void SelectionDAGBuilder::init(GCFunctionInfo *gfi, AliasAnalysis &aa) {
Dan Gohmanf0cbcd42008-09-03 16:12:24 +0000772 AA = &aa;
773 GFI = gfi;
774 TD = DAG.getTarget().getTargetData();
775}
776
Dan Gohmanb02b62a2010-04-14 18:24:06 +0000777/// clear - Clear out the current SelectionDAG and the associated
Dan Gohman2048b852009-11-23 18:04:58 +0000778/// state and prepare this SelectionDAGBuilder object to be used
Dan Gohmanf0cbcd42008-09-03 16:12:24 +0000779/// for a new block. This doesn't clear out information about
780/// additional blocks that are needed to complete switch lowering
781/// or PHI node updating; that information is cleared out as it is
782/// consumed.
Dan Gohman2048b852009-11-23 18:04:58 +0000783void SelectionDAGBuilder::clear() {
Dan Gohmanf0cbcd42008-09-03 16:12:24 +0000784 NodeMap.clear();
Devang Patel9126c0d2010-06-01 19:59:01 +0000785 UnusedArgNodeMap.clear();
Dan Gohmanf0cbcd42008-09-03 16:12:24 +0000786 PendingLoads.clear();
787 PendingExports.clear();
Dale Johannesenbdc09d92010-07-16 00:02:08 +0000788 DanglingDebugInfoMap.clear();
Chris Lattnera4f2bb02010-04-02 20:17:23 +0000789 CurDebugLoc = DebugLoc();
Dan Gohman98ca4f22009-08-05 01:29:28 +0000790 HasTailCall = false;
Dan Gohmanf0cbcd42008-09-03 16:12:24 +0000791}
792
793/// getRoot - Return the current virtual root of the Selection DAG,
794/// flushing any PendingLoad items. This must be done before emitting
795/// a store or any other node that may need to be ordered after any
796/// prior load instructions.
797///
Dan Gohman2048b852009-11-23 18:04:58 +0000798SDValue SelectionDAGBuilder::getRoot() {
Dan Gohmanf0cbcd42008-09-03 16:12:24 +0000799 if (PendingLoads.empty())
800 return DAG.getRoot();
801
802 if (PendingLoads.size() == 1) {
803 SDValue Root = PendingLoads[0];
804 DAG.setRoot(Root);
805 PendingLoads.clear();
806 return Root;
807 }
808
809 // Otherwise, we have to make a token factor node.
Owen Anderson825b72b2009-08-11 20:47:22 +0000810 SDValue Root = DAG.getNode(ISD::TokenFactor, getCurDebugLoc(), MVT::Other,
Dan Gohmanf0cbcd42008-09-03 16:12:24 +0000811 &PendingLoads[0], PendingLoads.size());
812 PendingLoads.clear();
813 DAG.setRoot(Root);
814 return Root;
815}
816
817/// getControlRoot - Similar to getRoot, but instead of flushing all the
818/// PendingLoad items, flush all the PendingExports items. It is necessary
819/// to do this before emitting a terminator instruction.
820///
Dan Gohman2048b852009-11-23 18:04:58 +0000821SDValue SelectionDAGBuilder::getControlRoot() {
Dan Gohmanf0cbcd42008-09-03 16:12:24 +0000822 SDValue Root = DAG.getRoot();
823
824 if (PendingExports.empty())
825 return Root;
826
827 // Turn all of the CopyToReg chains into one factored node.
828 if (Root.getOpcode() != ISD::EntryToken) {
829 unsigned i = 0, e = PendingExports.size();
830 for (; i != e; ++i) {
831 assert(PendingExports[i].getNode()->getNumOperands() > 1);
832 if (PendingExports[i].getNode()->getOperand(0) == Root)
833 break; // Don't add the root if we already indirectly depend on it.
834 }
835
836 if (i == e)
837 PendingExports.push_back(Root);
838 }
839
Owen Anderson825b72b2009-08-11 20:47:22 +0000840 Root = DAG.getNode(ISD::TokenFactor, getCurDebugLoc(), MVT::Other,
Dan Gohmanf0cbcd42008-09-03 16:12:24 +0000841 &PendingExports[0],
842 PendingExports.size());
843 PendingExports.clear();
844 DAG.setRoot(Root);
845 return Root;
846}
847
Bill Wendling4533cac2010-01-28 21:51:40 +0000848void SelectionDAGBuilder::AssignOrderingToNode(const SDNode *Node) {
849 if (DAG.GetOrdering(Node) != 0) return; // Already has ordering.
850 DAG.AssignOrdering(Node, SDNodeOrder);
851
852 for (unsigned I = 0, E = Node->getNumOperands(); I != E; ++I)
853 AssignOrderingToNode(Node->getOperand(I).getNode());
854}
855
Dan Gohman46510a72010-04-15 01:51:59 +0000856void SelectionDAGBuilder::visit(const Instruction &I) {
Dan Gohmanc105a2b2010-04-22 20:55:53 +0000857 // Set up outgoing PHI node register values before emitting the terminator.
858 if (isa<TerminatorInst>(&I))
859 HandlePHINodesInSuccessorBlocks(I.getParent());
860
Dan Gohman8ba3aa72010-04-20 00:48:35 +0000861 CurDebugLoc = I.getDebugLoc();
862
Dan Gohmanf0cbcd42008-09-03 16:12:24 +0000863 visit(I.getOpcode(), I);
Dan Gohman8ba3aa72010-04-20 00:48:35 +0000864
Dan Gohman92884f72010-04-20 15:03:56 +0000865 if (!isa<TerminatorInst>(&I) && !HasTailCall)
866 CopyToExportRegsIfNeeded(&I);
867
Dan Gohman8ba3aa72010-04-20 00:48:35 +0000868 CurDebugLoc = DebugLoc();
Dan Gohmanf0cbcd42008-09-03 16:12:24 +0000869}
870
Dan Gohmanba5be5c2010-04-20 15:00:41 +0000871void SelectionDAGBuilder::visitPHI(const PHINode &) {
872 llvm_unreachable("SelectionDAGBuilder shouldn't visit PHI nodes!");
873}
874
Dan Gohman46510a72010-04-15 01:51:59 +0000875void SelectionDAGBuilder::visit(unsigned Opcode, const User &I) {
Dan Gohmanf0cbcd42008-09-03 16:12:24 +0000876 // Note: this doesn't use InstVisitor, because it has to work with
877 // ConstantExpr's in addition to instructions.
878 switch (Opcode) {
Torok Edwinc23197a2009-07-14 16:55:14 +0000879 default: llvm_unreachable("Unknown instruction type encountered!");
Dan Gohmanf0cbcd42008-09-03 16:12:24 +0000880 // Build the switch statement using the Instruction.def file.
881#define HANDLE_INST(NUM, OPCODE, CLASS) \
Bill Wendling4533cac2010-01-28 21:51:40 +0000882 case Instruction::OPCODE: visit##OPCODE((CLASS&)I); break;
Dan Gohmanf0cbcd42008-09-03 16:12:24 +0000883#include "llvm/Instruction.def"
884 }
Bill Wendling4533cac2010-01-28 21:51:40 +0000885
886 // Assign the ordering to the freshly created DAG nodes.
887 if (NodeMap.count(&I)) {
888 ++SDNodeOrder;
889 AssignOrderingToNode(getValue(&I).getNode());
890 }
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +0000891}
Dan Gohmanf0cbcd42008-09-03 16:12:24 +0000892
Dale Johannesenbdc09d92010-07-16 00:02:08 +0000893// resolveDanglingDebugInfo - if we saw an earlier dbg_value referring to V,
894// generate the debug data structures now that we've seen its definition.
895void SelectionDAGBuilder::resolveDanglingDebugInfo(const Value *V,
896 SDValue Val) {
897 DanglingDebugInfo &DDI = DanglingDebugInfoMap[V];
Devang Patel4cf81c42010-08-26 23:35:15 +0000898 if (DDI.getDI()) {
899 const DbgValueInst *DI = DDI.getDI();
Dale Johannesenbdc09d92010-07-16 00:02:08 +0000900 DebugLoc dl = DDI.getdl();
901 unsigned DbgSDNodeOrder = DDI.getSDNodeOrder();
Devang Patel4cf81c42010-08-26 23:35:15 +0000902 MDNode *Variable = DI->getVariable();
903 uint64_t Offset = DI->getOffset();
Dale Johannesenbdc09d92010-07-16 00:02:08 +0000904 SDDbgValue *SDV;
905 if (Val.getNode()) {
Devang Patel78a06e52010-08-25 20:39:26 +0000906 if (!EmitFuncArgumentDbgValue(V, Variable, Offset, Val)) {
Dale Johannesenbdc09d92010-07-16 00:02:08 +0000907 SDV = DAG.getDbgValue(Variable, Val.getNode(),
908 Val.getResNo(), Offset, dl, DbgSDNodeOrder);
909 DAG.AddDbgValue(SDV, Val.getNode(), false);
910 }
Devang Patelafeaae72010-12-06 22:39:26 +0000911 } else
912 DEBUG(dbgs() << "Dropping debug info for " << DI);
Dale Johannesenbdc09d92010-07-16 00:02:08 +0000913 DanglingDebugInfoMap[V] = DanglingDebugInfo();
914 }
915}
916
Dan Gohman28a17352010-07-01 01:59:43 +0000917// getValue - Return an SDValue for the given Value.
Dan Gohman2048b852009-11-23 18:04:58 +0000918SDValue SelectionDAGBuilder::getValue(const Value *V) {
Dan Gohman28a17352010-07-01 01:59:43 +0000919 // If we already have an SDValue for this value, use it. It's important
920 // to do this first, so that we don't create a CopyFromReg if we already
921 // have a regular SDValue.
Dan Gohmanf0cbcd42008-09-03 16:12:24 +0000922 SDValue &N = NodeMap[V];
923 if (N.getNode()) return N;
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +0000924
Dan Gohman28a17352010-07-01 01:59:43 +0000925 // If there's a virtual register allocated and initialized for this
926 // value, use it.
927 DenseMap<const Value *, unsigned>::iterator It = FuncInfo.ValueMap.find(V);
928 if (It != FuncInfo.ValueMap.end()) {
929 unsigned InReg = It->second;
930 RegsForValue RFV(*DAG.getContext(), TLI, InReg, V->getType());
931 SDValue Chain = DAG.getEntryNode();
Devang Patel8f314282011-01-25 18:09:58 +0000932 N = RFV.getCopyFromRegs(DAG, FuncInfo, getCurDebugLoc(), Chain,NULL);
933 resolveDanglingDebugInfo(V, N);
934 return N;
Dan Gohman28a17352010-07-01 01:59:43 +0000935 }
936
937 // Otherwise create a new SDValue and remember it.
938 SDValue Val = getValueImpl(V);
939 NodeMap[V] = Val;
Dale Johannesenbdc09d92010-07-16 00:02:08 +0000940 resolveDanglingDebugInfo(V, Val);
Dan Gohman28a17352010-07-01 01:59:43 +0000941 return Val;
942}
943
944/// getNonRegisterValue - Return an SDValue for the given Value, but
945/// don't look in FuncInfo.ValueMap for a virtual register.
946SDValue SelectionDAGBuilder::getNonRegisterValue(const Value *V) {
947 // If we already have an SDValue for this value, use it.
948 SDValue &N = NodeMap[V];
949 if (N.getNode()) return N;
950
951 // Otherwise create a new SDValue and remember it.
952 SDValue Val = getValueImpl(V);
953 NodeMap[V] = Val;
Dale Johannesenbdc09d92010-07-16 00:02:08 +0000954 resolveDanglingDebugInfo(V, Val);
Dan Gohman28a17352010-07-01 01:59:43 +0000955 return Val;
956}
957
Dale Johannesenbdc09d92010-07-16 00:02:08 +0000958/// getValueImpl - Helper function for getValue and getNonRegisterValue.
Dan Gohman28a17352010-07-01 01:59:43 +0000959/// Create an SDValue for the given value.
960SDValue SelectionDAGBuilder::getValueImpl(const Value *V) {
Dan Gohman383b5f62010-04-17 15:32:28 +0000961 if (const Constant *C = dyn_cast<Constant>(V)) {
Owen Andersone50ed302009-08-10 22:56:29 +0000962 EVT VT = TLI.getValueType(V->getType(), true);
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +0000963
Dan Gohman383b5f62010-04-17 15:32:28 +0000964 if (const ConstantInt *CI = dyn_cast<ConstantInt>(C))
Dan Gohman28a17352010-07-01 01:59:43 +0000965 return DAG.getConstant(*CI, VT);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +0000966
Dan Gohman383b5f62010-04-17 15:32:28 +0000967 if (const GlobalValue *GV = dyn_cast<GlobalValue>(C))
Devang Patel0d881da2010-07-06 22:08:15 +0000968 return DAG.getGlobalAddress(GV, getCurDebugLoc(), VT);
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +0000969
Dan Gohmanf0cbcd42008-09-03 16:12:24 +0000970 if (isa<ConstantPointerNull>(C))
Dan Gohman28a17352010-07-01 01:59:43 +0000971 return DAG.getConstant(0, TLI.getPointerTy());
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +0000972
Dan Gohman383b5f62010-04-17 15:32:28 +0000973 if (const ConstantFP *CFP = dyn_cast<ConstantFP>(C))
Dan Gohman28a17352010-07-01 01:59:43 +0000974 return DAG.getConstantFP(*CFP, VT);
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +0000975
Nate Begeman9008ca62009-04-27 18:41:29 +0000976 if (isa<UndefValue>(C) && !V->getType()->isAggregateType())
Dan Gohman28a17352010-07-01 01:59:43 +0000977 return DAG.getUNDEF(VT);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +0000978
Dan Gohman383b5f62010-04-17 15:32:28 +0000979 if (const ConstantExpr *CE = dyn_cast<ConstantExpr>(C)) {
Dan Gohmanf0cbcd42008-09-03 16:12:24 +0000980 visit(CE->getOpcode(), *CE);
981 SDValue N1 = NodeMap[V];
Dan Gohmanac7d05c2010-04-16 16:55:18 +0000982 assert(N1.getNode() && "visit didn't populate the NodeMap!");
Dan Gohmanf0cbcd42008-09-03 16:12:24 +0000983 return N1;
984 }
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +0000985
Dan Gohmanf0cbcd42008-09-03 16:12:24 +0000986 if (isa<ConstantStruct>(C) || isa<ConstantArray>(C)) {
987 SmallVector<SDValue, 4> Constants;
988 for (User::const_op_iterator OI = C->op_begin(), OE = C->op_end();
989 OI != OE; ++OI) {
990 SDNode *Val = getValue(*OI).getNode();
Dan Gohmaned48caf2009-09-08 01:44:02 +0000991 // If the operand is an empty aggregate, there are no values.
992 if (!Val) continue;
993 // Add each leaf value from the operand to the Constants list
994 // to form a flattened list of all the values.
Dan Gohmanf0cbcd42008-09-03 16:12:24 +0000995 for (unsigned i = 0, e = Val->getNumValues(); i != e; ++i)
996 Constants.push_back(SDValue(Val, i));
997 }
Bill Wendling87710f02009-12-21 23:47:40 +0000998
Bill Wendling4533cac2010-01-28 21:51:40 +0000999 return DAG.getMergeValues(&Constants[0], Constants.size(),
1000 getCurDebugLoc());
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001001 }
1002
Duncan Sands1df98592010-02-16 11:11:14 +00001003 if (C->getType()->isStructTy() || C->getType()->isArrayTy()) {
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001004 assert((isa<ConstantAggregateZero>(C) || isa<UndefValue>(C)) &&
1005 "Unknown struct or array constant!");
1006
Owen Andersone50ed302009-08-10 22:56:29 +00001007 SmallVector<EVT, 4> ValueVTs;
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001008 ComputeValueVTs(TLI, C->getType(), ValueVTs);
1009 unsigned NumElts = ValueVTs.size();
1010 if (NumElts == 0)
1011 return SDValue(); // empty struct
1012 SmallVector<SDValue, 4> Constants(NumElts);
1013 for (unsigned i = 0; i != NumElts; ++i) {
Owen Andersone50ed302009-08-10 22:56:29 +00001014 EVT EltVT = ValueVTs[i];
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001015 if (isa<UndefValue>(C))
Dale Johannesene8d72302009-02-06 23:05:02 +00001016 Constants[i] = DAG.getUNDEF(EltVT);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001017 else if (EltVT.isFloatingPoint())
1018 Constants[i] = DAG.getConstantFP(0, EltVT);
1019 else
1020 Constants[i] = DAG.getConstant(0, EltVT);
1021 }
Bill Wendling87710f02009-12-21 23:47:40 +00001022
Bill Wendling4533cac2010-01-28 21:51:40 +00001023 return DAG.getMergeValues(&Constants[0], NumElts,
1024 getCurDebugLoc());
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001025 }
1026
Dan Gohman383b5f62010-04-17 15:32:28 +00001027 if (const BlockAddress *BA = dyn_cast<BlockAddress>(C))
Dan Gohman29cbade2009-11-20 23:18:13 +00001028 return DAG.getBlockAddress(BA, VT);
Dan Gohman8c2b5252009-10-30 01:27:03 +00001029
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001030 const VectorType *VecTy = cast<VectorType>(V->getType());
1031 unsigned NumElements = VecTy->getNumElements();
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00001032
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001033 // Now that we know the number and type of the elements, get that number of
1034 // elements into the Ops array based on what kind of constant it is.
1035 SmallVector<SDValue, 16> Ops;
Dan Gohman383b5f62010-04-17 15:32:28 +00001036 if (const ConstantVector *CP = dyn_cast<ConstantVector>(C)) {
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001037 for (unsigned i = 0; i != NumElements; ++i)
1038 Ops.push_back(getValue(CP->getOperand(i)));
1039 } else {
Nate Begeman9008ca62009-04-27 18:41:29 +00001040 assert(isa<ConstantAggregateZero>(C) && "Unknown vector constant!");
Owen Andersone50ed302009-08-10 22:56:29 +00001041 EVT EltVT = TLI.getValueType(VecTy->getElementType());
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001042
1043 SDValue Op;
Nate Begeman9008ca62009-04-27 18:41:29 +00001044 if (EltVT.isFloatingPoint())
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001045 Op = DAG.getConstantFP(0, EltVT);
1046 else
1047 Op = DAG.getConstant(0, EltVT);
1048 Ops.assign(NumElements, Op);
1049 }
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00001050
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001051 // Create a BUILD_VECTOR node.
Bill Wendling4533cac2010-01-28 21:51:40 +00001052 return NodeMap[V] = DAG.getNode(ISD::BUILD_VECTOR, getCurDebugLoc(),
1053 VT, &Ops[0], Ops.size());
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001054 }
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00001055
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001056 // If this is a static alloca, generate it as the frameindex instead of
1057 // computation.
1058 if (const AllocaInst *AI = dyn_cast<AllocaInst>(V)) {
1059 DenseMap<const AllocaInst*, int>::iterator SI =
1060 FuncInfo.StaticAllocaMap.find(AI);
1061 if (SI != FuncInfo.StaticAllocaMap.end())
1062 return DAG.getFrameIndex(SI->second, TLI.getPointerTy());
1063 }
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00001064
Dan Gohman28a17352010-07-01 01:59:43 +00001065 // If this is an instruction which fast-isel has deferred, select it now.
1066 if (const Instruction *Inst = dyn_cast<Instruction>(V)) {
Dan Gohman84023e02010-07-10 09:00:22 +00001067 unsigned InReg = FuncInfo.InitializeRegForValue(Inst);
1068 RegsForValue RFV(*DAG.getContext(), TLI, InReg, Inst->getType());
1069 SDValue Chain = DAG.getEntryNode();
1070 return RFV.getCopyFromRegs(DAG, FuncInfo, getCurDebugLoc(), Chain, NULL);
Dan Gohman28a17352010-07-01 01:59:43 +00001071 }
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00001072
Dan Gohman28a17352010-07-01 01:59:43 +00001073 llvm_unreachable("Can't get register for value!");
1074 return SDValue();
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001075}
1076
Dan Gohman46510a72010-04-15 01:51:59 +00001077void SelectionDAGBuilder::visitRet(const ReturnInst &I) {
Dan Gohman98ca4f22009-08-05 01:29:28 +00001078 SDValue Chain = getControlRoot();
1079 SmallVector<ISD::OutputArg, 8> Outs;
Dan Gohmanc9403652010-07-07 15:54:55 +00001080 SmallVector<SDValue, 8> OutVals;
Mikhail Glushenkovb3c01992010-01-01 04:41:22 +00001081
Dan Gohman7451d3e2010-05-29 17:03:36 +00001082 if (!FuncInfo.CanLowerReturn) {
1083 unsigned DemoteReg = FuncInfo.DemoteRegister;
Kenneth Uildriksc158dde2009-11-11 19:59:24 +00001084 const Function *F = I.getParent()->getParent();
1085
1086 // Emit a store of the return value through the virtual register.
1087 // Leave Outs empty so that LowerReturn won't try to load return
1088 // registers the usual way.
1089 SmallVector<EVT, 1> PtrValueVTs;
Mikhail Glushenkovb3c01992010-01-01 04:41:22 +00001090 ComputeValueVTs(TLI, PointerType::getUnqual(F->getReturnType()),
Kenneth Uildriksc158dde2009-11-11 19:59:24 +00001091 PtrValueVTs);
1092
1093 SDValue RetPtr = DAG.getRegister(DemoteReg, PtrValueVTs[0]);
1094 SDValue RetOp = getValue(I.getOperand(0));
Mikhail Glushenkovb3c01992010-01-01 04:41:22 +00001095
Owen Andersone50ed302009-08-10 22:56:29 +00001096 SmallVector<EVT, 4> ValueVTs;
Kenneth Uildriksc158dde2009-11-11 19:59:24 +00001097 SmallVector<uint64_t, 4> Offsets;
1098 ComputeValueVTs(TLI, I.getOperand(0)->getType(), ValueVTs, &Offsets);
Dan Gohman7ea1ca62008-10-21 20:00:42 +00001099 unsigned NumValues = ValueVTs.size();
Dan Gohman7ea1ca62008-10-21 20:00:42 +00001100
Kenneth Uildriksc158dde2009-11-11 19:59:24 +00001101 SmallVector<SDValue, 4> Chains(NumValues);
Bill Wendling87710f02009-12-21 23:47:40 +00001102 for (unsigned i = 0; i != NumValues; ++i) {
Chris Lattnera13b8602010-08-24 23:10:06 +00001103 SDValue Add = DAG.getNode(ISD::ADD, getCurDebugLoc(),
1104 RetPtr.getValueType(), RetPtr,
1105 DAG.getIntPtrConstant(Offsets[i]));
Bill Wendling87710f02009-12-21 23:47:40 +00001106 Chains[i] =
1107 DAG.getStore(Chain, getCurDebugLoc(),
1108 SDValue(RetOp.getNode(), RetOp.getResNo() + i),
Chris Lattner84bd98a2010-09-21 18:58:22 +00001109 // FIXME: better loc info would be nice.
1110 Add, MachinePointerInfo(), false, false, 0);
Bill Wendling87710f02009-12-21 23:47:40 +00001111 }
1112
Kenneth Uildriksc158dde2009-11-11 19:59:24 +00001113 Chain = DAG.getNode(ISD::TokenFactor, getCurDebugLoc(),
1114 MVT::Other, &Chains[0], NumValues);
Chris Lattner25d58372010-02-28 18:53:13 +00001115 } else if (I.getNumOperands() != 0) {
1116 SmallVector<EVT, 4> ValueVTs;
1117 ComputeValueVTs(TLI, I.getOperand(0)->getType(), ValueVTs);
1118 unsigned NumValues = ValueVTs.size();
1119 if (NumValues) {
1120 SDValue RetOp = getValue(I.getOperand(0));
Kenneth Uildriksc158dde2009-11-11 19:59:24 +00001121 for (unsigned j = 0, f = NumValues; j != f; ++j) {
1122 EVT VT = ValueVTs[j];
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001123
Kenneth Uildriksc158dde2009-11-11 19:59:24 +00001124 ISD::NodeType ExtendKind = ISD::ANY_EXTEND;
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00001125
Kenneth Uildriksc158dde2009-11-11 19:59:24 +00001126 const Function *F = I.getParent()->getParent();
1127 if (F->paramHasAttr(0, Attribute::SExt))
1128 ExtendKind = ISD::SIGN_EXTEND;
1129 else if (F->paramHasAttr(0, Attribute::ZExt))
1130 ExtendKind = ISD::ZERO_EXTEND;
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001131
Mikhail Glushenkovb3c01992010-01-01 04:41:22 +00001132 // FIXME: C calling convention requires the return type to be promoted
1133 // to at least 32-bit. But this is not necessary for non-C calling
Kenneth Uildriksc158dde2009-11-11 19:59:24 +00001134 // conventions. The frontend should mark functions whose return values
1135 // require promoting with signext or zeroext attributes.
1136 if (ExtendKind != ISD::ANY_EXTEND && VT.isInteger()) {
1137 EVT MinVT = TLI.getRegisterType(*DAG.getContext(), MVT::i32);
1138 if (VT.bitsLT(MinVT))
1139 VT = MinVT;
1140 }
1141
1142 unsigned NumParts = TLI.getNumRegisters(*DAG.getContext(), VT);
1143 EVT PartVT = TLI.getRegisterType(*DAG.getContext(), VT);
1144 SmallVector<SDValue, 4> Parts(NumParts);
Bill Wendling46ada192010-03-02 01:55:18 +00001145 getCopyToParts(DAG, getCurDebugLoc(),
Kenneth Uildriksc158dde2009-11-11 19:59:24 +00001146 SDValue(RetOp.getNode(), RetOp.getResNo() + j),
1147 &Parts[0], NumParts, PartVT, ExtendKind);
1148
1149 // 'inreg' on function refers to return value
1150 ISD::ArgFlagsTy Flags = ISD::ArgFlagsTy();
1151 if (F->paramHasAttr(0, Attribute::InReg))
1152 Flags.setInReg();
1153
1154 // Propagate extension type if any
1155 if (F->paramHasAttr(0, Attribute::SExt))
1156 Flags.setSExt();
1157 else if (F->paramHasAttr(0, Attribute::ZExt))
1158 Flags.setZExt();
1159
Dan Gohmanc9403652010-07-07 15:54:55 +00001160 for (unsigned i = 0; i < NumParts; ++i) {
1161 Outs.push_back(ISD::OutputArg(Flags, Parts[i].getValueType(),
1162 /*isfixed=*/true));
1163 OutVals.push_back(Parts[i]);
1164 }
Evan Cheng3927f432009-03-25 20:20:11 +00001165 }
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001166 }
1167 }
Dan Gohman98ca4f22009-08-05 01:29:28 +00001168
1169 bool isVarArg = DAG.getMachineFunction().getFunction()->isVarArg();
Sandeep Patel65c3c8f2009-09-02 08:44:58 +00001170 CallingConv::ID CallConv =
1171 DAG.getMachineFunction().getFunction()->getCallingConv();
Dan Gohman98ca4f22009-08-05 01:29:28 +00001172 Chain = TLI.LowerReturn(Chain, CallConv, isVarArg,
Dan Gohmanc9403652010-07-07 15:54:55 +00001173 Outs, OutVals, getCurDebugLoc(), DAG);
Dan Gohman5e866062009-08-06 15:37:27 +00001174
1175 // Verify that the target's LowerReturn behaved as expected.
Owen Anderson825b72b2009-08-11 20:47:22 +00001176 assert(Chain.getNode() && Chain.getValueType() == MVT::Other &&
Dan Gohman5e866062009-08-06 15:37:27 +00001177 "LowerReturn didn't return a valid chain!");
1178
1179 // Update the DAG with the new chain value resulting from return lowering.
Dan Gohman98ca4f22009-08-05 01:29:28 +00001180 DAG.setRoot(Chain);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001181}
1182
Dan Gohmanad62f532009-04-23 23:13:24 +00001183/// CopyToExportRegsIfNeeded - If the given value has virtual registers
1184/// created for it, emit nodes to copy the value into the virtual
1185/// registers.
Dan Gohman46510a72010-04-15 01:51:59 +00001186void SelectionDAGBuilder::CopyToExportRegsIfNeeded(const Value *V) {
Dan Gohman33b7a292010-04-16 17:15:02 +00001187 DenseMap<const Value *, unsigned>::iterator VMI = FuncInfo.ValueMap.find(V);
1188 if (VMI != FuncInfo.ValueMap.end()) {
1189 assert(!V->use_empty() && "Unused value assigned virtual registers!");
1190 CopyValueToVirtualRegister(V, VMI->second);
Dan Gohmanad62f532009-04-23 23:13:24 +00001191 }
1192}
1193
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001194/// ExportFromCurrentBlock - If this condition isn't known to be exported from
1195/// the current basic block, add it to ValueMap now so that we'll get a
1196/// CopyTo/FromReg.
Dan Gohman46510a72010-04-15 01:51:59 +00001197void SelectionDAGBuilder::ExportFromCurrentBlock(const Value *V) {
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001198 // No need to export constants.
1199 if (!isa<Instruction>(V) && !isa<Argument>(V)) return;
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00001200
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001201 // Already exported?
1202 if (FuncInfo.isExportedInst(V)) return;
1203
1204 unsigned Reg = FuncInfo.InitializeRegForValue(V);
1205 CopyValueToVirtualRegister(V, Reg);
1206}
1207
Dan Gohman46510a72010-04-15 01:51:59 +00001208bool SelectionDAGBuilder::isExportableFromCurrentBlock(const Value *V,
Dan Gohman2048b852009-11-23 18:04:58 +00001209 const BasicBlock *FromBB) {
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001210 // The operands of the setcc have to be in this block. We don't know
1211 // how to export them from some other block.
Dan Gohman46510a72010-04-15 01:51:59 +00001212 if (const Instruction *VI = dyn_cast<Instruction>(V)) {
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001213 // Can export from current BB.
1214 if (VI->getParent() == FromBB)
1215 return true;
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00001216
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001217 // Is already exported, noop.
1218 return FuncInfo.isExportedInst(V);
1219 }
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00001220
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001221 // If this is an argument, we can export it if the BB is the entry block or
1222 // if it is already exported.
1223 if (isa<Argument>(V)) {
1224 if (FromBB == &FromBB->getParent()->getEntryBlock())
1225 return true;
1226
1227 // Otherwise, can only export this if it is already exported.
1228 return FuncInfo.isExportedInst(V);
1229 }
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00001230
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001231 // Otherwise, constants can always be exported.
1232 return true;
1233}
1234
1235static bool InBlock(const Value *V, const BasicBlock *BB) {
1236 if (const Instruction *I = dyn_cast<Instruction>(V))
1237 return I->getParent() == BB;
1238 return true;
1239}
1240
Dan Gohmanc2277342008-10-17 21:16:08 +00001241/// EmitBranchForMergedCondition - Helper method for FindMergedConditions.
1242/// This function emits a branch and is used at the leaves of an OR or an
1243/// AND operator tree.
1244///
1245void
Dan Gohman46510a72010-04-15 01:51:59 +00001246SelectionDAGBuilder::EmitBranchForMergedCondition(const Value *Cond,
Dan Gohman2048b852009-11-23 18:04:58 +00001247 MachineBasicBlock *TBB,
1248 MachineBasicBlock *FBB,
Dan Gohman99be8ae2010-04-19 22:41:47 +00001249 MachineBasicBlock *CurBB,
1250 MachineBasicBlock *SwitchBB) {
Dan Gohmanc2277342008-10-17 21:16:08 +00001251 const BasicBlock *BB = CurBB->getBasicBlock();
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001252
Dan Gohmanc2277342008-10-17 21:16:08 +00001253 // If the leaf of the tree is a comparison, merge the condition into
1254 // the caseblock.
Dan Gohman46510a72010-04-15 01:51:59 +00001255 if (const CmpInst *BOp = dyn_cast<CmpInst>(Cond)) {
Dan Gohmanc2277342008-10-17 21:16:08 +00001256 // The operands of the cmp have to be in this block. We don't know
1257 // how to export them from some other block. If this is the first block
1258 // of the sequence, no exporting is needed.
Dan Gohman99be8ae2010-04-19 22:41:47 +00001259 if (CurBB == SwitchBB ||
Dan Gohmanc2277342008-10-17 21:16:08 +00001260 (isExportableFromCurrentBlock(BOp->getOperand(0), BB) &&
1261 isExportableFromCurrentBlock(BOp->getOperand(1), BB))) {
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001262 ISD::CondCode Condition;
Dan Gohman46510a72010-04-15 01:51:59 +00001263 if (const ICmpInst *IC = dyn_cast<ICmpInst>(Cond)) {
Dan Gohman8c1a6ca2008-10-17 18:18:45 +00001264 Condition = getICmpCondCode(IC->getPredicate());
Dan Gohman46510a72010-04-15 01:51:59 +00001265 } else if (const FCmpInst *FC = dyn_cast<FCmpInst>(Cond)) {
Dan Gohman8c1a6ca2008-10-17 18:18:45 +00001266 Condition = getFCmpCondCode(FC->getPredicate());
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001267 } else {
1268 Condition = ISD::SETEQ; // silence warning.
Torok Edwinc23197a2009-07-14 16:55:14 +00001269 llvm_unreachable("Unknown compare instruction");
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001270 }
Dan Gohmanc2277342008-10-17 21:16:08 +00001271
1272 CaseBlock CB(Condition, BOp->getOperand(0),
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001273 BOp->getOperand(1), NULL, TBB, FBB, CurBB);
1274 SwitchCases.push_back(CB);
1275 return;
1276 }
Dan Gohmanc2277342008-10-17 21:16:08 +00001277 }
1278
1279 // Create a CaseBlock record representing this branch.
Owen Anderson5defacc2009-07-31 17:39:07 +00001280 CaseBlock CB(ISD::SETEQ, Cond, ConstantInt::getTrue(*DAG.getContext()),
Dan Gohmanc2277342008-10-17 21:16:08 +00001281 NULL, TBB, FBB, CurBB);
1282 SwitchCases.push_back(CB);
1283}
1284
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00001285/// FindMergedConditions - If Cond is an expression like
Dan Gohman46510a72010-04-15 01:51:59 +00001286void SelectionDAGBuilder::FindMergedConditions(const Value *Cond,
Dan Gohman2048b852009-11-23 18:04:58 +00001287 MachineBasicBlock *TBB,
1288 MachineBasicBlock *FBB,
1289 MachineBasicBlock *CurBB,
Dan Gohman99be8ae2010-04-19 22:41:47 +00001290 MachineBasicBlock *SwitchBB,
Dan Gohman2048b852009-11-23 18:04:58 +00001291 unsigned Opc) {
Dan Gohmanc2277342008-10-17 21:16:08 +00001292 // If this node is not part of the or/and tree, emit it as a branch.
Dan Gohman46510a72010-04-15 01:51:59 +00001293 const Instruction *BOp = dyn_cast<Instruction>(Cond);
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00001294 if (!BOp || !(isa<BinaryOperator>(BOp) || isa<CmpInst>(BOp)) ||
Dan Gohmanc2277342008-10-17 21:16:08 +00001295 (unsigned)BOp->getOpcode() != Opc || !BOp->hasOneUse() ||
1296 BOp->getParent() != CurBB->getBasicBlock() ||
1297 !InBlock(BOp->getOperand(0), CurBB->getBasicBlock()) ||
1298 !InBlock(BOp->getOperand(1), CurBB->getBasicBlock())) {
Dan Gohman99be8ae2010-04-19 22:41:47 +00001299 EmitBranchForMergedCondition(Cond, TBB, FBB, CurBB, SwitchBB);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001300 return;
1301 }
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00001302
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001303 // Create TmpBB after CurBB.
1304 MachineFunction::iterator BBI = CurBB;
1305 MachineFunction &MF = DAG.getMachineFunction();
1306 MachineBasicBlock *TmpBB = MF.CreateMachineBasicBlock(CurBB->getBasicBlock());
1307 CurBB->getParent()->insert(++BBI, TmpBB);
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00001308
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001309 if (Opc == Instruction::Or) {
1310 // Codegen X | Y as:
1311 // jmp_if_X TBB
1312 // jmp TmpBB
1313 // TmpBB:
1314 // jmp_if_Y TBB
1315 // jmp FBB
1316 //
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00001317
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001318 // Emit the LHS condition.
Dan Gohman99be8ae2010-04-19 22:41:47 +00001319 FindMergedConditions(BOp->getOperand(0), TBB, TmpBB, CurBB, SwitchBB, Opc);
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00001320
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001321 // Emit the RHS condition into TmpBB.
Dan Gohman99be8ae2010-04-19 22:41:47 +00001322 FindMergedConditions(BOp->getOperand(1), TBB, FBB, TmpBB, SwitchBB, Opc);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001323 } else {
1324 assert(Opc == Instruction::And && "Unknown merge op!");
1325 // Codegen X & Y as:
1326 // jmp_if_X TmpBB
1327 // jmp FBB
1328 // TmpBB:
1329 // jmp_if_Y TBB
1330 // jmp FBB
1331 //
1332 // This requires creation of TmpBB after CurBB.
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00001333
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001334 // Emit the LHS condition.
Dan Gohman99be8ae2010-04-19 22:41:47 +00001335 FindMergedConditions(BOp->getOperand(0), TmpBB, FBB, CurBB, SwitchBB, Opc);
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00001336
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001337 // Emit the RHS condition into TmpBB.
Dan Gohman99be8ae2010-04-19 22:41:47 +00001338 FindMergedConditions(BOp->getOperand(1), TBB, FBB, TmpBB, SwitchBB, Opc);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001339 }
1340}
1341
1342/// If the set of cases should be emitted as a series of branches, return true.
1343/// If we should emit this as a bunch of and/or'd together conditions, return
1344/// false.
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00001345bool
Dan Gohman2048b852009-11-23 18:04:58 +00001346SelectionDAGBuilder::ShouldEmitAsBranches(const std::vector<CaseBlock> &Cases){
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001347 if (Cases.size() != 2) return true;
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00001348
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001349 // If this is two comparisons of the same values or'd or and'd together, they
1350 // will get folded into a single comparison, so don't emit two blocks.
1351 if ((Cases[0].CmpLHS == Cases[1].CmpLHS &&
1352 Cases[0].CmpRHS == Cases[1].CmpRHS) ||
1353 (Cases[0].CmpRHS == Cases[1].CmpLHS &&
1354 Cases[0].CmpLHS == Cases[1].CmpRHS)) {
1355 return false;
1356 }
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00001357
Chris Lattner133ce872010-01-02 00:00:03 +00001358 // Handle: (X != null) | (Y != null) --> (X|Y) != 0
1359 // Handle: (X == null) & (Y == null) --> (X|Y) == 0
1360 if (Cases[0].CmpRHS == Cases[1].CmpRHS &&
1361 Cases[0].CC == Cases[1].CC &&
1362 isa<Constant>(Cases[0].CmpRHS) &&
1363 cast<Constant>(Cases[0].CmpRHS)->isNullValue()) {
1364 if (Cases[0].CC == ISD::SETEQ && Cases[0].TrueBB == Cases[1].ThisBB)
1365 return false;
1366 if (Cases[0].CC == ISD::SETNE && Cases[0].FalseBB == Cases[1].ThisBB)
1367 return false;
1368 }
Michael J. Spencere70c5262010-10-16 08:25:21 +00001369
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001370 return true;
1371}
1372
Dan Gohman46510a72010-04-15 01:51:59 +00001373void SelectionDAGBuilder::visitBr(const BranchInst &I) {
Dan Gohman84023e02010-07-10 09:00:22 +00001374 MachineBasicBlock *BrMBB = FuncInfo.MBB;
Dan Gohman99be8ae2010-04-19 22:41:47 +00001375
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001376 // Update machine-CFG edges.
1377 MachineBasicBlock *Succ0MBB = FuncInfo.MBBMap[I.getSuccessor(0)];
1378
1379 // Figure out which block is immediately after the current one.
1380 MachineBasicBlock *NextBlock = 0;
Dan Gohman99be8ae2010-04-19 22:41:47 +00001381 MachineFunction::iterator BBI = BrMBB;
Dan Gohman0d24bfb2009-08-15 02:06:22 +00001382 if (++BBI != FuncInfo.MF->end())
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001383 NextBlock = BBI;
1384
1385 if (I.isUnconditional()) {
1386 // Update machine-CFG edges.
Dan Gohman99be8ae2010-04-19 22:41:47 +00001387 BrMBB->addSuccessor(Succ0MBB);
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00001388
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001389 // If this is not a fall-through branch, emit the branch.
Bill Wendling4533cac2010-01-28 21:51:40 +00001390 if (Succ0MBB != NextBlock)
1391 DAG.setRoot(DAG.getNode(ISD::BR, getCurDebugLoc(),
Owen Anderson825b72b2009-08-11 20:47:22 +00001392 MVT::Other, getControlRoot(),
Bill Wendling4533cac2010-01-28 21:51:40 +00001393 DAG.getBasicBlock(Succ0MBB)));
Bill Wendling3b7a41c2009-12-21 19:59:38 +00001394
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001395 return;
1396 }
1397
1398 // If this condition is one of the special cases we handle, do special stuff
1399 // now.
Dan Gohman46510a72010-04-15 01:51:59 +00001400 const Value *CondVal = I.getCondition();
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001401 MachineBasicBlock *Succ1MBB = FuncInfo.MBBMap[I.getSuccessor(1)];
1402
1403 // If this is a series of conditions that are or'd or and'd together, emit
1404 // this as a sequence of branches instead of setcc's with and/or operations.
Chris Lattnerde189be2010-11-30 18:12:52 +00001405 // As long as jumps are not expensive, this should improve performance.
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001406 // For example, instead of something like:
1407 // cmp A, B
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00001408 // C = seteq
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001409 // cmp D, E
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00001410 // F = setle
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001411 // or C, F
1412 // jnz foo
1413 // Emit:
1414 // cmp A, B
1415 // je foo
1416 // cmp D, E
1417 // jle foo
1418 //
Dan Gohman46510a72010-04-15 01:51:59 +00001419 if (const BinaryOperator *BOp = dyn_cast<BinaryOperator>(CondVal)) {
Chris Lattnerde189be2010-11-30 18:12:52 +00001420 if (!TLI.isJumpExpensive() &&
1421 BOp->hasOneUse() &&
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001422 (BOp->getOpcode() == Instruction::And ||
1423 BOp->getOpcode() == Instruction::Or)) {
Dan Gohman99be8ae2010-04-19 22:41:47 +00001424 FindMergedConditions(BOp, Succ0MBB, Succ1MBB, BrMBB, BrMBB,
1425 BOp->getOpcode());
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001426 // If the compares in later blocks need to use values not currently
1427 // exported from this block, export them now. This block should always
1428 // be the first entry.
Dan Gohman99be8ae2010-04-19 22:41:47 +00001429 assert(SwitchCases[0].ThisBB == BrMBB && "Unexpected lowering!");
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00001430
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001431 // Allow some cases to be rejected.
1432 if (ShouldEmitAsBranches(SwitchCases)) {
1433 for (unsigned i = 1, e = SwitchCases.size(); i != e; ++i) {
1434 ExportFromCurrentBlock(SwitchCases[i].CmpLHS);
1435 ExportFromCurrentBlock(SwitchCases[i].CmpRHS);
1436 }
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00001437
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001438 // Emit the branch for this block.
Dan Gohman99be8ae2010-04-19 22:41:47 +00001439 visitSwitchCase(SwitchCases[0], BrMBB);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001440 SwitchCases.erase(SwitchCases.begin());
1441 return;
1442 }
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00001443
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001444 // Okay, we decided not to do this, remove any inserted MBB's and clear
1445 // SwitchCases.
1446 for (unsigned i = 1, e = SwitchCases.size(); i != e; ++i)
Dan Gohman0d24bfb2009-08-15 02:06:22 +00001447 FuncInfo.MF->erase(SwitchCases[i].ThisBB);
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00001448
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001449 SwitchCases.clear();
1450 }
1451 }
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00001452
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001453 // Create a CaseBlock record representing this branch.
Owen Anderson5defacc2009-07-31 17:39:07 +00001454 CaseBlock CB(ISD::SETEQ, CondVal, ConstantInt::getTrue(*DAG.getContext()),
Dan Gohman99be8ae2010-04-19 22:41:47 +00001455 NULL, Succ0MBB, Succ1MBB, BrMBB);
Bill Wendling3b7a41c2009-12-21 19:59:38 +00001456
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001457 // Use visitSwitchCase to actually insert the fast branch sequence for this
1458 // cond branch.
Dan Gohman99be8ae2010-04-19 22:41:47 +00001459 visitSwitchCase(CB, BrMBB);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001460}
1461
1462/// visitSwitchCase - Emits the necessary code to represent a single node in
1463/// the binary search tree resulting from lowering a switch instruction.
Dan Gohman99be8ae2010-04-19 22:41:47 +00001464void SelectionDAGBuilder::visitSwitchCase(CaseBlock &CB,
1465 MachineBasicBlock *SwitchBB) {
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001466 SDValue Cond;
1467 SDValue CondLHS = getValue(CB.CmpLHS);
Dale Johannesenf5d97892009-02-04 01:48:28 +00001468 DebugLoc dl = getCurDebugLoc();
Anton Korobeynikov23218582008-12-23 22:25:27 +00001469
1470 // Build the setcc now.
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001471 if (CB.CmpMHS == NULL) {
1472 // Fold "(X == true)" to X and "(X == false)" to !X to
1473 // handle common cases produced by branch lowering.
Owen Anderson5defacc2009-07-31 17:39:07 +00001474 if (CB.CmpRHS == ConstantInt::getTrue(*DAG.getContext()) &&
Owen Andersonf53c3712009-07-21 02:47:59 +00001475 CB.CC == ISD::SETEQ)
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001476 Cond = CondLHS;
Owen Anderson5defacc2009-07-31 17:39:07 +00001477 else if (CB.CmpRHS == ConstantInt::getFalse(*DAG.getContext()) &&
Owen Andersonf53c3712009-07-21 02:47:59 +00001478 CB.CC == ISD::SETEQ) {
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001479 SDValue True = DAG.getConstant(1, CondLHS.getValueType());
Dale Johannesenf5d97892009-02-04 01:48:28 +00001480 Cond = DAG.getNode(ISD::XOR, dl, CondLHS.getValueType(), CondLHS, True);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001481 } else
Owen Anderson825b72b2009-08-11 20:47:22 +00001482 Cond = DAG.getSetCC(dl, MVT::i1, CondLHS, getValue(CB.CmpRHS), CB.CC);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001483 } else {
1484 assert(CB.CC == ISD::SETLE && "Can handle only LE ranges now");
1485
Anton Korobeynikov23218582008-12-23 22:25:27 +00001486 const APInt& Low = cast<ConstantInt>(CB.CmpLHS)->getValue();
1487 const APInt& High = cast<ConstantInt>(CB.CmpRHS)->getValue();
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001488
1489 SDValue CmpOp = getValue(CB.CmpMHS);
Owen Andersone50ed302009-08-10 22:56:29 +00001490 EVT VT = CmpOp.getValueType();
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001491
1492 if (cast<ConstantInt>(CB.CmpLHS)->isMinValue(true)) {
Owen Anderson825b72b2009-08-11 20:47:22 +00001493 Cond = DAG.getSetCC(dl, MVT::i1, CmpOp, DAG.getConstant(High, VT),
Dale Johannesenf5d97892009-02-04 01:48:28 +00001494 ISD::SETLE);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001495 } else {
Dale Johannesenf5d97892009-02-04 01:48:28 +00001496 SDValue SUB = DAG.getNode(ISD::SUB, dl,
Dale Johannesenfa42dea2009-01-30 01:34:22 +00001497 VT, CmpOp, DAG.getConstant(Low, VT));
Owen Anderson825b72b2009-08-11 20:47:22 +00001498 Cond = DAG.getSetCC(dl, MVT::i1, SUB,
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001499 DAG.getConstant(High-Low, VT), ISD::SETULE);
1500 }
1501 }
Anton Korobeynikov23218582008-12-23 22:25:27 +00001502
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001503 // Update successor info
Dan Gohman99be8ae2010-04-19 22:41:47 +00001504 SwitchBB->addSuccessor(CB.TrueBB);
1505 SwitchBB->addSuccessor(CB.FalseBB);
Anton Korobeynikov23218582008-12-23 22:25:27 +00001506
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001507 // Set NextBlock to be the MBB immediately after the current one, if any.
1508 // This is used to avoid emitting unnecessary branches to the next block.
1509 MachineBasicBlock *NextBlock = 0;
Dan Gohman99be8ae2010-04-19 22:41:47 +00001510 MachineFunction::iterator BBI = SwitchBB;
Dan Gohman0d24bfb2009-08-15 02:06:22 +00001511 if (++BBI != FuncInfo.MF->end())
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001512 NextBlock = BBI;
Anton Korobeynikov23218582008-12-23 22:25:27 +00001513
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001514 // If the lhs block is the next block, invert the condition so that we can
1515 // fall through to the lhs instead of the rhs block.
1516 if (CB.TrueBB == NextBlock) {
1517 std::swap(CB.TrueBB, CB.FalseBB);
1518 SDValue True = DAG.getConstant(1, Cond.getValueType());
Dale Johannesenf5d97892009-02-04 01:48:28 +00001519 Cond = DAG.getNode(ISD::XOR, dl, Cond.getValueType(), Cond, True);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001520 }
Bill Wendling3b7a41c2009-12-21 19:59:38 +00001521
Dale Johannesenf5d97892009-02-04 01:48:28 +00001522 SDValue BrCond = DAG.getNode(ISD::BRCOND, dl,
Owen Anderson825b72b2009-08-11 20:47:22 +00001523 MVT::Other, getControlRoot(), Cond,
Dale Johannesenfa42dea2009-01-30 01:34:22 +00001524 DAG.getBasicBlock(CB.TrueBB));
Bill Wendling87710f02009-12-21 23:47:40 +00001525
Evan Cheng266a99d2010-09-23 06:51:55 +00001526 // Insert the false branch. Do this even if it's a fall through branch,
1527 // this makes it easier to do DAG optimizations which require inverting
1528 // the branch condition.
1529 BrCond = DAG.getNode(ISD::BR, dl, MVT::Other, BrCond,
1530 DAG.getBasicBlock(CB.FalseBB));
Bill Wendling3b7a41c2009-12-21 19:59:38 +00001531
1532 DAG.setRoot(BrCond);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001533}
1534
1535/// visitJumpTable - Emit JumpTable node in the current MBB
Dan Gohman2048b852009-11-23 18:04:58 +00001536void SelectionDAGBuilder::visitJumpTable(JumpTable &JT) {
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001537 // Emit the code for the jump table
1538 assert(JT.Reg != -1U && "Should lower JT Header first!");
Owen Andersone50ed302009-08-10 22:56:29 +00001539 EVT PTy = TLI.getPointerTy();
Dale Johannesena04b7572009-02-03 23:04:43 +00001540 SDValue Index = DAG.getCopyFromReg(getControlRoot(), getCurDebugLoc(),
1541 JT.Reg, PTy);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001542 SDValue Table = DAG.getJumpTable(JT.JTI, PTy);
Bill Wendling3b7a41c2009-12-21 19:59:38 +00001543 SDValue BrJumpTable = DAG.getNode(ISD::BR_JT, getCurDebugLoc(),
1544 MVT::Other, Index.getValue(1),
1545 Table, Index);
1546 DAG.setRoot(BrJumpTable);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001547}
1548
1549/// visitJumpTableHeader - This function emits necessary code to produce index
1550/// in the JumpTable from switch case.
Dan Gohman2048b852009-11-23 18:04:58 +00001551void SelectionDAGBuilder::visitJumpTableHeader(JumpTable &JT,
Dan Gohman99be8ae2010-04-19 22:41:47 +00001552 JumpTableHeader &JTH,
1553 MachineBasicBlock *SwitchBB) {
Anton Korobeynikov1bfe2372008-12-23 22:25:45 +00001554 // Subtract the lowest switch case value from the value being switched on and
1555 // conditional branch to default mbb if the result is greater than the
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001556 // difference between smallest and largest cases.
1557 SDValue SwitchOp = getValue(JTH.SValue);
Owen Andersone50ed302009-08-10 22:56:29 +00001558 EVT VT = SwitchOp.getValueType();
Bill Wendling87710f02009-12-21 23:47:40 +00001559 SDValue Sub = DAG.getNode(ISD::SUB, getCurDebugLoc(), VT, SwitchOp,
Anton Korobeynikov1bfe2372008-12-23 22:25:45 +00001560 DAG.getConstant(JTH.First, VT));
Anton Korobeynikov23218582008-12-23 22:25:27 +00001561
Anton Korobeynikov1bfe2372008-12-23 22:25:45 +00001562 // The SDNode we just created, which holds the value being switched on minus
Dan Gohmanf451cb82010-02-10 16:03:48 +00001563 // the smallest case value, needs to be copied to a virtual register so it
Anton Korobeynikov1bfe2372008-12-23 22:25:45 +00001564 // can be used as an index into the jump table in a subsequent basic block.
1565 // This value may be smaller or larger than the target's pointer type, and
1566 // therefore require extension or truncating.
Bill Wendling87710f02009-12-21 23:47:40 +00001567 SwitchOp = DAG.getZExtOrTrunc(Sub, getCurDebugLoc(), TLI.getPointerTy());
Anton Korobeynikov23218582008-12-23 22:25:27 +00001568
Dan Gohman89496d02010-07-02 00:10:16 +00001569 unsigned JumpTableReg = FuncInfo.CreateReg(TLI.getPointerTy());
Dale Johannesena04b7572009-02-03 23:04:43 +00001570 SDValue CopyTo = DAG.getCopyToReg(getControlRoot(), getCurDebugLoc(),
1571 JumpTableReg, SwitchOp);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001572 JT.Reg = JumpTableReg;
1573
Anton Korobeynikov1bfe2372008-12-23 22:25:45 +00001574 // Emit the range check for the jump table, and branch to the default block
1575 // for the switch statement if the value being switched on exceeds the largest
1576 // case in the switch.
Dale Johannesenf5d97892009-02-04 01:48:28 +00001577 SDValue CMP = DAG.getSetCC(getCurDebugLoc(),
Bill Wendling87710f02009-12-21 23:47:40 +00001578 TLI.getSetCCResultType(Sub.getValueType()), Sub,
Anton Korobeynikov1bfe2372008-12-23 22:25:45 +00001579 DAG.getConstant(JTH.Last-JTH.First,VT),
1580 ISD::SETUGT);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001581
1582 // Set NextBlock to be the MBB immediately after the current one, if any.
1583 // This is used to avoid emitting unnecessary branches to the next block.
1584 MachineBasicBlock *NextBlock = 0;
Dan Gohman99be8ae2010-04-19 22:41:47 +00001585 MachineFunction::iterator BBI = SwitchBB;
Bill Wendling87710f02009-12-21 23:47:40 +00001586
Dan Gohman0d24bfb2009-08-15 02:06:22 +00001587 if (++BBI != FuncInfo.MF->end())
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001588 NextBlock = BBI;
1589
Dale Johannesen66978ee2009-01-31 02:22:37 +00001590 SDValue BrCond = DAG.getNode(ISD::BRCOND, getCurDebugLoc(),
Owen Anderson825b72b2009-08-11 20:47:22 +00001591 MVT::Other, CopyTo, CMP,
Anton Korobeynikov1bfe2372008-12-23 22:25:45 +00001592 DAG.getBasicBlock(JT.Default));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001593
Bill Wendling4533cac2010-01-28 21:51:40 +00001594 if (JT.MBB != NextBlock)
Bill Wendling3b7a41c2009-12-21 19:59:38 +00001595 BrCond = DAG.getNode(ISD::BR, getCurDebugLoc(), MVT::Other, BrCond,
1596 DAG.getBasicBlock(JT.MBB));
Bill Wendling3b7a41c2009-12-21 19:59:38 +00001597
Bill Wendling87710f02009-12-21 23:47:40 +00001598 DAG.setRoot(BrCond);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001599}
1600
1601/// visitBitTestHeader - This function emits necessary code to produce value
1602/// suitable for "bit tests"
Dan Gohman99be8ae2010-04-19 22:41:47 +00001603void SelectionDAGBuilder::visitBitTestHeader(BitTestBlock &B,
1604 MachineBasicBlock *SwitchBB) {
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001605 // Subtract the minimum value
1606 SDValue SwitchOp = getValue(B.SValue);
Owen Andersone50ed302009-08-10 22:56:29 +00001607 EVT VT = SwitchOp.getValueType();
Bill Wendling87710f02009-12-21 23:47:40 +00001608 SDValue Sub = DAG.getNode(ISD::SUB, getCurDebugLoc(), VT, SwitchOp,
Anton Korobeynikov1bfe2372008-12-23 22:25:45 +00001609 DAG.getConstant(B.First, VT));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001610
1611 // Check range
Dale Johannesenf5d97892009-02-04 01:48:28 +00001612 SDValue RangeCmp = DAG.getSetCC(getCurDebugLoc(),
Bill Wendling87710f02009-12-21 23:47:40 +00001613 TLI.getSetCCResultType(Sub.getValueType()),
1614 Sub, DAG.getConstant(B.Range, VT),
Anton Korobeynikov1bfe2372008-12-23 22:25:45 +00001615 ISD::SETUGT);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001616
Evan Chengd08e5b42011-01-06 01:02:44 +00001617 // Determine the type of the test operands.
1618 bool UsePtrType = false;
1619 if (!TLI.isTypeLegal(VT))
1620 UsePtrType = true;
1621 else {
1622 for (unsigned i = 0, e = B.Cases.size(); i != e; ++i)
1623 if ((uint64_t)((int64_t)B.Cases[i].Mask >> VT.getSizeInBits()) + 1 >= 2) {
1624 // Switch table case range are encoded into series of masks.
1625 // Just use pointer type, it's guaranteed to fit.
1626 UsePtrType = true;
1627 break;
1628 }
1629 }
1630 if (UsePtrType) {
1631 VT = TLI.getPointerTy();
1632 Sub = DAG.getZExtOrTrunc(Sub, getCurDebugLoc(), VT);
1633 }
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001634
Evan Chengd08e5b42011-01-06 01:02:44 +00001635 B.RegVT = VT;
1636 B.Reg = FuncInfo.CreateReg(VT);
Dale Johannesena04b7572009-02-03 23:04:43 +00001637 SDValue CopyTo = DAG.getCopyToReg(getControlRoot(), getCurDebugLoc(),
Evan Chengd08e5b42011-01-06 01:02:44 +00001638 B.Reg, Sub);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001639
1640 // Set NextBlock to be the MBB immediately after the current one, if any.
1641 // This is used to avoid emitting unnecessary branches to the next block.
1642 MachineBasicBlock *NextBlock = 0;
Dan Gohman99be8ae2010-04-19 22:41:47 +00001643 MachineFunction::iterator BBI = SwitchBB;
Dan Gohman0d24bfb2009-08-15 02:06:22 +00001644 if (++BBI != FuncInfo.MF->end())
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001645 NextBlock = BBI;
1646
1647 MachineBasicBlock* MBB = B.Cases[0].ThisBB;
1648
Dan Gohman99be8ae2010-04-19 22:41:47 +00001649 SwitchBB->addSuccessor(B.Default);
1650 SwitchBB->addSuccessor(MBB);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001651
Dale Johannesen66978ee2009-01-31 02:22:37 +00001652 SDValue BrRange = DAG.getNode(ISD::BRCOND, getCurDebugLoc(),
Owen Anderson825b72b2009-08-11 20:47:22 +00001653 MVT::Other, CopyTo, RangeCmp,
Anton Korobeynikov1bfe2372008-12-23 22:25:45 +00001654 DAG.getBasicBlock(B.Default));
Anton Korobeynikov23218582008-12-23 22:25:27 +00001655
Evan Cheng8c1f4322010-09-23 18:32:19 +00001656 if (MBB != NextBlock)
1657 BrRange = DAG.getNode(ISD::BR, getCurDebugLoc(), MVT::Other, CopyTo,
1658 DAG.getBasicBlock(MBB));
Bill Wendling3b7a41c2009-12-21 19:59:38 +00001659
Bill Wendling87710f02009-12-21 23:47:40 +00001660 DAG.setRoot(BrRange);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001661}
1662
1663/// visitBitTestCase - this function produces one "bit test"
Evan Chengd08e5b42011-01-06 01:02:44 +00001664void SelectionDAGBuilder::visitBitTestCase(BitTestBlock &BB,
1665 MachineBasicBlock* NextMBB,
Dan Gohman2048b852009-11-23 18:04:58 +00001666 unsigned Reg,
Dan Gohman99be8ae2010-04-19 22:41:47 +00001667 BitTestCase &B,
1668 MachineBasicBlock *SwitchBB) {
Evan Chengd08e5b42011-01-06 01:02:44 +00001669 EVT VT = BB.RegVT;
1670 SDValue ShiftOp = DAG.getCopyFromReg(getControlRoot(), getCurDebugLoc(),
1671 Reg, VT);
Dan Gohman8e0163a2010-06-24 02:06:24 +00001672 SDValue Cmp;
1673 if (CountPopulation_64(B.Mask) == 1) {
1674 // Testing for a single bit; just compare the shift count with what it
1675 // would need to be to shift a 1 bit in that position.
1676 Cmp = DAG.getSetCC(getCurDebugLoc(),
Evan Chengd08e5b42011-01-06 01:02:44 +00001677 TLI.getSetCCResultType(VT),
Dan Gohman8e0163a2010-06-24 02:06:24 +00001678 ShiftOp,
Evan Chengd08e5b42011-01-06 01:02:44 +00001679 DAG.getConstant(CountTrailingZeros_64(B.Mask), VT),
Dan Gohman8e0163a2010-06-24 02:06:24 +00001680 ISD::SETEQ);
1681 } else {
1682 // Make desired shift
Evan Chengd08e5b42011-01-06 01:02:44 +00001683 SDValue SwitchVal = DAG.getNode(ISD::SHL, getCurDebugLoc(), VT,
1684 DAG.getConstant(1, VT), ShiftOp);
Anton Korobeynikov23218582008-12-23 22:25:27 +00001685
Dan Gohman8e0163a2010-06-24 02:06:24 +00001686 // Emit bit tests and jumps
1687 SDValue AndOp = DAG.getNode(ISD::AND, getCurDebugLoc(),
Evan Chengd08e5b42011-01-06 01:02:44 +00001688 VT, SwitchVal, DAG.getConstant(B.Mask, VT));
Dan Gohman8e0163a2010-06-24 02:06:24 +00001689 Cmp = DAG.getSetCC(getCurDebugLoc(),
Evan Chengd08e5b42011-01-06 01:02:44 +00001690 TLI.getSetCCResultType(VT),
1691 AndOp, DAG.getConstant(0, VT),
Dan Gohman8e0163a2010-06-24 02:06:24 +00001692 ISD::SETNE);
1693 }
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001694
Dan Gohman99be8ae2010-04-19 22:41:47 +00001695 SwitchBB->addSuccessor(B.TargetBB);
1696 SwitchBB->addSuccessor(NextMBB);
Anton Korobeynikov23218582008-12-23 22:25:27 +00001697
Dale Johannesen66978ee2009-01-31 02:22:37 +00001698 SDValue BrAnd = DAG.getNode(ISD::BRCOND, getCurDebugLoc(),
Owen Anderson825b72b2009-08-11 20:47:22 +00001699 MVT::Other, getControlRoot(),
Dan Gohman8e0163a2010-06-24 02:06:24 +00001700 Cmp, DAG.getBasicBlock(B.TargetBB));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001701
1702 // Set NextBlock to be the MBB immediately after the current one, if any.
1703 // This is used to avoid emitting unnecessary branches to the next block.
1704 MachineBasicBlock *NextBlock = 0;
Dan Gohman99be8ae2010-04-19 22:41:47 +00001705 MachineFunction::iterator BBI = SwitchBB;
Dan Gohman0d24bfb2009-08-15 02:06:22 +00001706 if (++BBI != FuncInfo.MF->end())
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001707 NextBlock = BBI;
1708
Evan Cheng8c1f4322010-09-23 18:32:19 +00001709 if (NextMBB != NextBlock)
1710 BrAnd = DAG.getNode(ISD::BR, getCurDebugLoc(), MVT::Other, BrAnd,
1711 DAG.getBasicBlock(NextMBB));
Bill Wendling0777e922009-12-21 21:59:52 +00001712
Bill Wendling87710f02009-12-21 23:47:40 +00001713 DAG.setRoot(BrAnd);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001714}
1715
Dan Gohman46510a72010-04-15 01:51:59 +00001716void SelectionDAGBuilder::visitInvoke(const InvokeInst &I) {
Dan Gohman84023e02010-07-10 09:00:22 +00001717 MachineBasicBlock *InvokeMBB = FuncInfo.MBB;
Dan Gohman99be8ae2010-04-19 22:41:47 +00001718
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001719 // Retrieve successors.
1720 MachineBasicBlock *Return = FuncInfo.MBBMap[I.getSuccessor(0)];
1721 MachineBasicBlock *LandingPad = FuncInfo.MBBMap[I.getSuccessor(1)];
1722
Gabor Greifb67e6b32009-01-15 11:10:44 +00001723 const Value *Callee(I.getCalledValue());
1724 if (isa<InlineAsm>(Callee))
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001725 visitInlineAsm(&I);
1726 else
Gabor Greifb67e6b32009-01-15 11:10:44 +00001727 LowerCallTo(&I, getValue(Callee), false, LandingPad);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001728
1729 // If the value of the invoke is used outside of its defining block, make it
1730 // available as a virtual register.
Dan Gohmanad62f532009-04-23 23:13:24 +00001731 CopyToExportRegsIfNeeded(&I);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001732
1733 // Update successor info
Dan Gohman99be8ae2010-04-19 22:41:47 +00001734 InvokeMBB->addSuccessor(Return);
1735 InvokeMBB->addSuccessor(LandingPad);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001736
1737 // Drop into normal successor.
Bill Wendling4533cac2010-01-28 21:51:40 +00001738 DAG.setRoot(DAG.getNode(ISD::BR, getCurDebugLoc(),
1739 MVT::Other, getControlRoot(),
1740 DAG.getBasicBlock(Return)));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001741}
1742
Dan Gohman46510a72010-04-15 01:51:59 +00001743void SelectionDAGBuilder::visitUnwind(const UnwindInst &I) {
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001744}
1745
1746/// handleSmallSwitchCaseRange - Emit a series of specific tests (suitable for
1747/// small case ranges).
Dan Gohman2048b852009-11-23 18:04:58 +00001748bool SelectionDAGBuilder::handleSmallSwitchRange(CaseRec& CR,
1749 CaseRecVector& WorkList,
Dan Gohman46510a72010-04-15 01:51:59 +00001750 const Value* SV,
Dan Gohman99be8ae2010-04-19 22:41:47 +00001751 MachineBasicBlock *Default,
1752 MachineBasicBlock *SwitchBB) {
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001753 Case& BackCase = *(CR.Range.second-1);
Anton Korobeynikov23218582008-12-23 22:25:27 +00001754
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001755 // Size is the number of Cases represented by this range.
Anton Korobeynikov23218582008-12-23 22:25:27 +00001756 size_t Size = CR.Range.second - CR.Range.first;
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001757 if (Size > 3)
Anton Korobeynikov23218582008-12-23 22:25:27 +00001758 return false;
1759
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001760 // Get the MachineFunction which holds the current MBB. This is used when
1761 // inserting any additional MBBs necessary to represent the switch.
Dan Gohman0d24bfb2009-08-15 02:06:22 +00001762 MachineFunction *CurMF = FuncInfo.MF;
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001763
1764 // Figure out which block is immediately after the current one.
1765 MachineBasicBlock *NextBlock = 0;
1766 MachineFunction::iterator BBI = CR.CaseBB;
1767
Dan Gohman0d24bfb2009-08-15 02:06:22 +00001768 if (++BBI != FuncInfo.MF->end())
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001769 NextBlock = BBI;
1770
Benjamin Kramerce750f02010-11-22 09:45:38 +00001771 // If any two of the cases has the same destination, and if one value
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001772 // is the same as the other, but has one bit unset that the other has set,
1773 // use bit manipulation to do two compares at once. For example:
1774 // "if (X == 6 || X == 4)" -> "if ((X|2) == 6)"
Benjamin Kramerce750f02010-11-22 09:45:38 +00001775 // TODO: This could be extended to merge any 2 cases in switches with 3 cases.
1776 // TODO: Handle cases where CR.CaseBB != SwitchBB.
1777 if (Size == 2 && CR.CaseBB == SwitchBB) {
1778 Case &Small = *CR.Range.first;
1779 Case &Big = *(CR.Range.second-1);
1780
1781 if (Small.Low == Small.High && Big.Low == Big.High && Small.BB == Big.BB) {
1782 const APInt& SmallValue = cast<ConstantInt>(Small.Low)->getValue();
1783 const APInt& BigValue = cast<ConstantInt>(Big.Low)->getValue();
1784
1785 // Check that there is only one bit different.
1786 if (BigValue.countPopulation() == SmallValue.countPopulation() + 1 &&
1787 (SmallValue | BigValue) == BigValue) {
1788 // Isolate the common bit.
1789 APInt CommonBit = BigValue & ~SmallValue;
1790 assert((SmallValue | CommonBit) == BigValue &&
1791 CommonBit.countPopulation() == 1 && "Not a common bit?");
1792
1793 SDValue CondLHS = getValue(SV);
1794 EVT VT = CondLHS.getValueType();
1795 DebugLoc DL = getCurDebugLoc();
1796
1797 SDValue Or = DAG.getNode(ISD::OR, DL, VT, CondLHS,
1798 DAG.getConstant(CommonBit, VT));
1799 SDValue Cond = DAG.getSetCC(DL, MVT::i1,
1800 Or, DAG.getConstant(BigValue, VT),
1801 ISD::SETEQ);
1802
1803 // Update successor info.
1804 SwitchBB->addSuccessor(Small.BB);
1805 SwitchBB->addSuccessor(Default);
1806
1807 // Insert the true branch.
1808 SDValue BrCond = DAG.getNode(ISD::BRCOND, DL, MVT::Other,
1809 getControlRoot(), Cond,
1810 DAG.getBasicBlock(Small.BB));
1811
1812 // Insert the false branch.
1813 BrCond = DAG.getNode(ISD::BR, DL, MVT::Other, BrCond,
1814 DAG.getBasicBlock(Default));
1815
1816 DAG.setRoot(BrCond);
1817 return true;
1818 }
1819 }
1820 }
Anton Korobeynikov23218582008-12-23 22:25:27 +00001821
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001822 // Rearrange the case blocks so that the last one falls through if possible.
1823 if (NextBlock && Default != NextBlock && BackCase.BB != NextBlock) {
1824 // The last case block won't fall through into 'NextBlock' if we emit the
1825 // branches in this order. See if rearranging a case value would help.
1826 for (CaseItr I = CR.Range.first, E = CR.Range.second-1; I != E; ++I) {
1827 if (I->BB == NextBlock) {
1828 std::swap(*I, BackCase);
1829 break;
1830 }
1831 }
1832 }
Anton Korobeynikov23218582008-12-23 22:25:27 +00001833
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001834 // Create a CaseBlock record representing a conditional branch to
1835 // the Case's target mbb if the value being switched on SV is equal
1836 // to C.
1837 MachineBasicBlock *CurBlock = CR.CaseBB;
1838 for (CaseItr I = CR.Range.first, E = CR.Range.second; I != E; ++I) {
1839 MachineBasicBlock *FallThrough;
1840 if (I != E-1) {
1841 FallThrough = CurMF->CreateMachineBasicBlock(CurBlock->getBasicBlock());
1842 CurMF->insert(BBI, FallThrough);
Dan Gohman8e5c0da2009-04-09 02:33:36 +00001843
1844 // Put SV in a virtual register to make it available from the new blocks.
1845 ExportFromCurrentBlock(SV);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001846 } else {
1847 // If the last case doesn't match, go to the default block.
1848 FallThrough = Default;
1849 }
1850
Dan Gohman46510a72010-04-15 01:51:59 +00001851 const Value *RHS, *LHS, *MHS;
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001852 ISD::CondCode CC;
1853 if (I->High == I->Low) {
1854 // This is just small small case range :) containing exactly 1 case
1855 CC = ISD::SETEQ;
1856 LHS = SV; RHS = I->High; MHS = NULL;
1857 } else {
1858 CC = ISD::SETLE;
1859 LHS = I->Low; MHS = SV; RHS = I->High;
1860 }
1861 CaseBlock CB(CC, LHS, RHS, MHS, I->BB, FallThrough, CurBlock);
Anton Korobeynikov23218582008-12-23 22:25:27 +00001862
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001863 // If emitting the first comparison, just call visitSwitchCase to emit the
1864 // code into the current block. Otherwise, push the CaseBlock onto the
1865 // vector to be later processed by SDISel, and insert the node's MBB
1866 // before the next MBB.
Dan Gohman99be8ae2010-04-19 22:41:47 +00001867 if (CurBlock == SwitchBB)
1868 visitSwitchCase(CB, SwitchBB);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001869 else
1870 SwitchCases.push_back(CB);
Anton Korobeynikov23218582008-12-23 22:25:27 +00001871
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001872 CurBlock = FallThrough;
1873 }
1874
1875 return true;
1876}
1877
1878static inline bool areJTsAllowed(const TargetLowering &TLI) {
1879 return !DisableJumpTables &&
Owen Anderson825b72b2009-08-11 20:47:22 +00001880 (TLI.isOperationLegalOrCustom(ISD::BR_JT, MVT::Other) ||
1881 TLI.isOperationLegalOrCustom(ISD::BRIND, MVT::Other));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001882}
Anton Korobeynikov23218582008-12-23 22:25:27 +00001883
Anton Korobeynikove2f95e92008-12-23 22:26:01 +00001884static APInt ComputeRange(const APInt &First, const APInt &Last) {
Anton Korobeynikove2f95e92008-12-23 22:26:01 +00001885 uint32_t BitWidth = std::max(Last.getBitWidth(), First.getBitWidth()) + 1;
Jay Foad40f8f622010-12-07 08:25:19 +00001886 APInt LastExt = Last.sext(BitWidth), FirstExt = First.sext(BitWidth);
Anton Korobeynikove2f95e92008-12-23 22:26:01 +00001887 return (LastExt - FirstExt + 1ULL);
1888}
1889
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001890/// handleJTSwitchCase - Emit jumptable for current switch case range
Dan Gohman2048b852009-11-23 18:04:58 +00001891bool SelectionDAGBuilder::handleJTSwitchCase(CaseRec& CR,
1892 CaseRecVector& WorkList,
Dan Gohman46510a72010-04-15 01:51:59 +00001893 const Value* SV,
Dan Gohman99be8ae2010-04-19 22:41:47 +00001894 MachineBasicBlock* Default,
1895 MachineBasicBlock *SwitchBB) {
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001896 Case& FrontCase = *CR.Range.first;
1897 Case& BackCase = *(CR.Range.second-1);
1898
Chris Lattnere880efe2009-11-07 07:50:34 +00001899 const APInt &First = cast<ConstantInt>(FrontCase.Low)->getValue();
1900 const APInt &Last = cast<ConstantInt>(BackCase.High)->getValue();
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001901
Chris Lattnere880efe2009-11-07 07:50:34 +00001902 APInt TSize(First.getBitWidth(), 0);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001903 for (CaseItr I = CR.Range.first, E = CR.Range.second;
1904 I!=E; ++I)
1905 TSize += I->size();
1906
Dan Gohmane0567812010-04-08 23:03:40 +00001907 if (!areJTsAllowed(TLI) || TSize.ult(4))
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001908 return false;
Anton Korobeynikov23218582008-12-23 22:25:27 +00001909
Anton Korobeynikove2f95e92008-12-23 22:26:01 +00001910 APInt Range = ComputeRange(First, Last);
Chris Lattnere880efe2009-11-07 07:50:34 +00001911 double Density = TSize.roundToDouble() / Range.roundToDouble();
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001912 if (Density < 0.4)
1913 return false;
1914
David Greene4b69d992010-01-05 01:24:57 +00001915 DEBUG(dbgs() << "Lowering jump table\n"
Anton Korobeynikov56d245b2008-12-23 22:26:18 +00001916 << "First entry: " << First << ". Last entry: " << Last << '\n'
1917 << "Range: " << Range
1918 << "Size: " << TSize << ". Density: " << Density << "\n\n");
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001919
1920 // Get the MachineFunction which holds the current MBB. This is used when
1921 // inserting any additional MBBs necessary to represent the switch.
Dan Gohman0d24bfb2009-08-15 02:06:22 +00001922 MachineFunction *CurMF = FuncInfo.MF;
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001923
1924 // Figure out which block is immediately after the current one.
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001925 MachineFunction::iterator BBI = CR.CaseBB;
Duncan Sands51498522009-09-06 18:03:32 +00001926 ++BBI;
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001927
1928 const BasicBlock *LLVMBB = CR.CaseBB->getBasicBlock();
1929
1930 // Create a new basic block to hold the code for loading the address
1931 // of the jump table, and jumping to it. Update successor information;
1932 // we will either branch to the default case for the switch, or the jump
1933 // table.
1934 MachineBasicBlock *JumpTableBB = CurMF->CreateMachineBasicBlock(LLVMBB);
1935 CurMF->insert(BBI, JumpTableBB);
1936 CR.CaseBB->addSuccessor(Default);
1937 CR.CaseBB->addSuccessor(JumpTableBB);
Anton Korobeynikov23218582008-12-23 22:25:27 +00001938
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001939 // Build a vector of destination BBs, corresponding to each target
1940 // of the jump table. If the value of the jump table slot corresponds to
1941 // a case statement, push the case's BB onto the vector, otherwise, push
1942 // the default BB.
1943 std::vector<MachineBasicBlock*> DestBBs;
Anton Korobeynikov23218582008-12-23 22:25:27 +00001944 APInt TEI = First;
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001945 for (CaseItr I = CR.Range.first, E = CR.Range.second; I != E; ++TEI) {
Chris Lattner071c62f2010-01-25 23:26:13 +00001946 const APInt &Low = cast<ConstantInt>(I->Low)->getValue();
1947 const APInt &High = cast<ConstantInt>(I->High)->getValue();
Anton Korobeynikov23218582008-12-23 22:25:27 +00001948
1949 if (Low.sle(TEI) && TEI.sle(High)) {
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001950 DestBBs.push_back(I->BB);
1951 if (TEI==High)
1952 ++I;
1953 } else {
1954 DestBBs.push_back(Default);
1955 }
1956 }
Anton Korobeynikov23218582008-12-23 22:25:27 +00001957
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001958 // Update successor info. Add one edge to each unique successor.
Anton Korobeynikov23218582008-12-23 22:25:27 +00001959 BitVector SuccsHandled(CR.CaseBB->getParent()->getNumBlockIDs());
1960 for (std::vector<MachineBasicBlock*>::iterator I = DestBBs.begin(),
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001961 E = DestBBs.end(); I != E; ++I) {
1962 if (!SuccsHandled[(*I)->getNumber()]) {
1963 SuccsHandled[(*I)->getNumber()] = true;
1964 JumpTableBB->addSuccessor(*I);
1965 }
1966 }
Anton Korobeynikov23218582008-12-23 22:25:27 +00001967
Bob Wilsond1ec31d2010-03-18 18:42:41 +00001968 // Create a jump table index for this jump table.
Chris Lattner071c62f2010-01-25 23:26:13 +00001969 unsigned JTEncoding = TLI.getJumpTableEncoding();
1970 unsigned JTI = CurMF->getOrCreateJumpTableInfo(JTEncoding)
Bob Wilsond1ec31d2010-03-18 18:42:41 +00001971 ->createJumpTableIndex(DestBBs);
Anton Korobeynikov23218582008-12-23 22:25:27 +00001972
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001973 // Set the jump table information so that we can codegen it as a second
1974 // MachineBasicBlock
1975 JumpTable JT(-1U, JTI, JumpTableBB, Default);
Dan Gohman99be8ae2010-04-19 22:41:47 +00001976 JumpTableHeader JTH(First, Last, SV, CR.CaseBB, (CR.CaseBB == SwitchBB));
1977 if (CR.CaseBB == SwitchBB)
1978 visitJumpTableHeader(JT, JTH, SwitchBB);
Anton Korobeynikov23218582008-12-23 22:25:27 +00001979
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001980 JTCases.push_back(JumpTableBlock(JTH, JT));
1981
1982 return true;
1983}
1984
1985/// handleBTSplitSwitchCase - emit comparison and split binary search tree into
1986/// 2 subtrees.
Dan Gohman2048b852009-11-23 18:04:58 +00001987bool SelectionDAGBuilder::handleBTSplitSwitchCase(CaseRec& CR,
1988 CaseRecVector& WorkList,
Dan Gohman46510a72010-04-15 01:51:59 +00001989 const Value* SV,
Dan Gohman99be8ae2010-04-19 22:41:47 +00001990 MachineBasicBlock *Default,
1991 MachineBasicBlock *SwitchBB) {
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001992 // Get the MachineFunction which holds the current MBB. This is used when
1993 // inserting any additional MBBs necessary to represent the switch.
Dan Gohman0d24bfb2009-08-15 02:06:22 +00001994 MachineFunction *CurMF = FuncInfo.MF;
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001995
1996 // Figure out which block is immediately after the current one.
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001997 MachineFunction::iterator BBI = CR.CaseBB;
Duncan Sands51498522009-09-06 18:03:32 +00001998 ++BBI;
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00001999
2000 Case& FrontCase = *CR.Range.first;
2001 Case& BackCase = *(CR.Range.second-1);
2002 const BasicBlock *LLVMBB = CR.CaseBB->getBasicBlock();
2003
2004 // Size is the number of Cases represented by this range.
2005 unsigned Size = CR.Range.second - CR.Range.first;
2006
Chris Lattnere880efe2009-11-07 07:50:34 +00002007 const APInt &First = cast<ConstantInt>(FrontCase.Low)->getValue();
2008 const APInt &Last = cast<ConstantInt>(BackCase.High)->getValue();
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002009 double FMetric = 0;
2010 CaseItr Pivot = CR.Range.first + Size/2;
2011
2012 // Select optimal pivot, maximizing sum density of LHS and RHS. This will
2013 // (heuristically) allow us to emit JumpTable's later.
Chris Lattnere880efe2009-11-07 07:50:34 +00002014 APInt TSize(First.getBitWidth(), 0);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002015 for (CaseItr I = CR.Range.first, E = CR.Range.second;
2016 I!=E; ++I)
2017 TSize += I->size();
2018
Chris Lattnere880efe2009-11-07 07:50:34 +00002019 APInt LSize = FrontCase.size();
2020 APInt RSize = TSize-LSize;
David Greene4b69d992010-01-05 01:24:57 +00002021 DEBUG(dbgs() << "Selecting best pivot: \n"
Anton Korobeynikov56d245b2008-12-23 22:26:18 +00002022 << "First: " << First << ", Last: " << Last <<'\n'
2023 << "LSize: " << LSize << ", RSize: " << RSize << '\n');
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002024 for (CaseItr I = CR.Range.first, J=I+1, E = CR.Range.second;
2025 J!=E; ++I, ++J) {
Chris Lattnere880efe2009-11-07 07:50:34 +00002026 const APInt &LEnd = cast<ConstantInt>(I->High)->getValue();
2027 const APInt &RBegin = cast<ConstantInt>(J->Low)->getValue();
Anton Korobeynikove2f95e92008-12-23 22:26:01 +00002028 APInt Range = ComputeRange(LEnd, RBegin);
2029 assert((Range - 2ULL).isNonNegative() &&
2030 "Invalid case distance");
Mikhail Glushenkovb3c01992010-01-01 04:41:22 +00002031 double LDensity = (double)LSize.roundToDouble() /
Chris Lattnere880efe2009-11-07 07:50:34 +00002032 (LEnd - First + 1ULL).roundToDouble();
2033 double RDensity = (double)RSize.roundToDouble() /
2034 (Last - RBegin + 1ULL).roundToDouble();
Anton Korobeynikove2f95e92008-12-23 22:26:01 +00002035 double Metric = Range.logBase2()*(LDensity+RDensity);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002036 // Should always split in some non-trivial place
David Greene4b69d992010-01-05 01:24:57 +00002037 DEBUG(dbgs() <<"=>Step\n"
Anton Korobeynikov56d245b2008-12-23 22:26:18 +00002038 << "LEnd: " << LEnd << ", RBegin: " << RBegin << '\n'
2039 << "LDensity: " << LDensity
2040 << ", RDensity: " << RDensity << '\n'
2041 << "Metric: " << Metric << '\n');
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002042 if (FMetric < Metric) {
2043 Pivot = J;
2044 FMetric = Metric;
David Greene4b69d992010-01-05 01:24:57 +00002045 DEBUG(dbgs() << "Current metric set to: " << FMetric << '\n');
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002046 }
2047
2048 LSize += J->size();
2049 RSize -= J->size();
2050 }
2051 if (areJTsAllowed(TLI)) {
2052 // If our case is dense we *really* should handle it earlier!
2053 assert((FMetric > 0) && "Should handle dense range earlier!");
2054 } else {
2055 Pivot = CR.Range.first + Size/2;
2056 }
Anton Korobeynikov23218582008-12-23 22:25:27 +00002057
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002058 CaseRange LHSR(CR.Range.first, Pivot);
2059 CaseRange RHSR(Pivot, CR.Range.second);
2060 Constant *C = Pivot->Low;
2061 MachineBasicBlock *FalseBB = 0, *TrueBB = 0;
Anton Korobeynikov23218582008-12-23 22:25:27 +00002062
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002063 // We know that we branch to the LHS if the Value being switched on is
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00002064 // less than the Pivot value, C. We use this to optimize our binary
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002065 // tree a bit, by recognizing that if SV is greater than or equal to the
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00002066 // LHS's Case Value, and that Case Value is exactly one less than the
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002067 // Pivot's Value, then we can branch directly to the LHS's Target,
2068 // rather than creating a leaf node for it.
2069 if ((LHSR.second - LHSR.first) == 1 &&
2070 LHSR.first->High == CR.GE &&
Anton Korobeynikov23218582008-12-23 22:25:27 +00002071 cast<ConstantInt>(C)->getValue() ==
2072 (cast<ConstantInt>(CR.GE)->getValue() + 1LL)) {
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002073 TrueBB = LHSR.first->BB;
2074 } else {
2075 TrueBB = CurMF->CreateMachineBasicBlock(LLVMBB);
2076 CurMF->insert(BBI, TrueBB);
2077 WorkList.push_back(CaseRec(TrueBB, C, CR.GE, LHSR));
Dan Gohman8e5c0da2009-04-09 02:33:36 +00002078
2079 // Put SV in a virtual register to make it available from the new blocks.
2080 ExportFromCurrentBlock(SV);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002081 }
Anton Korobeynikov23218582008-12-23 22:25:27 +00002082
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002083 // Similar to the optimization above, if the Value being switched on is
2084 // known to be less than the Constant CR.LT, and the current Case Value
2085 // is CR.LT - 1, then we can branch directly to the target block for
2086 // the current Case Value, rather than emitting a RHS leaf node for it.
2087 if ((RHSR.second - RHSR.first) == 1 && CR.LT &&
Anton Korobeynikov23218582008-12-23 22:25:27 +00002088 cast<ConstantInt>(RHSR.first->Low)->getValue() ==
2089 (cast<ConstantInt>(CR.LT)->getValue() - 1LL)) {
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002090 FalseBB = RHSR.first->BB;
2091 } else {
2092 FalseBB = CurMF->CreateMachineBasicBlock(LLVMBB);
2093 CurMF->insert(BBI, FalseBB);
2094 WorkList.push_back(CaseRec(FalseBB,CR.LT,C,RHSR));
Dan Gohman8e5c0da2009-04-09 02:33:36 +00002095
2096 // Put SV in a virtual register to make it available from the new blocks.
2097 ExportFromCurrentBlock(SV);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002098 }
2099
2100 // Create a CaseBlock record representing a conditional branch to
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00002101 // the LHS node if the value being switched on SV is less than C.
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002102 // Otherwise, branch to LHS.
2103 CaseBlock CB(ISD::SETLT, SV, C, NULL, TrueBB, FalseBB, CR.CaseBB);
2104
Dan Gohman99be8ae2010-04-19 22:41:47 +00002105 if (CR.CaseBB == SwitchBB)
2106 visitSwitchCase(CB, SwitchBB);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002107 else
2108 SwitchCases.push_back(CB);
2109
2110 return true;
2111}
2112
2113/// handleBitTestsSwitchCase - if current case range has few destination and
2114/// range span less, than machine word bitwidth, encode case range into series
2115/// of masks and emit bit tests with these masks.
Dan Gohman2048b852009-11-23 18:04:58 +00002116bool SelectionDAGBuilder::handleBitTestsSwitchCase(CaseRec& CR,
2117 CaseRecVector& WorkList,
Dan Gohman46510a72010-04-15 01:51:59 +00002118 const Value* SV,
Dan Gohman99be8ae2010-04-19 22:41:47 +00002119 MachineBasicBlock* Default,
2120 MachineBasicBlock *SwitchBB){
Owen Andersone50ed302009-08-10 22:56:29 +00002121 EVT PTy = TLI.getPointerTy();
Owen Anderson77547be2009-08-10 18:56:59 +00002122 unsigned IntPtrBits = PTy.getSizeInBits();
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002123
2124 Case& FrontCase = *CR.Range.first;
2125 Case& BackCase = *(CR.Range.second-1);
2126
2127 // Get the MachineFunction which holds the current MBB. This is used when
2128 // inserting any additional MBBs necessary to represent the switch.
Dan Gohman0d24bfb2009-08-15 02:06:22 +00002129 MachineFunction *CurMF = FuncInfo.MF;
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002130
Anton Korobeynikovd34167a2009-05-08 18:51:34 +00002131 // If target does not have legal shift left, do not emit bit tests at all.
2132 if (!TLI.isOperationLegal(ISD::SHL, TLI.getPointerTy()))
2133 return false;
2134
Anton Korobeynikov23218582008-12-23 22:25:27 +00002135 size_t numCmps = 0;
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002136 for (CaseItr I = CR.Range.first, E = CR.Range.second;
2137 I!=E; ++I) {
2138 // Single case counts one, case range - two.
Anton Korobeynikov23218582008-12-23 22:25:27 +00002139 numCmps += (I->Low == I->High ? 1 : 2);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002140 }
Anton Korobeynikov23218582008-12-23 22:25:27 +00002141
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002142 // Count unique destinations
2143 SmallSet<MachineBasicBlock*, 4> Dests;
2144 for (CaseItr I = CR.Range.first, E = CR.Range.second; I!=E; ++I) {
2145 Dests.insert(I->BB);
2146 if (Dests.size() > 3)
2147 // Don't bother the code below, if there are too much unique destinations
2148 return false;
2149 }
David Greene4b69d992010-01-05 01:24:57 +00002150 DEBUG(dbgs() << "Total number of unique destinations: "
Mikhail Glushenkovb3c01992010-01-01 04:41:22 +00002151 << Dests.size() << '\n'
2152 << "Total number of comparisons: " << numCmps << '\n');
Anton Korobeynikov23218582008-12-23 22:25:27 +00002153
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002154 // Compute span of values.
Anton Korobeynikov23218582008-12-23 22:25:27 +00002155 const APInt& minValue = cast<ConstantInt>(FrontCase.Low)->getValue();
2156 const APInt& maxValue = cast<ConstantInt>(BackCase.High)->getValue();
Anton Korobeynikove2f95e92008-12-23 22:26:01 +00002157 APInt cmpRange = maxValue - minValue;
2158
David Greene4b69d992010-01-05 01:24:57 +00002159 DEBUG(dbgs() << "Compare range: " << cmpRange << '\n'
Anton Korobeynikov56d245b2008-12-23 22:26:18 +00002160 << "Low bound: " << minValue << '\n'
2161 << "High bound: " << maxValue << '\n');
Anton Korobeynikov23218582008-12-23 22:25:27 +00002162
Dan Gohmane0567812010-04-08 23:03:40 +00002163 if (cmpRange.uge(IntPtrBits) ||
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002164 (!(Dests.size() == 1 && numCmps >= 3) &&
2165 !(Dests.size() == 2 && numCmps >= 5) &&
2166 !(Dests.size() >= 3 && numCmps >= 6)))
2167 return false;
Anton Korobeynikov23218582008-12-23 22:25:27 +00002168
David Greene4b69d992010-01-05 01:24:57 +00002169 DEBUG(dbgs() << "Emitting bit tests\n");
Anton Korobeynikov23218582008-12-23 22:25:27 +00002170 APInt lowBound = APInt::getNullValue(cmpRange.getBitWidth());
2171
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002172 // Optimize the case where all the case values fit in a
2173 // word without having to subtract minValue. In this case,
2174 // we can optimize away the subtraction.
Dan Gohmane0567812010-04-08 23:03:40 +00002175 if (minValue.isNonNegative() && maxValue.slt(IntPtrBits)) {
Anton Korobeynikov23218582008-12-23 22:25:27 +00002176 cmpRange = maxValue;
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002177 } else {
Anton Korobeynikov23218582008-12-23 22:25:27 +00002178 lowBound = minValue;
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002179 }
Anton Korobeynikov23218582008-12-23 22:25:27 +00002180
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002181 CaseBitsVector CasesBits;
2182 unsigned i, count = 0;
2183
2184 for (CaseItr I = CR.Range.first, E = CR.Range.second; I!=E; ++I) {
2185 MachineBasicBlock* Dest = I->BB;
2186 for (i = 0; i < count; ++i)
2187 if (Dest == CasesBits[i].BB)
2188 break;
Anton Korobeynikov23218582008-12-23 22:25:27 +00002189
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002190 if (i == count) {
2191 assert((count < 3) && "Too much destinations to test!");
2192 CasesBits.push_back(CaseBits(0, Dest, 0));
2193 count++;
2194 }
Anton Korobeynikov23218582008-12-23 22:25:27 +00002195
2196 const APInt& lowValue = cast<ConstantInt>(I->Low)->getValue();
2197 const APInt& highValue = cast<ConstantInt>(I->High)->getValue();
2198
2199 uint64_t lo = (lowValue - lowBound).getZExtValue();
2200 uint64_t hi = (highValue - lowBound).getZExtValue();
2201
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002202 for (uint64_t j = lo; j <= hi; j++) {
2203 CasesBits[i].Mask |= 1ULL << j;
2204 CasesBits[i].Bits++;
2205 }
Anton Korobeynikov23218582008-12-23 22:25:27 +00002206
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002207 }
2208 std::sort(CasesBits.begin(), CasesBits.end(), CaseBitsCmp());
Anton Korobeynikov23218582008-12-23 22:25:27 +00002209
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002210 BitTestInfo BTC;
2211
2212 // Figure out which block is immediately after the current one.
2213 MachineFunction::iterator BBI = CR.CaseBB;
2214 ++BBI;
2215
2216 const BasicBlock *LLVMBB = CR.CaseBB->getBasicBlock();
2217
David Greene4b69d992010-01-05 01:24:57 +00002218 DEBUG(dbgs() << "Cases:\n");
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002219 for (unsigned i = 0, e = CasesBits.size(); i!=e; ++i) {
David Greene4b69d992010-01-05 01:24:57 +00002220 DEBUG(dbgs() << "Mask: " << CasesBits[i].Mask
Anton Korobeynikov56d245b2008-12-23 22:26:18 +00002221 << ", Bits: " << CasesBits[i].Bits
2222 << ", BB: " << CasesBits[i].BB << '\n');
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002223
2224 MachineBasicBlock *CaseBB = CurMF->CreateMachineBasicBlock(LLVMBB);
2225 CurMF->insert(BBI, CaseBB);
2226 BTC.push_back(BitTestCase(CasesBits[i].Mask,
2227 CaseBB,
2228 CasesBits[i].BB));
Dan Gohman8e5c0da2009-04-09 02:33:36 +00002229
2230 // Put SV in a virtual register to make it available from the new blocks.
2231 ExportFromCurrentBlock(SV);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002232 }
Anton Korobeynikov23218582008-12-23 22:25:27 +00002233
2234 BitTestBlock BTB(lowBound, cmpRange, SV,
Evan Chengd08e5b42011-01-06 01:02:44 +00002235 -1U, MVT::Other, (CR.CaseBB == SwitchBB),
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002236 CR.CaseBB, Default, BTC);
2237
Dan Gohman99be8ae2010-04-19 22:41:47 +00002238 if (CR.CaseBB == SwitchBB)
2239 visitBitTestHeader(BTB, SwitchBB);
Anton Korobeynikov23218582008-12-23 22:25:27 +00002240
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002241 BitTestCases.push_back(BTB);
2242
2243 return true;
2244}
2245
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002246/// Clusterify - Transform simple list of Cases into list of CaseRange's
Dan Gohman2048b852009-11-23 18:04:58 +00002247size_t SelectionDAGBuilder::Clusterify(CaseVector& Cases,
2248 const SwitchInst& SI) {
Anton Korobeynikov23218582008-12-23 22:25:27 +00002249 size_t numCmps = 0;
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002250
2251 // Start with "simple" cases
Anton Korobeynikov23218582008-12-23 22:25:27 +00002252 for (size_t i = 1; i < SI.getNumSuccessors(); ++i) {
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002253 MachineBasicBlock *SMBB = FuncInfo.MBBMap[SI.getSuccessor(i)];
2254 Cases.push_back(Case(SI.getSuccessorValue(i),
2255 SI.getSuccessorValue(i),
2256 SMBB));
2257 }
2258 std::sort(Cases.begin(), Cases.end(), CaseCmp());
2259
2260 // Merge case into clusters
Anton Korobeynikov23218582008-12-23 22:25:27 +00002261 if (Cases.size() >= 2)
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002262 // Must recompute end() each iteration because it may be
2263 // invalidated by erase if we hold on to it
Nick Lewyckyed4efd32011-01-28 04:00:15 +00002264 for (CaseItr I = Cases.begin(), J = llvm::next(Cases.begin());
2265 J != Cases.end(); ) {
Anton Korobeynikov23218582008-12-23 22:25:27 +00002266 const APInt& nextValue = cast<ConstantInt>(J->Low)->getValue();
2267 const APInt& currentValue = cast<ConstantInt>(I->High)->getValue();
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002268 MachineBasicBlock* nextBB = J->BB;
2269 MachineBasicBlock* currentBB = I->BB;
2270
2271 // If the two neighboring cases go to the same destination, merge them
2272 // into a single case.
Anton Korobeynikov23218582008-12-23 22:25:27 +00002273 if ((nextValue - currentValue == 1) && (currentBB == nextBB)) {
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002274 I->High = J->High;
2275 J = Cases.erase(J);
2276 } else {
2277 I = J++;
2278 }
2279 }
2280
2281 for (CaseItr I=Cases.begin(), E=Cases.end(); I!=E; ++I, ++numCmps) {
2282 if (I->Low != I->High)
2283 // A range counts double, since it requires two compares.
2284 ++numCmps;
2285 }
2286
2287 return numCmps;
2288}
2289
Jakob Stoklund Olesen2622f462010-09-30 19:44:31 +00002290void SelectionDAGBuilder::UpdateSplitBlock(MachineBasicBlock *First,
2291 MachineBasicBlock *Last) {
2292 // Update JTCases.
2293 for (unsigned i = 0, e = JTCases.size(); i != e; ++i)
2294 if (JTCases[i].first.HeaderBB == First)
2295 JTCases[i].first.HeaderBB = Last;
2296
2297 // Update BitTestCases.
2298 for (unsigned i = 0, e = BitTestCases.size(); i != e; ++i)
2299 if (BitTestCases[i].Parent == First)
2300 BitTestCases[i].Parent = Last;
2301}
2302
Dan Gohman46510a72010-04-15 01:51:59 +00002303void SelectionDAGBuilder::visitSwitch(const SwitchInst &SI) {
Dan Gohman84023e02010-07-10 09:00:22 +00002304 MachineBasicBlock *SwitchMBB = FuncInfo.MBB;
Dan Gohman99be8ae2010-04-19 22:41:47 +00002305
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002306 // Figure out which block is immediately after the current one.
2307 MachineBasicBlock *NextBlock = 0;
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002308 MachineBasicBlock *Default = FuncInfo.MBBMap[SI.getDefaultDest()];
2309
2310 // If there is only the default destination, branch to it if it is not the
2311 // next basic block. Otherwise, just fall through.
2312 if (SI.getNumOperands() == 2) {
2313 // Update machine-CFG edges.
2314
2315 // If this is not a fall-through branch, emit the branch.
Dan Gohman99be8ae2010-04-19 22:41:47 +00002316 SwitchMBB->addSuccessor(Default);
Bill Wendling4533cac2010-01-28 21:51:40 +00002317 if (Default != NextBlock)
2318 DAG.setRoot(DAG.getNode(ISD::BR, getCurDebugLoc(),
2319 MVT::Other, getControlRoot(),
2320 DAG.getBasicBlock(Default)));
Bill Wendling49fcff82009-12-21 22:30:11 +00002321
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002322 return;
2323 }
Anton Korobeynikov23218582008-12-23 22:25:27 +00002324
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002325 // If there are any non-default case statements, create a vector of Cases
2326 // representing each one, and sort the vector so that we can efficiently
2327 // create a binary search tree from them.
2328 CaseVector Cases;
Anton Korobeynikov23218582008-12-23 22:25:27 +00002329 size_t numCmps = Clusterify(Cases, SI);
David Greene4b69d992010-01-05 01:24:57 +00002330 DEBUG(dbgs() << "Clusterify finished. Total clusters: " << Cases.size()
Anton Korobeynikov56d245b2008-12-23 22:26:18 +00002331 << ". Total compares: " << numCmps << '\n');
Devang Patel8a84e442009-01-05 17:31:22 +00002332 numCmps = 0;
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002333
2334 // Get the Value to be switched on and default basic blocks, which will be
2335 // inserted into CaseBlock records, representing basic blocks in the binary
2336 // search tree.
Dan Gohman46510a72010-04-15 01:51:59 +00002337 const Value *SV = SI.getOperand(0);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002338
2339 // Push the initial CaseRec onto the worklist
2340 CaseRecVector WorkList;
Dan Gohman99be8ae2010-04-19 22:41:47 +00002341 WorkList.push_back(CaseRec(SwitchMBB,0,0,
2342 CaseRange(Cases.begin(),Cases.end())));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002343
2344 while (!WorkList.empty()) {
2345 // Grab a record representing a case range to process off the worklist
2346 CaseRec CR = WorkList.back();
2347 WorkList.pop_back();
2348
Dan Gohman99be8ae2010-04-19 22:41:47 +00002349 if (handleBitTestsSwitchCase(CR, WorkList, SV, Default, SwitchMBB))
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002350 continue;
Anton Korobeynikov23218582008-12-23 22:25:27 +00002351
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002352 // If the range has few cases (two or less) emit a series of specific
2353 // tests.
Dan Gohman99be8ae2010-04-19 22:41:47 +00002354 if (handleSmallSwitchRange(CR, WorkList, SV, Default, SwitchMBB))
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002355 continue;
Anton Korobeynikov23218582008-12-23 22:25:27 +00002356
Anton Korobeynikove2f95e92008-12-23 22:26:01 +00002357 // If the switch has more than 5 blocks, and at least 40% dense, and the
2358 // target supports indirect branches, then emit a jump table rather than
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002359 // lowering the switch to a binary tree of conditional branches.
Dan Gohman99be8ae2010-04-19 22:41:47 +00002360 if (handleJTSwitchCase(CR, WorkList, SV, Default, SwitchMBB))
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002361 continue;
Anton Korobeynikov23218582008-12-23 22:25:27 +00002362
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002363 // Emit binary tree. We need to pick a pivot, and push left and right ranges
2364 // onto the worklist. Leafs are handled via handleSmallSwitchRange() call.
Dan Gohman99be8ae2010-04-19 22:41:47 +00002365 handleBTSplitSwitchCase(CR, WorkList, SV, Default, SwitchMBB);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002366 }
2367}
2368
Dan Gohman46510a72010-04-15 01:51:59 +00002369void SelectionDAGBuilder::visitIndirectBr(const IndirectBrInst &I) {
Dan Gohman84023e02010-07-10 09:00:22 +00002370 MachineBasicBlock *IndirectBrMBB = FuncInfo.MBB;
Dan Gohman99be8ae2010-04-19 22:41:47 +00002371
Jakob Stoklund Olesen598b24c2010-02-11 00:34:18 +00002372 // Update machine-CFG edges with unique successors.
Jakob Stoklund Olesenb5b90ed2010-02-11 18:06:56 +00002373 SmallVector<BasicBlock*, 32> succs;
Jakob Stoklund Olesen598b24c2010-02-11 00:34:18 +00002374 succs.reserve(I.getNumSuccessors());
Dan Gohmaneef55dc2009-10-27 22:10:34 +00002375 for (unsigned i = 0, e = I.getNumSuccessors(); i != e; ++i)
Jakob Stoklund Olesen598b24c2010-02-11 00:34:18 +00002376 succs.push_back(I.getSuccessor(i));
Jakob Stoklund Olesenb5b90ed2010-02-11 18:06:56 +00002377 array_pod_sort(succs.begin(), succs.end());
Jakob Stoklund Olesen598b24c2010-02-11 00:34:18 +00002378 succs.erase(std::unique(succs.begin(), succs.end()), succs.end());
2379 for (unsigned i = 0, e = succs.size(); i != e; ++i)
Dan Gohman99be8ae2010-04-19 22:41:47 +00002380 IndirectBrMBB->addSuccessor(FuncInfo.MBBMap[succs[i]]);
Dan Gohmaneef55dc2009-10-27 22:10:34 +00002381
Bill Wendling4533cac2010-01-28 21:51:40 +00002382 DAG.setRoot(DAG.getNode(ISD::BRIND, getCurDebugLoc(),
2383 MVT::Other, getControlRoot(),
2384 getValue(I.getAddress())));
Bill Wendling49fcff82009-12-21 22:30:11 +00002385}
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002386
Dan Gohman46510a72010-04-15 01:51:59 +00002387void SelectionDAGBuilder::visitFSub(const User &I) {
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002388 // -0.0 - X --> fneg
2389 const Type *Ty = I.getType();
Duncan Sands1df98592010-02-16 11:11:14 +00002390 if (Ty->isVectorTy()) {
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002391 if (ConstantVector *CV = dyn_cast<ConstantVector>(I.getOperand(0))) {
2392 const VectorType *DestTy = cast<VectorType>(I.getType());
2393 const Type *ElTy = DestTy->getElementType();
Dan Gohmanae3a0be2009-06-04 22:49:04 +00002394 unsigned VL = DestTy->getNumElements();
Owen Anderson6f83c9c2009-07-27 20:59:43 +00002395 std::vector<Constant*> NZ(VL, ConstantFP::getNegativeZero(ElTy));
Owen Andersonaf7ec972009-07-28 21:19:26 +00002396 Constant *CNZ = ConstantVector::get(&NZ[0], NZ.size());
Dan Gohmanae3a0be2009-06-04 22:49:04 +00002397 if (CV == CNZ) {
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002398 SDValue Op2 = getValue(I.getOperand(1));
Bill Wendling4533cac2010-01-28 21:51:40 +00002399 setValue(&I, DAG.getNode(ISD::FNEG, getCurDebugLoc(),
2400 Op2.getValueType(), Op2));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002401 return;
2402 }
Dan Gohmanae3a0be2009-06-04 22:49:04 +00002403 }
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002404 }
Bill Wendling49fcff82009-12-21 22:30:11 +00002405
Dan Gohmanae3a0be2009-06-04 22:49:04 +00002406 if (ConstantFP *CFP = dyn_cast<ConstantFP>(I.getOperand(0)))
Owen Anderson6f83c9c2009-07-27 20:59:43 +00002407 if (CFP->isExactlyValue(ConstantFP::getNegativeZero(Ty)->getValueAPF())) {
Dan Gohmanae3a0be2009-06-04 22:49:04 +00002408 SDValue Op2 = getValue(I.getOperand(1));
Bill Wendling4533cac2010-01-28 21:51:40 +00002409 setValue(&I, DAG.getNode(ISD::FNEG, getCurDebugLoc(),
2410 Op2.getValueType(), Op2));
Dan Gohmanae3a0be2009-06-04 22:49:04 +00002411 return;
2412 }
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002413
Dan Gohmanae3a0be2009-06-04 22:49:04 +00002414 visitBinary(I, ISD::FSUB);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002415}
2416
Dan Gohman46510a72010-04-15 01:51:59 +00002417void SelectionDAGBuilder::visitBinary(const User &I, unsigned OpCode) {
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002418 SDValue Op1 = getValue(I.getOperand(0));
2419 SDValue Op2 = getValue(I.getOperand(1));
Bill Wendling4533cac2010-01-28 21:51:40 +00002420 setValue(&I, DAG.getNode(OpCode, getCurDebugLoc(),
2421 Op1.getValueType(), Op1, Op2));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002422}
2423
Dan Gohman46510a72010-04-15 01:51:59 +00002424void SelectionDAGBuilder::visitShift(const User &I, unsigned Opcode) {
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002425 SDValue Op1 = getValue(I.getOperand(0));
2426 SDValue Op2 = getValue(I.getOperand(1));
Chris Lattnerd3027732011-02-13 09:02:52 +00002427
2428 MVT ShiftTy = TLI.getShiftAmountTy();
Chris Lattnerd3027732011-02-13 09:02:52 +00002429
2430 // Coerce the shift amount to the right type if we can.
2431 if (!I.getType()->isVectorTy() && Op2.getValueType() != ShiftTy) {
Chris Lattner915eeb42011-02-13 09:10:56 +00002432 unsigned ShiftSize = ShiftTy.getSizeInBits();
2433 unsigned Op2Size = Op2.getValueType().getSizeInBits();
Chris Lattnerd3027732011-02-13 09:02:52 +00002434 DebugLoc DL = getCurDebugLoc();
2435
Dan Gohman57fc82d2009-04-09 03:51:29 +00002436 // If the operand is smaller than the shift count type, promote it.
Chris Lattnerd3027732011-02-13 09:02:52 +00002437 MVT PtrTy = TLI.getPointerTy();
2438 if (ShiftSize > Op2Size)
2439 Op2 = DAG.getNode(ISD::ZERO_EXTEND, DL, ShiftTy, Op2);
2440
Dan Gohman57fc82d2009-04-09 03:51:29 +00002441 // If the operand is larger than the shift count type but the shift
2442 // count type has enough bits to represent any shift value, truncate
2443 // it now. This is a common case and it exposes the truncate to
2444 // optimization early.
Chris Lattnerd3027732011-02-13 09:02:52 +00002445 else if (ShiftSize >= Log2_32_Ceil(Op2.getValueType().getSizeInBits()))
2446 Op2 = DAG.getNode(ISD::TRUNCATE, DL, ShiftTy, Op2);
2447 // Otherwise we'll need to temporarily settle for some other convenient
2448 // type. Type legalization will make adjustments as needed.
2449 else
2450 Op2 = DAG.getZExtOrTrunc(Op2, DL, PtrTy);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002451 }
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00002452
Bill Wendling4533cac2010-01-28 21:51:40 +00002453 setValue(&I, DAG.getNode(Opcode, getCurDebugLoc(),
2454 Op1.getValueType(), Op1, Op2));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002455}
2456
Dan Gohman46510a72010-04-15 01:51:59 +00002457void SelectionDAGBuilder::visitICmp(const User &I) {
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002458 ICmpInst::Predicate predicate = ICmpInst::BAD_ICMP_PREDICATE;
Dan Gohman46510a72010-04-15 01:51:59 +00002459 if (const ICmpInst *IC = dyn_cast<ICmpInst>(&I))
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002460 predicate = IC->getPredicate();
Dan Gohman46510a72010-04-15 01:51:59 +00002461 else if (const ConstantExpr *IC = dyn_cast<ConstantExpr>(&I))
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002462 predicate = ICmpInst::Predicate(IC->getPredicate());
2463 SDValue Op1 = getValue(I.getOperand(0));
2464 SDValue Op2 = getValue(I.getOperand(1));
Dan Gohman8c1a6ca2008-10-17 18:18:45 +00002465 ISD::CondCode Opcode = getICmpCondCode(predicate);
Mikhail Glushenkovb3c01992010-01-01 04:41:22 +00002466
Owen Andersone50ed302009-08-10 22:56:29 +00002467 EVT DestVT = TLI.getValueType(I.getType());
Bill Wendling4533cac2010-01-28 21:51:40 +00002468 setValue(&I, DAG.getSetCC(getCurDebugLoc(), DestVT, Op1, Op2, Opcode));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002469}
2470
Dan Gohman46510a72010-04-15 01:51:59 +00002471void SelectionDAGBuilder::visitFCmp(const User &I) {
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002472 FCmpInst::Predicate predicate = FCmpInst::BAD_FCMP_PREDICATE;
Dan Gohman46510a72010-04-15 01:51:59 +00002473 if (const FCmpInst *FC = dyn_cast<FCmpInst>(&I))
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002474 predicate = FC->getPredicate();
Dan Gohman46510a72010-04-15 01:51:59 +00002475 else if (const ConstantExpr *FC = dyn_cast<ConstantExpr>(&I))
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002476 predicate = FCmpInst::Predicate(FC->getPredicate());
2477 SDValue Op1 = getValue(I.getOperand(0));
2478 SDValue Op2 = getValue(I.getOperand(1));
Dan Gohman8c1a6ca2008-10-17 18:18:45 +00002479 ISD::CondCode Condition = getFCmpCondCode(predicate);
Owen Andersone50ed302009-08-10 22:56:29 +00002480 EVT DestVT = TLI.getValueType(I.getType());
Bill Wendling4533cac2010-01-28 21:51:40 +00002481 setValue(&I, DAG.getSetCC(getCurDebugLoc(), DestVT, Op1, Op2, Condition));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002482}
2483
Dan Gohman46510a72010-04-15 01:51:59 +00002484void SelectionDAGBuilder::visitSelect(const User &I) {
Owen Andersone50ed302009-08-10 22:56:29 +00002485 SmallVector<EVT, 4> ValueVTs;
Dan Gohman7ea1ca62008-10-21 20:00:42 +00002486 ComputeValueVTs(TLI, I.getType(), ValueVTs);
2487 unsigned NumValues = ValueVTs.size();
Bill Wendling49fcff82009-12-21 22:30:11 +00002488 if (NumValues == 0) return;
Dan Gohman7ea1ca62008-10-21 20:00:42 +00002489
Bill Wendling49fcff82009-12-21 22:30:11 +00002490 SmallVector<SDValue, 4> Values(NumValues);
2491 SDValue Cond = getValue(I.getOperand(0));
2492 SDValue TrueVal = getValue(I.getOperand(1));
2493 SDValue FalseVal = getValue(I.getOperand(2));
Dan Gohman7ea1ca62008-10-21 20:00:42 +00002494
Bill Wendling4533cac2010-01-28 21:51:40 +00002495 for (unsigned i = 0; i != NumValues; ++i)
Bill Wendling49fcff82009-12-21 22:30:11 +00002496 Values[i] = DAG.getNode(ISD::SELECT, getCurDebugLoc(),
Chris Lattnerb3e87b22010-03-12 07:15:36 +00002497 TrueVal.getNode()->getValueType(TrueVal.getResNo()+i),
2498 Cond,
Bill Wendling49fcff82009-12-21 22:30:11 +00002499 SDValue(TrueVal.getNode(),
2500 TrueVal.getResNo() + i),
2501 SDValue(FalseVal.getNode(),
2502 FalseVal.getResNo() + i));
2503
Bill Wendling4533cac2010-01-28 21:51:40 +00002504 setValue(&I, DAG.getNode(ISD::MERGE_VALUES, getCurDebugLoc(),
2505 DAG.getVTList(&ValueVTs[0], NumValues),
2506 &Values[0], NumValues));
Bill Wendling49fcff82009-12-21 22:30:11 +00002507}
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002508
Dan Gohman46510a72010-04-15 01:51:59 +00002509void SelectionDAGBuilder::visitTrunc(const User &I) {
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002510 // TruncInst cannot be a no-op cast because sizeof(src) > sizeof(dest).
2511 SDValue N = getValue(I.getOperand(0));
Owen Andersone50ed302009-08-10 22:56:29 +00002512 EVT DestVT = TLI.getValueType(I.getType());
Bill Wendling4533cac2010-01-28 21:51:40 +00002513 setValue(&I, DAG.getNode(ISD::TRUNCATE, getCurDebugLoc(), DestVT, N));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002514}
2515
Dan Gohman46510a72010-04-15 01:51:59 +00002516void SelectionDAGBuilder::visitZExt(const User &I) {
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002517 // ZExt cannot be a no-op cast because sizeof(src) < sizeof(dest).
2518 // ZExt also can't be a cast to bool for same reason. So, nothing much to do
2519 SDValue N = getValue(I.getOperand(0));
Owen Andersone50ed302009-08-10 22:56:29 +00002520 EVT DestVT = TLI.getValueType(I.getType());
Bill Wendling4533cac2010-01-28 21:51:40 +00002521 setValue(&I, DAG.getNode(ISD::ZERO_EXTEND, getCurDebugLoc(), DestVT, N));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002522}
2523
Dan Gohman46510a72010-04-15 01:51:59 +00002524void SelectionDAGBuilder::visitSExt(const User &I) {
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002525 // SExt cannot be a no-op cast because sizeof(src) < sizeof(dest).
2526 // SExt also can't be a cast to bool for same reason. So, nothing much to do
2527 SDValue N = getValue(I.getOperand(0));
Owen Andersone50ed302009-08-10 22:56:29 +00002528 EVT DestVT = TLI.getValueType(I.getType());
Bill Wendling4533cac2010-01-28 21:51:40 +00002529 setValue(&I, DAG.getNode(ISD::SIGN_EXTEND, getCurDebugLoc(), DestVT, N));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002530}
2531
Dan Gohman46510a72010-04-15 01:51:59 +00002532void SelectionDAGBuilder::visitFPTrunc(const User &I) {
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002533 // FPTrunc is never a no-op cast, no need to check
2534 SDValue N = getValue(I.getOperand(0));
Owen Andersone50ed302009-08-10 22:56:29 +00002535 EVT DestVT = TLI.getValueType(I.getType());
Bill Wendling4533cac2010-01-28 21:51:40 +00002536 setValue(&I, DAG.getNode(ISD::FP_ROUND, getCurDebugLoc(),
2537 DestVT, N, DAG.getIntPtrConstant(0)));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002538}
2539
Dan Gohman46510a72010-04-15 01:51:59 +00002540void SelectionDAGBuilder::visitFPExt(const User &I){
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002541 // FPTrunc is never a no-op cast, no need to check
2542 SDValue N = getValue(I.getOperand(0));
Owen Andersone50ed302009-08-10 22:56:29 +00002543 EVT DestVT = TLI.getValueType(I.getType());
Bill Wendling4533cac2010-01-28 21:51:40 +00002544 setValue(&I, DAG.getNode(ISD::FP_EXTEND, getCurDebugLoc(), DestVT, N));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002545}
2546
Dan Gohman46510a72010-04-15 01:51:59 +00002547void SelectionDAGBuilder::visitFPToUI(const User &I) {
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002548 // FPToUI is never a no-op cast, no need to check
2549 SDValue N = getValue(I.getOperand(0));
Owen Andersone50ed302009-08-10 22:56:29 +00002550 EVT DestVT = TLI.getValueType(I.getType());
Bill Wendling4533cac2010-01-28 21:51:40 +00002551 setValue(&I, DAG.getNode(ISD::FP_TO_UINT, getCurDebugLoc(), DestVT, N));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002552}
2553
Dan Gohman46510a72010-04-15 01:51:59 +00002554void SelectionDAGBuilder::visitFPToSI(const User &I) {
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002555 // FPToSI is never a no-op cast, no need to check
2556 SDValue N = getValue(I.getOperand(0));
Owen Andersone50ed302009-08-10 22:56:29 +00002557 EVT DestVT = TLI.getValueType(I.getType());
Bill Wendling4533cac2010-01-28 21:51:40 +00002558 setValue(&I, DAG.getNode(ISD::FP_TO_SINT, getCurDebugLoc(), DestVT, N));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002559}
2560
Dan Gohman46510a72010-04-15 01:51:59 +00002561void SelectionDAGBuilder::visitUIToFP(const User &I) {
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002562 // UIToFP is never a no-op cast, no need to check
2563 SDValue N = getValue(I.getOperand(0));
Owen Andersone50ed302009-08-10 22:56:29 +00002564 EVT DestVT = TLI.getValueType(I.getType());
Bill Wendling4533cac2010-01-28 21:51:40 +00002565 setValue(&I, DAG.getNode(ISD::UINT_TO_FP, getCurDebugLoc(), DestVT, N));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002566}
2567
Dan Gohman46510a72010-04-15 01:51:59 +00002568void SelectionDAGBuilder::visitSIToFP(const User &I){
Bill Wendling181b6272008-10-19 20:34:04 +00002569 // SIToFP is never a no-op cast, no need to check
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002570 SDValue N = getValue(I.getOperand(0));
Owen Andersone50ed302009-08-10 22:56:29 +00002571 EVT DestVT = TLI.getValueType(I.getType());
Bill Wendling4533cac2010-01-28 21:51:40 +00002572 setValue(&I, DAG.getNode(ISD::SINT_TO_FP, getCurDebugLoc(), DestVT, N));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002573}
2574
Dan Gohman46510a72010-04-15 01:51:59 +00002575void SelectionDAGBuilder::visitPtrToInt(const User &I) {
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002576 // What to do depends on the size of the integer and the size of the pointer.
2577 // We can either truncate, zero extend, or no-op, accordingly.
2578 SDValue N = getValue(I.getOperand(0));
Owen Andersone50ed302009-08-10 22:56:29 +00002579 EVT DestVT = TLI.getValueType(I.getType());
Bill Wendling4533cac2010-01-28 21:51:40 +00002580 setValue(&I, DAG.getZExtOrTrunc(N, getCurDebugLoc(), DestVT));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002581}
2582
Dan Gohman46510a72010-04-15 01:51:59 +00002583void SelectionDAGBuilder::visitIntToPtr(const User &I) {
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002584 // What to do depends on the size of the integer and the size of the pointer.
2585 // We can either truncate, zero extend, or no-op, accordingly.
2586 SDValue N = getValue(I.getOperand(0));
Owen Andersone50ed302009-08-10 22:56:29 +00002587 EVT DestVT = TLI.getValueType(I.getType());
Bill Wendling4533cac2010-01-28 21:51:40 +00002588 setValue(&I, DAG.getZExtOrTrunc(N, getCurDebugLoc(), DestVT));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002589}
2590
Dan Gohman46510a72010-04-15 01:51:59 +00002591void SelectionDAGBuilder::visitBitCast(const User &I) {
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002592 SDValue N = getValue(I.getOperand(0));
Owen Andersone50ed302009-08-10 22:56:29 +00002593 EVT DestVT = TLI.getValueType(I.getType());
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002594
Bill Wendling49fcff82009-12-21 22:30:11 +00002595 // BitCast assures us that source and destination are the same size so this is
Wesley Peckbf17cfa2010-11-23 03:31:01 +00002596 // either a BITCAST or a no-op.
Bill Wendling4533cac2010-01-28 21:51:40 +00002597 if (DestVT != N.getValueType())
Wesley Peckbf17cfa2010-11-23 03:31:01 +00002598 setValue(&I, DAG.getNode(ISD::BITCAST, getCurDebugLoc(),
Bill Wendling4533cac2010-01-28 21:51:40 +00002599 DestVT, N)); // convert types.
2600 else
Bill Wendling49fcff82009-12-21 22:30:11 +00002601 setValue(&I, N); // noop cast.
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002602}
2603
Dan Gohman46510a72010-04-15 01:51:59 +00002604void SelectionDAGBuilder::visitInsertElement(const User &I) {
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002605 SDValue InVec = getValue(I.getOperand(0));
2606 SDValue InVal = getValue(I.getOperand(1));
Scott Michelfdc40a02009-02-17 22:15:04 +00002607 SDValue InIdx = DAG.getNode(ISD::ZERO_EXTEND, getCurDebugLoc(),
Bill Wendling87710f02009-12-21 23:47:40 +00002608 TLI.getPointerTy(),
2609 getValue(I.getOperand(2)));
Bill Wendling4533cac2010-01-28 21:51:40 +00002610 setValue(&I, DAG.getNode(ISD::INSERT_VECTOR_ELT, getCurDebugLoc(),
2611 TLI.getValueType(I.getType()),
2612 InVec, InVal, InIdx));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002613}
2614
Dan Gohman46510a72010-04-15 01:51:59 +00002615void SelectionDAGBuilder::visitExtractElement(const User &I) {
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002616 SDValue InVec = getValue(I.getOperand(0));
Scott Michelfdc40a02009-02-17 22:15:04 +00002617 SDValue InIdx = DAG.getNode(ISD::ZERO_EXTEND, getCurDebugLoc(),
Bill Wendling87710f02009-12-21 23:47:40 +00002618 TLI.getPointerTy(),
2619 getValue(I.getOperand(1)));
Bill Wendling4533cac2010-01-28 21:51:40 +00002620 setValue(&I, DAG.getNode(ISD::EXTRACT_VECTOR_ELT, getCurDebugLoc(),
2621 TLI.getValueType(I.getType()), InVec, InIdx));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002622}
2623
Mon P Wangaeb06d22008-11-10 04:46:22 +00002624// Utility for visitShuffleVector - Returns true if the mask is mask starting
2625// from SIndx and increasing to the element length (undefs are allowed).
Nate Begeman5a5ca152009-04-29 05:20:52 +00002626static bool SequentialMask(SmallVectorImpl<int> &Mask, unsigned SIndx) {
2627 unsigned MaskNumElts = Mask.size();
2628 for (unsigned i = 0; i != MaskNumElts; ++i)
2629 if ((Mask[i] >= 0) && (Mask[i] != (int)(i + SIndx)))
Nate Begeman9008ca62009-04-27 18:41:29 +00002630 return false;
Mon P Wangaeb06d22008-11-10 04:46:22 +00002631 return true;
2632}
2633
Dan Gohman46510a72010-04-15 01:51:59 +00002634void SelectionDAGBuilder::visitShuffleVector(const User &I) {
Nate Begeman9008ca62009-04-27 18:41:29 +00002635 SmallVector<int, 8> Mask;
Mon P Wang230e4fa2008-11-21 04:25:21 +00002636 SDValue Src1 = getValue(I.getOperand(0));
2637 SDValue Src2 = getValue(I.getOperand(1));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002638
Nate Begeman9008ca62009-04-27 18:41:29 +00002639 // Convert the ConstantVector mask operand into an array of ints, with -1
2640 // representing undef values.
2641 SmallVector<Constant*, 8> MaskElts;
Chris Lattnerb29d5962010-02-01 20:48:08 +00002642 cast<Constant>(I.getOperand(2))->getVectorElements(MaskElts);
Nate Begeman5a5ca152009-04-29 05:20:52 +00002643 unsigned MaskNumElts = MaskElts.size();
2644 for (unsigned i = 0; i != MaskNumElts; ++i) {
Nate Begeman9008ca62009-04-27 18:41:29 +00002645 if (isa<UndefValue>(MaskElts[i]))
2646 Mask.push_back(-1);
2647 else
2648 Mask.push_back(cast<ConstantInt>(MaskElts[i])->getSExtValue());
2649 }
Mikhail Glushenkovb3c01992010-01-01 04:41:22 +00002650
Owen Andersone50ed302009-08-10 22:56:29 +00002651 EVT VT = TLI.getValueType(I.getType());
2652 EVT SrcVT = Src1.getValueType();
Nate Begeman5a5ca152009-04-29 05:20:52 +00002653 unsigned SrcNumElts = SrcVT.getVectorNumElements();
Mon P Wangaeb06d22008-11-10 04:46:22 +00002654
Mon P Wangc7849c22008-11-16 05:06:27 +00002655 if (SrcNumElts == MaskNumElts) {
Bill Wendling4533cac2010-01-28 21:51:40 +00002656 setValue(&I, DAG.getVectorShuffle(VT, getCurDebugLoc(), Src1, Src2,
2657 &Mask[0]));
Mon P Wangaeb06d22008-11-10 04:46:22 +00002658 return;
2659 }
2660
2661 // Normalize the shuffle vector since mask and vector length don't match.
Mon P Wangc7849c22008-11-16 05:06:27 +00002662 if (SrcNumElts < MaskNumElts && MaskNumElts % SrcNumElts == 0) {
2663 // Mask is longer than the source vectors and is a multiple of the source
2664 // vectors. We can use concatenate vector to make the mask and vectors
Mon P Wang230e4fa2008-11-21 04:25:21 +00002665 // lengths match.
Mon P Wangc7849c22008-11-16 05:06:27 +00002666 if (SrcNumElts*2 == MaskNumElts && SequentialMask(Mask, 0)) {
2667 // The shuffle is concatenating two vectors together.
Bill Wendling4533cac2010-01-28 21:51:40 +00002668 setValue(&I, DAG.getNode(ISD::CONCAT_VECTORS, getCurDebugLoc(),
2669 VT, Src1, Src2));
Mon P Wangaeb06d22008-11-10 04:46:22 +00002670 return;
2671 }
2672
Mon P Wangc7849c22008-11-16 05:06:27 +00002673 // Pad both vectors with undefs to make them the same length as the mask.
2674 unsigned NumConcat = MaskNumElts / SrcNumElts;
Nate Begeman9008ca62009-04-27 18:41:29 +00002675 bool Src1U = Src1.getOpcode() == ISD::UNDEF;
2676 bool Src2U = Src2.getOpcode() == ISD::UNDEF;
Dale Johannesene8d72302009-02-06 23:05:02 +00002677 SDValue UndefVal = DAG.getUNDEF(SrcVT);
Mon P Wangaeb06d22008-11-10 04:46:22 +00002678
Nate Begeman9008ca62009-04-27 18:41:29 +00002679 SmallVector<SDValue, 8> MOps1(NumConcat, UndefVal);
2680 SmallVector<SDValue, 8> MOps2(NumConcat, UndefVal);
Mon P Wang230e4fa2008-11-21 04:25:21 +00002681 MOps1[0] = Src1;
2682 MOps2[0] = Src2;
Mikhail Glushenkovb3c01992010-01-01 04:41:22 +00002683
2684 Src1 = Src1U ? DAG.getUNDEF(VT) : DAG.getNode(ISD::CONCAT_VECTORS,
2685 getCurDebugLoc(), VT,
Nate Begeman9008ca62009-04-27 18:41:29 +00002686 &MOps1[0], NumConcat);
2687 Src2 = Src2U ? DAG.getUNDEF(VT) : DAG.getNode(ISD::CONCAT_VECTORS,
Mikhail Glushenkovb3c01992010-01-01 04:41:22 +00002688 getCurDebugLoc(), VT,
Nate Begeman9008ca62009-04-27 18:41:29 +00002689 &MOps2[0], NumConcat);
Mon P Wang230e4fa2008-11-21 04:25:21 +00002690
Mon P Wangaeb06d22008-11-10 04:46:22 +00002691 // Readjust mask for new input vector length.
Nate Begeman9008ca62009-04-27 18:41:29 +00002692 SmallVector<int, 8> MappedOps;
Nate Begeman5a5ca152009-04-29 05:20:52 +00002693 for (unsigned i = 0; i != MaskNumElts; ++i) {
Nate Begeman9008ca62009-04-27 18:41:29 +00002694 int Idx = Mask[i];
Nate Begeman5a5ca152009-04-29 05:20:52 +00002695 if (Idx < (int)SrcNumElts)
Nate Begeman9008ca62009-04-27 18:41:29 +00002696 MappedOps.push_back(Idx);
2697 else
2698 MappedOps.push_back(Idx + MaskNumElts - SrcNumElts);
Mon P Wangaeb06d22008-11-10 04:46:22 +00002699 }
Bill Wendlingb85b6e82009-12-21 22:42:14 +00002700
Bill Wendling4533cac2010-01-28 21:51:40 +00002701 setValue(&I, DAG.getVectorShuffle(VT, getCurDebugLoc(), Src1, Src2,
2702 &MappedOps[0]));
Mon P Wangaeb06d22008-11-10 04:46:22 +00002703 return;
2704 }
2705
Mon P Wangc7849c22008-11-16 05:06:27 +00002706 if (SrcNumElts > MaskNumElts) {
Mon P Wangc7849c22008-11-16 05:06:27 +00002707 // Analyze the access pattern of the vector to see if we can extract
2708 // two subvectors and do the shuffle. The analysis is done by calculating
2709 // the range of elements the mask access on both vectors.
2710 int MinRange[2] = { SrcNumElts+1, SrcNumElts+1};
2711 int MaxRange[2] = {-1, -1};
2712
Nate Begeman5a5ca152009-04-29 05:20:52 +00002713 for (unsigned i = 0; i != MaskNumElts; ++i) {
Nate Begeman9008ca62009-04-27 18:41:29 +00002714 int Idx = Mask[i];
2715 int Input = 0;
2716 if (Idx < 0)
2717 continue;
Mikhail Glushenkovb3c01992010-01-01 04:41:22 +00002718
Nate Begeman5a5ca152009-04-29 05:20:52 +00002719 if (Idx >= (int)SrcNumElts) {
Nate Begeman9008ca62009-04-27 18:41:29 +00002720 Input = 1;
2721 Idx -= SrcNumElts;
Mon P Wangaeb06d22008-11-10 04:46:22 +00002722 }
Nate Begeman9008ca62009-04-27 18:41:29 +00002723 if (Idx > MaxRange[Input])
2724 MaxRange[Input] = Idx;
2725 if (Idx < MinRange[Input])
2726 MinRange[Input] = Idx;
Mon P Wangaeb06d22008-11-10 04:46:22 +00002727 }
Mon P Wangaeb06d22008-11-10 04:46:22 +00002728
Mon P Wangc7849c22008-11-16 05:06:27 +00002729 // Check if the access is smaller than the vector size and can we find
2730 // a reasonable extract index.
Mikhail Glushenkovb3c01992010-01-01 04:41:22 +00002731 int RangeUse[2] = { 2, 2 }; // 0 = Unused, 1 = Extract, 2 = Can not
2732 // Extract.
Mon P Wangc7849c22008-11-16 05:06:27 +00002733 int StartIdx[2]; // StartIdx to extract from
2734 for (int Input=0; Input < 2; ++Input) {
Nate Begeman5a5ca152009-04-29 05:20:52 +00002735 if (MinRange[Input] == (int)(SrcNumElts+1) && MaxRange[Input] == -1) {
Mon P Wangc7849c22008-11-16 05:06:27 +00002736 RangeUse[Input] = 0; // Unused
2737 StartIdx[Input] = 0;
Nate Begeman5a5ca152009-04-29 05:20:52 +00002738 } else if (MaxRange[Input] - MinRange[Input] < (int)MaskNumElts) {
Mon P Wangc7849c22008-11-16 05:06:27 +00002739 // Fits within range but we should see if we can find a good
Mon P Wang230e4fa2008-11-21 04:25:21 +00002740 // start index that is a multiple of the mask length.
Nate Begeman5a5ca152009-04-29 05:20:52 +00002741 if (MaxRange[Input] < (int)MaskNumElts) {
Mon P Wangc7849c22008-11-16 05:06:27 +00002742 RangeUse[Input] = 1; // Extract from beginning of the vector
2743 StartIdx[Input] = 0;
2744 } else {
2745 StartIdx[Input] = (MinRange[Input]/MaskNumElts)*MaskNumElts;
Nate Begeman5a5ca152009-04-29 05:20:52 +00002746 if (MaxRange[Input] - StartIdx[Input] < (int)MaskNumElts &&
Bob Wilson5e8b8332011-01-07 04:59:04 +00002747 StartIdx[Input] + MaskNumElts <= SrcNumElts)
Mon P Wangc7849c22008-11-16 05:06:27 +00002748 RangeUse[Input] = 1; // Extract from a multiple of the mask length.
Mon P Wangc7849c22008-11-16 05:06:27 +00002749 }
Mon P Wang230e4fa2008-11-21 04:25:21 +00002750 }
Mon P Wangc7849c22008-11-16 05:06:27 +00002751 }
2752
Bill Wendling636e2582009-08-21 18:16:06 +00002753 if (RangeUse[0] == 0 && RangeUse[1] == 0) {
Bill Wendling4533cac2010-01-28 21:51:40 +00002754 setValue(&I, DAG.getUNDEF(VT)); // Vectors are not used.
Mon P Wangc7849c22008-11-16 05:06:27 +00002755 return;
2756 }
2757 else if (RangeUse[0] < 2 && RangeUse[1] < 2) {
2758 // Extract appropriate subvector and generate a vector shuffle
2759 for (int Input=0; Input < 2; ++Input) {
Bill Wendling87710f02009-12-21 23:47:40 +00002760 SDValue &Src = Input == 0 ? Src1 : Src2;
Bill Wendlingb85b6e82009-12-21 22:42:14 +00002761 if (RangeUse[Input] == 0)
Dale Johannesene8d72302009-02-06 23:05:02 +00002762 Src = DAG.getUNDEF(VT);
Bill Wendlingb85b6e82009-12-21 22:42:14 +00002763 else
Dale Johannesen66978ee2009-01-31 02:22:37 +00002764 Src = DAG.getNode(ISD::EXTRACT_SUBVECTOR, getCurDebugLoc(), VT,
Dale Johannesenfa42dea2009-01-30 01:34:22 +00002765 Src, DAG.getIntPtrConstant(StartIdx[Input]));
Mon P Wangaeb06d22008-11-10 04:46:22 +00002766 }
Bill Wendlingb85b6e82009-12-21 22:42:14 +00002767
Mon P Wangc7849c22008-11-16 05:06:27 +00002768 // Calculate new mask.
Nate Begeman9008ca62009-04-27 18:41:29 +00002769 SmallVector<int, 8> MappedOps;
Nate Begeman5a5ca152009-04-29 05:20:52 +00002770 for (unsigned i = 0; i != MaskNumElts; ++i) {
Nate Begeman9008ca62009-04-27 18:41:29 +00002771 int Idx = Mask[i];
2772 if (Idx < 0)
2773 MappedOps.push_back(Idx);
Nate Begeman5a5ca152009-04-29 05:20:52 +00002774 else if (Idx < (int)SrcNumElts)
Nate Begeman9008ca62009-04-27 18:41:29 +00002775 MappedOps.push_back(Idx - StartIdx[0]);
2776 else
2777 MappedOps.push_back(Idx - SrcNumElts - StartIdx[1] + MaskNumElts);
Mon P Wangc7849c22008-11-16 05:06:27 +00002778 }
Bill Wendlingb85b6e82009-12-21 22:42:14 +00002779
Bill Wendling4533cac2010-01-28 21:51:40 +00002780 setValue(&I, DAG.getVectorShuffle(VT, getCurDebugLoc(), Src1, Src2,
2781 &MappedOps[0]));
Mon P Wangc7849c22008-11-16 05:06:27 +00002782 return;
Mon P Wangaeb06d22008-11-10 04:46:22 +00002783 }
2784 }
2785
Mon P Wangc7849c22008-11-16 05:06:27 +00002786 // We can't use either concat vectors or extract subvectors so fall back to
2787 // replacing the shuffle with extract and build vector.
2788 // to insert and build vector.
Owen Andersone50ed302009-08-10 22:56:29 +00002789 EVT EltVT = VT.getVectorElementType();
2790 EVT PtrVT = TLI.getPointerTy();
Mon P Wangaeb06d22008-11-10 04:46:22 +00002791 SmallVector<SDValue,8> Ops;
Nate Begeman5a5ca152009-04-29 05:20:52 +00002792 for (unsigned i = 0; i != MaskNumElts; ++i) {
Nate Begeman9008ca62009-04-27 18:41:29 +00002793 if (Mask[i] < 0) {
Dale Johannesene8d72302009-02-06 23:05:02 +00002794 Ops.push_back(DAG.getUNDEF(EltVT));
Mon P Wangaeb06d22008-11-10 04:46:22 +00002795 } else {
Nate Begeman9008ca62009-04-27 18:41:29 +00002796 int Idx = Mask[i];
Bill Wendlingb85b6e82009-12-21 22:42:14 +00002797 SDValue Res;
2798
Nate Begeman5a5ca152009-04-29 05:20:52 +00002799 if (Idx < (int)SrcNumElts)
Bill Wendlingb85b6e82009-12-21 22:42:14 +00002800 Res = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, getCurDebugLoc(),
2801 EltVT, Src1, DAG.getConstant(Idx, PtrVT));
Mon P Wangaeb06d22008-11-10 04:46:22 +00002802 else
Bill Wendlingb85b6e82009-12-21 22:42:14 +00002803 Res = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, getCurDebugLoc(),
2804 EltVT, Src2,
2805 DAG.getConstant(Idx - SrcNumElts, PtrVT));
2806
2807 Ops.push_back(Res);
Mon P Wangaeb06d22008-11-10 04:46:22 +00002808 }
2809 }
Bill Wendlingb85b6e82009-12-21 22:42:14 +00002810
Bill Wendling4533cac2010-01-28 21:51:40 +00002811 setValue(&I, DAG.getNode(ISD::BUILD_VECTOR, getCurDebugLoc(),
2812 VT, &Ops[0], Ops.size()));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002813}
2814
Dan Gohman46510a72010-04-15 01:51:59 +00002815void SelectionDAGBuilder::visitInsertValue(const InsertValueInst &I) {
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002816 const Value *Op0 = I.getOperand(0);
2817 const Value *Op1 = I.getOperand(1);
2818 const Type *AggTy = I.getType();
2819 const Type *ValTy = Op1->getType();
2820 bool IntoUndef = isa<UndefValue>(Op0);
2821 bool FromUndef = isa<UndefValue>(Op1);
2822
Dan Gohman0dadb152010-10-06 16:18:29 +00002823 unsigned LinearIndex = ComputeLinearIndex(AggTy, I.idx_begin(), I.idx_end());
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002824
Owen Andersone50ed302009-08-10 22:56:29 +00002825 SmallVector<EVT, 4> AggValueVTs;
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002826 ComputeValueVTs(TLI, AggTy, AggValueVTs);
Owen Andersone50ed302009-08-10 22:56:29 +00002827 SmallVector<EVT, 4> ValValueVTs;
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002828 ComputeValueVTs(TLI, ValTy, ValValueVTs);
2829
2830 unsigned NumAggValues = AggValueVTs.size();
2831 unsigned NumValValues = ValValueVTs.size();
2832 SmallVector<SDValue, 4> Values(NumAggValues);
2833
2834 SDValue Agg = getValue(Op0);
2835 SDValue Val = getValue(Op1);
2836 unsigned i = 0;
2837 // Copy the beginning value(s) from the original aggregate.
2838 for (; i != LinearIndex; ++i)
Dale Johannesene8d72302009-02-06 23:05:02 +00002839 Values[i] = IntoUndef ? DAG.getUNDEF(AggValueVTs[i]) :
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002840 SDValue(Agg.getNode(), Agg.getResNo() + i);
2841 // Copy values from the inserted value(s).
2842 for (; i != LinearIndex + NumValValues; ++i)
Dale Johannesene8d72302009-02-06 23:05:02 +00002843 Values[i] = FromUndef ? DAG.getUNDEF(AggValueVTs[i]) :
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002844 SDValue(Val.getNode(), Val.getResNo() + i - LinearIndex);
2845 // Copy remaining value(s) from the original aggregate.
2846 for (; i != NumAggValues; ++i)
Dale Johannesene8d72302009-02-06 23:05:02 +00002847 Values[i] = IntoUndef ? DAG.getUNDEF(AggValueVTs[i]) :
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002848 SDValue(Agg.getNode(), Agg.getResNo() + i);
2849
Bill Wendling4533cac2010-01-28 21:51:40 +00002850 setValue(&I, DAG.getNode(ISD::MERGE_VALUES, getCurDebugLoc(),
2851 DAG.getVTList(&AggValueVTs[0], NumAggValues),
2852 &Values[0], NumAggValues));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002853}
2854
Dan Gohman46510a72010-04-15 01:51:59 +00002855void SelectionDAGBuilder::visitExtractValue(const ExtractValueInst &I) {
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002856 const Value *Op0 = I.getOperand(0);
2857 const Type *AggTy = Op0->getType();
2858 const Type *ValTy = I.getType();
2859 bool OutOfUndef = isa<UndefValue>(Op0);
2860
Dan Gohman0dadb152010-10-06 16:18:29 +00002861 unsigned LinearIndex = ComputeLinearIndex(AggTy, I.idx_begin(), I.idx_end());
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002862
Owen Andersone50ed302009-08-10 22:56:29 +00002863 SmallVector<EVT, 4> ValValueVTs;
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002864 ComputeValueVTs(TLI, ValTy, ValValueVTs);
2865
2866 unsigned NumValValues = ValValueVTs.size();
2867 SmallVector<SDValue, 4> Values(NumValValues);
2868
2869 SDValue Agg = getValue(Op0);
2870 // Copy out the selected value(s).
2871 for (unsigned i = LinearIndex; i != LinearIndex + NumValValues; ++i)
2872 Values[i - LinearIndex] =
Bill Wendlingf0a2d0c2008-11-20 07:24:30 +00002873 OutOfUndef ?
Dale Johannesene8d72302009-02-06 23:05:02 +00002874 DAG.getUNDEF(Agg.getNode()->getValueType(Agg.getResNo() + i)) :
Bill Wendlingf0a2d0c2008-11-20 07:24:30 +00002875 SDValue(Agg.getNode(), Agg.getResNo() + i);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002876
Bill Wendling4533cac2010-01-28 21:51:40 +00002877 setValue(&I, DAG.getNode(ISD::MERGE_VALUES, getCurDebugLoc(),
2878 DAG.getVTList(&ValValueVTs[0], NumValValues),
2879 &Values[0], NumValValues));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002880}
2881
Dan Gohman46510a72010-04-15 01:51:59 +00002882void SelectionDAGBuilder::visitGetElementPtr(const User &I) {
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002883 SDValue N = getValue(I.getOperand(0));
2884 const Type *Ty = I.getOperand(0)->getType();
2885
Dan Gohman46510a72010-04-15 01:51:59 +00002886 for (GetElementPtrInst::const_op_iterator OI = I.op_begin()+1, E = I.op_end();
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002887 OI != E; ++OI) {
Dan Gohman46510a72010-04-15 01:51:59 +00002888 const Value *Idx = *OI;
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002889 if (const StructType *StTy = dyn_cast<StructType>(Ty)) {
2890 unsigned Field = cast<ConstantInt>(Idx)->getZExtValue();
2891 if (Field) {
2892 // N = N + Offset
2893 uint64_t Offset = TD->getStructLayout(StTy)->getElementOffset(Field);
Dale Johannesen66978ee2009-01-31 02:22:37 +00002894 N = DAG.getNode(ISD::ADD, getCurDebugLoc(), N.getValueType(), N,
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002895 DAG.getIntPtrConstant(Offset));
2896 }
Bill Wendlinge1a90422009-12-21 23:10:19 +00002897
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002898 Ty = StTy->getElementType(Field);
2899 } else {
2900 Ty = cast<SequentialType>(Ty)->getElementType();
2901
2902 // If this is a constant subscript, handle it quickly.
Dan Gohman46510a72010-04-15 01:51:59 +00002903 if (const ConstantInt *CI = dyn_cast<ConstantInt>(Idx)) {
Dan Gohmane368b462010-06-18 14:22:04 +00002904 if (CI->isZero()) continue;
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00002905 uint64_t Offs =
Duncan Sands777d2302009-05-09 07:06:46 +00002906 TD->getTypeAllocSize(Ty)*cast<ConstantInt>(CI)->getSExtValue();
Evan Cheng65b52df2009-02-09 21:01:06 +00002907 SDValue OffsVal;
Owen Andersone50ed302009-08-10 22:56:29 +00002908 EVT PTy = TLI.getPointerTy();
Owen Anderson77547be2009-08-10 18:56:59 +00002909 unsigned PtrBits = PTy.getSizeInBits();
Bill Wendlinge1a90422009-12-21 23:10:19 +00002910 if (PtrBits < 64)
Evan Cheng65b52df2009-02-09 21:01:06 +00002911 OffsVal = DAG.getNode(ISD::TRUNCATE, getCurDebugLoc(),
2912 TLI.getPointerTy(),
Owen Anderson825b72b2009-08-11 20:47:22 +00002913 DAG.getConstant(Offs, MVT::i64));
Bill Wendlinge1a90422009-12-21 23:10:19 +00002914 else
Evan Chengb1032a82009-02-09 20:54:38 +00002915 OffsVal = DAG.getIntPtrConstant(Offs);
Bill Wendlinge1a90422009-12-21 23:10:19 +00002916
Dale Johannesen66978ee2009-01-31 02:22:37 +00002917 N = DAG.getNode(ISD::ADD, getCurDebugLoc(), N.getValueType(), N,
Evan Chengb1032a82009-02-09 20:54:38 +00002918 OffsVal);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002919 continue;
2920 }
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00002921
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002922 // N = N + Idx * ElementSize;
Dan Gohman7abbd042009-10-23 17:57:43 +00002923 APInt ElementSize = APInt(TLI.getPointerTy().getSizeInBits(),
2924 TD->getTypeAllocSize(Ty));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002925 SDValue IdxN = getValue(Idx);
2926
2927 // If the index is smaller or larger than intptr_t, truncate or extend
2928 // it.
Duncan Sands3a66a682009-10-13 21:04:12 +00002929 IdxN = DAG.getSExtOrTrunc(IdxN, getCurDebugLoc(), N.getValueType());
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002930
2931 // If this is a multiply by a power of two, turn it into a shl
2932 // immediately. This is a very common case.
2933 if (ElementSize != 1) {
Dan Gohman7abbd042009-10-23 17:57:43 +00002934 if (ElementSize.isPowerOf2()) {
2935 unsigned Amt = ElementSize.logBase2();
Scott Michelfdc40a02009-02-17 22:15:04 +00002936 IdxN = DAG.getNode(ISD::SHL, getCurDebugLoc(),
Dale Johannesenfa42dea2009-01-30 01:34:22 +00002937 N.getValueType(), IdxN,
Duncan Sands92abc622009-01-31 15:50:11 +00002938 DAG.getConstant(Amt, TLI.getPointerTy()));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002939 } else {
Dan Gohman7abbd042009-10-23 17:57:43 +00002940 SDValue Scale = DAG.getConstant(ElementSize, TLI.getPointerTy());
Scott Michelfdc40a02009-02-17 22:15:04 +00002941 IdxN = DAG.getNode(ISD::MUL, getCurDebugLoc(),
Dale Johannesenfa42dea2009-01-30 01:34:22 +00002942 N.getValueType(), IdxN, Scale);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002943 }
2944 }
2945
Scott Michelfdc40a02009-02-17 22:15:04 +00002946 N = DAG.getNode(ISD::ADD, getCurDebugLoc(),
Dale Johannesenfa42dea2009-01-30 01:34:22 +00002947 N.getValueType(), N, IdxN);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002948 }
2949 }
Bill Wendlinge1a90422009-12-21 23:10:19 +00002950
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002951 setValue(&I, N);
2952}
2953
Dan Gohman46510a72010-04-15 01:51:59 +00002954void SelectionDAGBuilder::visitAlloca(const AllocaInst &I) {
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002955 // If this is a fixed sized alloca in the entry block of the function,
2956 // allocate it statically on the stack.
2957 if (FuncInfo.StaticAllocaMap.count(&I))
2958 return; // getValue will auto-populate this.
2959
2960 const Type *Ty = I.getAllocatedType();
Duncan Sands777d2302009-05-09 07:06:46 +00002961 uint64_t TySize = TLI.getTargetData()->getTypeAllocSize(Ty);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002962 unsigned Align =
2963 std::max((unsigned)TLI.getTargetData()->getPrefTypeAlignment(Ty),
2964 I.getAlignment());
2965
2966 SDValue AllocSize = getValue(I.getArraySize());
Mikhail Glushenkovb3c01992010-01-01 04:41:22 +00002967
Owen Andersone50ed302009-08-10 22:56:29 +00002968 EVT IntPtr = TLI.getPointerTy();
Dan Gohmanf75a7d32010-05-28 01:14:11 +00002969 if (AllocSize.getValueType() != IntPtr)
2970 AllocSize = DAG.getZExtOrTrunc(AllocSize, getCurDebugLoc(), IntPtr);
2971
2972 AllocSize = DAG.getNode(ISD::MUL, getCurDebugLoc(), IntPtr,
2973 AllocSize,
2974 DAG.getConstant(TySize, IntPtr));
Mikhail Glushenkovb3c01992010-01-01 04:41:22 +00002975
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002976 // Handle alignment. If the requested alignment is less than or equal to
2977 // the stack alignment, ignore it. If the size is greater than or equal to
2978 // the stack alignment, we note this in the DYNAMIC_STACKALLOC node.
Anton Korobeynikov16c29b52011-01-10 12:39:04 +00002979 unsigned StackAlign = TM.getFrameLowering()->getStackAlignment();
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002980 if (Align <= StackAlign)
2981 Align = 0;
2982
2983 // Round the size of the allocation up to the stack alignment size
2984 // by add SA-1 to the size.
Scott Michelfdc40a02009-02-17 22:15:04 +00002985 AllocSize = DAG.getNode(ISD::ADD, getCurDebugLoc(),
Dale Johannesenfa42dea2009-01-30 01:34:22 +00002986 AllocSize.getValueType(), AllocSize,
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002987 DAG.getIntPtrConstant(StackAlign-1));
Bill Wendling856ff412009-12-22 00:12:37 +00002988
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002989 // Mask out the low bits for alignment purposes.
Scott Michelfdc40a02009-02-17 22:15:04 +00002990 AllocSize = DAG.getNode(ISD::AND, getCurDebugLoc(),
Dale Johannesenfa42dea2009-01-30 01:34:22 +00002991 AllocSize.getValueType(), AllocSize,
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002992 DAG.getIntPtrConstant(~(uint64_t)(StackAlign-1)));
2993
2994 SDValue Ops[] = { getRoot(), AllocSize, DAG.getIntPtrConstant(Align) };
Owen Anderson825b72b2009-08-11 20:47:22 +00002995 SDVTList VTs = DAG.getVTList(AllocSize.getValueType(), MVT::Other);
Scott Michelfdc40a02009-02-17 22:15:04 +00002996 SDValue DSA = DAG.getNode(ISD::DYNAMIC_STACKALLOC, getCurDebugLoc(),
Dan Gohmanfc166572009-04-09 23:54:40 +00002997 VTs, Ops, 3);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00002998 setValue(&I, DSA);
2999 DAG.setRoot(DSA.getValue(1));
Bill Wendling856ff412009-12-22 00:12:37 +00003000
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00003001 // Inform the Frame Information that we have just allocated a variable-sized
3002 // object.
Eric Christopher2b8271e2010-07-17 00:28:22 +00003003 FuncInfo.MF->getFrameInfo()->CreateVariableSizedObject(Align ? Align : 1);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00003004}
3005
Dan Gohman46510a72010-04-15 01:51:59 +00003006void SelectionDAGBuilder::visitLoad(const LoadInst &I) {
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00003007 const Value *SV = I.getOperand(0);
3008 SDValue Ptr = getValue(SV);
3009
3010 const Type *Ty = I.getType();
David Greene1e559442010-02-15 17:00:31 +00003011
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00003012 bool isVolatile = I.isVolatile();
David Greene1e559442010-02-15 17:00:31 +00003013 bool isNonTemporal = I.getMetadata("nontemporal") != 0;
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00003014 unsigned Alignment = I.getAlignment();
Dan Gohmanf96e4bd2010-10-20 00:31:05 +00003015 const MDNode *TBAAInfo = I.getMetadata(LLVMContext::MD_tbaa);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00003016
Owen Andersone50ed302009-08-10 22:56:29 +00003017 SmallVector<EVT, 4> ValueVTs;
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00003018 SmallVector<uint64_t, 4> Offsets;
3019 ComputeValueVTs(TLI, Ty, ValueVTs, &Offsets);
3020 unsigned NumValues = ValueVTs.size();
3021 if (NumValues == 0)
3022 return;
3023
3024 SDValue Root;
3025 bool ConstantMemory = false;
Andrew Trickde91f3c2010-11-12 17:50:46 +00003026 if (I.isVolatile() || NumValues > MaxParallelChains)
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00003027 // Serialize volatile loads with other side effects.
3028 Root = getRoot();
Dan Gohmanf96e4bd2010-10-20 00:31:05 +00003029 else if (AA->pointsToConstantMemory(
3030 AliasAnalysis::Location(SV, AA->getTypeStoreSize(Ty), TBAAInfo))) {
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00003031 // Do not serialize (non-volatile) loads of constant memory with anything.
3032 Root = DAG.getEntryNode();
3033 ConstantMemory = true;
3034 } else {
3035 // Do not serialize non-volatile loads against each other.
3036 Root = DAG.getRoot();
3037 }
Wesley Peckbf17cfa2010-11-23 03:31:01 +00003038
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00003039 SmallVector<SDValue, 4> Values(NumValues);
Andrew Trickde91f3c2010-11-12 17:50:46 +00003040 SmallVector<SDValue, 4> Chains(std::min(unsigned(MaxParallelChains),
3041 NumValues));
Owen Andersone50ed302009-08-10 22:56:29 +00003042 EVT PtrVT = Ptr.getValueType();
Andrew Trickde91f3c2010-11-12 17:50:46 +00003043 unsigned ChainI = 0;
3044 for (unsigned i = 0; i != NumValues; ++i, ++ChainI) {
3045 // Serializing loads here may result in excessive register pressure, and
3046 // TokenFactor places arbitrary choke points on the scheduler. SD scheduling
3047 // could recover a bit by hoisting nodes upward in the chain by recognizing
3048 // they are side-effect free or do not alias. The optimizer should really
3049 // avoid this case by converting large object/array copies to llvm.memcpy
3050 // (MaxParallelChains should always remain as failsafe).
3051 if (ChainI == MaxParallelChains) {
3052 assert(PendingLoads.empty() && "PendingLoads must be serialized first");
3053 SDValue Chain = DAG.getNode(ISD::TokenFactor, getCurDebugLoc(),
3054 MVT::Other, &Chains[0], ChainI);
3055 Root = Chain;
3056 ChainI = 0;
3057 }
Bill Wendling856ff412009-12-22 00:12:37 +00003058 SDValue A = DAG.getNode(ISD::ADD, getCurDebugLoc(),
3059 PtrVT, Ptr,
3060 DAG.getConstant(Offsets[i], PtrVT));
Dale Johannesen66978ee2009-01-31 02:22:37 +00003061 SDValue L = DAG.getLoad(ValueVTs[i], getCurDebugLoc(), Root,
Michael J. Spencere70c5262010-10-16 08:25:21 +00003062 A, MachinePointerInfo(SV, Offsets[i]), isVolatile,
Dan Gohmanf96e4bd2010-10-20 00:31:05 +00003063 isNonTemporal, Alignment, TBAAInfo);
Bill Wendling856ff412009-12-22 00:12:37 +00003064
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00003065 Values[i] = L;
Andrew Trickde91f3c2010-11-12 17:50:46 +00003066 Chains[ChainI] = L.getValue(1);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00003067 }
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00003068
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00003069 if (!ConstantMemory) {
Scott Michelfdc40a02009-02-17 22:15:04 +00003070 SDValue Chain = DAG.getNode(ISD::TokenFactor, getCurDebugLoc(),
Andrew Trickde91f3c2010-11-12 17:50:46 +00003071 MVT::Other, &Chains[0], ChainI);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00003072 if (isVolatile)
3073 DAG.setRoot(Chain);
3074 else
3075 PendingLoads.push_back(Chain);
3076 }
3077
Bill Wendling4533cac2010-01-28 21:51:40 +00003078 setValue(&I, DAG.getNode(ISD::MERGE_VALUES, getCurDebugLoc(),
3079 DAG.getVTList(&ValueVTs[0], NumValues),
3080 &Values[0], NumValues));
Bill Wendling856ff412009-12-22 00:12:37 +00003081}
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00003082
Dan Gohman46510a72010-04-15 01:51:59 +00003083void SelectionDAGBuilder::visitStore(const StoreInst &I) {
3084 const Value *SrcV = I.getOperand(0);
3085 const Value *PtrV = I.getOperand(1);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00003086
Owen Andersone50ed302009-08-10 22:56:29 +00003087 SmallVector<EVT, 4> ValueVTs;
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00003088 SmallVector<uint64_t, 4> Offsets;
3089 ComputeValueVTs(TLI, SrcV->getType(), ValueVTs, &Offsets);
3090 unsigned NumValues = ValueVTs.size();
3091 if (NumValues == 0)
3092 return;
3093
3094 // Get the lowered operands. Note that we do this after
3095 // checking if NumResults is zero, because with zero results
3096 // the operands won't have values in the map.
3097 SDValue Src = getValue(SrcV);
3098 SDValue Ptr = getValue(PtrV);
3099
3100 SDValue Root = getRoot();
Andrew Trickde91f3c2010-11-12 17:50:46 +00003101 SmallVector<SDValue, 4> Chains(std::min(unsigned(MaxParallelChains),
3102 NumValues));
Owen Andersone50ed302009-08-10 22:56:29 +00003103 EVT PtrVT = Ptr.getValueType();
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00003104 bool isVolatile = I.isVolatile();
David Greene1e559442010-02-15 17:00:31 +00003105 bool isNonTemporal = I.getMetadata("nontemporal") != 0;
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00003106 unsigned Alignment = I.getAlignment();
Dan Gohmanf96e4bd2010-10-20 00:31:05 +00003107 const MDNode *TBAAInfo = I.getMetadata(LLVMContext::MD_tbaa);
Bill Wendling856ff412009-12-22 00:12:37 +00003108
Andrew Trickde91f3c2010-11-12 17:50:46 +00003109 unsigned ChainI = 0;
3110 for (unsigned i = 0; i != NumValues; ++i, ++ChainI) {
3111 // See visitLoad comments.
3112 if (ChainI == MaxParallelChains) {
3113 SDValue Chain = DAG.getNode(ISD::TokenFactor, getCurDebugLoc(),
3114 MVT::Other, &Chains[0], ChainI);
3115 Root = Chain;
3116 ChainI = 0;
3117 }
Bill Wendling856ff412009-12-22 00:12:37 +00003118 SDValue Add = DAG.getNode(ISD::ADD, getCurDebugLoc(), PtrVT, Ptr,
3119 DAG.getConstant(Offsets[i], PtrVT));
Andrew Trickde91f3c2010-11-12 17:50:46 +00003120 SDValue St = DAG.getStore(Root, getCurDebugLoc(),
3121 SDValue(Src.getNode(), Src.getResNo() + i),
3122 Add, MachinePointerInfo(PtrV, Offsets[i]),
3123 isVolatile, isNonTemporal, Alignment, TBAAInfo);
3124 Chains[ChainI] = St;
Bill Wendling856ff412009-12-22 00:12:37 +00003125 }
3126
Devang Patel7e13efa2010-10-26 22:14:52 +00003127 SDValue StoreNode = DAG.getNode(ISD::TokenFactor, getCurDebugLoc(),
Andrew Trickde91f3c2010-11-12 17:50:46 +00003128 MVT::Other, &Chains[0], ChainI);
Devang Patel7e13efa2010-10-26 22:14:52 +00003129 ++SDNodeOrder;
3130 AssignOrderingToNode(StoreNode.getNode());
3131 DAG.setRoot(StoreNode);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00003132}
3133
3134/// visitTargetIntrinsic - Lower a call of a target intrinsic to an INTRINSIC
3135/// node.
Dan Gohman46510a72010-04-15 01:51:59 +00003136void SelectionDAGBuilder::visitTargetIntrinsic(const CallInst &I,
Dan Gohman2048b852009-11-23 18:04:58 +00003137 unsigned Intrinsic) {
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00003138 bool HasChain = !I.doesNotAccessMemory();
3139 bool OnlyLoad = HasChain && I.onlyReadsMemory();
3140
3141 // Build the operand list.
3142 SmallVector<SDValue, 8> Ops;
3143 if (HasChain) { // If this intrinsic has side-effects, chainify it.
3144 if (OnlyLoad) {
3145 // We don't need to serialize loads against other loads.
3146 Ops.push_back(DAG.getRoot());
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00003147 } else {
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00003148 Ops.push_back(getRoot());
3149 }
3150 }
Mon P Wang3efcd4a2008-11-01 20:24:53 +00003151
3152 // Info is set by getTgtMemInstrinsic
3153 TargetLowering::IntrinsicInfo Info;
3154 bool IsTgtIntrinsic = TLI.getTgtMemIntrinsic(Info, I, Intrinsic);
3155
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00003156 // Add the intrinsic ID as an integer operand if it's not a target intrinsic.
Bob Wilson65ffec42010-09-21 17:56:22 +00003157 if (!IsTgtIntrinsic || Info.opc == ISD::INTRINSIC_VOID ||
3158 Info.opc == ISD::INTRINSIC_W_CHAIN)
Mon P Wang3efcd4a2008-11-01 20:24:53 +00003159 Ops.push_back(DAG.getConstant(Intrinsic, TLI.getPointerTy()));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00003160
3161 // Add all operands of the call to the operand list.
Gabor Greif0635f352010-06-25 09:38:13 +00003162 for (unsigned i = 0, e = I.getNumArgOperands(); i != e; ++i) {
3163 SDValue Op = getValue(I.getArgOperand(i));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00003164 assert(TLI.isTypeLegal(Op.getValueType()) &&
3165 "Intrinsic uses a non-legal type?");
3166 Ops.push_back(Op);
3167 }
3168
Owen Andersone50ed302009-08-10 22:56:29 +00003169 SmallVector<EVT, 4> ValueVTs;
Bob Wilson8d919552009-07-31 22:41:21 +00003170 ComputeValueVTs(TLI, I.getType(), ValueVTs);
3171#ifndef NDEBUG
3172 for (unsigned Val = 0, E = ValueVTs.size(); Val != E; ++Val) {
3173 assert(TLI.isTypeLegal(ValueVTs[Val]) &&
3174 "Intrinsic uses a non-legal type?");
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00003175 }
Bob Wilson8d919552009-07-31 22:41:21 +00003176#endif // NDEBUG
Bill Wendling856ff412009-12-22 00:12:37 +00003177
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00003178 if (HasChain)
Owen Anderson825b72b2009-08-11 20:47:22 +00003179 ValueVTs.push_back(MVT::Other);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00003180
Bob Wilson8d919552009-07-31 22:41:21 +00003181 SDVTList VTs = DAG.getVTList(ValueVTs.data(), ValueVTs.size());
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00003182
3183 // Create the node.
3184 SDValue Result;
Mon P Wang3efcd4a2008-11-01 20:24:53 +00003185 if (IsTgtIntrinsic) {
3186 // This is target intrinsic that touches memory
Dale Johannesen66978ee2009-01-31 02:22:37 +00003187 Result = DAG.getMemIntrinsicNode(Info.opc, getCurDebugLoc(),
Dan Gohmanfc166572009-04-09 23:54:40 +00003188 VTs, &Ops[0], Ops.size(),
Chris Lattnere9ba5dd2010-09-21 04:57:15 +00003189 Info.memVT,
3190 MachinePointerInfo(Info.ptrVal, Info.offset),
Mon P Wang3efcd4a2008-11-01 20:24:53 +00003191 Info.align, Info.vol,
3192 Info.readMem, Info.writeMem);
Bill Wendling856ff412009-12-22 00:12:37 +00003193 } else if (!HasChain) {
Scott Michelfdc40a02009-02-17 22:15:04 +00003194 Result = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, getCurDebugLoc(),
Dan Gohmanfc166572009-04-09 23:54:40 +00003195 VTs, &Ops[0], Ops.size());
Benjamin Kramerf0127052010-01-05 13:12:22 +00003196 } else if (!I.getType()->isVoidTy()) {
Scott Michelfdc40a02009-02-17 22:15:04 +00003197 Result = DAG.getNode(ISD::INTRINSIC_W_CHAIN, getCurDebugLoc(),
Dan Gohmanfc166572009-04-09 23:54:40 +00003198 VTs, &Ops[0], Ops.size());
Bill Wendling856ff412009-12-22 00:12:37 +00003199 } else {
Scott Michelfdc40a02009-02-17 22:15:04 +00003200 Result = DAG.getNode(ISD::INTRINSIC_VOID, getCurDebugLoc(),
Dan Gohmanfc166572009-04-09 23:54:40 +00003201 VTs, &Ops[0], Ops.size());
Bill Wendling856ff412009-12-22 00:12:37 +00003202 }
3203
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00003204 if (HasChain) {
3205 SDValue Chain = Result.getValue(Result.getNode()->getNumValues()-1);
3206 if (OnlyLoad)
3207 PendingLoads.push_back(Chain);
3208 else
3209 DAG.setRoot(Chain);
3210 }
Bill Wendling856ff412009-12-22 00:12:37 +00003211
Benjamin Kramerf0127052010-01-05 13:12:22 +00003212 if (!I.getType()->isVoidTy()) {
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00003213 if (const VectorType *PTy = dyn_cast<VectorType>(I.getType())) {
Owen Andersone50ed302009-08-10 22:56:29 +00003214 EVT VT = TLI.getValueType(PTy);
Wesley Peckbf17cfa2010-11-23 03:31:01 +00003215 Result = DAG.getNode(ISD::BITCAST, getCurDebugLoc(), VT, Result);
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00003216 }
Bill Wendling856ff412009-12-22 00:12:37 +00003217
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00003218 setValue(&I, Result);
3219 }
3220}
3221
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003222/// GetSignificand - Get the significand and build it into a floating-point
3223/// number with exponent of 1:
3224///
3225/// Op = (Op & 0x007fffff) | 0x3f800000;
3226///
3227/// where Op is the hexidecimal representation of floating point value.
Bill Wendling39150252008-09-09 20:39:27 +00003228static SDValue
Bill Wendling46ada192010-03-02 01:55:18 +00003229GetSignificand(SelectionDAG &DAG, SDValue Op, DebugLoc dl) {
Owen Anderson825b72b2009-08-11 20:47:22 +00003230 SDValue t1 = DAG.getNode(ISD::AND, dl, MVT::i32, Op,
3231 DAG.getConstant(0x007fffff, MVT::i32));
3232 SDValue t2 = DAG.getNode(ISD::OR, dl, MVT::i32, t1,
3233 DAG.getConstant(0x3f800000, MVT::i32));
Wesley Peckbf17cfa2010-11-23 03:31:01 +00003234 return DAG.getNode(ISD::BITCAST, dl, MVT::f32, t2);
Bill Wendling39150252008-09-09 20:39:27 +00003235}
3236
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003237/// GetExponent - Get the exponent:
3238///
Bill Wendlinge9a72862009-01-20 21:17:57 +00003239/// (float)(int)(((Op & 0x7f800000) >> 23) - 127);
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003240///
3241/// where Op is the hexidecimal representation of floating point value.
Bill Wendling39150252008-09-09 20:39:27 +00003242static SDValue
Dale Johannesen66978ee2009-01-31 02:22:37 +00003243GetExponent(SelectionDAG &DAG, SDValue Op, const TargetLowering &TLI,
Bill Wendling46ada192010-03-02 01:55:18 +00003244 DebugLoc dl) {
Owen Anderson825b72b2009-08-11 20:47:22 +00003245 SDValue t0 = DAG.getNode(ISD::AND, dl, MVT::i32, Op,
3246 DAG.getConstant(0x7f800000, MVT::i32));
3247 SDValue t1 = DAG.getNode(ISD::SRL, dl, MVT::i32, t0,
Duncan Sands92abc622009-01-31 15:50:11 +00003248 DAG.getConstant(23, TLI.getPointerTy()));
Owen Anderson825b72b2009-08-11 20:47:22 +00003249 SDValue t2 = DAG.getNode(ISD::SUB, dl, MVT::i32, t1,
3250 DAG.getConstant(127, MVT::i32));
Bill Wendling4533cac2010-01-28 21:51:40 +00003251 return DAG.getNode(ISD::SINT_TO_FP, dl, MVT::f32, t2);
Bill Wendling39150252008-09-09 20:39:27 +00003252}
3253
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003254/// getF32Constant - Get 32-bit floating point constant.
3255static SDValue
3256getF32Constant(SelectionDAG &DAG, unsigned Flt) {
Owen Anderson825b72b2009-08-11 20:47:22 +00003257 return DAG.getConstantFP(APFloat(APInt(32, Flt)), MVT::f32);
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003258}
3259
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00003260/// Inlined utility function to implement binary input atomic intrinsics for
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00003261/// visitIntrinsicCall: I is a call instruction
3262/// Op is the associated NodeType for I
3263const char *
Dan Gohman46510a72010-04-15 01:51:59 +00003264SelectionDAGBuilder::implVisitBinaryAtomic(const CallInst& I,
3265 ISD::NodeType Op) {
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00003266 SDValue Root = getRoot();
Dan Gohman0b1d4a72008-12-23 21:37:04 +00003267 SDValue L =
Dale Johannesen66978ee2009-01-31 02:22:37 +00003268 DAG.getAtomic(Op, getCurDebugLoc(),
Gabor Greif0635f352010-06-25 09:38:13 +00003269 getValue(I.getArgOperand(1)).getValueType().getSimpleVT(),
Dan Gohman0b1d4a72008-12-23 21:37:04 +00003270 Root,
Gabor Greif0635f352010-06-25 09:38:13 +00003271 getValue(I.getArgOperand(0)),
3272 getValue(I.getArgOperand(1)),
3273 I.getArgOperand(0));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00003274 setValue(&I, L);
3275 DAG.setRoot(L.getValue(1));
3276 return 0;
3277}
3278
Bill Wendling2ce4e5c2008-12-10 00:28:22 +00003279// implVisitAluOverflow - Lower arithmetic overflow instrinsics.
Bill Wendling74c37652008-12-09 22:08:41 +00003280const char *
Dan Gohman46510a72010-04-15 01:51:59 +00003281SelectionDAGBuilder::implVisitAluOverflow(const CallInst &I, ISD::NodeType Op) {
Gabor Greif0635f352010-06-25 09:38:13 +00003282 SDValue Op1 = getValue(I.getArgOperand(0));
3283 SDValue Op2 = getValue(I.getArgOperand(1));
Bill Wendling74c37652008-12-09 22:08:41 +00003284
Owen Anderson825b72b2009-08-11 20:47:22 +00003285 SDVTList VTs = DAG.getVTList(Op1.getValueType(), MVT::i1);
Bill Wendling4533cac2010-01-28 21:51:40 +00003286 setValue(&I, DAG.getNode(Op, getCurDebugLoc(), VTs, Op1, Op2));
Bill Wendling2ce4e5c2008-12-10 00:28:22 +00003287 return 0;
3288}
Bill Wendling74c37652008-12-09 22:08:41 +00003289
Bill Wendlingb4ec2832008-09-09 22:13:54 +00003290/// visitExp - Lower an exp intrinsic. Handles the special sequences for
3291/// limited-precision mode.
Dale Johannesen59e577f2008-09-05 18:38:42 +00003292void
Dan Gohman46510a72010-04-15 01:51:59 +00003293SelectionDAGBuilder::visitExp(const CallInst &I) {
Dale Johannesen59e577f2008-09-05 18:38:42 +00003294 SDValue result;
Dale Johannesen66978ee2009-01-31 02:22:37 +00003295 DebugLoc dl = getCurDebugLoc();
Bill Wendlingb4ec2832008-09-09 22:13:54 +00003296
Gabor Greif0635f352010-06-25 09:38:13 +00003297 if (getValue(I.getArgOperand(0)).getValueType() == MVT::f32 &&
Bill Wendlingb4ec2832008-09-09 22:13:54 +00003298 LimitFloatPrecision > 0 && LimitFloatPrecision <= 18) {
Gabor Greif0635f352010-06-25 09:38:13 +00003299 SDValue Op = getValue(I.getArgOperand(0));
Bill Wendlingb4ec2832008-09-09 22:13:54 +00003300
3301 // Put the exponent in the right bit position for later addition to the
3302 // final result:
3303 //
3304 // #define LOG2OFe 1.4426950f
3305 // IntegerPartOfX = ((int32_t)(X * LOG2OFe));
Owen Anderson825b72b2009-08-11 20:47:22 +00003306 SDValue t0 = DAG.getNode(ISD::FMUL, dl, MVT::f32, Op,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003307 getF32Constant(DAG, 0x3fb8aa3b));
Owen Anderson825b72b2009-08-11 20:47:22 +00003308 SDValue IntegerPartOfX = DAG.getNode(ISD::FP_TO_SINT, dl, MVT::i32, t0);
Bill Wendlingb4ec2832008-09-09 22:13:54 +00003309
3310 // FractionalPartOfX = (X * LOG2OFe) - (float)IntegerPartOfX;
Owen Anderson825b72b2009-08-11 20:47:22 +00003311 SDValue t1 = DAG.getNode(ISD::SINT_TO_FP, dl, MVT::f32, IntegerPartOfX);
3312 SDValue X = DAG.getNode(ISD::FSUB, dl, MVT::f32, t0, t1);
Bill Wendlingb4ec2832008-09-09 22:13:54 +00003313
3314 // IntegerPartOfX <<= 23;
Owen Anderson825b72b2009-08-11 20:47:22 +00003315 IntegerPartOfX = DAG.getNode(ISD::SHL, dl, MVT::i32, IntegerPartOfX,
Duncan Sands92abc622009-01-31 15:50:11 +00003316 DAG.getConstant(23, TLI.getPointerTy()));
Bill Wendling856ff412009-12-22 00:12:37 +00003317
Bill Wendlingb4ec2832008-09-09 22:13:54 +00003318 if (LimitFloatPrecision <= 6) {
3319 // For floating-point precision of 6:
3320 //
3321 // TwoToFractionalPartOfX =
3322 // 0.997535578f +
3323 // (0.735607626f + 0.252464424f * x) * x;
3324 //
3325 // error 0.0144103317, which is 6 bits
Owen Anderson825b72b2009-08-11 20:47:22 +00003326 SDValue t2 = DAG.getNode(ISD::FMUL, dl, MVT::f32, X,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003327 getF32Constant(DAG, 0x3e814304));
Owen Anderson825b72b2009-08-11 20:47:22 +00003328 SDValue t3 = DAG.getNode(ISD::FADD, dl, MVT::f32, t2,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003329 getF32Constant(DAG, 0x3f3c50c8));
Owen Anderson825b72b2009-08-11 20:47:22 +00003330 SDValue t4 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t3, X);
3331 SDValue t5 = DAG.getNode(ISD::FADD, dl, MVT::f32, t4,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003332 getF32Constant(DAG, 0x3f7f5e7e));
Wesley Peckbf17cfa2010-11-23 03:31:01 +00003333 SDValue TwoToFracPartOfX = DAG.getNode(ISD::BITCAST, dl,MVT::i32, t5);
Bill Wendlingb4ec2832008-09-09 22:13:54 +00003334
3335 // Add the exponent into the result in integer domain.
Owen Anderson825b72b2009-08-11 20:47:22 +00003336 SDValue t6 = DAG.getNode(ISD::ADD, dl, MVT::i32,
Bill Wendlingb4ec2832008-09-09 22:13:54 +00003337 TwoToFracPartOfX, IntegerPartOfX);
3338
Wesley Peckbf17cfa2010-11-23 03:31:01 +00003339 result = DAG.getNode(ISD::BITCAST, dl, MVT::f32, t6);
Bill Wendlingb4ec2832008-09-09 22:13:54 +00003340 } else if (LimitFloatPrecision > 6 && LimitFloatPrecision <= 12) {
3341 // For floating-point precision of 12:
3342 //
3343 // TwoToFractionalPartOfX =
3344 // 0.999892986f +
3345 // (0.696457318f +
3346 // (0.224338339f + 0.792043434e-1f * x) * x) * x;
3347 //
3348 // 0.000107046256 error, which is 13 to 14 bits
Owen Anderson825b72b2009-08-11 20:47:22 +00003349 SDValue t2 = DAG.getNode(ISD::FMUL, dl, MVT::f32, X,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003350 getF32Constant(DAG, 0x3da235e3));
Owen Anderson825b72b2009-08-11 20:47:22 +00003351 SDValue t3 = DAG.getNode(ISD::FADD, dl, MVT::f32, t2,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003352 getF32Constant(DAG, 0x3e65b8f3));
Owen Anderson825b72b2009-08-11 20:47:22 +00003353 SDValue t4 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t3, X);
3354 SDValue t5 = DAG.getNode(ISD::FADD, dl, MVT::f32, t4,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003355 getF32Constant(DAG, 0x3f324b07));
Owen Anderson825b72b2009-08-11 20:47:22 +00003356 SDValue t6 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t5, X);
3357 SDValue t7 = DAG.getNode(ISD::FADD, dl, MVT::f32, t6,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003358 getF32Constant(DAG, 0x3f7ff8fd));
Wesley Peckbf17cfa2010-11-23 03:31:01 +00003359 SDValue TwoToFracPartOfX = DAG.getNode(ISD::BITCAST, dl,MVT::i32, t7);
Bill Wendlingb4ec2832008-09-09 22:13:54 +00003360
3361 // Add the exponent into the result in integer domain.
Owen Anderson825b72b2009-08-11 20:47:22 +00003362 SDValue t8 = DAG.getNode(ISD::ADD, dl, MVT::i32,
Bill Wendlingb4ec2832008-09-09 22:13:54 +00003363 TwoToFracPartOfX, IntegerPartOfX);
3364
Wesley Peckbf17cfa2010-11-23 03:31:01 +00003365 result = DAG.getNode(ISD::BITCAST, dl, MVT::f32, t8);
Bill Wendlingb4ec2832008-09-09 22:13:54 +00003366 } else { // LimitFloatPrecision > 12 && LimitFloatPrecision <= 18
3367 // For floating-point precision of 18:
3368 //
3369 // TwoToFractionalPartOfX =
3370 // 0.999999982f +
3371 // (0.693148872f +
3372 // (0.240227044f +
3373 // (0.554906021e-1f +
3374 // (0.961591928e-2f +
3375 // (0.136028312e-2f + 0.157059148e-3f *x)*x)*x)*x)*x)*x;
3376 //
3377 // error 2.47208000*10^(-7), which is better than 18 bits
Owen Anderson825b72b2009-08-11 20:47:22 +00003378 SDValue t2 = DAG.getNode(ISD::FMUL, dl, MVT::f32, X,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003379 getF32Constant(DAG, 0x3924b03e));
Owen Anderson825b72b2009-08-11 20:47:22 +00003380 SDValue t3 = DAG.getNode(ISD::FADD, dl, MVT::f32, t2,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003381 getF32Constant(DAG, 0x3ab24b87));
Owen Anderson825b72b2009-08-11 20:47:22 +00003382 SDValue t4 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t3, X);
3383 SDValue t5 = DAG.getNode(ISD::FADD, dl, MVT::f32, t4,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003384 getF32Constant(DAG, 0x3c1d8c17));
Owen Anderson825b72b2009-08-11 20:47:22 +00003385 SDValue t6 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t5, X);
3386 SDValue t7 = DAG.getNode(ISD::FADD, dl, MVT::f32, t6,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003387 getF32Constant(DAG, 0x3d634a1d));
Owen Anderson825b72b2009-08-11 20:47:22 +00003388 SDValue t8 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t7, X);
3389 SDValue t9 = DAG.getNode(ISD::FADD, dl, MVT::f32, t8,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003390 getF32Constant(DAG, 0x3e75fe14));
Owen Anderson825b72b2009-08-11 20:47:22 +00003391 SDValue t10 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t9, X);
3392 SDValue t11 = DAG.getNode(ISD::FADD, dl, MVT::f32, t10,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003393 getF32Constant(DAG, 0x3f317234));
Owen Anderson825b72b2009-08-11 20:47:22 +00003394 SDValue t12 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t11, X);
3395 SDValue t13 = DAG.getNode(ISD::FADD, dl, MVT::f32, t12,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003396 getF32Constant(DAG, 0x3f800000));
Wesley Peckbf17cfa2010-11-23 03:31:01 +00003397 SDValue TwoToFracPartOfX = DAG.getNode(ISD::BITCAST, dl,
Owen Anderson825b72b2009-08-11 20:47:22 +00003398 MVT::i32, t13);
Bill Wendlingb4ec2832008-09-09 22:13:54 +00003399
3400 // Add the exponent into the result in integer domain.
Owen Anderson825b72b2009-08-11 20:47:22 +00003401 SDValue t14 = DAG.getNode(ISD::ADD, dl, MVT::i32,
Bill Wendlingb4ec2832008-09-09 22:13:54 +00003402 TwoToFracPartOfX, IntegerPartOfX);
3403
Wesley Peckbf17cfa2010-11-23 03:31:01 +00003404 result = DAG.getNode(ISD::BITCAST, dl, MVT::f32, t14);
Bill Wendlingb4ec2832008-09-09 22:13:54 +00003405 }
3406 } else {
3407 // No special expansion.
Dale Johannesenfa42dea2009-01-30 01:34:22 +00003408 result = DAG.getNode(ISD::FEXP, dl,
Gabor Greif0635f352010-06-25 09:38:13 +00003409 getValue(I.getArgOperand(0)).getValueType(),
3410 getValue(I.getArgOperand(0)));
Bill Wendlingb4ec2832008-09-09 22:13:54 +00003411 }
3412
Dale Johannesen59e577f2008-09-05 18:38:42 +00003413 setValue(&I, result);
3414}
3415
Bill Wendling39150252008-09-09 20:39:27 +00003416/// visitLog - Lower a log intrinsic. Handles the special sequences for
3417/// limited-precision mode.
Dale Johannesen59e577f2008-09-05 18:38:42 +00003418void
Dan Gohman46510a72010-04-15 01:51:59 +00003419SelectionDAGBuilder::visitLog(const CallInst &I) {
Dale Johannesen59e577f2008-09-05 18:38:42 +00003420 SDValue result;
Dale Johannesen66978ee2009-01-31 02:22:37 +00003421 DebugLoc dl = getCurDebugLoc();
Bill Wendling39150252008-09-09 20:39:27 +00003422
Gabor Greif0635f352010-06-25 09:38:13 +00003423 if (getValue(I.getArgOperand(0)).getValueType() == MVT::f32 &&
Bill Wendling39150252008-09-09 20:39:27 +00003424 LimitFloatPrecision > 0 && LimitFloatPrecision <= 18) {
Gabor Greif0635f352010-06-25 09:38:13 +00003425 SDValue Op = getValue(I.getArgOperand(0));
Wesley Peckbf17cfa2010-11-23 03:31:01 +00003426 SDValue Op1 = DAG.getNode(ISD::BITCAST, dl, MVT::i32, Op);
Bill Wendling39150252008-09-09 20:39:27 +00003427
3428 // Scale the exponent by log(2) [0.69314718f].
Bill Wendling46ada192010-03-02 01:55:18 +00003429 SDValue Exp = GetExponent(DAG, Op1, TLI, dl);
Owen Anderson825b72b2009-08-11 20:47:22 +00003430 SDValue LogOfExponent = DAG.getNode(ISD::FMUL, dl, MVT::f32, Exp,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003431 getF32Constant(DAG, 0x3f317218));
Bill Wendling39150252008-09-09 20:39:27 +00003432
3433 // Get the significand and build it into a floating-point number with
3434 // exponent of 1.
Bill Wendling46ada192010-03-02 01:55:18 +00003435 SDValue X = GetSignificand(DAG, Op1, dl);
Bill Wendling39150252008-09-09 20:39:27 +00003436
3437 if (LimitFloatPrecision <= 6) {
3438 // For floating-point precision of 6:
3439 //
3440 // LogofMantissa =
3441 // -1.1609546f +
3442 // (1.4034025f - 0.23903021f * x) * x;
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00003443 //
Bill Wendling39150252008-09-09 20:39:27 +00003444 // error 0.0034276066, which is better than 8 bits
Owen Anderson825b72b2009-08-11 20:47:22 +00003445 SDValue t0 = DAG.getNode(ISD::FMUL, dl, MVT::f32, X,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003446 getF32Constant(DAG, 0xbe74c456));
Owen Anderson825b72b2009-08-11 20:47:22 +00003447 SDValue t1 = DAG.getNode(ISD::FADD, dl, MVT::f32, t0,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003448 getF32Constant(DAG, 0x3fb3a2b1));
Owen Anderson825b72b2009-08-11 20:47:22 +00003449 SDValue t2 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t1, X);
3450 SDValue LogOfMantissa = DAG.getNode(ISD::FSUB, dl, MVT::f32, t2,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003451 getF32Constant(DAG, 0x3f949a29));
Bill Wendling39150252008-09-09 20:39:27 +00003452
Scott Michelfdc40a02009-02-17 22:15:04 +00003453 result = DAG.getNode(ISD::FADD, dl,
Owen Anderson825b72b2009-08-11 20:47:22 +00003454 MVT::f32, LogOfExponent, LogOfMantissa);
Bill Wendling39150252008-09-09 20:39:27 +00003455 } else if (LimitFloatPrecision > 6 && LimitFloatPrecision <= 12) {
3456 // For floating-point precision of 12:
3457 //
3458 // LogOfMantissa =
3459 // -1.7417939f +
3460 // (2.8212026f +
3461 // (-1.4699568f +
3462 // (0.44717955f - 0.56570851e-1f * x) * x) * x) * x;
3463 //
3464 // error 0.000061011436, which is 14 bits
Owen Anderson825b72b2009-08-11 20:47:22 +00003465 SDValue t0 = DAG.getNode(ISD::FMUL, dl, MVT::f32, X,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003466 getF32Constant(DAG, 0xbd67b6d6));
Owen Anderson825b72b2009-08-11 20:47:22 +00003467 SDValue t1 = DAG.getNode(ISD::FADD, dl, MVT::f32, t0,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003468 getF32Constant(DAG, 0x3ee4f4b8));
Owen Anderson825b72b2009-08-11 20:47:22 +00003469 SDValue t2 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t1, X);
3470 SDValue t3 = DAG.getNode(ISD::FSUB, dl, MVT::f32, t2,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003471 getF32Constant(DAG, 0x3fbc278b));
Owen Anderson825b72b2009-08-11 20:47:22 +00003472 SDValue t4 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t3, X);
3473 SDValue t5 = DAG.getNode(ISD::FADD, dl, MVT::f32, t4,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003474 getF32Constant(DAG, 0x40348e95));
Owen Anderson825b72b2009-08-11 20:47:22 +00003475 SDValue t6 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t5, X);
3476 SDValue LogOfMantissa = DAG.getNode(ISD::FSUB, dl, MVT::f32, t6,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003477 getF32Constant(DAG, 0x3fdef31a));
Bill Wendling39150252008-09-09 20:39:27 +00003478
Scott Michelfdc40a02009-02-17 22:15:04 +00003479 result = DAG.getNode(ISD::FADD, dl,
Owen Anderson825b72b2009-08-11 20:47:22 +00003480 MVT::f32, LogOfExponent, LogOfMantissa);
Bill Wendling39150252008-09-09 20:39:27 +00003481 } else { // LimitFloatPrecision > 12 && LimitFloatPrecision <= 18
3482 // For floating-point precision of 18:
3483 //
3484 // LogOfMantissa =
3485 // -2.1072184f +
3486 // (4.2372794f +
3487 // (-3.7029485f +
3488 // (2.2781945f +
3489 // (-0.87823314f +
3490 // (0.19073739f - 0.17809712e-1f * x) * x) * x) * x) * x)*x;
3491 //
3492 // error 0.0000023660568, which is better than 18 bits
Owen Anderson825b72b2009-08-11 20:47:22 +00003493 SDValue t0 = DAG.getNode(ISD::FMUL, dl, MVT::f32, X,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003494 getF32Constant(DAG, 0xbc91e5ac));
Owen Anderson825b72b2009-08-11 20:47:22 +00003495 SDValue t1 = DAG.getNode(ISD::FADD, dl, MVT::f32, t0,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003496 getF32Constant(DAG, 0x3e4350aa));
Owen Anderson825b72b2009-08-11 20:47:22 +00003497 SDValue t2 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t1, X);
3498 SDValue t3 = DAG.getNode(ISD::FSUB, dl, MVT::f32, t2,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003499 getF32Constant(DAG, 0x3f60d3e3));
Owen Anderson825b72b2009-08-11 20:47:22 +00003500 SDValue t4 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t3, X);
3501 SDValue t5 = DAG.getNode(ISD::FADD, dl, MVT::f32, t4,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003502 getF32Constant(DAG, 0x4011cdf0));
Owen Anderson825b72b2009-08-11 20:47:22 +00003503 SDValue t6 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t5, X);
3504 SDValue t7 = DAG.getNode(ISD::FSUB, dl, MVT::f32, t6,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003505 getF32Constant(DAG, 0x406cfd1c));
Owen Anderson825b72b2009-08-11 20:47:22 +00003506 SDValue t8 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t7, X);
3507 SDValue t9 = DAG.getNode(ISD::FADD, dl, MVT::f32, t8,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003508 getF32Constant(DAG, 0x408797cb));
Owen Anderson825b72b2009-08-11 20:47:22 +00003509 SDValue t10 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t9, X);
3510 SDValue LogOfMantissa = DAG.getNode(ISD::FSUB, dl, MVT::f32, t10,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003511 getF32Constant(DAG, 0x4006dcab));
Bill Wendling39150252008-09-09 20:39:27 +00003512
Scott Michelfdc40a02009-02-17 22:15:04 +00003513 result = DAG.getNode(ISD::FADD, dl,
Owen Anderson825b72b2009-08-11 20:47:22 +00003514 MVT::f32, LogOfExponent, LogOfMantissa);
Bill Wendling39150252008-09-09 20:39:27 +00003515 }
3516 } else {
3517 // No special expansion.
Dale Johannesenfa42dea2009-01-30 01:34:22 +00003518 result = DAG.getNode(ISD::FLOG, dl,
Gabor Greif0635f352010-06-25 09:38:13 +00003519 getValue(I.getArgOperand(0)).getValueType(),
3520 getValue(I.getArgOperand(0)));
Bill Wendling39150252008-09-09 20:39:27 +00003521 }
3522
Dale Johannesen59e577f2008-09-05 18:38:42 +00003523 setValue(&I, result);
3524}
3525
Bill Wendling3eb59402008-09-09 00:28:24 +00003526/// visitLog2 - Lower a log2 intrinsic. Handles the special sequences for
3527/// limited-precision mode.
Dale Johannesen59e577f2008-09-05 18:38:42 +00003528void
Dan Gohman46510a72010-04-15 01:51:59 +00003529SelectionDAGBuilder::visitLog2(const CallInst &I) {
Dale Johannesen59e577f2008-09-05 18:38:42 +00003530 SDValue result;
Dale Johannesen66978ee2009-01-31 02:22:37 +00003531 DebugLoc dl = getCurDebugLoc();
Bill Wendling3eb59402008-09-09 00:28:24 +00003532
Gabor Greif0635f352010-06-25 09:38:13 +00003533 if (getValue(I.getArgOperand(0)).getValueType() == MVT::f32 &&
Bill Wendling3eb59402008-09-09 00:28:24 +00003534 LimitFloatPrecision > 0 && LimitFloatPrecision <= 18) {
Gabor Greif0635f352010-06-25 09:38:13 +00003535 SDValue Op = getValue(I.getArgOperand(0));
Wesley Peckbf17cfa2010-11-23 03:31:01 +00003536 SDValue Op1 = DAG.getNode(ISD::BITCAST, dl, MVT::i32, Op);
Bill Wendling3eb59402008-09-09 00:28:24 +00003537
Bill Wendling39150252008-09-09 20:39:27 +00003538 // Get the exponent.
Bill Wendling46ada192010-03-02 01:55:18 +00003539 SDValue LogOfExponent = GetExponent(DAG, Op1, TLI, dl);
Bill Wendling856ff412009-12-22 00:12:37 +00003540
Bill Wendling3eb59402008-09-09 00:28:24 +00003541 // Get the significand and build it into a floating-point number with
Bill Wendling39150252008-09-09 20:39:27 +00003542 // exponent of 1.
Bill Wendling46ada192010-03-02 01:55:18 +00003543 SDValue X = GetSignificand(DAG, Op1, dl);
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00003544
Bill Wendling3eb59402008-09-09 00:28:24 +00003545 // Different possible minimax approximations of significand in
3546 // floating-point for various degrees of accuracy over [1,2].
3547 if (LimitFloatPrecision <= 6) {
3548 // For floating-point precision of 6:
3549 //
3550 // Log2ofMantissa = -1.6749035f + (2.0246817f - .34484768f * x) * x;
3551 //
3552 // error 0.0049451742, which is more than 7 bits
Owen Anderson825b72b2009-08-11 20:47:22 +00003553 SDValue t0 = DAG.getNode(ISD::FMUL, dl, MVT::f32, X,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003554 getF32Constant(DAG, 0xbeb08fe0));
Owen Anderson825b72b2009-08-11 20:47:22 +00003555 SDValue t1 = DAG.getNode(ISD::FADD, dl, MVT::f32, t0,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003556 getF32Constant(DAG, 0x40019463));
Owen Anderson825b72b2009-08-11 20:47:22 +00003557 SDValue t2 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t1, X);
3558 SDValue Log2ofMantissa = DAG.getNode(ISD::FSUB, dl, MVT::f32, t2,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003559 getF32Constant(DAG, 0x3fd6633d));
Bill Wendling3eb59402008-09-09 00:28:24 +00003560
Scott Michelfdc40a02009-02-17 22:15:04 +00003561 result = DAG.getNode(ISD::FADD, dl,
Owen Anderson825b72b2009-08-11 20:47:22 +00003562 MVT::f32, LogOfExponent, Log2ofMantissa);
Bill Wendling3eb59402008-09-09 00:28:24 +00003563 } else if (LimitFloatPrecision > 6 && LimitFloatPrecision <= 12) {
3564 // For floating-point precision of 12:
3565 //
3566 // Log2ofMantissa =
3567 // -2.51285454f +
3568 // (4.07009056f +
3569 // (-2.12067489f +
3570 // (.645142248f - 0.816157886e-1f * x) * x) * x) * x;
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00003571 //
Bill Wendling3eb59402008-09-09 00:28:24 +00003572 // error 0.0000876136000, which is better than 13 bits
Owen Anderson825b72b2009-08-11 20:47:22 +00003573 SDValue t0 = DAG.getNode(ISD::FMUL, dl, MVT::f32, X,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003574 getF32Constant(DAG, 0xbda7262e));
Owen Anderson825b72b2009-08-11 20:47:22 +00003575 SDValue t1 = DAG.getNode(ISD::FADD, dl, MVT::f32, t0,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003576 getF32Constant(DAG, 0x3f25280b));
Owen Anderson825b72b2009-08-11 20:47:22 +00003577 SDValue t2 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t1, X);
3578 SDValue t3 = DAG.getNode(ISD::FSUB, dl, MVT::f32, t2,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003579 getF32Constant(DAG, 0x4007b923));
Owen Anderson825b72b2009-08-11 20:47:22 +00003580 SDValue t4 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t3, X);
3581 SDValue t5 = DAG.getNode(ISD::FADD, dl, MVT::f32, t4,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003582 getF32Constant(DAG, 0x40823e2f));
Owen Anderson825b72b2009-08-11 20:47:22 +00003583 SDValue t6 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t5, X);
3584 SDValue Log2ofMantissa = DAG.getNode(ISD::FSUB, dl, MVT::f32, t6,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003585 getF32Constant(DAG, 0x4020d29c));
Bill Wendling3eb59402008-09-09 00:28:24 +00003586
Scott Michelfdc40a02009-02-17 22:15:04 +00003587 result = DAG.getNode(ISD::FADD, dl,
Owen Anderson825b72b2009-08-11 20:47:22 +00003588 MVT::f32, LogOfExponent, Log2ofMantissa);
Bill Wendling3eb59402008-09-09 00:28:24 +00003589 } else { // LimitFloatPrecision > 12 && LimitFloatPrecision <= 18
3590 // For floating-point precision of 18:
3591 //
3592 // Log2ofMantissa =
3593 // -3.0400495f +
3594 // (6.1129976f +
3595 // (-5.3420409f +
3596 // (3.2865683f +
3597 // (-1.2669343f +
3598 // (0.27515199f -
3599 // 0.25691327e-1f * x) * x) * x) * x) * x) * x;
3600 //
3601 // error 0.0000018516, which is better than 18 bits
Owen Anderson825b72b2009-08-11 20:47:22 +00003602 SDValue t0 = DAG.getNode(ISD::FMUL, dl, MVT::f32, X,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003603 getF32Constant(DAG, 0xbcd2769e));
Owen Anderson825b72b2009-08-11 20:47:22 +00003604 SDValue t1 = DAG.getNode(ISD::FADD, dl, MVT::f32, t0,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003605 getF32Constant(DAG, 0x3e8ce0b9));
Owen Anderson825b72b2009-08-11 20:47:22 +00003606 SDValue t2 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t1, X);
3607 SDValue t3 = DAG.getNode(ISD::FSUB, dl, MVT::f32, t2,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003608 getF32Constant(DAG, 0x3fa22ae7));
Owen Anderson825b72b2009-08-11 20:47:22 +00003609 SDValue t4 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t3, X);
3610 SDValue t5 = DAG.getNode(ISD::FADD, dl, MVT::f32, t4,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003611 getF32Constant(DAG, 0x40525723));
Owen Anderson825b72b2009-08-11 20:47:22 +00003612 SDValue t6 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t5, X);
3613 SDValue t7 = DAG.getNode(ISD::FSUB, dl, MVT::f32, t6,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003614 getF32Constant(DAG, 0x40aaf200));
Owen Anderson825b72b2009-08-11 20:47:22 +00003615 SDValue t8 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t7, X);
3616 SDValue t9 = DAG.getNode(ISD::FADD, dl, MVT::f32, t8,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003617 getF32Constant(DAG, 0x40c39dad));
Owen Anderson825b72b2009-08-11 20:47:22 +00003618 SDValue t10 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t9, X);
3619 SDValue Log2ofMantissa = DAG.getNode(ISD::FSUB, dl, MVT::f32, t10,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003620 getF32Constant(DAG, 0x4042902c));
Bill Wendling3eb59402008-09-09 00:28:24 +00003621
Scott Michelfdc40a02009-02-17 22:15:04 +00003622 result = DAG.getNode(ISD::FADD, dl,
Owen Anderson825b72b2009-08-11 20:47:22 +00003623 MVT::f32, LogOfExponent, Log2ofMantissa);
Bill Wendling3eb59402008-09-09 00:28:24 +00003624 }
Dale Johannesen853244f2008-09-05 23:49:37 +00003625 } else {
Bill Wendling3eb59402008-09-09 00:28:24 +00003626 // No special expansion.
Dale Johannesenfa42dea2009-01-30 01:34:22 +00003627 result = DAG.getNode(ISD::FLOG2, dl,
Gabor Greif0635f352010-06-25 09:38:13 +00003628 getValue(I.getArgOperand(0)).getValueType(),
3629 getValue(I.getArgOperand(0)));
Dale Johannesen853244f2008-09-05 23:49:37 +00003630 }
Bill Wendling3eb59402008-09-09 00:28:24 +00003631
Dale Johannesen59e577f2008-09-05 18:38:42 +00003632 setValue(&I, result);
3633}
3634
Bill Wendling3eb59402008-09-09 00:28:24 +00003635/// visitLog10 - Lower a log10 intrinsic. Handles the special sequences for
3636/// limited-precision mode.
Dale Johannesen59e577f2008-09-05 18:38:42 +00003637void
Dan Gohman46510a72010-04-15 01:51:59 +00003638SelectionDAGBuilder::visitLog10(const CallInst &I) {
Dale Johannesen59e577f2008-09-05 18:38:42 +00003639 SDValue result;
Dale Johannesen66978ee2009-01-31 02:22:37 +00003640 DebugLoc dl = getCurDebugLoc();
Bill Wendling181b6272008-10-19 20:34:04 +00003641
Gabor Greif0635f352010-06-25 09:38:13 +00003642 if (getValue(I.getArgOperand(0)).getValueType() == MVT::f32 &&
Bill Wendling3eb59402008-09-09 00:28:24 +00003643 LimitFloatPrecision > 0 && LimitFloatPrecision <= 18) {
Gabor Greif0635f352010-06-25 09:38:13 +00003644 SDValue Op = getValue(I.getArgOperand(0));
Wesley Peckbf17cfa2010-11-23 03:31:01 +00003645 SDValue Op1 = DAG.getNode(ISD::BITCAST, dl, MVT::i32, Op);
Bill Wendling3eb59402008-09-09 00:28:24 +00003646
Bill Wendling39150252008-09-09 20:39:27 +00003647 // Scale the exponent by log10(2) [0.30102999f].
Bill Wendling46ada192010-03-02 01:55:18 +00003648 SDValue Exp = GetExponent(DAG, Op1, TLI, dl);
Owen Anderson825b72b2009-08-11 20:47:22 +00003649 SDValue LogOfExponent = DAG.getNode(ISD::FMUL, dl, MVT::f32, Exp,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003650 getF32Constant(DAG, 0x3e9a209a));
Bill Wendling3eb59402008-09-09 00:28:24 +00003651
3652 // Get the significand and build it into a floating-point number with
Bill Wendling39150252008-09-09 20:39:27 +00003653 // exponent of 1.
Bill Wendling46ada192010-03-02 01:55:18 +00003654 SDValue X = GetSignificand(DAG, Op1, dl);
Bill Wendling3eb59402008-09-09 00:28:24 +00003655
3656 if (LimitFloatPrecision <= 6) {
Bill Wendlingbd297bc2008-09-09 18:42:23 +00003657 // For floating-point precision of 6:
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00003658 //
Bill Wendlingbd297bc2008-09-09 18:42:23 +00003659 // Log10ofMantissa =
3660 // -0.50419619f +
3661 // (0.60948995f - 0.10380950f * x) * x;
3662 //
3663 // error 0.0014886165, which is 6 bits
Owen Anderson825b72b2009-08-11 20:47:22 +00003664 SDValue t0 = DAG.getNode(ISD::FMUL, dl, MVT::f32, X,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003665 getF32Constant(DAG, 0xbdd49a13));
Owen Anderson825b72b2009-08-11 20:47:22 +00003666 SDValue t1 = DAG.getNode(ISD::FADD, dl, MVT::f32, t0,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003667 getF32Constant(DAG, 0x3f1c0789));
Owen Anderson825b72b2009-08-11 20:47:22 +00003668 SDValue t2 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t1, X);
3669 SDValue Log10ofMantissa = DAG.getNode(ISD::FSUB, dl, MVT::f32, t2,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003670 getF32Constant(DAG, 0x3f011300));
Bill Wendlingbd297bc2008-09-09 18:42:23 +00003671
Scott Michelfdc40a02009-02-17 22:15:04 +00003672 result = DAG.getNode(ISD::FADD, dl,
Owen Anderson825b72b2009-08-11 20:47:22 +00003673 MVT::f32, LogOfExponent, Log10ofMantissa);
Bill Wendling3eb59402008-09-09 00:28:24 +00003674 } else if (LimitFloatPrecision > 6 && LimitFloatPrecision <= 12) {
3675 // For floating-point precision of 12:
3676 //
3677 // Log10ofMantissa =
3678 // -0.64831180f +
3679 // (0.91751397f +
3680 // (-0.31664806f + 0.47637168e-1f * x) * x) * x;
3681 //
3682 // error 0.00019228036, which is better than 12 bits
Owen Anderson825b72b2009-08-11 20:47:22 +00003683 SDValue t0 = DAG.getNode(ISD::FMUL, dl, MVT::f32, X,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003684 getF32Constant(DAG, 0x3d431f31));
Owen Anderson825b72b2009-08-11 20:47:22 +00003685 SDValue t1 = DAG.getNode(ISD::FSUB, dl, MVT::f32, t0,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003686 getF32Constant(DAG, 0x3ea21fb2));
Owen Anderson825b72b2009-08-11 20:47:22 +00003687 SDValue t2 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t1, X);
3688 SDValue t3 = DAG.getNode(ISD::FADD, dl, MVT::f32, t2,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003689 getF32Constant(DAG, 0x3f6ae232));
Owen Anderson825b72b2009-08-11 20:47:22 +00003690 SDValue t4 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t3, X);
3691 SDValue Log10ofMantissa = DAG.getNode(ISD::FSUB, dl, MVT::f32, t4,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003692 getF32Constant(DAG, 0x3f25f7c3));
Bill Wendling3eb59402008-09-09 00:28:24 +00003693
Scott Michelfdc40a02009-02-17 22:15:04 +00003694 result = DAG.getNode(ISD::FADD, dl,
Owen Anderson825b72b2009-08-11 20:47:22 +00003695 MVT::f32, LogOfExponent, Log10ofMantissa);
Bill Wendling3eb59402008-09-09 00:28:24 +00003696 } else { // LimitFloatPrecision > 12 && LimitFloatPrecision <= 18
Bill Wendlingbd297bc2008-09-09 18:42:23 +00003697 // For floating-point precision of 18:
3698 //
3699 // Log10ofMantissa =
3700 // -0.84299375f +
3701 // (1.5327582f +
3702 // (-1.0688956f +
3703 // (0.49102474f +
3704 // (-0.12539807f + 0.13508273e-1f * x) * x) * x) * x) * x;
3705 //
3706 // error 0.0000037995730, which is better than 18 bits
Owen Anderson825b72b2009-08-11 20:47:22 +00003707 SDValue t0 = DAG.getNode(ISD::FMUL, dl, MVT::f32, X,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003708 getF32Constant(DAG, 0x3c5d51ce));
Owen Anderson825b72b2009-08-11 20:47:22 +00003709 SDValue t1 = DAG.getNode(ISD::FSUB, dl, MVT::f32, t0,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003710 getF32Constant(DAG, 0x3e00685a));
Owen Anderson825b72b2009-08-11 20:47:22 +00003711 SDValue t2 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t1, X);
3712 SDValue t3 = DAG.getNode(ISD::FADD, dl, MVT::f32, t2,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003713 getF32Constant(DAG, 0x3efb6798));
Owen Anderson825b72b2009-08-11 20:47:22 +00003714 SDValue t4 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t3, X);
3715 SDValue t5 = DAG.getNode(ISD::FSUB, dl, MVT::f32, t4,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003716 getF32Constant(DAG, 0x3f88d192));
Owen Anderson825b72b2009-08-11 20:47:22 +00003717 SDValue t6 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t5, X);
3718 SDValue t7 = DAG.getNode(ISD::FADD, dl, MVT::f32, t6,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003719 getF32Constant(DAG, 0x3fc4316c));
Owen Anderson825b72b2009-08-11 20:47:22 +00003720 SDValue t8 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t7, X);
3721 SDValue Log10ofMantissa = DAG.getNode(ISD::FSUB, dl, MVT::f32, t8,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003722 getF32Constant(DAG, 0x3f57ce70));
Bill Wendlingbd297bc2008-09-09 18:42:23 +00003723
Scott Michelfdc40a02009-02-17 22:15:04 +00003724 result = DAG.getNode(ISD::FADD, dl,
Owen Anderson825b72b2009-08-11 20:47:22 +00003725 MVT::f32, LogOfExponent, Log10ofMantissa);
Bill Wendling3eb59402008-09-09 00:28:24 +00003726 }
Dale Johannesen852680a2008-09-05 21:27:19 +00003727 } else {
Bill Wendling3eb59402008-09-09 00:28:24 +00003728 // No special expansion.
Dale Johannesenfa42dea2009-01-30 01:34:22 +00003729 result = DAG.getNode(ISD::FLOG10, dl,
Gabor Greif0635f352010-06-25 09:38:13 +00003730 getValue(I.getArgOperand(0)).getValueType(),
3731 getValue(I.getArgOperand(0)));
Dale Johannesen852680a2008-09-05 21:27:19 +00003732 }
Bill Wendling3eb59402008-09-09 00:28:24 +00003733
Dale Johannesen59e577f2008-09-05 18:38:42 +00003734 setValue(&I, result);
3735}
3736
Bill Wendlinge10c8142008-09-09 22:39:21 +00003737/// visitExp2 - Lower an exp2 intrinsic. Handles the special sequences for
3738/// limited-precision mode.
Dale Johannesen601d3c02008-09-05 01:48:15 +00003739void
Dan Gohman46510a72010-04-15 01:51:59 +00003740SelectionDAGBuilder::visitExp2(const CallInst &I) {
Dale Johannesen601d3c02008-09-05 01:48:15 +00003741 SDValue result;
Dale Johannesen66978ee2009-01-31 02:22:37 +00003742 DebugLoc dl = getCurDebugLoc();
Bill Wendlinge10c8142008-09-09 22:39:21 +00003743
Gabor Greif0635f352010-06-25 09:38:13 +00003744 if (getValue(I.getArgOperand(0)).getValueType() == MVT::f32 &&
Bill Wendlinge10c8142008-09-09 22:39:21 +00003745 LimitFloatPrecision > 0 && LimitFloatPrecision <= 18) {
Gabor Greif0635f352010-06-25 09:38:13 +00003746 SDValue Op = getValue(I.getArgOperand(0));
Bill Wendlinge10c8142008-09-09 22:39:21 +00003747
Owen Anderson825b72b2009-08-11 20:47:22 +00003748 SDValue IntegerPartOfX = DAG.getNode(ISD::FP_TO_SINT, dl, MVT::i32, Op);
Bill Wendlinge10c8142008-09-09 22:39:21 +00003749
3750 // FractionalPartOfX = x - (float)IntegerPartOfX;
Owen Anderson825b72b2009-08-11 20:47:22 +00003751 SDValue t1 = DAG.getNode(ISD::SINT_TO_FP, dl, MVT::f32, IntegerPartOfX);
3752 SDValue X = DAG.getNode(ISD::FSUB, dl, MVT::f32, Op, t1);
Bill Wendlinge10c8142008-09-09 22:39:21 +00003753
3754 // IntegerPartOfX <<= 23;
Owen Anderson825b72b2009-08-11 20:47:22 +00003755 IntegerPartOfX = DAG.getNode(ISD::SHL, dl, MVT::i32, IntegerPartOfX,
Duncan Sands92abc622009-01-31 15:50:11 +00003756 DAG.getConstant(23, TLI.getPointerTy()));
Bill Wendlinge10c8142008-09-09 22:39:21 +00003757
3758 if (LimitFloatPrecision <= 6) {
3759 // For floating-point precision of 6:
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00003760 //
Bill Wendlinge10c8142008-09-09 22:39:21 +00003761 // TwoToFractionalPartOfX =
3762 // 0.997535578f +
3763 // (0.735607626f + 0.252464424f * x) * x;
3764 //
3765 // error 0.0144103317, which is 6 bits
Owen Anderson825b72b2009-08-11 20:47:22 +00003766 SDValue t2 = DAG.getNode(ISD::FMUL, dl, MVT::f32, X,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003767 getF32Constant(DAG, 0x3e814304));
Owen Anderson825b72b2009-08-11 20:47:22 +00003768 SDValue t3 = DAG.getNode(ISD::FADD, dl, MVT::f32, t2,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003769 getF32Constant(DAG, 0x3f3c50c8));
Owen Anderson825b72b2009-08-11 20:47:22 +00003770 SDValue t4 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t3, X);
3771 SDValue t5 = DAG.getNode(ISD::FADD, dl, MVT::f32, t4,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003772 getF32Constant(DAG, 0x3f7f5e7e));
Wesley Peckbf17cfa2010-11-23 03:31:01 +00003773 SDValue t6 = DAG.getNode(ISD::BITCAST, dl, MVT::i32, t5);
Bill Wendlinge10c8142008-09-09 22:39:21 +00003774 SDValue TwoToFractionalPartOfX =
Owen Anderson825b72b2009-08-11 20:47:22 +00003775 DAG.getNode(ISD::ADD, dl, MVT::i32, t6, IntegerPartOfX);
Bill Wendlinge10c8142008-09-09 22:39:21 +00003776
Wesley Peckbf17cfa2010-11-23 03:31:01 +00003777 result = DAG.getNode(ISD::BITCAST, dl,
Owen Anderson825b72b2009-08-11 20:47:22 +00003778 MVT::f32, TwoToFractionalPartOfX);
Bill Wendlinge10c8142008-09-09 22:39:21 +00003779 } else if (LimitFloatPrecision > 6 && LimitFloatPrecision <= 12) {
3780 // For floating-point precision of 12:
3781 //
3782 // TwoToFractionalPartOfX =
3783 // 0.999892986f +
3784 // (0.696457318f +
3785 // (0.224338339f + 0.792043434e-1f * x) * x) * x;
3786 //
3787 // error 0.000107046256, which is 13 to 14 bits
Owen Anderson825b72b2009-08-11 20:47:22 +00003788 SDValue t2 = DAG.getNode(ISD::FMUL, dl, MVT::f32, X,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003789 getF32Constant(DAG, 0x3da235e3));
Owen Anderson825b72b2009-08-11 20:47:22 +00003790 SDValue t3 = DAG.getNode(ISD::FADD, dl, MVT::f32, t2,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003791 getF32Constant(DAG, 0x3e65b8f3));
Owen Anderson825b72b2009-08-11 20:47:22 +00003792 SDValue t4 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t3, X);
3793 SDValue t5 = DAG.getNode(ISD::FADD, dl, MVT::f32, t4,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003794 getF32Constant(DAG, 0x3f324b07));
Owen Anderson825b72b2009-08-11 20:47:22 +00003795 SDValue t6 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t5, X);
3796 SDValue t7 = DAG.getNode(ISD::FADD, dl, MVT::f32, t6,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003797 getF32Constant(DAG, 0x3f7ff8fd));
Wesley Peckbf17cfa2010-11-23 03:31:01 +00003798 SDValue t8 = DAG.getNode(ISD::BITCAST, dl, MVT::i32, t7);
Bill Wendlinge10c8142008-09-09 22:39:21 +00003799 SDValue TwoToFractionalPartOfX =
Owen Anderson825b72b2009-08-11 20:47:22 +00003800 DAG.getNode(ISD::ADD, dl, MVT::i32, t8, IntegerPartOfX);
Bill Wendlinge10c8142008-09-09 22:39:21 +00003801
Wesley Peckbf17cfa2010-11-23 03:31:01 +00003802 result = DAG.getNode(ISD::BITCAST, dl,
Owen Anderson825b72b2009-08-11 20:47:22 +00003803 MVT::f32, TwoToFractionalPartOfX);
Bill Wendlinge10c8142008-09-09 22:39:21 +00003804 } else { // LimitFloatPrecision > 12 && LimitFloatPrecision <= 18
3805 // For floating-point precision of 18:
3806 //
3807 // TwoToFractionalPartOfX =
3808 // 0.999999982f +
3809 // (0.693148872f +
3810 // (0.240227044f +
3811 // (0.554906021e-1f +
3812 // (0.961591928e-2f +
3813 // (0.136028312e-2f + 0.157059148e-3f *x)*x)*x)*x)*x)*x;
3814 // error 2.47208000*10^(-7), which is better than 18 bits
Owen Anderson825b72b2009-08-11 20:47:22 +00003815 SDValue t2 = DAG.getNode(ISD::FMUL, dl, MVT::f32, X,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003816 getF32Constant(DAG, 0x3924b03e));
Owen Anderson825b72b2009-08-11 20:47:22 +00003817 SDValue t3 = DAG.getNode(ISD::FADD, dl, MVT::f32, t2,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003818 getF32Constant(DAG, 0x3ab24b87));
Owen Anderson825b72b2009-08-11 20:47:22 +00003819 SDValue t4 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t3, X);
3820 SDValue t5 = DAG.getNode(ISD::FADD, dl, MVT::f32, t4,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003821 getF32Constant(DAG, 0x3c1d8c17));
Owen Anderson825b72b2009-08-11 20:47:22 +00003822 SDValue t6 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t5, X);
3823 SDValue t7 = DAG.getNode(ISD::FADD, dl, MVT::f32, t6,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003824 getF32Constant(DAG, 0x3d634a1d));
Owen Anderson825b72b2009-08-11 20:47:22 +00003825 SDValue t8 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t7, X);
3826 SDValue t9 = DAG.getNode(ISD::FADD, dl, MVT::f32, t8,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003827 getF32Constant(DAG, 0x3e75fe14));
Owen Anderson825b72b2009-08-11 20:47:22 +00003828 SDValue t10 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t9, X);
3829 SDValue t11 = DAG.getNode(ISD::FADD, dl, MVT::f32, t10,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003830 getF32Constant(DAG, 0x3f317234));
Owen Anderson825b72b2009-08-11 20:47:22 +00003831 SDValue t12 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t11, X);
3832 SDValue t13 = DAG.getNode(ISD::FADD, dl, MVT::f32, t12,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003833 getF32Constant(DAG, 0x3f800000));
Wesley Peckbf17cfa2010-11-23 03:31:01 +00003834 SDValue t14 = DAG.getNode(ISD::BITCAST, dl, MVT::i32, t13);
Bill Wendlinge10c8142008-09-09 22:39:21 +00003835 SDValue TwoToFractionalPartOfX =
Owen Anderson825b72b2009-08-11 20:47:22 +00003836 DAG.getNode(ISD::ADD, dl, MVT::i32, t14, IntegerPartOfX);
Bill Wendlinge10c8142008-09-09 22:39:21 +00003837
Wesley Peckbf17cfa2010-11-23 03:31:01 +00003838 result = DAG.getNode(ISD::BITCAST, dl,
Owen Anderson825b72b2009-08-11 20:47:22 +00003839 MVT::f32, TwoToFractionalPartOfX);
Bill Wendlinge10c8142008-09-09 22:39:21 +00003840 }
Dale Johannesen601d3c02008-09-05 01:48:15 +00003841 } else {
Bill Wendling3eb59402008-09-09 00:28:24 +00003842 // No special expansion.
Dale Johannesenfa42dea2009-01-30 01:34:22 +00003843 result = DAG.getNode(ISD::FEXP2, dl,
Gabor Greif0635f352010-06-25 09:38:13 +00003844 getValue(I.getArgOperand(0)).getValueType(),
3845 getValue(I.getArgOperand(0)));
Dale Johannesen601d3c02008-09-05 01:48:15 +00003846 }
Bill Wendlinge10c8142008-09-09 22:39:21 +00003847
Dale Johannesen601d3c02008-09-05 01:48:15 +00003848 setValue(&I, result);
3849}
3850
Bill Wendlingaeb5c7b2008-09-10 00:20:20 +00003851/// visitPow - Lower a pow intrinsic. Handles the special sequences for
3852/// limited-precision mode with x == 10.0f.
3853void
Dan Gohman46510a72010-04-15 01:51:59 +00003854SelectionDAGBuilder::visitPow(const CallInst &I) {
Bill Wendlingaeb5c7b2008-09-10 00:20:20 +00003855 SDValue result;
Gabor Greif0635f352010-06-25 09:38:13 +00003856 const Value *Val = I.getArgOperand(0);
Dale Johannesen66978ee2009-01-31 02:22:37 +00003857 DebugLoc dl = getCurDebugLoc();
Bill Wendlingaeb5c7b2008-09-10 00:20:20 +00003858 bool IsExp10 = false;
3859
Owen Anderson825b72b2009-08-11 20:47:22 +00003860 if (getValue(Val).getValueType() == MVT::f32 &&
Gabor Greif0635f352010-06-25 09:38:13 +00003861 getValue(I.getArgOperand(1)).getValueType() == MVT::f32 &&
Bill Wendlingaeb5c7b2008-09-10 00:20:20 +00003862 LimitFloatPrecision > 0 && LimitFloatPrecision <= 18) {
3863 if (Constant *C = const_cast<Constant*>(dyn_cast<Constant>(Val))) {
3864 if (ConstantFP *CFP = dyn_cast<ConstantFP>(C)) {
3865 APFloat Ten(10.0f);
3866 IsExp10 = CFP->getValueAPF().bitwiseIsEqual(Ten);
3867 }
3868 }
3869 }
3870
3871 if (IsExp10 && LimitFloatPrecision > 0 && LimitFloatPrecision <= 18) {
Gabor Greif0635f352010-06-25 09:38:13 +00003872 SDValue Op = getValue(I.getArgOperand(1));
Bill Wendlingaeb5c7b2008-09-10 00:20:20 +00003873
3874 // Put the exponent in the right bit position for later addition to the
3875 // final result:
3876 //
3877 // #define LOG2OF10 3.3219281f
3878 // IntegerPartOfX = (int32_t)(x * LOG2OF10);
Owen Anderson825b72b2009-08-11 20:47:22 +00003879 SDValue t0 = DAG.getNode(ISD::FMUL, dl, MVT::f32, Op,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003880 getF32Constant(DAG, 0x40549a78));
Owen Anderson825b72b2009-08-11 20:47:22 +00003881 SDValue IntegerPartOfX = DAG.getNode(ISD::FP_TO_SINT, dl, MVT::i32, t0);
Bill Wendlingaeb5c7b2008-09-10 00:20:20 +00003882
3883 // FractionalPartOfX = x - (float)IntegerPartOfX;
Owen Anderson825b72b2009-08-11 20:47:22 +00003884 SDValue t1 = DAG.getNode(ISD::SINT_TO_FP, dl, MVT::f32, IntegerPartOfX);
3885 SDValue X = DAG.getNode(ISD::FSUB, dl, MVT::f32, t0, t1);
Bill Wendlingaeb5c7b2008-09-10 00:20:20 +00003886
3887 // IntegerPartOfX <<= 23;
Owen Anderson825b72b2009-08-11 20:47:22 +00003888 IntegerPartOfX = DAG.getNode(ISD::SHL, dl, MVT::i32, IntegerPartOfX,
Duncan Sands92abc622009-01-31 15:50:11 +00003889 DAG.getConstant(23, TLI.getPointerTy()));
Bill Wendlingaeb5c7b2008-09-10 00:20:20 +00003890
3891 if (LimitFloatPrecision <= 6) {
3892 // For floating-point precision of 6:
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00003893 //
Bill Wendlingaeb5c7b2008-09-10 00:20:20 +00003894 // twoToFractionalPartOfX =
3895 // 0.997535578f +
3896 // (0.735607626f + 0.252464424f * x) * x;
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00003897 //
Bill Wendlingaeb5c7b2008-09-10 00:20:20 +00003898 // error 0.0144103317, which is 6 bits
Owen Anderson825b72b2009-08-11 20:47:22 +00003899 SDValue t2 = DAG.getNode(ISD::FMUL, dl, MVT::f32, X,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003900 getF32Constant(DAG, 0x3e814304));
Owen Anderson825b72b2009-08-11 20:47:22 +00003901 SDValue t3 = DAG.getNode(ISD::FADD, dl, MVT::f32, t2,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003902 getF32Constant(DAG, 0x3f3c50c8));
Owen Anderson825b72b2009-08-11 20:47:22 +00003903 SDValue t4 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t3, X);
3904 SDValue t5 = DAG.getNode(ISD::FADD, dl, MVT::f32, t4,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003905 getF32Constant(DAG, 0x3f7f5e7e));
Wesley Peckbf17cfa2010-11-23 03:31:01 +00003906 SDValue t6 = DAG.getNode(ISD::BITCAST, dl, MVT::i32, t5);
Bill Wendlingaeb5c7b2008-09-10 00:20:20 +00003907 SDValue TwoToFractionalPartOfX =
Owen Anderson825b72b2009-08-11 20:47:22 +00003908 DAG.getNode(ISD::ADD, dl, MVT::i32, t6, IntegerPartOfX);
Bill Wendlingaeb5c7b2008-09-10 00:20:20 +00003909
Wesley Peckbf17cfa2010-11-23 03:31:01 +00003910 result = DAG.getNode(ISD::BITCAST, dl,
Owen Anderson825b72b2009-08-11 20:47:22 +00003911 MVT::f32, TwoToFractionalPartOfX);
Bill Wendlingaeb5c7b2008-09-10 00:20:20 +00003912 } else if (LimitFloatPrecision > 6 && LimitFloatPrecision <= 12) {
3913 // For floating-point precision of 12:
3914 //
3915 // TwoToFractionalPartOfX =
3916 // 0.999892986f +
3917 // (0.696457318f +
3918 // (0.224338339f + 0.792043434e-1f * x) * x) * x;
3919 //
3920 // error 0.000107046256, which is 13 to 14 bits
Owen Anderson825b72b2009-08-11 20:47:22 +00003921 SDValue t2 = DAG.getNode(ISD::FMUL, dl, MVT::f32, X,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003922 getF32Constant(DAG, 0x3da235e3));
Owen Anderson825b72b2009-08-11 20:47:22 +00003923 SDValue t3 = DAG.getNode(ISD::FADD, dl, MVT::f32, t2,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003924 getF32Constant(DAG, 0x3e65b8f3));
Owen Anderson825b72b2009-08-11 20:47:22 +00003925 SDValue t4 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t3, X);
3926 SDValue t5 = DAG.getNode(ISD::FADD, dl, MVT::f32, t4,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003927 getF32Constant(DAG, 0x3f324b07));
Owen Anderson825b72b2009-08-11 20:47:22 +00003928 SDValue t6 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t5, X);
3929 SDValue t7 = DAG.getNode(ISD::FADD, dl, MVT::f32, t6,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003930 getF32Constant(DAG, 0x3f7ff8fd));
Wesley Peckbf17cfa2010-11-23 03:31:01 +00003931 SDValue t8 = DAG.getNode(ISD::BITCAST, dl, MVT::i32, t7);
Bill Wendlingaeb5c7b2008-09-10 00:20:20 +00003932 SDValue TwoToFractionalPartOfX =
Owen Anderson825b72b2009-08-11 20:47:22 +00003933 DAG.getNode(ISD::ADD, dl, MVT::i32, t8, IntegerPartOfX);
Bill Wendlingaeb5c7b2008-09-10 00:20:20 +00003934
Wesley Peckbf17cfa2010-11-23 03:31:01 +00003935 result = DAG.getNode(ISD::BITCAST, dl,
Owen Anderson825b72b2009-08-11 20:47:22 +00003936 MVT::f32, TwoToFractionalPartOfX);
Bill Wendlingaeb5c7b2008-09-10 00:20:20 +00003937 } else { // LimitFloatPrecision > 12 && LimitFloatPrecision <= 18
3938 // For floating-point precision of 18:
3939 //
3940 // TwoToFractionalPartOfX =
3941 // 0.999999982f +
3942 // (0.693148872f +
3943 // (0.240227044f +
3944 // (0.554906021e-1f +
3945 // (0.961591928e-2f +
3946 // (0.136028312e-2f + 0.157059148e-3f *x)*x)*x)*x)*x)*x;
3947 // error 2.47208000*10^(-7), which is better than 18 bits
Owen Anderson825b72b2009-08-11 20:47:22 +00003948 SDValue t2 = DAG.getNode(ISD::FMUL, dl, MVT::f32, X,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003949 getF32Constant(DAG, 0x3924b03e));
Owen Anderson825b72b2009-08-11 20:47:22 +00003950 SDValue t3 = DAG.getNode(ISD::FADD, dl, MVT::f32, t2,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003951 getF32Constant(DAG, 0x3ab24b87));
Owen Anderson825b72b2009-08-11 20:47:22 +00003952 SDValue t4 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t3, X);
3953 SDValue t5 = DAG.getNode(ISD::FADD, dl, MVT::f32, t4,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003954 getF32Constant(DAG, 0x3c1d8c17));
Owen Anderson825b72b2009-08-11 20:47:22 +00003955 SDValue t6 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t5, X);
3956 SDValue t7 = DAG.getNode(ISD::FADD, dl, MVT::f32, t6,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003957 getF32Constant(DAG, 0x3d634a1d));
Owen Anderson825b72b2009-08-11 20:47:22 +00003958 SDValue t8 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t7, X);
3959 SDValue t9 = DAG.getNode(ISD::FADD, dl, MVT::f32, t8,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003960 getF32Constant(DAG, 0x3e75fe14));
Owen Anderson825b72b2009-08-11 20:47:22 +00003961 SDValue t10 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t9, X);
3962 SDValue t11 = DAG.getNode(ISD::FADD, dl, MVT::f32, t10,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003963 getF32Constant(DAG, 0x3f317234));
Owen Anderson825b72b2009-08-11 20:47:22 +00003964 SDValue t12 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t11, X);
3965 SDValue t13 = DAG.getNode(ISD::FADD, dl, MVT::f32, t12,
Bill Wendlingcd4c73a2008-09-22 00:44:35 +00003966 getF32Constant(DAG, 0x3f800000));
Wesley Peckbf17cfa2010-11-23 03:31:01 +00003967 SDValue t14 = DAG.getNode(ISD::BITCAST, dl, MVT::i32, t13);
Bill Wendlingaeb5c7b2008-09-10 00:20:20 +00003968 SDValue TwoToFractionalPartOfX =
Owen Anderson825b72b2009-08-11 20:47:22 +00003969 DAG.getNode(ISD::ADD, dl, MVT::i32, t14, IntegerPartOfX);
Bill Wendlingaeb5c7b2008-09-10 00:20:20 +00003970
Wesley Peckbf17cfa2010-11-23 03:31:01 +00003971 result = DAG.getNode(ISD::BITCAST, dl,
Owen Anderson825b72b2009-08-11 20:47:22 +00003972 MVT::f32, TwoToFractionalPartOfX);
Bill Wendlingaeb5c7b2008-09-10 00:20:20 +00003973 }
3974 } else {
3975 // No special expansion.
Dale Johannesenfa42dea2009-01-30 01:34:22 +00003976 result = DAG.getNode(ISD::FPOW, dl,
Gabor Greif0635f352010-06-25 09:38:13 +00003977 getValue(I.getArgOperand(0)).getValueType(),
3978 getValue(I.getArgOperand(0)),
3979 getValue(I.getArgOperand(1)));
Bill Wendlingaeb5c7b2008-09-10 00:20:20 +00003980 }
3981
3982 setValue(&I, result);
3983}
3984
Chris Lattnerf031e8a2010-01-01 03:32:16 +00003985
3986/// ExpandPowI - Expand a llvm.powi intrinsic.
3987static SDValue ExpandPowI(DebugLoc DL, SDValue LHS, SDValue RHS,
3988 SelectionDAG &DAG) {
3989 // If RHS is a constant, we can expand this out to a multiplication tree,
3990 // otherwise we end up lowering to a call to __powidf2 (for example). When
3991 // optimizing for size, we only want to do this if the expansion would produce
3992 // a small number of multiplies, otherwise we do the full expansion.
3993 if (ConstantSDNode *RHSC = dyn_cast<ConstantSDNode>(RHS)) {
3994 // Get the exponent as a positive value.
3995 unsigned Val = RHSC->getSExtValue();
3996 if ((int)Val < 0) Val = -Val;
Mikhail Glushenkovb3c01992010-01-01 04:41:22 +00003997
Chris Lattnerf031e8a2010-01-01 03:32:16 +00003998 // powi(x, 0) -> 1.0
3999 if (Val == 0)
4000 return DAG.getConstantFP(1.0, LHS.getValueType());
4001
Dan Gohmanae541aa2010-04-15 04:33:49 +00004002 const Function *F = DAG.getMachineFunction().getFunction();
Chris Lattnerf031e8a2010-01-01 03:32:16 +00004003 if (!F->hasFnAttr(Attribute::OptimizeForSize) ||
4004 // If optimizing for size, don't insert too many multiplies. This
4005 // inserts up to 5 multiplies.
4006 CountPopulation_32(Val)+Log2_32(Val) < 7) {
4007 // We use the simple binary decomposition method to generate the multiply
Mikhail Glushenkovb3c01992010-01-01 04:41:22 +00004008 // sequence. There are more optimal ways to do this (for example,
Chris Lattnerf031e8a2010-01-01 03:32:16 +00004009 // powi(x,15) generates one more multiply than it should), but this has
4010 // the benefit of being both really simple and much better than a libcall.
4011 SDValue Res; // Logically starts equal to 1.0
4012 SDValue CurSquare = LHS;
4013 while (Val) {
Mikhail Glushenkovbfdfea82010-01-01 04:41:36 +00004014 if (Val & 1) {
Chris Lattnerf031e8a2010-01-01 03:32:16 +00004015 if (Res.getNode())
4016 Res = DAG.getNode(ISD::FMUL, DL,Res.getValueType(), Res, CurSquare);
4017 else
4018 Res = CurSquare; // 1.0*CurSquare.
Mikhail Glushenkovbfdfea82010-01-01 04:41:36 +00004019 }
Mikhail Glushenkovb3c01992010-01-01 04:41:22 +00004020
Chris Lattnerf031e8a2010-01-01 03:32:16 +00004021 CurSquare = DAG.getNode(ISD::FMUL, DL, CurSquare.getValueType(),
4022 CurSquare, CurSquare);
4023 Val >>= 1;
4024 }
Mikhail Glushenkovb3c01992010-01-01 04:41:22 +00004025
Chris Lattnerf031e8a2010-01-01 03:32:16 +00004026 // If the original was negative, invert the result, producing 1/(x*x*x).
4027 if (RHSC->getSExtValue() < 0)
4028 Res = DAG.getNode(ISD::FDIV, DL, LHS.getValueType(),
4029 DAG.getConstantFP(1.0, LHS.getValueType()), Res);
4030 return Res;
4031 }
4032 }
4033
4034 // Otherwise, expand to a libcall.
4035 return DAG.getNode(ISD::FPOWI, DL, LHS.getValueType(), LHS, RHS);
4036}
4037
Evan Cheng2ad0fcf2010-04-28 23:08:54 +00004038/// EmitFuncArgumentDbgValue - If the DbgValueInst is a dbg_value of a function
4039/// argument, create the corresponding DBG_VALUE machine instruction for it now.
4040/// At the end of instruction selection, they will be inserted to the entry BB.
Evan Cheng9e8a2b92010-04-29 01:40:30 +00004041bool
Devang Patel78a06e52010-08-25 20:39:26 +00004042SelectionDAGBuilder::EmitFuncArgumentDbgValue(const Value *V, MDNode *Variable,
Michael J. Spencere70c5262010-10-16 08:25:21 +00004043 int64_t Offset,
Dan Gohman5d11ea32010-05-01 00:33:16 +00004044 const SDValue &N) {
Devang Patel0b48ead2010-08-31 22:22:42 +00004045 const Argument *Arg = dyn_cast<Argument>(V);
4046 if (!Arg)
Evan Cheng9e8a2b92010-04-29 01:40:30 +00004047 return false;
Evan Cheng2ad0fcf2010-04-28 23:08:54 +00004048
Devang Patel719f6a92010-04-29 20:40:36 +00004049 MachineFunction &MF = DAG.getMachineFunction();
Devang Patela90b3052010-11-02 17:01:30 +00004050 const TargetInstrInfo *TII = DAG.getTarget().getInstrInfo();
4051 const TargetRegisterInfo *TRI = DAG.getTarget().getRegisterInfo();
4052
Devang Patela83ce982010-04-29 18:50:36 +00004053 // Ignore inlined function arguments here.
4054 DIVariable DV(Variable);
Devang Patel719f6a92010-04-29 20:40:36 +00004055 if (DV.isInlinedFnArgument(MF.getFunction()))
Devang Patela83ce982010-04-29 18:50:36 +00004056 return false;
4057
Dan Gohman84023e02010-07-10 09:00:22 +00004058 MachineBasicBlock *MBB = FuncInfo.MBB;
Evan Cheng2ad0fcf2010-04-28 23:08:54 +00004059 if (MBB != &MF.front())
Evan Cheng9e8a2b92010-04-29 01:40:30 +00004060 return false;
Evan Cheng2ad0fcf2010-04-28 23:08:54 +00004061
4062 unsigned Reg = 0;
Devang Patel0b48ead2010-08-31 22:22:42 +00004063 if (Arg->hasByValAttr()) {
4064 // Byval arguments' frame index is recorded during argument lowering.
4065 // Use this info directly.
Devang Patel0b48ead2010-08-31 22:22:42 +00004066 Reg = TRI->getFrameRegister(MF);
4067 Offset = FuncInfo.getByValArgumentFrameIndex(Arg);
Devang Patel27f46cd2010-10-01 19:00:44 +00004068 // If byval argument ofset is not recorded then ignore this.
4069 if (!Offset)
4070 Reg = 0;
Devang Patel0b48ead2010-08-31 22:22:42 +00004071 }
4072
Devang Patel6cd467b2010-08-26 22:53:27 +00004073 if (N.getNode() && N.getOpcode() == ISD::CopyFromReg) {
Evan Cheng2ad0fcf2010-04-28 23:08:54 +00004074 Reg = cast<RegisterSDNode>(N.getOperand(1))->getReg();
Jakob Stoklund Olesenc9df0252011-01-10 02:58:51 +00004075 if (TargetRegisterInfo::isVirtualRegister(Reg)) {
Evan Cheng2ad0fcf2010-04-28 23:08:54 +00004076 MachineRegisterInfo &RegInfo = MF.getRegInfo();
4077 unsigned PR = RegInfo.getLiveInPhysReg(Reg);
4078 if (PR)
4079 Reg = PR;
4080 }
4081 }
4082
Evan Chenga36acad2010-04-29 06:33:38 +00004083 if (!Reg) {
Devang Patela90b3052010-11-02 17:01:30 +00004084 // Check if ValueMap has reg number.
Evan Chenga36acad2010-04-29 06:33:38 +00004085 DenseMap<const Value *, unsigned>::iterator VMI = FuncInfo.ValueMap.find(V);
Devang Patel8bc9ef72010-11-02 17:19:03 +00004086 if (VMI != FuncInfo.ValueMap.end())
4087 Reg = VMI->second;
Evan Chenga36acad2010-04-29 06:33:38 +00004088 }
Wesley Peckbf17cfa2010-11-23 03:31:01 +00004089
Devang Patel8bc9ef72010-11-02 17:19:03 +00004090 if (!Reg && N.getNode()) {
Devang Patela90b3052010-11-02 17:01:30 +00004091 // Check if frame index is available.
4092 if (LoadSDNode *LNode = dyn_cast<LoadSDNode>(N.getNode()))
Wesley Peckbf17cfa2010-11-23 03:31:01 +00004093 if (FrameIndexSDNode *FINode =
Devang Patela90b3052010-11-02 17:01:30 +00004094 dyn_cast<FrameIndexSDNode>(LNode->getBasePtr().getNode())) {
4095 Reg = TRI->getFrameRegister(MF);
4096 Offset = FINode->getIndex();
4097 }
Devang Patel8bc9ef72010-11-02 17:19:03 +00004098 }
4099
4100 if (!Reg)
4101 return false;
Devang Patela90b3052010-11-02 17:01:30 +00004102
Evan Cheng2ad0fcf2010-04-28 23:08:54 +00004103 MachineInstrBuilder MIB = BuildMI(MF, getCurDebugLoc(),
4104 TII->get(TargetOpcode::DBG_VALUE))
Evan Chenga36acad2010-04-29 06:33:38 +00004105 .addReg(Reg, RegState::Debug).addImm(Offset).addMetadata(Variable);
Evan Cheng2ad0fcf2010-04-28 23:08:54 +00004106 FuncInfo.ArgDbgValues.push_back(&*MIB);
Evan Cheng9e8a2b92010-04-29 01:40:30 +00004107 return true;
Evan Cheng2ad0fcf2010-04-28 23:08:54 +00004108}
Chris Lattnerf031e8a2010-01-01 03:32:16 +00004109
Douglas Gregor7d9663c2010-05-11 06:17:44 +00004110// VisualStudio defines setjmp as _setjmp
Michael J. Spencer1f409602010-09-24 19:48:47 +00004111#if defined(_MSC_VER) && defined(setjmp) && \
4112 !defined(setjmp_undefined_for_msvc)
4113# pragma push_macro("setjmp")
4114# undef setjmp
4115# define setjmp_undefined_for_msvc
Douglas Gregor7d9663c2010-05-11 06:17:44 +00004116#endif
4117
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004118/// visitIntrinsicCall - Lower the call to the specified intrinsic function. If
4119/// we want to emit this as a call to a named external function, return the name
4120/// otherwise lower it and return null.
4121const char *
Dan Gohman46510a72010-04-15 01:51:59 +00004122SelectionDAGBuilder::visitIntrinsicCall(const CallInst &I, unsigned Intrinsic) {
Dale Johannesen66978ee2009-01-31 02:22:37 +00004123 DebugLoc dl = getCurDebugLoc();
Bill Wendlingd0283fa2009-12-22 00:40:51 +00004124 SDValue Res;
4125
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004126 switch (Intrinsic) {
4127 default:
4128 // By default, turn this into a target intrinsic node.
4129 visitTargetIntrinsic(I, Intrinsic);
4130 return 0;
4131 case Intrinsic::vastart: visitVAStart(I); return 0;
4132 case Intrinsic::vaend: visitVAEnd(I); return 0;
4133 case Intrinsic::vacopy: visitVACopy(I); return 0;
4134 case Intrinsic::returnaddress:
Bill Wendling4533cac2010-01-28 21:51:40 +00004135 setValue(&I, DAG.getNode(ISD::RETURNADDR, dl, TLI.getPointerTy(),
Gabor Greif0635f352010-06-25 09:38:13 +00004136 getValue(I.getArgOperand(0))));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004137 return 0;
Bill Wendlingd5d81912008-09-26 22:10:44 +00004138 case Intrinsic::frameaddress:
Bill Wendling4533cac2010-01-28 21:51:40 +00004139 setValue(&I, DAG.getNode(ISD::FRAMEADDR, dl, TLI.getPointerTy(),
Gabor Greif0635f352010-06-25 09:38:13 +00004140 getValue(I.getArgOperand(0))));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004141 return 0;
4142 case Intrinsic::setjmp:
4143 return "_setjmp"+!TLI.usesUnderscoreSetJmp();
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004144 case Intrinsic::longjmp:
4145 return "_longjmp"+!TLI.usesUnderscoreLongJmp();
Chris Lattner824b9582008-11-21 16:42:48 +00004146 case Intrinsic::memcpy: {
Mon P Wang20adc9d2010-04-04 03:10:48 +00004147 // Assert for address < 256 since we support only user defined address
4148 // spaces.
Gabor Greif0635f352010-06-25 09:38:13 +00004149 assert(cast<PointerType>(I.getArgOperand(0)->getType())->getAddressSpace()
Mon P Wang20adc9d2010-04-04 03:10:48 +00004150 < 256 &&
Gabor Greif0635f352010-06-25 09:38:13 +00004151 cast<PointerType>(I.getArgOperand(1)->getType())->getAddressSpace()
Mon P Wang20adc9d2010-04-04 03:10:48 +00004152 < 256 &&
4153 "Unknown address space");
Gabor Greif0635f352010-06-25 09:38:13 +00004154 SDValue Op1 = getValue(I.getArgOperand(0));
4155 SDValue Op2 = getValue(I.getArgOperand(1));
4156 SDValue Op3 = getValue(I.getArgOperand(2));
4157 unsigned Align = cast<ConstantInt>(I.getArgOperand(3))->getZExtValue();
4158 bool isVol = cast<ConstantInt>(I.getArgOperand(4))->getZExtValue();
Mon P Wang20adc9d2010-04-04 03:10:48 +00004159 DAG.setRoot(DAG.getMemcpy(getRoot(), dl, Op1, Op2, Op3, Align, isVol, false,
Chris Lattnere72f2022010-09-21 05:40:29 +00004160 MachinePointerInfo(I.getArgOperand(0)),
4161 MachinePointerInfo(I.getArgOperand(1))));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004162 return 0;
4163 }
Chris Lattner824b9582008-11-21 16:42:48 +00004164 case Intrinsic::memset: {
Mon P Wang20adc9d2010-04-04 03:10:48 +00004165 // Assert for address < 256 since we support only user defined address
4166 // spaces.
Gabor Greif0635f352010-06-25 09:38:13 +00004167 assert(cast<PointerType>(I.getArgOperand(0)->getType())->getAddressSpace()
Mon P Wang20adc9d2010-04-04 03:10:48 +00004168 < 256 &&
4169 "Unknown address space");
Gabor Greif0635f352010-06-25 09:38:13 +00004170 SDValue Op1 = getValue(I.getArgOperand(0));
4171 SDValue Op2 = getValue(I.getArgOperand(1));
4172 SDValue Op3 = getValue(I.getArgOperand(2));
4173 unsigned Align = cast<ConstantInt>(I.getArgOperand(3))->getZExtValue();
4174 bool isVol = cast<ConstantInt>(I.getArgOperand(4))->getZExtValue();
Mon P Wang20adc9d2010-04-04 03:10:48 +00004175 DAG.setRoot(DAG.getMemset(getRoot(), dl, Op1, Op2, Op3, Align, isVol,
Chris Lattnere72f2022010-09-21 05:40:29 +00004176 MachinePointerInfo(I.getArgOperand(0))));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004177 return 0;
4178 }
Chris Lattner824b9582008-11-21 16:42:48 +00004179 case Intrinsic::memmove: {
Mon P Wang20adc9d2010-04-04 03:10:48 +00004180 // Assert for address < 256 since we support only user defined address
4181 // spaces.
Gabor Greif0635f352010-06-25 09:38:13 +00004182 assert(cast<PointerType>(I.getArgOperand(0)->getType())->getAddressSpace()
Mon P Wang20adc9d2010-04-04 03:10:48 +00004183 < 256 &&
Gabor Greif0635f352010-06-25 09:38:13 +00004184 cast<PointerType>(I.getArgOperand(1)->getType())->getAddressSpace()
Mon P Wang20adc9d2010-04-04 03:10:48 +00004185 < 256 &&
4186 "Unknown address space");
Gabor Greif0635f352010-06-25 09:38:13 +00004187 SDValue Op1 = getValue(I.getArgOperand(0));
4188 SDValue Op2 = getValue(I.getArgOperand(1));
4189 SDValue Op3 = getValue(I.getArgOperand(2));
4190 unsigned Align = cast<ConstantInt>(I.getArgOperand(3))->getZExtValue();
4191 bool isVol = cast<ConstantInt>(I.getArgOperand(4))->getZExtValue();
Mon P Wang20adc9d2010-04-04 03:10:48 +00004192 DAG.setRoot(DAG.getMemmove(getRoot(), dl, Op1, Op2, Op3, Align, isVol,
Chris Lattnere72f2022010-09-21 05:40:29 +00004193 MachinePointerInfo(I.getArgOperand(0)),
4194 MachinePointerInfo(I.getArgOperand(1))));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004195 return 0;
4196 }
Bill Wendling92c1e122009-02-13 02:16:35 +00004197 case Intrinsic::dbg_declare: {
Dan Gohman46510a72010-04-15 01:51:59 +00004198 const DbgDeclareInst &DI = cast<DbgDeclareInst>(I);
Devang Patelac1ceb32009-10-09 22:42:28 +00004199 MDNode *Variable = DI.getVariable();
Dan Gohman46510a72010-04-15 01:51:59 +00004200 const Value *Address = DI.getAddress();
Devang Patel8e741ed2010-09-02 21:02:27 +00004201 if (!Address || !DIVariable(DI.getVariable()).Verify())
Dale Johannesen8ac38f22010-02-08 21:53:27 +00004202 return 0;
Dale Johannesenfdb42fa2010-04-26 20:06:49 +00004203
4204 // Build an entry in DbgOrdering. Debug info input nodes get an SDNodeOrder
4205 // but do not always have a corresponding SDNode built. The SDNodeOrder
4206 // absolute, but not relative, values are different depending on whether
4207 // debug info exists.
4208 ++SDNodeOrder;
Devang Patel3f74a112010-09-02 21:29:42 +00004209
4210 // Check if address has undef value.
4211 if (isa<UndefValue>(Address) ||
4212 (Address->use_empty() && !isa<Argument>(Address))) {
Devang Patelafeaae72010-12-06 22:39:26 +00004213 DEBUG(dbgs() << "Dropping debug info for " << DI);
Devang Patel3f74a112010-09-02 21:29:42 +00004214 return 0;
4215 }
4216
Dale Johannesenfdb42fa2010-04-26 20:06:49 +00004217 SDValue &N = NodeMap[Address];
Devang Patel0b48ead2010-08-31 22:22:42 +00004218 if (!N.getNode() && isa<Argument>(Address))
4219 // Check unused arguments map.
4220 N = UnusedArgNodeMap[Address];
Dale Johannesenfdb42fa2010-04-26 20:06:49 +00004221 SDDbgValue *SDV;
4222 if (N.getNode()) {
Devang Patel8e741ed2010-09-02 21:02:27 +00004223 // Parameters are handled specially.
Michael J. Spencere70c5262010-10-16 08:25:21 +00004224 bool isParameter =
Devang Patel8e741ed2010-09-02 21:02:27 +00004225 DIVariable(Variable).getTag() == dwarf::DW_TAG_arg_variable;
4226 if (const BitCastInst *BCI = dyn_cast<BitCastInst>(Address))
4227 Address = BCI->getOperand(0);
4228 const AllocaInst *AI = dyn_cast<AllocaInst>(Address);
4229
Dale Johannesenfdb42fa2010-04-26 20:06:49 +00004230 if (isParameter && !AI) {
4231 FrameIndexSDNode *FINode = dyn_cast<FrameIndexSDNode>(N.getNode());
4232 if (FINode)
4233 // Byval parameter. We have a frame index at this point.
4234 SDV = DAG.getDbgValue(Variable, FINode->getIndex(),
4235 0, dl, SDNodeOrder);
Devang Patelafeaae72010-12-06 22:39:26 +00004236 else {
Dale Johannesenfdb42fa2010-04-26 20:06:49 +00004237 // Can't do anything with other non-AI cases yet. This might be a
4238 // parameter of a callee function that got inlined, for example.
Devang Patelafeaae72010-12-06 22:39:26 +00004239 DEBUG(dbgs() << "Dropping debug info for " << DI);
Dale Johannesenfdb42fa2010-04-26 20:06:49 +00004240 return 0;
Devang Patelafeaae72010-12-06 22:39:26 +00004241 }
Dale Johannesenfdb42fa2010-04-26 20:06:49 +00004242 } else if (AI)
4243 SDV = DAG.getDbgValue(Variable, N.getNode(), N.getResNo(),
4244 0, dl, SDNodeOrder);
Devang Patelafeaae72010-12-06 22:39:26 +00004245 else {
Dale Johannesenfdb42fa2010-04-26 20:06:49 +00004246 // Can't do anything with other non-AI cases yet.
Devang Patelafeaae72010-12-06 22:39:26 +00004247 DEBUG(dbgs() << "Dropping debug info for " << DI);
Dale Johannesenfdb42fa2010-04-26 20:06:49 +00004248 return 0;
Devang Patelafeaae72010-12-06 22:39:26 +00004249 }
Dale Johannesenfdb42fa2010-04-26 20:06:49 +00004250 DAG.AddDbgValue(SDV, N.getNode(), isParameter);
4251 } else {
Gabor Greiffb4032f2010-10-01 10:32:19 +00004252 // If Address is an argument then try to emit its dbg value using
Michael J. Spencere70c5262010-10-16 08:25:21 +00004253 // virtual register info from the FuncInfo.ValueMap.
Devang Patel6cd467b2010-08-26 22:53:27 +00004254 if (!EmitFuncArgumentDbgValue(Address, Variable, 0, N)) {
Devang Patel1397fdc2010-09-15 14:48:53 +00004255 // If variable is pinned by a alloca in dominating bb then
4256 // use StaticAllocaMap.
4257 if (const AllocaInst *AI = dyn_cast<AllocaInst>(Address)) {
Devang Patel27ede1b2010-09-15 18:13:55 +00004258 if (AI->getParent() != DI.getParent()) {
4259 DenseMap<const AllocaInst*, int>::iterator SI =
4260 FuncInfo.StaticAllocaMap.find(AI);
4261 if (SI != FuncInfo.StaticAllocaMap.end()) {
4262 SDV = DAG.getDbgValue(Variable, SI->second,
4263 0, dl, SDNodeOrder);
4264 DAG.AddDbgValue(SDV, 0, false);
4265 return 0;
4266 }
Devang Patel1397fdc2010-09-15 14:48:53 +00004267 }
4268 }
Devang Patelafeaae72010-12-06 22:39:26 +00004269 DEBUG(dbgs() << "Dropping debug info for " << DI);
Devang Patel6cd467b2010-08-26 22:53:27 +00004270 }
Dale Johannesenfdb42fa2010-04-26 20:06:49 +00004271 }
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004272 return 0;
Bill Wendling92c1e122009-02-13 02:16:35 +00004273 }
Dale Johannesen904c2fa2010-02-01 19:54:53 +00004274 case Intrinsic::dbg_value: {
Dan Gohman46510a72010-04-15 01:51:59 +00004275 const DbgValueInst &DI = cast<DbgValueInst>(I);
Devang Patel02f0dbd2010-05-07 22:04:20 +00004276 if (!DIVariable(DI.getVariable()).Verify())
Dale Johannesen904c2fa2010-02-01 19:54:53 +00004277 return 0;
4278
4279 MDNode *Variable = DI.getVariable();
Devang Patel00190342010-03-15 19:15:44 +00004280 uint64_t Offset = DI.getOffset();
Dan Gohman46510a72010-04-15 01:51:59 +00004281 const Value *V = DI.getValue();
Dale Johannesen904c2fa2010-02-01 19:54:53 +00004282 if (!V)
4283 return 0;
Devang Patel00190342010-03-15 19:15:44 +00004284
4285 // Build an entry in DbgOrdering. Debug info input nodes get an SDNodeOrder
4286 // but do not always have a corresponding SDNode built. The SDNodeOrder
4287 // absolute, but not relative, values are different depending on whether
4288 // debug info exists.
4289 ++SDNodeOrder;
Dale Johannesenfdb42fa2010-04-26 20:06:49 +00004290 SDDbgValue *SDV;
Devang Patel00190342010-03-15 19:15:44 +00004291 if (isa<ConstantInt>(V) || isa<ConstantFP>(V)) {
Dale Johannesenfdb42fa2010-04-26 20:06:49 +00004292 SDV = DAG.getDbgValue(Variable, V, Offset, dl, SDNodeOrder);
4293 DAG.AddDbgValue(SDV, 0, false);
Devang Patel00190342010-03-15 19:15:44 +00004294 } else {
Dale Johannesenbdc09d92010-07-16 00:02:08 +00004295 // Do not use getValue() in here; we don't want to generate code at
4296 // this point if it hasn't been done yet.
Devang Patel9126c0d2010-06-01 19:59:01 +00004297 SDValue N = NodeMap[V];
4298 if (!N.getNode() && isa<Argument>(V))
4299 // Check unused arguments map.
4300 N = UnusedArgNodeMap[V];
Dale Johannesenfdb42fa2010-04-26 20:06:49 +00004301 if (N.getNode()) {
Devang Patel78a06e52010-08-25 20:39:26 +00004302 if (!EmitFuncArgumentDbgValue(V, Variable, Offset, N)) {
Evan Cheng9e8a2b92010-04-29 01:40:30 +00004303 SDV = DAG.getDbgValue(Variable, N.getNode(),
4304 N.getResNo(), Offset, dl, SDNodeOrder);
4305 DAG.AddDbgValue(SDV, N.getNode(), false);
4306 }
Dale Johannesenbdc09d92010-07-16 00:02:08 +00004307 } else if (isa<PHINode>(V) && !V->use_empty() ) {
4308 // Do not call getValue(V) yet, as we don't want to generate code.
4309 // Remember it for later.
4310 DanglingDebugInfo DDI(&DI, dl, SDNodeOrder);
4311 DanglingDebugInfoMap[V] = DDI;
Devang Patel0991dfb2010-08-27 22:25:51 +00004312 } else {
Devang Patel00190342010-03-15 19:15:44 +00004313 // We may expand this to cover more cases. One case where we have no
Devang Patelafeaae72010-12-06 22:39:26 +00004314 // data available is an unreferenced parameter.
4315 DEBUG(dbgs() << "Dropping debug info for " << DI);
Dale Johannesenfdb42fa2010-04-26 20:06:49 +00004316 }
Devang Patel00190342010-03-15 19:15:44 +00004317 }
4318
4319 // Build a debug info table entry.
Dan Gohman46510a72010-04-15 01:51:59 +00004320 if (const BitCastInst *BCI = dyn_cast<BitCastInst>(V))
Dale Johannesen904c2fa2010-02-01 19:54:53 +00004321 V = BCI->getOperand(0);
Dan Gohman46510a72010-04-15 01:51:59 +00004322 const AllocaInst *AI = dyn_cast<AllocaInst>(V);
Dale Johannesen904c2fa2010-02-01 19:54:53 +00004323 // Don't handle byval struct arguments or VLAs, for example.
4324 if (!AI)
4325 return 0;
4326 DenseMap<const AllocaInst*, int>::iterator SI =
4327 FuncInfo.StaticAllocaMap.find(AI);
4328 if (SI == FuncInfo.StaticAllocaMap.end())
4329 return 0; // VLAs.
4330 int FI = SI->second;
Michael J. Spencere70c5262010-10-16 08:25:21 +00004331
Chris Lattner512063d2010-04-05 06:19:28 +00004332 MachineModuleInfo &MMI = DAG.getMachineFunction().getMMI();
4333 if (!DI.getDebugLoc().isUnknown() && MMI.hasDebugInfo())
4334 MMI.setVariableDbgInfo(Variable, FI, DI.getDebugLoc());
Dale Johannesen904c2fa2010-02-01 19:54:53 +00004335 return 0;
4336 }
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004337 case Intrinsic::eh_exception: {
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004338 // Insert the EXCEPTIONADDR instruction.
Dan Gohman84023e02010-07-10 09:00:22 +00004339 assert(FuncInfo.MBB->isLandingPad() &&
Dan Gohman99be8ae2010-04-19 22:41:47 +00004340 "Call to eh.exception not in landing pad!");
Owen Anderson825b72b2009-08-11 20:47:22 +00004341 SDVTList VTs = DAG.getVTList(TLI.getPointerTy(), MVT::Other);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004342 SDValue Ops[1];
4343 Ops[0] = DAG.getRoot();
Dale Johannesenfa42dea2009-01-30 01:34:22 +00004344 SDValue Op = DAG.getNode(ISD::EXCEPTIONADDR, dl, VTs, Ops, 1);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004345 setValue(&I, Op);
4346 DAG.setRoot(Op.getValue(1));
4347 return 0;
4348 }
4349
Duncan Sandsb01bbdc2009-10-14 16:11:37 +00004350 case Intrinsic::eh_selector: {
Dan Gohman84023e02010-07-10 09:00:22 +00004351 MachineBasicBlock *CallMBB = FuncInfo.MBB;
Chris Lattner512063d2010-04-05 06:19:28 +00004352 MachineModuleInfo &MMI = DAG.getMachineFunction().getMMI();
Dan Gohman99be8ae2010-04-19 22:41:47 +00004353 if (CallMBB->isLandingPad())
4354 AddCatchInfo(I, &MMI, CallMBB);
Chris Lattner3a5815f2009-09-17 23:54:54 +00004355 else {
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004356#ifndef NDEBUG
Chris Lattner3a5815f2009-09-17 23:54:54 +00004357 FuncInfo.CatchInfoLost.insert(&I);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004358#endif
Chris Lattner3a5815f2009-09-17 23:54:54 +00004359 // FIXME: Mark exception selector register as live in. Hack for PR1508.
4360 unsigned Reg = TLI.getExceptionSelectorRegister();
Dan Gohman84023e02010-07-10 09:00:22 +00004361 if (Reg) FuncInfo.MBB->addLiveIn(Reg);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004362 }
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00004363
Chris Lattner3a5815f2009-09-17 23:54:54 +00004364 // Insert the EHSELECTION instruction.
4365 SDVTList VTs = DAG.getVTList(TLI.getPointerTy(), MVT::Other);
4366 SDValue Ops[2];
Gabor Greif0635f352010-06-25 09:38:13 +00004367 Ops[0] = getValue(I.getArgOperand(0));
Chris Lattner3a5815f2009-09-17 23:54:54 +00004368 Ops[1] = getRoot();
4369 SDValue Op = DAG.getNode(ISD::EHSELECTION, dl, VTs, Ops, 2);
Chris Lattner3a5815f2009-09-17 23:54:54 +00004370 DAG.setRoot(Op.getValue(1));
Bill Wendling4533cac2010-01-28 21:51:40 +00004371 setValue(&I, DAG.getSExtOrTrunc(Op, dl, MVT::i32));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004372 return 0;
4373 }
4374
Duncan Sandsb01bbdc2009-10-14 16:11:37 +00004375 case Intrinsic::eh_typeid_for: {
Chris Lattner512063d2010-04-05 06:19:28 +00004376 // Find the type id for the given typeinfo.
Gabor Greif0635f352010-06-25 09:38:13 +00004377 GlobalVariable *GV = ExtractTypeInfo(I.getArgOperand(0));
Chris Lattner512063d2010-04-05 06:19:28 +00004378 unsigned TypeID = DAG.getMachineFunction().getMMI().getTypeIDFor(GV);
4379 Res = DAG.getConstant(TypeID, MVT::i32);
Bill Wendlingd0283fa2009-12-22 00:40:51 +00004380 setValue(&I, Res);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004381 return 0;
4382 }
4383
Anton Korobeynikova0e8a1e2008-09-08 21:13:56 +00004384 case Intrinsic::eh_return_i32:
4385 case Intrinsic::eh_return_i64:
Chris Lattner512063d2010-04-05 06:19:28 +00004386 DAG.getMachineFunction().getMMI().setCallsEHReturn(true);
4387 DAG.setRoot(DAG.getNode(ISD::EH_RETURN, dl,
4388 MVT::Other,
4389 getControlRoot(),
Gabor Greif0635f352010-06-25 09:38:13 +00004390 getValue(I.getArgOperand(0)),
4391 getValue(I.getArgOperand(1))));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004392 return 0;
Anton Korobeynikova0e8a1e2008-09-08 21:13:56 +00004393 case Intrinsic::eh_unwind_init:
Chris Lattner512063d2010-04-05 06:19:28 +00004394 DAG.getMachineFunction().getMMI().setCallsUnwindInit(true);
Anton Korobeynikova0e8a1e2008-09-08 21:13:56 +00004395 return 0;
Anton Korobeynikova0e8a1e2008-09-08 21:13:56 +00004396 case Intrinsic::eh_dwarf_cfa: {
Gabor Greif0635f352010-06-25 09:38:13 +00004397 SDValue CfaArg = DAG.getSExtOrTrunc(getValue(I.getArgOperand(0)), dl,
Duncan Sands3a66a682009-10-13 21:04:12 +00004398 TLI.getPointerTy());
Dale Johannesenfa42dea2009-01-30 01:34:22 +00004399 SDValue Offset = DAG.getNode(ISD::ADD, dl,
Anton Korobeynikova0e8a1e2008-09-08 21:13:56 +00004400 TLI.getPointerTy(),
Dale Johannesenfa42dea2009-01-30 01:34:22 +00004401 DAG.getNode(ISD::FRAME_TO_ARGS_OFFSET, dl,
Anton Korobeynikova0e8a1e2008-09-08 21:13:56 +00004402 TLI.getPointerTy()),
4403 CfaArg);
Bill Wendlingd0283fa2009-12-22 00:40:51 +00004404 SDValue FA = DAG.getNode(ISD::FRAMEADDR, dl,
Anton Korobeynikova0e8a1e2008-09-08 21:13:56 +00004405 TLI.getPointerTy(),
Bill Wendlingd0283fa2009-12-22 00:40:51 +00004406 DAG.getConstant(0, TLI.getPointerTy()));
Bill Wendling4533cac2010-01-28 21:51:40 +00004407 setValue(&I, DAG.getNode(ISD::ADD, dl, TLI.getPointerTy(),
4408 FA, Offset));
Anton Korobeynikova0e8a1e2008-09-08 21:13:56 +00004409 return 0;
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004410 }
Jim Grosbachca752c92010-01-28 01:45:32 +00004411 case Intrinsic::eh_sjlj_callsite: {
Chris Lattner512063d2010-04-05 06:19:28 +00004412 MachineModuleInfo &MMI = DAG.getMachineFunction().getMMI();
Gabor Greif0635f352010-06-25 09:38:13 +00004413 ConstantInt *CI = dyn_cast<ConstantInt>(I.getArgOperand(0));
Jim Grosbachca752c92010-01-28 01:45:32 +00004414 assert(CI && "Non-constant call site value in eh.sjlj.callsite!");
Chris Lattner512063d2010-04-05 06:19:28 +00004415 assert(MMI.getCurrentCallSite() == 0 && "Overlapping call sites!");
Jim Grosbachca752c92010-01-28 01:45:32 +00004416
Chris Lattner512063d2010-04-05 06:19:28 +00004417 MMI.setCurrentCallSite(CI->getZExtValue());
Jim Grosbachca752c92010-01-28 01:45:32 +00004418 return 0;
4419 }
Jim Grosbach23ff7cf2010-05-26 20:22:18 +00004420 case Intrinsic::eh_sjlj_setjmp: {
4421 setValue(&I, DAG.getNode(ISD::EH_SJLJ_SETJMP, dl, MVT::i32, getRoot(),
Gabor Greif0635f352010-06-25 09:38:13 +00004422 getValue(I.getArgOperand(0))));
Jim Grosbach23ff7cf2010-05-26 20:22:18 +00004423 return 0;
4424 }
Jim Grosbach5eb19512010-05-22 01:06:18 +00004425 case Intrinsic::eh_sjlj_longjmp: {
Jim Grosbach23ff7cf2010-05-26 20:22:18 +00004426 DAG.setRoot(DAG.getNode(ISD::EH_SJLJ_LONGJMP, dl, MVT::Other,
Jim Grosbache4ad3872010-10-19 23:27:08 +00004427 getRoot(), getValue(I.getArgOperand(0))));
4428 return 0;
4429 }
4430 case Intrinsic::eh_sjlj_dispatch_setup: {
4431 DAG.setRoot(DAG.getNode(ISD::EH_SJLJ_DISPATCHSETUP, dl, MVT::Other,
4432 getRoot(), getValue(I.getArgOperand(0))));
Jim Grosbach5eb19512010-05-22 01:06:18 +00004433 return 0;
4434 }
Jim Grosbachca752c92010-01-28 01:45:32 +00004435
Dale Johannesen0488fb62010-09-30 23:57:10 +00004436 case Intrinsic::x86_mmx_pslli_w:
4437 case Intrinsic::x86_mmx_pslli_d:
4438 case Intrinsic::x86_mmx_pslli_q:
4439 case Intrinsic::x86_mmx_psrli_w:
4440 case Intrinsic::x86_mmx_psrli_d:
4441 case Intrinsic::x86_mmx_psrli_q:
4442 case Intrinsic::x86_mmx_psrai_w:
4443 case Intrinsic::x86_mmx_psrai_d: {
4444 SDValue ShAmt = getValue(I.getArgOperand(1));
4445 if (isa<ConstantSDNode>(ShAmt)) {
4446 visitTargetIntrinsic(I, Intrinsic);
4447 return 0;
4448 }
4449 unsigned NewIntrinsic = 0;
4450 EVT ShAmtVT = MVT::v2i32;
4451 switch (Intrinsic) {
4452 case Intrinsic::x86_mmx_pslli_w:
4453 NewIntrinsic = Intrinsic::x86_mmx_psll_w;
4454 break;
4455 case Intrinsic::x86_mmx_pslli_d:
4456 NewIntrinsic = Intrinsic::x86_mmx_psll_d;
4457 break;
4458 case Intrinsic::x86_mmx_pslli_q:
4459 NewIntrinsic = Intrinsic::x86_mmx_psll_q;
4460 break;
4461 case Intrinsic::x86_mmx_psrli_w:
4462 NewIntrinsic = Intrinsic::x86_mmx_psrl_w;
4463 break;
4464 case Intrinsic::x86_mmx_psrli_d:
4465 NewIntrinsic = Intrinsic::x86_mmx_psrl_d;
4466 break;
4467 case Intrinsic::x86_mmx_psrli_q:
4468 NewIntrinsic = Intrinsic::x86_mmx_psrl_q;
4469 break;
4470 case Intrinsic::x86_mmx_psrai_w:
4471 NewIntrinsic = Intrinsic::x86_mmx_psra_w;
4472 break;
4473 case Intrinsic::x86_mmx_psrai_d:
4474 NewIntrinsic = Intrinsic::x86_mmx_psra_d;
4475 break;
4476 default: llvm_unreachable("Impossible intrinsic"); // Can't reach here.
4477 }
4478
4479 // The vector shift intrinsics with scalars uses 32b shift amounts but
4480 // the sse2/mmx shift instructions reads 64 bits. Set the upper 32 bits
4481 // to be zero.
4482 // We must do this early because v2i32 is not a legal type.
4483 DebugLoc dl = getCurDebugLoc();
4484 SDValue ShOps[2];
4485 ShOps[0] = ShAmt;
4486 ShOps[1] = DAG.getConstant(0, MVT::i32);
4487 ShAmt = DAG.getNode(ISD::BUILD_VECTOR, dl, ShAmtVT, &ShOps[0], 2);
4488 EVT DestVT = TLI.getValueType(I.getType());
Wesley Peckbf17cfa2010-11-23 03:31:01 +00004489 ShAmt = DAG.getNode(ISD::BITCAST, dl, DestVT, ShAmt);
Dale Johannesen0488fb62010-09-30 23:57:10 +00004490 Res = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, DestVT,
4491 DAG.getConstant(NewIntrinsic, MVT::i32),
4492 getValue(I.getArgOperand(0)), ShAmt);
4493 setValue(&I, Res);
4494 return 0;
4495 }
Mon P Wang77cdf302008-11-10 20:54:11 +00004496 case Intrinsic::convertff:
4497 case Intrinsic::convertfsi:
4498 case Intrinsic::convertfui:
4499 case Intrinsic::convertsif:
4500 case Intrinsic::convertuif:
4501 case Intrinsic::convertss:
4502 case Intrinsic::convertsu:
4503 case Intrinsic::convertus:
4504 case Intrinsic::convertuu: {
4505 ISD::CvtCode Code = ISD::CVT_INVALID;
4506 switch (Intrinsic) {
4507 case Intrinsic::convertff: Code = ISD::CVT_FF; break;
4508 case Intrinsic::convertfsi: Code = ISD::CVT_FS; break;
4509 case Intrinsic::convertfui: Code = ISD::CVT_FU; break;
4510 case Intrinsic::convertsif: Code = ISD::CVT_SF; break;
4511 case Intrinsic::convertuif: Code = ISD::CVT_UF; break;
4512 case Intrinsic::convertss: Code = ISD::CVT_SS; break;
4513 case Intrinsic::convertsu: Code = ISD::CVT_SU; break;
4514 case Intrinsic::convertus: Code = ISD::CVT_US; break;
4515 case Intrinsic::convertuu: Code = ISD::CVT_UU; break;
4516 }
Owen Andersone50ed302009-08-10 22:56:29 +00004517 EVT DestVT = TLI.getValueType(I.getType());
Gabor Greif0635f352010-06-25 09:38:13 +00004518 const Value *Op1 = I.getArgOperand(0);
Bill Wendlingd0283fa2009-12-22 00:40:51 +00004519 Res = DAG.getConvertRndSat(DestVT, getCurDebugLoc(), getValue(Op1),
4520 DAG.getValueType(DestVT),
4521 DAG.getValueType(getValue(Op1).getValueType()),
Gabor Greif0635f352010-06-25 09:38:13 +00004522 getValue(I.getArgOperand(1)),
4523 getValue(I.getArgOperand(2)),
Bill Wendlingd0283fa2009-12-22 00:40:51 +00004524 Code);
4525 setValue(&I, Res);
Mon P Wang77cdf302008-11-10 20:54:11 +00004526 return 0;
4527 }
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004528 case Intrinsic::sqrt:
Bill Wendling4533cac2010-01-28 21:51:40 +00004529 setValue(&I, DAG.getNode(ISD::FSQRT, dl,
Gabor Greif0635f352010-06-25 09:38:13 +00004530 getValue(I.getArgOperand(0)).getValueType(),
4531 getValue(I.getArgOperand(0))));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004532 return 0;
4533 case Intrinsic::powi:
Gabor Greif0635f352010-06-25 09:38:13 +00004534 setValue(&I, ExpandPowI(dl, getValue(I.getArgOperand(0)),
4535 getValue(I.getArgOperand(1)), DAG));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004536 return 0;
4537 case Intrinsic::sin:
Bill Wendling4533cac2010-01-28 21:51:40 +00004538 setValue(&I, DAG.getNode(ISD::FSIN, dl,
Gabor Greif0635f352010-06-25 09:38:13 +00004539 getValue(I.getArgOperand(0)).getValueType(),
4540 getValue(I.getArgOperand(0))));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004541 return 0;
4542 case Intrinsic::cos:
Bill Wendling4533cac2010-01-28 21:51:40 +00004543 setValue(&I, DAG.getNode(ISD::FCOS, dl,
Gabor Greif0635f352010-06-25 09:38:13 +00004544 getValue(I.getArgOperand(0)).getValueType(),
4545 getValue(I.getArgOperand(0))));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004546 return 0;
Dale Johannesen7794f2a2008-09-04 00:47:13 +00004547 case Intrinsic::log:
Dale Johannesen59e577f2008-09-05 18:38:42 +00004548 visitLog(I);
Dale Johannesen7794f2a2008-09-04 00:47:13 +00004549 return 0;
4550 case Intrinsic::log2:
Dale Johannesen59e577f2008-09-05 18:38:42 +00004551 visitLog2(I);
Dale Johannesen7794f2a2008-09-04 00:47:13 +00004552 return 0;
4553 case Intrinsic::log10:
Dale Johannesen59e577f2008-09-05 18:38:42 +00004554 visitLog10(I);
Dale Johannesen7794f2a2008-09-04 00:47:13 +00004555 return 0;
4556 case Intrinsic::exp:
Dale Johannesen59e577f2008-09-05 18:38:42 +00004557 visitExp(I);
Dale Johannesen7794f2a2008-09-04 00:47:13 +00004558 return 0;
4559 case Intrinsic::exp2:
Dale Johannesen601d3c02008-09-05 01:48:15 +00004560 visitExp2(I);
Dale Johannesen7794f2a2008-09-04 00:47:13 +00004561 return 0;
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004562 case Intrinsic::pow:
Bill Wendlingaeb5c7b2008-09-10 00:20:20 +00004563 visitPow(I);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004564 return 0;
Anton Korobeynikovbe5b0322010-03-14 18:42:15 +00004565 case Intrinsic::convert_to_fp16:
4566 setValue(&I, DAG.getNode(ISD::FP32_TO_FP16, dl,
Gabor Greif0635f352010-06-25 09:38:13 +00004567 MVT::i16, getValue(I.getArgOperand(0))));
Anton Korobeynikovbe5b0322010-03-14 18:42:15 +00004568 return 0;
4569 case Intrinsic::convert_from_fp16:
4570 setValue(&I, DAG.getNode(ISD::FP16_TO_FP32, dl,
Gabor Greif0635f352010-06-25 09:38:13 +00004571 MVT::f32, getValue(I.getArgOperand(0))));
Anton Korobeynikovbe5b0322010-03-14 18:42:15 +00004572 return 0;
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004573 case Intrinsic::pcmarker: {
Gabor Greif0635f352010-06-25 09:38:13 +00004574 SDValue Tmp = getValue(I.getArgOperand(0));
Bill Wendling4533cac2010-01-28 21:51:40 +00004575 DAG.setRoot(DAG.getNode(ISD::PCMARKER, dl, MVT::Other, getRoot(), Tmp));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004576 return 0;
4577 }
4578 case Intrinsic::readcyclecounter: {
4579 SDValue Op = getRoot();
Bill Wendlingd0283fa2009-12-22 00:40:51 +00004580 Res = DAG.getNode(ISD::READCYCLECOUNTER, dl,
4581 DAG.getVTList(MVT::i64, MVT::Other),
4582 &Op, 1);
4583 setValue(&I, Res);
4584 DAG.setRoot(Res.getValue(1));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004585 return 0;
4586 }
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004587 case Intrinsic::bswap:
Bill Wendling4533cac2010-01-28 21:51:40 +00004588 setValue(&I, DAG.getNode(ISD::BSWAP, dl,
Gabor Greif0635f352010-06-25 09:38:13 +00004589 getValue(I.getArgOperand(0)).getValueType(),
4590 getValue(I.getArgOperand(0))));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004591 return 0;
4592 case Intrinsic::cttz: {
Gabor Greif0635f352010-06-25 09:38:13 +00004593 SDValue Arg = getValue(I.getArgOperand(0));
Owen Andersone50ed302009-08-10 22:56:29 +00004594 EVT Ty = Arg.getValueType();
Bill Wendling4533cac2010-01-28 21:51:40 +00004595 setValue(&I, DAG.getNode(ISD::CTTZ, dl, Ty, Arg));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004596 return 0;
4597 }
4598 case Intrinsic::ctlz: {
Gabor Greif0635f352010-06-25 09:38:13 +00004599 SDValue Arg = getValue(I.getArgOperand(0));
Owen Andersone50ed302009-08-10 22:56:29 +00004600 EVT Ty = Arg.getValueType();
Bill Wendling4533cac2010-01-28 21:51:40 +00004601 setValue(&I, DAG.getNode(ISD::CTLZ, dl, Ty, Arg));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004602 return 0;
4603 }
4604 case Intrinsic::ctpop: {
Gabor Greif0635f352010-06-25 09:38:13 +00004605 SDValue Arg = getValue(I.getArgOperand(0));
Owen Andersone50ed302009-08-10 22:56:29 +00004606 EVT Ty = Arg.getValueType();
Bill Wendling4533cac2010-01-28 21:51:40 +00004607 setValue(&I, DAG.getNode(ISD::CTPOP, dl, Ty, Arg));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004608 return 0;
4609 }
4610 case Intrinsic::stacksave: {
4611 SDValue Op = getRoot();
Bill Wendlingd0283fa2009-12-22 00:40:51 +00004612 Res = DAG.getNode(ISD::STACKSAVE, dl,
4613 DAG.getVTList(TLI.getPointerTy(), MVT::Other), &Op, 1);
4614 setValue(&I, Res);
4615 DAG.setRoot(Res.getValue(1));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004616 return 0;
4617 }
4618 case Intrinsic::stackrestore: {
Gabor Greif0635f352010-06-25 09:38:13 +00004619 Res = getValue(I.getArgOperand(0));
Bill Wendling4533cac2010-01-28 21:51:40 +00004620 DAG.setRoot(DAG.getNode(ISD::STACKRESTORE, dl, MVT::Other, getRoot(), Res));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004621 return 0;
4622 }
Bill Wendling57344502008-11-18 11:01:33 +00004623 case Intrinsic::stackprotector: {
Bill Wendlingb2a42982008-11-06 02:29:10 +00004624 // Emit code into the DAG to store the stack guard onto the stack.
4625 MachineFunction &MF = DAG.getMachineFunction();
4626 MachineFrameInfo *MFI = MF.getFrameInfo();
Owen Andersone50ed302009-08-10 22:56:29 +00004627 EVT PtrTy = TLI.getPointerTy();
Bill Wendlingb2a42982008-11-06 02:29:10 +00004628
Gabor Greif0635f352010-06-25 09:38:13 +00004629 SDValue Src = getValue(I.getArgOperand(0)); // The guard's value.
4630 AllocaInst *Slot = cast<AllocaInst>(I.getArgOperand(1));
Bill Wendlingb2a42982008-11-06 02:29:10 +00004631
Bill Wendlingb7c6ebc2008-11-07 01:23:58 +00004632 int FI = FuncInfo.StaticAllocaMap[Slot];
Bill Wendlingb2a42982008-11-06 02:29:10 +00004633 MFI->setStackProtectorIndex(FI);
4634
4635 SDValue FIN = DAG.getFrameIndex(FI, PtrTy);
4636
4637 // Store the stack protector onto the stack.
Bill Wendlingd0283fa2009-12-22 00:40:51 +00004638 Res = DAG.getStore(getRoot(), getCurDebugLoc(), Src, FIN,
Chris Lattner84bd98a2010-09-21 18:58:22 +00004639 MachinePointerInfo::getFixedStack(FI),
4640 true, false, 0);
Bill Wendlingd0283fa2009-12-22 00:40:51 +00004641 setValue(&I, Res);
4642 DAG.setRoot(Res);
Bill Wendlingb2a42982008-11-06 02:29:10 +00004643 return 0;
4644 }
Eric Christopher7b5e6172009-10-27 00:52:25 +00004645 case Intrinsic::objectsize: {
4646 // If we don't know by now, we're never going to know.
Gabor Greif0635f352010-06-25 09:38:13 +00004647 ConstantInt *CI = dyn_cast<ConstantInt>(I.getArgOperand(1));
Eric Christopher7b5e6172009-10-27 00:52:25 +00004648
4649 assert(CI && "Non-constant type in __builtin_object_size?");
4650
Gabor Greif0635f352010-06-25 09:38:13 +00004651 SDValue Arg = getValue(I.getCalledValue());
Eric Christopher7e5d2ff2009-10-28 21:32:16 +00004652 EVT Ty = Arg.getValueType();
4653
Dan Gohmane368b462010-06-18 14:22:04 +00004654 if (CI->isZero())
Bill Wendlingd0283fa2009-12-22 00:40:51 +00004655 Res = DAG.getConstant(-1ULL, Ty);
Eric Christopher7b5e6172009-10-27 00:52:25 +00004656 else
Bill Wendlingd0283fa2009-12-22 00:40:51 +00004657 Res = DAG.getConstant(0, Ty);
4658
4659 setValue(&I, Res);
Eric Christopher7b5e6172009-10-27 00:52:25 +00004660 return 0;
4661 }
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004662 case Intrinsic::var_annotation:
4663 // Discard annotate attributes
4664 return 0;
4665
4666 case Intrinsic::init_trampoline: {
Gabor Greif0635f352010-06-25 09:38:13 +00004667 const Function *F = cast<Function>(I.getArgOperand(1)->stripPointerCasts());
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004668
4669 SDValue Ops[6];
4670 Ops[0] = getRoot();
Gabor Greif0635f352010-06-25 09:38:13 +00004671 Ops[1] = getValue(I.getArgOperand(0));
4672 Ops[2] = getValue(I.getArgOperand(1));
4673 Ops[3] = getValue(I.getArgOperand(2));
4674 Ops[4] = DAG.getSrcValue(I.getArgOperand(0));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004675 Ops[5] = DAG.getSrcValue(F);
4676
Bill Wendlingd0283fa2009-12-22 00:40:51 +00004677 Res = DAG.getNode(ISD::TRAMPOLINE, dl,
4678 DAG.getVTList(TLI.getPointerTy(), MVT::Other),
4679 Ops, 6);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004680
Bill Wendlingd0283fa2009-12-22 00:40:51 +00004681 setValue(&I, Res);
4682 DAG.setRoot(Res.getValue(1));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004683 return 0;
4684 }
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004685 case Intrinsic::gcroot:
4686 if (GFI) {
Gabor Greif0635f352010-06-25 09:38:13 +00004687 const Value *Alloca = I.getArgOperand(0);
4688 const Constant *TypeMap = cast<Constant>(I.getArgOperand(1));
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00004689
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004690 FrameIndexSDNode *FI = cast<FrameIndexSDNode>(getValue(Alloca).getNode());
4691 GFI->addStackRoot(FI->getIndex(), TypeMap);
4692 }
4693 return 0;
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004694 case Intrinsic::gcread:
4695 case Intrinsic::gcwrite:
Torok Edwinc23197a2009-07-14 16:55:14 +00004696 llvm_unreachable("GC failed to lower gcread/gcwrite intrinsics!");
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004697 return 0;
Bill Wendlingd0283fa2009-12-22 00:40:51 +00004698 case Intrinsic::flt_rounds:
Bill Wendling4533cac2010-01-28 21:51:40 +00004699 setValue(&I, DAG.getNode(ISD::FLT_ROUNDS_, dl, MVT::i32));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004700 return 0;
Bill Wendlingd0283fa2009-12-22 00:40:51 +00004701 case Intrinsic::trap:
Bill Wendling4533cac2010-01-28 21:51:40 +00004702 DAG.setRoot(DAG.getNode(ISD::TRAP, dl,MVT::Other, getRoot()));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004703 return 0;
Bill Wendlingef375462008-11-21 02:38:44 +00004704 case Intrinsic::uadd_with_overflow:
Bill Wendling74c37652008-12-09 22:08:41 +00004705 return implVisitAluOverflow(I, ISD::UADDO);
4706 case Intrinsic::sadd_with_overflow:
4707 return implVisitAluOverflow(I, ISD::SADDO);
4708 case Intrinsic::usub_with_overflow:
4709 return implVisitAluOverflow(I, ISD::USUBO);
4710 case Intrinsic::ssub_with_overflow:
4711 return implVisitAluOverflow(I, ISD::SSUBO);
4712 case Intrinsic::umul_with_overflow:
4713 return implVisitAluOverflow(I, ISD::UMULO);
4714 case Intrinsic::smul_with_overflow:
4715 return implVisitAluOverflow(I, ISD::SMULO);
Bill Wendling7cdc3c82008-11-21 02:03:52 +00004716
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004717 case Intrinsic::prefetch: {
4718 SDValue Ops[4];
Dale Johannesen1de4aa92010-10-26 23:11:10 +00004719 unsigned rw = cast<ConstantInt>(I.getArgOperand(1))->getZExtValue();
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004720 Ops[0] = getRoot();
Gabor Greif0635f352010-06-25 09:38:13 +00004721 Ops[1] = getValue(I.getArgOperand(0));
4722 Ops[2] = getValue(I.getArgOperand(1));
4723 Ops[3] = getValue(I.getArgOperand(2));
Dale Johannesen1de4aa92010-10-26 23:11:10 +00004724 DAG.setRoot(DAG.getMemIntrinsicNode(ISD::PREFETCH, dl,
4725 DAG.getVTList(MVT::Other),
Wesley Peckbf17cfa2010-11-23 03:31:01 +00004726 &Ops[0], 4,
Dale Johannesen1de4aa92010-10-26 23:11:10 +00004727 EVT::getIntegerVT(*Context, 8),
4728 MachinePointerInfo(I.getArgOperand(0)),
4729 0, /* align */
4730 false, /* volatile */
4731 rw==0, /* read */
4732 rw==1)); /* write */
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004733 return 0;
4734 }
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004735 case Intrinsic::memory_barrier: {
4736 SDValue Ops[6];
4737 Ops[0] = getRoot();
4738 for (int x = 1; x < 6; ++x)
Gabor Greif0635f352010-06-25 09:38:13 +00004739 Ops[x] = getValue(I.getArgOperand(x - 1));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004740
Bill Wendling4533cac2010-01-28 21:51:40 +00004741 DAG.setRoot(DAG.getNode(ISD::MEMBARRIER, dl, MVT::Other, &Ops[0], 6));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004742 return 0;
4743 }
4744 case Intrinsic::atomic_cmp_swap: {
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00004745 SDValue Root = getRoot();
Dan Gohman0b1d4a72008-12-23 21:37:04 +00004746 SDValue L =
Dale Johannesen66978ee2009-01-31 02:22:37 +00004747 DAG.getAtomic(ISD::ATOMIC_CMP_SWAP, getCurDebugLoc(),
Gabor Greif0635f352010-06-25 09:38:13 +00004748 getValue(I.getArgOperand(1)).getValueType().getSimpleVT(),
Dan Gohman0b1d4a72008-12-23 21:37:04 +00004749 Root,
Gabor Greif0635f352010-06-25 09:38:13 +00004750 getValue(I.getArgOperand(0)),
4751 getValue(I.getArgOperand(1)),
4752 getValue(I.getArgOperand(2)),
Chris Lattner60bddc82010-09-21 04:53:42 +00004753 MachinePointerInfo(I.getArgOperand(0)));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004754 setValue(&I, L);
4755 DAG.setRoot(L.getValue(1));
4756 return 0;
4757 }
4758 case Intrinsic::atomic_load_add:
Dan Gohman0b1d4a72008-12-23 21:37:04 +00004759 return implVisitBinaryAtomic(I, ISD::ATOMIC_LOAD_ADD);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004760 case Intrinsic::atomic_load_sub:
Dan Gohman0b1d4a72008-12-23 21:37:04 +00004761 return implVisitBinaryAtomic(I, ISD::ATOMIC_LOAD_SUB);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004762 case Intrinsic::atomic_load_or:
Dan Gohman0b1d4a72008-12-23 21:37:04 +00004763 return implVisitBinaryAtomic(I, ISD::ATOMIC_LOAD_OR);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004764 case Intrinsic::atomic_load_xor:
Dan Gohman0b1d4a72008-12-23 21:37:04 +00004765 return implVisitBinaryAtomic(I, ISD::ATOMIC_LOAD_XOR);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004766 case Intrinsic::atomic_load_and:
Dan Gohman0b1d4a72008-12-23 21:37:04 +00004767 return implVisitBinaryAtomic(I, ISD::ATOMIC_LOAD_AND);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004768 case Intrinsic::atomic_load_nand:
Dan Gohman0b1d4a72008-12-23 21:37:04 +00004769 return implVisitBinaryAtomic(I, ISD::ATOMIC_LOAD_NAND);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004770 case Intrinsic::atomic_load_max:
Dan Gohman0b1d4a72008-12-23 21:37:04 +00004771 return implVisitBinaryAtomic(I, ISD::ATOMIC_LOAD_MAX);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004772 case Intrinsic::atomic_load_min:
Dan Gohman0b1d4a72008-12-23 21:37:04 +00004773 return implVisitBinaryAtomic(I, ISD::ATOMIC_LOAD_MIN);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004774 case Intrinsic::atomic_load_umin:
Dan Gohman0b1d4a72008-12-23 21:37:04 +00004775 return implVisitBinaryAtomic(I, ISD::ATOMIC_LOAD_UMIN);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004776 case Intrinsic::atomic_load_umax:
Dan Gohman0b1d4a72008-12-23 21:37:04 +00004777 return implVisitBinaryAtomic(I, ISD::ATOMIC_LOAD_UMAX);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004778 case Intrinsic::atomic_swap:
Dan Gohman0b1d4a72008-12-23 21:37:04 +00004779 return implVisitBinaryAtomic(I, ISD::ATOMIC_SWAP);
Duncan Sandsf07c9492009-11-10 09:08:09 +00004780
4781 case Intrinsic::invariant_start:
4782 case Intrinsic::lifetime_start:
4783 // Discard region information.
Bill Wendling4533cac2010-01-28 21:51:40 +00004784 setValue(&I, DAG.getUNDEF(TLI.getPointerTy()));
Duncan Sandsf07c9492009-11-10 09:08:09 +00004785 return 0;
4786 case Intrinsic::invariant_end:
4787 case Intrinsic::lifetime_end:
4788 // Discard region information.
4789 return 0;
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004790 }
4791}
4792
Dan Gohman46510a72010-04-15 01:51:59 +00004793void SelectionDAGBuilder::LowerCallTo(ImmutableCallSite CS, SDValue Callee,
Dan Gohman2048b852009-11-23 18:04:58 +00004794 bool isTailCall,
4795 MachineBasicBlock *LandingPad) {
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004796 const PointerType *PT = cast<PointerType>(CS.getCalledValue()->getType());
4797 const FunctionType *FTy = cast<FunctionType>(PT->getElementType());
Kenneth Uildriksc158dde2009-11-11 19:59:24 +00004798 const Type *RetTy = FTy->getReturnType();
Chris Lattner512063d2010-04-05 06:19:28 +00004799 MachineModuleInfo &MMI = DAG.getMachineFunction().getMMI();
Chris Lattner16112732010-03-14 01:41:15 +00004800 MCSymbol *BeginLabel = 0;
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004801
4802 TargetLowering::ArgListTy Args;
4803 TargetLowering::ArgListEntry Entry;
4804 Args.reserve(CS.arg_size());
Kenneth Uildriksc158dde2009-11-11 19:59:24 +00004805
4806 // Check whether the function can return without sret-demotion.
Dan Gohman84023e02010-07-10 09:00:22 +00004807 SmallVector<ISD::OutputArg, 4> Outs;
Kenneth Uildriksc158dde2009-11-11 19:59:24 +00004808 SmallVector<uint64_t, 4> Offsets;
Dan Gohman84023e02010-07-10 09:00:22 +00004809 GetReturnInfo(RetTy, CS.getAttributes().getRetAttributes(),
4810 Outs, TLI, &Offsets);
Kenneth Uildriksc158dde2009-11-11 19:59:24 +00004811
Mikhail Glushenkovb3c01992010-01-01 04:41:22 +00004812 bool CanLowerReturn = TLI.CanLowerReturn(CS.getCallingConv(),
Dan Gohman84023e02010-07-10 09:00:22 +00004813 FTy->isVarArg(), Outs, FTy->getContext());
Kenneth Uildriksc158dde2009-11-11 19:59:24 +00004814
4815 SDValue DemoteStackSlot;
Chris Lattnerecf42c42010-09-21 16:36:31 +00004816 int DemoteStackIdx = -100;
Kenneth Uildriksc158dde2009-11-11 19:59:24 +00004817
4818 if (!CanLowerReturn) {
4819 uint64_t TySize = TLI.getTargetData()->getTypeAllocSize(
4820 FTy->getReturnType());
4821 unsigned Align = TLI.getTargetData()->getPrefTypeAlignment(
4822 FTy->getReturnType());
4823 MachineFunction &MF = DAG.getMachineFunction();
Chris Lattnerecf42c42010-09-21 16:36:31 +00004824 DemoteStackIdx = MF.getFrameInfo()->CreateStackObject(TySize, Align, false);
Kenneth Uildriksc158dde2009-11-11 19:59:24 +00004825 const Type *StackSlotPtrType = PointerType::getUnqual(FTy->getReturnType());
4826
Chris Lattnerecf42c42010-09-21 16:36:31 +00004827 DemoteStackSlot = DAG.getFrameIndex(DemoteStackIdx, TLI.getPointerTy());
Kenneth Uildriksc158dde2009-11-11 19:59:24 +00004828 Entry.Node = DemoteStackSlot;
4829 Entry.Ty = StackSlotPtrType;
4830 Entry.isSExt = false;
4831 Entry.isZExt = false;
4832 Entry.isInReg = false;
4833 Entry.isSRet = true;
4834 Entry.isNest = false;
4835 Entry.isByVal = false;
4836 Entry.Alignment = Align;
4837 Args.push_back(Entry);
4838 RetTy = Type::getVoidTy(FTy->getContext());
4839 }
4840
Dan Gohman46510a72010-04-15 01:51:59 +00004841 for (ImmutableCallSite::arg_iterator i = CS.arg_begin(), e = CS.arg_end();
Kenneth Uildriksc158dde2009-11-11 19:59:24 +00004842 i != e; ++i) {
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004843 SDValue ArgNode = getValue(*i);
4844 Entry.Node = ArgNode; Entry.Ty = (*i)->getType();
4845
4846 unsigned attrInd = i - CS.arg_begin() + 1;
Devang Patel05988662008-09-25 21:00:45 +00004847 Entry.isSExt = CS.paramHasAttr(attrInd, Attribute::SExt);
4848 Entry.isZExt = CS.paramHasAttr(attrInd, Attribute::ZExt);
4849 Entry.isInReg = CS.paramHasAttr(attrInd, Attribute::InReg);
4850 Entry.isSRet = CS.paramHasAttr(attrInd, Attribute::StructRet);
4851 Entry.isNest = CS.paramHasAttr(attrInd, Attribute::Nest);
4852 Entry.isByVal = CS.paramHasAttr(attrInd, Attribute::ByVal);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004853 Entry.Alignment = CS.getParamAlignment(attrInd);
4854 Args.push_back(Entry);
4855 }
4856
Chris Lattner512063d2010-04-05 06:19:28 +00004857 if (LandingPad) {
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004858 // Insert a label before the invoke call to mark the try range. This can be
4859 // used to detect deletion of the invoke via the MachineModuleInfo.
Chris Lattner512063d2010-04-05 06:19:28 +00004860 BeginLabel = MMI.getContext().CreateTempSymbol();
Jim Grosbach1b747ad2009-08-11 00:09:57 +00004861
Jim Grosbachca752c92010-01-28 01:45:32 +00004862 // For SjLj, keep track of which landing pads go with which invokes
4863 // so as to maintain the ordering of pads in the LSDA.
Chris Lattner512063d2010-04-05 06:19:28 +00004864 unsigned CallSiteIndex = MMI.getCurrentCallSite();
Jim Grosbachca752c92010-01-28 01:45:32 +00004865 if (CallSiteIndex) {
Chris Lattner512063d2010-04-05 06:19:28 +00004866 MMI.setCallSiteBeginLabel(BeginLabel, CallSiteIndex);
Jim Grosbachca752c92010-01-28 01:45:32 +00004867 // Now that the call site is handled, stop tracking it.
Chris Lattner512063d2010-04-05 06:19:28 +00004868 MMI.setCurrentCallSite(0);
Jim Grosbachca752c92010-01-28 01:45:32 +00004869 }
4870
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004871 // Both PendingLoads and PendingExports must be flushed here;
4872 // this call might not return.
4873 (void)getRoot();
Chris Lattner7561d482010-03-14 02:33:54 +00004874 DAG.setRoot(DAG.getEHLabel(getCurDebugLoc(), getControlRoot(), BeginLabel));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004875 }
4876
Dan Gohman98ca4f22009-08-05 01:29:28 +00004877 // Check if target-independent constraints permit a tail call here.
4878 // Target-dependent constraints are checked within TLI.LowerCallTo.
4879 if (isTailCall &&
Evan Cheng86809cc2010-02-03 03:28:02 +00004880 !isInTailCallPosition(CS, CS.getAttributes().getRetAttributes(), TLI))
Dan Gohman98ca4f22009-08-05 01:29:28 +00004881 isTailCall = false;
4882
Dan Gohmanbadcda42010-08-28 00:51:03 +00004883 // If there's a possibility that fast-isel has already selected some amount
4884 // of the current basic block, don't emit a tail call.
4885 if (isTailCall && EnableFastISel)
4886 isTailCall = false;
4887
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004888 std::pair<SDValue,SDValue> Result =
Kenneth Uildriksc158dde2009-11-11 19:59:24 +00004889 TLI.LowerCallTo(getRoot(), RetTy,
Devang Patel05988662008-09-25 21:00:45 +00004890 CS.paramHasAttr(0, Attribute::SExt),
Dale Johannesen86098bd2008-09-26 19:31:26 +00004891 CS.paramHasAttr(0, Attribute::ZExt), FTy->isVarArg(),
Tilmann Scheller6b61cd12009-07-03 06:44:53 +00004892 CS.paramHasAttr(0, Attribute::InReg), FTy->getNumParams(),
Dale Johannesen86098bd2008-09-26 19:31:26 +00004893 CS.getCallingConv(),
Dan Gohman98ca4f22009-08-05 01:29:28 +00004894 isTailCall,
4895 !CS.getInstruction()->use_empty(),
Bill Wendling46ada192010-03-02 01:55:18 +00004896 Callee, Args, DAG, getCurDebugLoc());
Dan Gohman98ca4f22009-08-05 01:29:28 +00004897 assert((isTailCall || Result.second.getNode()) &&
4898 "Non-null chain expected with non-tail call!");
4899 assert((Result.second.getNode() || !Result.first.getNode()) &&
4900 "Null value expected with tail call!");
Bill Wendlinge80ae832009-12-22 00:50:32 +00004901 if (Result.first.getNode()) {
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004902 setValue(CS.getInstruction(), Result.first);
Bill Wendlinge80ae832009-12-22 00:50:32 +00004903 } else if (!CanLowerReturn && Result.second.getNode()) {
Kenneth Uildriksc158dde2009-11-11 19:59:24 +00004904 // The instruction result is the result of loading from the
4905 // hidden sret parameter.
4906 SmallVector<EVT, 1> PVTs;
4907 const Type *PtrRetTy = PointerType::getUnqual(FTy->getReturnType());
4908
4909 ComputeValueVTs(TLI, PtrRetTy, PVTs);
4910 assert(PVTs.size() == 1 && "Pointers should fit in one register");
4911 EVT PtrVT = PVTs[0];
Dan Gohman84023e02010-07-10 09:00:22 +00004912 unsigned NumValues = Outs.size();
Kenneth Uildriksc158dde2009-11-11 19:59:24 +00004913 SmallVector<SDValue, 4> Values(NumValues);
4914 SmallVector<SDValue, 4> Chains(NumValues);
4915
4916 for (unsigned i = 0; i < NumValues; ++i) {
Bill Wendlinge80ae832009-12-22 00:50:32 +00004917 SDValue Add = DAG.getNode(ISD::ADD, getCurDebugLoc(), PtrVT,
4918 DemoteStackSlot,
4919 DAG.getConstant(Offsets[i], PtrVT));
Dan Gohman84023e02010-07-10 09:00:22 +00004920 SDValue L = DAG.getLoad(Outs[i].VT, getCurDebugLoc(), Result.second,
Chris Lattnerecf42c42010-09-21 16:36:31 +00004921 Add,
4922 MachinePointerInfo::getFixedStack(DemoteStackIdx, Offsets[i]),
4923 false, false, 1);
Kenneth Uildriksc158dde2009-11-11 19:59:24 +00004924 Values[i] = L;
4925 Chains[i] = L.getValue(1);
4926 }
Bill Wendlinge80ae832009-12-22 00:50:32 +00004927
Kenneth Uildriksc158dde2009-11-11 19:59:24 +00004928 SDValue Chain = DAG.getNode(ISD::TokenFactor, getCurDebugLoc(),
4929 MVT::Other, &Chains[0], NumValues);
4930 PendingLoads.push_back(Chain);
Michael J. Spencere70c5262010-10-16 08:25:21 +00004931
Kenneth Uildriks93ae4072010-01-16 23:37:33 +00004932 // Collect the legal value parts into potentially illegal values
4933 // that correspond to the original function's return values.
4934 SmallVector<EVT, 4> RetTys;
4935 RetTy = FTy->getReturnType();
4936 ComputeValueVTs(TLI, RetTy, RetTys);
4937 ISD::NodeType AssertOp = ISD::DELETED_NODE;
4938 SmallVector<SDValue, 4> ReturnValues;
4939 unsigned CurReg = 0;
4940 for (unsigned I = 0, E = RetTys.size(); I != E; ++I) {
4941 EVT VT = RetTys[I];
4942 EVT RegisterVT = TLI.getRegisterType(RetTy->getContext(), VT);
4943 unsigned NumRegs = TLI.getNumRegisters(RetTy->getContext(), VT);
Michael J. Spencere70c5262010-10-16 08:25:21 +00004944
Kenneth Uildriks93ae4072010-01-16 23:37:33 +00004945 SDValue ReturnValue =
Bill Wendling46ada192010-03-02 01:55:18 +00004946 getCopyFromParts(DAG, getCurDebugLoc(), &Values[CurReg], NumRegs,
Kenneth Uildriks93ae4072010-01-16 23:37:33 +00004947 RegisterVT, VT, AssertOp);
4948 ReturnValues.push_back(ReturnValue);
Kenneth Uildriks93ae4072010-01-16 23:37:33 +00004949 CurReg += NumRegs;
4950 }
Kenneth Uildriksc158dde2009-11-11 19:59:24 +00004951
Bill Wendling4533cac2010-01-28 21:51:40 +00004952 setValue(CS.getInstruction(),
4953 DAG.getNode(ISD::MERGE_VALUES, getCurDebugLoc(),
4954 DAG.getVTList(&RetTys[0], RetTys.size()),
4955 &ReturnValues[0], ReturnValues.size()));
Bill Wendlinge80ae832009-12-22 00:50:32 +00004956
Kenneth Uildriksc158dde2009-11-11 19:59:24 +00004957 }
Bill Wendlinge80ae832009-12-22 00:50:32 +00004958
4959 // As a special case, a null chain means that a tail call has been emitted and
4960 // the DAG root is already updated.
Bill Wendling4533cac2010-01-28 21:51:40 +00004961 if (Result.second.getNode())
Dan Gohman98ca4f22009-08-05 01:29:28 +00004962 DAG.setRoot(Result.second);
Bill Wendling4533cac2010-01-28 21:51:40 +00004963 else
Dan Gohman98ca4f22009-08-05 01:29:28 +00004964 HasTailCall = true;
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004965
Chris Lattner512063d2010-04-05 06:19:28 +00004966 if (LandingPad) {
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004967 // Insert a label at the end of the invoke call to mark the try range. This
4968 // can be used to detect deletion of the invoke via the MachineModuleInfo.
Chris Lattner512063d2010-04-05 06:19:28 +00004969 MCSymbol *EndLabel = MMI.getContext().CreateTempSymbol();
Chris Lattner7561d482010-03-14 02:33:54 +00004970 DAG.setRoot(DAG.getEHLabel(getCurDebugLoc(), getRoot(), EndLabel));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004971
4972 // Inform MachineModuleInfo of range.
Chris Lattner512063d2010-04-05 06:19:28 +00004973 MMI.addInvoke(LandingPad, BeginLabel, EndLabel);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00004974 }
4975}
4976
Chris Lattner8047d9a2009-12-24 00:37:38 +00004977/// IsOnlyUsedInZeroEqualityComparison - Return true if it only matters that the
4978/// value is equal or not-equal to zero.
Dan Gohman46510a72010-04-15 01:51:59 +00004979static bool IsOnlyUsedInZeroEqualityComparison(const Value *V) {
4980 for (Value::const_use_iterator UI = V->use_begin(), E = V->use_end();
Chris Lattner8047d9a2009-12-24 00:37:38 +00004981 UI != E; ++UI) {
Dan Gohman46510a72010-04-15 01:51:59 +00004982 if (const ICmpInst *IC = dyn_cast<ICmpInst>(*UI))
Chris Lattner8047d9a2009-12-24 00:37:38 +00004983 if (IC->isEquality())
Dan Gohman46510a72010-04-15 01:51:59 +00004984 if (const Constant *C = dyn_cast<Constant>(IC->getOperand(1)))
Chris Lattner8047d9a2009-12-24 00:37:38 +00004985 if (C->isNullValue())
4986 continue;
4987 // Unknown instruction.
4988 return false;
4989 }
4990 return true;
4991}
4992
Dan Gohman46510a72010-04-15 01:51:59 +00004993static SDValue getMemCmpLoad(const Value *PtrVal, MVT LoadVT,
4994 const Type *LoadTy,
Chris Lattner8047d9a2009-12-24 00:37:38 +00004995 SelectionDAGBuilder &Builder) {
Mikhail Glushenkovb3c01992010-01-01 04:41:22 +00004996
Chris Lattner8047d9a2009-12-24 00:37:38 +00004997 // Check to see if this load can be trivially constant folded, e.g. if the
4998 // input is from a string literal.
Dan Gohman46510a72010-04-15 01:51:59 +00004999 if (const Constant *LoadInput = dyn_cast<Constant>(PtrVal)) {
Chris Lattner8047d9a2009-12-24 00:37:38 +00005000 // Cast pointer to the type we really want to load.
Dan Gohman46510a72010-04-15 01:51:59 +00005001 LoadInput = ConstantExpr::getBitCast(const_cast<Constant *>(LoadInput),
Chris Lattner8047d9a2009-12-24 00:37:38 +00005002 PointerType::getUnqual(LoadTy));
Mikhail Glushenkovb3c01992010-01-01 04:41:22 +00005003
Dan Gohman46510a72010-04-15 01:51:59 +00005004 if (const Constant *LoadCst =
5005 ConstantFoldLoadFromConstPtr(const_cast<Constant *>(LoadInput),
5006 Builder.TD))
Chris Lattner8047d9a2009-12-24 00:37:38 +00005007 return Builder.getValue(LoadCst);
5008 }
Mikhail Glushenkovb3c01992010-01-01 04:41:22 +00005009
Chris Lattner8047d9a2009-12-24 00:37:38 +00005010 // Otherwise, we have to emit the load. If the pointer is to unfoldable but
5011 // still constant memory, the input chain can be the entry node.
5012 SDValue Root;
5013 bool ConstantMemory = false;
Mikhail Glushenkovb3c01992010-01-01 04:41:22 +00005014
Chris Lattner8047d9a2009-12-24 00:37:38 +00005015 // Do not serialize (non-volatile) loads of constant memory with anything.
5016 if (Builder.AA->pointsToConstantMemory(PtrVal)) {
5017 Root = Builder.DAG.getEntryNode();
5018 ConstantMemory = true;
5019 } else {
5020 // Do not serialize non-volatile loads against each other.
5021 Root = Builder.DAG.getRoot();
5022 }
Mikhail Glushenkovb3c01992010-01-01 04:41:22 +00005023
Chris Lattner8047d9a2009-12-24 00:37:38 +00005024 SDValue Ptr = Builder.getValue(PtrVal);
5025 SDValue LoadVal = Builder.DAG.getLoad(LoadVT, Builder.getCurDebugLoc(), Root,
Chris Lattnerecf42c42010-09-21 16:36:31 +00005026 Ptr, MachinePointerInfo(PtrVal),
David Greene1e559442010-02-15 17:00:31 +00005027 false /*volatile*/,
5028 false /*nontemporal*/, 1 /* align=1 */);
Mikhail Glushenkovb3c01992010-01-01 04:41:22 +00005029
Chris Lattner8047d9a2009-12-24 00:37:38 +00005030 if (!ConstantMemory)
5031 Builder.PendingLoads.push_back(LoadVal.getValue(1));
5032 return LoadVal;
5033}
5034
5035
5036/// visitMemCmpCall - See if we can lower a call to memcmp in an optimized form.
5037/// If so, return true and lower it, otherwise return false and it will be
5038/// lowered like a normal call.
Dan Gohman46510a72010-04-15 01:51:59 +00005039bool SelectionDAGBuilder::visitMemCmpCall(const CallInst &I) {
Chris Lattner8047d9a2009-12-24 00:37:38 +00005040 // Verify that the prototype makes sense. int memcmp(void*,void*,size_t)
Gabor Greif37387d52010-06-30 12:55:46 +00005041 if (I.getNumArgOperands() != 3)
Chris Lattner8047d9a2009-12-24 00:37:38 +00005042 return false;
Mikhail Glushenkovb3c01992010-01-01 04:41:22 +00005043
Gabor Greif0635f352010-06-25 09:38:13 +00005044 const Value *LHS = I.getArgOperand(0), *RHS = I.getArgOperand(1);
Duncan Sands1df98592010-02-16 11:11:14 +00005045 if (!LHS->getType()->isPointerTy() || !RHS->getType()->isPointerTy() ||
Gabor Greif0635f352010-06-25 09:38:13 +00005046 !I.getArgOperand(2)->getType()->isIntegerTy() ||
Duncan Sands1df98592010-02-16 11:11:14 +00005047 !I.getType()->isIntegerTy())
Mikhail Glushenkovb3c01992010-01-01 04:41:22 +00005048 return false;
5049
Gabor Greif0635f352010-06-25 09:38:13 +00005050 const ConstantInt *Size = dyn_cast<ConstantInt>(I.getArgOperand(2));
Mikhail Glushenkovb3c01992010-01-01 04:41:22 +00005051
Chris Lattner8047d9a2009-12-24 00:37:38 +00005052 // memcmp(S1,S2,2) != 0 -> (*(short*)LHS != *(short*)RHS) != 0
5053 // memcmp(S1,S2,4) != 0 -> (*(int*)LHS != *(int*)RHS) != 0
Chris Lattner04b091a2009-12-24 01:07:17 +00005054 if (Size && IsOnlyUsedInZeroEqualityComparison(&I)) {
5055 bool ActuallyDoIt = true;
5056 MVT LoadVT;
5057 const Type *LoadTy;
5058 switch (Size->getZExtValue()) {
5059 default:
5060 LoadVT = MVT::Other;
5061 LoadTy = 0;
5062 ActuallyDoIt = false;
5063 break;
5064 case 2:
5065 LoadVT = MVT::i16;
5066 LoadTy = Type::getInt16Ty(Size->getContext());
5067 break;
5068 case 4:
5069 LoadVT = MVT::i32;
Mikhail Glushenkovb3c01992010-01-01 04:41:22 +00005070 LoadTy = Type::getInt32Ty(Size->getContext());
Chris Lattner04b091a2009-12-24 01:07:17 +00005071 break;
5072 case 8:
5073 LoadVT = MVT::i64;
Mikhail Glushenkovb3c01992010-01-01 04:41:22 +00005074 LoadTy = Type::getInt64Ty(Size->getContext());
Chris Lattner04b091a2009-12-24 01:07:17 +00005075 break;
5076 /*
5077 case 16:
5078 LoadVT = MVT::v4i32;
Mikhail Glushenkovb3c01992010-01-01 04:41:22 +00005079 LoadTy = Type::getInt32Ty(Size->getContext());
Chris Lattner04b091a2009-12-24 01:07:17 +00005080 LoadTy = VectorType::get(LoadTy, 4);
5081 break;
5082 */
5083 }
Mikhail Glushenkovb3c01992010-01-01 04:41:22 +00005084
Chris Lattner04b091a2009-12-24 01:07:17 +00005085 // This turns into unaligned loads. We only do this if the target natively
5086 // supports the MVT we'll be loading or if it is small enough (<= 4) that
5087 // we'll only produce a small number of byte loads.
Mikhail Glushenkovb3c01992010-01-01 04:41:22 +00005088
Chris Lattner04b091a2009-12-24 01:07:17 +00005089 // Require that we can find a legal MVT, and only do this if the target
5090 // supports unaligned loads of that type. Expanding into byte loads would
5091 // bloat the code.
5092 if (ActuallyDoIt && Size->getZExtValue() > 4) {
5093 // TODO: Handle 5 byte compare as 4-byte + 1 byte.
5094 // TODO: Handle 8 byte compare on x86-32 as two 32-bit loads.
5095 if (!TLI.isTypeLegal(LoadVT) ||!TLI.allowsUnalignedMemoryAccesses(LoadVT))
5096 ActuallyDoIt = false;
5097 }
Mikhail Glushenkovb3c01992010-01-01 04:41:22 +00005098
Chris Lattner04b091a2009-12-24 01:07:17 +00005099 if (ActuallyDoIt) {
5100 SDValue LHSVal = getMemCmpLoad(LHS, LoadVT, LoadTy, *this);
5101 SDValue RHSVal = getMemCmpLoad(RHS, LoadVT, LoadTy, *this);
Mikhail Glushenkovb3c01992010-01-01 04:41:22 +00005102
Chris Lattner04b091a2009-12-24 01:07:17 +00005103 SDValue Res = DAG.getSetCC(getCurDebugLoc(), MVT::i1, LHSVal, RHSVal,
5104 ISD::SETNE);
5105 EVT CallVT = TLI.getValueType(I.getType(), true);
5106 setValue(&I, DAG.getZExtOrTrunc(Res, getCurDebugLoc(), CallVT));
5107 return true;
5108 }
Chris Lattner8047d9a2009-12-24 00:37:38 +00005109 }
Mikhail Glushenkovb3c01992010-01-01 04:41:22 +00005110
5111
Chris Lattner8047d9a2009-12-24 00:37:38 +00005112 return false;
5113}
5114
5115
Dan Gohman46510a72010-04-15 01:51:59 +00005116void SelectionDAGBuilder::visitCall(const CallInst &I) {
Chris Lattner598751e2010-07-05 05:36:21 +00005117 // Handle inline assembly differently.
5118 if (isa<InlineAsm>(I.getCalledValue())) {
5119 visitInlineAsm(&I);
5120 return;
5121 }
Michael J. Spencere70c5262010-10-16 08:25:21 +00005122
Michael J. Spencer391b43b2010-10-21 20:49:23 +00005123 // See if any floating point values are being passed to this function. This is
5124 // used to emit an undefined reference to fltused on Windows.
5125 const FunctionType *FT =
5126 cast<FunctionType>(I.getCalledValue()->getType()->getContainedType(0));
5127 MachineModuleInfo &MMI = DAG.getMachineFunction().getMMI();
5128 if (FT->isVarArg() &&
5129 !MMI.callsExternalVAFunctionWithFloatingPointArguments()) {
5130 for (unsigned i = 0, e = I.getNumArgOperands(); i != e; ++i) {
5131 const Type* T = I.getArgOperand(i)->getType();
Wesley Peckbf17cfa2010-11-23 03:31:01 +00005132 for (po_iterator<const Type*> i = po_begin(T), e = po_end(T);
Chris Lattnera29aae72010-11-12 17:24:29 +00005133 i != e; ++i) {
5134 if (!i->isFloatingPointTy()) continue;
5135 MMI.setCallsExternalVAFunctionWithFloatingPointArguments(true);
5136 break;
Michael J. Spencer391b43b2010-10-21 20:49:23 +00005137 }
5138 }
5139 }
5140
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005141 const char *RenameFn = 0;
5142 if (Function *F = I.getCalledFunction()) {
5143 if (F->isDeclaration()) {
Chris Lattner598751e2010-07-05 05:36:21 +00005144 if (const TargetIntrinsicInfo *II = TM.getIntrinsicInfo()) {
Dale Johannesen49de9822009-02-05 01:49:45 +00005145 if (unsigned IID = II->getIntrinsicID(F)) {
5146 RenameFn = visitIntrinsicCall(I, IID);
5147 if (!RenameFn)
5148 return;
5149 }
5150 }
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005151 if (unsigned IID = F->getIntrinsicID()) {
5152 RenameFn = visitIntrinsicCall(I, IID);
5153 if (!RenameFn)
5154 return;
5155 }
5156 }
5157
5158 // Check for well-known libc/libm calls. If the function is internal, it
5159 // can't be a library call.
Daniel Dunbarf0443c12009-07-26 08:34:35 +00005160 if (!F->hasLocalLinkage() && F->hasName()) {
5161 StringRef Name = F->getName();
Duncan Sandsd2c817e2010-03-14 21:08:40 +00005162 if (Name == "copysign" || Name == "copysignf" || Name == "copysignl") {
Gabor Greif37387d52010-06-30 12:55:46 +00005163 if (I.getNumArgOperands() == 2 && // Basic sanity checks.
Gabor Greif0635f352010-06-25 09:38:13 +00005164 I.getArgOperand(0)->getType()->isFloatingPointTy() &&
5165 I.getType() == I.getArgOperand(0)->getType() &&
5166 I.getType() == I.getArgOperand(1)->getType()) {
5167 SDValue LHS = getValue(I.getArgOperand(0));
5168 SDValue RHS = getValue(I.getArgOperand(1));
Bill Wendling0d580132009-12-23 01:28:19 +00005169 setValue(&I, DAG.getNode(ISD::FCOPYSIGN, getCurDebugLoc(),
5170 LHS.getValueType(), LHS, RHS));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005171 return;
5172 }
Daniel Dunbarf0443c12009-07-26 08:34:35 +00005173 } else if (Name == "fabs" || Name == "fabsf" || Name == "fabsl") {
Gabor Greif37387d52010-06-30 12:55:46 +00005174 if (I.getNumArgOperands() == 1 && // Basic sanity checks.
Gabor Greif0635f352010-06-25 09:38:13 +00005175 I.getArgOperand(0)->getType()->isFloatingPointTy() &&
5176 I.getType() == I.getArgOperand(0)->getType()) {
5177 SDValue Tmp = getValue(I.getArgOperand(0));
Bill Wendling0d580132009-12-23 01:28:19 +00005178 setValue(&I, DAG.getNode(ISD::FABS, getCurDebugLoc(),
5179 Tmp.getValueType(), Tmp));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005180 return;
5181 }
Daniel Dunbarf0443c12009-07-26 08:34:35 +00005182 } else if (Name == "sin" || Name == "sinf" || Name == "sinl") {
Gabor Greif37387d52010-06-30 12:55:46 +00005183 if (I.getNumArgOperands() == 1 && // Basic sanity checks.
Gabor Greif0635f352010-06-25 09:38:13 +00005184 I.getArgOperand(0)->getType()->isFloatingPointTy() &&
5185 I.getType() == I.getArgOperand(0)->getType() &&
Dale Johannesena45bfd32009-09-25 18:00:35 +00005186 I.onlyReadsMemory()) {
Gabor Greif0635f352010-06-25 09:38:13 +00005187 SDValue Tmp = getValue(I.getArgOperand(0));
Bill Wendling0d580132009-12-23 01:28:19 +00005188 setValue(&I, DAG.getNode(ISD::FSIN, getCurDebugLoc(),
5189 Tmp.getValueType(), Tmp));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005190 return;
5191 }
Daniel Dunbarf0443c12009-07-26 08:34:35 +00005192 } else if (Name == "cos" || Name == "cosf" || Name == "cosl") {
Gabor Greif37387d52010-06-30 12:55:46 +00005193 if (I.getNumArgOperands() == 1 && // Basic sanity checks.
Gabor Greif0635f352010-06-25 09:38:13 +00005194 I.getArgOperand(0)->getType()->isFloatingPointTy() &&
5195 I.getType() == I.getArgOperand(0)->getType() &&
Dale Johannesena45bfd32009-09-25 18:00:35 +00005196 I.onlyReadsMemory()) {
Gabor Greif0635f352010-06-25 09:38:13 +00005197 SDValue Tmp = getValue(I.getArgOperand(0));
Bill Wendling0d580132009-12-23 01:28:19 +00005198 setValue(&I, DAG.getNode(ISD::FCOS, getCurDebugLoc(),
5199 Tmp.getValueType(), Tmp));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005200 return;
5201 }
Dale Johannesen52fb79b2009-09-25 17:23:22 +00005202 } else if (Name == "sqrt" || Name == "sqrtf" || Name == "sqrtl") {
Gabor Greif37387d52010-06-30 12:55:46 +00005203 if (I.getNumArgOperands() == 1 && // Basic sanity checks.
Gabor Greif0635f352010-06-25 09:38:13 +00005204 I.getArgOperand(0)->getType()->isFloatingPointTy() &&
5205 I.getType() == I.getArgOperand(0)->getType() &&
Dale Johannesena45bfd32009-09-25 18:00:35 +00005206 I.onlyReadsMemory()) {
Gabor Greif0635f352010-06-25 09:38:13 +00005207 SDValue Tmp = getValue(I.getArgOperand(0));
Bill Wendling0d580132009-12-23 01:28:19 +00005208 setValue(&I, DAG.getNode(ISD::FSQRT, getCurDebugLoc(),
5209 Tmp.getValueType(), Tmp));
Dale Johannesen52fb79b2009-09-25 17:23:22 +00005210 return;
5211 }
Chris Lattner8047d9a2009-12-24 00:37:38 +00005212 } else if (Name == "memcmp") {
5213 if (visitMemCmpCall(I))
5214 return;
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005215 }
5216 }
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005217 }
Michael J. Spencere70c5262010-10-16 08:25:21 +00005218
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005219 SDValue Callee;
5220 if (!RenameFn)
Gabor Greif0635f352010-06-25 09:38:13 +00005221 Callee = getValue(I.getCalledValue());
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005222 else
Bill Wendling056292f2008-09-16 21:48:12 +00005223 Callee = DAG.getExternalSymbol(RenameFn, TLI.getPointerTy());
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005224
Bill Wendling0d580132009-12-23 01:28:19 +00005225 // Check if we can potentially perform a tail call. More detailed checking is
5226 // be done within LowerCallTo, after more information about the call is known.
Evan Cheng11e67932010-01-26 23:13:04 +00005227 LowerCallTo(&I, Callee, I.isTailCall());
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005228}
5229
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005230namespace llvm {
Dan Gohman462f6b52010-05-29 17:53:24 +00005231
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005232/// AsmOperandInfo - This contains information for each constraint that we are
5233/// lowering.
Duncan Sands16d8f8b2010-05-11 20:16:09 +00005234class LLVM_LIBRARY_VISIBILITY SDISelAsmOperandInfo :
Daniel Dunbarc0c3b9a2008-09-10 04:16:29 +00005235 public TargetLowering::AsmOperandInfo {
Cedric Venetaff9c272009-02-14 16:06:42 +00005236public:
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005237 /// CallOperand - If this is the result output operand or a clobber
5238 /// this is null, otherwise it is the incoming operand to the CallInst.
5239 /// This gets modified as the asm is processed.
5240 SDValue CallOperand;
5241
5242 /// AssignedRegs - If this is a register or register class operand, this
5243 /// contains the set of register corresponding to the operand.
5244 RegsForValue AssignedRegs;
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00005245
John Thompsoneac6e1d2010-09-13 18:15:37 +00005246 explicit SDISelAsmOperandInfo(const TargetLowering::AsmOperandInfo &info)
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005247 : TargetLowering::AsmOperandInfo(info), CallOperand(0,0) {
5248 }
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00005249
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005250 /// MarkAllocatedRegs - Once AssignedRegs is set, mark the assigned registers
5251 /// busy in OutputRegs/InputRegs.
5252 void MarkAllocatedRegs(bool isOutReg, bool isInReg,
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00005253 std::set<unsigned> &OutputRegs,
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005254 std::set<unsigned> &InputRegs,
5255 const TargetRegisterInfo &TRI) const {
5256 if (isOutReg) {
5257 for (unsigned i = 0, e = AssignedRegs.Regs.size(); i != e; ++i)
5258 MarkRegAndAliases(AssignedRegs.Regs[i], OutputRegs, TRI);
5259 }
5260 if (isInReg) {
5261 for (unsigned i = 0, e = AssignedRegs.Regs.size(); i != e; ++i)
5262 MarkRegAndAliases(AssignedRegs.Regs[i], InputRegs, TRI);
5263 }
5264 }
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00005265
Owen Andersone50ed302009-08-10 22:56:29 +00005266 /// getCallOperandValEVT - Return the EVT of the Value* that this operand
Chris Lattner81249c92008-10-17 17:05:25 +00005267 /// corresponds to. If there is no Value* for this operand, it returns
Owen Anderson825b72b2009-08-11 20:47:22 +00005268 /// MVT::Other.
Mikhail Glushenkovb3c01992010-01-01 04:41:22 +00005269 EVT getCallOperandValEVT(LLVMContext &Context,
Owen Anderson1d0be152009-08-13 21:58:54 +00005270 const TargetLowering &TLI,
Chris Lattner81249c92008-10-17 17:05:25 +00005271 const TargetData *TD) const {
Owen Anderson825b72b2009-08-11 20:47:22 +00005272 if (CallOperandVal == 0) return MVT::Other;
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00005273
Chris Lattner81249c92008-10-17 17:05:25 +00005274 if (isa<BasicBlock>(CallOperandVal))
5275 return TLI.getPointerTy();
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00005276
Chris Lattner81249c92008-10-17 17:05:25 +00005277 const llvm::Type *OpTy = CallOperandVal->getType();
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00005278
Chris Lattner81249c92008-10-17 17:05:25 +00005279 // If this is an indirect operand, the operand is a pointer to the
5280 // accessed type.
Bob Wilsone261b0c2009-12-22 18:34:19 +00005281 if (isIndirect) {
5282 const llvm::PointerType *PtrTy = dyn_cast<PointerType>(OpTy);
5283 if (!PtrTy)
Chris Lattner75361b62010-04-07 22:58:41 +00005284 report_fatal_error("Indirect operand for inline asm not a pointer!");
Bob Wilsone261b0c2009-12-22 18:34:19 +00005285 OpTy = PtrTy->getElementType();
5286 }
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00005287
Chris Lattner81249c92008-10-17 17:05:25 +00005288 // If OpTy is not a single value, it may be a struct/union that we
5289 // can tile with integers.
5290 if (!OpTy->isSingleValueType() && OpTy->isSized()) {
5291 unsigned BitSize = TD->getTypeSizeInBits(OpTy);
5292 switch (BitSize) {
5293 default: break;
5294 case 1:
5295 case 8:
5296 case 16:
5297 case 32:
5298 case 64:
Chris Lattnercfc14c12008-10-17 19:59:51 +00005299 case 128:
Owen Anderson1d0be152009-08-13 21:58:54 +00005300 OpTy = IntegerType::get(Context, BitSize);
Chris Lattner81249c92008-10-17 17:05:25 +00005301 break;
5302 }
5303 }
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00005304
Chris Lattner81249c92008-10-17 17:05:25 +00005305 return TLI.getValueType(OpTy, true);
5306 }
Michael J. Spencere70c5262010-10-16 08:25:21 +00005307
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005308private:
5309 /// MarkRegAndAliases - Mark the specified register and all aliases in the
5310 /// specified set.
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00005311 static void MarkRegAndAliases(unsigned Reg, std::set<unsigned> &Regs,
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005312 const TargetRegisterInfo &TRI) {
5313 assert(TargetRegisterInfo::isPhysicalRegister(Reg) && "Isn't a physreg");
5314 Regs.insert(Reg);
5315 if (const unsigned *Aliases = TRI.getAliasSet(Reg))
5316 for (; *Aliases; ++Aliases)
5317 Regs.insert(*Aliases);
5318 }
5319};
Dan Gohman462f6b52010-05-29 17:53:24 +00005320
John Thompson44ab89e2010-10-29 17:29:13 +00005321typedef SmallVector<SDISelAsmOperandInfo,16> SDISelAsmOperandInfoVector;
5322
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005323} // end llvm namespace.
5324
Dan Gohman462f6b52010-05-29 17:53:24 +00005325/// isAllocatableRegister - If the specified register is safe to allocate,
5326/// i.e. it isn't a stack pointer or some other special register, return the
5327/// register class for the register. Otherwise, return null.
5328static const TargetRegisterClass *
5329isAllocatableRegister(unsigned Reg, MachineFunction &MF,
5330 const TargetLowering &TLI,
5331 const TargetRegisterInfo *TRI) {
5332 EVT FoundVT = MVT::Other;
5333 const TargetRegisterClass *FoundRC = 0;
5334 for (TargetRegisterInfo::regclass_iterator RCI = TRI->regclass_begin(),
5335 E = TRI->regclass_end(); RCI != E; ++RCI) {
5336 EVT ThisVT = MVT::Other;
5337
5338 const TargetRegisterClass *RC = *RCI;
5339 // If none of the value types for this register class are valid, we
5340 // can't use it. For example, 64-bit reg classes on 32-bit targets.
5341 for (TargetRegisterClass::vt_iterator I = RC->vt_begin(), E = RC->vt_end();
5342 I != E; ++I) {
5343 if (TLI.isTypeLegal(*I)) {
5344 // If we have already found this register in a different register class,
5345 // choose the one with the largest VT specified. For example, on
5346 // PowerPC, we favor f64 register classes over f32.
5347 if (FoundVT == MVT::Other || FoundVT.bitsLT(*I)) {
5348 ThisVT = *I;
5349 break;
5350 }
5351 }
5352 }
5353
5354 if (ThisVT == MVT::Other) continue;
5355
5356 // NOTE: This isn't ideal. In particular, this might allocate the
5357 // frame pointer in functions that need it (due to them not being taken
5358 // out of allocation, because a variable sized allocation hasn't been seen
5359 // yet). This is a slight code pessimization, but should still work.
5360 for (TargetRegisterClass::iterator I = RC->allocation_order_begin(MF),
5361 E = RC->allocation_order_end(MF); I != E; ++I)
5362 if (*I == Reg) {
5363 // We found a matching register class. Keep looking at others in case
5364 // we find one with larger registers that this physreg is also in.
5365 FoundRC = RC;
5366 FoundVT = ThisVT;
5367 break;
5368 }
5369 }
5370 return FoundRC;
5371}
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005372
5373/// GetRegistersForValue - Assign registers (virtual or physical) for the
5374/// specified operand. We prefer to assign virtual registers, to allow the
Bob Wilson266d9452009-12-17 05:07:36 +00005375/// register allocator to handle the assignment process. However, if the asm
5376/// uses features that we can't model on machineinstrs, we have SDISel do the
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005377/// allocation. This produces generally horrible, but correct, code.
5378///
5379/// OpInfo describes the operand.
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005380/// Input and OutputRegs are the set of already allocated physical registers.
5381///
Dan Gohman2048b852009-11-23 18:04:58 +00005382void SelectionDAGBuilder::
Dale Johannesen8e3455b2008-09-24 23:13:09 +00005383GetRegistersForValue(SDISelAsmOperandInfo &OpInfo,
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00005384 std::set<unsigned> &OutputRegs,
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005385 std::set<unsigned> &InputRegs) {
Dan Gohman0d24bfb2009-08-15 02:06:22 +00005386 LLVMContext &Context = FuncInfo.Fn->getContext();
Owen Anderson23b9b192009-08-12 00:36:31 +00005387
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005388 // Compute whether this value requires an input register, an output register,
5389 // or both.
5390 bool isOutReg = false;
5391 bool isInReg = false;
5392 switch (OpInfo.Type) {
5393 case InlineAsm::isOutput:
5394 isOutReg = true;
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00005395
5396 // If there is an input constraint that matches this, we need to reserve
Dale Johannesen8e3455b2008-09-24 23:13:09 +00005397 // the input register so no other inputs allocate to it.
Chris Lattner6bdcda32008-10-17 16:47:46 +00005398 isInReg = OpInfo.hasMatchingInput();
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005399 break;
5400 case InlineAsm::isInput:
5401 isInReg = true;
5402 isOutReg = false;
5403 break;
5404 case InlineAsm::isClobber:
5405 isOutReg = true;
5406 isInReg = true;
5407 break;
5408 }
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00005409
5410
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005411 MachineFunction &MF = DAG.getMachineFunction();
5412 SmallVector<unsigned, 4> Regs;
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00005413
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005414 // If this is a constraint for a single physreg, or a constraint for a
5415 // register class, find it.
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00005416 std::pair<unsigned, const TargetRegisterClass*> PhysReg =
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005417 TLI.getRegForInlineAsmConstraint(OpInfo.ConstraintCode,
5418 OpInfo.ConstraintVT);
5419
5420 unsigned NumRegs = 1;
Owen Anderson825b72b2009-08-11 20:47:22 +00005421 if (OpInfo.ConstraintVT != MVT::Other) {
Chris Lattner01426e12008-10-21 00:45:36 +00005422 // If this is a FP input in an integer register (or visa versa) insert a bit
5423 // cast of the input value. More generally, handle any case where the input
5424 // value disagrees with the register class we plan to stick this in.
5425 if (OpInfo.Type == InlineAsm::isInput &&
5426 PhysReg.second && !PhysReg.second->hasType(OpInfo.ConstraintVT)) {
Owen Andersone50ed302009-08-10 22:56:29 +00005427 // Try to convert to the first EVT that the reg class contains. If the
Chris Lattner01426e12008-10-21 00:45:36 +00005428 // types are identical size, use a bitcast to convert (e.g. two differing
5429 // vector types).
Owen Andersone50ed302009-08-10 22:56:29 +00005430 EVT RegVT = *PhysReg.second->vt_begin();
Chris Lattner01426e12008-10-21 00:45:36 +00005431 if (RegVT.getSizeInBits() == OpInfo.ConstraintVT.getSizeInBits()) {
Wesley Peckbf17cfa2010-11-23 03:31:01 +00005432 OpInfo.CallOperand = DAG.getNode(ISD::BITCAST, getCurDebugLoc(),
Dale Johannesenfa42dea2009-01-30 01:34:22 +00005433 RegVT, OpInfo.CallOperand);
Chris Lattner01426e12008-10-21 00:45:36 +00005434 OpInfo.ConstraintVT = RegVT;
5435 } else if (RegVT.isInteger() && OpInfo.ConstraintVT.isFloatingPoint()) {
5436 // If the input is a FP value and we want it in FP registers, do a
5437 // bitcast to the corresponding integer type. This turns an f64 value
5438 // into i64, which can be passed with two i32 values on a 32-bit
5439 // machine.
Mikhail Glushenkovb3c01992010-01-01 04:41:22 +00005440 RegVT = EVT::getIntegerVT(Context,
Owen Anderson23b9b192009-08-12 00:36:31 +00005441 OpInfo.ConstraintVT.getSizeInBits());
Wesley Peckbf17cfa2010-11-23 03:31:01 +00005442 OpInfo.CallOperand = DAG.getNode(ISD::BITCAST, getCurDebugLoc(),
Dale Johannesenfa42dea2009-01-30 01:34:22 +00005443 RegVT, OpInfo.CallOperand);
Chris Lattner01426e12008-10-21 00:45:36 +00005444 OpInfo.ConstraintVT = RegVT;
5445 }
5446 }
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00005447
Owen Anderson23b9b192009-08-12 00:36:31 +00005448 NumRegs = TLI.getNumRegisters(Context, OpInfo.ConstraintVT);
Chris Lattner01426e12008-10-21 00:45:36 +00005449 }
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00005450
Owen Andersone50ed302009-08-10 22:56:29 +00005451 EVT RegVT;
5452 EVT ValueVT = OpInfo.ConstraintVT;
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005453
5454 // If this is a constraint for a specific physical register, like {r17},
5455 // assign it now.
Chris Lattnere2f7bf82009-03-24 15:27:37 +00005456 if (unsigned AssignedReg = PhysReg.first) {
5457 const TargetRegisterClass *RC = PhysReg.second;
Owen Anderson825b72b2009-08-11 20:47:22 +00005458 if (OpInfo.ConstraintVT == MVT::Other)
Chris Lattnere2f7bf82009-03-24 15:27:37 +00005459 ValueVT = *RC->vt_begin();
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00005460
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005461 // Get the actual register value type. This is important, because the user
5462 // may have asked for (e.g.) the AX register in i32 type. We need to
5463 // remember that AX is actually i16 to get the right extension.
Chris Lattnere2f7bf82009-03-24 15:27:37 +00005464 RegVT = *RC->vt_begin();
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00005465
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005466 // This is a explicit reference to a physical register.
Chris Lattnere2f7bf82009-03-24 15:27:37 +00005467 Regs.push_back(AssignedReg);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005468
5469 // If this is an expanded reference, add the rest of the regs to Regs.
5470 if (NumRegs != 1) {
Chris Lattnere2f7bf82009-03-24 15:27:37 +00005471 TargetRegisterClass::iterator I = RC->begin();
5472 for (; *I != AssignedReg; ++I)
5473 assert(I != RC->end() && "Didn't find reg!");
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00005474
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005475 // Already added the first reg.
5476 --NumRegs; ++I;
5477 for (; NumRegs; --NumRegs, ++I) {
Chris Lattnere2f7bf82009-03-24 15:27:37 +00005478 assert(I != RC->end() && "Ran out of registers to allocate!");
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005479 Regs.push_back(*I);
5480 }
5481 }
Bill Wendling651ad132009-12-22 01:25:10 +00005482
Dan Gohman7451d3e2010-05-29 17:03:36 +00005483 OpInfo.AssignedRegs = RegsForValue(Regs, RegVT, ValueVT);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005484 const TargetRegisterInfo *TRI = DAG.getTarget().getRegisterInfo();
5485 OpInfo.MarkAllocatedRegs(isOutReg, isInReg, OutputRegs, InputRegs, *TRI);
5486 return;
5487 }
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00005488
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005489 // Otherwise, if this was a reference to an LLVM register class, create vregs
5490 // for this reference.
Chris Lattnerb3b44842009-03-24 15:25:07 +00005491 if (const TargetRegisterClass *RC = PhysReg.second) {
5492 RegVT = *RC->vt_begin();
Owen Anderson825b72b2009-08-11 20:47:22 +00005493 if (OpInfo.ConstraintVT == MVT::Other)
Evan Chengfb112882009-03-23 08:01:15 +00005494 ValueVT = RegVT;
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005495
Evan Chengfb112882009-03-23 08:01:15 +00005496 // Create the appropriate number of virtual registers.
5497 MachineRegisterInfo &RegInfo = MF.getRegInfo();
5498 for (; NumRegs; --NumRegs)
Chris Lattnerb3b44842009-03-24 15:25:07 +00005499 Regs.push_back(RegInfo.createVirtualRegister(RC));
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00005500
Dan Gohman7451d3e2010-05-29 17:03:36 +00005501 OpInfo.AssignedRegs = RegsForValue(Regs, RegVT, ValueVT);
Evan Chengfb112882009-03-23 08:01:15 +00005502 return;
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005503 }
Mikhail Glushenkovb3c01992010-01-01 04:41:22 +00005504
Chris Lattnerfc9d1612009-03-24 15:22:11 +00005505 // This is a reference to a register class that doesn't directly correspond
5506 // to an LLVM register class. Allocate NumRegs consecutive, available,
5507 // registers from the class.
5508 std::vector<unsigned> RegClassRegs
5509 = TLI.getRegClassForInlineAsmConstraint(OpInfo.ConstraintCode,
5510 OpInfo.ConstraintVT);
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00005511
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005512 const TargetRegisterInfo *TRI = DAG.getTarget().getRegisterInfo();
5513 unsigned NumAllocated = 0;
5514 for (unsigned i = 0, e = RegClassRegs.size(); i != e; ++i) {
5515 unsigned Reg = RegClassRegs[i];
5516 // See if this register is available.
5517 if ((isOutReg && OutputRegs.count(Reg)) || // Already used.
5518 (isInReg && InputRegs.count(Reg))) { // Already used.
5519 // Make sure we find consecutive registers.
5520 NumAllocated = 0;
5521 continue;
5522 }
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00005523
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005524 // Check to see if this register is allocatable (i.e. don't give out the
5525 // stack pointer).
Chris Lattnerfc9d1612009-03-24 15:22:11 +00005526 const TargetRegisterClass *RC = isAllocatableRegister(Reg, MF, TLI, TRI);
5527 if (!RC) { // Couldn't allocate this register.
5528 // Reset NumAllocated to make sure we return consecutive registers.
5529 NumAllocated = 0;
5530 continue;
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005531 }
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00005532
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005533 // Okay, this register is good, we can use it.
5534 ++NumAllocated;
5535
5536 // If we allocated enough consecutive registers, succeed.
5537 if (NumAllocated == NumRegs) {
5538 unsigned RegStart = (i-NumAllocated)+1;
5539 unsigned RegEnd = i+1;
5540 // Mark all of the allocated registers used.
5541 for (unsigned i = RegStart; i != RegEnd; ++i)
5542 Regs.push_back(RegClassRegs[i]);
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00005543
Dan Gohman7451d3e2010-05-29 17:03:36 +00005544 OpInfo.AssignedRegs = RegsForValue(Regs, *RC->vt_begin(),
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005545 OpInfo.ConstraintVT);
5546 OpInfo.MarkAllocatedRegs(isOutReg, isInReg, OutputRegs, InputRegs, *TRI);
5547 return;
5548 }
5549 }
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00005550
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005551 // Otherwise, we couldn't allocate enough registers for this.
5552}
5553
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005554/// visitInlineAsm - Handle a call to an InlineAsm object.
5555///
Dan Gohman46510a72010-04-15 01:51:59 +00005556void SelectionDAGBuilder::visitInlineAsm(ImmutableCallSite CS) {
5557 const InlineAsm *IA = cast<InlineAsm>(CS.getCalledValue());
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005558
5559 /// ConstraintOperands - Information about all of the constraints.
John Thompson44ab89e2010-10-29 17:29:13 +00005560 SDISelAsmOperandInfoVector ConstraintOperands;
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00005561
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005562 std::set<unsigned> OutputRegs, InputRegs;
5563
John Thompson44ab89e2010-10-29 17:29:13 +00005564 TargetLowering::AsmOperandInfoVector TargetConstraints = TLI.ParseConstraints(CS);
John Thompsoneac6e1d2010-09-13 18:15:37 +00005565 bool hasMemory = false;
Michael J. Spencere70c5262010-10-16 08:25:21 +00005566
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005567 unsigned ArgNo = 0; // ArgNo - The argument of the CallInst.
5568 unsigned ResNo = 0; // ResNo - The result number of the next output.
John Thompsoneac6e1d2010-09-13 18:15:37 +00005569 for (unsigned i = 0, e = TargetConstraints.size(); i != e; ++i) {
5570 ConstraintOperands.push_back(SDISelAsmOperandInfo(TargetConstraints[i]));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005571 SDISelAsmOperandInfo &OpInfo = ConstraintOperands.back();
Michael J. Spencere70c5262010-10-16 08:25:21 +00005572
Owen Anderson825b72b2009-08-11 20:47:22 +00005573 EVT OpVT = MVT::Other;
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005574
5575 // Compute the value type for each operand.
5576 switch (OpInfo.Type) {
5577 case InlineAsm::isOutput:
5578 // Indirect outputs just consume an argument.
5579 if (OpInfo.isIndirect) {
Dan Gohman46510a72010-04-15 01:51:59 +00005580 OpInfo.CallOperandVal = const_cast<Value *>(CS.getArgument(ArgNo++));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005581 break;
5582 }
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00005583
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005584 // The return value of the call is this value. As such, there is no
5585 // corresponding argument.
Benjamin Kramerf0127052010-01-05 13:12:22 +00005586 assert(!CS.getType()->isVoidTy() &&
Owen Anderson1d0be152009-08-13 21:58:54 +00005587 "Bad inline asm!");
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005588 if (const StructType *STy = dyn_cast<StructType>(CS.getType())) {
5589 OpVT = TLI.getValueType(STy->getElementType(ResNo));
5590 } else {
5591 assert(ResNo == 0 && "Asm only has one result!");
5592 OpVT = TLI.getValueType(CS.getType());
5593 }
5594 ++ResNo;
5595 break;
5596 case InlineAsm::isInput:
Dan Gohman46510a72010-04-15 01:51:59 +00005597 OpInfo.CallOperandVal = const_cast<Value *>(CS.getArgument(ArgNo++));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005598 break;
5599 case InlineAsm::isClobber:
5600 // Nothing to do.
5601 break;
5602 }
5603
5604 // If this is an input or an indirect output, process the call argument.
5605 // BasicBlocks are labels, currently appearing only in asm's.
5606 if (OpInfo.CallOperandVal) {
Dan Gohman46510a72010-04-15 01:51:59 +00005607 if (const BasicBlock *BB = dyn_cast<BasicBlock>(OpInfo.CallOperandVal)) {
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005608 OpInfo.CallOperand = DAG.getBasicBlock(FuncInfo.MBBMap[BB]);
Chris Lattner81249c92008-10-17 17:05:25 +00005609 } else {
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005610 OpInfo.CallOperand = getValue(OpInfo.CallOperandVal);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005611 }
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00005612
Owen Anderson1d0be152009-08-13 21:58:54 +00005613 OpVT = OpInfo.getCallOperandValEVT(*DAG.getContext(), TLI, TD);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005614 }
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00005615
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005616 OpInfo.ConstraintVT = OpVT;
Michael J. Spencere70c5262010-10-16 08:25:21 +00005617
John Thompsoneac6e1d2010-09-13 18:15:37 +00005618 // Indirect operand accesses access memory.
5619 if (OpInfo.isIndirect)
5620 hasMemory = true;
5621 else {
5622 for (unsigned j = 0, ee = OpInfo.Codes.size(); j != ee; ++j) {
5623 TargetLowering::ConstraintType CType = TLI.getConstraintType(OpInfo.Codes[j]);
5624 if (CType == TargetLowering::C_Memory) {
5625 hasMemory = true;
5626 break;
5627 }
5628 }
5629 }
Chris Lattner2a0b96c2008-10-18 18:49:30 +00005630 }
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00005631
John Thompsoneac6e1d2010-09-13 18:15:37 +00005632 SDValue Chain, Flag;
5633
5634 // We won't need to flush pending loads if this asm doesn't touch
5635 // memory and is nonvolatile.
5636 if (hasMemory || IA->hasSideEffects())
5637 Chain = getRoot();
5638 else
5639 Chain = DAG.getRoot();
5640
Chris Lattner2a0b96c2008-10-18 18:49:30 +00005641 // Second pass over the constraints: compute which constraint option to use
5642 // and assign registers to constraints that want a specific physreg.
John Thompsoneac6e1d2010-09-13 18:15:37 +00005643 for (unsigned i = 0, e = ConstraintOperands.size(); i != e; ++i) {
Chris Lattner2a0b96c2008-10-18 18:49:30 +00005644 SDISelAsmOperandInfo &OpInfo = ConstraintOperands[i];
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00005645
John Thompson54584742010-09-24 22:24:05 +00005646 // If this is an output operand with a matching input operand, look up the
5647 // matching input. If their types mismatch, e.g. one is an integer, the
5648 // other is floating point, or their sizes are different, flag it as an
5649 // error.
5650 if (OpInfo.hasMatchingInput()) {
5651 SDISelAsmOperandInfo &Input = ConstraintOperands[OpInfo.MatchingInput];
Michael J. Spencere70c5262010-10-16 08:25:21 +00005652
John Thompson54584742010-09-24 22:24:05 +00005653 if (OpInfo.ConstraintVT != Input.ConstraintVT) {
5654 if ((OpInfo.ConstraintVT.isInteger() !=
5655 Input.ConstraintVT.isInteger()) ||
5656 (OpInfo.ConstraintVT.getSizeInBits() !=
5657 Input.ConstraintVT.getSizeInBits())) {
5658 report_fatal_error("Unsupported asm: input constraint"
5659 " with a matching output constraint of"
5660 " incompatible type!");
5661 }
5662 Input.ConstraintVT = OpInfo.ConstraintVT;
5663 }
5664 }
5665
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005666 // Compute the constraint code and ConstraintType to use.
Dale Johannesen1784d162010-06-25 21:55:36 +00005667 TLI.ComputeConstraintToUse(OpInfo, OpInfo.CallOperand, &DAG);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005668
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005669 // If this is a memory input, and if the operand is not indirect, do what we
5670 // need to to provide an address for the memory input.
5671 if (OpInfo.ConstraintType == TargetLowering::C_Memory &&
5672 !OpInfo.isIndirect) {
John Thompsoneac6e1d2010-09-13 18:15:37 +00005673 assert((OpInfo.isMultipleAlternative || (OpInfo.Type == InlineAsm::isInput)) &&
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005674 "Can only indirectify direct input operands!");
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00005675
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005676 // Memory operands really want the address of the value. If we don't have
5677 // an indirect input, put it in the constpool if we can, otherwise spill
5678 // it to a stack slot.
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00005679
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005680 // If the operand is a float, integer, or vector constant, spill to a
5681 // constant pool entry to get its address.
Dan Gohman46510a72010-04-15 01:51:59 +00005682 const Value *OpVal = OpInfo.CallOperandVal;
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005683 if (isa<ConstantFP>(OpVal) || isa<ConstantInt>(OpVal) ||
5684 isa<ConstantVector>(OpVal)) {
5685 OpInfo.CallOperand = DAG.getConstantPool(cast<Constant>(OpVal),
5686 TLI.getPointerTy());
5687 } else {
5688 // Otherwise, create a stack slot and emit a store to it before the
5689 // asm.
5690 const Type *Ty = OpVal->getType();
Duncan Sands777d2302009-05-09 07:06:46 +00005691 uint64_t TySize = TLI.getTargetData()->getTypeAllocSize(Ty);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005692 unsigned Align = TLI.getTargetData()->getPrefTypeAlignment(Ty);
5693 MachineFunction &MF = DAG.getMachineFunction();
David Greene3f2bf852009-11-12 20:49:22 +00005694 int SSFI = MF.getFrameInfo()->CreateStackObject(TySize, Align, false);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005695 SDValue StackSlot = DAG.getFrameIndex(SSFI, TLI.getPointerTy());
Dale Johannesen66978ee2009-01-31 02:22:37 +00005696 Chain = DAG.getStore(Chain, getCurDebugLoc(),
Chris Lattnerecf42c42010-09-21 16:36:31 +00005697 OpInfo.CallOperand, StackSlot,
5698 MachinePointerInfo::getFixedStack(SSFI),
David Greene1e559442010-02-15 17:00:31 +00005699 false, false, 0);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005700 OpInfo.CallOperand = StackSlot;
5701 }
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00005702
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005703 // There is no longer a Value* corresponding to this operand.
5704 OpInfo.CallOperandVal = 0;
Bill Wendling651ad132009-12-22 01:25:10 +00005705
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005706 // It is now an indirect operand.
5707 OpInfo.isIndirect = true;
5708 }
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00005709
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005710 // If this constraint is for a specific register, allocate it before
5711 // anything else.
5712 if (OpInfo.ConstraintType == TargetLowering::C_Register)
Dale Johannesen8e3455b2008-09-24 23:13:09 +00005713 GetRegistersForValue(OpInfo, OutputRegs, InputRegs);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005714 }
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00005715
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005716 // Second pass - Loop over all of the operands, assigning virtual or physregs
Chris Lattner58f15c42008-10-17 16:21:11 +00005717 // to register class operands.
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005718 for (unsigned i = 0, e = ConstraintOperands.size(); i != e; ++i) {
5719 SDISelAsmOperandInfo &OpInfo = ConstraintOperands[i];
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00005720
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005721 // C_Register operands have already been allocated, Other/Memory don't need
5722 // to be.
5723 if (OpInfo.ConstraintType == TargetLowering::C_RegisterClass)
Dale Johannesen8e3455b2008-09-24 23:13:09 +00005724 GetRegistersForValue(OpInfo, OutputRegs, InputRegs);
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00005725 }
5726
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005727 // AsmNodeOperands - The operands for the ISD::INLINEASM node.
5728 std::vector<SDValue> AsmNodeOperands;
5729 AsmNodeOperands.push_back(SDValue()); // reserve space for input chain
5730 AsmNodeOperands.push_back(
Dan Gohmanf2d7fb32010-01-04 21:00:54 +00005731 DAG.getTargetExternalSymbol(IA->getAsmString().c_str(),
5732 TLI.getPointerTy()));
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00005733
Chris Lattnerdecc2672010-04-07 05:20:54 +00005734 // If we have a !srcloc metadata node associated with it, we want to attach
5735 // this to the ultimately generated inline asm machineinstr. To do this, we
5736 // pass in the third operand as this (potentially null) inline asm MDNode.
5737 const MDNode *SrcLoc = CS.getInstruction()->getMetadata("srcloc");
5738 AsmNodeOperands.push_back(DAG.getMDNode(SrcLoc));
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00005739
Evan Chengc36b7062011-01-07 23:50:32 +00005740 // Remember the HasSideEffect and AlignStack bits as operand 3.
5741 unsigned ExtraInfo = 0;
5742 if (IA->hasSideEffects())
5743 ExtraInfo |= InlineAsm::Extra_HasSideEffects;
5744 if (IA->isAlignStack())
5745 ExtraInfo |= InlineAsm::Extra_IsAlignStack;
5746 AsmNodeOperands.push_back(DAG.getTargetConstant(ExtraInfo,
5747 TLI.getPointerTy()));
Dale Johannesenf1e309e2010-07-02 20:16:09 +00005748
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005749 // Loop over all of the inputs, copying the operand values into the
5750 // appropriate registers and processing the output regs.
5751 RegsForValue RetValRegs;
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00005752
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005753 // IndirectStoresToEmit - The set of stores to emit after the inline asm node.
5754 std::vector<std::pair<RegsForValue, Value*> > IndirectStoresToEmit;
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00005755
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005756 for (unsigned i = 0, e = ConstraintOperands.size(); i != e; ++i) {
5757 SDISelAsmOperandInfo &OpInfo = ConstraintOperands[i];
5758
5759 switch (OpInfo.Type) {
5760 case InlineAsm::isOutput: {
5761 if (OpInfo.ConstraintType != TargetLowering::C_RegisterClass &&
5762 OpInfo.ConstraintType != TargetLowering::C_Register) {
5763 // Memory output, or 'other' output (e.g. 'X' constraint).
5764 assert(OpInfo.isIndirect && "Memory output must be indirect operand");
5765
5766 // Add information to the INLINEASM node to know about this output.
Chris Lattnerdecc2672010-04-07 05:20:54 +00005767 unsigned OpFlags = InlineAsm::getFlagWord(InlineAsm::Kind_Mem, 1);
5768 AsmNodeOperands.push_back(DAG.getTargetConstant(OpFlags,
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005769 TLI.getPointerTy()));
5770 AsmNodeOperands.push_back(OpInfo.CallOperand);
5771 break;
5772 }
5773
5774 // Otherwise, this is a register or register class output.
5775
5776 // Copy the output from the appropriate register. Find a register that
5777 // we can use.
Chris Lattnerdecc2672010-04-07 05:20:54 +00005778 if (OpInfo.AssignedRegs.Regs.empty())
Benjamin Kramer1bd73352010-04-08 10:44:28 +00005779 report_fatal_error("Couldn't allocate output reg for constraint '" +
5780 Twine(OpInfo.ConstraintCode) + "'!");
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005781
5782 // If this is an indirect operand, store through the pointer after the
5783 // asm.
5784 if (OpInfo.isIndirect) {
5785 IndirectStoresToEmit.push_back(std::make_pair(OpInfo.AssignedRegs,
5786 OpInfo.CallOperandVal));
5787 } else {
5788 // This is the result value of the call.
Benjamin Kramerf0127052010-01-05 13:12:22 +00005789 assert(!CS.getType()->isVoidTy() && "Bad inline asm!");
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005790 // Concatenate this output onto the outputs list.
5791 RetValRegs.append(OpInfo.AssignedRegs);
5792 }
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00005793
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005794 // Add information to the INLINEASM node to know that this register is
5795 // set.
Dale Johannesen913d3df2008-09-12 17:49:03 +00005796 OpInfo.AssignedRegs.AddInlineAsmOperands(OpInfo.isEarlyClobber ?
Chris Lattnerdecc2672010-04-07 05:20:54 +00005797 InlineAsm::Kind_RegDefEarlyClobber :
5798 InlineAsm::Kind_RegDef,
Evan Chengfb112882009-03-23 08:01:15 +00005799 false,
5800 0,
Bill Wendling46ada192010-03-02 01:55:18 +00005801 DAG,
Bill Wendling651ad132009-12-22 01:25:10 +00005802 AsmNodeOperands);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005803 break;
5804 }
5805 case InlineAsm::isInput: {
5806 SDValue InOperandVal = OpInfo.CallOperand;
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00005807
Chris Lattner6bdcda32008-10-17 16:47:46 +00005808 if (OpInfo.isMatchingInputConstraint()) { // Matching constraint?
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005809 // If this is required to match an output register we have already set,
5810 // just use its register.
Chris Lattner58f15c42008-10-17 16:21:11 +00005811 unsigned OperandNo = OpInfo.getMatchedOperand();
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00005812
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005813 // Scan until we find the definition we already emitted of this operand.
5814 // When we find it, create a RegsForValue operand.
Chris Lattnerdecc2672010-04-07 05:20:54 +00005815 unsigned CurOp = InlineAsm::Op_FirstOperand;
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005816 for (; OperandNo; --OperandNo) {
5817 // Advance to the next operand.
Evan Cheng697cbbf2009-03-20 18:03:34 +00005818 unsigned OpFlag =
Dan Gohmanf5aeb1a2008-09-12 16:56:44 +00005819 cast<ConstantSDNode>(AsmNodeOperands[CurOp])->getZExtValue();
Chris Lattnerdecc2672010-04-07 05:20:54 +00005820 assert((InlineAsm::isRegDefKind(OpFlag) ||
5821 InlineAsm::isRegDefEarlyClobberKind(OpFlag) ||
5822 InlineAsm::isMemKind(OpFlag)) && "Skipped past definitions?");
Evan Cheng697cbbf2009-03-20 18:03:34 +00005823 CurOp += InlineAsm::getNumOperandRegisters(OpFlag)+1;
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005824 }
5825
Evan Cheng697cbbf2009-03-20 18:03:34 +00005826 unsigned OpFlag =
Dan Gohmanf5aeb1a2008-09-12 16:56:44 +00005827 cast<ConstantSDNode>(AsmNodeOperands[CurOp])->getZExtValue();
Chris Lattnerdecc2672010-04-07 05:20:54 +00005828 if (InlineAsm::isRegDefKind(OpFlag) ||
5829 InlineAsm::isRegDefEarlyClobberKind(OpFlag)) {
Evan Cheng697cbbf2009-03-20 18:03:34 +00005830 // Add (OpFlag&0xffff)>>3 registers to MatchedRegs.
Chris Lattner6129c372010-04-08 00:09:16 +00005831 if (OpInfo.isIndirect) {
5832 // This happens on gcc/testsuite/gcc.dg/pr8788-1.c
Dan Gohman99be8ae2010-04-19 22:41:47 +00005833 LLVMContext &Ctx = *DAG.getContext();
Chris Lattner6129c372010-04-08 00:09:16 +00005834 Ctx.emitError(CS.getInstruction(), "inline asm not supported yet:"
5835 " don't know how to handle tied "
5836 "indirect register inputs");
5837 }
Michael J. Spencere70c5262010-10-16 08:25:21 +00005838
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005839 RegsForValue MatchedRegs;
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005840 MatchedRegs.ValueVTs.push_back(InOperandVal.getValueType());
Owen Andersone50ed302009-08-10 22:56:29 +00005841 EVT RegVT = AsmNodeOperands[CurOp+1].getValueType();
Evan Chengfb112882009-03-23 08:01:15 +00005842 MatchedRegs.RegVTs.push_back(RegVT);
5843 MachineRegisterInfo &RegInfo = DAG.getMachineFunction().getRegInfo();
Evan Cheng697cbbf2009-03-20 18:03:34 +00005844 for (unsigned i = 0, e = InlineAsm::getNumOperandRegisters(OpFlag);
Evan Chengfb112882009-03-23 08:01:15 +00005845 i != e; ++i)
Mikhail Glushenkovb3c01992010-01-01 04:41:22 +00005846 MatchedRegs.Regs.push_back
5847 (RegInfo.createVirtualRegister(TLI.getRegClassFor(RegVT)));
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00005848
5849 // Use the produced MatchedRegs object to
Dale Johannesen66978ee2009-01-31 02:22:37 +00005850 MatchedRegs.getCopyToRegs(InOperandVal, DAG, getCurDebugLoc(),
Bill Wendling46ada192010-03-02 01:55:18 +00005851 Chain, &Flag);
Chris Lattnerdecc2672010-04-07 05:20:54 +00005852 MatchedRegs.AddInlineAsmOperands(InlineAsm::Kind_RegUse,
Evan Chengfb112882009-03-23 08:01:15 +00005853 true, OpInfo.getMatchedOperand(),
Bill Wendling46ada192010-03-02 01:55:18 +00005854 DAG, AsmNodeOperands);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005855 break;
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005856 }
Michael J. Spencere70c5262010-10-16 08:25:21 +00005857
Chris Lattnerdecc2672010-04-07 05:20:54 +00005858 assert(InlineAsm::isMemKind(OpFlag) && "Unknown matching constraint!");
5859 assert(InlineAsm::getNumOperandRegisters(OpFlag) == 1 &&
5860 "Unexpected number of operands");
5861 // Add information to the INLINEASM node to know about this input.
5862 // See InlineAsm.h isUseOperandTiedToDef.
5863 OpFlag = InlineAsm::getFlagWordForMatchingOp(OpFlag,
5864 OpInfo.getMatchedOperand());
5865 AsmNodeOperands.push_back(DAG.getTargetConstant(OpFlag,
5866 TLI.getPointerTy()));
5867 AsmNodeOperands.push_back(AsmNodeOperands[CurOp+1]);
5868 break;
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005869 }
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00005870
Dale Johannesenb5611a62010-07-13 20:17:05 +00005871 // Treat indirect 'X' constraint as memory.
Michael J. Spencere70c5262010-10-16 08:25:21 +00005872 if (OpInfo.ConstraintType == TargetLowering::C_Other &&
5873 OpInfo.isIndirect)
Dale Johannesenb5611a62010-07-13 20:17:05 +00005874 OpInfo.ConstraintType = TargetLowering::C_Memory;
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00005875
Dale Johannesenb5611a62010-07-13 20:17:05 +00005876 if (OpInfo.ConstraintType == TargetLowering::C_Other) {
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005877 std::vector<SDValue> Ops;
5878 TLI.LowerAsmOperandForConstraint(InOperandVal, OpInfo.ConstraintCode[0],
Dale Johannesen1784d162010-06-25 21:55:36 +00005879 Ops, DAG);
Chris Lattner87d677c2010-04-07 23:50:38 +00005880 if (Ops.empty())
Benjamin Kramer1bd73352010-04-08 10:44:28 +00005881 report_fatal_error("Invalid operand for inline asm constraint '" +
5882 Twine(OpInfo.ConstraintCode) + "'!");
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00005883
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005884 // Add information to the INLINEASM node to know about this input.
Chris Lattnerdecc2672010-04-07 05:20:54 +00005885 unsigned ResOpType =
5886 InlineAsm::getFlagWord(InlineAsm::Kind_Imm, Ops.size());
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00005887 AsmNodeOperands.push_back(DAG.getTargetConstant(ResOpType,
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005888 TLI.getPointerTy()));
5889 AsmNodeOperands.insert(AsmNodeOperands.end(), Ops.begin(), Ops.end());
5890 break;
Chris Lattnerdecc2672010-04-07 05:20:54 +00005891 }
Michael J. Spencere70c5262010-10-16 08:25:21 +00005892
Chris Lattnerdecc2672010-04-07 05:20:54 +00005893 if (OpInfo.ConstraintType == TargetLowering::C_Memory) {
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005894 assert(OpInfo.isIndirect && "Operand must be indirect to be a mem!");
5895 assert(InOperandVal.getValueType() == TLI.getPointerTy() &&
5896 "Memory operands expect pointer values");
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00005897
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005898 // Add information to the INLINEASM node to know about this input.
Chris Lattnerdecc2672010-04-07 05:20:54 +00005899 unsigned ResOpType = InlineAsm::getFlagWord(InlineAsm::Kind_Mem, 1);
Dale Johannesen86b49f82008-09-24 01:07:17 +00005900 AsmNodeOperands.push_back(DAG.getTargetConstant(ResOpType,
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005901 TLI.getPointerTy()));
5902 AsmNodeOperands.push_back(InOperandVal);
5903 break;
5904 }
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00005905
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005906 assert((OpInfo.ConstraintType == TargetLowering::C_RegisterClass ||
5907 OpInfo.ConstraintType == TargetLowering::C_Register) &&
5908 "Unknown constraint type!");
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00005909 assert(!OpInfo.isIndirect &&
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005910 "Don't know how to handle indirect register inputs yet!");
5911
5912 // Copy the input into the appropriate registers.
Evan Cheng8112b532010-02-10 01:21:02 +00005913 if (OpInfo.AssignedRegs.Regs.empty() ||
Dan Gohman7451d3e2010-05-29 17:03:36 +00005914 !OpInfo.AssignedRegs.areValueTypesLegal(TLI))
Benjamin Kramer1bd73352010-04-08 10:44:28 +00005915 report_fatal_error("Couldn't allocate input reg for constraint '" +
5916 Twine(OpInfo.ConstraintCode) + "'!");
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005917
Dale Johannesen66978ee2009-01-31 02:22:37 +00005918 OpInfo.AssignedRegs.getCopyToRegs(InOperandVal, DAG, getCurDebugLoc(),
Bill Wendling46ada192010-03-02 01:55:18 +00005919 Chain, &Flag);
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00005920
Chris Lattnerdecc2672010-04-07 05:20:54 +00005921 OpInfo.AssignedRegs.AddInlineAsmOperands(InlineAsm::Kind_RegUse, false, 0,
Bill Wendling46ada192010-03-02 01:55:18 +00005922 DAG, AsmNodeOperands);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005923 break;
5924 }
5925 case InlineAsm::isClobber: {
5926 // Add the clobbered value to the operand list, so that the register
5927 // allocator is aware that the physreg got clobbered.
5928 if (!OpInfo.AssignedRegs.Regs.empty())
Chris Lattnerdecc2672010-04-07 05:20:54 +00005929 OpInfo.AssignedRegs.AddInlineAsmOperands(
5930 InlineAsm::Kind_RegDefEarlyClobber,
Bill Wendling46ada192010-03-02 01:55:18 +00005931 false, 0, DAG,
Bill Wendling651ad132009-12-22 01:25:10 +00005932 AsmNodeOperands);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005933 break;
5934 }
5935 }
5936 }
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00005937
Chris Lattnerdecc2672010-04-07 05:20:54 +00005938 // Finish up input operands. Set the input chain and add the flag last.
Dale Johannesenf1e309e2010-07-02 20:16:09 +00005939 AsmNodeOperands[InlineAsm::Op_InputChain] = Chain;
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005940 if (Flag.getNode()) AsmNodeOperands.push_back(Flag);
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00005941
Dale Johannesen66978ee2009-01-31 02:22:37 +00005942 Chain = DAG.getNode(ISD::INLINEASM, getCurDebugLoc(),
Chris Lattnerf1b4eaf2010-12-21 02:38:05 +00005943 DAG.getVTList(MVT::Other, MVT::Glue),
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005944 &AsmNodeOperands[0], AsmNodeOperands.size());
5945 Flag = Chain.getValue(1);
5946
5947 // If this asm returns a register value, copy the result from that register
5948 // and set it as the value of the call.
5949 if (!RetValRegs.Regs.empty()) {
Dan Gohman7451d3e2010-05-29 17:03:36 +00005950 SDValue Val = RetValRegs.getCopyFromRegs(DAG, FuncInfo, getCurDebugLoc(),
Bill Wendling46ada192010-03-02 01:55:18 +00005951 Chain, &Flag);
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00005952
Chris Lattner2a0b96c2008-10-18 18:49:30 +00005953 // FIXME: Why don't we do this for inline asms with MRVs?
5954 if (CS.getType()->isSingleValueType() && CS.getType()->isSized()) {
Owen Andersone50ed302009-08-10 22:56:29 +00005955 EVT ResultType = TLI.getValueType(CS.getType());
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00005956
Chris Lattner2a0b96c2008-10-18 18:49:30 +00005957 // If any of the results of the inline asm is a vector, it may have the
5958 // wrong width/num elts. This can happen for register classes that can
5959 // contain multiple different value types. The preg or vreg allocated may
5960 // not have the same VT as was expected. Convert it to the right type
5961 // with bit_convert.
5962 if (ResultType != Val.getValueType() && Val.getValueType().isVector()) {
Wesley Peckbf17cfa2010-11-23 03:31:01 +00005963 Val = DAG.getNode(ISD::BITCAST, getCurDebugLoc(),
Dale Johannesenfa42dea2009-01-30 01:34:22 +00005964 ResultType, Val);
Dan Gohman95915732008-10-18 01:03:45 +00005965
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00005966 } else if (ResultType != Val.getValueType() &&
Chris Lattner2a0b96c2008-10-18 18:49:30 +00005967 ResultType.isInteger() && Val.getValueType().isInteger()) {
5968 // If a result value was tied to an input value, the computed result may
5969 // have a wider width than the expected result. Extract the relevant
5970 // portion.
Dale Johannesen66978ee2009-01-31 02:22:37 +00005971 Val = DAG.getNode(ISD::TRUNCATE, getCurDebugLoc(), ResultType, Val);
Dan Gohman95915732008-10-18 01:03:45 +00005972 }
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00005973
Chris Lattner2a0b96c2008-10-18 18:49:30 +00005974 assert(ResultType == Val.getValueType() && "Asm result value mismatch!");
Chris Lattner0c526442008-10-17 17:52:49 +00005975 }
Dan Gohman95915732008-10-18 01:03:45 +00005976
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005977 setValue(CS.getInstruction(), Val);
Dale Johannesenec65a7d2009-04-14 00:56:56 +00005978 // Don't need to use this as a chain in this case.
5979 if (!IA->hasSideEffects() && !hasMemory && IndirectStoresToEmit.empty())
5980 return;
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005981 }
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00005982
Dan Gohman46510a72010-04-15 01:51:59 +00005983 std::vector<std::pair<SDValue, const Value *> > StoresToEmit;
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00005984
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005985 // Process indirect outputs, first output all of the flagged copies out of
5986 // physregs.
5987 for (unsigned i = 0, e = IndirectStoresToEmit.size(); i != e; ++i) {
5988 RegsForValue &OutRegs = IndirectStoresToEmit[i].first;
Dan Gohman46510a72010-04-15 01:51:59 +00005989 const Value *Ptr = IndirectStoresToEmit[i].second;
Dan Gohman7451d3e2010-05-29 17:03:36 +00005990 SDValue OutVal = OutRegs.getCopyFromRegs(DAG, FuncInfo, getCurDebugLoc(),
Bill Wendling46ada192010-03-02 01:55:18 +00005991 Chain, &Flag);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005992 StoresToEmit.push_back(std::make_pair(OutVal, Ptr));
5993 }
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00005994
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00005995 // Emit the non-flagged stores from the physregs.
5996 SmallVector<SDValue, 8> OutChains;
Bill Wendling651ad132009-12-22 01:25:10 +00005997 for (unsigned i = 0, e = StoresToEmit.size(); i != e; ++i) {
5998 SDValue Val = DAG.getStore(Chain, getCurDebugLoc(),
5999 StoresToEmit[i].first,
6000 getValue(StoresToEmit[i].second),
Chris Lattner84bd98a2010-09-21 18:58:22 +00006001 MachinePointerInfo(StoresToEmit[i].second),
David Greene1e559442010-02-15 17:00:31 +00006002 false, false, 0);
Bill Wendling651ad132009-12-22 01:25:10 +00006003 OutChains.push_back(Val);
Bill Wendling651ad132009-12-22 01:25:10 +00006004 }
6005
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00006006 if (!OutChains.empty())
Owen Anderson825b72b2009-08-11 20:47:22 +00006007 Chain = DAG.getNode(ISD::TokenFactor, getCurDebugLoc(), MVT::Other,
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00006008 &OutChains[0], OutChains.size());
Bill Wendling651ad132009-12-22 01:25:10 +00006009
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00006010 DAG.setRoot(Chain);
6011}
6012
Dan Gohman46510a72010-04-15 01:51:59 +00006013void SelectionDAGBuilder::visitVAStart(const CallInst &I) {
Bill Wendlingc1d3c942009-12-23 00:44:51 +00006014 DAG.setRoot(DAG.getNode(ISD::VASTART, getCurDebugLoc(),
6015 MVT::Other, getRoot(),
Gabor Greif0635f352010-06-25 09:38:13 +00006016 getValue(I.getArgOperand(0)),
6017 DAG.getSrcValue(I.getArgOperand(0))));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00006018}
6019
Dan Gohman46510a72010-04-15 01:51:59 +00006020void SelectionDAGBuilder::visitVAArg(const VAArgInst &I) {
Rafael Espindola9d544d02010-07-12 18:11:17 +00006021 const TargetData &TD = *TLI.getTargetData();
Dale Johannesena04b7572009-02-03 23:04:43 +00006022 SDValue V = DAG.getVAArg(TLI.getValueType(I.getType()), getCurDebugLoc(),
6023 getRoot(), getValue(I.getOperand(0)),
Rafael Espindolacbeeae22010-07-11 04:01:49 +00006024 DAG.getSrcValue(I.getOperand(0)),
Rafael Espindola9d544d02010-07-12 18:11:17 +00006025 TD.getABITypeAlignment(I.getType()));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00006026 setValue(&I, V);
6027 DAG.setRoot(V.getValue(1));
6028}
6029
Dan Gohman46510a72010-04-15 01:51:59 +00006030void SelectionDAGBuilder::visitVAEnd(const CallInst &I) {
Bill Wendlingc1d3c942009-12-23 00:44:51 +00006031 DAG.setRoot(DAG.getNode(ISD::VAEND, getCurDebugLoc(),
6032 MVT::Other, getRoot(),
Gabor Greif0635f352010-06-25 09:38:13 +00006033 getValue(I.getArgOperand(0)),
6034 DAG.getSrcValue(I.getArgOperand(0))));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00006035}
6036
Dan Gohman46510a72010-04-15 01:51:59 +00006037void SelectionDAGBuilder::visitVACopy(const CallInst &I) {
Bill Wendlingc1d3c942009-12-23 00:44:51 +00006038 DAG.setRoot(DAG.getNode(ISD::VACOPY, getCurDebugLoc(),
6039 MVT::Other, getRoot(),
Gabor Greif0635f352010-06-25 09:38:13 +00006040 getValue(I.getArgOperand(0)),
6041 getValue(I.getArgOperand(1)),
6042 DAG.getSrcValue(I.getArgOperand(0)),
6043 DAG.getSrcValue(I.getArgOperand(1))));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00006044}
6045
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00006046/// TargetLowering::LowerCallTo - This is the default LowerCallTo
Dan Gohman98ca4f22009-08-05 01:29:28 +00006047/// implementation, which just calls LowerCall.
6048/// FIXME: When all targets are
6049/// migrated to using LowerCall, this hook should be integrated into SDISel.
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00006050std::pair<SDValue, SDValue>
6051TargetLowering::LowerCallTo(SDValue Chain, const Type *RetTy,
6052 bool RetSExt, bool RetZExt, bool isVarArg,
Tilmann Scheller6b61cd12009-07-03 06:44:53 +00006053 bool isInreg, unsigned NumFixedArgs,
Sandeep Patel65c3c8f2009-09-02 08:44:58 +00006054 CallingConv::ID CallConv, bool isTailCall,
Dan Gohman98ca4f22009-08-05 01:29:28 +00006055 bool isReturnValueUsed,
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00006056 SDValue Callee,
Dan Gohmand858e902010-04-17 15:26:15 +00006057 ArgListTy &Args, SelectionDAG &DAG,
6058 DebugLoc dl) const {
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00006059 // Handle all of the outgoing arguments.
Dan Gohman98ca4f22009-08-05 01:29:28 +00006060 SmallVector<ISD::OutputArg, 32> Outs;
Dan Gohmanc9403652010-07-07 15:54:55 +00006061 SmallVector<SDValue, 32> OutVals;
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00006062 for (unsigned i = 0, e = Args.size(); i != e; ++i) {
Owen Andersone50ed302009-08-10 22:56:29 +00006063 SmallVector<EVT, 4> ValueVTs;
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00006064 ComputeValueVTs(*this, Args[i].Ty, ValueVTs);
6065 for (unsigned Value = 0, NumValues = ValueVTs.size();
6066 Value != NumValues; ++Value) {
Owen Andersone50ed302009-08-10 22:56:29 +00006067 EVT VT = ValueVTs[Value];
Owen Anderson23b9b192009-08-12 00:36:31 +00006068 const Type *ArgTy = VT.getTypeForEVT(RetTy->getContext());
Chris Lattner2a0b96c2008-10-18 18:49:30 +00006069 SDValue Op = SDValue(Args[i].Node.getNode(),
6070 Args[i].Node.getResNo() + Value);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00006071 ISD::ArgFlagsTy Flags;
6072 unsigned OriginalAlignment =
6073 getTargetData()->getABITypeAlignment(ArgTy);
6074
6075 if (Args[i].isZExt)
6076 Flags.setZExt();
6077 if (Args[i].isSExt)
6078 Flags.setSExt();
6079 if (Args[i].isInReg)
6080 Flags.setInReg();
6081 if (Args[i].isSRet)
6082 Flags.setSRet();
6083 if (Args[i].isByVal) {
6084 Flags.setByVal();
6085 const PointerType *Ty = cast<PointerType>(Args[i].Ty);
6086 const Type *ElementTy = Ty->getElementType();
6087 unsigned FrameAlign = getByValTypeAlignment(ElementTy);
Duncan Sands777d2302009-05-09 07:06:46 +00006088 unsigned FrameSize = getTargetData()->getTypeAllocSize(ElementTy);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00006089 // For ByVal, alignment should come from FE. BE will guess if this
6090 // info is not there but there are cases it cannot get right.
6091 if (Args[i].Alignment)
6092 FrameAlign = Args[i].Alignment;
6093 Flags.setByValAlign(FrameAlign);
6094 Flags.setByValSize(FrameSize);
6095 }
6096 if (Args[i].isNest)
6097 Flags.setNest();
6098 Flags.setOrigAlign(OriginalAlignment);
6099
Owen Anderson23b9b192009-08-12 00:36:31 +00006100 EVT PartVT = getRegisterType(RetTy->getContext(), VT);
6101 unsigned NumParts = getNumRegisters(RetTy->getContext(), VT);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00006102 SmallVector<SDValue, 4> Parts(NumParts);
6103 ISD::NodeType ExtendKind = ISD::ANY_EXTEND;
6104
6105 if (Args[i].isSExt)
6106 ExtendKind = ISD::SIGN_EXTEND;
6107 else if (Args[i].isZExt)
6108 ExtendKind = ISD::ZERO_EXTEND;
6109
Bill Wendling46ada192010-03-02 01:55:18 +00006110 getCopyToParts(DAG, dl, Op, &Parts[0], NumParts,
Bill Wendling3ea3c242009-12-22 02:10:19 +00006111 PartVT, ExtendKind);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00006112
Dan Gohman98ca4f22009-08-05 01:29:28 +00006113 for (unsigned j = 0; j != NumParts; ++j) {
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00006114 // if it isn't first piece, alignment must be 1
Dan Gohmanc9403652010-07-07 15:54:55 +00006115 ISD::OutputArg MyFlags(Flags, Parts[j].getValueType(),
6116 i < NumFixedArgs);
Dan Gohman98ca4f22009-08-05 01:29:28 +00006117 if (NumParts > 1 && j == 0)
6118 MyFlags.Flags.setSplit();
6119 else if (j != 0)
6120 MyFlags.Flags.setOrigAlign(1);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00006121
Dan Gohman98ca4f22009-08-05 01:29:28 +00006122 Outs.push_back(MyFlags);
Dan Gohmanc9403652010-07-07 15:54:55 +00006123 OutVals.push_back(Parts[j]);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00006124 }
6125 }
6126 }
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00006127
Dan Gohman98ca4f22009-08-05 01:29:28 +00006128 // Handle the incoming return values from the call.
6129 SmallVector<ISD::InputArg, 32> Ins;
Owen Andersone50ed302009-08-10 22:56:29 +00006130 SmallVector<EVT, 4> RetTys;
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00006131 ComputeValueVTs(*this, RetTy, RetTys);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00006132 for (unsigned I = 0, E = RetTys.size(); I != E; ++I) {
Owen Andersone50ed302009-08-10 22:56:29 +00006133 EVT VT = RetTys[I];
Owen Anderson23b9b192009-08-12 00:36:31 +00006134 EVT RegisterVT = getRegisterType(RetTy->getContext(), VT);
6135 unsigned NumRegs = getNumRegisters(RetTy->getContext(), VT);
Dan Gohman98ca4f22009-08-05 01:29:28 +00006136 for (unsigned i = 0; i != NumRegs; ++i) {
6137 ISD::InputArg MyFlags;
Duncan Sands1440e8b2010-11-03 11:35:31 +00006138 MyFlags.VT = RegisterVT.getSimpleVT();
Dan Gohman98ca4f22009-08-05 01:29:28 +00006139 MyFlags.Used = isReturnValueUsed;
6140 if (RetSExt)
6141 MyFlags.Flags.setSExt();
6142 if (RetZExt)
6143 MyFlags.Flags.setZExt();
6144 if (isInreg)
6145 MyFlags.Flags.setInReg();
6146 Ins.push_back(MyFlags);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00006147 }
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00006148 }
6149
Dan Gohman98ca4f22009-08-05 01:29:28 +00006150 SmallVector<SDValue, 4> InVals;
Evan Cheng022d9e12010-02-02 23:55:14 +00006151 Chain = LowerCall(Chain, Callee, CallConv, isVarArg, isTailCall,
Dan Gohmanc9403652010-07-07 15:54:55 +00006152 Outs, OutVals, Ins, dl, DAG, InVals);
Dan Gohman5e866062009-08-06 15:37:27 +00006153
6154 // Verify that the target's LowerCall behaved as expected.
Owen Anderson825b72b2009-08-11 20:47:22 +00006155 assert(Chain.getNode() && Chain.getValueType() == MVT::Other &&
Dan Gohman5e866062009-08-06 15:37:27 +00006156 "LowerCall didn't return a valid chain!");
6157 assert((!isTailCall || InVals.empty()) &&
6158 "LowerCall emitted a return value for a tail call!");
6159 assert((isTailCall || InVals.size() == Ins.size()) &&
6160 "LowerCall didn't emit the correct number of values!");
Dan Gohman98ca4f22009-08-05 01:29:28 +00006161
6162 // For a tail call, the return value is merely live-out and there aren't
6163 // any nodes in the DAG representing it. Return a special value to
6164 // indicate that a tail call has been emitted and no more Instructions
6165 // should be processed in the current block.
6166 if (isTailCall) {
6167 DAG.setRoot(Chain);
6168 return std::make_pair(SDValue(), SDValue());
6169 }
6170
Evan Chengaf1871f2010-03-11 19:38:18 +00006171 DEBUG(for (unsigned i = 0, e = Ins.size(); i != e; ++i) {
6172 assert(InVals[i].getNode() &&
6173 "LowerCall emitted a null value!");
Duncan Sands1440e8b2010-11-03 11:35:31 +00006174 assert(EVT(Ins[i].VT) == InVals[i].getValueType() &&
Evan Chengaf1871f2010-03-11 19:38:18 +00006175 "LowerCall emitted a value with the wrong type!");
6176 });
6177
Dan Gohman98ca4f22009-08-05 01:29:28 +00006178 // Collect the legal value parts into potentially illegal values
6179 // that correspond to the original function's return values.
6180 ISD::NodeType AssertOp = ISD::DELETED_NODE;
6181 if (RetSExt)
6182 AssertOp = ISD::AssertSext;
6183 else if (RetZExt)
6184 AssertOp = ISD::AssertZext;
6185 SmallVector<SDValue, 4> ReturnValues;
6186 unsigned CurReg = 0;
6187 for (unsigned I = 0, E = RetTys.size(); I != E; ++I) {
Owen Andersone50ed302009-08-10 22:56:29 +00006188 EVT VT = RetTys[I];
Owen Anderson23b9b192009-08-12 00:36:31 +00006189 EVT RegisterVT = getRegisterType(RetTy->getContext(), VT);
6190 unsigned NumRegs = getNumRegisters(RetTy->getContext(), VT);
Dan Gohman98ca4f22009-08-05 01:29:28 +00006191
Bill Wendling46ada192010-03-02 01:55:18 +00006192 ReturnValues.push_back(getCopyFromParts(DAG, dl, &InVals[CurReg],
Bill Wendling4533cac2010-01-28 21:51:40 +00006193 NumRegs, RegisterVT, VT,
6194 AssertOp));
Dan Gohman98ca4f22009-08-05 01:29:28 +00006195 CurReg += NumRegs;
6196 }
6197
6198 // For a function returning void, there is no return value. We can't create
6199 // such a node, so we just return a null return value in that case. In
6200 // that case, nothing will actualy look at the value.
6201 if (ReturnValues.empty())
6202 return std::make_pair(SDValue(), Chain);
6203
6204 SDValue Res = DAG.getNode(ISD::MERGE_VALUES, dl,
6205 DAG.getVTList(&RetTys[0], RetTys.size()),
6206 &ReturnValues[0], ReturnValues.size());
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00006207 return std::make_pair(Res, Chain);
6208}
6209
Duncan Sands9fbc7e22009-01-21 09:00:29 +00006210void TargetLowering::LowerOperationWrapper(SDNode *N,
6211 SmallVectorImpl<SDValue> &Results,
Dan Gohmand858e902010-04-17 15:26:15 +00006212 SelectionDAG &DAG) const {
Duncan Sands9fbc7e22009-01-21 09:00:29 +00006213 SDValue Res = LowerOperation(SDValue(N, 0), DAG);
Sanjiv Guptabb326bb2009-01-21 04:48:39 +00006214 if (Res.getNode())
6215 Results.push_back(Res);
6216}
6217
Dan Gohmand858e902010-04-17 15:26:15 +00006218SDValue TargetLowering::LowerOperation(SDValue Op, SelectionDAG &DAG) const {
Torok Edwinc23197a2009-07-14 16:55:14 +00006219 llvm_unreachable("LowerOperation not implemented for this target!");
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00006220 return SDValue();
6221}
6222
Dan Gohman46510a72010-04-15 01:51:59 +00006223void
6224SelectionDAGBuilder::CopyValueToVirtualRegister(const Value *V, unsigned Reg) {
Dan Gohman28a17352010-07-01 01:59:43 +00006225 SDValue Op = getNonRegisterValue(V);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00006226 assert((Op.getOpcode() != ISD::CopyFromReg ||
6227 cast<RegisterSDNode>(Op.getOperand(1))->getReg() != Reg) &&
6228 "Copy from a reg to the same reg!");
6229 assert(!TargetRegisterInfo::isPhysicalRegister(Reg) && "Is a physreg");
6230
Owen Anderson23b9b192009-08-12 00:36:31 +00006231 RegsForValue RFV(V->getContext(), TLI, Reg, V->getType());
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00006232 SDValue Chain = DAG.getEntryNode();
Bill Wendling46ada192010-03-02 01:55:18 +00006233 RFV.getCopyToRegs(Op, DAG, getCurDebugLoc(), Chain, 0);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00006234 PendingExports.push_back(Chain);
6235}
6236
6237#include "llvm/CodeGen/SelectionDAGISel.h"
6238
Dan Gohman46510a72010-04-15 01:51:59 +00006239void SelectionDAGISel::LowerArguments(const BasicBlock *LLVMBB) {
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00006240 // If this is the entry block, emit arguments.
Dan Gohman46510a72010-04-15 01:51:59 +00006241 const Function &F = *LLVMBB->getParent();
Dan Gohman2048b852009-11-23 18:04:58 +00006242 SelectionDAG &DAG = SDB->DAG;
Dan Gohman2048b852009-11-23 18:04:58 +00006243 DebugLoc dl = SDB->getCurDebugLoc();
Dan Gohman98ca4f22009-08-05 01:29:28 +00006244 const TargetData *TD = TLI.getTargetData();
Kenneth Uildriksc158dde2009-11-11 19:59:24 +00006245 SmallVector<ISD::InputArg, 16> Ins;
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00006246
Kenneth Uildriksb4997ae2009-11-07 02:11:54 +00006247 // Check whether the function can return without sret-demotion.
Dan Gohman84023e02010-07-10 09:00:22 +00006248 SmallVector<ISD::OutputArg, 4> Outs;
6249 GetReturnInfo(F.getReturnType(), F.getAttributes().getRetAttributes(),
6250 Outs, TLI);
Kenneth Uildriksc158dde2009-11-11 19:59:24 +00006251
Dan Gohman7451d3e2010-05-29 17:03:36 +00006252 if (!FuncInfo->CanLowerReturn) {
Kenneth Uildriksc158dde2009-11-11 19:59:24 +00006253 // Put in an sret pointer parameter before all the other parameters.
6254 SmallVector<EVT, 1> ValueVTs;
6255 ComputeValueVTs(TLI, PointerType::getUnqual(F.getReturnType()), ValueVTs);
6256
6257 // NOTE: Assuming that a pointer will never break down to more than one VT
6258 // or one register.
6259 ISD::ArgFlagsTy Flags;
6260 Flags.setSRet();
Dan Gohmanf81eca02010-04-22 20:46:50 +00006261 EVT RegisterVT = TLI.getRegisterType(*DAG.getContext(), ValueVTs[0]);
Kenneth Uildriksc158dde2009-11-11 19:59:24 +00006262 ISD::InputArg RetArg(Flags, RegisterVT, true);
6263 Ins.push_back(RetArg);
6264 }
Kenneth Uildriksb4997ae2009-11-07 02:11:54 +00006265
Dan Gohman98ca4f22009-08-05 01:29:28 +00006266 // Set up the incoming argument description vector.
Dan Gohman98ca4f22009-08-05 01:29:28 +00006267 unsigned Idx = 1;
Dan Gohman46510a72010-04-15 01:51:59 +00006268 for (Function::const_arg_iterator I = F.arg_begin(), E = F.arg_end();
Dan Gohman98ca4f22009-08-05 01:29:28 +00006269 I != E; ++I, ++Idx) {
Owen Andersone50ed302009-08-10 22:56:29 +00006270 SmallVector<EVT, 4> ValueVTs;
Dan Gohman98ca4f22009-08-05 01:29:28 +00006271 ComputeValueVTs(TLI, I->getType(), ValueVTs);
6272 bool isArgValueUsed = !I->use_empty();
6273 for (unsigned Value = 0, NumValues = ValueVTs.size();
6274 Value != NumValues; ++Value) {
Owen Andersone50ed302009-08-10 22:56:29 +00006275 EVT VT = ValueVTs[Value];
Owen Anderson1d0be152009-08-13 21:58:54 +00006276 const Type *ArgTy = VT.getTypeForEVT(*DAG.getContext());
Dan Gohman98ca4f22009-08-05 01:29:28 +00006277 ISD::ArgFlagsTy Flags;
6278 unsigned OriginalAlignment =
6279 TD->getABITypeAlignment(ArgTy);
6280
6281 if (F.paramHasAttr(Idx, Attribute::ZExt))
6282 Flags.setZExt();
6283 if (F.paramHasAttr(Idx, Attribute::SExt))
6284 Flags.setSExt();
6285 if (F.paramHasAttr(Idx, Attribute::InReg))
6286 Flags.setInReg();
6287 if (F.paramHasAttr(Idx, Attribute::StructRet))
6288 Flags.setSRet();
6289 if (F.paramHasAttr(Idx, Attribute::ByVal)) {
6290 Flags.setByVal();
6291 const PointerType *Ty = cast<PointerType>(I->getType());
6292 const Type *ElementTy = Ty->getElementType();
6293 unsigned FrameAlign = TLI.getByValTypeAlignment(ElementTy);
6294 unsigned FrameSize = TD->getTypeAllocSize(ElementTy);
6295 // For ByVal, alignment should be passed from FE. BE will guess if
6296 // this info is not there but there are cases it cannot get right.
6297 if (F.getParamAlignment(Idx))
6298 FrameAlign = F.getParamAlignment(Idx);
6299 Flags.setByValAlign(FrameAlign);
6300 Flags.setByValSize(FrameSize);
6301 }
6302 if (F.paramHasAttr(Idx, Attribute::Nest))
6303 Flags.setNest();
6304 Flags.setOrigAlign(OriginalAlignment);
6305
Owen Anderson23b9b192009-08-12 00:36:31 +00006306 EVT RegisterVT = TLI.getRegisterType(*CurDAG->getContext(), VT);
6307 unsigned NumRegs = TLI.getNumRegisters(*CurDAG->getContext(), VT);
Dan Gohman98ca4f22009-08-05 01:29:28 +00006308 for (unsigned i = 0; i != NumRegs; ++i) {
6309 ISD::InputArg MyFlags(Flags, RegisterVT, isArgValueUsed);
6310 if (NumRegs > 1 && i == 0)
6311 MyFlags.Flags.setSplit();
6312 // if it isn't first piece, alignment must be 1
6313 else if (i > 0)
6314 MyFlags.Flags.setOrigAlign(1);
6315 Ins.push_back(MyFlags);
6316 }
6317 }
6318 }
6319
6320 // Call the target to set up the argument values.
6321 SmallVector<SDValue, 8> InVals;
6322 SDValue NewRoot = TLI.LowerFormalArguments(DAG.getRoot(), F.getCallingConv(),
6323 F.isVarArg(), Ins,
6324 dl, DAG, InVals);
Dan Gohman5e866062009-08-06 15:37:27 +00006325
6326 // Verify that the target's LowerFormalArguments behaved as expected.
Owen Anderson825b72b2009-08-11 20:47:22 +00006327 assert(NewRoot.getNode() && NewRoot.getValueType() == MVT::Other &&
Dan Gohman5e866062009-08-06 15:37:27 +00006328 "LowerFormalArguments didn't return a valid chain!");
6329 assert(InVals.size() == Ins.size() &&
6330 "LowerFormalArguments didn't emit the correct number of values!");
Bill Wendling3ea58b62009-12-22 21:35:02 +00006331 DEBUG({
6332 for (unsigned i = 0, e = Ins.size(); i != e; ++i) {
6333 assert(InVals[i].getNode() &&
6334 "LowerFormalArguments emitted a null value!");
Duncan Sands1440e8b2010-11-03 11:35:31 +00006335 assert(EVT(Ins[i].VT) == InVals[i].getValueType() &&
Bill Wendling3ea58b62009-12-22 21:35:02 +00006336 "LowerFormalArguments emitted a value with the wrong type!");
6337 }
6338 });
Bill Wendling3ea3c242009-12-22 02:10:19 +00006339
Dan Gohman5e866062009-08-06 15:37:27 +00006340 // Update the DAG with the new chain value resulting from argument lowering.
Dan Gohman98ca4f22009-08-05 01:29:28 +00006341 DAG.setRoot(NewRoot);
6342
6343 // Set up the argument values.
6344 unsigned i = 0;
6345 Idx = 1;
Dan Gohman7451d3e2010-05-29 17:03:36 +00006346 if (!FuncInfo->CanLowerReturn) {
Kenneth Uildriksc158dde2009-11-11 19:59:24 +00006347 // Create a virtual register for the sret pointer, and put in a copy
6348 // from the sret argument into it.
6349 SmallVector<EVT, 1> ValueVTs;
6350 ComputeValueVTs(TLI, PointerType::getUnqual(F.getReturnType()), ValueVTs);
6351 EVT VT = ValueVTs[0];
6352 EVT RegVT = TLI.getRegisterType(*CurDAG->getContext(), VT);
6353 ISD::NodeType AssertOp = ISD::DELETED_NODE;
Bill Wendling46ada192010-03-02 01:55:18 +00006354 SDValue ArgValue = getCopyFromParts(DAG, dl, &InVals[0], 1,
Bill Wendling3ea3c242009-12-22 02:10:19 +00006355 RegVT, VT, AssertOp);
Kenneth Uildriksc158dde2009-11-11 19:59:24 +00006356
Dan Gohman2048b852009-11-23 18:04:58 +00006357 MachineFunction& MF = SDB->DAG.getMachineFunction();
Kenneth Uildriksc158dde2009-11-11 19:59:24 +00006358 MachineRegisterInfo& RegInfo = MF.getRegInfo();
6359 unsigned SRetReg = RegInfo.createVirtualRegister(TLI.getRegClassFor(RegVT));
Dan Gohman7451d3e2010-05-29 17:03:36 +00006360 FuncInfo->DemoteRegister = SRetReg;
Mikhail Glushenkovb3c01992010-01-01 04:41:22 +00006361 NewRoot = SDB->DAG.getCopyToReg(NewRoot, SDB->getCurDebugLoc(),
6362 SRetReg, ArgValue);
Kenneth Uildriksc158dde2009-11-11 19:59:24 +00006363 DAG.setRoot(NewRoot);
Bill Wendling3ea3c242009-12-22 02:10:19 +00006364
Kenneth Uildriksc158dde2009-11-11 19:59:24 +00006365 // i indexes lowered arguments. Bump it past the hidden sret argument.
6366 // Idx indexes LLVM arguments. Don't touch it.
6367 ++i;
6368 }
Bill Wendling3ea3c242009-12-22 02:10:19 +00006369
Dan Gohman46510a72010-04-15 01:51:59 +00006370 for (Function::const_arg_iterator I = F.arg_begin(), E = F.arg_end(); I != E;
Dan Gohman98ca4f22009-08-05 01:29:28 +00006371 ++I, ++Idx) {
6372 SmallVector<SDValue, 4> ArgValues;
Owen Andersone50ed302009-08-10 22:56:29 +00006373 SmallVector<EVT, 4> ValueVTs;
Dan Gohman98ca4f22009-08-05 01:29:28 +00006374 ComputeValueVTs(TLI, I->getType(), ValueVTs);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00006375 unsigned NumValues = ValueVTs.size();
Devang Patel9126c0d2010-06-01 19:59:01 +00006376
6377 // If this argument is unused then remember its value. It is used to generate
6378 // debugging information.
6379 if (I->use_empty() && NumValues)
6380 SDB->setUnusedArgValue(I, InVals[i]);
6381
Dan Gohman98ca4f22009-08-05 01:29:28 +00006382 for (unsigned Value = 0; Value != NumValues; ++Value) {
Owen Andersone50ed302009-08-10 22:56:29 +00006383 EVT VT = ValueVTs[Value];
Owen Anderson23b9b192009-08-12 00:36:31 +00006384 EVT PartVT = TLI.getRegisterType(*CurDAG->getContext(), VT);
6385 unsigned NumParts = TLI.getNumRegisters(*CurDAG->getContext(), VT);
Dan Gohman98ca4f22009-08-05 01:29:28 +00006386
6387 if (!I->use_empty()) {
6388 ISD::NodeType AssertOp = ISD::DELETED_NODE;
6389 if (F.paramHasAttr(Idx, Attribute::SExt))
6390 AssertOp = ISD::AssertSext;
6391 else if (F.paramHasAttr(Idx, Attribute::ZExt))
6392 AssertOp = ISD::AssertZext;
6393
Bill Wendling46ada192010-03-02 01:55:18 +00006394 ArgValues.push_back(getCopyFromParts(DAG, dl, &InVals[i],
Bill Wendling3ea3c242009-12-22 02:10:19 +00006395 NumParts, PartVT, VT,
6396 AssertOp));
Dan Gohman98ca4f22009-08-05 01:29:28 +00006397 }
Bill Wendling3ea3c242009-12-22 02:10:19 +00006398
Dan Gohman98ca4f22009-08-05 01:29:28 +00006399 i += NumParts;
6400 }
Bill Wendling3ea3c242009-12-22 02:10:19 +00006401
Devang Patel0b48ead2010-08-31 22:22:42 +00006402 // Note down frame index for byval arguments.
6403 if (I->hasByValAttr() && !ArgValues.empty())
Michael J. Spencere70c5262010-10-16 08:25:21 +00006404 if (FrameIndexSDNode *FI =
Devang Patel0b48ead2010-08-31 22:22:42 +00006405 dyn_cast<FrameIndexSDNode>(ArgValues[0].getNode()))
6406 FuncInfo->setByValArgumentFrameIndex(I, FI->getIndex());
6407
Dan Gohman98ca4f22009-08-05 01:29:28 +00006408 if (!I->use_empty()) {
Evan Cheng8e36a5c2010-03-29 21:27:30 +00006409 SDValue Res;
6410 if (!ArgValues.empty())
6411 Res = DAG.getMergeValues(&ArgValues[0], NumValues,
6412 SDB->getCurDebugLoc());
Bill Wendling3ea3c242009-12-22 02:10:19 +00006413 SDB->setValue(I, Res);
6414
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00006415 // If this argument is live outside of the entry block, insert a copy from
6416 // whereever we got it to the vreg that other BB's will reference it as.
Dan Gohman2048b852009-11-23 18:04:58 +00006417 SDB->CopyToExportRegsIfNeeded(I);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00006418 }
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00006419 }
Bill Wendling3ea3c242009-12-22 02:10:19 +00006420
Dan Gohman98ca4f22009-08-05 01:29:28 +00006421 assert(i == InVals.size() && "Argument register count mismatch!");
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00006422
6423 // Finally, if the target has anything special to do, allow it to do so.
6424 // FIXME: this should insert code into the DAG!
Dan Gohman64652652010-04-14 20:17:22 +00006425 EmitFunctionEntryCode();
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00006426}
6427
6428/// Handle PHI nodes in successor blocks. Emit code into the SelectionDAG to
6429/// ensure constants are generated when needed. Remember the virtual registers
6430/// that need to be added to the Machine PHI nodes as input. We cannot just
6431/// directly add them, because expansion might result in multiple MBB's for one
6432/// BB. As such, the start of the BB might correspond to a different MBB than
6433/// the end.
6434///
6435void
Dan Gohmanf81eca02010-04-22 20:46:50 +00006436SelectionDAGBuilder::HandlePHINodesInSuccessorBlocks(const BasicBlock *LLVMBB) {
Dan Gohman46510a72010-04-15 01:51:59 +00006437 const TerminatorInst *TI = LLVMBB->getTerminator();
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00006438
6439 SmallPtrSet<MachineBasicBlock *, 4> SuccsHandled;
6440
6441 // Check successor nodes' PHI nodes that expect a constant to be available
6442 // from this block.
6443 for (unsigned succ = 0, e = TI->getNumSuccessors(); succ != e; ++succ) {
Dan Gohman46510a72010-04-15 01:51:59 +00006444 const BasicBlock *SuccBB = TI->getSuccessor(succ);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00006445 if (!isa<PHINode>(SuccBB->begin())) continue;
Dan Gohmanf81eca02010-04-22 20:46:50 +00006446 MachineBasicBlock *SuccMBB = FuncInfo.MBBMap[SuccBB];
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00006447
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00006448 // If this terminator has multiple identical successors (common for
6449 // switches), only handle each succ once.
6450 if (!SuccsHandled.insert(SuccMBB)) continue;
Mikhail Glushenkov5c1799b2009-01-16 06:53:46 +00006451
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00006452 MachineBasicBlock::iterator MBBI = SuccMBB->begin();
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00006453
6454 // At this point we know that there is a 1-1 correspondence between LLVM PHI
6455 // nodes and Machine PHI nodes, but the incoming operands have not been
6456 // emitted yet.
Dan Gohman46510a72010-04-15 01:51:59 +00006457 for (BasicBlock::const_iterator I = SuccBB->begin();
6458 const PHINode *PN = dyn_cast<PHINode>(I); ++I) {
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00006459 // Ignore dead phi's.
6460 if (PN->use_empty()) continue;
6461
6462 unsigned Reg;
Dan Gohman46510a72010-04-15 01:51:59 +00006463 const Value *PHIOp = PN->getIncomingValueForBlock(LLVMBB);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00006464
Dan Gohman46510a72010-04-15 01:51:59 +00006465 if (const Constant *C = dyn_cast<Constant>(PHIOp)) {
Dan Gohmanf81eca02010-04-22 20:46:50 +00006466 unsigned &RegOut = ConstantsOut[C];
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00006467 if (RegOut == 0) {
Dan Gohman89496d02010-07-02 00:10:16 +00006468 RegOut = FuncInfo.CreateRegs(C->getType());
Dan Gohmanf81eca02010-04-22 20:46:50 +00006469 CopyValueToVirtualRegister(C, RegOut);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00006470 }
6471 Reg = RegOut;
6472 } else {
Dan Gohmanc25ad632010-07-01 01:33:21 +00006473 DenseMap<const Value *, unsigned>::iterator I =
6474 FuncInfo.ValueMap.find(PHIOp);
6475 if (I != FuncInfo.ValueMap.end())
6476 Reg = I->second;
6477 else {
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00006478 assert(isa<AllocaInst>(PHIOp) &&
Dan Gohmanf81eca02010-04-22 20:46:50 +00006479 FuncInfo.StaticAllocaMap.count(cast<AllocaInst>(PHIOp)) &&
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00006480 "Didn't codegen value into a register!??");
Dan Gohman89496d02010-07-02 00:10:16 +00006481 Reg = FuncInfo.CreateRegs(PHIOp->getType());
Dan Gohmanf81eca02010-04-22 20:46:50 +00006482 CopyValueToVirtualRegister(PHIOp, Reg);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00006483 }
6484 }
6485
6486 // Remember that this register needs to added to the machine PHI node as
6487 // the input for this MBB.
Owen Andersone50ed302009-08-10 22:56:29 +00006488 SmallVector<EVT, 4> ValueVTs;
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00006489 ComputeValueVTs(TLI, PN->getType(), ValueVTs);
6490 for (unsigned vti = 0, vte = ValueVTs.size(); vti != vte; ++vti) {
Owen Andersone50ed302009-08-10 22:56:29 +00006491 EVT VT = ValueVTs[vti];
Dan Gohmanf81eca02010-04-22 20:46:50 +00006492 unsigned NumRegisters = TLI.getNumRegisters(*DAG.getContext(), VT);
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00006493 for (unsigned i = 0, e = NumRegisters; i != e; ++i)
Dan Gohmanf81eca02010-04-22 20:46:50 +00006494 FuncInfo.PHINodesToUpdate.push_back(std::make_pair(MBBI++, Reg+i));
Dan Gohmanf0cbcd42008-09-03 16:12:24 +00006495 Reg += NumRegisters;
6496 }
6497 }
6498 }
Dan Gohmanf81eca02010-04-22 20:46:50 +00006499 ConstantsOut.clear();
Dan Gohman3df24e62008-09-03 23:12:08 +00006500}